1 /* linux/drivers/char/watchdog/s3c2410_wdt.c
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 Watchdog Timer Support
8 * Based on, softdog.c by Alan Cox,
9 * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/types.h>
31 #include <linux/timer.h>
32 #include <linux/miscdevice.h> /* for MODULE_ALIAS_MISCDEV */
33 #include <linux/watchdog.h>
34 #include <linux/init.h>
35 #include <linux/platform_device.h>
36 #include <linux/interrupt.h>
37 #include <linux/clk.h>
38 #include <linux/uaccess.h>
40 #include <linux/cpufreq.h>
41 #include <linux/slab.h>
42 #include <linux/err.h>
47 #undef S3C_VA_WATCHDOG
48 #define S3C_VA_WATCHDOG (0)
50 #include <plat/regs-watchdog.h>
52 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
53 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
55 static bool nowayout
= WATCHDOG_NOWAYOUT
;
56 static int tmr_margin
;
57 static int tmr_atboot
= CONFIG_S3C2410_WATCHDOG_ATBOOT
;
58 static int soft_noboot
;
61 module_param(tmr_margin
, int, 0);
62 module_param(tmr_atboot
, int, 0);
63 module_param(nowayout
, bool, 0);
64 module_param(soft_noboot
, int, 0);
65 module_param(debug
, int, 0);
67 MODULE_PARM_DESC(tmr_margin
, "Watchdog tmr_margin in seconds. (default="
68 __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME
) ")");
69 MODULE_PARM_DESC(tmr_atboot
,
70 "Watchdog is started at boot time if set to 1, default="
71 __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT
));
72 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started (default="
73 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");
74 MODULE_PARM_DESC(soft_noboot
, "Watchdog action, set to 1 to ignore reboots, "
75 "0 to reboot (default 0)");
76 MODULE_PARM_DESC(debug
, "Watchdog debug, set to >1 for debug (default 0)");
78 static struct device
*wdt_dev
; /* platform device attached to */
79 static struct resource
*wdt_mem
;
80 static struct resource
*wdt_irq
;
81 static struct clk
*wdt_clock
;
82 static void __iomem
*wdt_base
;
83 static unsigned int wdt_count
;
84 static DEFINE_SPINLOCK(wdt_lock
);
86 /* watchdog control routines */
88 #define DBG(fmt, ...) \
91 pr_info(fmt, ##__VA_ARGS__); \
96 static int s3c2410wdt_keepalive(struct watchdog_device
*wdd
)
99 writel(wdt_count
, wdt_base
+ S3C2410_WTCNT
);
100 spin_unlock(&wdt_lock
);
105 static void __s3c2410wdt_stop(void)
109 wtcon
= readl(wdt_base
+ S3C2410_WTCON
);
110 wtcon
&= ~(S3C2410_WTCON_ENABLE
| S3C2410_WTCON_RSTEN
);
111 writel(wtcon
, wdt_base
+ S3C2410_WTCON
);
114 static int s3c2410wdt_stop(struct watchdog_device
*wdd
)
116 spin_lock(&wdt_lock
);
118 spin_unlock(&wdt_lock
);
123 static int s3c2410wdt_start(struct watchdog_device
*wdd
)
127 spin_lock(&wdt_lock
);
131 wtcon
= readl(wdt_base
+ S3C2410_WTCON
);
132 wtcon
|= S3C2410_WTCON_ENABLE
| S3C2410_WTCON_DIV128
;
135 wtcon
|= S3C2410_WTCON_INTEN
;
136 wtcon
&= ~S3C2410_WTCON_RSTEN
;
138 wtcon
&= ~S3C2410_WTCON_INTEN
;
139 wtcon
|= S3C2410_WTCON_RSTEN
;
142 DBG("%s: wdt_count=0x%08x, wtcon=%08lx\n",
143 __func__
, wdt_count
, wtcon
);
145 writel(wdt_count
, wdt_base
+ S3C2410_WTDAT
);
146 writel(wdt_count
, wdt_base
+ S3C2410_WTCNT
);
147 writel(wtcon
, wdt_base
+ S3C2410_WTCON
);
148 spin_unlock(&wdt_lock
);
153 static inline int s3c2410wdt_is_running(void)
155 return readl(wdt_base
+ S3C2410_WTCON
) & S3C2410_WTCON_ENABLE
;
158 static int s3c2410wdt_set_heartbeat(struct watchdog_device
*wdd
, unsigned timeout
)
160 unsigned long freq
= clk_get_rate(wdt_clock
);
162 unsigned int divisor
= 1;
169 count
= timeout
* freq
;
171 DBG("%s: count=%d, timeout=%d, freq=%lu\n",
172 __func__
, count
, timeout
, freq
);
174 /* if the count is bigger than the watchdog register,
175 then work out what we need to do (and if) we can
176 actually make this value
179 if (count
>= 0x10000) {
180 for (divisor
= 1; divisor
<= 0x100; divisor
++) {
181 if ((count
/ divisor
) < 0x10000)
185 if ((count
/ divisor
) >= 0x10000) {
186 dev_err(wdt_dev
, "timeout %d too big\n", timeout
);
191 DBG("%s: timeout=%d, divisor=%d, count=%d (%08x)\n",
192 __func__
, timeout
, divisor
, count
, count
/divisor
);
197 /* update the pre-scaler */
198 wtcon
= readl(wdt_base
+ S3C2410_WTCON
);
199 wtcon
&= ~S3C2410_WTCON_PRESCALE_MASK
;
200 wtcon
|= S3C2410_WTCON_PRESCALE(divisor
-1);
202 writel(count
, wdt_base
+ S3C2410_WTDAT
);
203 writel(wtcon
, wdt_base
+ S3C2410_WTCON
);
205 wdd
->timeout
= (count
* divisor
) / freq
;
210 #define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
212 static const struct watchdog_info s3c2410_wdt_ident
= {
214 .firmware_version
= 0,
215 .identity
= "S3C2410 Watchdog",
218 static struct watchdog_ops s3c2410wdt_ops
= {
219 .owner
= THIS_MODULE
,
220 .start
= s3c2410wdt_start
,
221 .stop
= s3c2410wdt_stop
,
222 .ping
= s3c2410wdt_keepalive
,
223 .set_timeout
= s3c2410wdt_set_heartbeat
,
226 static struct watchdog_device s3c2410_wdd
= {
227 .info
= &s3c2410_wdt_ident
,
228 .ops
= &s3c2410wdt_ops
,
229 .timeout
= CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME
,
232 /* interrupt handler code */
234 static irqreturn_t
s3c2410wdt_irq(int irqno
, void *param
)
236 dev_info(wdt_dev
, "watchdog timer expired (irq)\n");
238 s3c2410wdt_keepalive(&s3c2410_wdd
);
243 #ifdef CONFIG_CPU_FREQ
245 static int s3c2410wdt_cpufreq_transition(struct notifier_block
*nb
,
246 unsigned long val
, void *data
)
250 if (!s3c2410wdt_is_running())
253 if (val
== CPUFREQ_PRECHANGE
) {
254 /* To ensure that over the change we don't cause the
255 * watchdog to trigger, we perform an keep-alive if
256 * the watchdog is running.
259 s3c2410wdt_keepalive(&s3c2410_wdd
);
260 } else if (val
== CPUFREQ_POSTCHANGE
) {
261 s3c2410wdt_stop(&s3c2410_wdd
);
263 ret
= s3c2410wdt_set_heartbeat(&s3c2410_wdd
, s3c2410_wdd
.timeout
);
266 s3c2410wdt_start(&s3c2410_wdd
);
275 dev_err(wdt_dev
, "cannot set new value for timeout %d\n",
276 s3c2410_wdd
.timeout
);
280 static struct notifier_block s3c2410wdt_cpufreq_transition_nb
= {
281 .notifier_call
= s3c2410wdt_cpufreq_transition
,
284 static inline int s3c2410wdt_cpufreq_register(void)
286 return cpufreq_register_notifier(&s3c2410wdt_cpufreq_transition_nb
,
287 CPUFREQ_TRANSITION_NOTIFIER
);
290 static inline void s3c2410wdt_cpufreq_deregister(void)
292 cpufreq_unregister_notifier(&s3c2410wdt_cpufreq_transition_nb
,
293 CPUFREQ_TRANSITION_NOTIFIER
);
297 static inline int s3c2410wdt_cpufreq_register(void)
302 static inline void s3c2410wdt_cpufreq_deregister(void)
307 static int s3c2410wdt_probe(struct platform_device
*pdev
)
314 DBG("%s: probe=%p\n", __func__
, pdev
);
317 wdt_dev
= &pdev
->dev
;
319 wdt_mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
320 if (wdt_mem
== NULL
) {
321 dev_err(dev
, "no memory resource specified\n");
325 wdt_irq
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
326 if (wdt_irq
== NULL
) {
327 dev_err(dev
, "no irq resource specified\n");
332 /* get the memory region for the watchdog timer */
333 wdt_base
= devm_request_and_ioremap(dev
, wdt_mem
);
334 if (wdt_base
== NULL
) {
335 dev_err(dev
, "failed to devm_request_and_ioremap() region\n");
340 DBG("probe: mapped wdt_base=%p\n", wdt_base
);
342 wdt_clock
= devm_clk_get(dev
, "watchdog");
343 if (IS_ERR(wdt_clock
)) {
344 dev_err(dev
, "failed to find watchdog clock source\n");
345 ret
= PTR_ERR(wdt_clock
);
349 clk_prepare_enable(wdt_clock
);
351 ret
= s3c2410wdt_cpufreq_register();
353 pr_err("failed to register cpufreq\n");
357 /* see if we can actually set the requested timer margin, and if
358 * not, try the default value */
360 watchdog_init_timeout(&s3c2410_wdd
, tmr_margin
, &pdev
->dev
);
361 if (s3c2410wdt_set_heartbeat(&s3c2410_wdd
, s3c2410_wdd
.timeout
)) {
362 started
= s3c2410wdt_set_heartbeat(&s3c2410_wdd
,
363 CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME
);
367 "tmr_margin value out of range, default %d used\n",
368 CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME
);
370 dev_info(dev
, "default timer value is out of range, "
374 ret
= devm_request_irq(dev
, wdt_irq
->start
, s3c2410wdt_irq
, 0,
377 dev_err(dev
, "failed to install irq (%d)\n", ret
);
381 watchdog_set_nowayout(&s3c2410_wdd
, nowayout
);
383 ret
= watchdog_register_device(&s3c2410_wdd
);
385 dev_err(dev
, "cannot register watchdog (%d)\n", ret
);
389 if (tmr_atboot
&& started
== 0) {
390 dev_info(dev
, "starting watchdog timer\n");
391 s3c2410wdt_start(&s3c2410_wdd
);
392 } else if (!tmr_atboot
) {
393 /* if we're not enabling the watchdog, then ensure it is
394 * disabled if it has been left running from the bootloader
397 s3c2410wdt_stop(&s3c2410_wdd
);
400 /* print out a statement of readiness */
402 wtcon
= readl(wdt_base
+ S3C2410_WTCON
);
404 dev_info(dev
, "watchdog %sactive, reset %sabled, irq %sabled\n",
405 (wtcon
& S3C2410_WTCON_ENABLE
) ? "" : "in",
406 (wtcon
& S3C2410_WTCON_RSTEN
) ? "en" : "dis",
407 (wtcon
& S3C2410_WTCON_INTEN
) ? "en" : "dis");
412 s3c2410wdt_cpufreq_deregister();
415 clk_disable_unprepare(wdt_clock
);
424 static int s3c2410wdt_remove(struct platform_device
*dev
)
426 watchdog_unregister_device(&s3c2410_wdd
);
428 s3c2410wdt_cpufreq_deregister();
430 clk_disable_unprepare(wdt_clock
);
438 static void s3c2410wdt_shutdown(struct platform_device
*dev
)
440 s3c2410wdt_stop(&s3c2410_wdd
);
445 static unsigned long wtcon_save
;
446 static unsigned long wtdat_save
;
448 static int s3c2410wdt_suspend(struct platform_device
*dev
, pm_message_t state
)
450 /* Save watchdog state, and turn it off. */
451 wtcon_save
= readl(wdt_base
+ S3C2410_WTCON
);
452 wtdat_save
= readl(wdt_base
+ S3C2410_WTDAT
);
454 /* Note that WTCNT doesn't need to be saved. */
455 s3c2410wdt_stop(&s3c2410_wdd
);
460 static int s3c2410wdt_resume(struct platform_device
*dev
)
462 /* Restore watchdog state. */
464 writel(wtdat_save
, wdt_base
+ S3C2410_WTDAT
);
465 writel(wtdat_save
, wdt_base
+ S3C2410_WTCNT
); /* Reset count */
466 writel(wtcon_save
, wdt_base
+ S3C2410_WTCON
);
468 pr_info("watchdog %sabled\n",
469 (wtcon_save
& S3C2410_WTCON_ENABLE
) ? "en" : "dis");
475 #define s3c2410wdt_suspend NULL
476 #define s3c2410wdt_resume NULL
477 #endif /* CONFIG_PM */
480 static const struct of_device_id s3c2410_wdt_match
[] = {
481 { .compatible
= "samsung,s3c2410-wdt" },
484 MODULE_DEVICE_TABLE(of
, s3c2410_wdt_match
);
487 static struct platform_driver s3c2410wdt_driver
= {
488 .probe
= s3c2410wdt_probe
,
489 .remove
= s3c2410wdt_remove
,
490 .shutdown
= s3c2410wdt_shutdown
,
491 .suspend
= s3c2410wdt_suspend
,
492 .resume
= s3c2410wdt_resume
,
494 .owner
= THIS_MODULE
,
495 .name
= "s3c2410-wdt",
496 .of_match_table
= of_match_ptr(s3c2410_wdt_match
),
500 module_platform_driver(s3c2410wdt_driver
);
502 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, "
503 "Dimitry Andric <dimitry.andric@tomtom.com>");
504 MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver");
505 MODULE_LICENSE("GPL");
506 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR
);
507 MODULE_ALIAS("platform:s3c2410-wdt");