xen: events: return irq from xen_allocate_pirq_msi
[deliverable/linux.git] / drivers / xen / events.c
1 /*
2 * Xen event channels
3 *
4 * Xen models interrupts with abstract event channels. Because each
5 * domain gets 1024 event channels, but NR_IRQ is not that large, we
6 * must dynamically map irqs<->event channels. The event channels
7 * interface with the rest of the kernel by defining a xen interrupt
8 * chip. When an event is recieved, it is mapped to an irq and sent
9 * through the normal interrupt processing path.
10 *
11 * There are four kinds of events which can be mapped to an event
12 * channel:
13 *
14 * 1. Inter-domain notifications. This includes all the virtual
15 * device events, since they're driven by front-ends in another domain
16 * (typically dom0).
17 * 2. VIRQs, typically used for timers. These are per-cpu events.
18 * 3. IPIs.
19 * 4. PIRQs - Hardware interrupts.
20 *
21 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
22 */
23
24 #include <linux/linkage.h>
25 #include <linux/interrupt.h>
26 #include <linux/irq.h>
27 #include <linux/module.h>
28 #include <linux/string.h>
29 #include <linux/bootmem.h>
30 #include <linux/slab.h>
31 #include <linux/irqnr.h>
32 #include <linux/pci.h>
33
34 #include <asm/desc.h>
35 #include <asm/ptrace.h>
36 #include <asm/irq.h>
37 #include <asm/idle.h>
38 #include <asm/io_apic.h>
39 #include <asm/sync_bitops.h>
40 #include <asm/xen/pci.h>
41 #include <asm/xen/hypercall.h>
42 #include <asm/xen/hypervisor.h>
43
44 #include <xen/xen.h>
45 #include <xen/hvm.h>
46 #include <xen/xen-ops.h>
47 #include <xen/events.h>
48 #include <xen/interface/xen.h>
49 #include <xen/interface/event_channel.h>
50 #include <xen/interface/hvm/hvm_op.h>
51 #include <xen/interface/hvm/params.h>
52
53 /*
54 * This lock protects updates to the following mapping and reference-count
55 * arrays. The lock does not need to be acquired to read the mapping tables.
56 */
57 static DEFINE_SPINLOCK(irq_mapping_update_lock);
58
59 /* IRQ <-> VIRQ mapping. */
60 static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
61
62 /* IRQ <-> IPI mapping */
63 static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
64
65 /* Interrupt types. */
66 enum xen_irq_type {
67 IRQT_UNBOUND = 0,
68 IRQT_PIRQ,
69 IRQT_VIRQ,
70 IRQT_IPI,
71 IRQT_EVTCHN
72 };
73
74 /*
75 * Packed IRQ information:
76 * type - enum xen_irq_type
77 * event channel - irq->event channel mapping
78 * cpu - cpu this event channel is bound to
79 * index - type-specific information:
80 * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
81 * guest, or GSI (real passthrough IRQ) of the device.
82 * VIRQ - virq number
83 * IPI - IPI vector
84 * EVTCHN -
85 */
86 struct irq_info
87 {
88 enum xen_irq_type type; /* type */
89 unsigned short evtchn; /* event channel */
90 unsigned short cpu; /* cpu bound */
91
92 union {
93 unsigned short virq;
94 enum ipi_vector ipi;
95 struct {
96 unsigned short pirq;
97 unsigned short gsi;
98 unsigned char vector;
99 unsigned char flags;
100 } pirq;
101 } u;
102 };
103 #define PIRQ_NEEDS_EOI (1 << 0)
104 #define PIRQ_SHAREABLE (1 << 1)
105
106 static struct irq_info *irq_info;
107 static int *pirq_to_irq;
108
109 static int *evtchn_to_irq;
110 struct cpu_evtchn_s {
111 unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
112 };
113
114 static __initdata struct cpu_evtchn_s init_evtchn_mask = {
115 .bits[0 ... (NR_EVENT_CHANNELS/BITS_PER_LONG)-1] = ~0ul,
116 };
117 static struct cpu_evtchn_s *cpu_evtchn_mask_p = &init_evtchn_mask;
118
119 static inline unsigned long *cpu_evtchn_mask(int cpu)
120 {
121 return cpu_evtchn_mask_p[cpu].bits;
122 }
123
124 /* Xen will never allocate port zero for any purpose. */
125 #define VALID_EVTCHN(chn) ((chn) != 0)
126
127 static struct irq_chip xen_dynamic_chip;
128 static struct irq_chip xen_percpu_chip;
129 static struct irq_chip xen_pirq_chip;
130
131 /* Constructor for packed IRQ information. */
132 static struct irq_info mk_unbound_info(void)
133 {
134 return (struct irq_info) { .type = IRQT_UNBOUND };
135 }
136
137 static struct irq_info mk_evtchn_info(unsigned short evtchn)
138 {
139 return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
140 .cpu = 0 };
141 }
142
143 static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
144 {
145 return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
146 .cpu = 0, .u.ipi = ipi };
147 }
148
149 static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
150 {
151 return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
152 .cpu = 0, .u.virq = virq };
153 }
154
155 static struct irq_info mk_pirq_info(unsigned short evtchn, unsigned short pirq,
156 unsigned short gsi, unsigned short vector)
157 {
158 return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
159 .cpu = 0,
160 .u.pirq = { .pirq = pirq, .gsi = gsi, .vector = vector } };
161 }
162
163 /*
164 * Accessors for packed IRQ information.
165 */
166 static struct irq_info *info_for_irq(unsigned irq)
167 {
168 return &irq_info[irq];
169 }
170
171 static unsigned int evtchn_from_irq(unsigned irq)
172 {
173 if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
174 return 0;
175
176 return info_for_irq(irq)->evtchn;
177 }
178
179 unsigned irq_from_evtchn(unsigned int evtchn)
180 {
181 return evtchn_to_irq[evtchn];
182 }
183 EXPORT_SYMBOL_GPL(irq_from_evtchn);
184
185 static enum ipi_vector ipi_from_irq(unsigned irq)
186 {
187 struct irq_info *info = info_for_irq(irq);
188
189 BUG_ON(info == NULL);
190 BUG_ON(info->type != IRQT_IPI);
191
192 return info->u.ipi;
193 }
194
195 static unsigned virq_from_irq(unsigned irq)
196 {
197 struct irq_info *info = info_for_irq(irq);
198
199 BUG_ON(info == NULL);
200 BUG_ON(info->type != IRQT_VIRQ);
201
202 return info->u.virq;
203 }
204
205 static unsigned pirq_from_irq(unsigned irq)
206 {
207 struct irq_info *info = info_for_irq(irq);
208
209 BUG_ON(info == NULL);
210 BUG_ON(info->type != IRQT_PIRQ);
211
212 return info->u.pirq.pirq;
213 }
214
215 static unsigned gsi_from_irq(unsigned irq)
216 {
217 struct irq_info *info = info_for_irq(irq);
218
219 BUG_ON(info == NULL);
220 BUG_ON(info->type != IRQT_PIRQ);
221
222 return info->u.pirq.gsi;
223 }
224
225 static unsigned vector_from_irq(unsigned irq)
226 {
227 struct irq_info *info = info_for_irq(irq);
228
229 BUG_ON(info == NULL);
230 BUG_ON(info->type != IRQT_PIRQ);
231
232 return info->u.pirq.vector;
233 }
234
235 static enum xen_irq_type type_from_irq(unsigned irq)
236 {
237 return info_for_irq(irq)->type;
238 }
239
240 static unsigned cpu_from_irq(unsigned irq)
241 {
242 return info_for_irq(irq)->cpu;
243 }
244
245 static unsigned int cpu_from_evtchn(unsigned int evtchn)
246 {
247 int irq = evtchn_to_irq[evtchn];
248 unsigned ret = 0;
249
250 if (irq != -1)
251 ret = cpu_from_irq(irq);
252
253 return ret;
254 }
255
256 static bool pirq_needs_eoi(unsigned irq)
257 {
258 struct irq_info *info = info_for_irq(irq);
259
260 BUG_ON(info->type != IRQT_PIRQ);
261
262 return info->u.pirq.flags & PIRQ_NEEDS_EOI;
263 }
264
265 static inline unsigned long active_evtchns(unsigned int cpu,
266 struct shared_info *sh,
267 unsigned int idx)
268 {
269 return (sh->evtchn_pending[idx] &
270 cpu_evtchn_mask(cpu)[idx] &
271 ~sh->evtchn_mask[idx]);
272 }
273
274 static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
275 {
276 int irq = evtchn_to_irq[chn];
277
278 BUG_ON(irq == -1);
279 #ifdef CONFIG_SMP
280 cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
281 #endif
282
283 clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
284 set_bit(chn, cpu_evtchn_mask(cpu));
285
286 irq_info[irq].cpu = cpu;
287 }
288
289 static void init_evtchn_cpu_bindings(void)
290 {
291 int i;
292 #ifdef CONFIG_SMP
293 struct irq_desc *desc;
294
295 /* By default all event channels notify CPU#0. */
296 for_each_irq_desc(i, desc) {
297 cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
298 }
299 #endif
300
301 for_each_possible_cpu(i)
302 memset(cpu_evtchn_mask(i),
303 (i == 0) ? ~0 : 0, sizeof(struct cpu_evtchn_s));
304
305 }
306
307 static inline void clear_evtchn(int port)
308 {
309 struct shared_info *s = HYPERVISOR_shared_info;
310 sync_clear_bit(port, &s->evtchn_pending[0]);
311 }
312
313 static inline void set_evtchn(int port)
314 {
315 struct shared_info *s = HYPERVISOR_shared_info;
316 sync_set_bit(port, &s->evtchn_pending[0]);
317 }
318
319 static inline int test_evtchn(int port)
320 {
321 struct shared_info *s = HYPERVISOR_shared_info;
322 return sync_test_bit(port, &s->evtchn_pending[0]);
323 }
324
325
326 /**
327 * notify_remote_via_irq - send event to remote end of event channel via irq
328 * @irq: irq of event channel to send event to
329 *
330 * Unlike notify_remote_via_evtchn(), this is safe to use across
331 * save/restore. Notifications on a broken connection are silently
332 * dropped.
333 */
334 void notify_remote_via_irq(int irq)
335 {
336 int evtchn = evtchn_from_irq(irq);
337
338 if (VALID_EVTCHN(evtchn))
339 notify_remote_via_evtchn(evtchn);
340 }
341 EXPORT_SYMBOL_GPL(notify_remote_via_irq);
342
343 static void mask_evtchn(int port)
344 {
345 struct shared_info *s = HYPERVISOR_shared_info;
346 sync_set_bit(port, &s->evtchn_mask[0]);
347 }
348
349 static void unmask_evtchn(int port)
350 {
351 struct shared_info *s = HYPERVISOR_shared_info;
352 unsigned int cpu = get_cpu();
353
354 BUG_ON(!irqs_disabled());
355
356 /* Slow path (hypercall) if this is a non-local port. */
357 if (unlikely(cpu != cpu_from_evtchn(port))) {
358 struct evtchn_unmask unmask = { .port = port };
359 (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
360 } else {
361 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
362
363 sync_clear_bit(port, &s->evtchn_mask[0]);
364
365 /*
366 * The following is basically the equivalent of
367 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
368 * the interrupt edge' if the channel is masked.
369 */
370 if (sync_test_bit(port, &s->evtchn_pending[0]) &&
371 !sync_test_and_set_bit(port / BITS_PER_LONG,
372 &vcpu_info->evtchn_pending_sel))
373 vcpu_info->evtchn_upcall_pending = 1;
374 }
375
376 put_cpu();
377 }
378
379 static int xen_allocate_irq_dynamic(void)
380 {
381 int first = 0;
382 int irq;
383
384 #ifdef CONFIG_X86_IO_APIC
385 /*
386 * For an HVM guest or domain 0 which see "real" (emulated or
387 * actual repectively) GSIs we allocate dynamic IRQs
388 * e.g. those corresponding to event channels or MSIs
389 * etc. from the range above those "real" GSIs to avoid
390 * collisions.
391 */
392 if (xen_initial_domain() || xen_hvm_domain())
393 first = get_nr_irqs_gsi();
394 #endif
395
396 retry:
397 irq = irq_alloc_desc_from(first, -1);
398
399 if (irq == -ENOMEM && first > NR_IRQS_LEGACY) {
400 printk(KERN_ERR "Out of dynamic IRQ space and eating into GSI space. You should increase nr_irqs\n");
401 first = max(NR_IRQS_LEGACY, first - NR_IRQS_LEGACY);
402 goto retry;
403 }
404
405 if (irq < 0)
406 panic("No available IRQ to bind to: increase nr_irqs!\n");
407
408 return irq;
409 }
410
411 static int xen_allocate_irq_gsi(unsigned gsi)
412 {
413 int irq;
414
415 /*
416 * A PV guest has no concept of a GSI (since it has no ACPI
417 * nor access to/knowledge of the physical APICs). Therefore
418 * all IRQs are dynamically allocated from the entire IRQ
419 * space.
420 */
421 if (xen_pv_domain() && !xen_initial_domain())
422 return xen_allocate_irq_dynamic();
423
424 /* Legacy IRQ descriptors are already allocated by the arch. */
425 if (gsi < NR_IRQS_LEGACY)
426 return gsi;
427
428 irq = irq_alloc_desc_at(gsi, -1);
429 if (irq < 0)
430 panic("Unable to allocate to IRQ%d (%d)\n", gsi, irq);
431
432 return irq;
433 }
434
435 static void xen_free_irq(unsigned irq)
436 {
437 /* Legacy IRQ descriptors are managed by the arch. */
438 if (irq < NR_IRQS_LEGACY)
439 return;
440
441 irq_free_desc(irq);
442 }
443
444 static void pirq_unmask_notify(int irq)
445 {
446 struct physdev_eoi eoi = { .irq = pirq_from_irq(irq) };
447
448 if (unlikely(pirq_needs_eoi(irq))) {
449 int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
450 WARN_ON(rc);
451 }
452 }
453
454 static void pirq_query_unmask(int irq)
455 {
456 struct physdev_irq_status_query irq_status;
457 struct irq_info *info = info_for_irq(irq);
458
459 BUG_ON(info->type != IRQT_PIRQ);
460
461 irq_status.irq = pirq_from_irq(irq);
462 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
463 irq_status.flags = 0;
464
465 info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
466 if (irq_status.flags & XENIRQSTAT_needs_eoi)
467 info->u.pirq.flags |= PIRQ_NEEDS_EOI;
468 }
469
470 static bool probing_irq(int irq)
471 {
472 struct irq_desc *desc = irq_to_desc(irq);
473
474 return desc && desc->action == NULL;
475 }
476
477 static unsigned int __startup_pirq(unsigned int irq)
478 {
479 struct evtchn_bind_pirq bind_pirq;
480 struct irq_info *info = info_for_irq(irq);
481 int evtchn = evtchn_from_irq(irq);
482 int rc;
483
484 BUG_ON(info->type != IRQT_PIRQ);
485
486 if (VALID_EVTCHN(evtchn))
487 goto out;
488
489 bind_pirq.pirq = pirq_from_irq(irq);
490 /* NB. We are happy to share unless we are probing. */
491 bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
492 BIND_PIRQ__WILL_SHARE : 0;
493 rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
494 if (rc != 0) {
495 if (!probing_irq(irq))
496 printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
497 irq);
498 return 0;
499 }
500 evtchn = bind_pirq.port;
501
502 pirq_query_unmask(irq);
503
504 evtchn_to_irq[evtchn] = irq;
505 bind_evtchn_to_cpu(evtchn, 0);
506 info->evtchn = evtchn;
507
508 out:
509 unmask_evtchn(evtchn);
510 pirq_unmask_notify(irq);
511
512 return 0;
513 }
514
515 static unsigned int startup_pirq(struct irq_data *data)
516 {
517 return __startup_pirq(data->irq);
518 }
519
520 static void shutdown_pirq(struct irq_data *data)
521 {
522 struct evtchn_close close;
523 unsigned int irq = data->irq;
524 struct irq_info *info = info_for_irq(irq);
525 int evtchn = evtchn_from_irq(irq);
526
527 BUG_ON(info->type != IRQT_PIRQ);
528
529 if (!VALID_EVTCHN(evtchn))
530 return;
531
532 mask_evtchn(evtchn);
533
534 close.port = evtchn;
535 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
536 BUG();
537
538 bind_evtchn_to_cpu(evtchn, 0);
539 evtchn_to_irq[evtchn] = -1;
540 info->evtchn = 0;
541 }
542
543 static void enable_pirq(struct irq_data *data)
544 {
545 startup_pirq(data);
546 }
547
548 static void disable_pirq(struct irq_data *data)
549 {
550 }
551
552 static void ack_pirq(struct irq_data *data)
553 {
554 int evtchn = evtchn_from_irq(data->irq);
555
556 move_native_irq(data->irq);
557
558 if (VALID_EVTCHN(evtchn)) {
559 mask_evtchn(evtchn);
560 clear_evtchn(evtchn);
561 }
562 }
563
564 static int find_irq_by_gsi(unsigned gsi)
565 {
566 int irq;
567
568 for (irq = 0; irq < nr_irqs; irq++) {
569 struct irq_info *info = info_for_irq(irq);
570
571 if (info == NULL || info->type != IRQT_PIRQ)
572 continue;
573
574 if (gsi_from_irq(irq) == gsi)
575 return irq;
576 }
577
578 return -1;
579 }
580
581 int xen_allocate_pirq(unsigned gsi, int shareable, char *name)
582 {
583 return xen_map_pirq_gsi(gsi, gsi, shareable, name);
584 }
585
586 /* xen_map_pirq_gsi might allocate irqs from the top down, as a
587 * consequence don't assume that the irq number returned has a low value
588 * or can be used as a pirq number unless you know otherwise.
589 *
590 * One notable exception is when xen_map_pirq_gsi is called passing an
591 * hardware gsi as argument, in that case the irq number returned
592 * matches the gsi number passed as second argument.
593 *
594 * Note: We don't assign an event channel until the irq actually started
595 * up. Return an existing irq if we've already got one for the gsi.
596 */
597 int xen_map_pirq_gsi(unsigned pirq, unsigned gsi, int shareable, char *name)
598 {
599 int irq = 0;
600 struct physdev_irq irq_op;
601
602 spin_lock(&irq_mapping_update_lock);
603
604 if ((pirq > nr_irqs) || (gsi > nr_irqs)) {
605 printk(KERN_WARNING "xen_map_pirq_gsi: %s %s is incorrect!\n",
606 pirq > nr_irqs ? "pirq" :"",
607 gsi > nr_irqs ? "gsi" : "");
608 goto out;
609 }
610
611 irq = find_irq_by_gsi(gsi);
612 if (irq != -1) {
613 printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
614 irq, gsi);
615 goto out; /* XXX need refcount? */
616 }
617
618 irq = xen_allocate_irq_gsi(gsi);
619
620 set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
621 handle_level_irq, name);
622
623 irq_op.irq = irq;
624 irq_op.vector = 0;
625
626 /* Only the privileged domain can do this. For non-priv, the pcifront
627 * driver provides a PCI bus that does the call to do exactly
628 * this in the priv domain. */
629 if (xen_initial_domain() &&
630 HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
631 xen_free_irq(irq);
632 irq = -ENOSPC;
633 goto out;
634 }
635
636 irq_info[irq] = mk_pirq_info(0, pirq, gsi, irq_op.vector);
637 irq_info[irq].u.pirq.flags |= shareable ? PIRQ_SHAREABLE : 0;
638 pirq_to_irq[pirq] = irq;
639
640 out:
641 spin_unlock(&irq_mapping_update_lock);
642
643 return irq;
644 }
645
646 #ifdef CONFIG_PCI_MSI
647 #include <linux/msi.h>
648 #include "../pci/msi.h"
649
650 static int find_unbound_pirq(int type)
651 {
652 int rc, i;
653 struct physdev_get_free_pirq op_get_free_pirq;
654 op_get_free_pirq.type = type;
655
656 rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
657 if (!rc)
658 return op_get_free_pirq.pirq;
659
660 for (i = 0; i < nr_irqs; i++) {
661 if (pirq_to_irq[i] < 0)
662 return i;
663 }
664 return -1;
665 }
666
667 int xen_allocate_pirq_msi(char *name, int *pirq, int alloc_pirq)
668 {
669 int irq;
670
671 spin_lock(&irq_mapping_update_lock);
672
673 irq = xen_allocate_irq_dynamic();
674 if (irq == -1)
675 goto out;
676
677 if (alloc_pirq) {
678 *pirq = find_unbound_pirq(MAP_PIRQ_TYPE_MSI);
679 if (*pirq == -1) {
680 xen_free_irq(irq);
681 irq = -1;
682 goto out;
683 }
684 }
685
686 set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
687 handle_level_irq, name);
688
689 irq_info[irq] = mk_pirq_info(0, *pirq, 0, 0);
690 pirq_to_irq[*pirq] = irq;
691
692 out:
693 spin_unlock(&irq_mapping_update_lock);
694 return irq;
695 }
696
697 int xen_create_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int type)
698 {
699 int irq = -1;
700 struct physdev_map_pirq map_irq;
701 int rc;
702 int pos;
703 u32 table_offset, bir;
704
705 memset(&map_irq, 0, sizeof(map_irq));
706 map_irq.domid = DOMID_SELF;
707 map_irq.type = MAP_PIRQ_TYPE_MSI;
708 map_irq.index = -1;
709 map_irq.pirq = -1;
710 map_irq.bus = dev->bus->number;
711 map_irq.devfn = dev->devfn;
712
713 if (type == PCI_CAP_ID_MSIX) {
714 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
715
716 pci_read_config_dword(dev, msix_table_offset_reg(pos),
717 &table_offset);
718 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
719
720 map_irq.table_base = pci_resource_start(dev, bir);
721 map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
722 }
723
724 spin_lock(&irq_mapping_update_lock);
725
726 irq = xen_allocate_irq_dynamic();
727
728 if (irq == -1)
729 goto out;
730
731 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
732 if (rc) {
733 printk(KERN_WARNING "xen map irq failed %d\n", rc);
734
735 xen_free_irq(irq);
736
737 irq = -1;
738 goto out;
739 }
740 irq_info[irq] = mk_pirq_info(0, map_irq.pirq, 0, map_irq.index);
741
742 set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
743 handle_level_irq,
744 (type == PCI_CAP_ID_MSIX) ? "msi-x":"msi");
745
746 out:
747 spin_unlock(&irq_mapping_update_lock);
748 return irq;
749 }
750 #endif
751
752 int xen_destroy_irq(int irq)
753 {
754 struct irq_desc *desc;
755 struct physdev_unmap_pirq unmap_irq;
756 struct irq_info *info = info_for_irq(irq);
757 int rc = -ENOENT;
758
759 spin_lock(&irq_mapping_update_lock);
760
761 desc = irq_to_desc(irq);
762 if (!desc)
763 goto out;
764
765 if (xen_initial_domain()) {
766 unmap_irq.pirq = info->u.pirq.pirq;
767 unmap_irq.domid = DOMID_SELF;
768 rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
769 if (rc) {
770 printk(KERN_WARNING "unmap irq failed %d\n", rc);
771 goto out;
772 }
773 }
774 pirq_to_irq[info->u.pirq.pirq] = -1;
775
776 irq_info[irq] = mk_unbound_info();
777
778 xen_free_irq(irq);
779
780 out:
781 spin_unlock(&irq_mapping_update_lock);
782 return rc;
783 }
784
785 int xen_vector_from_irq(unsigned irq)
786 {
787 return vector_from_irq(irq);
788 }
789
790 int xen_gsi_from_irq(unsigned irq)
791 {
792 return gsi_from_irq(irq);
793 }
794
795 int xen_irq_from_pirq(unsigned pirq)
796 {
797 return pirq_to_irq[pirq];
798 }
799
800 int bind_evtchn_to_irq(unsigned int evtchn)
801 {
802 int irq;
803
804 spin_lock(&irq_mapping_update_lock);
805
806 irq = evtchn_to_irq[evtchn];
807
808 if (irq == -1) {
809 irq = xen_allocate_irq_dynamic();
810
811 set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
812 handle_fasteoi_irq, "event");
813
814 evtchn_to_irq[evtchn] = irq;
815 irq_info[irq] = mk_evtchn_info(evtchn);
816 }
817
818 spin_unlock(&irq_mapping_update_lock);
819
820 return irq;
821 }
822 EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
823
824 static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
825 {
826 struct evtchn_bind_ipi bind_ipi;
827 int evtchn, irq;
828
829 spin_lock(&irq_mapping_update_lock);
830
831 irq = per_cpu(ipi_to_irq, cpu)[ipi];
832
833 if (irq == -1) {
834 irq = xen_allocate_irq_dynamic();
835 if (irq < 0)
836 goto out;
837
838 set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
839 handle_percpu_irq, "ipi");
840
841 bind_ipi.vcpu = cpu;
842 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
843 &bind_ipi) != 0)
844 BUG();
845 evtchn = bind_ipi.port;
846
847 evtchn_to_irq[evtchn] = irq;
848 irq_info[irq] = mk_ipi_info(evtchn, ipi);
849 per_cpu(ipi_to_irq, cpu)[ipi] = irq;
850
851 bind_evtchn_to_cpu(evtchn, cpu);
852 }
853
854 out:
855 spin_unlock(&irq_mapping_update_lock);
856 return irq;
857 }
858
859
860 int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
861 {
862 struct evtchn_bind_virq bind_virq;
863 int evtchn, irq;
864
865 spin_lock(&irq_mapping_update_lock);
866
867 irq = per_cpu(virq_to_irq, cpu)[virq];
868
869 if (irq == -1) {
870 irq = xen_allocate_irq_dynamic();
871
872 set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
873 handle_percpu_irq, "virq");
874
875 bind_virq.virq = virq;
876 bind_virq.vcpu = cpu;
877 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
878 &bind_virq) != 0)
879 BUG();
880 evtchn = bind_virq.port;
881
882 evtchn_to_irq[evtchn] = irq;
883 irq_info[irq] = mk_virq_info(evtchn, virq);
884
885 per_cpu(virq_to_irq, cpu)[virq] = irq;
886
887 bind_evtchn_to_cpu(evtchn, cpu);
888 }
889
890 spin_unlock(&irq_mapping_update_lock);
891
892 return irq;
893 }
894
895 static void unbind_from_irq(unsigned int irq)
896 {
897 struct evtchn_close close;
898 int evtchn = evtchn_from_irq(irq);
899
900 spin_lock(&irq_mapping_update_lock);
901
902 if (VALID_EVTCHN(evtchn)) {
903 close.port = evtchn;
904 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
905 BUG();
906
907 switch (type_from_irq(irq)) {
908 case IRQT_VIRQ:
909 per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
910 [virq_from_irq(irq)] = -1;
911 break;
912 case IRQT_IPI:
913 per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
914 [ipi_from_irq(irq)] = -1;
915 break;
916 default:
917 break;
918 }
919
920 /* Closed ports are implicitly re-bound to VCPU0. */
921 bind_evtchn_to_cpu(evtchn, 0);
922
923 evtchn_to_irq[evtchn] = -1;
924 }
925
926 if (irq_info[irq].type != IRQT_UNBOUND) {
927 irq_info[irq] = mk_unbound_info();
928
929 xen_free_irq(irq);
930 }
931
932 spin_unlock(&irq_mapping_update_lock);
933 }
934
935 int bind_evtchn_to_irqhandler(unsigned int evtchn,
936 irq_handler_t handler,
937 unsigned long irqflags,
938 const char *devname, void *dev_id)
939 {
940 unsigned int irq;
941 int retval;
942
943 irq = bind_evtchn_to_irq(evtchn);
944 retval = request_irq(irq, handler, irqflags, devname, dev_id);
945 if (retval != 0) {
946 unbind_from_irq(irq);
947 return retval;
948 }
949
950 return irq;
951 }
952 EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
953
954 int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
955 irq_handler_t handler,
956 unsigned long irqflags, const char *devname, void *dev_id)
957 {
958 unsigned int irq;
959 int retval;
960
961 irq = bind_virq_to_irq(virq, cpu);
962 retval = request_irq(irq, handler, irqflags, devname, dev_id);
963 if (retval != 0) {
964 unbind_from_irq(irq);
965 return retval;
966 }
967
968 return irq;
969 }
970 EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
971
972 int bind_ipi_to_irqhandler(enum ipi_vector ipi,
973 unsigned int cpu,
974 irq_handler_t handler,
975 unsigned long irqflags,
976 const char *devname,
977 void *dev_id)
978 {
979 int irq, retval;
980
981 irq = bind_ipi_to_irq(ipi, cpu);
982 if (irq < 0)
983 return irq;
984
985 irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME;
986 retval = request_irq(irq, handler, irqflags, devname, dev_id);
987 if (retval != 0) {
988 unbind_from_irq(irq);
989 return retval;
990 }
991
992 return irq;
993 }
994
995 void unbind_from_irqhandler(unsigned int irq, void *dev_id)
996 {
997 free_irq(irq, dev_id);
998 unbind_from_irq(irq);
999 }
1000 EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
1001
1002 void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
1003 {
1004 int irq = per_cpu(ipi_to_irq, cpu)[vector];
1005 BUG_ON(irq < 0);
1006 notify_remote_via_irq(irq);
1007 }
1008
1009 irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
1010 {
1011 struct shared_info *sh = HYPERVISOR_shared_info;
1012 int cpu = smp_processor_id();
1013 unsigned long *cpu_evtchn = cpu_evtchn_mask(cpu);
1014 int i;
1015 unsigned long flags;
1016 static DEFINE_SPINLOCK(debug_lock);
1017 struct vcpu_info *v;
1018
1019 spin_lock_irqsave(&debug_lock, flags);
1020
1021 printk("\nvcpu %d\n ", cpu);
1022
1023 for_each_online_cpu(i) {
1024 int pending;
1025 v = per_cpu(xen_vcpu, i);
1026 pending = (get_irq_regs() && i == cpu)
1027 ? xen_irqs_disabled(get_irq_regs())
1028 : v->evtchn_upcall_mask;
1029 printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
1030 pending, v->evtchn_upcall_pending,
1031 (int)(sizeof(v->evtchn_pending_sel)*2),
1032 v->evtchn_pending_sel);
1033 }
1034 v = per_cpu(xen_vcpu, cpu);
1035
1036 printk("\npending:\n ");
1037 for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
1038 printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
1039 sh->evtchn_pending[i],
1040 i % 8 == 0 ? "\n " : " ");
1041 printk("\nglobal mask:\n ");
1042 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
1043 printk("%0*lx%s",
1044 (int)(sizeof(sh->evtchn_mask[0])*2),
1045 sh->evtchn_mask[i],
1046 i % 8 == 0 ? "\n " : " ");
1047
1048 printk("\nglobally unmasked:\n ");
1049 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
1050 printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
1051 sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
1052 i % 8 == 0 ? "\n " : " ");
1053
1054 printk("\nlocal cpu%d mask:\n ", cpu);
1055 for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
1056 printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
1057 cpu_evtchn[i],
1058 i % 8 == 0 ? "\n " : " ");
1059
1060 printk("\nlocally unmasked:\n ");
1061 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
1062 unsigned long pending = sh->evtchn_pending[i]
1063 & ~sh->evtchn_mask[i]
1064 & cpu_evtchn[i];
1065 printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
1066 pending, i % 8 == 0 ? "\n " : " ");
1067 }
1068
1069 printk("\npending list:\n");
1070 for (i = 0; i < NR_EVENT_CHANNELS; i++) {
1071 if (sync_test_bit(i, sh->evtchn_pending)) {
1072 int word_idx = i / BITS_PER_LONG;
1073 printk(" %d: event %d -> irq %d%s%s%s\n",
1074 cpu_from_evtchn(i), i,
1075 evtchn_to_irq[i],
1076 sync_test_bit(word_idx, &v->evtchn_pending_sel)
1077 ? "" : " l2-clear",
1078 !sync_test_bit(i, sh->evtchn_mask)
1079 ? "" : " globally-masked",
1080 sync_test_bit(i, cpu_evtchn)
1081 ? "" : " locally-masked");
1082 }
1083 }
1084
1085 spin_unlock_irqrestore(&debug_lock, flags);
1086
1087 return IRQ_HANDLED;
1088 }
1089
1090 static DEFINE_PER_CPU(unsigned, xed_nesting_count);
1091
1092 /*
1093 * Search the CPUs pending events bitmasks. For each one found, map
1094 * the event number to an irq, and feed it into do_IRQ() for
1095 * handling.
1096 *
1097 * Xen uses a two-level bitmap to speed searching. The first level is
1098 * a bitset of words which contain pending event bits. The second
1099 * level is a bitset of pending events themselves.
1100 */
1101 static void __xen_evtchn_do_upcall(void)
1102 {
1103 int cpu = get_cpu();
1104 struct shared_info *s = HYPERVISOR_shared_info;
1105 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
1106 unsigned count;
1107
1108 do {
1109 unsigned long pending_words;
1110
1111 vcpu_info->evtchn_upcall_pending = 0;
1112
1113 if (__this_cpu_inc_return(xed_nesting_count) - 1)
1114 goto out;
1115
1116 #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
1117 /* Clear master flag /before/ clearing selector flag. */
1118 wmb();
1119 #endif
1120 pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
1121 while (pending_words != 0) {
1122 unsigned long pending_bits;
1123 int word_idx = __ffs(pending_words);
1124 pending_words &= ~(1UL << word_idx);
1125
1126 while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
1127 int bit_idx = __ffs(pending_bits);
1128 int port = (word_idx * BITS_PER_LONG) + bit_idx;
1129 int irq = evtchn_to_irq[port];
1130 struct irq_desc *desc;
1131
1132 mask_evtchn(port);
1133 clear_evtchn(port);
1134
1135 if (irq != -1) {
1136 desc = irq_to_desc(irq);
1137 if (desc)
1138 generic_handle_irq_desc(irq, desc);
1139 }
1140 }
1141 }
1142
1143 BUG_ON(!irqs_disabled());
1144
1145 count = __this_cpu_read(xed_nesting_count);
1146 __this_cpu_write(xed_nesting_count, 0);
1147 } while (count != 1 || vcpu_info->evtchn_upcall_pending);
1148
1149 out:
1150
1151 put_cpu();
1152 }
1153
1154 void xen_evtchn_do_upcall(struct pt_regs *regs)
1155 {
1156 struct pt_regs *old_regs = set_irq_regs(regs);
1157
1158 exit_idle();
1159 irq_enter();
1160
1161 __xen_evtchn_do_upcall();
1162
1163 irq_exit();
1164 set_irq_regs(old_regs);
1165 }
1166
1167 void xen_hvm_evtchn_do_upcall(void)
1168 {
1169 __xen_evtchn_do_upcall();
1170 }
1171 EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
1172
1173 /* Rebind a new event channel to an existing irq. */
1174 void rebind_evtchn_irq(int evtchn, int irq)
1175 {
1176 struct irq_info *info = info_for_irq(irq);
1177
1178 /* Make sure the irq is masked, since the new event channel
1179 will also be masked. */
1180 disable_irq(irq);
1181
1182 spin_lock(&irq_mapping_update_lock);
1183
1184 /* After resume the irq<->evtchn mappings are all cleared out */
1185 BUG_ON(evtchn_to_irq[evtchn] != -1);
1186 /* Expect irq to have been bound before,
1187 so there should be a proper type */
1188 BUG_ON(info->type == IRQT_UNBOUND);
1189
1190 evtchn_to_irq[evtchn] = irq;
1191 irq_info[irq] = mk_evtchn_info(evtchn);
1192
1193 spin_unlock(&irq_mapping_update_lock);
1194
1195 /* new event channels are always bound to cpu 0 */
1196 irq_set_affinity(irq, cpumask_of(0));
1197
1198 /* Unmask the event channel. */
1199 enable_irq(irq);
1200 }
1201
1202 /* Rebind an evtchn so that it gets delivered to a specific cpu */
1203 static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
1204 {
1205 struct evtchn_bind_vcpu bind_vcpu;
1206 int evtchn = evtchn_from_irq(irq);
1207
1208 /* events delivered via platform PCI interrupts are always
1209 * routed to vcpu 0 */
1210 if (!VALID_EVTCHN(evtchn) ||
1211 (xen_hvm_domain() && !xen_have_vector_callback))
1212 return -1;
1213
1214 /* Send future instances of this interrupt to other vcpu. */
1215 bind_vcpu.port = evtchn;
1216 bind_vcpu.vcpu = tcpu;
1217
1218 /*
1219 * If this fails, it usually just indicates that we're dealing with a
1220 * virq or IPI channel, which don't actually need to be rebound. Ignore
1221 * it, but don't do the xenlinux-level rebind in that case.
1222 */
1223 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
1224 bind_evtchn_to_cpu(evtchn, tcpu);
1225
1226 return 0;
1227 }
1228
1229 static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
1230 bool force)
1231 {
1232 unsigned tcpu = cpumask_first(dest);
1233
1234 return rebind_irq_to_cpu(data->irq, tcpu);
1235 }
1236
1237 int resend_irq_on_evtchn(unsigned int irq)
1238 {
1239 int masked, evtchn = evtchn_from_irq(irq);
1240 struct shared_info *s = HYPERVISOR_shared_info;
1241
1242 if (!VALID_EVTCHN(evtchn))
1243 return 1;
1244
1245 masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
1246 sync_set_bit(evtchn, s->evtchn_pending);
1247 if (!masked)
1248 unmask_evtchn(evtchn);
1249
1250 return 1;
1251 }
1252
1253 static void enable_dynirq(struct irq_data *data)
1254 {
1255 int evtchn = evtchn_from_irq(data->irq);
1256
1257 if (VALID_EVTCHN(evtchn))
1258 unmask_evtchn(evtchn);
1259 }
1260
1261 static void disable_dynirq(struct irq_data *data)
1262 {
1263 int evtchn = evtchn_from_irq(data->irq);
1264
1265 if (VALID_EVTCHN(evtchn))
1266 mask_evtchn(evtchn);
1267 }
1268
1269 static void ack_dynirq(struct irq_data *data)
1270 {
1271 int evtchn = evtchn_from_irq(data->irq);
1272
1273 move_masked_irq(data->irq);
1274
1275 if (VALID_EVTCHN(evtchn))
1276 unmask_evtchn(evtchn);
1277 }
1278
1279 static int retrigger_dynirq(struct irq_data *data)
1280 {
1281 int evtchn = evtchn_from_irq(data->irq);
1282 struct shared_info *sh = HYPERVISOR_shared_info;
1283 int ret = 0;
1284
1285 if (VALID_EVTCHN(evtchn)) {
1286 int masked;
1287
1288 masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
1289 sync_set_bit(evtchn, sh->evtchn_pending);
1290 if (!masked)
1291 unmask_evtchn(evtchn);
1292 ret = 1;
1293 }
1294
1295 return ret;
1296 }
1297
1298 static void restore_cpu_pirqs(void)
1299 {
1300 int pirq, rc, irq, gsi;
1301 struct physdev_map_pirq map_irq;
1302
1303 for (pirq = 0; pirq < nr_irqs; pirq++) {
1304 irq = pirq_to_irq[pirq];
1305 if (irq == -1)
1306 continue;
1307
1308 /* save/restore of PT devices doesn't work, so at this point the
1309 * only devices present are GSI based emulated devices */
1310 gsi = gsi_from_irq(irq);
1311 if (!gsi)
1312 continue;
1313
1314 map_irq.domid = DOMID_SELF;
1315 map_irq.type = MAP_PIRQ_TYPE_GSI;
1316 map_irq.index = gsi;
1317 map_irq.pirq = pirq;
1318
1319 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
1320 if (rc) {
1321 printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
1322 gsi, irq, pirq, rc);
1323 irq_info[irq] = mk_unbound_info();
1324 pirq_to_irq[pirq] = -1;
1325 continue;
1326 }
1327
1328 printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
1329
1330 __startup_pirq(irq);
1331 }
1332 }
1333
1334 static void restore_cpu_virqs(unsigned int cpu)
1335 {
1336 struct evtchn_bind_virq bind_virq;
1337 int virq, irq, evtchn;
1338
1339 for (virq = 0; virq < NR_VIRQS; virq++) {
1340 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
1341 continue;
1342
1343 BUG_ON(virq_from_irq(irq) != virq);
1344
1345 /* Get a new binding from Xen. */
1346 bind_virq.virq = virq;
1347 bind_virq.vcpu = cpu;
1348 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
1349 &bind_virq) != 0)
1350 BUG();
1351 evtchn = bind_virq.port;
1352
1353 /* Record the new mapping. */
1354 evtchn_to_irq[evtchn] = irq;
1355 irq_info[irq] = mk_virq_info(evtchn, virq);
1356 bind_evtchn_to_cpu(evtchn, cpu);
1357 }
1358 }
1359
1360 static void restore_cpu_ipis(unsigned int cpu)
1361 {
1362 struct evtchn_bind_ipi bind_ipi;
1363 int ipi, irq, evtchn;
1364
1365 for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
1366 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
1367 continue;
1368
1369 BUG_ON(ipi_from_irq(irq) != ipi);
1370
1371 /* Get a new binding from Xen. */
1372 bind_ipi.vcpu = cpu;
1373 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
1374 &bind_ipi) != 0)
1375 BUG();
1376 evtchn = bind_ipi.port;
1377
1378 /* Record the new mapping. */
1379 evtchn_to_irq[evtchn] = irq;
1380 irq_info[irq] = mk_ipi_info(evtchn, ipi);
1381 bind_evtchn_to_cpu(evtchn, cpu);
1382 }
1383 }
1384
1385 /* Clear an irq's pending state, in preparation for polling on it */
1386 void xen_clear_irq_pending(int irq)
1387 {
1388 int evtchn = evtchn_from_irq(irq);
1389
1390 if (VALID_EVTCHN(evtchn))
1391 clear_evtchn(evtchn);
1392 }
1393 EXPORT_SYMBOL(xen_clear_irq_pending);
1394 void xen_set_irq_pending(int irq)
1395 {
1396 int evtchn = evtchn_from_irq(irq);
1397
1398 if (VALID_EVTCHN(evtchn))
1399 set_evtchn(evtchn);
1400 }
1401
1402 bool xen_test_irq_pending(int irq)
1403 {
1404 int evtchn = evtchn_from_irq(irq);
1405 bool ret = false;
1406
1407 if (VALID_EVTCHN(evtchn))
1408 ret = test_evtchn(evtchn);
1409
1410 return ret;
1411 }
1412
1413 /* Poll waiting for an irq to become pending with timeout. In the usual case,
1414 * the irq will be disabled so it won't deliver an interrupt. */
1415 void xen_poll_irq_timeout(int irq, u64 timeout)
1416 {
1417 evtchn_port_t evtchn = evtchn_from_irq(irq);
1418
1419 if (VALID_EVTCHN(evtchn)) {
1420 struct sched_poll poll;
1421
1422 poll.nr_ports = 1;
1423 poll.timeout = timeout;
1424 set_xen_guest_handle(poll.ports, &evtchn);
1425
1426 if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
1427 BUG();
1428 }
1429 }
1430 EXPORT_SYMBOL(xen_poll_irq_timeout);
1431 /* Poll waiting for an irq to become pending. In the usual case, the
1432 * irq will be disabled so it won't deliver an interrupt. */
1433 void xen_poll_irq(int irq)
1434 {
1435 xen_poll_irq_timeout(irq, 0 /* no timeout */);
1436 }
1437
1438 void xen_irq_resume(void)
1439 {
1440 unsigned int cpu, irq, evtchn;
1441
1442 init_evtchn_cpu_bindings();
1443
1444 /* New event-channel space is not 'live' yet. */
1445 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
1446 mask_evtchn(evtchn);
1447
1448 /* No IRQ <-> event-channel mappings. */
1449 for (irq = 0; irq < nr_irqs; irq++)
1450 irq_info[irq].evtchn = 0; /* zap event-channel binding */
1451
1452 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
1453 evtchn_to_irq[evtchn] = -1;
1454
1455 for_each_possible_cpu(cpu) {
1456 restore_cpu_virqs(cpu);
1457 restore_cpu_ipis(cpu);
1458 }
1459
1460 restore_cpu_pirqs();
1461 }
1462
1463 static struct irq_chip xen_dynamic_chip __read_mostly = {
1464 .name = "xen-dyn",
1465
1466 .irq_disable = disable_dynirq,
1467 .irq_mask = disable_dynirq,
1468 .irq_unmask = enable_dynirq,
1469
1470 .irq_eoi = ack_dynirq,
1471 .irq_set_affinity = set_affinity_irq,
1472 .irq_retrigger = retrigger_dynirq,
1473 };
1474
1475 static struct irq_chip xen_pirq_chip __read_mostly = {
1476 .name = "xen-pirq",
1477
1478 .irq_startup = startup_pirq,
1479 .irq_shutdown = shutdown_pirq,
1480
1481 .irq_enable = enable_pirq,
1482 .irq_unmask = enable_pirq,
1483
1484 .irq_disable = disable_pirq,
1485 .irq_mask = disable_pirq,
1486
1487 .irq_ack = ack_pirq,
1488
1489 .irq_set_affinity = set_affinity_irq,
1490
1491 .irq_retrigger = retrigger_dynirq,
1492 };
1493
1494 static struct irq_chip xen_percpu_chip __read_mostly = {
1495 .name = "xen-percpu",
1496
1497 .irq_disable = disable_dynirq,
1498 .irq_mask = disable_dynirq,
1499 .irq_unmask = enable_dynirq,
1500
1501 .irq_ack = ack_dynirq,
1502 };
1503
1504 int xen_set_callback_via(uint64_t via)
1505 {
1506 struct xen_hvm_param a;
1507 a.domid = DOMID_SELF;
1508 a.index = HVM_PARAM_CALLBACK_IRQ;
1509 a.value = via;
1510 return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
1511 }
1512 EXPORT_SYMBOL_GPL(xen_set_callback_via);
1513
1514 #ifdef CONFIG_XEN_PVHVM
1515 /* Vector callbacks are better than PCI interrupts to receive event
1516 * channel notifications because we can receive vector callbacks on any
1517 * vcpu and we don't need PCI support or APIC interactions. */
1518 void xen_callback_vector(void)
1519 {
1520 int rc;
1521 uint64_t callback_via;
1522 if (xen_have_vector_callback) {
1523 callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
1524 rc = xen_set_callback_via(callback_via);
1525 if (rc) {
1526 printk(KERN_ERR "Request for Xen HVM callback vector"
1527 " failed.\n");
1528 xen_have_vector_callback = 0;
1529 return;
1530 }
1531 printk(KERN_INFO "Xen HVM callback vector for event delivery is "
1532 "enabled\n");
1533 /* in the restore case the vector has already been allocated */
1534 if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
1535 alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
1536 }
1537 }
1538 #else
1539 void xen_callback_vector(void) {}
1540 #endif
1541
1542 void __init xen_init_IRQ(void)
1543 {
1544 int i;
1545
1546 cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
1547 GFP_KERNEL);
1548 irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
1549
1550 /* We are using nr_irqs as the maximum number of pirq available but
1551 * that number is actually chosen by Xen and we don't know exactly
1552 * what it is. Be careful choosing high pirq numbers. */
1553 pirq_to_irq = kcalloc(nr_irqs, sizeof(*pirq_to_irq), GFP_KERNEL);
1554 for (i = 0; i < nr_irqs; i++)
1555 pirq_to_irq[i] = -1;
1556
1557 evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
1558 GFP_KERNEL);
1559 for (i = 0; i < NR_EVENT_CHANNELS; i++)
1560 evtchn_to_irq[i] = -1;
1561
1562 init_evtchn_cpu_bindings();
1563
1564 /* No event channels are 'live' right now. */
1565 for (i = 0; i < NR_EVENT_CHANNELS; i++)
1566 mask_evtchn(i);
1567
1568 if (xen_hvm_domain()) {
1569 xen_callback_vector();
1570 native_init_IRQ();
1571 /* pci_xen_hvm_init must be called after native_init_IRQ so that
1572 * __acpi_register_gsi can point at the right function */
1573 pci_xen_hvm_init();
1574 } else {
1575 irq_ctx_init(smp_processor_id());
1576 if (xen_initial_domain())
1577 xen_setup_pirqs();
1578 }
1579 }
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