* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if G10
[deliverable/binutils-gdb.git] / gas / ChangeLog
1 2013-08-09 Nick Clifton <nickc@redhat.com>
2
3 * config/tc-rl78.c (elf_flags): New variable.
4 (enum options): Add OPTION_G10.
5 (md_longopts): Add mg10.
6 (md_parse_option): Parse -mg10.
7 (rl78_elf_final_processing): New function.
8 * config/tc-rl78.c (tc_final_processing): Define.
9 * doc/c-rl78.texi: Document -mg10 option.
10
11 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
12
13 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
14 suffixes to be elided too.
15 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
16 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
17 to be omitted too.
18
19 2013-08-05 John Tytgat <john@bass-software.com>
20
21 * po/POTFILES.in: Regenerate.
22
23 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
24 Konrad Eisele <konrad@gaisler.com>
25
26 * config/tc-sparc.c (sparc_arch_types): Add leon.
27 (sparc_arch): Move sparc4 around and add leon.
28 (sparc_target_format): Document -Aleon.
29 * doc/c-sparc.texi: Likewise.
30
31 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
32
33 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
34
35 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
36 Richard Sandiford <rdsandiford@googlemail.com>
37
38 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
39 (RWARN): Bump to 0x8000000.
40 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
41 (RTYPE_R5900_ACC): New register types.
42 (RTYPE_MASK): Include them.
43 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
44 macros.
45 (reg_names): Include them.
46 (mips_parse_register_1): New function, split out from...
47 (mips_parse_register): ...here. Add a channels_ptr parameter.
48 Look for VU0 channel suffixes when nonnull.
49 (reg_lookup): Update the call to mips_parse_register.
50 (mips_parse_vu0_channels): New function.
51 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
52 (mips_operand_token): Add a "channels" field to the union.
53 Extend the comment above "ch" to OT_DOUBLE_CHAR.
54 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
55 (mips_parse_argument_token): Handle channel suffixes here too.
56 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
57 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
58 Handle '#' formats.
59 (md_begin): Register $vfN and $vfI registers.
60 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
61 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
62 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
63 (match_vu0_suffix_operand): New function.
64 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
65 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
66 (mips_lookup_insn): New function.
67 (mips_ip): Use it. Allow "+K" operands to be elided at the end
68 of an instruction. Handle '#' sequences.
69
70 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
71
72 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
73 values and use it instead of sreg, treg, xreg, etc.
74
75 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
76
77 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
78 and mips_int_operand_max.
79 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
80 Delete.
81 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
82 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
83 instead of mips16_immed_operand.
84
85 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
86
87 * config/tc-mips.c (mips16_macro): Don't use move_register.
88 (mips16_ip): Allow macros to use 'p'.
89
90 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
91
92 * config/tc-mips.c (MAX_OPERANDS): New macro.
93 (mips_operand_array): New structure.
94 (mips_operands, mips16_operands, micromips_operands): New arrays.
95 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
96 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
97 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
98 (micromips_to_32_reg_q_map): Delete.
99 (insn_operands, insn_opno, insn_extract_operand): New functions.
100 (validate_mips_insn): Take a mips_operand_array as argument and
101 use it to build up a list of operands. Extend to handle INSN_MACRO
102 and MIPS16.
103 (validate_mips16_insn): New function.
104 (validate_micromips_insn): Take a mips_operand_array as argument.
105 Handle INSN_MACRO.
106 (md_begin): Initialize mips_operands, mips16_operands and
107 micromips_operands. Call validate_mips_insn and
108 validate_micromips_insn for macro instructions too.
109 Call validate_mips16_insn for MIPS16 instructions.
110 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
111 New functions.
112 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
113 them. Handle INSN_UDI.
114 (get_append_method): Use gpr_read_mask.
115
116 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
117
118 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
119 flags for MIPS16 and non-MIPS16 instructions.
120 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
121 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
122 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
123 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
124 and non-MIPS16 instructions. Fix formatting.
125
126 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
127
128 * config/tc-mips.c (reg_needs_delay): Move later in file.
129 Use gpr_write_mask.
130 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
131
132 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
133 Alexander Ivchenko <alexander.ivchenko@intel.com>
134 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
135 Sergey Lega <sergey.s.lega@intel.com>
136 Anna Tikhonova <anna.tikhonova@intel.com>
137 Ilya Tocar <ilya.tocar@intel.com>
138 Andrey Turetskiy <andrey.turetskiy@intel.com>
139 Ilya Verbin <ilya.verbin@intel.com>
140 Kirill Yukhin <kirill.yukhin@intel.com>
141 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
142
143 * config/tc-i386-intel.c (O_zmmword_ptr): New.
144 (i386_types): Add zmmword.
145 (i386_intel_simplify_register): Allow regzmm.
146 (i386_intel_simplify): Handle zmmwords.
147 (i386_intel_operand): Handle RC/SAE, vector operations and
148 zmmwords.
149 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
150 (struct RC_Operation): New.
151 (struct Mask_Operation): New.
152 (struct Broadcast_Operation): New.
153 (vex_prefix): Size of bytes increased to 4 to support EVEX
154 encoding.
155 (enum i386_error): Add new error codes: unsupported_broadcast,
156 broadcast_not_on_src_operand, broadcast_needed,
157 unsupported_masking, mask_not_on_destination, no_default_mask,
158 unsupported_rc_sae, rc_sae_operand_not_last_imm,
159 invalid_register_operand, try_vector_disp8.
160 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
161 rounding, broadcast, memshift.
162 (struct RC_name): New.
163 (RC_NamesTable): New.
164 (evexlig): New.
165 (evexwig): New.
166 (extra_symbol_chars): Add '{'.
167 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
168 (i386_operand_type): Add regzmm, regmask and vec_disp8.
169 (match_mem_size): Handle zmmwords.
170 (operand_type_match): Handle zmm-registers.
171 (mode_from_disp_size): Handle vec_disp8.
172 (fits_in_vec_disp8): New.
173 (md_begin): Handle {} properly.
174 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
175 (build_vex_prefix): Handle vrex.
176 (build_evex_prefix): New.
177 (process_immext): Adjust to properly handle EVEX.
178 (md_assemble): Add EVEX encoding support.
179 (swap_2_operands): Correctly handle operands with masking,
180 broadcasting or RC/SAE.
181 (check_VecOperands): Support EVEX features.
182 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
183 (match_template): Support regzmm and handle new error codes.
184 (process_suffix): Handle zmmwords and zmm-registers.
185 (check_byte_reg): Extend to zmm-registers.
186 (process_operands): Extend to zmm-registers.
187 (build_modrm_byte): Handle EVEX.
188 (output_insn): Adjust to properly handle EVEX case.
189 (disp_size): Handle vec_disp8.
190 (output_disp): Support compressed disp8*N evex feature.
191 (output_imm): Handle RC/SAE immediates properly.
192 (check_VecOperations): New.
193 (i386_immediate): Handle EVEX features.
194 (i386_index_check): Handle zmmwords and zmm-registers.
195 (RC_SAE_immediate): New.
196 (i386_att_operand): Handle EVEX features.
197 (parse_real_register): Add a check for ZMM/Mask registers.
198 (OPTION_MEVEXLIG): New.
199 (OPTION_MEVEXWIG): New.
200 (md_longopts): Add mevexlig and mevexwig.
201 (md_parse_option): Handle mevexlig and mevexwig options.
202 (md_show_usage): Add description for mevexlig and mevexwig.
203 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
204 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
205
206 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
207
208 * config/tc-i386.c (cpu_arch): Add .sha.
209 * doc/c-i386.texi: Document sha/.sha.
210
211 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
212 Kirill Yukhin <kirill.yukhin@intel.com>
213 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
214
215 * config/tc-i386.c (BND_PREFIX): New.
216 (struct _i386_insn): Add new field bnd_prefix.
217 (add_bnd_prefix): New.
218 (cpu_arch): Add MPX.
219 (i386_operand_type): Add regbnd.
220 (md_assemble): Handle BND prefixes.
221 (parse_insn): Likewise.
222 (output_branch): Likewise.
223 (output_jump): Likewise.
224 (build_modrm_byte): Handle regbnd.
225 (OPTION_MADD_BND_PREFIX): New.
226 (md_longopts): Add entry for 'madd-bnd-prefix'.
227 (md_parse_option): Handle madd-bnd-prefix option.
228 (md_show_usage): Add description for madd-bnd-prefix
229 option.
230 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
231
232 2013-07-24 Tristan Gingold <gingold@adacore.com>
233
234 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
235 xcoff targets.
236
237 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
238
239 * config/tc-s390.c (s390_machine): Don't force the .machine
240 argument to lower case.
241
242 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
243
244 * config/tc-arm.c (s_arm_arch_extension): Improve error message
245 for invalid extension.
246
247 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
248
249 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
250 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
251 (aarch64_abi): New variable.
252 (ilp32_p): Change to be a macro.
253 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
254 (struct aarch64_option_abi_value_table): New struct.
255 (aarch64_abis): New table.
256 (aarch64_parse_abi): New function.
257 (aarch64_long_opts): Add entry for -mabi=.
258 * doc/as.texinfo (Target AArch64 options): Document -mabi.
259 * doc/c-aarch64.texi: Likewise.
260
261 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
262
263 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
264 unsigned comparison.
265
266 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
267
268 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
269 RX610.
270 * config/rx-parse.y: (rx_check_float_support): Add function to
271 check floating point operation support for target RX100 and
272 RX200.
273 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
274 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
275 RX200, RX600, and RX610
276
277 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
278
279 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
280
281 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
282
283 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
284 * doc/c-avr.texi: Likewise.
285
286 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
287
288 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
289 error with older GCCs.
290 (mips16_macro_build): Dereference args.
291
292 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
293
294 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
295 New functions, split out from...
296 (reg_lookup): ...here. Remove itbl support.
297 (reglist_lookup): Delete.
298 (mips_operand_token_type): New enum.
299 (mips_operand_token): New structure.
300 (mips_operand_tokens): New variable.
301 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
302 (mips_parse_arguments): New functions.
303 (md_begin): Initialize mips_operand_tokens.
304 (mips_arg_info): Add a token field. Remove optional_reg field.
305 (match_char, match_expression): New functions.
306 (match_const_int): Use match_expression. Remove "s" argument
307 and return a boolean result. Remove O_register handling.
308 (match_regno, match_reg, match_reg_range): New functions.
309 (match_int_operand, match_mapped_int_operand, match_msb_operand)
310 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
311 (match_addiusp_operand, match_clo_clz_dest_operand)
312 (match_lwm_swm_list_operand, match_entry_exit_operand)
313 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
314 (match_tied_reg_operand): Remove "s" argument and return a boolean
315 result. Match tokens rather than text. Update calls to
316 match_const_int. Rely on match_regno to call check_regno.
317 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
318 "arg" argument. Return a boolean result.
319 (parse_float_constant): Replace with...
320 (match_float_constant): ...this new function.
321 (match_operand): Remove "s" argument and return a boolean result.
322 Update calls to subfunctions.
323 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
324 rather than string-parsing routines. Update handling of optional
325 registers for token scheme.
326
327 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
328
329 * config/tc-mips.c (parse_float_constant): Split out from...
330 (mips_ip): ...here.
331
332 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
333
334 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
335 Delete.
336
337 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
338
339 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
340 (match_entry_exit_operand): New function.
341 (match_save_restore_list_operand): Likewise.
342 (match_operand): Use them.
343 (check_absolute_expr): Delete.
344 (mips16_ip): Rewrite main parsing loop to use mips_operands.
345
346 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
347
348 * config/tc-mips.c: Enable functions commented out in previous patch.
349 (SKIP_SPACE_TABS): Move further up file.
350 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
351 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
352 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
353 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
354 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
355 (micromips_imm_b_map, micromips_imm_c_map): Delete.
356 (mips_lookup_reg_pair): Delete.
357 (macro): Use report_bad_range and report_bad_field.
358 (mips_immed, expr_const_in_range): Delete.
359 (mips_ip): Rewrite main parsing loop to use new functions.
360
361 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
362
363 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
364 Change return type to bfd_boolean.
365 (report_bad_range, report_bad_field): New functions.
366 (mips_arg_info): New structure.
367 (match_const_int, convert_reg_type, check_regno, match_int_operand)
368 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
369 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
370 (match_addiusp_operand, match_clo_clz_dest_operand)
371 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
372 (match_pc_operand, match_tied_reg_operand, match_operand)
373 (check_completed_insn): New functions, commented out for now.
374
375 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
376
377 * config/tc-mips.c (insn_insert_operand): New function.
378 (macro_build, mips16_macro_build): Put null character check
379 in the for loop and convert continues to breaks. Use operand
380 structures to handle constant operands.
381
382 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
383
384 * config/tc-mips.c (validate_mips_insn): Move further up file.
385 Add insn_bits and decode_operand arguments. Use the mips_operand
386 fields to work out which bits an operand occupies. Detect double
387 definitions.
388 (validate_micromips_insn): Move further up file. Call into
389 validate_mips_insn.
390
391 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
392
393 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
394
395 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
396
397 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
398 and "~".
399 (macro): Update accordingly.
400
401 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
402
403 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
404 (imm_reloc): Delete.
405 (md_assemble): Remove imm_reloc handling.
406 (mips_ip): Update commentary. Use offset_expr and offset_reloc
407 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
408 Use a temporary array rather than imm_reloc when parsing
409 constant expressions. Remove imm_reloc initialization.
410 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
411 for the relaxable field. Use a relax_char variable to track the
412 type of this field. Remove imm_reloc initialization.
413
414 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
415
416 * config/tc-mips.c (mips16_ip): Handle "I".
417
418 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
419
420 * config/tc-mips.c (mips_flag_nan2008): New variable.
421 (options): Add OPTION_NAN enum value.
422 (md_longopts): Handle it.
423 (md_parse_option): Likewise.
424 (s_nan): New function.
425 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
426 (md_show_usage): Add -mnan.
427
428 * doc/as.texinfo (Overview): Add -mnan.
429 * doc/c-mips.texi (MIPS Opts): Document -mnan.
430 (MIPS NaN Encodings): New node. Document .nan directive.
431 (MIPS-Dependent): List the new node.
432
433 2013-07-09 Tristan Gingold <gingold@adacore.com>
434
435 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
436
437 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
438
439 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
440 for 'A' and assume that the constant has been elided if the result
441 is an O_register.
442
443 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
444
445 * config/tc-mips.c (gprel16_reloc_p): New function.
446 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
447 BFD_RELOC_UNUSED.
448 (offset_high_part, small_offset_p): New functions.
449 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
450 register load and store macros, handle the 16-bit offset case first.
451 If a 16-bit offset is not suitable for the instruction we're
452 generating, load it into the temporary register using
453 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
454 M_L_DAB code once the address has been constructed. For double load
455 and store macros, again handle the 16-bit offset case first.
456 If the second register cannot be accessed from the same high
457 part as the first, load it into AT using ADDRESS_ADDI_INSN.
458 Fix the handling of LD in cases where the first register is the
459 same as the base. Also handle the case where the offset is
460 not 16 bits and the second register cannot be accessed from the
461 same high part as the first. For unaligned loads and stores,
462 fuse the offbits == 12 and old "ab" handling. Apply this handling
463 whenever the second offset needs a different high part from the first.
464 Construct the offset using ADDRESS_ADDI_INSN where possible,
465 for offbits == 16 as well as offbits == 12. Use offset_reloc
466 when constructing the individual loads and stores.
467 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
468 and offset_reloc before matching against a particular opcode.
469 Handle elided 'A' constants. Allow 'A' constants to use
470 relocation operators.
471
472 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
473
474 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
475 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
476 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
477
478 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
479
480 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
481 Require the msb to be <= 31 for "+s". Check that the size is <= 31
482 for both "+s" and "+S".
483
484 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
485
486 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
487 (mips_ip, mips16_ip): Handle "+i".
488
489 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
490
491 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
492 (micromips_to_32_reg_h_map): Rename to...
493 (micromips_to_32_reg_h_map1): ...this.
494 (micromips_to_32_reg_i_map): Rename to...
495 (micromips_to_32_reg_h_map2): ...this.
496 (mips_lookup_reg_pair): New function.
497 (gpr_write_mask, macro): Adjust after above renaming.
498 (validate_micromips_insn): Remove "mi" handling.
499 (mips_ip): Likewise. Parse both registers in a pair for "mh".
500
501 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
502
503 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
504 (mips_ip): Remove "+D" and "+T" handling.
505
506 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
507
508 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
509 relocs.
510
511 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
512
513 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
514
515 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
516
517 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
518 (aarch64_force_relocation): Likewise.
519
520 2013-07-02 Alan Modra <amodra@gmail.com>
521
522 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
523
524 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
525
526 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
527 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
528 Replace @sc{mips16} with literal `MIPS16'.
529 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
530
531 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
532
533 * config/tc-aarch64.c (reloc_table): Replace
534 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
535 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
536 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
537 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
538 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
539 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
540 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
541 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
542 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
543 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
544 (aarch64_force_relocation): Likewise.
545
546 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
547
548 * config/tc-aarch64.c (ilp32_p): New static variable.
549 (elf64_aarch64_target_format): Return the target according to the
550 value of 'ilp32_p'.
551 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
552 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
553 (aarch64_dwarf2_addr_size): New function.
554 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
555 (DWARF2_ADDR_SIZE): New define.
556
557 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
558
559 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
560
561 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
562
563 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
564
565 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
566
567 * config/tc-mips.c (mips_set_options): Add insn32 member.
568 (mips_opts): Initialize it.
569 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
570 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
571 (md_longopts): Add "minsn32" and "mno-insn32" options.
572 (is_size_valid): Handle insn32 mode.
573 (md_assemble): Pass instruction string down to macro.
574 (brk_fmt): Add second dimension and insn32 mode initializers.
575 (mfhl_fmt): Likewise.
576 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
577 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
578 (macro_build_jalr, move_register): Handle insn32 mode.
579 (macro_build_branch_rs): Likewise.
580 (macro): Handle insn32 mode.
581 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
582 (mips_ip): Handle insn32 mode.
583 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
584 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
585 (mips_handle_align): Handle insn32 mode.
586 (md_show_usage): Add -minsn32 and -mno-insn32.
587
588 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
589 -mno-insn32 options.
590 (-minsn32, -mno-insn32): New options.
591 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
592 options.
593 (MIPS assembly options): New node. Document .set insn32 and
594 .set noinsn32.
595 (MIPS-Dependent): List the new node.
596
597 2013-06-25 Nick Clifton <nickc@redhat.com>
598
599 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
600 the PC in indirect addressing on 430xv2 parts.
601 (msp430_operands): Add version test to hardware bug encoding
602 restrictions.
603
604 2013-06-24 Roland McGrath <mcgrathr@google.com>
605
606 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
607 so it skips whitespace before it.
608 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
609
610 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
611 (arm_reg_parse_multi): Skip whitespace first.
612 (parse_reg_list): Likewise.
613 (parse_vfp_reg_list): Likewise.
614 (s_arm_unwind_save_mmxwcg): Likewise.
615
616 2013-06-24 Nick Clifton <nickc@redhat.com>
617
618 PR gas/15623
619 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
620
621 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
622
623 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
624
625 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
626
627 * config/tc-mips.c: Assert that offsetT and valueT are at least
628 8 bytes in size.
629 (GPR_SMIN, GPR_SMAX): New macros.
630 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
631
632 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
633
634 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
635 conditions. Remove any code deselected by them.
636 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
637
638 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
639
640 * NEWS: Note removal of ECOFF support.
641 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
642 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
643 (MULTI_CFILES): Remove config/e-mipsecoff.c.
644 * Makefile.in: Regenerate.
645 * configure.in: Remove MIPS ECOFF references.
646 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
647 Delete cases.
648 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
649 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
650 (mips-*-*): ...this single case.
651 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
652 MIPS emulations to be e-mipself*.
653 * configure: Regenerate.
654 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
655 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
656 (mips-*-sysv*): Remove coff and ecoff cases.
657 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
658 * ecoff.c: Remove reference to MIPS ECOFF.
659 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
660 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
661 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
662 (mips_hi_fixup): Tweak comment.
663 (append_insn): Require a howto.
664 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
665
666 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
667
668 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
669 Use "CPU" instead of "cpu".
670 * doc/c-mips.texi: Likewise.
671 (MIPS Opts): Rename to MIPS Options.
672 (MIPS option stack): Rename to MIPS Option Stack.
673 (MIPS ASE instruction generation overrides): Rename to
674 MIPS ASE Instruction Generation Overrides (for now).
675 (MIPS floating-point): Rename to MIPS Floating-Point.
676
677 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
678
679 * doc/c-mips.texi (MIPS Macros): New section.
680 (MIPS Object): Replace with...
681 (MIPS Small Data): ...this new section.
682
683 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
684
685 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
686 Capitalize name. Use @kindex instead of @cindex for .set entries.
687
688 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
689
690 * doc/c-mips.texi (MIPS Stabs): Remove section.
691
692 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
693
694 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
695 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
696 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
697 (ISA_SUPPORTS_VIRT64_ASE): Delete.
698 (mips_ase): New structure.
699 (mips_ases): New table.
700 (FP64_ASES): New macro.
701 (mips_ase_groups): New array.
702 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
703 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
704 functions.
705 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
706 (md_parse_option): Use mips_ases and mips_set_ase instead of
707 separate case statements for each ASE option.
708 (mips_after_parse_args): Use FP64_ASES. Use
709 mips_check_isa_supports_ases to check the ASEs against
710 other options.
711 (s_mipsset): Use mips_ases and mips_set_ase instead of
712 separate if statements for each ASE option. Use
713 mips_check_isa_supports_ases, even when a non-ASE option
714 is specified.
715
716 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
717
718 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
719
720 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
721
722 * config/tc-mips.c (md_shortopts, options, md_longopts)
723 (md_longopts_size): Move earlier in file.
724
725 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
726
727 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
728 with a single "ase" bitmask.
729 (mips_opts): Update accordingly.
730 (file_ase, file_ase_explicit): New variables.
731 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
732 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
733 (ISA_HAS_ROR): Adjust for mips_set_options change.
734 (is_opcode_valid): Take the base ase mask directly from mips_opts.
735 (mips_ip): Adjust for mips_set_options change.
736 (md_parse_option): Likewise. Update file_ase_explicit.
737 (mips_after_parse_args): Adjust for mips_set_options change.
738 Use bitmask operations to select the default ASEs. Set file_ase
739 rather than individual per-ASE variables.
740 (s_mipsset): Adjust for mips_set_options change.
741 (mips_elf_final_processing): Test file_ase rather than
742 file_ase_mdmx. Remove commented-out code.
743
744 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
745
746 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
747 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
748 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
749 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
750 (mips_after_parse_args): Use the new "ase" field to choose
751 the default ASEs.
752 (mips_cpu_info_table): Move ASEs from the "flags" field to the
753 "ase" field.
754
755 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
756
757 * config/tc-arm.c (symbol_preemptible): New function.
758 (relax_branch): Use it.
759
760 2013-06-17 Catherine Moore <clm@codesourcery.com>
761 Maciej W. Rozycki <macro@codesourcery.com>
762 Chao-Ying Fu <fu@mips.com>
763
764 * config/tc-mips.c (mips_set_options): Add ase_eva.
765 (mips_set_options mips_opts): Add ase_eva.
766 (file_ase_eva): Declare.
767 (ISA_SUPPORTS_EVA_ASE): Define.
768 (IS_SEXT_9BIT_NUM): Define.
769 (MIPS_CPU_ASE_EVA): Define.
770 (is_opcode_valid): Add support for ase_eva.
771 (macro_build): Likewise.
772 (macro): Likewise.
773 (validate_mips_insn): Likewise.
774 (validate_micromips_insn): Likewise.
775 (mips_ip): Likewise.
776 (options): Add OPTION_EVA and OPTION_NO_EVA.
777 (md_longopts): Add -meva and -mno-eva.
778 (md_parse_option): Process new options.
779 (mips_after_parse_args): Check for valid EVA combinations.
780 (s_mipsset): Likewise.
781
782 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
783
784 * dwarf2dbg.h (dwarf2_move_insn): Declare.
785 * dwarf2dbg.c (line_subseg): Add pmove_tail.
786 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
787 (dwarf2_gen_line_info_1): Update call accordingly.
788 (dwarf2_move_insn): New function.
789 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
790
791 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
792
793 Revert:
794
795 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
796
797 PR gas/13024
798 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
799 (dwarf2_gen_line_info_1): Delete.
800 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
801 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
802 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
803 (dwarf2_directive_loc): Push previous .locs instead of generating
804 them immediately.
805
806 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
807
808 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
809 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
810
811 2013-06-13 Nick Clifton <nickc@redhat.com>
812
813 PR gas/15602
814 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
815 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
816 function. Generates an error if the adjusted offset is out of a
817 16-bit range.
818
819 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
820
821 * config/tc-nios2.c (md_apply_fix): Mask constant
822 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
823
824 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
825
826 * config/tc-mips.c (append_insn): Don't do branch relaxation for
827 MIPS-3D instructions either.
828 (md_convert_frag): Update the COPx branch mask accordingly.
829
830 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
831 option.
832 * doc/as.texinfo (Overview): Add --relax-branch and
833 --no-relax-branch.
834 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
835 --no-relax-branch.
836
837 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
838
839 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
840 omitted.
841
842 2013-06-08 Catherine Moore <clm@codesourcery.com>
843
844 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
845 (is_opcode_valid_16): Pass ase value to opcode_is_member.
846 (append_insn): Change INSN_xxxx to ASE_xxxx.
847
848 2013-06-01 George Thomas <george.thomas@atmel.com>
849
850 * gas/config/tc-avr.c: Change ISA for devices with USB support to
851 AVR_ISA_XMEGAU
852
853 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
854
855 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
856 for ELF.
857
858 2013-05-31 Paul Brook <paul@codesourcery.com>
859
860 gas/
861 * config/tc-mips.c (s_ehword): New.
862
863 2013-05-30 Paul Brook <paul@codesourcery.com>
864
865 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
866
867 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
868
869 * write.c (resolve_reloc_expr_symbols): On REL targets don't
870 convert relocs who have no relocatable field either. Rephrase
871 the conditional so that the PC-relative check is only applied
872 for REL targets.
873
874 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
875
876 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
877 calculation.
878
879 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
880
881 * config/tc-aarch64.c (reloc_table): Update to use
882 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
883 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
884 (md_apply_fix): Likewise.
885 (aarch64_force_relocation): Likewise.
886
887 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
888
889 * config/tc-arm.c (it_fsm_post_encode): Improve
890 warning messages about deprecated IT block formats.
891
892 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
893
894 * config/tc-aarch64.c (md_apply_fix): Move value range checking
895 inside fx_done condition.
896
897 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
898
899 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
900
901 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
902
903 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
904 and clean up warning when using PRINT_OPCODE_TABLE.
905
906 2013-05-20 Alan Modra <amodra@gmail.com>
907
908 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
909 and data fixups performing shift/high adjust/sign extension on
910 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
911 when writing data fixups rather than recalculating size.
912
913 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
914
915 * doc/c-msp430.texi: Fix typo.
916
917 2013-05-16 Tristan Gingold <gingold@adacore.com>
918
919 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
920 are also TOC symbols.
921
922 2013-05-16 Nick Clifton <nickc@redhat.com>
923
924 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
925 Add -mcpu command to specify core type.
926 * doc/c-msp430.texi: Update documentation.
927
928 2013-05-09 Andrew Pinski <apinski@cavium.com>
929
930 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
931 (mips_opts): Update for the new field.
932 (file_ase_virt): New variable.
933 (ISA_SUPPORTS_VIRT_ASE): New macro.
934 (ISA_SUPPORTS_VIRT64_ASE): New macro.
935 (MIPS_CPU_ASE_VIRT): New define.
936 (is_opcode_valid): Handle ase_virt.
937 (macro_build): Handle "+J".
938 (validate_mips_insn): Likewise.
939 (mips_ip): Likewise.
940 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
941 (md_longopts): Add mvirt and mnovirt
942 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
943 (mips_after_parse_args): Handle ase_virt field.
944 (s_mipsset): Handle "virt" and "novirt".
945 (mips_elf_final_processing): Add a comment about virt ASE might need
946 a new flag.
947 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
948 * doc/c-mips.texi: Document -mvirt and -mno-virt.
949 Document ".set virt" and ".set novirt".
950
951 2013-05-09 Alan Modra <amodra@gmail.com>
952
953 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
954 control of operand flag bits.
955
956 2013-05-07 Alan Modra <amodra@gmail.com>
957
958 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
959 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
960 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
961 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
962 (md_apply_fix): Set fx_no_overflow for assorted relocations.
963 Shift and sign-extend fieldval for use by some VLE reloc
964 operand->insert functions.
965
966 2013-05-06 Paul Brook <paul@codesourcery.com>
967 Catherine Moore <clm@codesourcery.com>
968
969 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
970 (limited_pcrel_reloc_p): Likewise.
971 (md_apply_fix): Likewise.
972 (tc_gen_reloc): Likewise.
973
974 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
975
976 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
977 (mips_fix_adjustable): Adjust pc-relative check to use
978 limited_pc_reloc_p.
979
980 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
981
982 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
983 (s_mips_stab): Do not restrict to stabn only.
984
985 2013-05-02 Nick Clifton <nickc@redhat.com>
986
987 * config/tc-msp430.c: Add support for the MSP430X architecture.
988 Add code to insert a NOP instruction after any instruction that
989 might change the interrupt state.
990 Add support for the LARGE memory model.
991 Add code to initialise the .MSP430.attributes section.
992 * config/tc-msp430.h: Add support for the MSP430X architecture.
993 * doc/c-msp430.texi: Document the new -mL and -mN command line
994 options.
995 * NEWS: Mention support for the MSP430X architecture.
996
997 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
998
999 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1000 alpha*-*-linux*ecoff*.
1001
1002 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1003
1004 * config/tc-mips.c (mips_ip): Add sizelo.
1005 For "+C", "+G", and "+H", set sizelo and compare against it.
1006
1007 2013-04-29 Nick Clifton <nickc@redhat.com>
1008
1009 * as.c (Options): Add -gdwarf-sections.
1010 (parse_args): Likewise.
1011 * as.h (flag_dwarf_sections): Declare.
1012 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1013 (process_entries): When -gdwarf-sections is enabled generate
1014 fragmentary .debug_line sections.
1015 (out_debug_line): Set the section for the .debug_line section end
1016 symbol.
1017 * doc/as.texinfo: Document -gdwarf-sections.
1018 * NEWS: Mention -gdwarf-sections.
1019
1020 2013-04-26 Christian Groessler <chris@groessler.org>
1021
1022 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1023 according to the target parameter. Don't call s_segm since s_segm
1024 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1025 initialized yet.
1026 (md_begin): Call s_segm according to target parameter from command
1027 line.
1028
1029 2013-04-25 Alan Modra <amodra@gmail.com>
1030
1031 * configure.in: Allow little-endian linux.
1032 * configure: Regenerate.
1033
1034 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1035
1036 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1037 "fstatus" control register to "eccinj".
1038
1039 2013-04-19 Kai Tietz <ktietz@redhat.com>
1040
1041 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1042
1043 2013-04-15 Julian Brown <julian@codesourcery.com>
1044
1045 * expr.c (add_to_result, subtract_from_result): Make global.
1046 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1047 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1048 subtract_from_result to handle extra bit of precision for .sleb128
1049 directive operands.
1050
1051 2013-04-10 Julian Brown <julian@codesourcery.com>
1052
1053 * read.c (convert_to_bignum): Add sign parameter. Use it
1054 instead of X_unsigned to determine sign of resulting bignum.
1055 (emit_expr): Pass extra argument to convert_to_bignum.
1056 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1057 X_extrabit to convert_to_bignum.
1058 (parse_bitfield_cons): Set X_extrabit.
1059 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1060 Initialise X_extrabit field as appropriate.
1061 (add_to_result): New.
1062 (subtract_from_result): New.
1063 (expr): Use above.
1064 * expr.h (expressionS): Add X_extrabit field.
1065
1066 2013-04-10 Jan Beulich <jbeulich@suse.com>
1067
1068 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1069 register being PC when is_t or writeback, and use distinct
1070 diagnostic for the latter case.
1071
1072 2013-04-10 Jan Beulich <jbeulich@suse.com>
1073
1074 * gas/config/tc-arm.c (parse_operands): Re-write
1075 po_barrier_or_imm().
1076 (do_barrier): Remove bogus constraint().
1077 (do_t_barrier): Remove.
1078
1079 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1080
1081 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1082 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1083 ATmega2564RFR2
1084 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1085
1086 2013-04-09 Jan Beulich <jbeulich@suse.com>
1087
1088 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1089 Use local variable Rt in more places.
1090 (do_vmsr): Accept all control registers.
1091
1092 2013-04-09 Jan Beulich <jbeulich@suse.com>
1093
1094 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1095 if there was none specified for moves between scalar and core
1096 register.
1097
1098 2013-04-09 Jan Beulich <jbeulich@suse.com>
1099
1100 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1101 NEON_ALL_LANES case.
1102
1103 2013-04-08 Jan Beulich <jbeulich@suse.com>
1104
1105 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1106 PC-relative VSTR.
1107
1108 2013-04-08 Jan Beulich <jbeulich@suse.com>
1109
1110 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1111 entry to sp_fiq.
1112
1113 2013-04-03 Alan Modra <amodra@gmail.com>
1114
1115 * doc/as.texinfo: Add support to generate man options for h8300.
1116 * doc/c-h8300.texi: Likewise.
1117
1118 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1119
1120 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1121 Cortex-A57.
1122
1123 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1124
1125 PR binutils/15068
1126 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1127
1128 2013-03-26 Nick Clifton <nickc@redhat.com>
1129
1130 PR gas/15295
1131 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1132 start of the file each time.
1133
1134 PR gas/15178
1135 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1136 FreeBSD targets.
1137
1138 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1139
1140 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1141 after fixup.
1142
1143 2013-03-21 Will Newton <will.newton@linaro.org>
1144
1145 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1146 pc-relative str instructions in Thumb mode.
1147
1148 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1149
1150 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1151 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1152 R_H8_DISP32A16.
1153 * config/tc-h8300.h: Remove duplicated defines.
1154
1155 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1156
1157 PR gas/15282
1158 * tc-avr.c (mcu_has_3_byte_pc): New function.
1159 (tc_cfi_frame_initial_instructions): Call it to find return
1160 address size.
1161
1162 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1163
1164 PR gas/15095
1165 * config/tc-tic6x.c (tic6x_try_encode): Handle
1166 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1167 encode register pair numbers when required.
1168
1169 2013-03-15 Will Newton <will.newton@linaro.org>
1170
1171 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1172 in vstr in Thumb mode for pre-ARMv7 cores.
1173
1174 2013-03-14 Andreas Schwab <schwab@suse.de>
1175
1176 * doc/c-arc.texi (ARC Directives): Revert last change and use
1177 @itemize instead of @table.
1178 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1179
1180 2013-03-14 Nick Clifton <nickc@redhat.com>
1181
1182 PR gas/15273
1183 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1184 NULL message, instead just check ARM_CPU_IS_ANY directly.
1185
1186 2013-03-14 Nick Clifton <nickc@redhat.com>
1187
1188 PR gas/15212
1189 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1190 for table format.
1191 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1192 to the @item directives.
1193 (ARM-Neon-Alignment): Move to correct place in the document.
1194 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1195 formatting.
1196 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1197 @smallexample.
1198
1199 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1200
1201 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1202 case. Add default BAD_CASE to switch.
1203
1204 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1205
1206 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1207 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1208
1209 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1210
1211 * config/tc-arm.c (crc_ext_armv8): New feature set.
1212 (UNPRED_REG): New macro.
1213 (do_crc32_1): New function.
1214 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1215 do_crc32ch, do_crc32cw): Likewise.
1216 (TUEc): New macro.
1217 (insns): Add entries for crc32 mnemonics.
1218 (arm_extensions): Add entry for crc.
1219
1220 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1221
1222 * write.h (struct fix): Add fx_dot_frag field.
1223 (dot_frag): Declare.
1224 * write.c (dot_frag): New variable.
1225 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1226 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1227 * expr.c (expr): Save value of frag_now in dot_frag when setting
1228 dot_value.
1229 * read.c (emit_expr): Likewise. Delete comments.
1230
1231 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1232
1233 * config/tc-i386.c (flag_code_names): Removed.
1234 (i386_index_check): Rewrote.
1235
1236 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1237
1238 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1239 add comment.
1240 (aarch64_double_precision_fmovable): New function.
1241 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1242 function; handle hexadecimal representation of IEEE754 encoding.
1243 (parse_operands): Update the call to parse_aarch64_imm_float.
1244
1245 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1246
1247 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1248 (check_hle): Updated.
1249 (md_assemble): Likewise.
1250 (parse_insn): Likewise.
1251
1252 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1253
1254 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1255 (md_assemble): Check if REP prefix is OK.
1256 (parse_insn): Remove expecting_string_instruction. Set
1257 i.rep_prefix.
1258
1259 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1260
1261 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1262
1263 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1264
1265 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1266 for system registers.
1267
1268 2013-02-27 DJ Delorie <dj@redhat.com>
1269
1270 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1271 (rl78_op): Handle %code().
1272 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1273 (tc_gen_reloc): Likwise; convert to a computed reloc.
1274 (md_apply_fix): Likewise.
1275
1276 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1277
1278 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1279
1280 2013-02-25 Terry Guo <terry.guo@arm.com>
1281
1282 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1283 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1284 list of accepted CPUs.
1285
1286 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1287
1288 PR gas/15159
1289 * config/tc-i386.c (cpu_arch): Add ".smap".
1290
1291 * doc/c-i386.texi: Document smap.
1292
1293 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1294
1295 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1296 mips_assembling_insn appropriately.
1297 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1298
1299 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1300
1301 * config/tc-mips.c (append_insn): Correct indentation, remove
1302 extraneous braces.
1303
1304 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1305
1306 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1307
1308 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1309
1310 * configure.tgt: Add nios2-*-rtems*.
1311
1312 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1313
1314 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1315 NULL.
1316
1317 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1318
1319 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1320 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1321
1322 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1323
1324 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1325 core.
1326
1327 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1328 Andrew Jenner <andrew@codesourcery.com>
1329
1330 Based on patches from Altera Corporation.
1331
1332 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1333 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1334 * Makefile.in: Regenerated.
1335 * configure.tgt: Add case for nios2*-linux*.
1336 * config/obj-elf.c: Conditionally include elf/nios2.h.
1337 * config/tc-nios2.c: New file.
1338 * config/tc-nios2.h: New file.
1339 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1340 * doc/Makefile.in: Regenerated.
1341 * doc/all.texi: Set NIOSII.
1342 * doc/as.texinfo (Overview): Add Nios II options.
1343 (Machine Dependencies): Include c-nios2.texi.
1344 * doc/c-nios2.texi: New file.
1345 * NEWS: Note Altera Nios II support.
1346
1347 2013-02-06 Alan Modra <amodra@gmail.com>
1348
1349 PR gas/14255
1350 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1351 Don't skip fixups with fx_subsy non-NULL.
1352 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1353 with fx_subsy non-NULL.
1354
1355 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1356
1357 * doc/c-metag.texi: Add "@c man" markers.
1358
1359 2013-02-04 Alan Modra <amodra@gmail.com>
1360
1361 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1362 related code.
1363 (TC_ADJUST_RELOC_COUNT): Delete.
1364 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1365
1366 2013-02-04 Alan Modra <amodra@gmail.com>
1367
1368 * po/POTFILES.in: Regenerate.
1369
1370 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1371
1372 * config/tc-metag.c: Make SWAP instruction less permissive with
1373 its operands.
1374
1375 2013-01-29 DJ Delorie <dj@redhat.com>
1376
1377 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1378 relocs in .word/.etc statements.
1379
1380 2013-01-29 Roland McGrath <mcgrathr@google.com>
1381
1382 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1383 immediate value for 8-bit offset" error so it shows line info.
1384
1385 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1386
1387 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1388 for 64-bit output.
1389
1390 2013-01-24 Nick Clifton <nickc@redhat.com>
1391
1392 * config/tc-v850.c: Add support for e3v5 architecture.
1393 * doc/c-v850.texi: Mention new support.
1394
1395 2013-01-23 Nick Clifton <nickc@redhat.com>
1396
1397 PR gas/15039
1398 * config/tc-avr.c: Include dwarf2dbg.h.
1399
1400 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1401
1402 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1403 (tc_i386_fix_adjustable): Likewise.
1404 (lex_got): Likewise.
1405 (tc_gen_reloc): Likewise.
1406
1407 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1408
1409 * config/tc-aarch64.c (output_operand_error_record): Change to output
1410 the out-of-range error message as value-expected message if there is
1411 only one single value in the expected range.
1412 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1413 LSL #0 as a programmer-friendly feature.
1414
1415 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1416
1417 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1418 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1419 BFD_RELOC_64_SIZE relocations.
1420 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1421 for it.
1422 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1423 relocations against local symbols.
1424
1425 2013-01-16 Alan Modra <amodra@gmail.com>
1426
1427 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1428 finding some sort of toc syntax error, and break to avoid
1429 compiler uninit warning.
1430
1431 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1432
1433 PR gas/15019
1434 * config/tc-i386.c (lex_got): Increment length by 1 if the
1435 relocation token is removed.
1436
1437 2013-01-15 Nick Clifton <nickc@redhat.com>
1438
1439 * config/tc-v850.c (md_assemble): Allow signed values for
1440 V850E_IMMEDIATE.
1441
1442 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1443
1444 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1445 git to cvs.
1446
1447 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1448
1449 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1450 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1451 * config/tc-ppc.c (md_show_usage): Likewise.
1452 (ppc_handle_align): Handle power8's group ending nop.
1453
1454 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1455
1456 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1457 that the assember exits after the opcodes have been printed.
1458
1459 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1460
1461 * app.c: Remove trailing white spaces.
1462 * as.c: Likewise.
1463 * as.h: Likewise.
1464 * cond.c: Likewise.
1465 * dw2gencfi.c: Likewise.
1466 * dwarf2dbg.h: Likewise.
1467 * ecoff.c: Likewise.
1468 * input-file.c: Likewise.
1469 * itbl-lex.h: Likewise.
1470 * output-file.c: Likewise.
1471 * read.c: Likewise.
1472 * sb.c: Likewise.
1473 * subsegs.c: Likewise.
1474 * symbols.c: Likewise.
1475 * write.c: Likewise.
1476 * config/tc-i386.c: Likewise.
1477 * doc/Makefile.am: Likewise.
1478 * doc/Makefile.in: Likewise.
1479 * doc/c-aarch64.texi: Likewise.
1480 * doc/c-alpha.texi: Likewise.
1481 * doc/c-arc.texi: Likewise.
1482 * doc/c-arm.texi: Likewise.
1483 * doc/c-avr.texi: Likewise.
1484 * doc/c-bfin.texi: Likewise.
1485 * doc/c-cr16.texi: Likewise.
1486 * doc/c-d10v.texi: Likewise.
1487 * doc/c-d30v.texi: Likewise.
1488 * doc/c-h8300.texi: Likewise.
1489 * doc/c-hppa.texi: Likewise.
1490 * doc/c-i370.texi: Likewise.
1491 * doc/c-i386.texi: Likewise.
1492 * doc/c-i860.texi: Likewise.
1493 * doc/c-m32c.texi: Likewise.
1494 * doc/c-m32r.texi: Likewise.
1495 * doc/c-m68hc11.texi: Likewise.
1496 * doc/c-m68k.texi: Likewise.
1497 * doc/c-microblaze.texi: Likewise.
1498 * doc/c-mips.texi: Likewise.
1499 * doc/c-msp430.texi: Likewise.
1500 * doc/c-mt.texi: Likewise.
1501 * doc/c-s390.texi: Likewise.
1502 * doc/c-score.texi: Likewise.
1503 * doc/c-sh.texi: Likewise.
1504 * doc/c-sh64.texi: Likewise.
1505 * doc/c-tic54x.texi: Likewise.
1506 * doc/c-tic6x.texi: Likewise.
1507 * doc/c-v850.texi: Likewise.
1508 * doc/c-xc16x.texi: Likewise.
1509 * doc/c-xgate.texi: Likewise.
1510 * doc/c-xtensa.texi: Likewise.
1511 * doc/c-z80.texi: Likewise.
1512 * doc/internals.texi: Likewise.
1513
1514 2013-01-10 Roland McGrath <mcgrathr@google.com>
1515
1516 * hash.c (hash_new_sized): Make it global.
1517 * hash.h: Declare it.
1518 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1519 pass a small size.
1520
1521 2013-01-10 Will Newton <will.newton@imgtec.com>
1522
1523 * Makefile.am: Add Meta.
1524 * Makefile.in: Regenerate.
1525 * config/tc-metag.c: New file.
1526 * config/tc-metag.h: New file.
1527 * configure.tgt: Add Meta.
1528 * doc/Makefile.am: Add Meta.
1529 * doc/Makefile.in: Regenerate.
1530 * doc/all.texi: Add Meta.
1531 * doc/as.texiinfo: Document Meta options.
1532 * doc/c-metag.texi: New file.
1533
1534 2013-01-09 Steve Ellcey <sellcey@mips.com>
1535
1536 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1537 calls.
1538 * config/tc-mips.c (internalError): Remove, replace with abort.
1539
1540 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1541
1542 * config/tc-aarch64.c (parse_operands): Change to compare the result
1543 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1544
1545 2013-01-07 Nick Clifton <nickc@redhat.com>
1546
1547 PR gas/14887
1548 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1549 anticipated character.
1550 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1551 here as it is no longer needed.
1552
1553 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1554
1555 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1556 * doc/c-score.texi (SCORE-Opts): Likewise.
1557 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1558
1559 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1560
1561 * config/tc-mips.c: Add support for MIPS r5900.
1562 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1563 lq and sq.
1564 (can_swap_branch_p, get_append_method): Detect some conditional
1565 short loops to fix a bug on the r5900 by NOP in the branch delay
1566 slot.
1567 (M_MUL): Support 3 operands in multu on r5900.
1568 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1569 (s_mipsset): Force 32 bit floating point on r5900.
1570 (mips_ip): Check parameter range of instructions mfps and mtps on
1571 r5900.
1572 * configure.in: Detect CPU type when target string contains r5900
1573 (e.g. mips64r5900el-linux-gnu).
1574
1575 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1576
1577 * as.c (parse_args): Update copyright year to 2013.
1578
1579 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1580
1581 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1582 and "cortex57".
1583
1584 2013-01-02 Nick Clifton <nickc@redhat.com>
1585
1586 PR gas/14987
1587 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1588 closing bracket.
1589
1590 For older changes see ChangeLog-2012
1591 \f
1592 Copyright (C) 2013 Free Software Foundation, Inc.
1593
1594 Copying and distribution of this file, with or without modification,
1595 are permitted in any medium without royalty provided the copyright
1596 notice and this notice are preserved.
1597
1598 Local Variables:
1599 mode: change-log
1600 left-margin: 8
1601 fill-column: 74
1602 version-control: never
1603 End:
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