gas/ChangeLog

   1 2006-05-04  Kazu Hirata  <kazu@codesourcery.com>
   2
   3         * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
   4         (opcode_lookup): Issue a warning for opcode with
   5         OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
   6         identical to OT_cinfix3.
   7         (TxC3w, TC3w, tC3w): New.
   8         (insns): Use tC3w and TC3w for comparison instructions with
   9         's' suffix.
  10
  11 2006-05-04  Alan Modra  <amodra@bigpond.net.au>
  12
  13         * subsegs.h (struct frchain): Delete frch_seg.
  14         (frchain_root): Delete.
  15         (seg_info): Define as macro.
  16         * subsegs.c (frchain_root): Delete.
  17         (abs_seg_info, und_seg_info, absolute_frchain): Delete.
  18         (subsegs_begin, subseg_change): Adjust for above.
  19         (subseg_set_rest): Likewise.  Add new frchain structs to seginfo
  20         rather than to one big list.
  21         (subseg_get): Don't special case abs, und sections.
  22         (subseg_new, subseg_force_new): Don't set frchainP here.
  23         (seg_info): Delete.
  24         (subsegs_print_statistics): Adjust frag chain control list traversal.
  25         * debug.c (dmp_frags):  Likewise.
  26         * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
  27         at frchain_root.  Make use of known frchain ordering.
  28         (last_frag_for_seg): Likewise.
  29         (get_frag_fix): Likewise.  Add seg param.
  30         (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
  31         * write.c (chain_frchains_together_1): Adjust for struct frchain.
  32         (SUB_SEGMENT_ALIGN): Likewise.
  33         (subsegs_finish): Adjust frchain list traversal.
  34         * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
  35         (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
  36         (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
  37         (xtensa_fix_b_j_loop_end_frags): Likewise.
  38         (xtensa_fix_close_loop_end_frags): Likewise.
  39         (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
  40         (retrieve_segment_info): Delete frch_seg initialisation.
  41
  42 2006-05-03  Alan Modra  <amodra@bigpond.net.au>
  43
  44         * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
  45         * config/obj-elf.h (obj_sec_set_private_data): Delete.
  46         * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
  47         * config/tc-mn10300.c (tc_gen_reloc): Likewise.
  48
  49 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
  50
  51         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
  52         here.
  53         (md_apply_fix3): Multiply offset by 4 here for
  54         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
  55
  56 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
  57             Jan Beulich  <jbeulich@novell.com>
  58
  59         * config/tc-i386.c (output_invalid_buf): Change size for
  60         unsigned char.
  61         * config/tc-tic30.c (output_invalid_buf): Likewise.
  62
  63         * config/tc-i386.c (output_invalid): Cast none-ascii char to
  64         unsigned char.
  65         * config/tc-tic30.c (output_invalid): Likewise.
  66
  67 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
  68
  69         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
  70         (TEXI2POD): Use AM_MAKEINFOFLAGS.
  71         (asconfig.texi): Don't set top_srcdir.
  72         * doc/as.texinfo: Don't use top_srcdir.
  73         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
  74
  75 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
  76
  77         * config/tc-i386.c (output_invalid_buf): Change size to 16.
  78         * config/tc-tic30.c (output_invalid_buf): Likewise.
  79
  80         * config/tc-i386.c (output_invalid): Use snprintf instead of
  81         sprintf.
  82         * config/tc-ia64.c (declare_register_set): Likewise.
  83         (emit_one_bundle): Likewise.
  84         (check_dependencies): Likewise.
  85         * config/tc-tic30.c (output_invalid): Likewise.
  86
  87 2006-05-02  Paul Brook  <paul@codesourcery.com>
  88
  89         * config/tc-arm.c (arm_optimize_expr): New function.
  90         * config/tc-arm.h (md_optimize_expr): Define
  91         (arm_optimize_expr): Add prototype.
  92         (TC_FORCE_RELOCATION_SUB_SAME): Define.
  93
  94 2006-05-02  Ben Elliston  <bje@au.ibm.com>
  95
  96         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
  97         field unsigned.
  98
  99         * sb.h (sb_list_vector): Move to sb.c.
 100         * sb.c (free_list): Use type of sb_list_vector directly.
 101         (sb_build): Fix off-by-one error in assertion about `size'.
 102
 103 2006-05-01  Ben Elliston  <bje@au.ibm.com>
 104
 105         * listing.c (listing_listing): Remove useless loop.
 106         * macro.c (macro_expand): Remove is_positional local variable.
 107         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
 108         and simplify surrounding expressions, where possible.
 109         (assign_symbol): Likewise.
 110         (s_weakref): Likewise.
 111         * symbols.c (colon): Likewise.
 112
 113 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
 114
 115         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
 116
 117 2006-04-30  Thiemo Seufer  <ths@mips.com>
 118             David Ung  <davidu@mips.com>
 119
 120         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
 121         (mips_immed): New table that records various handling of udi
 122         instruction patterns.
 123         (mips_ip): Adds udi handling.
 124
 125 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
 126
 127         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
 128         of list rather than beginning.
 129
 130 2006-04-26  Julian Brown  <julian@codesourcery.com>
 131
 132         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
 133         (is_quarter_float): Rename from above. Simplify slightly.
 134         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
 135         number.
 136         (parse_neon_mov): Parse floating-point constants.
 137         (neon_qfloat_bits): Fix encoding.
 138         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
 139         preference to integer encoding when using the F32 type.
 140
 141 2006-04-26  Julian Brown  <julian@codesourcery.com>
 142
 143         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
 144         zero-initialising structures containing it will lead to invalid types).
 145         (arm_it): Add vectype to each operand.
 146         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
 147         defined field.
 148         (neon_typed_alias): New structure. Extra information for typed
 149         register aliases.
 150         (reg_entry): Add neon type info field.
 151         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 152         Break out alternative syntax for coprocessor registers, etc. into...
 153         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 154         out from arm_reg_parse.
 155         (parse_neon_type): Move. Return SUCCESS/FAIL.
 156         (first_error): New function. Call to ensure first error which occurs is
 157         reported.
 158         (parse_neon_operand_type): Parse exactly one type.
 159         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 160         (parse_typed_reg_or_scalar): New function. Handle core of both
 161         arm_typed_reg_parse and parse_scalar.
 162         (arm_typed_reg_parse): Parse a register with an optional type.
 163         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 164         result.
 165         (parse_scalar): Parse a Neon scalar with optional type.
 166         (parse_reg_list): Use first_error.
 167         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 168         (neon_alias_types_same): New function. Return true if two (alias) types
 169         are the same.
 170         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 171         of elements.
 172         (insert_reg_alias): Return new reg_entry not void.
 173         (insert_neon_reg_alias): New function. Insert type/index information as
 174         well as register for alias.
 175         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 176         make typed register aliases accordingly.
 177         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 178         of line.
 179         (s_unreq): Delete type information if present.
 180         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 181         (s_arm_unwind_save_mmxwcg): Likewise.
 182         (s_arm_unwind_movsp): Likewise.
 183         (s_arm_unwind_setfp): Likewise.
 184         (parse_shift): Likewise.
 185         (parse_shifter_operand): Likewise.
 186         (parse_address): Likewise.
 187         (parse_tb): Likewise.
 188         (tc_arm_regname_to_dw2regnum): Likewise.
 189         (md_pseudo_table): Add dn, qn.
 190         (parse_neon_mov): Handle typed operands.
 191         (parse_operands): Likewise.
 192         (neon_type_mask): Add N_SIZ.
 193         (N_ALLMODS): New macro.
 194         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 195         (el_type_of_type_chk): Add some safeguards.
 196         (modify_types_allowed): Fix logic bug.
 197         (neon_check_type): Handle operands with types.
 198         (neon_three_same): Remove redundant optional arg handling.
 199         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 200         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 201         (do_neon_step): Adjust accordingly.
 202         (neon_cmode_for_logic_imm): Use first_error.
 203         (do_neon_bitfield): Call neon_check_type.
 204         (neon_dyadic): Rename to...
 205         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 206         to allow modification of type of the destination.
 207         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 208         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 209         (do_neon_compare): Make destination be an untyped bitfield.
 210         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 211         (neon_mul_mac): Return early in case of errors.
 212         (neon_move_immediate): Use first_error.
 213         (neon_mac_reg_scalar_long): Fix type to include scalar.
 214         (do_neon_dup): Likewise.
 215         (do_neon_mov): Likewise (in several places).
 216         (do_neon_tbl_tbx): Fix type.
 217         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 218         (do_neon_ld_dup): Exit early in case of errors and/or use
 219         first_error.
 220         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 221         Handle .dn/.qn directives.
 222         (REGDEF): Add zero for reg_entry neon field.
 223
 224 2006-04-26  Julian Brown  <julian@codesourcery.com>
 225
 226         * config/tc-arm.c (limits.h): Include.
 227         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 228         (fpu_vfp_v3_or_neon_ext): Declare constants.
 229         (neon_el_type): New enumeration of types for Neon vector elements.
 230         (neon_type_el): New struct. Define type and size of a vector element.
 231         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 232         instruction.
 233         (neon_type): Define struct. The type of an instruction.
 234         (arm_it): Add 'vectype' for the current instruction.
 235         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 236         (vfp_sp_reg_pos): Rename to...
 237         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 238         tags.
 239         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 240         (Neon D or Q register).
 241         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 242         register.
 243         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 244         (my_get_expression): Allow above constant as argument to accept
 245         64-bit constants with optional prefix.
 246         (arm_reg_parse): Add extra argument to return the specific type of
 247         register in when either a D or Q register (REG_TYPE_NDQ) is
 248         requested. Can be NULL.
 249         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 250         (parse_reg_list): Update for new arm_reg_parse args.
 251         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 252         (parse_neon_el_struct_list): New function. Parse element/structure
 253         register lists for VLD<n>/VST<n> instructions.
 254         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 255         (s_arm_unwind_save_mmxwr): Likewise.
 256         (s_arm_unwind_save_mmxwcg): Likewise.
 257         (s_arm_unwind_movsp): Likewise.
 258         (s_arm_unwind_setfp): Likewise.
 259         (parse_big_immediate): New function. Parse an immediate, which may be
 260         64 bits wide. Put results in inst.operands[i].
 261         (parse_shift): Update for new arm_reg_parse args.
 262         (parse_address): Likewise. Add parsing of alignment specifiers.
 263         (parse_neon_mov): Parse the operands of a VMOV instruction.
 264         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 265         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 266         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 267         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 268         (parse_operands): Handle new codes above.
 269         (encode_arm_vfp_sp_reg): Rename to...
 270         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 271         selected VFP version only supports D0-D15.
 272         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 273         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 274         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 275         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 276         encode_arm_vfp_reg name, and allow 32 D regs.
 277         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 278         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 279         regs.
 280         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 281         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 282         constant-load and conversion insns introduced with VFPv3.
 283         (neon_tab_entry): New struct.
 284         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 285         those which are the targets of pseudo-instructions.
 286         (neon_opc): Enumerate opcodes, use as indices into...
 287         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 288         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 289         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 290         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 291         neon_enc_tab.
 292         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 293         Neon instructions.
 294         (neon_type_mask): New. Compact type representation for type checking.
 295         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 296         permitted type combinations.
 297         (N_IGNORE_TYPE): New macro.
 298         (neon_check_shape): New function. Check an instruction shape for
 299         multiple alternatives. Return the specific shape for the current
 300         instruction.
 301         (neon_modify_type_size): New function. Modify a vector type and size,
 302         depending on the bit mask in argument 1.
 303         (neon_type_promote): New function. Convert a given "key" type (of an
 304         operand) into the correct type for a different operand, based on a bit
 305         mask.
 306         (type_chk_of_el_type): New function. Convert a type and size into the
 307         compact representation used for type checking.
 308         (el_type_of_type_ckh): New function. Reverse of above (only when a
 309         single bit is set in the bit mask).
 310         (modify_types_allowed): New function. Alter a mask of allowed types
 311         based on a bit mask of modifications.
 312         (neon_check_type): New function. Check the type of the current
 313         instruction against the variable argument list. The "key" type of the
 314         instruction is returned.
 315         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 316         a Neon data-processing instruction depending on whether we're in ARM
 317         mode or Thumb-2 mode.
 318         (neon_logbits): New function.
 319         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 320         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 321         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 322         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 323         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 324         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 325         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 326         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 327         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 328         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 329         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 330         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 331         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 332         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 333         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 334         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 335         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 336         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 337         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 338         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 339         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 340         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 341         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 342         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 343         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 344         helpers.
 345         (parse_neon_type): New function. Parse Neon type specifier.
 346         (opcode_lookup): Allow parsing of Neon type specifiers.
 347         (REGNUM2, REGSETH, REGSET2): New macros.
 348         (reg_names): Add new VFPv3 and Neon registers.
 349         (NUF, nUF, NCE, nCE): New macros for opcode table.
 350         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 351         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 352         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 353         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 354         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 355         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 356         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 357         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 358         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 359         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 360         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 361         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 362         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 363         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 364         fto[us][lh][sd].
 365         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 366         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 367         (arm_option_cpu_value): Add vfp3 and neon.
 368         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 369         VFPv1 attribute.
 370
 371 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 372
 373         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 374         syntax instead of hardcoded opcodes with ".w18" suffixes.
 375         (wide_branch_opcode): New.
 376         (build_transition): Use it to check for wide branch opcodes with
 377         either ".w18" or ".w15" suffixes.
 378
 379 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 380
 381         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 382         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 383         frag's is_literal flag.
 384
 385 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 386
 387         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 388
 389 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 390
 391         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 392         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 393         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 394         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 395         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 396
 397 2005-04-20  Paul Brook  <paul@codesourcery.com>
 398
 399         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 400         all targets.
 401         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 402
 403 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 404
 405         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 406         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 407         Make some cpus unsupported on ELF.  Run "make dep-am".
 408         * Makefile.in: Regenerate.
 409
 410 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 411
 412         * configure.in (--enable-targets): Indent help message.
 413         * configure: Regenerate.
 414
 415 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 416
 417         PR gas/2533
 418         * config/tc-i386.c (i386_immediate): Check illegal immediate
 419         register operand.
 420
 421 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 422
 423         * config/tc-i386.c: Formatting.
 424         (output_disp, output_imm): ISO C90 params.
 425
 426         * frags.c (frag_offset_fixed_p): Constify args.
 427         * frags.h (frag_offset_fixed_p): Ditto.
 428
 429         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 430         (COFF_MAGIC): Delete.
 431
 432         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 433
 434 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 435
 436         * po/POTFILES.in: Regenerated.
 437
 438 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 439
 440         * doc/as.texinfo: Mention that some .type syntaxes are not
 441         supported on all architectures.
 442
 443 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 444
 445         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 446         instructions when such transformations have been disabled.
 447
 448 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 449
 450         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 451         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 452         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 453         decoding the loop instructions.  Remove current_offset variable.
 454         (xtensa_fix_short_loop_frags): Likewise.
 455         (min_bytes_to_other_loop_end): Remove current_offset argument.
 456
 457 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 458
 459         * config/tc-z80.c (z80_optimize_expr): Removed.
 460         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 461
 462 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 463
 464         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 465         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 466         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 467         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 468         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 469         at90can64, at90usb646, at90usb647, at90usb1286 and
 470         at90usb1287.
 471         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 472
 473 2006-04-07  Paul Brook  <paul@codesourcery.com>
 474
 475         * config/tc-arm.c (parse_operands): Set default error message.
 476
 477 2006-04-07  Paul Brook  <paul@codesourcery.com>
 478
 479         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 480
 481 2006-04-07  Paul Brook  <paul@codesourcery.com>
 482
 483         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 484
 485 2006-04-07  Paul Brook  <paul@codesourcery.com>
 486
 487         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 488         (move_or_literal_pool): Handle Thumb-2 instructions.
 489         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 490
 491 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 492
 493         PR 2512.
 494         * config/tc-i386.c (match_template): Move 64-bit operand tests
 495         inside loop.
 496
 497 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 498
 499         * po/Make-in: Add install-html target.
 500         * Makefile.am: Add install-html and install-html-recursive targets.
 501         * Makefile.in: Regenerate.
 502         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 503         * configure: Regenerate.
 504         * doc/Makefile.am: Add install-html and install-html-am targets.
 505         * doc/Makefile.in: Regenerate.
 506
 507 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 508
 509         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 510         second scan.
 511
 512 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 513             Daniel Jacobowitz  <dan@codesourcery.com>
 514
 515         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 516         (GOTT_BASE, GOTT_INDEX): New.
 517         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 518         GOTT_INDEX when generating VxWorks PIC.
 519         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 520         use the generic *-*-vxworks* stanza instead.
 521
 522 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 523
 524         PR 997
 525         * frags.c (frag_offset_fixed_p): New function.
 526         * frags.h (frag_offset_fixed_p): Declare.
 527         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 528         (resolve_expression): Likewise.
 529
 530 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 531
 532         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 533         of the same length but different numbers of slots.
 534
 535 2006-03-30  Andreas Schwab  <schwab@suse.de>
 536
 537         * configure.in: Fix help string for --enable-targets option.
 538         * configure: Regenerate.
 539
 540 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 541
 542         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 543         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 544         overrun and avoid excessive copying.
 545
 546         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 547         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 548         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 549         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 550         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 551         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 552         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 553         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 554         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 555         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 556         (struct m68k_cpu): Change chip field to control_regs.
 557         (current_chip): Remove.
 558         (control_regs): New.
 559         (m68k_archs, m68k_extensions): Adjust.
 560         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 561         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 562         (find_cf_chip): Reimplement for new organization of cpu table.
 563         (select_control_regs): Remove.
 564         (mri_chip): Adjust.
 565         (struct save_opts): Save control regs, not chip.
 566         (s_save, s_restore): Adjust.
 567         (m68k_lookup_cpu): Give deprecated warning when necessary.
 568         (m68k_init_arch): Adjust.
 569         (md_show_usage): Adjust for new cpu table organization.
 570
 571 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 572
 573         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 574         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 575         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 576         "elf/bfin.h".
 577         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 578         (any_gotrel): New rule.
 579         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 580         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 581         "elf/bfin.h".
 582         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 583         (bfin_pic_ptr): New function.
 584         (md_pseudo_table): Add it for ".picptr".
 585         (OPTION_FDPIC): New macro.
 586         (md_longopts): Add -mfdpic.
 587         (md_parse_option): Handle it.
 588         (md_begin): Set BFD flags.
 589         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 590         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 591         us for GOT relocs.
 592         * Makefile.am (bfin-parse.o): Update dependencies.
 593         (DEPTC_bfin_elf): Likewise.
 594         * Makefile.in: Regenerate.
 595
 596 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 597
 598         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 599         mcfemac instead of mcfmac.
 600
 601 2006-03-23  Michael Matz  <matz@suse.de>
 602
 603         * config/tc-i386.c (type_names): Correct placement of 'static'.
 604         (reloc): Map some more relocs to their 64 bit counterpart when
 605         size is 8.
 606         (output_insn): Work around breakage if DEBUG386 is defined.
 607         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 608         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 609         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 610         different from i386.
 611         (output_imm): Ditto.
 612         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 613         Imm64.
 614         (md_convert_frag): Jumps can now be larger than 2GB away, error
 615         out in that case.
 616         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 617         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 618
 619 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 620             Daniel Jacobowitz  <dan@codesourcery.com>
 621             Phil Edwards  <phil@codesourcery.com>
 622             Zack Weinberg  <zack@codesourcery.com>
 623             Mark Mitchell  <mark@codesourcery.com>
 624             Nathan Sidwell  <nathan@codesourcery.com>
 625
 626         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 627         (md_begin): Complain about -G being used for PIC.  Don't change
 628         the text, data and bss alignments on VxWorks.
 629         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 630         generating VxWorks PIC.
 631         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 632         (macro): Likewise, but do not treat la $25 specially for
 633         VxWorks PIC, and do not handle jal.
 634         (OPTION_MVXWORKS_PIC): New macro.
 635         (md_longopts): Add -mvxworks-pic.
 636         (md_parse_option): Don't complain about using PIC and -G together here.
 637         Handle OPTION_MVXWORKS_PIC.
 638         (md_estimate_size_before_relax): Always use the first relaxation
 639         sequence on VxWorks.
 640         * config/tc-mips.h (VXWORKS_PIC): New.
 641
 642 2006-03-21  Paul Brook  <paul@codesourcery.com>
 643
 644         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 645
 646 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 647
 648         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 649         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 650         (get_loop_align_size): New.
 651         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 652         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 653         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 654         (get_noop_aligned_address): Use get_loop_align_size.
 655         (get_aligned_diff): Likewise.
 656
 657 2006-03-21  Paul Brook  <paul@codesourcery.com>
 658
 659         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 660
 661 2006-03-20  Paul Brook  <paul@codesourcery.com>
 662
 663         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 664         (do_t_branch): Encode branches inside IT blocks as unconditional.
 665         (do_t_cps): New function.
 666         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 667         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 668         (opcode_lookup): Allow conditional suffixes on all instructions in
 669         Thumb mode.
 670         (md_assemble): Advance condexec state before checking for errors.
 671         (insns): Use do_t_cps.
 672
 673 2006-03-20  Paul Brook  <paul@codesourcery.com>
 674
 675         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 676         outputting the insn.
 677
 678 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 679
 680         * config/tc-vax.c: Update copyright year.
 681         * config/tc-vax.h: Likewise.
 682
 683 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 684
 685         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 686         make it static.
 687         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 688
 689 2006-03-17  Paul Brook  <paul@codesourcery.com>
 690
 691         * config/tc-arm.c (insns): Add ldm and stm.
 692
 693 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 694
 695         PR gas/2446
 696         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 697
 698 2006-03-16  Paul Brook  <paul@codesourcery.com>
 699
 700         * config/tc-arm.c (insns): Add "svc".
 701
 702 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 703
 704         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 705         flag and avoid double underscore prefixes.
 706
 707 2006-03-10  Paul Brook  <paul@codesourcery.com>
 708
 709         * config/tc-arm.c (md_begin): Handle EABIv5.
 710         (arm_eabis): Add EF_ARM_EABI_VER5.
 711         * doc/c-arm.texi: Document -meabi=5.
 712
 713 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 714
 715         * app.c (do_scrub_chars): Simplify string handling.
 716
 717 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 718             Daniel Jacobowitz  <dan@codesourcery.com>
 719             Zack Weinberg  <zack@codesourcery.com>
 720             Nathan Sidwell  <nathan@codesourcery.com>
 721             Paul Brook  <paul@codesourcery.com>
 722             Ricardo Anguiano  <anguiano@codesourcery.com>
 723             Phil Edwards  <phil@codesourcery.com>
 724
 725         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 726         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 727         R_ARM_ABS12 reloc.
 728         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 729         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 730         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 731
 732 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 733
 734         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 735         even when using the text-section-literals option.
 736
 737 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 738
 739         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 740         and cf.
 741         (m68k_ip): <case 'J'> Check we have some control regs.
 742         (md_parse_option): Allow raw arch switch.
 743         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 744         whether 68881 or cfloat was meant by -mfloat.
 745         (md_show_usage): Adjust extension display.
 746         (m68k_elf_final_processing): Adjust.
 747
 748 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 749
 750         * config/tc-avr.c (avr_mod_hash_value): New function.
 751         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 752         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 753         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 754         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 755         of (int).
 756         (tc_gen_reloc): Handle substractions of symbols, if possible do
 757         fixups, abort otherwise.
 758         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 759         tc_fix_adjustable): Define.
 760
 761 2006-03-02  James E Wilson  <wilson@specifix.com>
 762
 763         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 764         change the template, then clear md.slot[curr].end_of_insn_group.
 765
 766 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 767
 768         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 769
 770 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 771
 772         PR/1070
 773         * macro.c (getstring): Don't treat parentheses special anymore.
 774         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 775         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 776         characters.
 777
 778 2006-02-28  Mat <mat@csail.mit.edu>
 779
 780         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 781
 782 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 783
 784         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 785         field.
 786         (CFI_signal_frame): Define.
 787         (cfi_pseudo_table): Add .cfi_signal_frame.
 788         (dot_cfi): Handle CFI_signal_frame.
 789         (output_cie): Handle cie->signal_frame.
 790         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 791         different.  Copy signal_frame from FDE to newly created CIE.
 792         * doc/as.texinfo: Document .cfi_signal_frame.
 793
 794 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 795
 796         * doc/Makefile.am: Add html target.
 797         * doc/Makefile.in: Regenerate.
 798         * po/Make-in: Add html target.
 799
 800 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 801
 802         * config/tc-i386.c (output_insn): Support Intel Merom New
 803         Instructions.
 804
 805         * config/tc-i386.h (CpuMNI): New.
 806         (CpuUnknownFlags): Add CpuMNI.
 807
 808 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 809
 810         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 811         (hpriv_reg_table): New table for hyperprivileged registers.
 812         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 813         register encoding.
 814
 815 2006-02-24  DJ Delorie  <dj@redhat.com>
 816
 817         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 818         (tc_gen_reloc): Don't define.
 819         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 820         (OPTION_LINKRELAX): New.
 821         (md_longopts): Add it.
 822         (m32c_relax): New.
 823         (md_parse_options): Set it.
 824         (md_assemble): Emit relaxation relocs as needed.
 825         (md_convert_frag): Emit relaxation relocs as needed.
 826         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 827         (m32c_apply_fix): New.
 828         (tc_gen_reloc): New.
 829         (m32c_force_relocation): Force out jump relocs when relaxing.
 830         (m32c_fix_adjustable): Return false if relaxing.
 831
 832 2006-02-24  Paul Brook  <paul@codesourcery.com>
 833
 834         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 835         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 836         (struct asm_barrier_opt): Define.
 837         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 838         (parse_psr): Accept V7M psr names.
 839         (parse_barrier): New function.
 840         (enum operand_parse_code): Add OP_oBARRIER.
 841         (parse_operands): Implement OP_oBARRIER.
 842         (do_barrier): New function.
 843         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 844         (do_t_cpsi): Add V7M restrictions.
 845         (do_t_mrs, do_t_msr): Validate V7M variants.
 846         (md_assemble): Check for NULL variants.
 847         (v7m_psrs, barrier_opt_names): New tables.
 848         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 849         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 850         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 851         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 852         (struct cpu_arch_ver_table): Define.
 853         (cpu_arch_ver): New.
 854         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 855         Tag_CPU_arch_profile.
 856         * doc/c-arm.texi: Document new cpu and arch options.
 857
 858 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 859
 860         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 861
 862 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 863
 864         * config/tc-ia64.c: Update copyright years.
 865
 866 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 867
 868         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 869         SDM 2.2.
 870
 871 2005-02-22  Paul Brook  <paul@codesourcery.com>
 872
 873         * config/tc-arm.c (do_pld): Remove incorrect write to
 874         inst.instruction.
 875         (encode_thumb32_addr_mode): Use correct operand.
 876
 877 2006-02-21  Paul Brook  <paul@codesourcery.com>
 878
 879         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 880
 881 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 882             Anil Paranjape   <anilp1@kpitcummins.com>
 883             Shilin Shakti    <shilins@kpitcummins.com>
 884
 885         * Makefile.am: Add xc16x related entry.
 886         * Makefile.in: Regenerate.
 887         * configure.in: Added xc16x related entry.
 888         * configure: Regenerate.
 889         * config/tc-xc16x.h: New file
 890         * config/tc-xc16x.c: New file
 891         * doc/c-xc16x.texi: New file for xc16x
 892         * doc/all.texi: Entry for xc16x
 893         * doc/Makefile.texi: Added c-xc16x.texi
 894         * NEWS: Announce the support for the new target.
 895
 896 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 897
 898         * configure.tgt: set emulation for mips-*-netbsd*
 899
 900 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 901
 902         * config.in: Rebuilt.
 903
 904 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 905
 906         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 907         from 1, not 0, in error messages.
 908         (md_assemble): Simplify special-case check for ENTRY instructions.
 909         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 910         operand in error message.
 911
 912 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 913
 914         * configure.tgt (arm-*-linux-gnueabi*): Change to
 915         arm-*-linux-*eabi*.
 916
 917 2006-02-10  Nick Clifton  <nickc@redhat.com>
 918
 919         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 920         32-bit value is propagated into the upper bits of a 64-bit long.
 921
 922         * config/tc-arc.c (init_opcode_tables): Fix cast.
 923         (arc_extoper, md_operand): Likewise.
 924
 925 2006-02-09  David Heine  <dlheine@tensilica.com>
 926
 927         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
 928         each relaxation step.
 929
 930 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
 931
 932         * configure.in (CHECK_DECLS): Add vsnprintf.
 933         * configure: Regenerate.
 934         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
 935         include/declare here, but...
 936         * as.h: Move code detecting VARARGS idiom to the top.
 937         (errno.h, stdarg.h, varargs.h, va_list): ...here.
 938         (vsnprintf): Declare if not already declared.
 939
 940 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 941
 942         * as.c (close_output_file): New.
 943         (main): Register close_output_file with xatexit before
 944         dump_statistics. Don't call output_file_close.
 945
 946 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 947
 948         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
 949         mcf5329_control_regs): New.
 950         (not_current_architecture, selected_arch, selected_cpu): New.
 951         (m68k_archs, m68k_extensions): New.
 952         (archs): Renamed to ...
 953         (m68k_cpus): ... here.  Adjust.
 954         (n_arches): Remove.
 955         (md_pseudo_table): Add arch and cpu directives.
 956         (find_cf_chip, m68k_ip): Adjust table scanning.
 957         (no_68851, no_68881): Remove.
 958         (md_assemble): Lazily initialize.
 959         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
 960         (md_init_after_args): Move functionality to m68k_init_arch.
 961         (mri_chip): Adjust table scanning.
 962         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
 963         options with saner parsing.
 964         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
 965         m68k_init_arch): New.
 966         (s_m68k_cpu, s_m68k_arch): New.
 967         (md_show_usage): Adjust.
 968         (m68k_elf_final_processing): Set CF EF flags.
 969         * config/tc-m68k.h (m68k_init_after_args): Remove.
 970         (tc_init_after_args): Remove.
 971         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
 972         (M68k-Directives): Document .arch and .cpu directives.
 973
 974 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
 975
 976         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
 977         synonyms for equ and defl.
 978         (z80_cons_fix_new): New function.
 979         (emit_byte): Disallow relative jumps to absolute locations.
 980         (emit_data): Only handle defb, prototype changed, because defb is
 981         now handled as pseudo-op rather than an instruction.
 982         (instab): Entries for defb,defw,db,dw moved from here...
 983         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
 984         Add entries for def24,def32,d24,d32.
 985         (md_assemble): Improved error handling.
 986         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
 987         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
 988         (z80_cons_fix_new): Declare.
 989         * doc/c-z80.texi (defb, db): Mention warning on overflow.
 990         (def24,d24,def32,d32): New pseudo-ops.
 991
 992 2006-02-02  Paul Brook  <paul@codesourcery.com>
 993
 994         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
 995
 996 2005-02-02  Paul Brook  <paul@codesourcery.com>
 997
 998         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
 999         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1000         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1001         T2_OPCODE_RSB): Define.
1002         (thumb32_negate_data_op): New function.
1003         (md_apply_fix): Use it.
1004
1005 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
1006
1007         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1008         fields.
1009         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1010         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1011         subtracted symbols.
1012         (relaxation_requirements): Add pfinish_frag argument and use it to
1013         replace setting tinsn->record_fix fields.
1014         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1015         and vinsn_to_insnbuf.  Remove references to record_fix and
1016         slot_sub_symbols fields.
1017         (xtensa_mark_narrow_branches): Delete unused code.
1018         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1019         a symbol.
1020         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1021         record_fix fields.
1022         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1023         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1024         of the record_fix field.  Simplify error messages for unexpected
1025         symbolic operands.
1026         (set_expr_symbol_offset_diff): Delete.
1027
1028 2006-01-31  Paul Brook  <paul@codesourcery.com>
1029
1030         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1031
1032 2006-01-31  Paul Brook  <paul@codesourcery.com>
1033         Richard Earnshaw <rearnsha@arm.com>
1034
1035         * config/tc-arm.c: Use arm_feature_set.
1036         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1037         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1038         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1039         New variables.
1040         (insns): Use them.
1041         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1042         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1043         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1044         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1045         feature flags.
1046         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1047         (arm_opts): Move old cpu/arch options from here...
1048         (arm_legacy_opts): ... to here.
1049         (md_parse_option): Search arm_legacy_opts.
1050         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1051         (arm_float_abis, arm_eabis): Make const.
1052
1053 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1054
1055         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1056
1057 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1058
1059         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1060         in load immediate intruction.
1061
1062 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1063
1064         * config/bfin-parse.y (value_match): Use correct conversion
1065         specifications in template string for __FILE__ and __LINE__.
1066         (binary): Ditto.
1067         (unary): Ditto.
1068
1069 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1070
1071         Introduce TLS descriptors for i386 and x86_64.
1072         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1073         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1074         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1075         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1076         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1077         displacement bits.
1078         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1079         (lex_got): Handle @tlsdesc and @tlscall.
1080         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1081
1082 2006-01-11  Nick Clifton  <nickc@redhat.com>
1083
1084         Fixes for building on 64-bit hosts:
1085         * config/tc-avr.c (mod_index): New union to allow conversion
1086         between pointers and integers.
1087         (md_begin, avr_ldi_expression): Use it.
1088         * config/tc-i370.c (md_assemble): Add cast for argument to print
1089         statement.
1090         * config/tc-tic54x.c (subsym_substitute): Likewise.
1091         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1092         opindex field of fr_cgen structure into a pointer so that it can
1093         be stored in a frag.
1094         * config/tc-mn10300.c (md_assemble): Likewise.
1095         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1096         types.
1097         * config/tc-v850.c: Replace uses of (int) casts with correct
1098         types.
1099
1100 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1101
1102         PR gas/2117
1103         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1104
1105 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1106
1107         PR gas/2101
1108         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1109         a local-label reference.
1110
1111 For older changes see ChangeLog-2005
1112 \f
1113 Local Variables:
1114 mode: change-log
1115 left-margin: 8
1116 fill-column: 74
1117 version-control: never
1118 End: