gas/ChangeLog

   1 2006-05-05  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         PR gas/2598
   4         * config/obj-elf.c (obj_elf_change_section): Allow user
   5         specified SHF_ALPHA_GPREL.
   6
   7 2006-05-05  Bjoern Haase  <bjoern.m.haase@web.de>
   8
   9         * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define.  Disable fixups
  10         for PMEM related expressions.
  11
  12 2006-05-05  Nick Clifton  <nickc@redhat.com>
  13
  14         PR gas/2582
  15         * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro.  Handles the
  16         insertion of a directory separator character into a string at a
  17         given offset.  Uses heuristics to decide when to use a backslash
  18         character rather than a forward-slash character.
  19         (dwarf2_directive_loc): Use the macro.
  20         (out_debug_info): Likewise.
  21
  22 2006-05-05  Thiemo Seufer  <ths@mips.com>
  23             David Ung  <davidu@mips.com>
  24
  25         * config/tc-mips.c (macro_build): Add case 'k' to handle cache
  26         instruction.
  27         (macro): Add new case M_CACHE_AB.
  28
  29 2006-05-04  Kazu Hirata  <kazu@codesourcery.com>
  30
  31         * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
  32         (opcode_lookup): Issue a warning for opcode with
  33         OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
  34         identical to OT_cinfix3.
  35         (TxC3w, TC3w, tC3w): New.
  36         (insns): Use tC3w and TC3w for comparison instructions with
  37         's' suffix.
  38
  39 2006-05-04  Alan Modra  <amodra@bigpond.net.au>
  40
  41         * subsegs.h (struct frchain): Delete frch_seg.
  42         (frchain_root): Delete.
  43         (seg_info): Define as macro.
  44         * subsegs.c (frchain_root): Delete.
  45         (abs_seg_info, und_seg_info, absolute_frchain): Delete.
  46         (subsegs_begin, subseg_change): Adjust for above.
  47         (subseg_set_rest): Likewise.  Add new frchain structs to seginfo
  48         rather than to one big list.
  49         (subseg_get): Don't special case abs, und sections.
  50         (subseg_new, subseg_force_new): Don't set frchainP here.
  51         (seg_info): Delete.
  52         (subsegs_print_statistics): Adjust frag chain control list traversal.
  53         * debug.c (dmp_frags):  Likewise.
  54         * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
  55         at frchain_root.  Make use of known frchain ordering.
  56         (last_frag_for_seg): Likewise.
  57         (get_frag_fix): Likewise.  Add seg param.
  58         (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
  59         * write.c (chain_frchains_together_1): Adjust for struct frchain.
  60         (SUB_SEGMENT_ALIGN): Likewise.
  61         (subsegs_finish): Adjust frchain list traversal.
  62         * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
  63         (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
  64         (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
  65         (xtensa_fix_b_j_loop_end_frags): Likewise.
  66         (xtensa_fix_close_loop_end_frags): Likewise.
  67         (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
  68         (retrieve_segment_info): Delete frch_seg initialisation.
  69
  70 2006-05-03  Alan Modra  <amodra@bigpond.net.au>
  71
  72         * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
  73         * config/obj-elf.h (obj_sec_set_private_data): Delete.
  74         * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
  75         * config/tc-mn10300.c (tc_gen_reloc): Likewise.
  76
  77 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
  78
  79         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
  80         here.
  81         (md_apply_fix3): Multiply offset by 4 here for
  82         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
  83
  84 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
  85             Jan Beulich  <jbeulich@novell.com>
  86
  87         * config/tc-i386.c (output_invalid_buf): Change size for
  88         unsigned char.
  89         * config/tc-tic30.c (output_invalid_buf): Likewise.
  90
  91         * config/tc-i386.c (output_invalid): Cast none-ascii char to
  92         unsigned char.
  93         * config/tc-tic30.c (output_invalid): Likewise.
  94
  95 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
  96
  97         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
  98         (TEXI2POD): Use AM_MAKEINFOFLAGS.
  99         (asconfig.texi): Don't set top_srcdir.
 100         * doc/as.texinfo: Don't use top_srcdir.
 101         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
 102
 103 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 104
 105         * config/tc-i386.c (output_invalid_buf): Change size to 16.
 106         * config/tc-tic30.c (output_invalid_buf): Likewise.
 107
 108         * config/tc-i386.c (output_invalid): Use snprintf instead of
 109         sprintf.
 110         * config/tc-ia64.c (declare_register_set): Likewise.
 111         (emit_one_bundle): Likewise.
 112         (check_dependencies): Likewise.
 113         * config/tc-tic30.c (output_invalid): Likewise.
 114
 115 2006-05-02  Paul Brook  <paul@codesourcery.com>
 116
 117         * config/tc-arm.c (arm_optimize_expr): New function.
 118         * config/tc-arm.h (md_optimize_expr): Define
 119         (arm_optimize_expr): Add prototype.
 120         (TC_FORCE_RELOCATION_SUB_SAME): Define.
 121
 122 2006-05-02  Ben Elliston  <bje@au.ibm.com>
 123
 124         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
 125         field unsigned.
 126
 127         * sb.h (sb_list_vector): Move to sb.c.
 128         * sb.c (free_list): Use type of sb_list_vector directly.
 129         (sb_build): Fix off-by-one error in assertion about `size'.
 130
 131 2006-05-01  Ben Elliston  <bje@au.ibm.com>
 132
 133         * listing.c (listing_listing): Remove useless loop.
 134         * macro.c (macro_expand): Remove is_positional local variable.
 135         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
 136         and simplify surrounding expressions, where possible.
 137         (assign_symbol): Likewise.
 138         (s_weakref): Likewise.
 139         * symbols.c (colon): Likewise.
 140
 141 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
 142
 143         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
 144
 145 2006-04-30  Thiemo Seufer  <ths@mips.com>
 146             David Ung  <davidu@mips.com>
 147
 148         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
 149         (mips_immed): New table that records various handling of udi
 150         instruction patterns.
 151         (mips_ip): Adds udi handling.
 152
 153 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
 154
 155         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
 156         of list rather than beginning.
 157
 158 2006-04-26  Julian Brown  <julian@codesourcery.com>
 159
 160         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
 161         (is_quarter_float): Rename from above. Simplify slightly.
 162         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
 163         number.
 164         (parse_neon_mov): Parse floating-point constants.
 165         (neon_qfloat_bits): Fix encoding.
 166         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
 167         preference to integer encoding when using the F32 type.
 168
 169 2006-04-26  Julian Brown  <julian@codesourcery.com>
 170
 171         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
 172         zero-initialising structures containing it will lead to invalid types).
 173         (arm_it): Add vectype to each operand.
 174         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
 175         defined field.
 176         (neon_typed_alias): New structure. Extra information for typed
 177         register aliases.
 178         (reg_entry): Add neon type info field.
 179         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 180         Break out alternative syntax for coprocessor registers, etc. into...
 181         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 182         out from arm_reg_parse.
 183         (parse_neon_type): Move. Return SUCCESS/FAIL.
 184         (first_error): New function. Call to ensure first error which occurs is
 185         reported.
 186         (parse_neon_operand_type): Parse exactly one type.
 187         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 188         (parse_typed_reg_or_scalar): New function. Handle core of both
 189         arm_typed_reg_parse and parse_scalar.
 190         (arm_typed_reg_parse): Parse a register with an optional type.
 191         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 192         result.
 193         (parse_scalar): Parse a Neon scalar with optional type.
 194         (parse_reg_list): Use first_error.
 195         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 196         (neon_alias_types_same): New function. Return true if two (alias) types
 197         are the same.
 198         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 199         of elements.
 200         (insert_reg_alias): Return new reg_entry not void.
 201         (insert_neon_reg_alias): New function. Insert type/index information as
 202         well as register for alias.
 203         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 204         make typed register aliases accordingly.
 205         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 206         of line.
 207         (s_unreq): Delete type information if present.
 208         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 209         (s_arm_unwind_save_mmxwcg): Likewise.
 210         (s_arm_unwind_movsp): Likewise.
 211         (s_arm_unwind_setfp): Likewise.
 212         (parse_shift): Likewise.
 213         (parse_shifter_operand): Likewise.
 214         (parse_address): Likewise.
 215         (parse_tb): Likewise.
 216         (tc_arm_regname_to_dw2regnum): Likewise.
 217         (md_pseudo_table): Add dn, qn.
 218         (parse_neon_mov): Handle typed operands.
 219         (parse_operands): Likewise.
 220         (neon_type_mask): Add N_SIZ.
 221         (N_ALLMODS): New macro.
 222         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 223         (el_type_of_type_chk): Add some safeguards.
 224         (modify_types_allowed): Fix logic bug.
 225         (neon_check_type): Handle operands with types.
 226         (neon_three_same): Remove redundant optional arg handling.
 227         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 228         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 229         (do_neon_step): Adjust accordingly.
 230         (neon_cmode_for_logic_imm): Use first_error.
 231         (do_neon_bitfield): Call neon_check_type.
 232         (neon_dyadic): Rename to...
 233         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 234         to allow modification of type of the destination.
 235         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 236         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 237         (do_neon_compare): Make destination be an untyped bitfield.
 238         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 239         (neon_mul_mac): Return early in case of errors.
 240         (neon_move_immediate): Use first_error.
 241         (neon_mac_reg_scalar_long): Fix type to include scalar.
 242         (do_neon_dup): Likewise.
 243         (do_neon_mov): Likewise (in several places).
 244         (do_neon_tbl_tbx): Fix type.
 245         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 246         (do_neon_ld_dup): Exit early in case of errors and/or use
 247         first_error.
 248         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 249         Handle .dn/.qn directives.
 250         (REGDEF): Add zero for reg_entry neon field.
 251
 252 2006-04-26  Julian Brown  <julian@codesourcery.com>
 253
 254         * config/tc-arm.c (limits.h): Include.
 255         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 256         (fpu_vfp_v3_or_neon_ext): Declare constants.
 257         (neon_el_type): New enumeration of types for Neon vector elements.
 258         (neon_type_el): New struct. Define type and size of a vector element.
 259         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 260         instruction.
 261         (neon_type): Define struct. The type of an instruction.
 262         (arm_it): Add 'vectype' for the current instruction.
 263         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 264         (vfp_sp_reg_pos): Rename to...
 265         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 266         tags.
 267         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 268         (Neon D or Q register).
 269         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 270         register.
 271         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 272         (my_get_expression): Allow above constant as argument to accept
 273         64-bit constants with optional prefix.
 274         (arm_reg_parse): Add extra argument to return the specific type of
 275         register in when either a D or Q register (REG_TYPE_NDQ) is
 276         requested. Can be NULL.
 277         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 278         (parse_reg_list): Update for new arm_reg_parse args.
 279         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 280         (parse_neon_el_struct_list): New function. Parse element/structure
 281         register lists for VLD<n>/VST<n> instructions.
 282         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 283         (s_arm_unwind_save_mmxwr): Likewise.
 284         (s_arm_unwind_save_mmxwcg): Likewise.
 285         (s_arm_unwind_movsp): Likewise.
 286         (s_arm_unwind_setfp): Likewise.
 287         (parse_big_immediate): New function. Parse an immediate, which may be
 288         64 bits wide. Put results in inst.operands[i].
 289         (parse_shift): Update for new arm_reg_parse args.
 290         (parse_address): Likewise. Add parsing of alignment specifiers.
 291         (parse_neon_mov): Parse the operands of a VMOV instruction.
 292         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 293         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 294         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 295         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 296         (parse_operands): Handle new codes above.
 297         (encode_arm_vfp_sp_reg): Rename to...
 298         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 299         selected VFP version only supports D0-D15.
 300         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 301         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 302         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 303         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 304         encode_arm_vfp_reg name, and allow 32 D regs.
 305         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 306         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 307         regs.
 308         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 309         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 310         constant-load and conversion insns introduced with VFPv3.
 311         (neon_tab_entry): New struct.
 312         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 313         those which are the targets of pseudo-instructions.
 314         (neon_opc): Enumerate opcodes, use as indices into...
 315         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 316         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 317         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 318         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 319         neon_enc_tab.
 320         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 321         Neon instructions.
 322         (neon_type_mask): New. Compact type representation for type checking.
 323         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 324         permitted type combinations.
 325         (N_IGNORE_TYPE): New macro.
 326         (neon_check_shape): New function. Check an instruction shape for
 327         multiple alternatives. Return the specific shape for the current
 328         instruction.
 329         (neon_modify_type_size): New function. Modify a vector type and size,
 330         depending on the bit mask in argument 1.
 331         (neon_type_promote): New function. Convert a given "key" type (of an
 332         operand) into the correct type for a different operand, based on a bit
 333         mask.
 334         (type_chk_of_el_type): New function. Convert a type and size into the
 335         compact representation used for type checking.
 336         (el_type_of_type_ckh): New function. Reverse of above (only when a
 337         single bit is set in the bit mask).
 338         (modify_types_allowed): New function. Alter a mask of allowed types
 339         based on a bit mask of modifications.
 340         (neon_check_type): New function. Check the type of the current
 341         instruction against the variable argument list. The "key" type of the
 342         instruction is returned.
 343         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 344         a Neon data-processing instruction depending on whether we're in ARM
 345         mode or Thumb-2 mode.
 346         (neon_logbits): New function.
 347         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 348         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 349         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 350         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 351         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 352         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 353         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 354         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 355         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 356         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 357         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 358         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 359         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 360         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 361         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 362         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 363         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 364         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 365         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 366         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 367         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 368         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 369         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 370         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 371         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 372         helpers.
 373         (parse_neon_type): New function. Parse Neon type specifier.
 374         (opcode_lookup): Allow parsing of Neon type specifiers.
 375         (REGNUM2, REGSETH, REGSET2): New macros.
 376         (reg_names): Add new VFPv3 and Neon registers.
 377         (NUF, nUF, NCE, nCE): New macros for opcode table.
 378         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 379         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 380         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 381         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 382         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 383         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 384         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 385         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 386         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 387         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 388         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 389         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 390         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 391         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 392         fto[us][lh][sd].
 393         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 394         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 395         (arm_option_cpu_value): Add vfp3 and neon.
 396         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 397         VFPv1 attribute.
 398
 399 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 400
 401         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 402         syntax instead of hardcoded opcodes with ".w18" suffixes.
 403         (wide_branch_opcode): New.
 404         (build_transition): Use it to check for wide branch opcodes with
 405         either ".w18" or ".w15" suffixes.
 406
 407 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 408
 409         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 410         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 411         frag's is_literal flag.
 412
 413 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 414
 415         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 416
 417 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 418
 419         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 420         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 421         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 422         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 423         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 424
 425 2005-04-20  Paul Brook  <paul@codesourcery.com>
 426
 427         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 428         all targets.
 429         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 430
 431 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 432
 433         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 434         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 435         Make some cpus unsupported on ELF.  Run "make dep-am".
 436         * Makefile.in: Regenerate.
 437
 438 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 439
 440         * configure.in (--enable-targets): Indent help message.
 441         * configure: Regenerate.
 442
 443 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 444
 445         PR gas/2533
 446         * config/tc-i386.c (i386_immediate): Check illegal immediate
 447         register operand.
 448
 449 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 450
 451         * config/tc-i386.c: Formatting.
 452         (output_disp, output_imm): ISO C90 params.
 453
 454         * frags.c (frag_offset_fixed_p): Constify args.
 455         * frags.h (frag_offset_fixed_p): Ditto.
 456
 457         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 458         (COFF_MAGIC): Delete.
 459
 460         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 461
 462 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 463
 464         * po/POTFILES.in: Regenerated.
 465
 466 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 467
 468         * doc/as.texinfo: Mention that some .type syntaxes are not
 469         supported on all architectures.
 470
 471 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 472
 473         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 474         instructions when such transformations have been disabled.
 475
 476 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 477
 478         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 479         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 480         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 481         decoding the loop instructions.  Remove current_offset variable.
 482         (xtensa_fix_short_loop_frags): Likewise.
 483         (min_bytes_to_other_loop_end): Remove current_offset argument.
 484
 485 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 486
 487         * config/tc-z80.c (z80_optimize_expr): Removed.
 488         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 489
 490 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 491
 492         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 493         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 494         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 495         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 496         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 497         at90can64, at90usb646, at90usb647, at90usb1286 and
 498         at90usb1287.
 499         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 500
 501 2006-04-07  Paul Brook  <paul@codesourcery.com>
 502
 503         * config/tc-arm.c (parse_operands): Set default error message.
 504
 505 2006-04-07  Paul Brook  <paul@codesourcery.com>
 506
 507         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 508
 509 2006-04-07  Paul Brook  <paul@codesourcery.com>
 510
 511         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 512
 513 2006-04-07  Paul Brook  <paul@codesourcery.com>
 514
 515         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 516         (move_or_literal_pool): Handle Thumb-2 instructions.
 517         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 518
 519 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 520
 521         PR 2512.
 522         * config/tc-i386.c (match_template): Move 64-bit operand tests
 523         inside loop.
 524
 525 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 526
 527         * po/Make-in: Add install-html target.
 528         * Makefile.am: Add install-html and install-html-recursive targets.
 529         * Makefile.in: Regenerate.
 530         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 531         * configure: Regenerate.
 532         * doc/Makefile.am: Add install-html and install-html-am targets.
 533         * doc/Makefile.in: Regenerate.
 534
 535 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 536
 537         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 538         second scan.
 539
 540 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 541             Daniel Jacobowitz  <dan@codesourcery.com>
 542
 543         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 544         (GOTT_BASE, GOTT_INDEX): New.
 545         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 546         GOTT_INDEX when generating VxWorks PIC.
 547         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 548         use the generic *-*-vxworks* stanza instead.
 549
 550 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 551
 552         PR 997
 553         * frags.c (frag_offset_fixed_p): New function.
 554         * frags.h (frag_offset_fixed_p): Declare.
 555         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 556         (resolve_expression): Likewise.
 557
 558 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 559
 560         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 561         of the same length but different numbers of slots.
 562
 563 2006-03-30  Andreas Schwab  <schwab@suse.de>
 564
 565         * configure.in: Fix help string for --enable-targets option.
 566         * configure: Regenerate.
 567
 568 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 569
 570         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 571         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 572         overrun and avoid excessive copying.
 573
 574         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 575         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 576         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 577         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 578         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 579         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 580         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 581         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 582         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 583         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 584         (struct m68k_cpu): Change chip field to control_regs.
 585         (current_chip): Remove.
 586         (control_regs): New.
 587         (m68k_archs, m68k_extensions): Adjust.
 588         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 589         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 590         (find_cf_chip): Reimplement for new organization of cpu table.
 591         (select_control_regs): Remove.
 592         (mri_chip): Adjust.
 593         (struct save_opts): Save control regs, not chip.
 594         (s_save, s_restore): Adjust.
 595         (m68k_lookup_cpu): Give deprecated warning when necessary.
 596         (m68k_init_arch): Adjust.
 597         (md_show_usage): Adjust for new cpu table organization.
 598
 599 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 600
 601         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 602         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 603         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 604         "elf/bfin.h".
 605         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 606         (any_gotrel): New rule.
 607         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 608         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 609         "elf/bfin.h".
 610         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 611         (bfin_pic_ptr): New function.
 612         (md_pseudo_table): Add it for ".picptr".
 613         (OPTION_FDPIC): New macro.
 614         (md_longopts): Add -mfdpic.
 615         (md_parse_option): Handle it.
 616         (md_begin): Set BFD flags.
 617         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 618         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 619         us for GOT relocs.
 620         * Makefile.am (bfin-parse.o): Update dependencies.
 621         (DEPTC_bfin_elf): Likewise.
 622         * Makefile.in: Regenerate.
 623
 624 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 625
 626         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 627         mcfemac instead of mcfmac.
 628
 629 2006-03-23  Michael Matz  <matz@suse.de>
 630
 631         * config/tc-i386.c (type_names): Correct placement of 'static'.
 632         (reloc): Map some more relocs to their 64 bit counterpart when
 633         size is 8.
 634         (output_insn): Work around breakage if DEBUG386 is defined.
 635         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 636         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 637         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 638         different from i386.
 639         (output_imm): Ditto.
 640         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 641         Imm64.
 642         (md_convert_frag): Jumps can now be larger than 2GB away, error
 643         out in that case.
 644         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 645         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 646
 647 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 648             Daniel Jacobowitz  <dan@codesourcery.com>
 649             Phil Edwards  <phil@codesourcery.com>
 650             Zack Weinberg  <zack@codesourcery.com>
 651             Mark Mitchell  <mark@codesourcery.com>
 652             Nathan Sidwell  <nathan@codesourcery.com>
 653
 654         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 655         (md_begin): Complain about -G being used for PIC.  Don't change
 656         the text, data and bss alignments on VxWorks.
 657         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 658         generating VxWorks PIC.
 659         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 660         (macro): Likewise, but do not treat la $25 specially for
 661         VxWorks PIC, and do not handle jal.
 662         (OPTION_MVXWORKS_PIC): New macro.
 663         (md_longopts): Add -mvxworks-pic.
 664         (md_parse_option): Don't complain about using PIC and -G together here.
 665         Handle OPTION_MVXWORKS_PIC.
 666         (md_estimate_size_before_relax): Always use the first relaxation
 667         sequence on VxWorks.
 668         * config/tc-mips.h (VXWORKS_PIC): New.
 669
 670 2006-03-21  Paul Brook  <paul@codesourcery.com>
 671
 672         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 673
 674 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 675
 676         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 677         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 678         (get_loop_align_size): New.
 679         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 680         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 681         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 682         (get_noop_aligned_address): Use get_loop_align_size.
 683         (get_aligned_diff): Likewise.
 684
 685 2006-03-21  Paul Brook  <paul@codesourcery.com>
 686
 687         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 688
 689 2006-03-20  Paul Brook  <paul@codesourcery.com>
 690
 691         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 692         (do_t_branch): Encode branches inside IT blocks as unconditional.
 693         (do_t_cps): New function.
 694         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 695         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 696         (opcode_lookup): Allow conditional suffixes on all instructions in
 697         Thumb mode.
 698         (md_assemble): Advance condexec state before checking for errors.
 699         (insns): Use do_t_cps.
 700
 701 2006-03-20  Paul Brook  <paul@codesourcery.com>
 702
 703         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 704         outputting the insn.
 705
 706 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 707
 708         * config/tc-vax.c: Update copyright year.
 709         * config/tc-vax.h: Likewise.
 710
 711 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 712
 713         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 714         make it static.
 715         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 716
 717 2006-03-17  Paul Brook  <paul@codesourcery.com>
 718
 719         * config/tc-arm.c (insns): Add ldm and stm.
 720
 721 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 722
 723         PR gas/2446
 724         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 725
 726 2006-03-16  Paul Brook  <paul@codesourcery.com>
 727
 728         * config/tc-arm.c (insns): Add "svc".
 729
 730 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 731
 732         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 733         flag and avoid double underscore prefixes.
 734
 735 2006-03-10  Paul Brook  <paul@codesourcery.com>
 736
 737         * config/tc-arm.c (md_begin): Handle EABIv5.
 738         (arm_eabis): Add EF_ARM_EABI_VER5.
 739         * doc/c-arm.texi: Document -meabi=5.
 740
 741 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 742
 743         * app.c (do_scrub_chars): Simplify string handling.
 744
 745 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 746             Daniel Jacobowitz  <dan@codesourcery.com>
 747             Zack Weinberg  <zack@codesourcery.com>
 748             Nathan Sidwell  <nathan@codesourcery.com>
 749             Paul Brook  <paul@codesourcery.com>
 750             Ricardo Anguiano  <anguiano@codesourcery.com>
 751             Phil Edwards  <phil@codesourcery.com>
 752
 753         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 754         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 755         R_ARM_ABS12 reloc.
 756         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 757         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 758         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 759
 760 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 761
 762         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 763         even when using the text-section-literals option.
 764
 765 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 766
 767         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 768         and cf.
 769         (m68k_ip): <case 'J'> Check we have some control regs.
 770         (md_parse_option): Allow raw arch switch.
 771         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 772         whether 68881 or cfloat was meant by -mfloat.
 773         (md_show_usage): Adjust extension display.
 774         (m68k_elf_final_processing): Adjust.
 775
 776 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 777
 778         * config/tc-avr.c (avr_mod_hash_value): New function.
 779         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 780         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 781         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 782         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 783         of (int).
 784         (tc_gen_reloc): Handle substractions of symbols, if possible do
 785         fixups, abort otherwise.
 786         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 787         tc_fix_adjustable): Define.
 788
 789 2006-03-02  James E Wilson  <wilson@specifix.com>
 790
 791         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 792         change the template, then clear md.slot[curr].end_of_insn_group.
 793
 794 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 795
 796         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 797
 798 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 799
 800         PR/1070
 801         * macro.c (getstring): Don't treat parentheses special anymore.
 802         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 803         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 804         characters.
 805
 806 2006-02-28  Mat <mat@csail.mit.edu>
 807
 808         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 809
 810 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 811
 812         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 813         field.
 814         (CFI_signal_frame): Define.
 815         (cfi_pseudo_table): Add .cfi_signal_frame.
 816         (dot_cfi): Handle CFI_signal_frame.
 817         (output_cie): Handle cie->signal_frame.
 818         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 819         different.  Copy signal_frame from FDE to newly created CIE.
 820         * doc/as.texinfo: Document .cfi_signal_frame.
 821
 822 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 823
 824         * doc/Makefile.am: Add html target.
 825         * doc/Makefile.in: Regenerate.
 826         * po/Make-in: Add html target.
 827
 828 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 829
 830         * config/tc-i386.c (output_insn): Support Intel Merom New
 831         Instructions.
 832
 833         * config/tc-i386.h (CpuMNI): New.
 834         (CpuUnknownFlags): Add CpuMNI.
 835
 836 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 837
 838         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 839         (hpriv_reg_table): New table for hyperprivileged registers.
 840         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 841         register encoding.
 842
 843 2006-02-24  DJ Delorie  <dj@redhat.com>
 844
 845         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 846         (tc_gen_reloc): Don't define.
 847         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 848         (OPTION_LINKRELAX): New.
 849         (md_longopts): Add it.
 850         (m32c_relax): New.
 851         (md_parse_options): Set it.
 852         (md_assemble): Emit relaxation relocs as needed.
 853         (md_convert_frag): Emit relaxation relocs as needed.
 854         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 855         (m32c_apply_fix): New.
 856         (tc_gen_reloc): New.
 857         (m32c_force_relocation): Force out jump relocs when relaxing.
 858         (m32c_fix_adjustable): Return false if relaxing.
 859
 860 2006-02-24  Paul Brook  <paul@codesourcery.com>
 861
 862         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 863         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 864         (struct asm_barrier_opt): Define.
 865         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 866         (parse_psr): Accept V7M psr names.
 867         (parse_barrier): New function.
 868         (enum operand_parse_code): Add OP_oBARRIER.
 869         (parse_operands): Implement OP_oBARRIER.
 870         (do_barrier): New function.
 871         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 872         (do_t_cpsi): Add V7M restrictions.
 873         (do_t_mrs, do_t_msr): Validate V7M variants.
 874         (md_assemble): Check for NULL variants.
 875         (v7m_psrs, barrier_opt_names): New tables.
 876         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 877         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 878         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 879         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 880         (struct cpu_arch_ver_table): Define.
 881         (cpu_arch_ver): New.
 882         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 883         Tag_CPU_arch_profile.
 884         * doc/c-arm.texi: Document new cpu and arch options.
 885
 886 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 887
 888         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 889
 890 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 891
 892         * config/tc-ia64.c: Update copyright years.
 893
 894 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 895
 896         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 897         SDM 2.2.
 898
 899 2005-02-22  Paul Brook  <paul@codesourcery.com>
 900
 901         * config/tc-arm.c (do_pld): Remove incorrect write to
 902         inst.instruction.
 903         (encode_thumb32_addr_mode): Use correct operand.
 904
 905 2006-02-21  Paul Brook  <paul@codesourcery.com>
 906
 907         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 908
 909 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 910             Anil Paranjape   <anilp1@kpitcummins.com>
 911             Shilin Shakti    <shilins@kpitcummins.com>
 912
 913         * Makefile.am: Add xc16x related entry.
 914         * Makefile.in: Regenerate.
 915         * configure.in: Added xc16x related entry.
 916         * configure: Regenerate.
 917         * config/tc-xc16x.h: New file
 918         * config/tc-xc16x.c: New file
 919         * doc/c-xc16x.texi: New file for xc16x
 920         * doc/all.texi: Entry for xc16x
 921         * doc/Makefile.texi: Added c-xc16x.texi
 922         * NEWS: Announce the support for the new target.
 923
 924 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 925
 926         * configure.tgt: set emulation for mips-*-netbsd*
 927
 928 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 929
 930         * config.in: Rebuilt.
 931
 932 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 933
 934         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 935         from 1, not 0, in error messages.
 936         (md_assemble): Simplify special-case check for ENTRY instructions.
 937         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 938         operand in error message.
 939
 940 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 941
 942         * configure.tgt (arm-*-linux-gnueabi*): Change to
 943         arm-*-linux-*eabi*.
 944
 945 2006-02-10  Nick Clifton  <nickc@redhat.com>
 946
 947         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 948         32-bit value is propagated into the upper bits of a 64-bit long.
 949
 950         * config/tc-arc.c (init_opcode_tables): Fix cast.
 951         (arc_extoper, md_operand): Likewise.
 952
 953 2006-02-09  David Heine  <dlheine@tensilica.com>
 954
 955         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
 956         each relaxation step.
 957
 958 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
 959
 960         * configure.in (CHECK_DECLS): Add vsnprintf.
 961         * configure: Regenerate.
 962         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
 963         include/declare here, but...
 964         * as.h: Move code detecting VARARGS idiom to the top.
 965         (errno.h, stdarg.h, varargs.h, va_list): ...here.
 966         (vsnprintf): Declare if not already declared.
 967
 968 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 969
 970         * as.c (close_output_file): New.
 971         (main): Register close_output_file with xatexit before
 972         dump_statistics. Don't call output_file_close.
 973
 974 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 975
 976         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
 977         mcf5329_control_regs): New.
 978         (not_current_architecture, selected_arch, selected_cpu): New.
 979         (m68k_archs, m68k_extensions): New.
 980         (archs): Renamed to ...
 981         (m68k_cpus): ... here.  Adjust.
 982         (n_arches): Remove.
 983         (md_pseudo_table): Add arch and cpu directives.
 984         (find_cf_chip, m68k_ip): Adjust table scanning.
 985         (no_68851, no_68881): Remove.
 986         (md_assemble): Lazily initialize.
 987         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
 988         (md_init_after_args): Move functionality to m68k_init_arch.
 989         (mri_chip): Adjust table scanning.
 990         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
 991         options with saner parsing.
 992         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
 993         m68k_init_arch): New.
 994         (s_m68k_cpu, s_m68k_arch): New.
 995         (md_show_usage): Adjust.
 996         (m68k_elf_final_processing): Set CF EF flags.
 997         * config/tc-m68k.h (m68k_init_after_args): Remove.
 998         (tc_init_after_args): Remove.
 999         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1000         (M68k-Directives): Document .arch and .cpu directives.
1001
1002 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
1003
1004         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1005         synonyms for equ and defl.
1006         (z80_cons_fix_new): New function.
1007         (emit_byte): Disallow relative jumps to absolute locations.
1008         (emit_data): Only handle defb, prototype changed, because defb is
1009         now handled as pseudo-op rather than an instruction.
1010         (instab): Entries for defb,defw,db,dw moved from here...
1011         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1012         Add entries for def24,def32,d24,d32.
1013         (md_assemble): Improved error handling.
1014         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1015         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1016         (z80_cons_fix_new): Declare.
1017         * doc/c-z80.texi (defb, db): Mention warning on overflow.
1018         (def24,d24,def32,d32): New pseudo-ops.
1019
1020 2006-02-02  Paul Brook  <paul@codesourcery.com>
1021
1022         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1023
1024 2005-02-02  Paul Brook  <paul@codesourcery.com>
1025
1026         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1027         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1028         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1029         T2_OPCODE_RSB): Define.
1030         (thumb32_negate_data_op): New function.
1031         (md_apply_fix): Use it.
1032
1033 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
1034
1035         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1036         fields.
1037         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1038         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1039         subtracted symbols.
1040         (relaxation_requirements): Add pfinish_frag argument and use it to
1041         replace setting tinsn->record_fix fields.
1042         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1043         and vinsn_to_insnbuf.  Remove references to record_fix and
1044         slot_sub_symbols fields.
1045         (xtensa_mark_narrow_branches): Delete unused code.
1046         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1047         a symbol.
1048         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1049         record_fix fields.
1050         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1051         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1052         of the record_fix field.  Simplify error messages for unexpected
1053         symbolic operands.
1054         (set_expr_symbol_offset_diff): Delete.
1055
1056 2006-01-31  Paul Brook  <paul@codesourcery.com>
1057
1058         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1059
1060 2006-01-31  Paul Brook  <paul@codesourcery.com>
1061         Richard Earnshaw <rearnsha@arm.com>
1062
1063         * config/tc-arm.c: Use arm_feature_set.
1064         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1065         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1066         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1067         New variables.
1068         (insns): Use them.
1069         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1070         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1071         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1072         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1073         feature flags.
1074         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1075         (arm_opts): Move old cpu/arch options from here...
1076         (arm_legacy_opts): ... to here.
1077         (md_parse_option): Search arm_legacy_opts.
1078         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1079         (arm_float_abis, arm_eabis): Make const.
1080
1081 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1082
1083         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1084
1085 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1086
1087         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1088         in load immediate intruction.
1089
1090 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1091
1092         * config/bfin-parse.y (value_match): Use correct conversion
1093         specifications in template string for __FILE__ and __LINE__.
1094         (binary): Ditto.
1095         (unary): Ditto.
1096
1097 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1098
1099         Introduce TLS descriptors for i386 and x86_64.
1100         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1101         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1102         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1103         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1104         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1105         displacement bits.
1106         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1107         (lex_got): Handle @tlsdesc and @tlscall.
1108         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1109
1110 2006-01-11  Nick Clifton  <nickc@redhat.com>
1111
1112         Fixes for building on 64-bit hosts:
1113         * config/tc-avr.c (mod_index): New union to allow conversion
1114         between pointers and integers.
1115         (md_begin, avr_ldi_expression): Use it.
1116         * config/tc-i370.c (md_assemble): Add cast for argument to print
1117         statement.
1118         * config/tc-tic54x.c (subsym_substitute): Likewise.
1119         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1120         opindex field of fr_cgen structure into a pointer so that it can
1121         be stored in a frag.
1122         * config/tc-mn10300.c (md_assemble): Likewise.
1123         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1124         types.
1125         * config/tc-v850.c: Replace uses of (int) casts with correct
1126         types.
1127
1128 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1129
1130         PR gas/2117
1131         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1132
1133 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1134
1135         PR gas/2101
1136         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1137         a local-label reference.
1138
1139 For older changes see ChangeLog-2005
1140 \f
1141 Local Variables:
1142 mode: change-log
1143 left-margin: 8
1144 fill-column: 74
1145 version-control: never
1146 End: