Add AMD bdver4 support.
[deliverable/binutils-gdb.git] / gas / ChangeLog
1 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
2
3 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
4 * doc/c-i386.texi: Add -march=bdver4 option.
5
6 2013-09-20 Alan Modra <amodra@gmail.com>
7
8 * configure: Regenerate.
9
10 2013-09-18 Tristan Gingold <gingold@adacore.com>
11
12 * NEWS: Add marker for 2.24.
13
14 2013-09-18 Nick Clifton <nickc@redhat.com>
15
16 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
17 (move_data): New variable.
18 (md_parse_option): Parse -md.
19 (msp430_section): New function. Catch references to the .bss or
20 .data sections and generate a special symbol for use by the libcrt
21 library.
22 (md_pseudo_table): Intercept .section directives.
23 (md_longopt): Add -md
24 (md_show_usage): Likewise.
25 (msp430_operands): Generate a warning message if a NOP is inserted
26 into the instruction stream.
27 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
28
29 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
30
31 * config/tc-mips.c (mips_elf_final_processing): Set
32 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
33
34 2013-09-16 Will Newton <will.newton@linaro.org>
35
36 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
37 disallowing element size 64 with interleave other than 1.
38
39 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
40
41 * config/tc-mips.c (match_insn): Set error when $31 is used for
42 bltzal* and bgezal*.
43
44 2013-09-04 Tristan Gingold <gingold@adacore.com>
45
46 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
47 symbols.
48
49 2013-09-04 Roland McGrath <mcgrathr@google.com>
50
51 PR gas/15914
52 * config/tc-arm.c (T16_32_TAB): Add _udf.
53 (do_t_udf): New function.
54 (insns): Add "udf".
55
56 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
57
58 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
59 assembler errors at correct position.
60
61 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
62
63 PR binutils/15834
64 * config/tc-ia64.c: Fix typos.
65 * config/tc-sparc.c: Likewise.
66 * config/tc-z80.c: Likewise.
67 * doc/c-i386.texi: Likewise.
68 * doc/c-m32r.texi: Likewise.
69
70 2013-08-23 Will Newton <will.newton@linaro.org>
71
72 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
73 for pre-indexed addressing modes.
74
75 2013-08-21 Alan Modra <amodra@gmail.com>
76
77 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
78 range check label number for use with fb_low_counter array.
79
80 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
81
82 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
83 (mips_parse_argument_token, validate_micromips_insn, md_begin)
84 (check_regno, match_float_constant, check_completed_insn, append_insn)
85 (match_insn, match_mips16_insn, match_insns, macro_start)
86 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
87 (mips16_ip, mips_set_option_string, md_parse_option)
88 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
89 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
90 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
91 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
92 Start error messages with a lower-case letter. Do not end error
93 messages with a period. Wrap long messages to 80 character-lines.
94 Use "cannot" instead of "can't" and "can not".
95
96 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
97
98 * config/tc-mips.c (imm_expr): Expand comment.
99 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
100 when populated.
101
102 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
103
104 * config/tc-mips.c (imm2_expr): Delete.
105 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
106
107 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
108
109 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
110 (macro): Remove M_DEXT and M_DINS handling.
111
112 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
113
114 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
115 lax_max with lax_match.
116 (match_int_operand): Update accordingly. Don't report an error
117 for !lax_match-only cases.
118 (match_insn): Replace more_alts with lax_match and use it to
119 initialize the mips_arg_info field. Add a complete_p parameter.
120 Handle implicit VU0 suffixes here.
121 (match_invalid_for_isa, match_insns, match_mips16_insns): New
122 functions.
123 (mips_ip, mips16_ip): Use them.
124
125 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
126
127 * config/tc-mips.c (match_expression): Report uses of registers here.
128 Add a "must be an immediate expression" error. Handle elided offsets
129 here rather than...
130 (match_int_operand): ...here.
131
132 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
133
134 * config/tc-mips.c (mips_arg_info): Remove soft_match.
135 (match_out_of_range, match_not_constant): New functions.
136 (match_const_int): Remove fallback parameter and check for soft_match.
137 Use match_not_constant.
138 (match_mapped_int_operand, match_addiusp_operand)
139 (match_perf_reg_operand, match_save_restore_list_operand)
140 (match_mdmx_imm_reg_operand): Update accordingly. Use
141 match_out_of_range and set_insn_error* instead of as_bad.
142 (match_int_operand): Likewise. Use match_not_constant in the
143 !allows_nonconst case.
144 (match_float_constant): Report invalid float constants.
145 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
146 match_float_constant to check for invalid constants. Fail the
147 match if match_const_int or match_float_constant return false.
148 (mips_ip): Update accordingly.
149 (mips16_ip): Likewise. Undo null termination of instruction name
150 once lookup is complete.
151
152 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
153
154 * config/tc-mips.c (mips_insn_error_format): New enum.
155 (mips_insn_error): New struct.
156 (insn_error): Change to a mips_insn_error.
157 (clear_insn_error, set_insn_error_format, set_insn_error)
158 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
159 functions.
160 (mips_parse_argument_token, md_assemble, match_insn)
161 (match_mips16_insn): Use them instead of manipulating insn_error
162 directly.
163 (mips_ip, mips16_ip): Likewise. Simplify control flow.
164
165 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
166
167 * config/tc-mips.c (normalize_constant_expr): Move further up file.
168 (normalize_address_expr): Likewise.
169 (match_insn, match_mips16_insn): New functions, split out from...
170 (mips_ip, mips16_ip): ...here.
171
172 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
173
174 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
175 OP_OPTIONAL_REG.
176 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
177 for optional operands.
178
179 2013-08-16 Alan Modra <amodra@gmail.com>
180
181 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
182 modifiers generally.
183
184 2013-08-16 Alan Modra <amodra@gmail.com>
185
186 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
187
188 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
189
190 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
191 argument as alignment.
192
193 2013-08-09 Nick Clifton <nickc@redhat.com>
194
195 * config/tc-rl78.c (elf_flags): New variable.
196 (enum options): Add OPTION_G10.
197 (md_longopts): Add mg10.
198 (md_parse_option): Parse -mg10.
199 (rl78_elf_final_processing): New function.
200 * config/tc-rl78.c (tc_final_processing): Define.
201 * doc/c-rl78.texi: Document -mg10 option.
202
203 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
204
205 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
206 suffixes to be elided too.
207 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
208 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
209 to be omitted too.
210
211 2013-08-05 John Tytgat <john@bass-software.com>
212
213 * po/POTFILES.in: Regenerate.
214
215 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
216 Konrad Eisele <konrad@gaisler.com>
217
218 * config/tc-sparc.c (sparc_arch_types): Add leon.
219 (sparc_arch): Move sparc4 around and add leon.
220 (sparc_target_format): Document -Aleon.
221 * doc/c-sparc.texi: Likewise.
222
223 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
224
225 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
226
227 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
228 Richard Sandiford <rdsandiford@googlemail.com>
229
230 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
231 (RWARN): Bump to 0x8000000.
232 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
233 (RTYPE_R5900_ACC): New register types.
234 (RTYPE_MASK): Include them.
235 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
236 macros.
237 (reg_names): Include them.
238 (mips_parse_register_1): New function, split out from...
239 (mips_parse_register): ...here. Add a channels_ptr parameter.
240 Look for VU0 channel suffixes when nonnull.
241 (reg_lookup): Update the call to mips_parse_register.
242 (mips_parse_vu0_channels): New function.
243 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
244 (mips_operand_token): Add a "channels" field to the union.
245 Extend the comment above "ch" to OT_DOUBLE_CHAR.
246 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
247 (mips_parse_argument_token): Handle channel suffixes here too.
248 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
249 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
250 Handle '#' formats.
251 (md_begin): Register $vfN and $vfI registers.
252 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
253 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
254 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
255 (match_vu0_suffix_operand): New function.
256 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
257 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
258 (mips_lookup_insn): New function.
259 (mips_ip): Use it. Allow "+K" operands to be elided at the end
260 of an instruction. Handle '#' sequences.
261
262 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
263
264 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
265 values and use it instead of sreg, treg, xreg, etc.
266
267 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
268
269 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
270 and mips_int_operand_max.
271 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
272 Delete.
273 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
274 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
275 instead of mips16_immed_operand.
276
277 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
278
279 * config/tc-mips.c (mips16_macro): Don't use move_register.
280 (mips16_ip): Allow macros to use 'p'.
281
282 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
283
284 * config/tc-mips.c (MAX_OPERANDS): New macro.
285 (mips_operand_array): New structure.
286 (mips_operands, mips16_operands, micromips_operands): New arrays.
287 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
288 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
289 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
290 (micromips_to_32_reg_q_map): Delete.
291 (insn_operands, insn_opno, insn_extract_operand): New functions.
292 (validate_mips_insn): Take a mips_operand_array as argument and
293 use it to build up a list of operands. Extend to handle INSN_MACRO
294 and MIPS16.
295 (validate_mips16_insn): New function.
296 (validate_micromips_insn): Take a mips_operand_array as argument.
297 Handle INSN_MACRO.
298 (md_begin): Initialize mips_operands, mips16_operands and
299 micromips_operands. Call validate_mips_insn and
300 validate_micromips_insn for macro instructions too.
301 Call validate_mips16_insn for MIPS16 instructions.
302 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
303 New functions.
304 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
305 them. Handle INSN_UDI.
306 (get_append_method): Use gpr_read_mask.
307
308 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
309
310 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
311 flags for MIPS16 and non-MIPS16 instructions.
312 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
313 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
314 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
315 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
316 and non-MIPS16 instructions. Fix formatting.
317
318 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
319
320 * config/tc-mips.c (reg_needs_delay): Move later in file.
321 Use gpr_write_mask.
322 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
323
324 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
325 Alexander Ivchenko <alexander.ivchenko@intel.com>
326 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
327 Sergey Lega <sergey.s.lega@intel.com>
328 Anna Tikhonova <anna.tikhonova@intel.com>
329 Ilya Tocar <ilya.tocar@intel.com>
330 Andrey Turetskiy <andrey.turetskiy@intel.com>
331 Ilya Verbin <ilya.verbin@intel.com>
332 Kirill Yukhin <kirill.yukhin@intel.com>
333 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
334
335 * config/tc-i386-intel.c (O_zmmword_ptr): New.
336 (i386_types): Add zmmword.
337 (i386_intel_simplify_register): Allow regzmm.
338 (i386_intel_simplify): Handle zmmwords.
339 (i386_intel_operand): Handle RC/SAE, vector operations and
340 zmmwords.
341 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
342 (struct RC_Operation): New.
343 (struct Mask_Operation): New.
344 (struct Broadcast_Operation): New.
345 (vex_prefix): Size of bytes increased to 4 to support EVEX
346 encoding.
347 (enum i386_error): Add new error codes: unsupported_broadcast,
348 broadcast_not_on_src_operand, broadcast_needed,
349 unsupported_masking, mask_not_on_destination, no_default_mask,
350 unsupported_rc_sae, rc_sae_operand_not_last_imm,
351 invalid_register_operand, try_vector_disp8.
352 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
353 rounding, broadcast, memshift.
354 (struct RC_name): New.
355 (RC_NamesTable): New.
356 (evexlig): New.
357 (evexwig): New.
358 (extra_symbol_chars): Add '{'.
359 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
360 (i386_operand_type): Add regzmm, regmask and vec_disp8.
361 (match_mem_size): Handle zmmwords.
362 (operand_type_match): Handle zmm-registers.
363 (mode_from_disp_size): Handle vec_disp8.
364 (fits_in_vec_disp8): New.
365 (md_begin): Handle {} properly.
366 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
367 (build_vex_prefix): Handle vrex.
368 (build_evex_prefix): New.
369 (process_immext): Adjust to properly handle EVEX.
370 (md_assemble): Add EVEX encoding support.
371 (swap_2_operands): Correctly handle operands with masking,
372 broadcasting or RC/SAE.
373 (check_VecOperands): Support EVEX features.
374 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
375 (match_template): Support regzmm and handle new error codes.
376 (process_suffix): Handle zmmwords and zmm-registers.
377 (check_byte_reg): Extend to zmm-registers.
378 (process_operands): Extend to zmm-registers.
379 (build_modrm_byte): Handle EVEX.
380 (output_insn): Adjust to properly handle EVEX case.
381 (disp_size): Handle vec_disp8.
382 (output_disp): Support compressed disp8*N evex feature.
383 (output_imm): Handle RC/SAE immediates properly.
384 (check_VecOperations): New.
385 (i386_immediate): Handle EVEX features.
386 (i386_index_check): Handle zmmwords and zmm-registers.
387 (RC_SAE_immediate): New.
388 (i386_att_operand): Handle EVEX features.
389 (parse_real_register): Add a check for ZMM/Mask registers.
390 (OPTION_MEVEXLIG): New.
391 (OPTION_MEVEXWIG): New.
392 (md_longopts): Add mevexlig and mevexwig.
393 (md_parse_option): Handle mevexlig and mevexwig options.
394 (md_show_usage): Add description for mevexlig and mevexwig.
395 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
396 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
397
398 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
399
400 * config/tc-i386.c (cpu_arch): Add .sha.
401 * doc/c-i386.texi: Document sha/.sha.
402
403 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
404 Kirill Yukhin <kirill.yukhin@intel.com>
405 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
406
407 * config/tc-i386.c (BND_PREFIX): New.
408 (struct _i386_insn): Add new field bnd_prefix.
409 (add_bnd_prefix): New.
410 (cpu_arch): Add MPX.
411 (i386_operand_type): Add regbnd.
412 (md_assemble): Handle BND prefixes.
413 (parse_insn): Likewise.
414 (output_branch): Likewise.
415 (output_jump): Likewise.
416 (build_modrm_byte): Handle regbnd.
417 (OPTION_MADD_BND_PREFIX): New.
418 (md_longopts): Add entry for 'madd-bnd-prefix'.
419 (md_parse_option): Handle madd-bnd-prefix option.
420 (md_show_usage): Add description for madd-bnd-prefix
421 option.
422 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
423
424 2013-07-24 Tristan Gingold <gingold@adacore.com>
425
426 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
427 xcoff targets.
428
429 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
430
431 * config/tc-s390.c (s390_machine): Don't force the .machine
432 argument to lower case.
433
434 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
435
436 * config/tc-arm.c (s_arm_arch_extension): Improve error message
437 for invalid extension.
438
439 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
440
441 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
442 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
443 (aarch64_abi): New variable.
444 (ilp32_p): Change to be a macro.
445 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
446 (struct aarch64_option_abi_value_table): New struct.
447 (aarch64_abis): New table.
448 (aarch64_parse_abi): New function.
449 (aarch64_long_opts): Add entry for -mabi=.
450 * doc/as.texinfo (Target AArch64 options): Document -mabi.
451 * doc/c-aarch64.texi: Likewise.
452
453 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
454
455 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
456 unsigned comparison.
457
458 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
459
460 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
461 RX610.
462 * config/rx-parse.y: (rx_check_float_support): Add function to
463 check floating point operation support for target RX100 and
464 RX200.
465 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
466 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
467 RX200, RX600, and RX610
468
469 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
470
471 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
472
473 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
474
475 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
476 * doc/c-avr.texi: Likewise.
477
478 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
479
480 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
481 error with older GCCs.
482 (mips16_macro_build): Dereference args.
483
484 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
485
486 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
487 New functions, split out from...
488 (reg_lookup): ...here. Remove itbl support.
489 (reglist_lookup): Delete.
490 (mips_operand_token_type): New enum.
491 (mips_operand_token): New structure.
492 (mips_operand_tokens): New variable.
493 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
494 (mips_parse_arguments): New functions.
495 (md_begin): Initialize mips_operand_tokens.
496 (mips_arg_info): Add a token field. Remove optional_reg field.
497 (match_char, match_expression): New functions.
498 (match_const_int): Use match_expression. Remove "s" argument
499 and return a boolean result. Remove O_register handling.
500 (match_regno, match_reg, match_reg_range): New functions.
501 (match_int_operand, match_mapped_int_operand, match_msb_operand)
502 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
503 (match_addiusp_operand, match_clo_clz_dest_operand)
504 (match_lwm_swm_list_operand, match_entry_exit_operand)
505 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
506 (match_tied_reg_operand): Remove "s" argument and return a boolean
507 result. Match tokens rather than text. Update calls to
508 match_const_int. Rely on match_regno to call check_regno.
509 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
510 "arg" argument. Return a boolean result.
511 (parse_float_constant): Replace with...
512 (match_float_constant): ...this new function.
513 (match_operand): Remove "s" argument and return a boolean result.
514 Update calls to subfunctions.
515 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
516 rather than string-parsing routines. Update handling of optional
517 registers for token scheme.
518
519 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
520
521 * config/tc-mips.c (parse_float_constant): Split out from...
522 (mips_ip): ...here.
523
524 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
525
526 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
527 Delete.
528
529 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
530
531 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
532 (match_entry_exit_operand): New function.
533 (match_save_restore_list_operand): Likewise.
534 (match_operand): Use them.
535 (check_absolute_expr): Delete.
536 (mips16_ip): Rewrite main parsing loop to use mips_operands.
537
538 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
539
540 * config/tc-mips.c: Enable functions commented out in previous patch.
541 (SKIP_SPACE_TABS): Move further up file.
542 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
543 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
544 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
545 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
546 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
547 (micromips_imm_b_map, micromips_imm_c_map): Delete.
548 (mips_lookup_reg_pair): Delete.
549 (macro): Use report_bad_range and report_bad_field.
550 (mips_immed, expr_const_in_range): Delete.
551 (mips_ip): Rewrite main parsing loop to use new functions.
552
553 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
554
555 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
556 Change return type to bfd_boolean.
557 (report_bad_range, report_bad_field): New functions.
558 (mips_arg_info): New structure.
559 (match_const_int, convert_reg_type, check_regno, match_int_operand)
560 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
561 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
562 (match_addiusp_operand, match_clo_clz_dest_operand)
563 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
564 (match_pc_operand, match_tied_reg_operand, match_operand)
565 (check_completed_insn): New functions, commented out for now.
566
567 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
568
569 * config/tc-mips.c (insn_insert_operand): New function.
570 (macro_build, mips16_macro_build): Put null character check
571 in the for loop and convert continues to breaks. Use operand
572 structures to handle constant operands.
573
574 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
575
576 * config/tc-mips.c (validate_mips_insn): Move further up file.
577 Add insn_bits and decode_operand arguments. Use the mips_operand
578 fields to work out which bits an operand occupies. Detect double
579 definitions.
580 (validate_micromips_insn): Move further up file. Call into
581 validate_mips_insn.
582
583 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
584
585 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
586
587 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
588
589 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
590 and "~".
591 (macro): Update accordingly.
592
593 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
594
595 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
596 (imm_reloc): Delete.
597 (md_assemble): Remove imm_reloc handling.
598 (mips_ip): Update commentary. Use offset_expr and offset_reloc
599 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
600 Use a temporary array rather than imm_reloc when parsing
601 constant expressions. Remove imm_reloc initialization.
602 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
603 for the relaxable field. Use a relax_char variable to track the
604 type of this field. Remove imm_reloc initialization.
605
606 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
607
608 * config/tc-mips.c (mips16_ip): Handle "I".
609
610 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
611
612 * config/tc-mips.c (mips_flag_nan2008): New variable.
613 (options): Add OPTION_NAN enum value.
614 (md_longopts): Handle it.
615 (md_parse_option): Likewise.
616 (s_nan): New function.
617 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
618 (md_show_usage): Add -mnan.
619
620 * doc/as.texinfo (Overview): Add -mnan.
621 * doc/c-mips.texi (MIPS Opts): Document -mnan.
622 (MIPS NaN Encodings): New node. Document .nan directive.
623 (MIPS-Dependent): List the new node.
624
625 2013-07-09 Tristan Gingold <gingold@adacore.com>
626
627 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
628
629 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
630
631 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
632 for 'A' and assume that the constant has been elided if the result
633 is an O_register.
634
635 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
636
637 * config/tc-mips.c (gprel16_reloc_p): New function.
638 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
639 BFD_RELOC_UNUSED.
640 (offset_high_part, small_offset_p): New functions.
641 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
642 register load and store macros, handle the 16-bit offset case first.
643 If a 16-bit offset is not suitable for the instruction we're
644 generating, load it into the temporary register using
645 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
646 M_L_DAB code once the address has been constructed. For double load
647 and store macros, again handle the 16-bit offset case first.
648 If the second register cannot be accessed from the same high
649 part as the first, load it into AT using ADDRESS_ADDI_INSN.
650 Fix the handling of LD in cases where the first register is the
651 same as the base. Also handle the case where the offset is
652 not 16 bits and the second register cannot be accessed from the
653 same high part as the first. For unaligned loads and stores,
654 fuse the offbits == 12 and old "ab" handling. Apply this handling
655 whenever the second offset needs a different high part from the first.
656 Construct the offset using ADDRESS_ADDI_INSN where possible,
657 for offbits == 16 as well as offbits == 12. Use offset_reloc
658 when constructing the individual loads and stores.
659 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
660 and offset_reloc before matching against a particular opcode.
661 Handle elided 'A' constants. Allow 'A' constants to use
662 relocation operators.
663
664 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
665
666 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
667 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
668 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
669
670 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
671
672 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
673 Require the msb to be <= 31 for "+s". Check that the size is <= 31
674 for both "+s" and "+S".
675
676 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
677
678 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
679 (mips_ip, mips16_ip): Handle "+i".
680
681 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
682
683 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
684 (micromips_to_32_reg_h_map): Rename to...
685 (micromips_to_32_reg_h_map1): ...this.
686 (micromips_to_32_reg_i_map): Rename to...
687 (micromips_to_32_reg_h_map2): ...this.
688 (mips_lookup_reg_pair): New function.
689 (gpr_write_mask, macro): Adjust after above renaming.
690 (validate_micromips_insn): Remove "mi" handling.
691 (mips_ip): Likewise. Parse both registers in a pair for "mh".
692
693 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
694
695 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
696 (mips_ip): Remove "+D" and "+T" handling.
697
698 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
699
700 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
701 relocs.
702
703 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
704
705 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
706
707 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
708
709 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
710 (aarch64_force_relocation): Likewise.
711
712 2013-07-02 Alan Modra <amodra@gmail.com>
713
714 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
715
716 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
717
718 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
719 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
720 Replace @sc{mips16} with literal `MIPS16'.
721 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
722
723 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
724
725 * config/tc-aarch64.c (reloc_table): Replace
726 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
727 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
728 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
729 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
730 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
731 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
732 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
733 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
734 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
735 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
736 (aarch64_force_relocation): Likewise.
737
738 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
739
740 * config/tc-aarch64.c (ilp32_p): New static variable.
741 (elf64_aarch64_target_format): Return the target according to the
742 value of 'ilp32_p'.
743 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
744 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
745 (aarch64_dwarf2_addr_size): New function.
746 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
747 (DWARF2_ADDR_SIZE): New define.
748
749 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
750
751 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
752
753 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
754
755 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
756
757 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
758
759 * config/tc-mips.c (mips_set_options): Add insn32 member.
760 (mips_opts): Initialize it.
761 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
762 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
763 (md_longopts): Add "minsn32" and "mno-insn32" options.
764 (is_size_valid): Handle insn32 mode.
765 (md_assemble): Pass instruction string down to macro.
766 (brk_fmt): Add second dimension and insn32 mode initializers.
767 (mfhl_fmt): Likewise.
768 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
769 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
770 (macro_build_jalr, move_register): Handle insn32 mode.
771 (macro_build_branch_rs): Likewise.
772 (macro): Handle insn32 mode.
773 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
774 (mips_ip): Handle insn32 mode.
775 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
776 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
777 (mips_handle_align): Handle insn32 mode.
778 (md_show_usage): Add -minsn32 and -mno-insn32.
779
780 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
781 -mno-insn32 options.
782 (-minsn32, -mno-insn32): New options.
783 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
784 options.
785 (MIPS assembly options): New node. Document .set insn32 and
786 .set noinsn32.
787 (MIPS-Dependent): List the new node.
788
789 2013-06-25 Nick Clifton <nickc@redhat.com>
790
791 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
792 the PC in indirect addressing on 430xv2 parts.
793 (msp430_operands): Add version test to hardware bug encoding
794 restrictions.
795
796 2013-06-24 Roland McGrath <mcgrathr@google.com>
797
798 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
799 so it skips whitespace before it.
800 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
801
802 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
803 (arm_reg_parse_multi): Skip whitespace first.
804 (parse_reg_list): Likewise.
805 (parse_vfp_reg_list): Likewise.
806 (s_arm_unwind_save_mmxwcg): Likewise.
807
808 2013-06-24 Nick Clifton <nickc@redhat.com>
809
810 PR gas/15623
811 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
812
813 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
814
815 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
816
817 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
818
819 * config/tc-mips.c: Assert that offsetT and valueT are at least
820 8 bytes in size.
821 (GPR_SMIN, GPR_SMAX): New macros.
822 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
823
824 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
825
826 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
827 conditions. Remove any code deselected by them.
828 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
829
830 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
831
832 * NEWS: Note removal of ECOFF support.
833 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
834 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
835 (MULTI_CFILES): Remove config/e-mipsecoff.c.
836 * Makefile.in: Regenerate.
837 * configure.in: Remove MIPS ECOFF references.
838 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
839 Delete cases.
840 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
841 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
842 (mips-*-*): ...this single case.
843 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
844 MIPS emulations to be e-mipself*.
845 * configure: Regenerate.
846 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
847 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
848 (mips-*-sysv*): Remove coff and ecoff cases.
849 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
850 * ecoff.c: Remove reference to MIPS ECOFF.
851 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
852 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
853 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
854 (mips_hi_fixup): Tweak comment.
855 (append_insn): Require a howto.
856 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
857
858 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
859
860 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
861 Use "CPU" instead of "cpu".
862 * doc/c-mips.texi: Likewise.
863 (MIPS Opts): Rename to MIPS Options.
864 (MIPS option stack): Rename to MIPS Option Stack.
865 (MIPS ASE instruction generation overrides): Rename to
866 MIPS ASE Instruction Generation Overrides (for now).
867 (MIPS floating-point): Rename to MIPS Floating-Point.
868
869 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
870
871 * doc/c-mips.texi (MIPS Macros): New section.
872 (MIPS Object): Replace with...
873 (MIPS Small Data): ...this new section.
874
875 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
876
877 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
878 Capitalize name. Use @kindex instead of @cindex for .set entries.
879
880 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
881
882 * doc/c-mips.texi (MIPS Stabs): Remove section.
883
884 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
885
886 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
887 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
888 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
889 (ISA_SUPPORTS_VIRT64_ASE): Delete.
890 (mips_ase): New structure.
891 (mips_ases): New table.
892 (FP64_ASES): New macro.
893 (mips_ase_groups): New array.
894 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
895 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
896 functions.
897 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
898 (md_parse_option): Use mips_ases and mips_set_ase instead of
899 separate case statements for each ASE option.
900 (mips_after_parse_args): Use FP64_ASES. Use
901 mips_check_isa_supports_ases to check the ASEs against
902 other options.
903 (s_mipsset): Use mips_ases and mips_set_ase instead of
904 separate if statements for each ASE option. Use
905 mips_check_isa_supports_ases, even when a non-ASE option
906 is specified.
907
908 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
909
910 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
911
912 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
913
914 * config/tc-mips.c (md_shortopts, options, md_longopts)
915 (md_longopts_size): Move earlier in file.
916
917 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
918
919 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
920 with a single "ase" bitmask.
921 (mips_opts): Update accordingly.
922 (file_ase, file_ase_explicit): New variables.
923 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
924 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
925 (ISA_HAS_ROR): Adjust for mips_set_options change.
926 (is_opcode_valid): Take the base ase mask directly from mips_opts.
927 (mips_ip): Adjust for mips_set_options change.
928 (md_parse_option): Likewise. Update file_ase_explicit.
929 (mips_after_parse_args): Adjust for mips_set_options change.
930 Use bitmask operations to select the default ASEs. Set file_ase
931 rather than individual per-ASE variables.
932 (s_mipsset): Adjust for mips_set_options change.
933 (mips_elf_final_processing): Test file_ase rather than
934 file_ase_mdmx. Remove commented-out code.
935
936 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
937
938 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
939 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
940 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
941 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
942 (mips_after_parse_args): Use the new "ase" field to choose
943 the default ASEs.
944 (mips_cpu_info_table): Move ASEs from the "flags" field to the
945 "ase" field.
946
947 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
948
949 * config/tc-arm.c (symbol_preemptible): New function.
950 (relax_branch): Use it.
951
952 2013-06-17 Catherine Moore <clm@codesourcery.com>
953 Maciej W. Rozycki <macro@codesourcery.com>
954 Chao-Ying Fu <fu@mips.com>
955
956 * config/tc-mips.c (mips_set_options): Add ase_eva.
957 (mips_set_options mips_opts): Add ase_eva.
958 (file_ase_eva): Declare.
959 (ISA_SUPPORTS_EVA_ASE): Define.
960 (IS_SEXT_9BIT_NUM): Define.
961 (MIPS_CPU_ASE_EVA): Define.
962 (is_opcode_valid): Add support for ase_eva.
963 (macro_build): Likewise.
964 (macro): Likewise.
965 (validate_mips_insn): Likewise.
966 (validate_micromips_insn): Likewise.
967 (mips_ip): Likewise.
968 (options): Add OPTION_EVA and OPTION_NO_EVA.
969 (md_longopts): Add -meva and -mno-eva.
970 (md_parse_option): Process new options.
971 (mips_after_parse_args): Check for valid EVA combinations.
972 (s_mipsset): Likewise.
973
974 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
975
976 * dwarf2dbg.h (dwarf2_move_insn): Declare.
977 * dwarf2dbg.c (line_subseg): Add pmove_tail.
978 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
979 (dwarf2_gen_line_info_1): Update call accordingly.
980 (dwarf2_move_insn): New function.
981 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
982
983 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
984
985 Revert:
986
987 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
988
989 PR gas/13024
990 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
991 (dwarf2_gen_line_info_1): Delete.
992 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
993 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
994 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
995 (dwarf2_directive_loc): Push previous .locs instead of generating
996 them immediately.
997
998 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
999
1000 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1001 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1002
1003 2013-06-13 Nick Clifton <nickc@redhat.com>
1004
1005 PR gas/15602
1006 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1007 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1008 function. Generates an error if the adjusted offset is out of a
1009 16-bit range.
1010
1011 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1012
1013 * config/tc-nios2.c (md_apply_fix): Mask constant
1014 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1015
1016 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1017
1018 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1019 MIPS-3D instructions either.
1020 (md_convert_frag): Update the COPx branch mask accordingly.
1021
1022 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1023 option.
1024 * doc/as.texinfo (Overview): Add --relax-branch and
1025 --no-relax-branch.
1026 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1027 --no-relax-branch.
1028
1029 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1030
1031 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1032 omitted.
1033
1034 2013-06-08 Catherine Moore <clm@codesourcery.com>
1035
1036 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1037 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1038 (append_insn): Change INSN_xxxx to ASE_xxxx.
1039
1040 2013-06-01 George Thomas <george.thomas@atmel.com>
1041
1042 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1043 AVR_ISA_XMEGAU
1044
1045 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1046
1047 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1048 for ELF.
1049
1050 2013-05-31 Paul Brook <paul@codesourcery.com>
1051
1052 * config/tc-mips.c (s_ehword): New.
1053
1054 2013-05-30 Paul Brook <paul@codesourcery.com>
1055
1056 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1057
1058 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1059
1060 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1061 convert relocs who have no relocatable field either. Rephrase
1062 the conditional so that the PC-relative check is only applied
1063 for REL targets.
1064
1065 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1066
1067 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1068 calculation.
1069
1070 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1071
1072 * config/tc-aarch64.c (reloc_table): Update to use
1073 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1074 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1075 (md_apply_fix): Likewise.
1076 (aarch64_force_relocation): Likewise.
1077
1078 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1079
1080 * config/tc-arm.c (it_fsm_post_encode): Improve
1081 warning messages about deprecated IT block formats.
1082
1083 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1084
1085 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1086 inside fx_done condition.
1087
1088 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1089
1090 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1091
1092 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1093
1094 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1095 and clean up warning when using PRINT_OPCODE_TABLE.
1096
1097 2013-05-20 Alan Modra <amodra@gmail.com>
1098
1099 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1100 and data fixups performing shift/high adjust/sign extension on
1101 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1102 when writing data fixups rather than recalculating size.
1103
1104 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1105
1106 * doc/c-msp430.texi: Fix typo.
1107
1108 2013-05-16 Tristan Gingold <gingold@adacore.com>
1109
1110 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1111 are also TOC symbols.
1112
1113 2013-05-16 Nick Clifton <nickc@redhat.com>
1114
1115 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1116 Add -mcpu command to specify core type.
1117 * doc/c-msp430.texi: Update documentation.
1118
1119 2013-05-09 Andrew Pinski <apinski@cavium.com>
1120
1121 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1122 (mips_opts): Update for the new field.
1123 (file_ase_virt): New variable.
1124 (ISA_SUPPORTS_VIRT_ASE): New macro.
1125 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1126 (MIPS_CPU_ASE_VIRT): New define.
1127 (is_opcode_valid): Handle ase_virt.
1128 (macro_build): Handle "+J".
1129 (validate_mips_insn): Likewise.
1130 (mips_ip): Likewise.
1131 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1132 (md_longopts): Add mvirt and mnovirt
1133 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1134 (mips_after_parse_args): Handle ase_virt field.
1135 (s_mipsset): Handle "virt" and "novirt".
1136 (mips_elf_final_processing): Add a comment about virt ASE might need
1137 a new flag.
1138 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1139 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1140 Document ".set virt" and ".set novirt".
1141
1142 2013-05-09 Alan Modra <amodra@gmail.com>
1143
1144 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1145 control of operand flag bits.
1146
1147 2013-05-07 Alan Modra <amodra@gmail.com>
1148
1149 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1150 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1151 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1152 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1153 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1154 Shift and sign-extend fieldval for use by some VLE reloc
1155 operand->insert functions.
1156
1157 2013-05-06 Paul Brook <paul@codesourcery.com>
1158 Catherine Moore <clm@codesourcery.com>
1159
1160 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1161 (limited_pcrel_reloc_p): Likewise.
1162 (md_apply_fix): Likewise.
1163 (tc_gen_reloc): Likewise.
1164
1165 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1166
1167 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1168 (mips_fix_adjustable): Adjust pc-relative check to use
1169 limited_pc_reloc_p.
1170
1171 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1172
1173 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1174 (s_mips_stab): Do not restrict to stabn only.
1175
1176 2013-05-02 Nick Clifton <nickc@redhat.com>
1177
1178 * config/tc-msp430.c: Add support for the MSP430X architecture.
1179 Add code to insert a NOP instruction after any instruction that
1180 might change the interrupt state.
1181 Add support for the LARGE memory model.
1182 Add code to initialise the .MSP430.attributes section.
1183 * config/tc-msp430.h: Add support for the MSP430X architecture.
1184 * doc/c-msp430.texi: Document the new -mL and -mN command line
1185 options.
1186 * NEWS: Mention support for the MSP430X architecture.
1187
1188 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1189
1190 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1191 alpha*-*-linux*ecoff*.
1192
1193 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1194
1195 * config/tc-mips.c (mips_ip): Add sizelo.
1196 For "+C", "+G", and "+H", set sizelo and compare against it.
1197
1198 2013-04-29 Nick Clifton <nickc@redhat.com>
1199
1200 * as.c (Options): Add -gdwarf-sections.
1201 (parse_args): Likewise.
1202 * as.h (flag_dwarf_sections): Declare.
1203 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1204 (process_entries): When -gdwarf-sections is enabled generate
1205 fragmentary .debug_line sections.
1206 (out_debug_line): Set the section for the .debug_line section end
1207 symbol.
1208 * doc/as.texinfo: Document -gdwarf-sections.
1209 * NEWS: Mention -gdwarf-sections.
1210
1211 2013-04-26 Christian Groessler <chris@groessler.org>
1212
1213 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1214 according to the target parameter. Don't call s_segm since s_segm
1215 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1216 initialized yet.
1217 (md_begin): Call s_segm according to target parameter from command
1218 line.
1219
1220 2013-04-25 Alan Modra <amodra@gmail.com>
1221
1222 * configure.in: Allow little-endian linux.
1223 * configure: Regenerate.
1224
1225 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1226
1227 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1228 "fstatus" control register to "eccinj".
1229
1230 2013-04-19 Kai Tietz <ktietz@redhat.com>
1231
1232 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1233
1234 2013-04-15 Julian Brown <julian@codesourcery.com>
1235
1236 * expr.c (add_to_result, subtract_from_result): Make global.
1237 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1238 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1239 subtract_from_result to handle extra bit of precision for .sleb128
1240 directive operands.
1241
1242 2013-04-10 Julian Brown <julian@codesourcery.com>
1243
1244 * read.c (convert_to_bignum): Add sign parameter. Use it
1245 instead of X_unsigned to determine sign of resulting bignum.
1246 (emit_expr): Pass extra argument to convert_to_bignum.
1247 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1248 X_extrabit to convert_to_bignum.
1249 (parse_bitfield_cons): Set X_extrabit.
1250 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1251 Initialise X_extrabit field as appropriate.
1252 (add_to_result): New.
1253 (subtract_from_result): New.
1254 (expr): Use above.
1255 * expr.h (expressionS): Add X_extrabit field.
1256
1257 2013-04-10 Jan Beulich <jbeulich@suse.com>
1258
1259 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1260 register being PC when is_t or writeback, and use distinct
1261 diagnostic for the latter case.
1262
1263 2013-04-10 Jan Beulich <jbeulich@suse.com>
1264
1265 * gas/config/tc-arm.c (parse_operands): Re-write
1266 po_barrier_or_imm().
1267 (do_barrier): Remove bogus constraint().
1268 (do_t_barrier): Remove.
1269
1270 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1271
1272 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1273 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1274 ATmega2564RFR2
1275 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1276
1277 2013-04-09 Jan Beulich <jbeulich@suse.com>
1278
1279 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1280 Use local variable Rt in more places.
1281 (do_vmsr): Accept all control registers.
1282
1283 2013-04-09 Jan Beulich <jbeulich@suse.com>
1284
1285 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1286 if there was none specified for moves between scalar and core
1287 register.
1288
1289 2013-04-09 Jan Beulich <jbeulich@suse.com>
1290
1291 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1292 NEON_ALL_LANES case.
1293
1294 2013-04-08 Jan Beulich <jbeulich@suse.com>
1295
1296 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1297 PC-relative VSTR.
1298
1299 2013-04-08 Jan Beulich <jbeulich@suse.com>
1300
1301 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1302 entry to sp_fiq.
1303
1304 2013-04-03 Alan Modra <amodra@gmail.com>
1305
1306 * doc/as.texinfo: Add support to generate man options for h8300.
1307 * doc/c-h8300.texi: Likewise.
1308
1309 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1310
1311 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1312 Cortex-A57.
1313
1314 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1315
1316 PR binutils/15068
1317 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1318
1319 2013-03-26 Nick Clifton <nickc@redhat.com>
1320
1321 PR gas/15295
1322 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1323 start of the file each time.
1324
1325 PR gas/15178
1326 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1327 FreeBSD targets.
1328
1329 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1330
1331 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1332 after fixup.
1333
1334 2013-03-21 Will Newton <will.newton@linaro.org>
1335
1336 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1337 pc-relative str instructions in Thumb mode.
1338
1339 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1340
1341 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1342 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1343 R_H8_DISP32A16.
1344 * config/tc-h8300.h: Remove duplicated defines.
1345
1346 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1347
1348 PR gas/15282
1349 * tc-avr.c (mcu_has_3_byte_pc): New function.
1350 (tc_cfi_frame_initial_instructions): Call it to find return
1351 address size.
1352
1353 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1354
1355 PR gas/15095
1356 * config/tc-tic6x.c (tic6x_try_encode): Handle
1357 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1358 encode register pair numbers when required.
1359
1360 2013-03-15 Will Newton <will.newton@linaro.org>
1361
1362 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1363 in vstr in Thumb mode for pre-ARMv7 cores.
1364
1365 2013-03-14 Andreas Schwab <schwab@suse.de>
1366
1367 * doc/c-arc.texi (ARC Directives): Revert last change and use
1368 @itemize instead of @table.
1369 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1370
1371 2013-03-14 Nick Clifton <nickc@redhat.com>
1372
1373 PR gas/15273
1374 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1375 NULL message, instead just check ARM_CPU_IS_ANY directly.
1376
1377 2013-03-14 Nick Clifton <nickc@redhat.com>
1378
1379 PR gas/15212
1380 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1381 for table format.
1382 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1383 to the @item directives.
1384 (ARM-Neon-Alignment): Move to correct place in the document.
1385 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1386 formatting.
1387 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1388 @smallexample.
1389
1390 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1391
1392 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1393 case. Add default BAD_CASE to switch.
1394
1395 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1396
1397 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1398 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1399
1400 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1401
1402 * config/tc-arm.c (crc_ext_armv8): New feature set.
1403 (UNPRED_REG): New macro.
1404 (do_crc32_1): New function.
1405 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1406 do_crc32ch, do_crc32cw): Likewise.
1407 (TUEc): New macro.
1408 (insns): Add entries for crc32 mnemonics.
1409 (arm_extensions): Add entry for crc.
1410
1411 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1412
1413 * write.h (struct fix): Add fx_dot_frag field.
1414 (dot_frag): Declare.
1415 * write.c (dot_frag): New variable.
1416 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1417 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1418 * expr.c (expr): Save value of frag_now in dot_frag when setting
1419 dot_value.
1420 * read.c (emit_expr): Likewise. Delete comments.
1421
1422 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1423
1424 * config/tc-i386.c (flag_code_names): Removed.
1425 (i386_index_check): Rewrote.
1426
1427 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1428
1429 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1430 add comment.
1431 (aarch64_double_precision_fmovable): New function.
1432 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1433 function; handle hexadecimal representation of IEEE754 encoding.
1434 (parse_operands): Update the call to parse_aarch64_imm_float.
1435
1436 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1437
1438 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1439 (check_hle): Updated.
1440 (md_assemble): Likewise.
1441 (parse_insn): Likewise.
1442
1443 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1444
1445 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1446 (md_assemble): Check if REP prefix is OK.
1447 (parse_insn): Remove expecting_string_instruction. Set
1448 i.rep_prefix.
1449
1450 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1451
1452 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1453
1454 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1455
1456 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1457 for system registers.
1458
1459 2013-02-27 DJ Delorie <dj@redhat.com>
1460
1461 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1462 (rl78_op): Handle %code().
1463 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1464 (tc_gen_reloc): Likwise; convert to a computed reloc.
1465 (md_apply_fix): Likewise.
1466
1467 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1468
1469 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1470
1471 2013-02-25 Terry Guo <terry.guo@arm.com>
1472
1473 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1474 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1475 list of accepted CPUs.
1476
1477 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1478
1479 PR gas/15159
1480 * config/tc-i386.c (cpu_arch): Add ".smap".
1481
1482 * doc/c-i386.texi: Document smap.
1483
1484 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1485
1486 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1487 mips_assembling_insn appropriately.
1488 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1489
1490 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1491
1492 * config/tc-mips.c (append_insn): Correct indentation, remove
1493 extraneous braces.
1494
1495 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1496
1497 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1498
1499 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1500
1501 * configure.tgt: Add nios2-*-rtems*.
1502
1503 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1504
1505 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1506 NULL.
1507
1508 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1509
1510 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1511 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1512
1513 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1514
1515 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1516 core.
1517
1518 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1519 Andrew Jenner <andrew@codesourcery.com>
1520
1521 Based on patches from Altera Corporation.
1522
1523 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1524 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1525 * Makefile.in: Regenerated.
1526 * configure.tgt: Add case for nios2*-linux*.
1527 * config/obj-elf.c: Conditionally include elf/nios2.h.
1528 * config/tc-nios2.c: New file.
1529 * config/tc-nios2.h: New file.
1530 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1531 * doc/Makefile.in: Regenerated.
1532 * doc/all.texi: Set NIOSII.
1533 * doc/as.texinfo (Overview): Add Nios II options.
1534 (Machine Dependencies): Include c-nios2.texi.
1535 * doc/c-nios2.texi: New file.
1536 * NEWS: Note Altera Nios II support.
1537
1538 2013-02-06 Alan Modra <amodra@gmail.com>
1539
1540 PR gas/14255
1541 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1542 Don't skip fixups with fx_subsy non-NULL.
1543 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1544 with fx_subsy non-NULL.
1545
1546 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1547
1548 * doc/c-metag.texi: Add "@c man" markers.
1549
1550 2013-02-04 Alan Modra <amodra@gmail.com>
1551
1552 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1553 related code.
1554 (TC_ADJUST_RELOC_COUNT): Delete.
1555 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1556
1557 2013-02-04 Alan Modra <amodra@gmail.com>
1558
1559 * po/POTFILES.in: Regenerate.
1560
1561 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1562
1563 * config/tc-metag.c: Make SWAP instruction less permissive with
1564 its operands.
1565
1566 2013-01-29 DJ Delorie <dj@redhat.com>
1567
1568 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1569 relocs in .word/.etc statements.
1570
1571 2013-01-29 Roland McGrath <mcgrathr@google.com>
1572
1573 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1574 immediate value for 8-bit offset" error so it shows line info.
1575
1576 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1577
1578 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1579 for 64-bit output.
1580
1581 2013-01-24 Nick Clifton <nickc@redhat.com>
1582
1583 * config/tc-v850.c: Add support for e3v5 architecture.
1584 * doc/c-v850.texi: Mention new support.
1585
1586 2013-01-23 Nick Clifton <nickc@redhat.com>
1587
1588 PR gas/15039
1589 * config/tc-avr.c: Include dwarf2dbg.h.
1590
1591 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1592
1593 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1594 (tc_i386_fix_adjustable): Likewise.
1595 (lex_got): Likewise.
1596 (tc_gen_reloc): Likewise.
1597
1598 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1599
1600 * config/tc-aarch64.c (output_operand_error_record): Change to output
1601 the out-of-range error message as value-expected message if there is
1602 only one single value in the expected range.
1603 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1604 LSL #0 as a programmer-friendly feature.
1605
1606 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1607
1608 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1609 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1610 BFD_RELOC_64_SIZE relocations.
1611 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1612 for it.
1613 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1614 relocations against local symbols.
1615
1616 2013-01-16 Alan Modra <amodra@gmail.com>
1617
1618 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1619 finding some sort of toc syntax error, and break to avoid
1620 compiler uninit warning.
1621
1622 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1623
1624 PR gas/15019
1625 * config/tc-i386.c (lex_got): Increment length by 1 if the
1626 relocation token is removed.
1627
1628 2013-01-15 Nick Clifton <nickc@redhat.com>
1629
1630 * config/tc-v850.c (md_assemble): Allow signed values for
1631 V850E_IMMEDIATE.
1632
1633 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1634
1635 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1636 git to cvs.
1637
1638 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1639
1640 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1641 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1642 * config/tc-ppc.c (md_show_usage): Likewise.
1643 (ppc_handle_align): Handle power8's group ending nop.
1644
1645 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1646
1647 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1648 that the assember exits after the opcodes have been printed.
1649
1650 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1651
1652 * app.c: Remove trailing white spaces.
1653 * as.c: Likewise.
1654 * as.h: Likewise.
1655 * cond.c: Likewise.
1656 * dw2gencfi.c: Likewise.
1657 * dwarf2dbg.h: Likewise.
1658 * ecoff.c: Likewise.
1659 * input-file.c: Likewise.
1660 * itbl-lex.h: Likewise.
1661 * output-file.c: Likewise.
1662 * read.c: Likewise.
1663 * sb.c: Likewise.
1664 * subsegs.c: Likewise.
1665 * symbols.c: Likewise.
1666 * write.c: Likewise.
1667 * config/tc-i386.c: Likewise.
1668 * doc/Makefile.am: Likewise.
1669 * doc/Makefile.in: Likewise.
1670 * doc/c-aarch64.texi: Likewise.
1671 * doc/c-alpha.texi: Likewise.
1672 * doc/c-arc.texi: Likewise.
1673 * doc/c-arm.texi: Likewise.
1674 * doc/c-avr.texi: Likewise.
1675 * doc/c-bfin.texi: Likewise.
1676 * doc/c-cr16.texi: Likewise.
1677 * doc/c-d10v.texi: Likewise.
1678 * doc/c-d30v.texi: Likewise.
1679 * doc/c-h8300.texi: Likewise.
1680 * doc/c-hppa.texi: Likewise.
1681 * doc/c-i370.texi: Likewise.
1682 * doc/c-i386.texi: Likewise.
1683 * doc/c-i860.texi: Likewise.
1684 * doc/c-m32c.texi: Likewise.
1685 * doc/c-m32r.texi: Likewise.
1686 * doc/c-m68hc11.texi: Likewise.
1687 * doc/c-m68k.texi: Likewise.
1688 * doc/c-microblaze.texi: Likewise.
1689 * doc/c-mips.texi: Likewise.
1690 * doc/c-msp430.texi: Likewise.
1691 * doc/c-mt.texi: Likewise.
1692 * doc/c-s390.texi: Likewise.
1693 * doc/c-score.texi: Likewise.
1694 * doc/c-sh.texi: Likewise.
1695 * doc/c-sh64.texi: Likewise.
1696 * doc/c-tic54x.texi: Likewise.
1697 * doc/c-tic6x.texi: Likewise.
1698 * doc/c-v850.texi: Likewise.
1699 * doc/c-xc16x.texi: Likewise.
1700 * doc/c-xgate.texi: Likewise.
1701 * doc/c-xtensa.texi: Likewise.
1702 * doc/c-z80.texi: Likewise.
1703 * doc/internals.texi: Likewise.
1704
1705 2013-01-10 Roland McGrath <mcgrathr@google.com>
1706
1707 * hash.c (hash_new_sized): Make it global.
1708 * hash.h: Declare it.
1709 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1710 pass a small size.
1711
1712 2013-01-10 Will Newton <will.newton@imgtec.com>
1713
1714 * Makefile.am: Add Meta.
1715 * Makefile.in: Regenerate.
1716 * config/tc-metag.c: New file.
1717 * config/tc-metag.h: New file.
1718 * configure.tgt: Add Meta.
1719 * doc/Makefile.am: Add Meta.
1720 * doc/Makefile.in: Regenerate.
1721 * doc/all.texi: Add Meta.
1722 * doc/as.texiinfo: Document Meta options.
1723 * doc/c-metag.texi: New file.
1724
1725 2013-01-09 Steve Ellcey <sellcey@mips.com>
1726
1727 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1728 calls.
1729 * config/tc-mips.c (internalError): Remove, replace with abort.
1730
1731 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1732
1733 * config/tc-aarch64.c (parse_operands): Change to compare the result
1734 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1735
1736 2013-01-07 Nick Clifton <nickc@redhat.com>
1737
1738 PR gas/14887
1739 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1740 anticipated character.
1741 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1742 here as it is no longer needed.
1743
1744 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1745
1746 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1747 * doc/c-score.texi (SCORE-Opts): Likewise.
1748 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1749
1750 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1751
1752 * config/tc-mips.c: Add support for MIPS r5900.
1753 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1754 lq and sq.
1755 (can_swap_branch_p, get_append_method): Detect some conditional
1756 short loops to fix a bug on the r5900 by NOP in the branch delay
1757 slot.
1758 (M_MUL): Support 3 operands in multu on r5900.
1759 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1760 (s_mipsset): Force 32 bit floating point on r5900.
1761 (mips_ip): Check parameter range of instructions mfps and mtps on
1762 r5900.
1763 * configure.in: Detect CPU type when target string contains r5900
1764 (e.g. mips64r5900el-linux-gnu).
1765
1766 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1767
1768 * as.c (parse_args): Update copyright year to 2013.
1769
1770 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1771
1772 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1773 and "cortex57".
1774
1775 2013-01-02 Nick Clifton <nickc@redhat.com>
1776
1777 PR gas/14987
1778 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1779 closing bracket.
1780
1781 For older changes see ChangeLog-2012
1782 \f
1783 Copyright (C) 2013 Free Software Foundation, Inc.
1784
1785 Copying and distribution of this file, with or without modification,
1786 are permitted in any medium without royalty provided the copyright
1787 notice and this notice are preserved.
1788
1789 Local Variables:
1790 mode: change-log
1791 left-margin: 8
1792 fill-column: 74
1793 version-control: never
1794 End:
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