1 2006-09-07 Paul Brook <paul@codesourcery.com>
3 * config/tc-arm.c (parse_operands): Mark operand as present.
5 2006-09-04 Paul Brook <paul@codesourcery.com>
7 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
8 (do_neon_dyadic_if_i_d): Avoid setting U bit.
9 (do_neon_mac_maybe_scalar): Ditto.
10 (do_neon_dyadic_narrow): Force operand type to NT_integer.
11 (insns): Remove out of date comments.
13 2006-08-29 Nick Clifton <nickc@redhat.com>
15 * read.c (s_align): Initialize the 'stopc' variable to prevent
16 compiler complaints about it being used without being
18 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
19 s_float_space, s_struct, cons_worker, equals): Likewise.
21 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
23 * ecoff.c (ecoff_directive_val): Fix message typo.
24 * config/tc-ns32k.c (convert_iif): Likewise.
25 * config/tc-sh64.c (shmedia_check_limits): Likewise.
27 2006-08-25 Sterling Augustine <sterling@tensilica.com>
28 Bob Wilson <bob.wilson@acm.org>
30 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
31 the state of the absolute_literals directive. Remove align frag at
32 the start of the literal pool position.
34 2006-08-25 Bob Wilson <bob.wilson@acm.org>
36 * doc/c-xtensa.texi: Add @group commands in examples.
38 2006-08-24 Bob Wilson <bob.wilson@acm.org>
40 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
41 (INIT_LITERAL_SECTION_NAME): Delete.
42 (lit_state struct): Remove segment names, init_lit_seg, and
43 fini_lit_seg. Add lit_prefix and current_text_seg.
44 (init_literal_head_h, init_literal_head): Delete.
45 (fini_literal_head_h, fini_literal_head): Delete.
46 (xtensa_begin_directive): Move argument parsing to
47 xtensa_literal_prefix function.
48 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
49 (xtensa_literal_prefix): Parse the directive argument here and
50 record it in the lit_prefix field. Remove code to derive literal
53 (get_is_linkonce_section): Use linkonce_len. Check for any
54 ".gnu.linkonce.*" section, not just text sections.
55 (md_begin): Remove initialization of deleted lit_state fields.
56 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
57 to init_literal_head and fini_literal_head.
58 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
59 when traversing literal_head list.
60 (match_section_group): New.
61 (cache_literal_section): Rewrite to determine the literal section
62 name on the fly, create the section and return it.
63 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
64 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
65 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
66 Use xtensa_get_property_section from bfd.
67 (retrieve_xtensa_section): Delete.
68 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
69 description to refer to plural literal sections and add xref to
70 the Literal Directive section.
71 (Literal Directive): Describe new rules for deriving literal section
72 names. Add footnote for special case of .init/.fini with
73 --text-section-literals.
74 (Literal Prefix Directive): Replace old naming rules with xref to the
75 Literal Directive section.
77 2006-08-21 Joseph Myers <joseph@codesourcery.com>
79 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
80 merging with previous long opcode.
82 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
84 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
85 * Makefile.in: Regenerate.
86 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
89 2006-08-16 Julian Brown <julian@codesourcery.com>
91 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
92 to use ARM instructions on non-ARM-supporting cores.
93 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
94 mode automatically based on cpu variant.
95 (md_begin): Call above function.
97 2006-08-16 Julian Brown <julian@codesourcery.com>
99 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
100 recognized in non-unified syntax mode.
102 2006-08-15 Thiemo Seufer <ths@mips.com>
103 Nigel Stephens <nigel@mips.com>
104 David Ung <davidu@mips.com>
106 * configure.tgt: Handle mips*-sde-elf*.
108 2006-08-12 Thiemo Seufer <ths@networkno.de>
110 * config/tc-mips.c (mips16_ip): Fix argument register handling
111 for restore instruction.
113 2006-08-08 Bob Wilson <bob.wilson@acm.org>
115 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
117 (out_fixed_inc_line_addr): New.
118 (process_entries): Use out_fixed_inc_line_addr when
119 DWARF2_USE_FIXED_ADVANCE_PC is set.
120 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
122 2006-08-08 DJ Delorie <dj@redhat.com>
124 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
125 vs full symbols so that we never have more than one pointer value
126 for any given symbol in our symbol table.
128 2006-08-08 Sterling Augustine <sterling@tensilica.com>
130 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
131 and emit DW_AT_ranges when code in compilation unit is not
133 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
135 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
136 (out_debug_ranges): New function to emit .debug_ranges section
137 when code is not contiguous.
139 2006-08-08 Nick Clifton <nickc@redhat.com>
141 * config/tc-arm.c (WARN_DEPRECATED): Enable.
143 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
145 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
147 (pe_directive_secrel) [TE_PE]: New function.
148 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
149 loc, loc_mark_labels.
150 [TE_PE]: Handle secrel32.
151 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
153 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
154 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
155 (md_section_align): Only round section sizes here for AOUT
157 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
158 (tc_pe_dwarf2_emit_offset): New function.
159 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
160 (cons_fix_new_arm): Handle O_secrel.
161 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
162 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
163 of OBJ_ELF only block.
164 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
165 tc_pe_dwarf2_emit_offset.
167 2006-08-04 Richard Sandiford <richard@codesourcery.com>
169 * config/tc-sh.c (apply_full_field_fix): New function.
170 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
171 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
172 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
173 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
175 2006-08-03 Nick Clifton <nickc@redhat.com>
178 * config.in: Regenerate.
180 2006-08-03 Joseph Myers <joseph@codesourcery.com>
182 * config/tc-arm.c (parse_operands): Handle invalid register name
185 2006-08-03 Joseph Myers <joseph@codesourcery.com>
187 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
188 (parse_operands): Handle it.
189 (insns): Use it for tmcr and tmrc.
191 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
194 * config/tc-i386.c (md_parse_option): Treat any target starting
195 with elf64_x86_64 as a viable target for the -64 switch.
196 (i386_target_format): For 64-bit ELF flavoured output use
198 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
200 2006-08-02 Nick Clifton <nickc@redhat.com>
203 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
205 * configure.in: Run BFD_BINARY_FOPEN.
206 * configure: Regenerate.
207 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
210 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
212 * config/tc-i386.c (md_assemble): Don't update
215 2006-08-01 Thiemo Seufer <ths@mips.com>
217 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
219 2006-08-01 Thiemo Seufer <ths@mips.com>
221 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
222 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
223 BFD_RELOC_32 and BFD_RELOC_16.
224 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
225 md_convert_frag, md_obj_end): Fix comment formatting.
227 2006-07-31 Thiemo Seufer <ths@mips.com>
229 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
230 handling for BFD_RELOC_MIPS16_JMP.
232 2006-07-24 Andreas Schwab <schwab@suse.de>
235 * read.c (read_a_source_file): Ignore unknown text after line
236 comment character. Fix misleading comment.
238 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
240 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
241 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
242 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
243 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
244 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
245 doc/c-z80.texi, doc/internals.texi: Fix some typos.
247 2006-07-21 Nick Clifton <nickc@redhat.com>
249 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
252 2006-07-20 Thiemo Seufer <ths@mips.com>
253 Nigel Stephens <nigel@mips.com>
255 * config/tc-mips.c (md_parse_option): Don't infer optimisation
256 options from debug options.
258 2006-07-20 Thiemo Seufer <ths@mips.com>
260 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
261 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
263 2006-07-19 Paul Brook <paul@codesourcery.com>
265 * config/tc-arm.c (insns): Fix rbit Arm opcode.
267 2006-07-18 Paul Brook <paul@codesourcery.com>
269 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
270 (md_convert_frag): Use correct reloc for add_pc. Use
271 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
272 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
273 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
275 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
277 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
278 when file and line unknown.
280 2006-07-17 Thiemo Seufer <ths@mips.com>
282 * read.c (s_struct): Use IS_ELF.
283 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
284 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
285 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
286 s_mips_mask): Likewise.
288 2006-07-16 Thiemo Seufer <ths@mips.com>
289 David Ung <davidu@mips.com>
291 * read.c (s_struct): Handle ELF section changing.
292 * config/tc-mips.c (s_align): Leave enabling auto-align to the
294 (s_change_sec): Try section changing only if we output ELF.
296 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
298 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
300 (smallest_imm_type): Remove Cpu086.
301 (i386_target_format): Likewise.
303 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
306 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
307 Michael Meissner <michael.meissner@amd.com>
309 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
310 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
311 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
313 (i386_align_code): Ditto.
314 (md_assemble_code): Add support for insertq/extrq instructions,
315 swapping as needed for intel syntax.
316 (swap_imm_operands): New function to swap immediate operands.
317 (swap_operands): Deal with 4 operand instructions.
318 (build_modrm_byte): Add support for insertq instruction.
320 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
322 * config/tc-i386.h (Size64): Fix a typo in comment.
324 2006-07-12 Nick Clifton <nickc@redhat.com>
326 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
327 fixup_segment() to repeat a range check on a value that has
328 already been checked here.
330 2006-07-07 James E Wilson <wilson@specifix.com>
332 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
334 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
335 Nick Clifton <nickc@redhat.com>
338 * doc/as.texi: Fix spelling typo: branchs => branches.
339 * doc/c-m68hc11.texi: Likewise.
340 * config/tc-m68hc11.c: Likewise.
341 Support old spelling of command line switch for backwards
344 2006-07-04 Thiemo Seufer <ths@mips.com>
345 David Ung <davidu@mips.com>
347 * config/tc-mips.c (s_is_linkonce): New function.
348 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
349 weak, external, and linkonce symbols.
350 (pic_need_relax): Use s_is_linkonce.
352 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
354 * doc/as.texinfo (Org): Remove space.
355 (P2align): Add "@var{abs-expr},".
357 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
359 * config/tc-i386.c (cpu_arch_tune_set): New.
360 (cpu_arch_isa): Likewise.
361 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
362 nops with short or long nop sequences based on -march=/.arch
364 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
365 set cpu_arch_tune and cpu_arch_tune_flags.
366 (md_parse_option): For -march=, set cpu_arch_isa and set
367 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
368 0. Set cpu_arch_tune_set to 1 for -mtune=.
369 (i386_target_format): Don't set cpu_arch_tune.
371 2006-06-23 Nigel Stephens <nigel@mips.com>
373 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
374 generated .sbss.* and .gnu.linkonce.sb.*.
376 2006-06-23 Thiemo Seufer <ths@mips.com>
377 David Ung <davidu@mips.com>
379 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
381 * config/tc-mips.c (label_list): Define per-segment label_list.
382 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
383 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
384 mips_from_file_after_relocs, mips_define_label): Use per-segment
387 2006-06-22 Thiemo Seufer <ths@mips.com>
389 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
390 (append_insn): Use it.
391 (md_apply_fix): Whitespace formatting.
392 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
393 mips16_extended_frag): Remove register specifier.
394 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
397 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
399 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
400 a directive saving VFP registers for ARMv6 or later.
401 (s_arm_unwind_save): Add parameter arch_v6 and call
402 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
404 (md_pseudo_table): Add entry for new "vsave" directive.
405 * doc/c-arm.texi: Correct error in example for "save"
406 directive (fstmdf -> fstmdx). Also document "vsave" directive.
408 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
409 Anatoly Sokolov <aesok@post.ru>
411 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
412 and atmega644p devices. Rename atmega164/atmega324 devices to
413 atmega164p/atmega324p.
414 * doc/c-avr.texi: Document new mcu and arch options.
416 2006-06-17 Nick Clifton <nickc@redhat.com>
418 * config/tc-arm.c (enum parse_operand_result): Move outside of
419 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
421 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
423 * config/tc-i386.h (processor_type): New.
424 (arch_entry): Add type.
426 * config/tc-i386.c (cpu_arch_tune): New.
427 (cpu_arch_tune_flags): Likewise.
428 (cpu_arch_isa_flags): Likewise.
430 (set_cpu_arch): Also update cpu_arch_isa_flags.
431 (md_assemble): Update cpu_arch_isa_flags.
433 (OPTION_MTUNE): Likewise.
434 (md_longopts): Add -march= and -mtune=.
435 (md_parse_option): Support -march= and -mtune=.
436 (md_show_usage): Add -march=CPU/-mtune=CPU.
437 (i386_target_format): Also update cpu_arch_isa_flags,
438 cpu_arch_tune and cpu_arch_tune_flags.
440 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
442 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
444 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
446 * config/tc-arm.c (enum parse_operand_result): New.
447 (struct group_reloc_table_entry): New.
448 (enum group_reloc_type): New.
449 (group_reloc_table): New array.
450 (find_group_reloc_table_entry): New function.
451 (parse_shifter_operand_group_reloc): New function.
452 (parse_address_main): New function, incorporating code
453 from the old parse_address function. To be used via...
454 (parse_address): wrapper for parse_address_main; and
455 (parse_address_group_reloc): new function, likewise.
456 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
457 OP_ADDRGLDRS, OP_ADDRGLDC.
458 (parse_operands): Support for these new operand codes.
459 New macro po_misc_or_fail_no_backtrack.
460 (encode_arm_cp_address): Preserve group relocations.
461 (insns): Modify to use the above operand codes where group
462 relocations are permitted.
463 (md_apply_fix): Handle the group relocations
464 ALU_PC_G0_NC through LDC_SB_G2.
465 (tc_gen_reloc): Likewise.
466 (arm_force_relocation): Leave group relocations for the linker.
467 (arm_fix_adjustable): Likewise.
469 2006-06-15 Julian Brown <julian@codesourcery.com>
471 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
472 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
475 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
477 * config/tc-i386.c (process_suffix): Don't add rex64 for
480 2006-06-09 Thiemo Seufer <ths@mips.com>
482 * config/tc-mips.c (mips_ip): Maintain argument count.
484 2006-06-09 Alan Modra <amodra@bigpond.net.au>
486 * config/tc-iq2000.c: Include sb.h.
488 2006-06-08 Nigel Stephens <nigel@mips.com>
490 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
491 aliases for better compatibility with SGI tools.
493 2006-06-08 Alan Modra <amodra@bigpond.net.au>
495 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
496 * Makefile.am (GASLIBS): Expand @BFDLIB@.
498 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
499 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
500 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
502 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
503 * Makefile.in: Regenerate.
504 * doc/Makefile.in: Regenerate.
505 * configure: Regenerate.
507 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
509 * po/Make-in (pdf, ps): New dummy targets.
511 2006-06-07 Julian Brown <julian@codesourcery.com>
513 * config/tc-arm.c (stdarg.h): include.
514 (arm_it): Add uncond_value field. Add isvec and issingle to operand
516 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
517 REG_TYPE_NSDQ (single, double or quad vector reg).
518 (reg_expected_msgs): Update.
519 (BAD_FPU): Add macro for unsupported FPU instruction error.
520 (parse_neon_type): Support 'd' as an alias for .f64.
521 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
523 (parse_vfp_reg_list): Don't update first arg on error.
524 (parse_neon_mov): Support extra syntax for VFP moves.
525 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
526 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
527 (parse_operands): Support isvec, issingle operands fields, new parse
529 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
531 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
532 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
533 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
534 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
536 (neon_shape): Redefine in terms of above.
537 (neon_shape_class): New enumeration, table of shape classes.
538 (neon_shape_el): New enumeration. One element of a shape.
539 (neon_shape_el_size): Register widths of above, where appropriate.
540 (neon_shape_info): New struct. Info for shape table.
541 (neon_shape_tab): New array.
542 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
543 (neon_check_shape): Rewrite as...
544 (neon_select_shape): New function to classify instruction shapes,
545 driven by new table neon_shape_tab array.
546 (neon_quad): New function. Return 1 if shape should set Q flag in
547 instructions (or equivalent), 0 otherwise.
548 (type_chk_of_el_type): Support F64.
549 (el_type_of_type_chk): Likewise.
550 (neon_check_type): Add support for VFP type checking (VFP data
551 elements fill their containing registers).
552 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
553 in thumb mode for VFP instructions.
554 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
555 and encode the current instruction as if it were that opcode.
556 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
557 arguments, call function in PFN.
558 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
559 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
560 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
561 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
562 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
563 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
564 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
565 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
566 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
567 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
568 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
569 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
570 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
571 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
572 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
574 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
575 between VFP and Neon turns out to belong to Neon. Perform
576 architecture check and fill in condition field if appropriate.
577 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
578 (do_neon_cvt): Add support for VFP variants of instructions.
579 (neon_cvt_flavour): Extend to cover VFP conversions.
580 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
582 (do_neon_ldr_str): Handle single-precision VFP load/store.
583 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
584 NS_NULL not NS_IGNORE.
585 (opcode_tag): Add OT_csuffixF for operands which either take a
586 conditional suffix, or have 0xF in the condition field.
587 (md_assemble): Add support for OT_csuffixF.
588 (NCE): Replace macro with...
589 (NCE_tag, NCE, NCEF): New macros.
590 (nCE): Replace macro with...
591 (nCE_tag, nCE, nCEF): New macros.
592 (insns): Add support for VFP insns or VFP versions of insns msr,
593 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
594 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
595 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
596 VFP/Neon insns together.
598 2006-06-07 Alan Modra <amodra@bigpond.net.au>
599 Ladislav Michl <ladis@linux-mips.org>
601 * app.c: Don't include headers already included by as.h.
603 * atof-generic.c: Likewise.
605 * dwarf2dbg.c: Likewise.
607 * input-file.c: Likewise.
608 * input-scrub.c: Likewise.
610 * output-file.c: Likewise.
613 * config/bfin-lex.l: Likewise.
614 * config/obj-coff.h: Likewise.
615 * config/obj-elf.h: Likewise.
616 * config/obj-som.h: Likewise.
617 * config/tc-arc.c: Likewise.
618 * config/tc-arm.c: Likewise.
619 * config/tc-avr.c: Likewise.
620 * config/tc-bfin.c: Likewise.
621 * config/tc-cris.c: Likewise.
622 * config/tc-d10v.c: Likewise.
623 * config/tc-d30v.c: Likewise.
624 * config/tc-dlx.h: Likewise.
625 * config/tc-fr30.c: Likewise.
626 * config/tc-frv.c: Likewise.
627 * config/tc-h8300.c: Likewise.
628 * config/tc-hppa.c: Likewise.
629 * config/tc-i370.c: Likewise.
630 * config/tc-i860.c: Likewise.
631 * config/tc-i960.c: Likewise.
632 * config/tc-ip2k.c: Likewise.
633 * config/tc-iq2000.c: Likewise.
634 * config/tc-m32c.c: Likewise.
635 * config/tc-m32r.c: Likewise.
636 * config/tc-maxq.c: Likewise.
637 * config/tc-mcore.c: Likewise.
638 * config/tc-mips.c: Likewise.
639 * config/tc-mmix.c: Likewise.
640 * config/tc-mn10200.c: Likewise.
641 * config/tc-mn10300.c: Likewise.
642 * config/tc-msp430.c: Likewise.
643 * config/tc-mt.c: Likewise.
644 * config/tc-ns32k.c: Likewise.
645 * config/tc-openrisc.c: Likewise.
646 * config/tc-ppc.c: Likewise.
647 * config/tc-s390.c: Likewise.
648 * config/tc-sh.c: Likewise.
649 * config/tc-sh64.c: Likewise.
650 * config/tc-sparc.c: Likewise.
651 * config/tc-tic30.c: Likewise.
652 * config/tc-tic4x.c: Likewise.
653 * config/tc-tic54x.c: Likewise.
654 * config/tc-v850.c: Likewise.
655 * config/tc-vax.c: Likewise.
656 * config/tc-xc16x.c: Likewise.
657 * config/tc-xstormy16.c: Likewise.
658 * config/tc-xtensa.c: Likewise.
659 * config/tc-z80.c: Likewise.
660 * config/tc-z8k.c: Likewise.
661 * macro.h: Don't include sb.h or ansidecl.h.
662 * sb.h: Don't include stdio.h or ansidecl.h.
663 * cond.c: Include sb.h.
664 * itbl-lex.l: Include as.h instead of other system headers.
665 * itbl-parse.y: Likewise.
666 * itbl-ops.c: Similarly.
667 * itbl-ops.h: Don't include as.h or ansidecl.h.
668 * config/bfin-defs.h: Don't include bfd.h or as.h.
669 * config/bfin-parse.y: Include as.h instead of other system headers.
671 2006-06-06 Ben Elliston <bje@au.ibm.com>
672 Anton Blanchard <anton@samba.org>
674 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
675 (md_show_usage): Document it.
676 (ppc_setup_opcodes): Test power6 opcode flag bits.
677 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
679 2006-06-06 Thiemo Seufer <ths@mips.com>
680 Chao-ying Fu <fu@mips.com>
682 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
683 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
684 (macro_build): Update comment.
685 (mips_ip): Allow DSP64 instructions for MIPS64R2.
686 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
688 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
689 MIPS_CPU_ASE_MDMX flags for sb1.
691 2006-06-05 Thiemo Seufer <ths@mips.com>
693 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
695 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
696 (mips_ip): Make overflowed/underflowed constant arguments in DSP
697 and MT instructions a fatal error. Use INSERT_OPERAND where
698 appropriate. Improve warnings for break and wait code overflows.
699 Use symbolic constant of OP_MASK_COPZ.
700 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
702 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
704 * po/Make-in (top_builddir): Define.
706 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
708 * doc/Makefile.am (TEXI2DVI): Define.
709 * doc/Makefile.in: Regenerate.
710 * doc/c-arc.texi: Fix typo.
712 2006-06-01 Alan Modra <amodra@bigpond.net.au>
714 * config/obj-ieee.c: Delete.
715 * config/obj-ieee.h: Delete.
716 * Makefile.am (OBJ_FORMATS): Remove ieee.
717 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
718 (obj-ieee.o): Remove rule.
719 * Makefile.in: Regenerate.
720 * configure.in (atof): Remove tahoe.
721 (OBJ_MAYBE_IEEE): Don't define.
722 * configure: Regenerate.
723 * config.in: Regenerate.
724 * doc/Makefile.in: Regenerate.
725 * po/POTFILES.in: Regenerate.
727 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
729 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
730 and LIBINTL_DEP everywhere.
732 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
733 * acinclude.m4: Include new gettext macros.
734 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
735 Remove local code for po/Makefile.
736 * Makefile.in, configure, doc/Makefile.in: Regenerated.
738 2006-05-30 Nick Clifton <nickc@redhat.com>
740 * po/es.po: Updated Spanish translation.
742 2006-05-06 Denis Chertykov <denisc@overta.ru>
744 * doc/c-avr.texi: New file.
745 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
746 * doc/all.texi: Set AVR
747 * doc/as.texinfo: Include c-avr.texi
749 2006-05-28 Jie Zhang <jie.zhang@analog.com>
751 * config/bfin-parse.y (check_macfunc): Loose the condition of
752 calling check_multiply_halfregs ().
754 2006-05-25 Jie Zhang <jie.zhang@analog.com>
756 * config/bfin-parse.y (asm_1): Better check and deal with
757 vector and scalar Multiply 16-Bit Operands instructions.
759 2006-05-24 Nick Clifton <nickc@redhat.com>
761 * config/tc-hppa.c: Convert to ISO C90 format.
762 * config/tc-hppa.h: Likewise.
764 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
765 Randolph Chung <randolph@tausq.org>
767 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
768 is_tls_ieoff, is_tls_leoff): Define.
769 (fix_new_hppa): Handle TLS.
770 (cons_fix_new_hppa): Likewise.
772 (md_apply_fix): Handle TLS relocs.
773 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
775 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
777 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
779 2006-05-23 Thiemo Seufer <ths@mips.com>
780 David Ung <davidu@mips.com>
781 Nigel Stephens <nigel@mips.com>
784 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
785 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
786 ISA_HAS_MXHC1): New macros.
787 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
788 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
789 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
790 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
791 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
792 (mips_after_parse_args): Change default handling of float register
793 size to account for 32bit code with 64bit FP. Better sanity checking
794 of ISA/ASE/ABI option combinations.
795 (s_mipsset): Support switching of GPR and FPR sizes via
796 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
798 (mips_elf_final_processing): We should record the use of 64bit FP
799 registers in 32bit code but we don't, because ELF header flags are
801 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
802 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
803 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
804 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
805 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
806 missing -march options. Document .set arch=CPU. Move .set smartmips
807 to ASE page. Use @code for .set FOO examples.
809 2006-05-23 Jie Zhang <jie.zhang@analog.com>
811 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
814 2006-05-23 Jie Zhang <jie.zhang@analog.com>
816 * config/bfin-defs.h (bfin_equals): Remove declaration.
817 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
818 * config/tc-bfin.c (bfin_name_is_register): Remove.
819 (bfin_equals): Remove.
820 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
821 (bfin_name_is_register): Remove declaration.
823 2006-05-19 Thiemo Seufer <ths@mips.com>
824 Nigel Stephens <nigel@mips.com>
826 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
827 (mips_oddfpreg_ok): New function.
830 2006-05-19 Thiemo Seufer <ths@mips.com>
831 David Ung <davidu@mips.com>
833 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
834 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
835 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
836 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
837 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
838 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
839 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
840 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
841 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
842 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
843 reg_names_o32, reg_names_n32n64): Define register classes.
844 (reg_lookup): New function, use register classes.
845 (md_begin): Reserve register names in the symbol table. Simplify
847 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
849 (mips16_ip): Use reg_lookup.
850 (tc_get_register): Likewise.
851 (tc_mips_regname_to_dw2regnum): New function.
853 2006-05-19 Thiemo Seufer <ths@mips.com>
855 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
856 Un-constify string argument.
857 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
859 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
861 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
863 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
865 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
867 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
870 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
872 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
873 cfloat/m68881 to correct architecture before using it.
875 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
877 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
880 2006-05-15 Paul Brook <paul@codesourcery.com>
882 * config/tc-arm.c (arm_adjust_symtab): Use
883 bfd_is_arm_special_symbol_name.
885 2006-05-15 Bob Wilson <bob.wilson@acm.org>
887 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
888 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
889 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
890 Handle errors from calls to xtensa_opcode_is_* functions.
892 2006-05-14 Thiemo Seufer <ths@mips.com>
894 * config/tc-mips.c (macro_build): Test for currently active
896 (mips16_ip): Reject invalid opcodes.
898 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
900 * doc/as.texinfo: Rename "Index" to "AS Index",
901 and "ABORT" to "ABORT (COFF)".
903 2006-05-11 Paul Brook <paul@codesourcery.com>
905 * config/tc-arm.c (parse_half): New function.
906 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
907 (parse_operands): Ditto.
908 (do_mov16): Reject invalid relocations.
909 (do_t_mov16): Ditto. Use Thumb reloc numbers.
910 (insns): Replace Iffff with HALF.
911 (md_apply_fix): Add MOVW and MOVT relocs.
912 (tc_gen_reloc): Ditto.
913 * doc/c-arm.texi: Document relocation operators
915 2006-05-11 Paul Brook <paul@codesourcery.com>
917 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
919 2006-05-11 Thiemo Seufer <ths@mips.com>
921 * config/tc-mips.c (append_insn): Don't check the range of j or
924 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
926 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
927 relocs against external symbols for WinCE targets.
928 (md_apply_fix): Likewise.
930 2006-05-09 David Ung <davidu@mips.com>
932 * config/tc-mips.c (append_insn): Only warn about an out-of-range
935 2006-05-09 Nick Clifton <nickc@redhat.com>
937 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
938 against symbols which are not going to be placed into the symbol
941 2006-05-09 Ben Elliston <bje@au.ibm.com>
943 * expr.c (operand): Remove `if (0 && ..)' statement and
944 subsequently unused target_op label. Collapse `if (1 || ..)'
946 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
947 separately above the switch.
949 2006-05-08 Nick Clifton <nickc@redhat.com>
952 * config/tc-msp430.c (line_separator_character): Define as |.
954 2006-05-08 Thiemo Seufer <ths@mips.com>
955 Nigel Stephens <nigel@mips.com>
956 David Ung <davidu@mips.com>
958 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
959 (mips_opts): Likewise.
960 (file_ase_smartmips): New variable.
961 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
962 (macro_build): Handle SmartMIPS instructions.
964 (md_longopts): Add argument handling for smartmips.
965 (md_parse_options, mips_after_parse_args): Likewise.
966 (s_mipsset): Add .set smartmips support.
967 (md_show_usage): Document -msmartmips/-mno-smartmips.
968 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
970 * doc/c-mips.texi: Likewise.
972 2006-05-08 Alan Modra <amodra@bigpond.net.au>
974 * write.c (relax_segment): Add pass count arg. Don't error on
975 negative org/space on first two passes.
976 (relax_seg_info): New struct.
977 (relax_seg, write_object_file): Adjust.
978 * write.h (relax_segment): Update prototype.
980 2006-05-05 Julian Brown <julian@codesourcery.com>
982 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
984 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
985 architecture version checks.
986 (insns): Allow overlapping instructions to be used in VFP mode.
988 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
991 * config/obj-elf.c (obj_elf_change_section): Allow user
992 specified SHF_ALPHA_GPREL.
994 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
996 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
997 for PMEM related expressions.
999 2006-05-05 Nick Clifton <nickc@redhat.com>
1002 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1003 insertion of a directory separator character into a string at a
1004 given offset. Uses heuristics to decide when to use a backslash
1005 character rather than a forward-slash character.
1006 (dwarf2_directive_loc): Use the macro.
1007 (out_debug_info): Likewise.
1009 2006-05-05 Thiemo Seufer <ths@mips.com>
1010 David Ung <davidu@mips.com>
1012 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1014 (macro): Add new case M_CACHE_AB.
1016 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1018 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1019 (opcode_lookup): Issue a warning for opcode with
1020 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1021 identical to OT_cinfix3.
1022 (TxC3w, TC3w, tC3w): New.
1023 (insns): Use tC3w and TC3w for comparison instructions with
1026 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1028 * subsegs.h (struct frchain): Delete frch_seg.
1029 (frchain_root): Delete.
1030 (seg_info): Define as macro.
1031 * subsegs.c (frchain_root): Delete.
1032 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1033 (subsegs_begin, subseg_change): Adjust for above.
1034 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1035 rather than to one big list.
1036 (subseg_get): Don't special case abs, und sections.
1037 (subseg_new, subseg_force_new): Don't set frchainP here.
1039 (subsegs_print_statistics): Adjust frag chain control list traversal.
1040 * debug.c (dmp_frags): Likewise.
1041 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1042 at frchain_root. Make use of known frchain ordering.
1043 (last_frag_for_seg): Likewise.
1044 (get_frag_fix): Likewise. Add seg param.
1045 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1046 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1047 (SUB_SEGMENT_ALIGN): Likewise.
1048 (subsegs_finish): Adjust frchain list traversal.
1049 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1050 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1051 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1052 (xtensa_fix_b_j_loop_end_frags): Likewise.
1053 (xtensa_fix_close_loop_end_frags): Likewise.
1054 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1055 (retrieve_segment_info): Delete frch_seg initialisation.
1057 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1059 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1060 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1061 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1062 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1064 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1066 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1068 (md_apply_fix3): Multiply offset by 4 here for
1069 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1071 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1072 Jan Beulich <jbeulich@novell.com>
1074 * config/tc-i386.c (output_invalid_buf): Change size for
1076 * config/tc-tic30.c (output_invalid_buf): Likewise.
1078 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1080 * config/tc-tic30.c (output_invalid): Likewise.
1082 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1084 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1085 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1086 (asconfig.texi): Don't set top_srcdir.
1087 * doc/as.texinfo: Don't use top_srcdir.
1088 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1090 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1092 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1093 * config/tc-tic30.c (output_invalid_buf): Likewise.
1095 * config/tc-i386.c (output_invalid): Use snprintf instead of
1097 * config/tc-ia64.c (declare_register_set): Likewise.
1098 (emit_one_bundle): Likewise.
1099 (check_dependencies): Likewise.
1100 * config/tc-tic30.c (output_invalid): Likewise.
1102 2006-05-02 Paul Brook <paul@codesourcery.com>
1104 * config/tc-arm.c (arm_optimize_expr): New function.
1105 * config/tc-arm.h (md_optimize_expr): Define
1106 (arm_optimize_expr): Add prototype.
1107 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1109 2006-05-02 Ben Elliston <bje@au.ibm.com>
1111 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1114 * sb.h (sb_list_vector): Move to sb.c.
1115 * sb.c (free_list): Use type of sb_list_vector directly.
1116 (sb_build): Fix off-by-one error in assertion about `size'.
1118 2006-05-01 Ben Elliston <bje@au.ibm.com>
1120 * listing.c (listing_listing): Remove useless loop.
1121 * macro.c (macro_expand): Remove is_positional local variable.
1122 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1123 and simplify surrounding expressions, where possible.
1124 (assign_symbol): Likewise.
1125 (s_weakref): Likewise.
1126 * symbols.c (colon): Likewise.
1128 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1130 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1132 2006-04-30 Thiemo Seufer <ths@mips.com>
1133 David Ung <davidu@mips.com>
1135 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1136 (mips_immed): New table that records various handling of udi
1137 instruction patterns.
1138 (mips_ip): Adds udi handling.
1140 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1142 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1143 of list rather than beginning.
1145 2006-04-26 Julian Brown <julian@codesourcery.com>
1147 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1148 (is_quarter_float): Rename from above. Simplify slightly.
1149 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1151 (parse_neon_mov): Parse floating-point constants.
1152 (neon_qfloat_bits): Fix encoding.
1153 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1154 preference to integer encoding when using the F32 type.
1156 2006-04-26 Julian Brown <julian@codesourcery.com>
1158 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1159 zero-initialising structures containing it will lead to invalid types).
1160 (arm_it): Add vectype to each operand.
1161 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1163 (neon_typed_alias): New structure. Extra information for typed
1165 (reg_entry): Add neon type info field.
1166 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1167 Break out alternative syntax for coprocessor registers, etc. into...
1168 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1169 out from arm_reg_parse.
1170 (parse_neon_type): Move. Return SUCCESS/FAIL.
1171 (first_error): New function. Call to ensure first error which occurs is
1173 (parse_neon_operand_type): Parse exactly one type.
1174 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1175 (parse_typed_reg_or_scalar): New function. Handle core of both
1176 arm_typed_reg_parse and parse_scalar.
1177 (arm_typed_reg_parse): Parse a register with an optional type.
1178 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1180 (parse_scalar): Parse a Neon scalar with optional type.
1181 (parse_reg_list): Use first_error.
1182 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1183 (neon_alias_types_same): New function. Return true if two (alias) types
1185 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1187 (insert_reg_alias): Return new reg_entry not void.
1188 (insert_neon_reg_alias): New function. Insert type/index information as
1189 well as register for alias.
1190 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1191 make typed register aliases accordingly.
1192 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1194 (s_unreq): Delete type information if present.
1195 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1196 (s_arm_unwind_save_mmxwcg): Likewise.
1197 (s_arm_unwind_movsp): Likewise.
1198 (s_arm_unwind_setfp): Likewise.
1199 (parse_shift): Likewise.
1200 (parse_shifter_operand): Likewise.
1201 (parse_address): Likewise.
1202 (parse_tb): Likewise.
1203 (tc_arm_regname_to_dw2regnum): Likewise.
1204 (md_pseudo_table): Add dn, qn.
1205 (parse_neon_mov): Handle typed operands.
1206 (parse_operands): Likewise.
1207 (neon_type_mask): Add N_SIZ.
1208 (N_ALLMODS): New macro.
1209 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1210 (el_type_of_type_chk): Add some safeguards.
1211 (modify_types_allowed): Fix logic bug.
1212 (neon_check_type): Handle operands with types.
1213 (neon_three_same): Remove redundant optional arg handling.
1214 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1215 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1216 (do_neon_step): Adjust accordingly.
1217 (neon_cmode_for_logic_imm): Use first_error.
1218 (do_neon_bitfield): Call neon_check_type.
1219 (neon_dyadic): Rename to...
1220 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1221 to allow modification of type of the destination.
1222 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1223 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1224 (do_neon_compare): Make destination be an untyped bitfield.
1225 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1226 (neon_mul_mac): Return early in case of errors.
1227 (neon_move_immediate): Use first_error.
1228 (neon_mac_reg_scalar_long): Fix type to include scalar.
1229 (do_neon_dup): Likewise.
1230 (do_neon_mov): Likewise (in several places).
1231 (do_neon_tbl_tbx): Fix type.
1232 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1233 (do_neon_ld_dup): Exit early in case of errors and/or use
1235 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1236 Handle .dn/.qn directives.
1237 (REGDEF): Add zero for reg_entry neon field.
1239 2006-04-26 Julian Brown <julian@codesourcery.com>
1241 * config/tc-arm.c (limits.h): Include.
1242 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1243 (fpu_vfp_v3_or_neon_ext): Declare constants.
1244 (neon_el_type): New enumeration of types for Neon vector elements.
1245 (neon_type_el): New struct. Define type and size of a vector element.
1246 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1248 (neon_type): Define struct. The type of an instruction.
1249 (arm_it): Add 'vectype' for the current instruction.
1250 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1251 (vfp_sp_reg_pos): Rename to...
1252 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1254 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1255 (Neon D or Q register).
1256 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1258 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1259 (my_get_expression): Allow above constant as argument to accept
1260 64-bit constants with optional prefix.
1261 (arm_reg_parse): Add extra argument to return the specific type of
1262 register in when either a D or Q register (REG_TYPE_NDQ) is
1263 requested. Can be NULL.
1264 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1265 (parse_reg_list): Update for new arm_reg_parse args.
1266 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1267 (parse_neon_el_struct_list): New function. Parse element/structure
1268 register lists for VLD<n>/VST<n> instructions.
1269 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1270 (s_arm_unwind_save_mmxwr): Likewise.
1271 (s_arm_unwind_save_mmxwcg): Likewise.
1272 (s_arm_unwind_movsp): Likewise.
1273 (s_arm_unwind_setfp): Likewise.
1274 (parse_big_immediate): New function. Parse an immediate, which may be
1275 64 bits wide. Put results in inst.operands[i].
1276 (parse_shift): Update for new arm_reg_parse args.
1277 (parse_address): Likewise. Add parsing of alignment specifiers.
1278 (parse_neon_mov): Parse the operands of a VMOV instruction.
1279 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1280 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1281 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1282 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1283 (parse_operands): Handle new codes above.
1284 (encode_arm_vfp_sp_reg): Rename to...
1285 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1286 selected VFP version only supports D0-D15.
1287 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1288 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1289 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1290 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1291 encode_arm_vfp_reg name, and allow 32 D regs.
1292 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1293 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1295 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1296 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1297 constant-load and conversion insns introduced with VFPv3.
1298 (neon_tab_entry): New struct.
1299 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1300 those which are the targets of pseudo-instructions.
1301 (neon_opc): Enumerate opcodes, use as indices into...
1302 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1303 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1304 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1305 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1307 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1309 (neon_type_mask): New. Compact type representation for type checking.
1310 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1311 permitted type combinations.
1312 (N_IGNORE_TYPE): New macro.
1313 (neon_check_shape): New function. Check an instruction shape for
1314 multiple alternatives. Return the specific shape for the current
1316 (neon_modify_type_size): New function. Modify a vector type and size,
1317 depending on the bit mask in argument 1.
1318 (neon_type_promote): New function. Convert a given "key" type (of an
1319 operand) into the correct type for a different operand, based on a bit
1321 (type_chk_of_el_type): New function. Convert a type and size into the
1322 compact representation used for type checking.
1323 (el_type_of_type_ckh): New function. Reverse of above (only when a
1324 single bit is set in the bit mask).
1325 (modify_types_allowed): New function. Alter a mask of allowed types
1326 based on a bit mask of modifications.
1327 (neon_check_type): New function. Check the type of the current
1328 instruction against the variable argument list. The "key" type of the
1329 instruction is returned.
1330 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1331 a Neon data-processing instruction depending on whether we're in ARM
1332 mode or Thumb-2 mode.
1333 (neon_logbits): New function.
1334 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1335 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1336 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1337 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1338 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1339 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1340 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1341 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1342 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1343 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1344 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1345 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1346 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1347 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1348 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1349 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1350 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1351 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1352 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1353 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1354 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1355 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1356 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1357 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1358 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1360 (parse_neon_type): New function. Parse Neon type specifier.
1361 (opcode_lookup): Allow parsing of Neon type specifiers.
1362 (REGNUM2, REGSETH, REGSET2): New macros.
1363 (reg_names): Add new VFPv3 and Neon registers.
1364 (NUF, nUF, NCE, nCE): New macros for opcode table.
1365 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1366 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1367 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1368 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1369 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1370 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1371 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1372 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1373 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1374 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1375 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1376 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1377 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1378 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1380 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1381 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1382 (arm_option_cpu_value): Add vfp3 and neon.
1383 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1386 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1388 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1389 syntax instead of hardcoded opcodes with ".w18" suffixes.
1390 (wide_branch_opcode): New.
1391 (build_transition): Use it to check for wide branch opcodes with
1392 either ".w18" or ".w15" suffixes.
1394 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1396 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1397 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1398 frag's is_literal flag.
1400 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1402 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1404 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1406 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1407 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1408 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1409 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1410 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1412 2005-04-20 Paul Brook <paul@codesourcery.com>
1414 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1416 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1418 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1420 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1421 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1422 Make some cpus unsupported on ELF. Run "make dep-am".
1423 * Makefile.in: Regenerate.
1425 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1427 * configure.in (--enable-targets): Indent help message.
1428 * configure: Regenerate.
1430 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1433 * config/tc-i386.c (i386_immediate): Check illegal immediate
1436 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1438 * config/tc-i386.c: Formatting.
1439 (output_disp, output_imm): ISO C90 params.
1441 * frags.c (frag_offset_fixed_p): Constify args.
1442 * frags.h (frag_offset_fixed_p): Ditto.
1444 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1445 (COFF_MAGIC): Delete.
1447 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1449 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1451 * po/POTFILES.in: Regenerated.
1453 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1455 * doc/as.texinfo: Mention that some .type syntaxes are not
1456 supported on all architectures.
1458 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1460 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1461 instructions when such transformations have been disabled.
1463 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1465 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1466 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1467 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1468 decoding the loop instructions. Remove current_offset variable.
1469 (xtensa_fix_short_loop_frags): Likewise.
1470 (min_bytes_to_other_loop_end): Remove current_offset argument.
1472 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1474 * config/tc-z80.c (z80_optimize_expr): Removed.
1475 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1477 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1479 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1480 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1481 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1482 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1483 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1484 at90can64, at90usb646, at90usb647, at90usb1286 and
1486 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1488 2006-04-07 Paul Brook <paul@codesourcery.com>
1490 * config/tc-arm.c (parse_operands): Set default error message.
1492 2006-04-07 Paul Brook <paul@codesourcery.com>
1494 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1496 2006-04-07 Paul Brook <paul@codesourcery.com>
1498 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1500 2006-04-07 Paul Brook <paul@codesourcery.com>
1502 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1503 (move_or_literal_pool): Handle Thumb-2 instructions.
1504 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1506 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1509 * config/tc-i386.c (match_template): Move 64-bit operand tests
1512 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1514 * po/Make-in: Add install-html target.
1515 * Makefile.am: Add install-html and install-html-recursive targets.
1516 * Makefile.in: Regenerate.
1517 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1518 * configure: Regenerate.
1519 * doc/Makefile.am: Add install-html and install-html-am targets.
1520 * doc/Makefile.in: Regenerate.
1522 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1524 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1527 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1528 Daniel Jacobowitz <dan@codesourcery.com>
1530 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1531 (GOTT_BASE, GOTT_INDEX): New.
1532 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1533 GOTT_INDEX when generating VxWorks PIC.
1534 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1535 use the generic *-*-vxworks* stanza instead.
1537 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1540 * frags.c (frag_offset_fixed_p): New function.
1541 * frags.h (frag_offset_fixed_p): Declare.
1542 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1543 (resolve_expression): Likewise.
1545 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1547 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1548 of the same length but different numbers of slots.
1550 2006-03-30 Andreas Schwab <schwab@suse.de>
1552 * configure.in: Fix help string for --enable-targets option.
1553 * configure: Regenerate.
1555 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1557 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1558 (m68k_ip): ... here. Use for all chips. Protect against buffer
1559 overrun and avoid excessive copying.
1561 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1562 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1563 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1564 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1565 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1566 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1567 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1568 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1569 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1570 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1571 (struct m68k_cpu): Change chip field to control_regs.
1572 (current_chip): Remove.
1573 (control_regs): New.
1574 (m68k_archs, m68k_extensions): Adjust.
1575 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1576 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1577 (find_cf_chip): Reimplement for new organization of cpu table.
1578 (select_control_regs): Remove.
1580 (struct save_opts): Save control regs, not chip.
1581 (s_save, s_restore): Adjust.
1582 (m68k_lookup_cpu): Give deprecated warning when necessary.
1583 (m68k_init_arch): Adjust.
1584 (md_show_usage): Adjust for new cpu table organization.
1586 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1588 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1589 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1590 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1592 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1593 (any_gotrel): New rule.
1594 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1595 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1597 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1598 (bfin_pic_ptr): New function.
1599 (md_pseudo_table): Add it for ".picptr".
1600 (OPTION_FDPIC): New macro.
1601 (md_longopts): Add -mfdpic.
1602 (md_parse_option): Handle it.
1603 (md_begin): Set BFD flags.
1604 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1605 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1607 * Makefile.am (bfin-parse.o): Update dependencies.
1608 (DEPTC_bfin_elf): Likewise.
1609 * Makefile.in: Regenerate.
1611 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1613 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1614 mcfemac instead of mcfmac.
1616 2006-03-23 Michael Matz <matz@suse.de>
1618 * config/tc-i386.c (type_names): Correct placement of 'static'.
1619 (reloc): Map some more relocs to their 64 bit counterpart when
1621 (output_insn): Work around breakage if DEBUG386 is defined.
1622 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1623 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1624 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1625 different from i386.
1626 (output_imm): Ditto.
1627 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1629 (md_convert_frag): Jumps can now be larger than 2GB away, error
1631 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1632 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1634 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1635 Daniel Jacobowitz <dan@codesourcery.com>
1636 Phil Edwards <phil@codesourcery.com>
1637 Zack Weinberg <zack@codesourcery.com>
1638 Mark Mitchell <mark@codesourcery.com>
1639 Nathan Sidwell <nathan@codesourcery.com>
1641 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1642 (md_begin): Complain about -G being used for PIC. Don't change
1643 the text, data and bss alignments on VxWorks.
1644 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1645 generating VxWorks PIC.
1646 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1647 (macro): Likewise, but do not treat la $25 specially for
1648 VxWorks PIC, and do not handle jal.
1649 (OPTION_MVXWORKS_PIC): New macro.
1650 (md_longopts): Add -mvxworks-pic.
1651 (md_parse_option): Don't complain about using PIC and -G together here.
1652 Handle OPTION_MVXWORKS_PIC.
1653 (md_estimate_size_before_relax): Always use the first relaxation
1654 sequence on VxWorks.
1655 * config/tc-mips.h (VXWORKS_PIC): New.
1657 2006-03-21 Paul Brook <paul@codesourcery.com>
1659 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1661 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1663 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1664 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1665 (get_loop_align_size): New.
1666 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1667 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1668 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1669 (get_noop_aligned_address): Use get_loop_align_size.
1670 (get_aligned_diff): Likewise.
1672 2006-03-21 Paul Brook <paul@codesourcery.com>
1674 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1676 2006-03-20 Paul Brook <paul@codesourcery.com>
1678 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1679 (do_t_branch): Encode branches inside IT blocks as unconditional.
1680 (do_t_cps): New function.
1681 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1682 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1683 (opcode_lookup): Allow conditional suffixes on all instructions in
1685 (md_assemble): Advance condexec state before checking for errors.
1686 (insns): Use do_t_cps.
1688 2006-03-20 Paul Brook <paul@codesourcery.com>
1690 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1691 outputting the insn.
1693 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1695 * config/tc-vax.c: Update copyright year.
1696 * config/tc-vax.h: Likewise.
1698 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1700 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1702 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1704 2006-03-17 Paul Brook <paul@codesourcery.com>
1706 * config/tc-arm.c (insns): Add ldm and stm.
1708 2006-03-17 Ben Elliston <bje@au.ibm.com>
1711 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1713 2006-03-16 Paul Brook <paul@codesourcery.com>
1715 * config/tc-arm.c (insns): Add "svc".
1717 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1719 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1720 flag and avoid double underscore prefixes.
1722 2006-03-10 Paul Brook <paul@codesourcery.com>
1724 * config/tc-arm.c (md_begin): Handle EABIv5.
1725 (arm_eabis): Add EF_ARM_EABI_VER5.
1726 * doc/c-arm.texi: Document -meabi=5.
1728 2006-03-10 Ben Elliston <bje@au.ibm.com>
1730 * app.c (do_scrub_chars): Simplify string handling.
1732 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1733 Daniel Jacobowitz <dan@codesourcery.com>
1734 Zack Weinberg <zack@codesourcery.com>
1735 Nathan Sidwell <nathan@codesourcery.com>
1736 Paul Brook <paul@codesourcery.com>
1737 Ricardo Anguiano <anguiano@codesourcery.com>
1738 Phil Edwards <phil@codesourcery.com>
1740 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1741 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1743 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1744 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1745 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1747 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1749 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1750 even when using the text-section-literals option.
1752 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1754 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1756 (m68k_ip): <case 'J'> Check we have some control regs.
1757 (md_parse_option): Allow raw arch switch.
1758 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1759 whether 68881 or cfloat was meant by -mfloat.
1760 (md_show_usage): Adjust extension display.
1761 (m68k_elf_final_processing): Adjust.
1763 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1765 * config/tc-avr.c (avr_mod_hash_value): New function.
1766 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1767 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1768 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1769 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1771 (tc_gen_reloc): Handle substractions of symbols, if possible do
1772 fixups, abort otherwise.
1773 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1774 tc_fix_adjustable): Define.
1776 2006-03-02 James E Wilson <wilson@specifix.com>
1778 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1779 change the template, then clear md.slot[curr].end_of_insn_group.
1781 2006-02-28 Jan Beulich <jbeulich@novell.com>
1783 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1785 2006-02-28 Jan Beulich <jbeulich@novell.com>
1788 * macro.c (getstring): Don't treat parentheses special anymore.
1789 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1790 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1793 2006-02-28 Mat <mat@csail.mit.edu>
1795 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1797 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1799 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1801 (CFI_signal_frame): Define.
1802 (cfi_pseudo_table): Add .cfi_signal_frame.
1803 (dot_cfi): Handle CFI_signal_frame.
1804 (output_cie): Handle cie->signal_frame.
1805 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1806 different. Copy signal_frame from FDE to newly created CIE.
1807 * doc/as.texinfo: Document .cfi_signal_frame.
1809 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1811 * doc/Makefile.am: Add html target.
1812 * doc/Makefile.in: Regenerate.
1813 * po/Make-in: Add html target.
1815 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1817 * config/tc-i386.c (output_insn): Support Intel Merom New
1820 * config/tc-i386.h (CpuMNI): New.
1821 (CpuUnknownFlags): Add CpuMNI.
1823 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1825 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1826 (hpriv_reg_table): New table for hyperprivileged registers.
1827 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1830 2006-02-24 DJ Delorie <dj@redhat.com>
1832 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1833 (tc_gen_reloc): Don't define.
1834 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1835 (OPTION_LINKRELAX): New.
1836 (md_longopts): Add it.
1838 (md_parse_options): Set it.
1839 (md_assemble): Emit relaxation relocs as needed.
1840 (md_convert_frag): Emit relaxation relocs as needed.
1841 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1842 (m32c_apply_fix): New.
1843 (tc_gen_reloc): New.
1844 (m32c_force_relocation): Force out jump relocs when relaxing.
1845 (m32c_fix_adjustable): Return false if relaxing.
1847 2006-02-24 Paul Brook <paul@codesourcery.com>
1849 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1850 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1851 (struct asm_barrier_opt): Define.
1852 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1853 (parse_psr): Accept V7M psr names.
1854 (parse_barrier): New function.
1855 (enum operand_parse_code): Add OP_oBARRIER.
1856 (parse_operands): Implement OP_oBARRIER.
1857 (do_barrier): New function.
1858 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1859 (do_t_cpsi): Add V7M restrictions.
1860 (do_t_mrs, do_t_msr): Validate V7M variants.
1861 (md_assemble): Check for NULL variants.
1862 (v7m_psrs, barrier_opt_names): New tables.
1863 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1864 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1865 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1866 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1867 (struct cpu_arch_ver_table): Define.
1868 (cpu_arch_ver): New.
1869 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1870 Tag_CPU_arch_profile.
1871 * doc/c-arm.texi: Document new cpu and arch options.
1873 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1875 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1877 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1879 * config/tc-ia64.c: Update copyright years.
1881 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1883 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1886 2005-02-22 Paul Brook <paul@codesourcery.com>
1888 * config/tc-arm.c (do_pld): Remove incorrect write to
1890 (encode_thumb32_addr_mode): Use correct operand.
1892 2006-02-21 Paul Brook <paul@codesourcery.com>
1894 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1896 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1897 Anil Paranjape <anilp1@kpitcummins.com>
1898 Shilin Shakti <shilins@kpitcummins.com>
1900 * Makefile.am: Add xc16x related entry.
1901 * Makefile.in: Regenerate.
1902 * configure.in: Added xc16x related entry.
1903 * configure: Regenerate.
1904 * config/tc-xc16x.h: New file
1905 * config/tc-xc16x.c: New file
1906 * doc/c-xc16x.texi: New file for xc16x
1907 * doc/all.texi: Entry for xc16x
1908 * doc/Makefile.texi: Added c-xc16x.texi
1909 * NEWS: Announce the support for the new target.
1911 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1913 * configure.tgt: set emulation for mips-*-netbsd*
1915 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1917 * config.in: Rebuilt.
1919 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1921 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1922 from 1, not 0, in error messages.
1923 (md_assemble): Simplify special-case check for ENTRY instructions.
1924 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1925 operand in error message.
1927 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1929 * configure.tgt (arm-*-linux-gnueabi*): Change to
1932 2006-02-10 Nick Clifton <nickc@redhat.com>
1934 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1935 32-bit value is propagated into the upper bits of a 64-bit long.
1937 * config/tc-arc.c (init_opcode_tables): Fix cast.
1938 (arc_extoper, md_operand): Likewise.
1940 2006-02-09 David Heine <dlheine@tensilica.com>
1942 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1943 each relaxation step.
1945 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1947 * configure.in (CHECK_DECLS): Add vsnprintf.
1948 * configure: Regenerate.
1949 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1950 include/declare here, but...
1951 * as.h: Move code detecting VARARGS idiom to the top.
1952 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1953 (vsnprintf): Declare if not already declared.
1955 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1957 * as.c (close_output_file): New.
1958 (main): Register close_output_file with xatexit before
1959 dump_statistics. Don't call output_file_close.
1961 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1963 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1964 mcf5329_control_regs): New.
1965 (not_current_architecture, selected_arch, selected_cpu): New.
1966 (m68k_archs, m68k_extensions): New.
1967 (archs): Renamed to ...
1968 (m68k_cpus): ... here. Adjust.
1970 (md_pseudo_table): Add arch and cpu directives.
1971 (find_cf_chip, m68k_ip): Adjust table scanning.
1972 (no_68851, no_68881): Remove.
1973 (md_assemble): Lazily initialize.
1974 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1975 (md_init_after_args): Move functionality to m68k_init_arch.
1976 (mri_chip): Adjust table scanning.
1977 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1978 options with saner parsing.
1979 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1980 m68k_init_arch): New.
1981 (s_m68k_cpu, s_m68k_arch): New.
1982 (md_show_usage): Adjust.
1983 (m68k_elf_final_processing): Set CF EF flags.
1984 * config/tc-m68k.h (m68k_init_after_args): Remove.
1985 (tc_init_after_args): Remove.
1986 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1987 (M68k-Directives): Document .arch and .cpu directives.
1989 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1991 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1992 synonyms for equ and defl.
1993 (z80_cons_fix_new): New function.
1994 (emit_byte): Disallow relative jumps to absolute locations.
1995 (emit_data): Only handle defb, prototype changed, because defb is
1996 now handled as pseudo-op rather than an instruction.
1997 (instab): Entries for defb,defw,db,dw moved from here...
1998 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1999 Add entries for def24,def32,d24,d32.
2000 (md_assemble): Improved error handling.
2001 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2002 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2003 (z80_cons_fix_new): Declare.
2004 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2005 (def24,d24,def32,d32): New pseudo-ops.
2007 2006-02-02 Paul Brook <paul@codesourcery.com>
2009 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2011 2005-02-02 Paul Brook <paul@codesourcery.com>
2013 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2014 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2015 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2016 T2_OPCODE_RSB): Define.
2017 (thumb32_negate_data_op): New function.
2018 (md_apply_fix): Use it.
2020 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2022 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2024 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2025 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2027 (relaxation_requirements): Add pfinish_frag argument and use it to
2028 replace setting tinsn->record_fix fields.
2029 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2030 and vinsn_to_insnbuf. Remove references to record_fix and
2031 slot_sub_symbols fields.
2032 (xtensa_mark_narrow_branches): Delete unused code.
2033 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2035 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2037 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2038 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2039 of the record_fix field. Simplify error messages for unexpected
2041 (set_expr_symbol_offset_diff): Delete.
2043 2006-01-31 Paul Brook <paul@codesourcery.com>
2045 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2047 2006-01-31 Paul Brook <paul@codesourcery.com>
2048 Richard Earnshaw <rearnsha@arm.com>
2050 * config/tc-arm.c: Use arm_feature_set.
2051 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2052 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2053 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2056 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2057 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2058 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2059 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2061 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2062 (arm_opts): Move old cpu/arch options from here...
2063 (arm_legacy_opts): ... to here.
2064 (md_parse_option): Search arm_legacy_opts.
2065 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2066 (arm_float_abis, arm_eabis): Make const.
2068 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2070 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2072 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2074 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2075 in load immediate intruction.
2077 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2079 * config/bfin-parse.y (value_match): Use correct conversion
2080 specifications in template string for __FILE__ and __LINE__.
2084 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2086 Introduce TLS descriptors for i386 and x86_64.
2087 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2088 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2089 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2090 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2091 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2093 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2094 (lex_got): Handle @tlsdesc and @tlscall.
2095 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2097 2006-01-11 Nick Clifton <nickc@redhat.com>
2099 Fixes for building on 64-bit hosts:
2100 * config/tc-avr.c (mod_index): New union to allow conversion
2101 between pointers and integers.
2102 (md_begin, avr_ldi_expression): Use it.
2103 * config/tc-i370.c (md_assemble): Add cast for argument to print
2105 * config/tc-tic54x.c (subsym_substitute): Likewise.
2106 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2107 opindex field of fr_cgen structure into a pointer so that it can
2108 be stored in a frag.
2109 * config/tc-mn10300.c (md_assemble): Likewise.
2110 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2112 * config/tc-v850.c: Replace uses of (int) casts with correct
2115 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2118 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2120 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2123 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2124 a local-label reference.
2126 For older changes see ChangeLog-2005
2132 version-control: never
projects / deliverable / binutils-gdb.git / blob