Add support for AVR6 family
[deliverable/binutils-gdb.git] / gas / ChangeLog
1 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
2
3 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
4
5 2006-05-23 Thiemo Seufer <ths@mips.com>
6 David Ung <davidu@mips.com>
7 Nigel Stephens <nigel@mips.com>
8
9 [ gas/ChangeLog ]
10 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
11 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
12 ISA_HAS_MXHC1): New macros.
13 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
14 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
15 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
16 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
17 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
18 (mips_after_parse_args): Change default handling of float register
19 size to account for 32bit code with 64bit FP. Better sanity checking
20 of ISA/ASE/ABI option combinations.
21 (s_mipsset): Support switching of GPR and FPR sizes via
22 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
23 options.
24 (mips_elf_final_processing): We should record the use of 64bit FP
25 registers in 32bit code but we don't, because ELF header flags are
26 a scarce ressource.
27 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
28 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
29 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
30 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
31 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
32 missing -march options. Document .set arch=CPU. Move .set smartmips
33 to ASE page. Use @code for .set FOO examples.
34
35 2006-05-23 Jie Zhang <jie.zhang@analog.com>
36
37 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
38 if needed.
39
40 2006-05-23 Jie Zhang <jie.zhang@analog.com>
41
42 * config/bfin-defs.h (bfin_equals): Remove declaration.
43 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
44 * config/tc-bfin.c (bfin_name_is_register): Remove.
45 (bfin_equals): Remove.
46 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
47 (bfin_name_is_register): Remove declaration.
48
49 2006-05-19 Thiemo Seufer <ths@mips.com>
50 Nigel Stephens <nigel@mips.com>
51
52 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
53 (mips_oddfpreg_ok): New function.
54 (mips_ip): Use it.
55
56 2006-05-19 Thiemo Seufer <ths@mips.com>
57 David Ung <davidu@mips.com>
58
59 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
60 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
61 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
62 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
63 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
64 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
65 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
66 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
67 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
68 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
69 reg_names_o32, reg_names_n32n64): Define register classes.
70 (reg_lookup): New function, use register classes.
71 (md_begin): Reserve register names in the symbol table. Simplify
72 OBJ_ELF defines.
73 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
74 Use reg_lookup.
75 (mips16_ip): Use reg_lookup.
76 (tc_get_register): Likewise.
77 (tc_mips_regname_to_dw2regnum): New function.
78
79 2006-05-19 Thiemo Seufer <ths@mips.com>
80
81 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
82 Un-constify string argument.
83 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
84 Likewise.
85 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
86 Likewise.
87 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
88 Likewise.
89 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
90 Likewise.
91 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
92 Likewise.
93 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
94 Likewise.
95
96 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
97
98 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
99 cfloat/m68881 to correct architecture before using it.
100
101 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
102
103 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
104 constant values.
105
106 2006-05-15 Paul Brook <paul@codesourcery.com>
107
108 * config/tc-arm.c (arm_adjust_symtab): Use
109 bfd_is_arm_special_symbol_name.
110
111 2006-05-15 Bob Wilson <bob.wilson@acm.org>
112
113 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
114 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
115 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
116 Handle errors from calls to xtensa_opcode_is_* functions.
117
118 2006-05-14 Thiemo Seufer <ths@mips.com>
119
120 * config/tc-mips.c (macro_build): Test for currently active
121 mips16 option.
122 (mips16_ip): Reject invalid opcodes.
123
124 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
125
126 * doc/as.texinfo: Rename "Index" to "AS Index",
127 and "ABORT" to "ABORT (COFF)".
128
129 2006-05-11 Paul Brook <paul@codesourcery.com>
130
131 * config/tc-arm.c (parse_half): New function.
132 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
133 (parse_operands): Ditto.
134 (do_mov16): Reject invalid relocations.
135 (do_t_mov16): Ditto. Use Thumb reloc numbers.
136 (insns): Replace Iffff with HALF.
137 (md_apply_fix): Add MOVW and MOVT relocs.
138 (tc_gen_reloc): Ditto.
139 * doc/c-arm.texi: Document relocation operators
140
141 2006-05-11 Paul Brook <paul@codesourcery.com>
142
143 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
144
145 2006-05-11 Thiemo Seufer <ths@mips.com>
146
147 * config/tc-mips.c (append_insn): Don't check the range of j or
148 jal addresses.
149
150 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
151
152 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
153 relocs against external symbols for WinCE targets.
154 (md_apply_fix): Likewise.
155
156 2006-05-09 David Ung <davidu@mips.com>
157
158 * config/tc-mips.c (append_insn): Only warn about an out-of-range
159 j or jal address.
160
161 2006-05-09 Nick Clifton <nickc@redhat.com>
162
163 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
164 against symbols which are not going to be placed into the symbol
165 table.
166
167 2006-05-09 Ben Elliston <bje@au.ibm.com>
168
169 * expr.c (operand): Remove `if (0 && ..)' statement and
170 subsequently unused target_op label. Collapse `if (1 || ..)'
171 statement.
172 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
173 separately above the switch.
174
175 2006-05-08 Nick Clifton <nickc@redhat.com>
176
177 PR gas/2623
178 * config/tc-msp430.c (line_separator_character): Define as |.
179
180 2006-05-08 Thiemo Seufer <ths@mips.com>
181 Nigel Stephens <nigel@mips.com>
182 David Ung <davidu@mips.com>
183
184 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
185 (mips_opts): Likewise.
186 (file_ase_smartmips): New variable.
187 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
188 (macro_build): Handle SmartMIPS instructions.
189 (mips_ip): Likewise.
190 (md_longopts): Add argument handling for smartmips.
191 (md_parse_options, mips_after_parse_args): Likewise.
192 (s_mipsset): Add .set smartmips support.
193 (md_show_usage): Document -msmartmips/-mno-smartmips.
194 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
195 .set smartmips.
196 * doc/c-mips.texi: Likewise.
197
198 2006-05-08 Alan Modra <amodra@bigpond.net.au>
199
200 * write.c (relax_segment): Add pass count arg. Don't error on
201 negative org/space on first two passes.
202 (relax_seg_info): New struct.
203 (relax_seg, write_object_file): Adjust.
204 * write.h (relax_segment): Update prototype.
205
206 2006-05-05 Julian Brown <julian@codesourcery.com>
207
208 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
209 checking.
210 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
211 architecture version checks.
212 (insns): Allow overlapping instructions to be used in VFP mode.
213
214 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
215
216 PR gas/2598
217 * config/obj-elf.c (obj_elf_change_section): Allow user
218 specified SHF_ALPHA_GPREL.
219
220 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
221
222 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
223 for PMEM related expressions.
224
225 2006-05-05 Nick Clifton <nickc@redhat.com>
226
227 PR gas/2582
228 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
229 insertion of a directory separator character into a string at a
230 given offset. Uses heuristics to decide when to use a backslash
231 character rather than a forward-slash character.
232 (dwarf2_directive_loc): Use the macro.
233 (out_debug_info): Likewise.
234
235 2006-05-05 Thiemo Seufer <ths@mips.com>
236 David Ung <davidu@mips.com>
237
238 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
239 instruction.
240 (macro): Add new case M_CACHE_AB.
241
242 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
243
244 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
245 (opcode_lookup): Issue a warning for opcode with
246 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
247 identical to OT_cinfix3.
248 (TxC3w, TC3w, tC3w): New.
249 (insns): Use tC3w and TC3w for comparison instructions with
250 's' suffix.
251
252 2006-05-04 Alan Modra <amodra@bigpond.net.au>
253
254 * subsegs.h (struct frchain): Delete frch_seg.
255 (frchain_root): Delete.
256 (seg_info): Define as macro.
257 * subsegs.c (frchain_root): Delete.
258 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
259 (subsegs_begin, subseg_change): Adjust for above.
260 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
261 rather than to one big list.
262 (subseg_get): Don't special case abs, und sections.
263 (subseg_new, subseg_force_new): Don't set frchainP here.
264 (seg_info): Delete.
265 (subsegs_print_statistics): Adjust frag chain control list traversal.
266 * debug.c (dmp_frags): Likewise.
267 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
268 at frchain_root. Make use of known frchain ordering.
269 (last_frag_for_seg): Likewise.
270 (get_frag_fix): Likewise. Add seg param.
271 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
272 * write.c (chain_frchains_together_1): Adjust for struct frchain.
273 (SUB_SEGMENT_ALIGN): Likewise.
274 (subsegs_finish): Adjust frchain list traversal.
275 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
276 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
277 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
278 (xtensa_fix_b_j_loop_end_frags): Likewise.
279 (xtensa_fix_close_loop_end_frags): Likewise.
280 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
281 (retrieve_segment_info): Delete frch_seg initialisation.
282
283 2006-05-03 Alan Modra <amodra@bigpond.net.au>
284
285 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
286 * config/obj-elf.h (obj_sec_set_private_data): Delete.
287 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
288 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
289
290 2006-05-02 Joseph Myers <joseph@codesourcery.com>
291
292 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
293 here.
294 (md_apply_fix3): Multiply offset by 4 here for
295 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
296
297 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
298 Jan Beulich <jbeulich@novell.com>
299
300 * config/tc-i386.c (output_invalid_buf): Change size for
301 unsigned char.
302 * config/tc-tic30.c (output_invalid_buf): Likewise.
303
304 * config/tc-i386.c (output_invalid): Cast none-ascii char to
305 unsigned char.
306 * config/tc-tic30.c (output_invalid): Likewise.
307
308 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
309
310 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
311 (TEXI2POD): Use AM_MAKEINFOFLAGS.
312 (asconfig.texi): Don't set top_srcdir.
313 * doc/as.texinfo: Don't use top_srcdir.
314 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
315
316 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
317
318 * config/tc-i386.c (output_invalid_buf): Change size to 16.
319 * config/tc-tic30.c (output_invalid_buf): Likewise.
320
321 * config/tc-i386.c (output_invalid): Use snprintf instead of
322 sprintf.
323 * config/tc-ia64.c (declare_register_set): Likewise.
324 (emit_one_bundle): Likewise.
325 (check_dependencies): Likewise.
326 * config/tc-tic30.c (output_invalid): Likewise.
327
328 2006-05-02 Paul Brook <paul@codesourcery.com>
329
330 * config/tc-arm.c (arm_optimize_expr): New function.
331 * config/tc-arm.h (md_optimize_expr): Define
332 (arm_optimize_expr): Add prototype.
333 (TC_FORCE_RELOCATION_SUB_SAME): Define.
334
335 2006-05-02 Ben Elliston <bje@au.ibm.com>
336
337 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
338 field unsigned.
339
340 * sb.h (sb_list_vector): Move to sb.c.
341 * sb.c (free_list): Use type of sb_list_vector directly.
342 (sb_build): Fix off-by-one error in assertion about `size'.
343
344 2006-05-01 Ben Elliston <bje@au.ibm.com>
345
346 * listing.c (listing_listing): Remove useless loop.
347 * macro.c (macro_expand): Remove is_positional local variable.
348 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
349 and simplify surrounding expressions, where possible.
350 (assign_symbol): Likewise.
351 (s_weakref): Likewise.
352 * symbols.c (colon): Likewise.
353
354 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
355
356 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
357
358 2006-04-30 Thiemo Seufer <ths@mips.com>
359 David Ung <davidu@mips.com>
360
361 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
362 (mips_immed): New table that records various handling of udi
363 instruction patterns.
364 (mips_ip): Adds udi handling.
365
366 2006-04-28 Alan Modra <amodra@bigpond.net.au>
367
368 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
369 of list rather than beginning.
370
371 2006-04-26 Julian Brown <julian@codesourcery.com>
372
373 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
374 (is_quarter_float): Rename from above. Simplify slightly.
375 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
376 number.
377 (parse_neon_mov): Parse floating-point constants.
378 (neon_qfloat_bits): Fix encoding.
379 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
380 preference to integer encoding when using the F32 type.
381
382 2006-04-26 Julian Brown <julian@codesourcery.com>
383
384 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
385 zero-initialising structures containing it will lead to invalid types).
386 (arm_it): Add vectype to each operand.
387 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
388 defined field.
389 (neon_typed_alias): New structure. Extra information for typed
390 register aliases.
391 (reg_entry): Add neon type info field.
392 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
393 Break out alternative syntax for coprocessor registers, etc. into...
394 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
395 out from arm_reg_parse.
396 (parse_neon_type): Move. Return SUCCESS/FAIL.
397 (first_error): New function. Call to ensure first error which occurs is
398 reported.
399 (parse_neon_operand_type): Parse exactly one type.
400 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
401 (parse_typed_reg_or_scalar): New function. Handle core of both
402 arm_typed_reg_parse and parse_scalar.
403 (arm_typed_reg_parse): Parse a register with an optional type.
404 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
405 result.
406 (parse_scalar): Parse a Neon scalar with optional type.
407 (parse_reg_list): Use first_error.
408 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
409 (neon_alias_types_same): New function. Return true if two (alias) types
410 are the same.
411 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
412 of elements.
413 (insert_reg_alias): Return new reg_entry not void.
414 (insert_neon_reg_alias): New function. Insert type/index information as
415 well as register for alias.
416 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
417 make typed register aliases accordingly.
418 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
419 of line.
420 (s_unreq): Delete type information if present.
421 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
422 (s_arm_unwind_save_mmxwcg): Likewise.
423 (s_arm_unwind_movsp): Likewise.
424 (s_arm_unwind_setfp): Likewise.
425 (parse_shift): Likewise.
426 (parse_shifter_operand): Likewise.
427 (parse_address): Likewise.
428 (parse_tb): Likewise.
429 (tc_arm_regname_to_dw2regnum): Likewise.
430 (md_pseudo_table): Add dn, qn.
431 (parse_neon_mov): Handle typed operands.
432 (parse_operands): Likewise.
433 (neon_type_mask): Add N_SIZ.
434 (N_ALLMODS): New macro.
435 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
436 (el_type_of_type_chk): Add some safeguards.
437 (modify_types_allowed): Fix logic bug.
438 (neon_check_type): Handle operands with types.
439 (neon_three_same): Remove redundant optional arg handling.
440 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
441 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
442 (do_neon_step): Adjust accordingly.
443 (neon_cmode_for_logic_imm): Use first_error.
444 (do_neon_bitfield): Call neon_check_type.
445 (neon_dyadic): Rename to...
446 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
447 to allow modification of type of the destination.
448 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
449 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
450 (do_neon_compare): Make destination be an untyped bitfield.
451 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
452 (neon_mul_mac): Return early in case of errors.
453 (neon_move_immediate): Use first_error.
454 (neon_mac_reg_scalar_long): Fix type to include scalar.
455 (do_neon_dup): Likewise.
456 (do_neon_mov): Likewise (in several places).
457 (do_neon_tbl_tbx): Fix type.
458 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
459 (do_neon_ld_dup): Exit early in case of errors and/or use
460 first_error.
461 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
462 Handle .dn/.qn directives.
463 (REGDEF): Add zero for reg_entry neon field.
464
465 2006-04-26 Julian Brown <julian@codesourcery.com>
466
467 * config/tc-arm.c (limits.h): Include.
468 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
469 (fpu_vfp_v3_or_neon_ext): Declare constants.
470 (neon_el_type): New enumeration of types for Neon vector elements.
471 (neon_type_el): New struct. Define type and size of a vector element.
472 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
473 instruction.
474 (neon_type): Define struct. The type of an instruction.
475 (arm_it): Add 'vectype' for the current instruction.
476 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
477 (vfp_sp_reg_pos): Rename to...
478 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
479 tags.
480 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
481 (Neon D or Q register).
482 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
483 register.
484 (GE_OPT_PREFIX_BIG): Define constant, for use in...
485 (my_get_expression): Allow above constant as argument to accept
486 64-bit constants with optional prefix.
487 (arm_reg_parse): Add extra argument to return the specific type of
488 register in when either a D or Q register (REG_TYPE_NDQ) is
489 requested. Can be NULL.
490 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
491 (parse_reg_list): Update for new arm_reg_parse args.
492 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
493 (parse_neon_el_struct_list): New function. Parse element/structure
494 register lists for VLD<n>/VST<n> instructions.
495 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
496 (s_arm_unwind_save_mmxwr): Likewise.
497 (s_arm_unwind_save_mmxwcg): Likewise.
498 (s_arm_unwind_movsp): Likewise.
499 (s_arm_unwind_setfp): Likewise.
500 (parse_big_immediate): New function. Parse an immediate, which may be
501 64 bits wide. Put results in inst.operands[i].
502 (parse_shift): Update for new arm_reg_parse args.
503 (parse_address): Likewise. Add parsing of alignment specifiers.
504 (parse_neon_mov): Parse the operands of a VMOV instruction.
505 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
506 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
507 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
508 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
509 (parse_operands): Handle new codes above.
510 (encode_arm_vfp_sp_reg): Rename to...
511 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
512 selected VFP version only supports D0-D15.
513 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
514 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
515 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
516 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
517 encode_arm_vfp_reg name, and allow 32 D regs.
518 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
519 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
520 regs.
521 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
522 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
523 constant-load and conversion insns introduced with VFPv3.
524 (neon_tab_entry): New struct.
525 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
526 those which are the targets of pseudo-instructions.
527 (neon_opc): Enumerate opcodes, use as indices into...
528 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
529 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
530 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
531 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
532 neon_enc_tab.
533 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
534 Neon instructions.
535 (neon_type_mask): New. Compact type representation for type checking.
536 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
537 permitted type combinations.
538 (N_IGNORE_TYPE): New macro.
539 (neon_check_shape): New function. Check an instruction shape for
540 multiple alternatives. Return the specific shape for the current
541 instruction.
542 (neon_modify_type_size): New function. Modify a vector type and size,
543 depending on the bit mask in argument 1.
544 (neon_type_promote): New function. Convert a given "key" type (of an
545 operand) into the correct type for a different operand, based on a bit
546 mask.
547 (type_chk_of_el_type): New function. Convert a type and size into the
548 compact representation used for type checking.
549 (el_type_of_type_ckh): New function. Reverse of above (only when a
550 single bit is set in the bit mask).
551 (modify_types_allowed): New function. Alter a mask of allowed types
552 based on a bit mask of modifications.
553 (neon_check_type): New function. Check the type of the current
554 instruction against the variable argument list. The "key" type of the
555 instruction is returned.
556 (neon_dp_fixup): New function. Fill in and modify instruction bits for
557 a Neon data-processing instruction depending on whether we're in ARM
558 mode or Thumb-2 mode.
559 (neon_logbits): New function.
560 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
561 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
562 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
563 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
564 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
565 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
566 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
567 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
568 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
569 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
570 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
571 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
572 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
573 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
574 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
575 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
576 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
577 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
578 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
579 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
580 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
581 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
582 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
583 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
584 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
585 helpers.
586 (parse_neon_type): New function. Parse Neon type specifier.
587 (opcode_lookup): Allow parsing of Neon type specifiers.
588 (REGNUM2, REGSETH, REGSET2): New macros.
589 (reg_names): Add new VFPv3 and Neon registers.
590 (NUF, nUF, NCE, nCE): New macros for opcode table.
591 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
592 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
593 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
594 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
595 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
596 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
597 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
598 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
599 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
600 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
601 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
602 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
603 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
604 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
605 fto[us][lh][sd].
606 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
607 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
608 (arm_option_cpu_value): Add vfp3 and neon.
609 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
610 VFPv1 attribute.
611
612 2006-04-25 Bob Wilson <bob.wilson@acm.org>
613
614 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
615 syntax instead of hardcoded opcodes with ".w18" suffixes.
616 (wide_branch_opcode): New.
617 (build_transition): Use it to check for wide branch opcodes with
618 either ".w18" or ".w15" suffixes.
619
620 2006-04-25 Bob Wilson <bob.wilson@acm.org>
621
622 * config/tc-xtensa.c (xtensa_create_literal_symbol,
623 xg_assemble_literal, xg_assemble_literal_space): Do not set the
624 frag's is_literal flag.
625
626 2006-04-25 Bob Wilson <bob.wilson@acm.org>
627
628 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
629
630 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
631
632 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
633 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
634 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
635 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
636 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
637
638 2005-04-20 Paul Brook <paul@codesourcery.com>
639
640 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
641 all targets.
642 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
643
644 2006-04-19 Alan Modra <amodra@bigpond.net.au>
645
646 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
647 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
648 Make some cpus unsupported on ELF. Run "make dep-am".
649 * Makefile.in: Regenerate.
650
651 2006-04-19 Alan Modra <amodra@bigpond.net.au>
652
653 * configure.in (--enable-targets): Indent help message.
654 * configure: Regenerate.
655
656 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
657
658 PR gas/2533
659 * config/tc-i386.c (i386_immediate): Check illegal immediate
660 register operand.
661
662 2006-04-18 Alan Modra <amodra@bigpond.net.au>
663
664 * config/tc-i386.c: Formatting.
665 (output_disp, output_imm): ISO C90 params.
666
667 * frags.c (frag_offset_fixed_p): Constify args.
668 * frags.h (frag_offset_fixed_p): Ditto.
669
670 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
671 (COFF_MAGIC): Delete.
672
673 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
674
675 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
676
677 * po/POTFILES.in: Regenerated.
678
679 2006-04-16 Mark Mitchell <mark@codesourcery.com>
680
681 * doc/as.texinfo: Mention that some .type syntaxes are not
682 supported on all architectures.
683
684 2006-04-14 Sterling Augustine <sterling@tensilica.com>
685
686 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
687 instructions when such transformations have been disabled.
688
689 2006-04-10 Sterling Augustine <sterling@tensilica.com>
690
691 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
692 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
693 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
694 decoding the loop instructions. Remove current_offset variable.
695 (xtensa_fix_short_loop_frags): Likewise.
696 (min_bytes_to_other_loop_end): Remove current_offset argument.
697
698 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
699
700 * config/tc-z80.c (z80_optimize_expr): Removed.
701 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
702
703 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
704
705 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
706 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
707 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
708 atmega644, atmega329, atmega3290, atmega649, atmega6490,
709 atmega406, atmega640, atmega1280, atmega1281, at90can32,
710 at90can64, at90usb646, at90usb647, at90usb1286 and
711 at90usb1287.
712 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
713
714 2006-04-07 Paul Brook <paul@codesourcery.com>
715
716 * config/tc-arm.c (parse_operands): Set default error message.
717
718 2006-04-07 Paul Brook <paul@codesourcery.com>
719
720 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
721
722 2006-04-07 Paul Brook <paul@codesourcery.com>
723
724 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
725
726 2006-04-07 Paul Brook <paul@codesourcery.com>
727
728 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
729 (move_or_literal_pool): Handle Thumb-2 instructions.
730 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
731
732 2006-04-07 Alan Modra <amodra@bigpond.net.au>
733
734 PR 2512.
735 * config/tc-i386.c (match_template): Move 64-bit operand tests
736 inside loop.
737
738 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
739
740 * po/Make-in: Add install-html target.
741 * Makefile.am: Add install-html and install-html-recursive targets.
742 * Makefile.in: Regenerate.
743 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
744 * configure: Regenerate.
745 * doc/Makefile.am: Add install-html and install-html-am targets.
746 * doc/Makefile.in: Regenerate.
747
748 2006-04-06 Alan Modra <amodra@bigpond.net.au>
749
750 * frags.c (frag_offset_fixed_p): Reinitialise offset before
751 second scan.
752
753 2006-04-05 Richard Sandiford <richard@codesourcery.com>
754 Daniel Jacobowitz <dan@codesourcery.com>
755
756 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
757 (GOTT_BASE, GOTT_INDEX): New.
758 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
759 GOTT_INDEX when generating VxWorks PIC.
760 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
761 use the generic *-*-vxworks* stanza instead.
762
763 2006-04-04 Alan Modra <amodra@bigpond.net.au>
764
765 PR 997
766 * frags.c (frag_offset_fixed_p): New function.
767 * frags.h (frag_offset_fixed_p): Declare.
768 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
769 (resolve_expression): Likewise.
770
771 2006-04-03 Sterling Augustine <sterling@tensilica.com>
772
773 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
774 of the same length but different numbers of slots.
775
776 2006-03-30 Andreas Schwab <schwab@suse.de>
777
778 * configure.in: Fix help string for --enable-targets option.
779 * configure: Regenerate.
780
781 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
782
783 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
784 (m68k_ip): ... here. Use for all chips. Protect against buffer
785 overrun and avoid excessive copying.
786
787 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
788 m68020_control_regs, m68040_control_regs, m68060_control_regs,
789 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
790 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
791 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
792 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
793 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
794 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
795 mcf5282_ctrl, mcfv4e_ctrl): ... these.
796 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
797 (struct m68k_cpu): Change chip field to control_regs.
798 (current_chip): Remove.
799 (control_regs): New.
800 (m68k_archs, m68k_extensions): Adjust.
801 (m68k_cpus): Reorder to be in cpu number order. Adjust.
802 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
803 (find_cf_chip): Reimplement for new organization of cpu table.
804 (select_control_regs): Remove.
805 (mri_chip): Adjust.
806 (struct save_opts): Save control regs, not chip.
807 (s_save, s_restore): Adjust.
808 (m68k_lookup_cpu): Give deprecated warning when necessary.
809 (m68k_init_arch): Adjust.
810 (md_show_usage): Adjust for new cpu table organization.
811
812 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
813
814 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
815 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
816 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
817 "elf/bfin.h".
818 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
819 (any_gotrel): New rule.
820 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
821 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
822 "elf/bfin.h".
823 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
824 (bfin_pic_ptr): New function.
825 (md_pseudo_table): Add it for ".picptr".
826 (OPTION_FDPIC): New macro.
827 (md_longopts): Add -mfdpic.
828 (md_parse_option): Handle it.
829 (md_begin): Set BFD flags.
830 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
831 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
832 us for GOT relocs.
833 * Makefile.am (bfin-parse.o): Update dependencies.
834 (DEPTC_bfin_elf): Likewise.
835 * Makefile.in: Regenerate.
836
837 2006-03-25 Richard Sandiford <richard@codesourcery.com>
838
839 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
840 mcfemac instead of mcfmac.
841
842 2006-03-23 Michael Matz <matz@suse.de>
843
844 * config/tc-i386.c (type_names): Correct placement of 'static'.
845 (reloc): Map some more relocs to their 64 bit counterpart when
846 size is 8.
847 (output_insn): Work around breakage if DEBUG386 is defined.
848 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
849 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
850 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
851 different from i386.
852 (output_imm): Ditto.
853 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
854 Imm64.
855 (md_convert_frag): Jumps can now be larger than 2GB away, error
856 out in that case.
857 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
858 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
859
860 2006-03-22 Richard Sandiford <richard@codesourcery.com>
861 Daniel Jacobowitz <dan@codesourcery.com>
862 Phil Edwards <phil@codesourcery.com>
863 Zack Weinberg <zack@codesourcery.com>
864 Mark Mitchell <mark@codesourcery.com>
865 Nathan Sidwell <nathan@codesourcery.com>
866
867 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
868 (md_begin): Complain about -G being used for PIC. Don't change
869 the text, data and bss alignments on VxWorks.
870 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
871 generating VxWorks PIC.
872 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
873 (macro): Likewise, but do not treat la $25 specially for
874 VxWorks PIC, and do not handle jal.
875 (OPTION_MVXWORKS_PIC): New macro.
876 (md_longopts): Add -mvxworks-pic.
877 (md_parse_option): Don't complain about using PIC and -G together here.
878 Handle OPTION_MVXWORKS_PIC.
879 (md_estimate_size_before_relax): Always use the first relaxation
880 sequence on VxWorks.
881 * config/tc-mips.h (VXWORKS_PIC): New.
882
883 2006-03-21 Paul Brook <paul@codesourcery.com>
884
885 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
886
887 2006-03-21 Sterling Augustine <sterling@tensilica.com>
888
889 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
890 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
891 (get_loop_align_size): New.
892 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
893 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
894 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
895 (get_noop_aligned_address): Use get_loop_align_size.
896 (get_aligned_diff): Likewise.
897
898 2006-03-21 Paul Brook <paul@codesourcery.com>
899
900 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
901
902 2006-03-20 Paul Brook <paul@codesourcery.com>
903
904 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
905 (do_t_branch): Encode branches inside IT blocks as unconditional.
906 (do_t_cps): New function.
907 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
908 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
909 (opcode_lookup): Allow conditional suffixes on all instructions in
910 Thumb mode.
911 (md_assemble): Advance condexec state before checking for errors.
912 (insns): Use do_t_cps.
913
914 2006-03-20 Paul Brook <paul@codesourcery.com>
915
916 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
917 outputting the insn.
918
919 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
920
921 * config/tc-vax.c: Update copyright year.
922 * config/tc-vax.h: Likewise.
923
924 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
925
926 * config/tc-vax.c (md_chars_to_number): Used only locally, so
927 make it static.
928 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
929
930 2006-03-17 Paul Brook <paul@codesourcery.com>
931
932 * config/tc-arm.c (insns): Add ldm and stm.
933
934 2006-03-17 Ben Elliston <bje@au.ibm.com>
935
936 PR gas/2446
937 * doc/as.texinfo (Ident): Document this directive more thoroughly.
938
939 2006-03-16 Paul Brook <paul@codesourcery.com>
940
941 * config/tc-arm.c (insns): Add "svc".
942
943 2006-03-13 Bob Wilson <bob.wilson@acm.org>
944
945 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
946 flag and avoid double underscore prefixes.
947
948 2006-03-10 Paul Brook <paul@codesourcery.com>
949
950 * config/tc-arm.c (md_begin): Handle EABIv5.
951 (arm_eabis): Add EF_ARM_EABI_VER5.
952 * doc/c-arm.texi: Document -meabi=5.
953
954 2006-03-10 Ben Elliston <bje@au.ibm.com>
955
956 * app.c (do_scrub_chars): Simplify string handling.
957
958 2006-03-07 Richard Sandiford <richard@codesourcery.com>
959 Daniel Jacobowitz <dan@codesourcery.com>
960 Zack Weinberg <zack@codesourcery.com>
961 Nathan Sidwell <nathan@codesourcery.com>
962 Paul Brook <paul@codesourcery.com>
963 Ricardo Anguiano <anguiano@codesourcery.com>
964 Phil Edwards <phil@codesourcery.com>
965
966 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
967 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
968 R_ARM_ABS12 reloc.
969 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
970 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
971 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
972
973 2006-03-06 Bob Wilson <bob.wilson@acm.org>
974
975 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
976 even when using the text-section-literals option.
977
978 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
979
980 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
981 and cf.
982 (m68k_ip): <case 'J'> Check we have some control regs.
983 (md_parse_option): Allow raw arch switch.
984 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
985 whether 68881 or cfloat was meant by -mfloat.
986 (md_show_usage): Adjust extension display.
987 (m68k_elf_final_processing): Adjust.
988
989 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
990
991 * config/tc-avr.c (avr_mod_hash_value): New function.
992 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
993 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
994 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
995 instead of int avr_ldi_expression: use avr_mod_hash_value instead
996 of (int).
997 (tc_gen_reloc): Handle substractions of symbols, if possible do
998 fixups, abort otherwise.
999 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1000 tc_fix_adjustable): Define.
1001
1002 2006-03-02 James E Wilson <wilson@specifix.com>
1003
1004 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1005 change the template, then clear md.slot[curr].end_of_insn_group.
1006
1007 2006-02-28 Jan Beulich <jbeulich@novell.com>
1008
1009 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1010
1011 2006-02-28 Jan Beulich <jbeulich@novell.com>
1012
1013 PR/1070
1014 * macro.c (getstring): Don't treat parentheses special anymore.
1015 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1016 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1017 characters.
1018
1019 2006-02-28 Mat <mat@csail.mit.edu>
1020
1021 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1022
1023 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1024
1025 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1026 field.
1027 (CFI_signal_frame): Define.
1028 (cfi_pseudo_table): Add .cfi_signal_frame.
1029 (dot_cfi): Handle CFI_signal_frame.
1030 (output_cie): Handle cie->signal_frame.
1031 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1032 different. Copy signal_frame from FDE to newly created CIE.
1033 * doc/as.texinfo: Document .cfi_signal_frame.
1034
1035 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1036
1037 * doc/Makefile.am: Add html target.
1038 * doc/Makefile.in: Regenerate.
1039 * po/Make-in: Add html target.
1040
1041 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1042
1043 * config/tc-i386.c (output_insn): Support Intel Merom New
1044 Instructions.
1045
1046 * config/tc-i386.h (CpuMNI): New.
1047 (CpuUnknownFlags): Add CpuMNI.
1048
1049 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1050
1051 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1052 (hpriv_reg_table): New table for hyperprivileged registers.
1053 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1054 register encoding.
1055
1056 2006-02-24 DJ Delorie <dj@redhat.com>
1057
1058 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1059 (tc_gen_reloc): Don't define.
1060 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1061 (OPTION_LINKRELAX): New.
1062 (md_longopts): Add it.
1063 (m32c_relax): New.
1064 (md_parse_options): Set it.
1065 (md_assemble): Emit relaxation relocs as needed.
1066 (md_convert_frag): Emit relaxation relocs as needed.
1067 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1068 (m32c_apply_fix): New.
1069 (tc_gen_reloc): New.
1070 (m32c_force_relocation): Force out jump relocs when relaxing.
1071 (m32c_fix_adjustable): Return false if relaxing.
1072
1073 2006-02-24 Paul Brook <paul@codesourcery.com>
1074
1075 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1076 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1077 (struct asm_barrier_opt): Define.
1078 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1079 (parse_psr): Accept V7M psr names.
1080 (parse_barrier): New function.
1081 (enum operand_parse_code): Add OP_oBARRIER.
1082 (parse_operands): Implement OP_oBARRIER.
1083 (do_barrier): New function.
1084 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1085 (do_t_cpsi): Add V7M restrictions.
1086 (do_t_mrs, do_t_msr): Validate V7M variants.
1087 (md_assemble): Check for NULL variants.
1088 (v7m_psrs, barrier_opt_names): New tables.
1089 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1090 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1091 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1092 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1093 (struct cpu_arch_ver_table): Define.
1094 (cpu_arch_ver): New.
1095 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1096 Tag_CPU_arch_profile.
1097 * doc/c-arm.texi: Document new cpu and arch options.
1098
1099 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1100
1101 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1102
1103 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1104
1105 * config/tc-ia64.c: Update copyright years.
1106
1107 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1108
1109 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1110 SDM 2.2.
1111
1112 2005-02-22 Paul Brook <paul@codesourcery.com>
1113
1114 * config/tc-arm.c (do_pld): Remove incorrect write to
1115 inst.instruction.
1116 (encode_thumb32_addr_mode): Use correct operand.
1117
1118 2006-02-21 Paul Brook <paul@codesourcery.com>
1119
1120 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1121
1122 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1123 Anil Paranjape <anilp1@kpitcummins.com>
1124 Shilin Shakti <shilins@kpitcummins.com>
1125
1126 * Makefile.am: Add xc16x related entry.
1127 * Makefile.in: Regenerate.
1128 * configure.in: Added xc16x related entry.
1129 * configure: Regenerate.
1130 * config/tc-xc16x.h: New file
1131 * config/tc-xc16x.c: New file
1132 * doc/c-xc16x.texi: New file for xc16x
1133 * doc/all.texi: Entry for xc16x
1134 * doc/Makefile.texi: Added c-xc16x.texi
1135 * NEWS: Announce the support for the new target.
1136
1137 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1138
1139 * configure.tgt: set emulation for mips-*-netbsd*
1140
1141 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1142
1143 * config.in: Rebuilt.
1144
1145 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1146
1147 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1148 from 1, not 0, in error messages.
1149 (md_assemble): Simplify special-case check for ENTRY instructions.
1150 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1151 operand in error message.
1152
1153 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1154
1155 * configure.tgt (arm-*-linux-gnueabi*): Change to
1156 arm-*-linux-*eabi*.
1157
1158 2006-02-10 Nick Clifton <nickc@redhat.com>
1159
1160 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1161 32-bit value is propagated into the upper bits of a 64-bit long.
1162
1163 * config/tc-arc.c (init_opcode_tables): Fix cast.
1164 (arc_extoper, md_operand): Likewise.
1165
1166 2006-02-09 David Heine <dlheine@tensilica.com>
1167
1168 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1169 each relaxation step.
1170
1171 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1172
1173 * configure.in (CHECK_DECLS): Add vsnprintf.
1174 * configure: Regenerate.
1175 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1176 include/declare here, but...
1177 * as.h: Move code detecting VARARGS idiom to the top.
1178 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1179 (vsnprintf): Declare if not already declared.
1180
1181 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1182
1183 * as.c (close_output_file): New.
1184 (main): Register close_output_file with xatexit before
1185 dump_statistics. Don't call output_file_close.
1186
1187 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1188
1189 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1190 mcf5329_control_regs): New.
1191 (not_current_architecture, selected_arch, selected_cpu): New.
1192 (m68k_archs, m68k_extensions): New.
1193 (archs): Renamed to ...
1194 (m68k_cpus): ... here. Adjust.
1195 (n_arches): Remove.
1196 (md_pseudo_table): Add arch and cpu directives.
1197 (find_cf_chip, m68k_ip): Adjust table scanning.
1198 (no_68851, no_68881): Remove.
1199 (md_assemble): Lazily initialize.
1200 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1201 (md_init_after_args): Move functionality to m68k_init_arch.
1202 (mri_chip): Adjust table scanning.
1203 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1204 options with saner parsing.
1205 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1206 m68k_init_arch): New.
1207 (s_m68k_cpu, s_m68k_arch): New.
1208 (md_show_usage): Adjust.
1209 (m68k_elf_final_processing): Set CF EF flags.
1210 * config/tc-m68k.h (m68k_init_after_args): Remove.
1211 (tc_init_after_args): Remove.
1212 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1213 (M68k-Directives): Document .arch and .cpu directives.
1214
1215 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1216
1217 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1218 synonyms for equ and defl.
1219 (z80_cons_fix_new): New function.
1220 (emit_byte): Disallow relative jumps to absolute locations.
1221 (emit_data): Only handle defb, prototype changed, because defb is
1222 now handled as pseudo-op rather than an instruction.
1223 (instab): Entries for defb,defw,db,dw moved from here...
1224 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1225 Add entries for def24,def32,d24,d32.
1226 (md_assemble): Improved error handling.
1227 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1228 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1229 (z80_cons_fix_new): Declare.
1230 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1231 (def24,d24,def32,d32): New pseudo-ops.
1232
1233 2006-02-02 Paul Brook <paul@codesourcery.com>
1234
1235 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1236
1237 2005-02-02 Paul Brook <paul@codesourcery.com>
1238
1239 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1240 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1241 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1242 T2_OPCODE_RSB): Define.
1243 (thumb32_negate_data_op): New function.
1244 (md_apply_fix): Use it.
1245
1246 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1247
1248 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1249 fields.
1250 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1251 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1252 subtracted symbols.
1253 (relaxation_requirements): Add pfinish_frag argument and use it to
1254 replace setting tinsn->record_fix fields.
1255 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1256 and vinsn_to_insnbuf. Remove references to record_fix and
1257 slot_sub_symbols fields.
1258 (xtensa_mark_narrow_branches): Delete unused code.
1259 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1260 a symbol.
1261 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1262 record_fix fields.
1263 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1264 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1265 of the record_fix field. Simplify error messages for unexpected
1266 symbolic operands.
1267 (set_expr_symbol_offset_diff): Delete.
1268
1269 2006-01-31 Paul Brook <paul@codesourcery.com>
1270
1271 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1272
1273 2006-01-31 Paul Brook <paul@codesourcery.com>
1274 Richard Earnshaw <rearnsha@arm.com>
1275
1276 * config/tc-arm.c: Use arm_feature_set.
1277 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1278 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1279 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1280 New variables.
1281 (insns): Use them.
1282 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1283 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1284 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1285 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1286 feature flags.
1287 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1288 (arm_opts): Move old cpu/arch options from here...
1289 (arm_legacy_opts): ... to here.
1290 (md_parse_option): Search arm_legacy_opts.
1291 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1292 (arm_float_abis, arm_eabis): Make const.
1293
1294 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1295
1296 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1297
1298 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1299
1300 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1301 in load immediate intruction.
1302
1303 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1304
1305 * config/bfin-parse.y (value_match): Use correct conversion
1306 specifications in template string for __FILE__ and __LINE__.
1307 (binary): Ditto.
1308 (unary): Ditto.
1309
1310 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1311
1312 Introduce TLS descriptors for i386 and x86_64.
1313 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1314 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1315 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1316 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1317 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1318 displacement bits.
1319 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1320 (lex_got): Handle @tlsdesc and @tlscall.
1321 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1322
1323 2006-01-11 Nick Clifton <nickc@redhat.com>
1324
1325 Fixes for building on 64-bit hosts:
1326 * config/tc-avr.c (mod_index): New union to allow conversion
1327 between pointers and integers.
1328 (md_begin, avr_ldi_expression): Use it.
1329 * config/tc-i370.c (md_assemble): Add cast for argument to print
1330 statement.
1331 * config/tc-tic54x.c (subsym_substitute): Likewise.
1332 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1333 opindex field of fr_cgen structure into a pointer so that it can
1334 be stored in a frag.
1335 * config/tc-mn10300.c (md_assemble): Likewise.
1336 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1337 types.
1338 * config/tc-v850.c: Replace uses of (int) casts with correct
1339 types.
1340
1341 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1342
1343 PR gas/2117
1344 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1345
1346 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1347
1348 PR gas/2101
1349 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1350 a local-label reference.
1351
1352 For older changes see ChangeLog-2005
1353 \f
1354 Local Variables:
1355 mode: change-log
1356 left-margin: 8
1357 fill-column: 74
1358 version-control: never
1359 End:
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