1 2006-08-08 Sterling Augustine <sterling@tensilica.com>
3 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
4 and emit DW_AT_ranges when code in compilation unit is not
6 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
8 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
9 (out_debug_ranges): New function to emit .debug_ranges section
10 when code is not contiguous.
12 2006-08-08 Nick Clifton <nickc@redhat.com>
14 * config/tc-arm.c (WARN_DEPRECATED): Enable.
16 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
18 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
20 (pe_directive_secrel) [TE_PE]: New function.
21 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
23 [TE_PE]: Handle secrel32.
24 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
26 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
27 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
28 (md_section_align): Only round section sizes here for AOUT
30 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
31 (tc_pe_dwarf2_emit_offset): New function.
32 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
33 (cons_fix_new_arm): Handle O_secrel.
34 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
35 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
36 of OBJ_ELF only block.
37 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
38 tc_pe_dwarf2_emit_offset.
40 2006-08-04 Richard Sandiford <richard@codesourcery.com>
42 * config/tc-sh.c (apply_full_field_fix): New function.
43 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
44 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
45 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
46 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
48 2006-08-03 Nick Clifton <nickc@redhat.com>
51 * config.in: Regenerate.
53 2006-08-03 Joseph Myers <joseph@codesourcery.com>
55 * config/tc-arm.c (parse_operands): Handle invalid register name
58 2006-08-03 Joseph Myers <joseph@codesourcery.com>
60 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
61 (parse_operands): Handle it.
62 (insns): Use it for tmcr and tmrc.
64 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
67 * config/tc-i386.c (md_parse_option): Treat any target starting
68 with elf64_x86_64 as a viable target for the -64 switch.
69 (i386_target_format): For 64-bit ELF flavoured output use
71 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
73 2006-08-02 Nick Clifton <nickc@redhat.com>
76 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
78 * configure.in: Run BFD_BINARY_FOPEN.
79 * configure: Regenerate.
80 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
83 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
85 * config/tc-i386.c (md_assemble): Don't update
88 2006-08-01 Thiemo Seufer <ths@mips.com>
90 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
92 2006-08-01 Thiemo Seufer <ths@mips.com>
94 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
95 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
96 BFD_RELOC_32 and BFD_RELOC_16.
97 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
98 md_convert_frag, md_obj_end): Fix comment formatting.
100 2006-07-31 Thiemo Seufer <ths@mips.com>
102 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
103 handling for BFD_RELOC_MIPS16_JMP.
105 2006-07-24 Andreas Schwab <schwab@suse.de>
108 * read.c (read_a_source_file): Ignore unknown text after line
109 comment character. Fix misleading comment.
111 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
113 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
114 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
115 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
116 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
117 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
118 doc/c-z80.texi, doc/internals.texi: Fix some typos.
120 2006-07-21 Nick Clifton <nickc@redhat.com>
122 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
125 2006-07-20 Thiemo Seufer <ths@mips.com>
126 Nigel Stephens <nigel@mips.com>
128 * config/tc-mips.c (md_parse_option): Don't infer optimisation
129 options from debug options.
131 2006-07-20 Thiemo Seufer <ths@mips.com>
133 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
134 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
136 2006-07-19 Paul Brook <paul@codesourcery.com>
138 * config/tc-arm.c (insns): Fix rbit Arm opcode.
140 2006-07-18 Paul Brook <paul@codesourcery.com>
142 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
143 (md_convert_frag): Use correct reloc for add_pc. Use
144 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
145 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
146 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
148 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
150 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
151 when file and line unknown.
153 2006-07-17 Thiemo Seufer <ths@mips.com>
155 * read.c (s_struct): Use IS_ELF.
156 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
157 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
158 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
159 s_mips_mask): Likewise.
161 2006-07-16 Thiemo Seufer <ths@mips.com>
162 David Ung <davidu@mips.com>
164 * read.c (s_struct): Handle ELF section changing.
165 * config/tc-mips.c (s_align): Leave enabling auto-align to the
167 (s_change_sec): Try section changing only if we output ELF.
169 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
171 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
173 (smallest_imm_type): Remove Cpu086.
174 (i386_target_format): Likewise.
176 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
179 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
180 Michael Meissner <michael.meissner@amd.com>
182 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
183 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
184 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
186 (i386_align_code): Ditto.
187 (md_assemble_code): Add support for insertq/extrq instructions,
188 swapping as needed for intel syntax.
189 (swap_imm_operands): New function to swap immediate operands.
190 (swap_operands): Deal with 4 operand instructions.
191 (build_modrm_byte): Add support for insertq instruction.
193 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
195 * config/tc-i386.h (Size64): Fix a typo in comment.
197 2006-07-12 Nick Clifton <nickc@redhat.com>
199 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
200 fixup_segment() to repeat a range check on a value that has
201 already been checked here.
203 2006-07-07 James E Wilson <wilson@specifix.com>
205 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
207 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
208 Nick Clifton <nickc@redhat.com>
211 * doc/as.texi: Fix spelling typo: branchs => branches.
212 * doc/c-m68hc11.texi: Likewise.
213 * config/tc-m68hc11.c: Likewise.
214 Support old spelling of command line switch for backwards
217 2006-07-04 Thiemo Seufer <ths@mips.com>
218 David Ung <davidu@mips.com>
220 * config/tc-mips.c (s_is_linkonce): New function.
221 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
222 weak, external, and linkonce symbols.
223 (pic_need_relax): Use s_is_linkonce.
225 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
227 * doc/as.texinfo (Org): Remove space.
228 (P2align): Add "@var{abs-expr},".
230 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
232 * config/tc-i386.c (cpu_arch_tune_set): New.
233 (cpu_arch_isa): Likewise.
234 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
235 nops with short or long nop sequences based on -march=/.arch
237 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
238 set cpu_arch_tune and cpu_arch_tune_flags.
239 (md_parse_option): For -march=, set cpu_arch_isa and set
240 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
241 0. Set cpu_arch_tune_set to 1 for -mtune=.
242 (i386_target_format): Don't set cpu_arch_tune.
244 2006-06-23 Nigel Stephens <nigel@mips.com>
246 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
247 generated .sbss.* and .gnu.linkonce.sb.*.
249 2006-06-23 Thiemo Seufer <ths@mips.com>
250 David Ung <davidu@mips.com>
252 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
254 * config/tc-mips.c (label_list): Define per-segment label_list.
255 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
256 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
257 mips_from_file_after_relocs, mips_define_label): Use per-segment
260 2006-06-22 Thiemo Seufer <ths@mips.com>
262 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
263 (append_insn): Use it.
264 (md_apply_fix): Whitespace formatting.
265 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
266 mips16_extended_frag): Remove register specifier.
267 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
270 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
272 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
273 a directive saving VFP registers for ARMv6 or later.
274 (s_arm_unwind_save): Add parameter arch_v6 and call
275 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
277 (md_pseudo_table): Add entry for new "vsave" directive.
278 * doc/c-arm.texi: Correct error in example for "save"
279 directive (fstmdf -> fstmdx). Also document "vsave" directive.
281 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
282 Anatoly Sokolov <aesok@post.ru>
284 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
285 and atmega644p devices. Rename atmega164/atmega324 devices to
286 atmega164p/atmega324p.
287 * doc/c-avr.texi: Document new mcu and arch options.
289 2006-06-17 Nick Clifton <nickc@redhat.com>
291 * config/tc-arm.c (enum parse_operand_result): Move outside of
292 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
294 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
296 * config/tc-i386.h (processor_type): New.
297 (arch_entry): Add type.
299 * config/tc-i386.c (cpu_arch_tune): New.
300 (cpu_arch_tune_flags): Likewise.
301 (cpu_arch_isa_flags): Likewise.
303 (set_cpu_arch): Also update cpu_arch_isa_flags.
304 (md_assemble): Update cpu_arch_isa_flags.
306 (OPTION_MTUNE): Likewise.
307 (md_longopts): Add -march= and -mtune=.
308 (md_parse_option): Support -march= and -mtune=.
309 (md_show_usage): Add -march=CPU/-mtune=CPU.
310 (i386_target_format): Also update cpu_arch_isa_flags,
311 cpu_arch_tune and cpu_arch_tune_flags.
313 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
315 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
317 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
319 * config/tc-arm.c (enum parse_operand_result): New.
320 (struct group_reloc_table_entry): New.
321 (enum group_reloc_type): New.
322 (group_reloc_table): New array.
323 (find_group_reloc_table_entry): New function.
324 (parse_shifter_operand_group_reloc): New function.
325 (parse_address_main): New function, incorporating code
326 from the old parse_address function. To be used via...
327 (parse_address): wrapper for parse_address_main; and
328 (parse_address_group_reloc): new function, likewise.
329 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
330 OP_ADDRGLDRS, OP_ADDRGLDC.
331 (parse_operands): Support for these new operand codes.
332 New macro po_misc_or_fail_no_backtrack.
333 (encode_arm_cp_address): Preserve group relocations.
334 (insns): Modify to use the above operand codes where group
335 relocations are permitted.
336 (md_apply_fix): Handle the group relocations
337 ALU_PC_G0_NC through LDC_SB_G2.
338 (tc_gen_reloc): Likewise.
339 (arm_force_relocation): Leave group relocations for the linker.
340 (arm_fix_adjustable): Likewise.
342 2006-06-15 Julian Brown <julian@codesourcery.com>
344 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
345 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
348 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
350 * config/tc-i386.c (process_suffix): Don't add rex64 for
353 2006-06-09 Thiemo Seufer <ths@mips.com>
355 * config/tc-mips.c (mips_ip): Maintain argument count.
357 2006-06-09 Alan Modra <amodra@bigpond.net.au>
359 * config/tc-iq2000.c: Include sb.h.
361 2006-06-08 Nigel Stephens <nigel@mips.com>
363 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
364 aliases for better compatibility with SGI tools.
366 2006-06-08 Alan Modra <amodra@bigpond.net.au>
368 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
369 * Makefile.am (GASLIBS): Expand @BFDLIB@.
371 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
372 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
373 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
375 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
376 * Makefile.in: Regenerate.
377 * doc/Makefile.in: Regenerate.
378 * configure: Regenerate.
380 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
382 * po/Make-in (pdf, ps): New dummy targets.
384 2006-06-07 Julian Brown <julian@codesourcery.com>
386 * config/tc-arm.c (stdarg.h): include.
387 (arm_it): Add uncond_value field. Add isvec and issingle to operand
389 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
390 REG_TYPE_NSDQ (single, double or quad vector reg).
391 (reg_expected_msgs): Update.
392 (BAD_FPU): Add macro for unsupported FPU instruction error.
393 (parse_neon_type): Support 'd' as an alias for .f64.
394 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
396 (parse_vfp_reg_list): Don't update first arg on error.
397 (parse_neon_mov): Support extra syntax for VFP moves.
398 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
399 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
400 (parse_operands): Support isvec, issingle operands fields, new parse
402 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
404 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
405 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
406 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
407 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
409 (neon_shape): Redefine in terms of above.
410 (neon_shape_class): New enumeration, table of shape classes.
411 (neon_shape_el): New enumeration. One element of a shape.
412 (neon_shape_el_size): Register widths of above, where appropriate.
413 (neon_shape_info): New struct. Info for shape table.
414 (neon_shape_tab): New array.
415 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
416 (neon_check_shape): Rewrite as...
417 (neon_select_shape): New function to classify instruction shapes,
418 driven by new table neon_shape_tab array.
419 (neon_quad): New function. Return 1 if shape should set Q flag in
420 instructions (or equivalent), 0 otherwise.
421 (type_chk_of_el_type): Support F64.
422 (el_type_of_type_chk): Likewise.
423 (neon_check_type): Add support for VFP type checking (VFP data
424 elements fill their containing registers).
425 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
426 in thumb mode for VFP instructions.
427 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
428 and encode the current instruction as if it were that opcode.
429 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
430 arguments, call function in PFN.
431 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
432 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
433 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
434 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
435 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
436 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
437 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
438 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
439 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
440 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
441 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
442 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
443 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
444 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
445 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
447 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
448 between VFP and Neon turns out to belong to Neon. Perform
449 architecture check and fill in condition field if appropriate.
450 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
451 (do_neon_cvt): Add support for VFP variants of instructions.
452 (neon_cvt_flavour): Extend to cover VFP conversions.
453 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
455 (do_neon_ldr_str): Handle single-precision VFP load/store.
456 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
457 NS_NULL not NS_IGNORE.
458 (opcode_tag): Add OT_csuffixF for operands which either take a
459 conditional suffix, or have 0xF in the condition field.
460 (md_assemble): Add support for OT_csuffixF.
461 (NCE): Replace macro with...
462 (NCE_tag, NCE, NCEF): New macros.
463 (nCE): Replace macro with...
464 (nCE_tag, nCE, nCEF): New macros.
465 (insns): Add support for VFP insns or VFP versions of insns msr,
466 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
467 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
468 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
469 VFP/Neon insns together.
471 2006-06-07 Alan Modra <amodra@bigpond.net.au>
472 Ladislav Michl <ladis@linux-mips.org>
474 * app.c: Don't include headers already included by as.h.
476 * atof-generic.c: Likewise.
478 * dwarf2dbg.c: Likewise.
480 * input-file.c: Likewise.
481 * input-scrub.c: Likewise.
483 * output-file.c: Likewise.
486 * config/bfin-lex.l: Likewise.
487 * config/obj-coff.h: Likewise.
488 * config/obj-elf.h: Likewise.
489 * config/obj-som.h: Likewise.
490 * config/tc-arc.c: Likewise.
491 * config/tc-arm.c: Likewise.
492 * config/tc-avr.c: Likewise.
493 * config/tc-bfin.c: Likewise.
494 * config/tc-cris.c: Likewise.
495 * config/tc-d10v.c: Likewise.
496 * config/tc-d30v.c: Likewise.
497 * config/tc-dlx.h: Likewise.
498 * config/tc-fr30.c: Likewise.
499 * config/tc-frv.c: Likewise.
500 * config/tc-h8300.c: Likewise.
501 * config/tc-hppa.c: Likewise.
502 * config/tc-i370.c: Likewise.
503 * config/tc-i860.c: Likewise.
504 * config/tc-i960.c: Likewise.
505 * config/tc-ip2k.c: Likewise.
506 * config/tc-iq2000.c: Likewise.
507 * config/tc-m32c.c: Likewise.
508 * config/tc-m32r.c: Likewise.
509 * config/tc-maxq.c: Likewise.
510 * config/tc-mcore.c: Likewise.
511 * config/tc-mips.c: Likewise.
512 * config/tc-mmix.c: Likewise.
513 * config/tc-mn10200.c: Likewise.
514 * config/tc-mn10300.c: Likewise.
515 * config/tc-msp430.c: Likewise.
516 * config/tc-mt.c: Likewise.
517 * config/tc-ns32k.c: Likewise.
518 * config/tc-openrisc.c: Likewise.
519 * config/tc-ppc.c: Likewise.
520 * config/tc-s390.c: Likewise.
521 * config/tc-sh.c: Likewise.
522 * config/tc-sh64.c: Likewise.
523 * config/tc-sparc.c: Likewise.
524 * config/tc-tic30.c: Likewise.
525 * config/tc-tic4x.c: Likewise.
526 * config/tc-tic54x.c: Likewise.
527 * config/tc-v850.c: Likewise.
528 * config/tc-vax.c: Likewise.
529 * config/tc-xc16x.c: Likewise.
530 * config/tc-xstormy16.c: Likewise.
531 * config/tc-xtensa.c: Likewise.
532 * config/tc-z80.c: Likewise.
533 * config/tc-z8k.c: Likewise.
534 * macro.h: Don't include sb.h or ansidecl.h.
535 * sb.h: Don't include stdio.h or ansidecl.h.
536 * cond.c: Include sb.h.
537 * itbl-lex.l: Include as.h instead of other system headers.
538 * itbl-parse.y: Likewise.
539 * itbl-ops.c: Similarly.
540 * itbl-ops.h: Don't include as.h or ansidecl.h.
541 * config/bfin-defs.h: Don't include bfd.h or as.h.
542 * config/bfin-parse.y: Include as.h instead of other system headers.
544 2006-06-06 Ben Elliston <bje@au.ibm.com>
545 Anton Blanchard <anton@samba.org>
547 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
548 (md_show_usage): Document it.
549 (ppc_setup_opcodes): Test power6 opcode flag bits.
550 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
552 2006-06-06 Thiemo Seufer <ths@mips.com>
553 Chao-ying Fu <fu@mips.com>
555 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
556 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
557 (macro_build): Update comment.
558 (mips_ip): Allow DSP64 instructions for MIPS64R2.
559 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
561 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
562 MIPS_CPU_ASE_MDMX flags for sb1.
564 2006-06-05 Thiemo Seufer <ths@mips.com>
566 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
568 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
569 (mips_ip): Make overflowed/underflowed constant arguments in DSP
570 and MT instructions a fatal error. Use INSERT_OPERAND where
571 appropriate. Improve warnings for break and wait code overflows.
572 Use symbolic constant of OP_MASK_COPZ.
573 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
575 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
577 * po/Make-in (top_builddir): Define.
579 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
581 * doc/Makefile.am (TEXI2DVI): Define.
582 * doc/Makefile.in: Regenerate.
583 * doc/c-arc.texi: Fix typo.
585 2006-06-01 Alan Modra <amodra@bigpond.net.au>
587 * config/obj-ieee.c: Delete.
588 * config/obj-ieee.h: Delete.
589 * Makefile.am (OBJ_FORMATS): Remove ieee.
590 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
591 (obj-ieee.o): Remove rule.
592 * Makefile.in: Regenerate.
593 * configure.in (atof): Remove tahoe.
594 (OBJ_MAYBE_IEEE): Don't define.
595 * configure: Regenerate.
596 * config.in: Regenerate.
597 * doc/Makefile.in: Regenerate.
598 * po/POTFILES.in: Regenerate.
600 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
602 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
603 and LIBINTL_DEP everywhere.
605 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
606 * acinclude.m4: Include new gettext macros.
607 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
608 Remove local code for po/Makefile.
609 * Makefile.in, configure, doc/Makefile.in: Regenerated.
611 2006-05-30 Nick Clifton <nickc@redhat.com>
613 * po/es.po: Updated Spanish translation.
615 2006-05-06 Denis Chertykov <denisc@overta.ru>
617 * doc/c-avr.texi: New file.
618 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
619 * doc/all.texi: Set AVR
620 * doc/as.texinfo: Include c-avr.texi
622 2006-05-28 Jie Zhang <jie.zhang@analog.com>
624 * config/bfin-parse.y (check_macfunc): Loose the condition of
625 calling check_multiply_halfregs ().
627 2006-05-25 Jie Zhang <jie.zhang@analog.com>
629 * config/bfin-parse.y (asm_1): Better check and deal with
630 vector and scalar Multiply 16-Bit Operands instructions.
632 2006-05-24 Nick Clifton <nickc@redhat.com>
634 * config/tc-hppa.c: Convert to ISO C90 format.
635 * config/tc-hppa.h: Likewise.
637 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
638 Randolph Chung <randolph@tausq.org>
640 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
641 is_tls_ieoff, is_tls_leoff): Define.
642 (fix_new_hppa): Handle TLS.
643 (cons_fix_new_hppa): Likewise.
645 (md_apply_fix): Handle TLS relocs.
646 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
648 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
650 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
652 2006-05-23 Thiemo Seufer <ths@mips.com>
653 David Ung <davidu@mips.com>
654 Nigel Stephens <nigel@mips.com>
657 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
658 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
659 ISA_HAS_MXHC1): New macros.
660 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
661 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
662 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
663 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
664 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
665 (mips_after_parse_args): Change default handling of float register
666 size to account for 32bit code with 64bit FP. Better sanity checking
667 of ISA/ASE/ABI option combinations.
668 (s_mipsset): Support switching of GPR and FPR sizes via
669 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
671 (mips_elf_final_processing): We should record the use of 64bit FP
672 registers in 32bit code but we don't, because ELF header flags are
674 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
675 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
676 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
677 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
678 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
679 missing -march options. Document .set arch=CPU. Move .set smartmips
680 to ASE page. Use @code for .set FOO examples.
682 2006-05-23 Jie Zhang <jie.zhang@analog.com>
684 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
687 2006-05-23 Jie Zhang <jie.zhang@analog.com>
689 * config/bfin-defs.h (bfin_equals): Remove declaration.
690 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
691 * config/tc-bfin.c (bfin_name_is_register): Remove.
692 (bfin_equals): Remove.
693 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
694 (bfin_name_is_register): Remove declaration.
696 2006-05-19 Thiemo Seufer <ths@mips.com>
697 Nigel Stephens <nigel@mips.com>
699 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
700 (mips_oddfpreg_ok): New function.
703 2006-05-19 Thiemo Seufer <ths@mips.com>
704 David Ung <davidu@mips.com>
706 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
707 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
708 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
709 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
710 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
711 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
712 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
713 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
714 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
715 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
716 reg_names_o32, reg_names_n32n64): Define register classes.
717 (reg_lookup): New function, use register classes.
718 (md_begin): Reserve register names in the symbol table. Simplify
720 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
722 (mips16_ip): Use reg_lookup.
723 (tc_get_register): Likewise.
724 (tc_mips_regname_to_dw2regnum): New function.
726 2006-05-19 Thiemo Seufer <ths@mips.com>
728 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
729 Un-constify string argument.
730 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
732 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
734 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
736 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
738 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
740 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
743 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
745 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
746 cfloat/m68881 to correct architecture before using it.
748 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
750 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
753 2006-05-15 Paul Brook <paul@codesourcery.com>
755 * config/tc-arm.c (arm_adjust_symtab): Use
756 bfd_is_arm_special_symbol_name.
758 2006-05-15 Bob Wilson <bob.wilson@acm.org>
760 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
761 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
762 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
763 Handle errors from calls to xtensa_opcode_is_* functions.
765 2006-05-14 Thiemo Seufer <ths@mips.com>
767 * config/tc-mips.c (macro_build): Test for currently active
769 (mips16_ip): Reject invalid opcodes.
771 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
773 * doc/as.texinfo: Rename "Index" to "AS Index",
774 and "ABORT" to "ABORT (COFF)".
776 2006-05-11 Paul Brook <paul@codesourcery.com>
778 * config/tc-arm.c (parse_half): New function.
779 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
780 (parse_operands): Ditto.
781 (do_mov16): Reject invalid relocations.
782 (do_t_mov16): Ditto. Use Thumb reloc numbers.
783 (insns): Replace Iffff with HALF.
784 (md_apply_fix): Add MOVW and MOVT relocs.
785 (tc_gen_reloc): Ditto.
786 * doc/c-arm.texi: Document relocation operators
788 2006-05-11 Paul Brook <paul@codesourcery.com>
790 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
792 2006-05-11 Thiemo Seufer <ths@mips.com>
794 * config/tc-mips.c (append_insn): Don't check the range of j or
797 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
799 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
800 relocs against external symbols for WinCE targets.
801 (md_apply_fix): Likewise.
803 2006-05-09 David Ung <davidu@mips.com>
805 * config/tc-mips.c (append_insn): Only warn about an out-of-range
808 2006-05-09 Nick Clifton <nickc@redhat.com>
810 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
811 against symbols which are not going to be placed into the symbol
814 2006-05-09 Ben Elliston <bje@au.ibm.com>
816 * expr.c (operand): Remove `if (0 && ..)' statement and
817 subsequently unused target_op label. Collapse `if (1 || ..)'
819 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
820 separately above the switch.
822 2006-05-08 Nick Clifton <nickc@redhat.com>
825 * config/tc-msp430.c (line_separator_character): Define as |.
827 2006-05-08 Thiemo Seufer <ths@mips.com>
828 Nigel Stephens <nigel@mips.com>
829 David Ung <davidu@mips.com>
831 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
832 (mips_opts): Likewise.
833 (file_ase_smartmips): New variable.
834 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
835 (macro_build): Handle SmartMIPS instructions.
837 (md_longopts): Add argument handling for smartmips.
838 (md_parse_options, mips_after_parse_args): Likewise.
839 (s_mipsset): Add .set smartmips support.
840 (md_show_usage): Document -msmartmips/-mno-smartmips.
841 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
843 * doc/c-mips.texi: Likewise.
845 2006-05-08 Alan Modra <amodra@bigpond.net.au>
847 * write.c (relax_segment): Add pass count arg. Don't error on
848 negative org/space on first two passes.
849 (relax_seg_info): New struct.
850 (relax_seg, write_object_file): Adjust.
851 * write.h (relax_segment): Update prototype.
853 2006-05-05 Julian Brown <julian@codesourcery.com>
855 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
857 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
858 architecture version checks.
859 (insns): Allow overlapping instructions to be used in VFP mode.
861 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
864 * config/obj-elf.c (obj_elf_change_section): Allow user
865 specified SHF_ALPHA_GPREL.
867 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
869 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
870 for PMEM related expressions.
872 2006-05-05 Nick Clifton <nickc@redhat.com>
875 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
876 insertion of a directory separator character into a string at a
877 given offset. Uses heuristics to decide when to use a backslash
878 character rather than a forward-slash character.
879 (dwarf2_directive_loc): Use the macro.
880 (out_debug_info): Likewise.
882 2006-05-05 Thiemo Seufer <ths@mips.com>
883 David Ung <davidu@mips.com>
885 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
887 (macro): Add new case M_CACHE_AB.
889 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
891 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
892 (opcode_lookup): Issue a warning for opcode with
893 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
894 identical to OT_cinfix3.
895 (TxC3w, TC3w, tC3w): New.
896 (insns): Use tC3w and TC3w for comparison instructions with
899 2006-05-04 Alan Modra <amodra@bigpond.net.au>
901 * subsegs.h (struct frchain): Delete frch_seg.
902 (frchain_root): Delete.
903 (seg_info): Define as macro.
904 * subsegs.c (frchain_root): Delete.
905 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
906 (subsegs_begin, subseg_change): Adjust for above.
907 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
908 rather than to one big list.
909 (subseg_get): Don't special case abs, und sections.
910 (subseg_new, subseg_force_new): Don't set frchainP here.
912 (subsegs_print_statistics): Adjust frag chain control list traversal.
913 * debug.c (dmp_frags): Likewise.
914 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
915 at frchain_root. Make use of known frchain ordering.
916 (last_frag_for_seg): Likewise.
917 (get_frag_fix): Likewise. Add seg param.
918 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
919 * write.c (chain_frchains_together_1): Adjust for struct frchain.
920 (SUB_SEGMENT_ALIGN): Likewise.
921 (subsegs_finish): Adjust frchain list traversal.
922 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
923 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
924 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
925 (xtensa_fix_b_j_loop_end_frags): Likewise.
926 (xtensa_fix_close_loop_end_frags): Likewise.
927 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
928 (retrieve_segment_info): Delete frch_seg initialisation.
930 2006-05-03 Alan Modra <amodra@bigpond.net.au>
932 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
933 * config/obj-elf.h (obj_sec_set_private_data): Delete.
934 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
935 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
937 2006-05-02 Joseph Myers <joseph@codesourcery.com>
939 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
941 (md_apply_fix3): Multiply offset by 4 here for
942 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
944 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
945 Jan Beulich <jbeulich@novell.com>
947 * config/tc-i386.c (output_invalid_buf): Change size for
949 * config/tc-tic30.c (output_invalid_buf): Likewise.
951 * config/tc-i386.c (output_invalid): Cast none-ascii char to
953 * config/tc-tic30.c (output_invalid): Likewise.
955 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
957 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
958 (TEXI2POD): Use AM_MAKEINFOFLAGS.
959 (asconfig.texi): Don't set top_srcdir.
960 * doc/as.texinfo: Don't use top_srcdir.
961 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
963 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
965 * config/tc-i386.c (output_invalid_buf): Change size to 16.
966 * config/tc-tic30.c (output_invalid_buf): Likewise.
968 * config/tc-i386.c (output_invalid): Use snprintf instead of
970 * config/tc-ia64.c (declare_register_set): Likewise.
971 (emit_one_bundle): Likewise.
972 (check_dependencies): Likewise.
973 * config/tc-tic30.c (output_invalid): Likewise.
975 2006-05-02 Paul Brook <paul@codesourcery.com>
977 * config/tc-arm.c (arm_optimize_expr): New function.
978 * config/tc-arm.h (md_optimize_expr): Define
979 (arm_optimize_expr): Add prototype.
980 (TC_FORCE_RELOCATION_SUB_SAME): Define.
982 2006-05-02 Ben Elliston <bje@au.ibm.com>
984 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
987 * sb.h (sb_list_vector): Move to sb.c.
988 * sb.c (free_list): Use type of sb_list_vector directly.
989 (sb_build): Fix off-by-one error in assertion about `size'.
991 2006-05-01 Ben Elliston <bje@au.ibm.com>
993 * listing.c (listing_listing): Remove useless loop.
994 * macro.c (macro_expand): Remove is_positional local variable.
995 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
996 and simplify surrounding expressions, where possible.
997 (assign_symbol): Likewise.
998 (s_weakref): Likewise.
999 * symbols.c (colon): Likewise.
1001 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1003 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1005 2006-04-30 Thiemo Seufer <ths@mips.com>
1006 David Ung <davidu@mips.com>
1008 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1009 (mips_immed): New table that records various handling of udi
1010 instruction patterns.
1011 (mips_ip): Adds udi handling.
1013 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1015 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1016 of list rather than beginning.
1018 2006-04-26 Julian Brown <julian@codesourcery.com>
1020 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1021 (is_quarter_float): Rename from above. Simplify slightly.
1022 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1024 (parse_neon_mov): Parse floating-point constants.
1025 (neon_qfloat_bits): Fix encoding.
1026 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1027 preference to integer encoding when using the F32 type.
1029 2006-04-26 Julian Brown <julian@codesourcery.com>
1031 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1032 zero-initialising structures containing it will lead to invalid types).
1033 (arm_it): Add vectype to each operand.
1034 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1036 (neon_typed_alias): New structure. Extra information for typed
1038 (reg_entry): Add neon type info field.
1039 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1040 Break out alternative syntax for coprocessor registers, etc. into...
1041 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1042 out from arm_reg_parse.
1043 (parse_neon_type): Move. Return SUCCESS/FAIL.
1044 (first_error): New function. Call to ensure first error which occurs is
1046 (parse_neon_operand_type): Parse exactly one type.
1047 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1048 (parse_typed_reg_or_scalar): New function. Handle core of both
1049 arm_typed_reg_parse and parse_scalar.
1050 (arm_typed_reg_parse): Parse a register with an optional type.
1051 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1053 (parse_scalar): Parse a Neon scalar with optional type.
1054 (parse_reg_list): Use first_error.
1055 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1056 (neon_alias_types_same): New function. Return true if two (alias) types
1058 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1060 (insert_reg_alias): Return new reg_entry not void.
1061 (insert_neon_reg_alias): New function. Insert type/index information as
1062 well as register for alias.
1063 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1064 make typed register aliases accordingly.
1065 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1067 (s_unreq): Delete type information if present.
1068 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1069 (s_arm_unwind_save_mmxwcg): Likewise.
1070 (s_arm_unwind_movsp): Likewise.
1071 (s_arm_unwind_setfp): Likewise.
1072 (parse_shift): Likewise.
1073 (parse_shifter_operand): Likewise.
1074 (parse_address): Likewise.
1075 (parse_tb): Likewise.
1076 (tc_arm_regname_to_dw2regnum): Likewise.
1077 (md_pseudo_table): Add dn, qn.
1078 (parse_neon_mov): Handle typed operands.
1079 (parse_operands): Likewise.
1080 (neon_type_mask): Add N_SIZ.
1081 (N_ALLMODS): New macro.
1082 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1083 (el_type_of_type_chk): Add some safeguards.
1084 (modify_types_allowed): Fix logic bug.
1085 (neon_check_type): Handle operands with types.
1086 (neon_three_same): Remove redundant optional arg handling.
1087 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1088 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1089 (do_neon_step): Adjust accordingly.
1090 (neon_cmode_for_logic_imm): Use first_error.
1091 (do_neon_bitfield): Call neon_check_type.
1092 (neon_dyadic): Rename to...
1093 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1094 to allow modification of type of the destination.
1095 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1096 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1097 (do_neon_compare): Make destination be an untyped bitfield.
1098 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1099 (neon_mul_mac): Return early in case of errors.
1100 (neon_move_immediate): Use first_error.
1101 (neon_mac_reg_scalar_long): Fix type to include scalar.
1102 (do_neon_dup): Likewise.
1103 (do_neon_mov): Likewise (in several places).
1104 (do_neon_tbl_tbx): Fix type.
1105 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1106 (do_neon_ld_dup): Exit early in case of errors and/or use
1108 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1109 Handle .dn/.qn directives.
1110 (REGDEF): Add zero for reg_entry neon field.
1112 2006-04-26 Julian Brown <julian@codesourcery.com>
1114 * config/tc-arm.c (limits.h): Include.
1115 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1116 (fpu_vfp_v3_or_neon_ext): Declare constants.
1117 (neon_el_type): New enumeration of types for Neon vector elements.
1118 (neon_type_el): New struct. Define type and size of a vector element.
1119 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1121 (neon_type): Define struct. The type of an instruction.
1122 (arm_it): Add 'vectype' for the current instruction.
1123 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1124 (vfp_sp_reg_pos): Rename to...
1125 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1127 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1128 (Neon D or Q register).
1129 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1131 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1132 (my_get_expression): Allow above constant as argument to accept
1133 64-bit constants with optional prefix.
1134 (arm_reg_parse): Add extra argument to return the specific type of
1135 register in when either a D or Q register (REG_TYPE_NDQ) is
1136 requested. Can be NULL.
1137 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1138 (parse_reg_list): Update for new arm_reg_parse args.
1139 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1140 (parse_neon_el_struct_list): New function. Parse element/structure
1141 register lists for VLD<n>/VST<n> instructions.
1142 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1143 (s_arm_unwind_save_mmxwr): Likewise.
1144 (s_arm_unwind_save_mmxwcg): Likewise.
1145 (s_arm_unwind_movsp): Likewise.
1146 (s_arm_unwind_setfp): Likewise.
1147 (parse_big_immediate): New function. Parse an immediate, which may be
1148 64 bits wide. Put results in inst.operands[i].
1149 (parse_shift): Update for new arm_reg_parse args.
1150 (parse_address): Likewise. Add parsing of alignment specifiers.
1151 (parse_neon_mov): Parse the operands of a VMOV instruction.
1152 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1153 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1154 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1155 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1156 (parse_operands): Handle new codes above.
1157 (encode_arm_vfp_sp_reg): Rename to...
1158 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1159 selected VFP version only supports D0-D15.
1160 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1161 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1162 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1163 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1164 encode_arm_vfp_reg name, and allow 32 D regs.
1165 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1166 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1168 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1169 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1170 constant-load and conversion insns introduced with VFPv3.
1171 (neon_tab_entry): New struct.
1172 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1173 those which are the targets of pseudo-instructions.
1174 (neon_opc): Enumerate opcodes, use as indices into...
1175 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1176 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1177 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1178 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1180 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1182 (neon_type_mask): New. Compact type representation for type checking.
1183 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1184 permitted type combinations.
1185 (N_IGNORE_TYPE): New macro.
1186 (neon_check_shape): New function. Check an instruction shape for
1187 multiple alternatives. Return the specific shape for the current
1189 (neon_modify_type_size): New function. Modify a vector type and size,
1190 depending on the bit mask in argument 1.
1191 (neon_type_promote): New function. Convert a given "key" type (of an
1192 operand) into the correct type for a different operand, based on a bit
1194 (type_chk_of_el_type): New function. Convert a type and size into the
1195 compact representation used for type checking.
1196 (el_type_of_type_ckh): New function. Reverse of above (only when a
1197 single bit is set in the bit mask).
1198 (modify_types_allowed): New function. Alter a mask of allowed types
1199 based on a bit mask of modifications.
1200 (neon_check_type): New function. Check the type of the current
1201 instruction against the variable argument list. The "key" type of the
1202 instruction is returned.
1203 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1204 a Neon data-processing instruction depending on whether we're in ARM
1205 mode or Thumb-2 mode.
1206 (neon_logbits): New function.
1207 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1208 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1209 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1210 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1211 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1212 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1213 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1214 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1215 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1216 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1217 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1218 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1219 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1220 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1221 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1222 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1223 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1224 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1225 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1226 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1227 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1228 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1229 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1230 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1231 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1233 (parse_neon_type): New function. Parse Neon type specifier.
1234 (opcode_lookup): Allow parsing of Neon type specifiers.
1235 (REGNUM2, REGSETH, REGSET2): New macros.
1236 (reg_names): Add new VFPv3 and Neon registers.
1237 (NUF, nUF, NCE, nCE): New macros for opcode table.
1238 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1239 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1240 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1241 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1242 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1243 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1244 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1245 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1246 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1247 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1248 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1249 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1250 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1251 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1253 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1254 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1255 (arm_option_cpu_value): Add vfp3 and neon.
1256 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1259 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1261 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1262 syntax instead of hardcoded opcodes with ".w18" suffixes.
1263 (wide_branch_opcode): New.
1264 (build_transition): Use it to check for wide branch opcodes with
1265 either ".w18" or ".w15" suffixes.
1267 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1269 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1270 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1271 frag's is_literal flag.
1273 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1275 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1277 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1279 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1280 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1281 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1282 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1283 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1285 2005-04-20 Paul Brook <paul@codesourcery.com>
1287 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1289 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1291 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1293 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1294 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1295 Make some cpus unsupported on ELF. Run "make dep-am".
1296 * Makefile.in: Regenerate.
1298 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1300 * configure.in (--enable-targets): Indent help message.
1301 * configure: Regenerate.
1303 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1306 * config/tc-i386.c (i386_immediate): Check illegal immediate
1309 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1311 * config/tc-i386.c: Formatting.
1312 (output_disp, output_imm): ISO C90 params.
1314 * frags.c (frag_offset_fixed_p): Constify args.
1315 * frags.h (frag_offset_fixed_p): Ditto.
1317 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1318 (COFF_MAGIC): Delete.
1320 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1322 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1324 * po/POTFILES.in: Regenerated.
1326 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1328 * doc/as.texinfo: Mention that some .type syntaxes are not
1329 supported on all architectures.
1331 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1333 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1334 instructions when such transformations have been disabled.
1336 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1338 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1339 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1340 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1341 decoding the loop instructions. Remove current_offset variable.
1342 (xtensa_fix_short_loop_frags): Likewise.
1343 (min_bytes_to_other_loop_end): Remove current_offset argument.
1345 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1347 * config/tc-z80.c (z80_optimize_expr): Removed.
1348 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1350 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1352 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1353 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1354 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1355 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1356 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1357 at90can64, at90usb646, at90usb647, at90usb1286 and
1359 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1361 2006-04-07 Paul Brook <paul@codesourcery.com>
1363 * config/tc-arm.c (parse_operands): Set default error message.
1365 2006-04-07 Paul Brook <paul@codesourcery.com>
1367 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1369 2006-04-07 Paul Brook <paul@codesourcery.com>
1371 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1373 2006-04-07 Paul Brook <paul@codesourcery.com>
1375 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1376 (move_or_literal_pool): Handle Thumb-2 instructions.
1377 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1379 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1382 * config/tc-i386.c (match_template): Move 64-bit operand tests
1385 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1387 * po/Make-in: Add install-html target.
1388 * Makefile.am: Add install-html and install-html-recursive targets.
1389 * Makefile.in: Regenerate.
1390 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1391 * configure: Regenerate.
1392 * doc/Makefile.am: Add install-html and install-html-am targets.
1393 * doc/Makefile.in: Regenerate.
1395 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1397 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1400 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1401 Daniel Jacobowitz <dan@codesourcery.com>
1403 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1404 (GOTT_BASE, GOTT_INDEX): New.
1405 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1406 GOTT_INDEX when generating VxWorks PIC.
1407 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1408 use the generic *-*-vxworks* stanza instead.
1410 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1413 * frags.c (frag_offset_fixed_p): New function.
1414 * frags.h (frag_offset_fixed_p): Declare.
1415 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1416 (resolve_expression): Likewise.
1418 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1420 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1421 of the same length but different numbers of slots.
1423 2006-03-30 Andreas Schwab <schwab@suse.de>
1425 * configure.in: Fix help string for --enable-targets option.
1426 * configure: Regenerate.
1428 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1430 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1431 (m68k_ip): ... here. Use for all chips. Protect against buffer
1432 overrun and avoid excessive copying.
1434 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1435 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1436 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1437 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1438 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1439 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1440 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1441 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1442 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1443 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1444 (struct m68k_cpu): Change chip field to control_regs.
1445 (current_chip): Remove.
1446 (control_regs): New.
1447 (m68k_archs, m68k_extensions): Adjust.
1448 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1449 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1450 (find_cf_chip): Reimplement for new organization of cpu table.
1451 (select_control_regs): Remove.
1453 (struct save_opts): Save control regs, not chip.
1454 (s_save, s_restore): Adjust.
1455 (m68k_lookup_cpu): Give deprecated warning when necessary.
1456 (m68k_init_arch): Adjust.
1457 (md_show_usage): Adjust for new cpu table organization.
1459 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1461 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1462 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1463 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1465 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1466 (any_gotrel): New rule.
1467 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1468 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1470 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1471 (bfin_pic_ptr): New function.
1472 (md_pseudo_table): Add it for ".picptr".
1473 (OPTION_FDPIC): New macro.
1474 (md_longopts): Add -mfdpic.
1475 (md_parse_option): Handle it.
1476 (md_begin): Set BFD flags.
1477 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1478 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1480 * Makefile.am (bfin-parse.o): Update dependencies.
1481 (DEPTC_bfin_elf): Likewise.
1482 * Makefile.in: Regenerate.
1484 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1486 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1487 mcfemac instead of mcfmac.
1489 2006-03-23 Michael Matz <matz@suse.de>
1491 * config/tc-i386.c (type_names): Correct placement of 'static'.
1492 (reloc): Map some more relocs to their 64 bit counterpart when
1494 (output_insn): Work around breakage if DEBUG386 is defined.
1495 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1496 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1497 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1498 different from i386.
1499 (output_imm): Ditto.
1500 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1502 (md_convert_frag): Jumps can now be larger than 2GB away, error
1504 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1505 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1507 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1508 Daniel Jacobowitz <dan@codesourcery.com>
1509 Phil Edwards <phil@codesourcery.com>
1510 Zack Weinberg <zack@codesourcery.com>
1511 Mark Mitchell <mark@codesourcery.com>
1512 Nathan Sidwell <nathan@codesourcery.com>
1514 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1515 (md_begin): Complain about -G being used for PIC. Don't change
1516 the text, data and bss alignments on VxWorks.
1517 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1518 generating VxWorks PIC.
1519 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1520 (macro): Likewise, but do not treat la $25 specially for
1521 VxWorks PIC, and do not handle jal.
1522 (OPTION_MVXWORKS_PIC): New macro.
1523 (md_longopts): Add -mvxworks-pic.
1524 (md_parse_option): Don't complain about using PIC and -G together here.
1525 Handle OPTION_MVXWORKS_PIC.
1526 (md_estimate_size_before_relax): Always use the first relaxation
1527 sequence on VxWorks.
1528 * config/tc-mips.h (VXWORKS_PIC): New.
1530 2006-03-21 Paul Brook <paul@codesourcery.com>
1532 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1534 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1536 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1537 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1538 (get_loop_align_size): New.
1539 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1540 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1541 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1542 (get_noop_aligned_address): Use get_loop_align_size.
1543 (get_aligned_diff): Likewise.
1545 2006-03-21 Paul Brook <paul@codesourcery.com>
1547 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1549 2006-03-20 Paul Brook <paul@codesourcery.com>
1551 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1552 (do_t_branch): Encode branches inside IT blocks as unconditional.
1553 (do_t_cps): New function.
1554 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1555 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1556 (opcode_lookup): Allow conditional suffixes on all instructions in
1558 (md_assemble): Advance condexec state before checking for errors.
1559 (insns): Use do_t_cps.
1561 2006-03-20 Paul Brook <paul@codesourcery.com>
1563 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1564 outputting the insn.
1566 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1568 * config/tc-vax.c: Update copyright year.
1569 * config/tc-vax.h: Likewise.
1571 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1573 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1575 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1577 2006-03-17 Paul Brook <paul@codesourcery.com>
1579 * config/tc-arm.c (insns): Add ldm and stm.
1581 2006-03-17 Ben Elliston <bje@au.ibm.com>
1584 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1586 2006-03-16 Paul Brook <paul@codesourcery.com>
1588 * config/tc-arm.c (insns): Add "svc".
1590 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1592 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1593 flag and avoid double underscore prefixes.
1595 2006-03-10 Paul Brook <paul@codesourcery.com>
1597 * config/tc-arm.c (md_begin): Handle EABIv5.
1598 (arm_eabis): Add EF_ARM_EABI_VER5.
1599 * doc/c-arm.texi: Document -meabi=5.
1601 2006-03-10 Ben Elliston <bje@au.ibm.com>
1603 * app.c (do_scrub_chars): Simplify string handling.
1605 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1606 Daniel Jacobowitz <dan@codesourcery.com>
1607 Zack Weinberg <zack@codesourcery.com>
1608 Nathan Sidwell <nathan@codesourcery.com>
1609 Paul Brook <paul@codesourcery.com>
1610 Ricardo Anguiano <anguiano@codesourcery.com>
1611 Phil Edwards <phil@codesourcery.com>
1613 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1614 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1616 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1617 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1618 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1620 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1622 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1623 even when using the text-section-literals option.
1625 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1627 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1629 (m68k_ip): <case 'J'> Check we have some control regs.
1630 (md_parse_option): Allow raw arch switch.
1631 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1632 whether 68881 or cfloat was meant by -mfloat.
1633 (md_show_usage): Adjust extension display.
1634 (m68k_elf_final_processing): Adjust.
1636 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1638 * config/tc-avr.c (avr_mod_hash_value): New function.
1639 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1640 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1641 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1642 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1644 (tc_gen_reloc): Handle substractions of symbols, if possible do
1645 fixups, abort otherwise.
1646 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1647 tc_fix_adjustable): Define.
1649 2006-03-02 James E Wilson <wilson@specifix.com>
1651 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1652 change the template, then clear md.slot[curr].end_of_insn_group.
1654 2006-02-28 Jan Beulich <jbeulich@novell.com>
1656 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1658 2006-02-28 Jan Beulich <jbeulich@novell.com>
1661 * macro.c (getstring): Don't treat parentheses special anymore.
1662 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1663 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1666 2006-02-28 Mat <mat@csail.mit.edu>
1668 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1670 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1672 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1674 (CFI_signal_frame): Define.
1675 (cfi_pseudo_table): Add .cfi_signal_frame.
1676 (dot_cfi): Handle CFI_signal_frame.
1677 (output_cie): Handle cie->signal_frame.
1678 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1679 different. Copy signal_frame from FDE to newly created CIE.
1680 * doc/as.texinfo: Document .cfi_signal_frame.
1682 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1684 * doc/Makefile.am: Add html target.
1685 * doc/Makefile.in: Regenerate.
1686 * po/Make-in: Add html target.
1688 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1690 * config/tc-i386.c (output_insn): Support Intel Merom New
1693 * config/tc-i386.h (CpuMNI): New.
1694 (CpuUnknownFlags): Add CpuMNI.
1696 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1698 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1699 (hpriv_reg_table): New table for hyperprivileged registers.
1700 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1703 2006-02-24 DJ Delorie <dj@redhat.com>
1705 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1706 (tc_gen_reloc): Don't define.
1707 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1708 (OPTION_LINKRELAX): New.
1709 (md_longopts): Add it.
1711 (md_parse_options): Set it.
1712 (md_assemble): Emit relaxation relocs as needed.
1713 (md_convert_frag): Emit relaxation relocs as needed.
1714 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1715 (m32c_apply_fix): New.
1716 (tc_gen_reloc): New.
1717 (m32c_force_relocation): Force out jump relocs when relaxing.
1718 (m32c_fix_adjustable): Return false if relaxing.
1720 2006-02-24 Paul Brook <paul@codesourcery.com>
1722 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1723 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1724 (struct asm_barrier_opt): Define.
1725 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1726 (parse_psr): Accept V7M psr names.
1727 (parse_barrier): New function.
1728 (enum operand_parse_code): Add OP_oBARRIER.
1729 (parse_operands): Implement OP_oBARRIER.
1730 (do_barrier): New function.
1731 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1732 (do_t_cpsi): Add V7M restrictions.
1733 (do_t_mrs, do_t_msr): Validate V7M variants.
1734 (md_assemble): Check for NULL variants.
1735 (v7m_psrs, barrier_opt_names): New tables.
1736 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1737 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1738 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1739 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1740 (struct cpu_arch_ver_table): Define.
1741 (cpu_arch_ver): New.
1742 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1743 Tag_CPU_arch_profile.
1744 * doc/c-arm.texi: Document new cpu and arch options.
1746 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1748 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1750 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1752 * config/tc-ia64.c: Update copyright years.
1754 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1756 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1759 2005-02-22 Paul Brook <paul@codesourcery.com>
1761 * config/tc-arm.c (do_pld): Remove incorrect write to
1763 (encode_thumb32_addr_mode): Use correct operand.
1765 2006-02-21 Paul Brook <paul@codesourcery.com>
1767 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1769 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1770 Anil Paranjape <anilp1@kpitcummins.com>
1771 Shilin Shakti <shilins@kpitcummins.com>
1773 * Makefile.am: Add xc16x related entry.
1774 * Makefile.in: Regenerate.
1775 * configure.in: Added xc16x related entry.
1776 * configure: Regenerate.
1777 * config/tc-xc16x.h: New file
1778 * config/tc-xc16x.c: New file
1779 * doc/c-xc16x.texi: New file for xc16x
1780 * doc/all.texi: Entry for xc16x
1781 * doc/Makefile.texi: Added c-xc16x.texi
1782 * NEWS: Announce the support for the new target.
1784 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1786 * configure.tgt: set emulation for mips-*-netbsd*
1788 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1790 * config.in: Rebuilt.
1792 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1794 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1795 from 1, not 0, in error messages.
1796 (md_assemble): Simplify special-case check for ENTRY instructions.
1797 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1798 operand in error message.
1800 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1802 * configure.tgt (arm-*-linux-gnueabi*): Change to
1805 2006-02-10 Nick Clifton <nickc@redhat.com>
1807 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1808 32-bit value is propagated into the upper bits of a 64-bit long.
1810 * config/tc-arc.c (init_opcode_tables): Fix cast.
1811 (arc_extoper, md_operand): Likewise.
1813 2006-02-09 David Heine <dlheine@tensilica.com>
1815 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1816 each relaxation step.
1818 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1820 * configure.in (CHECK_DECLS): Add vsnprintf.
1821 * configure: Regenerate.
1822 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1823 include/declare here, but...
1824 * as.h: Move code detecting VARARGS idiom to the top.
1825 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1826 (vsnprintf): Declare if not already declared.
1828 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1830 * as.c (close_output_file): New.
1831 (main): Register close_output_file with xatexit before
1832 dump_statistics. Don't call output_file_close.
1834 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1836 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1837 mcf5329_control_regs): New.
1838 (not_current_architecture, selected_arch, selected_cpu): New.
1839 (m68k_archs, m68k_extensions): New.
1840 (archs): Renamed to ...
1841 (m68k_cpus): ... here. Adjust.
1843 (md_pseudo_table): Add arch and cpu directives.
1844 (find_cf_chip, m68k_ip): Adjust table scanning.
1845 (no_68851, no_68881): Remove.
1846 (md_assemble): Lazily initialize.
1847 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1848 (md_init_after_args): Move functionality to m68k_init_arch.
1849 (mri_chip): Adjust table scanning.
1850 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1851 options with saner parsing.
1852 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1853 m68k_init_arch): New.
1854 (s_m68k_cpu, s_m68k_arch): New.
1855 (md_show_usage): Adjust.
1856 (m68k_elf_final_processing): Set CF EF flags.
1857 * config/tc-m68k.h (m68k_init_after_args): Remove.
1858 (tc_init_after_args): Remove.
1859 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1860 (M68k-Directives): Document .arch and .cpu directives.
1862 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1864 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1865 synonyms for equ and defl.
1866 (z80_cons_fix_new): New function.
1867 (emit_byte): Disallow relative jumps to absolute locations.
1868 (emit_data): Only handle defb, prototype changed, because defb is
1869 now handled as pseudo-op rather than an instruction.
1870 (instab): Entries for defb,defw,db,dw moved from here...
1871 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1872 Add entries for def24,def32,d24,d32.
1873 (md_assemble): Improved error handling.
1874 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1875 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1876 (z80_cons_fix_new): Declare.
1877 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1878 (def24,d24,def32,d32): New pseudo-ops.
1880 2006-02-02 Paul Brook <paul@codesourcery.com>
1882 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1884 2005-02-02 Paul Brook <paul@codesourcery.com>
1886 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1887 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1888 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1889 T2_OPCODE_RSB): Define.
1890 (thumb32_negate_data_op): New function.
1891 (md_apply_fix): Use it.
1893 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1895 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1897 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1898 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1900 (relaxation_requirements): Add pfinish_frag argument and use it to
1901 replace setting tinsn->record_fix fields.
1902 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1903 and vinsn_to_insnbuf. Remove references to record_fix and
1904 slot_sub_symbols fields.
1905 (xtensa_mark_narrow_branches): Delete unused code.
1906 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1908 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1910 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1911 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1912 of the record_fix field. Simplify error messages for unexpected
1914 (set_expr_symbol_offset_diff): Delete.
1916 2006-01-31 Paul Brook <paul@codesourcery.com>
1918 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1920 2006-01-31 Paul Brook <paul@codesourcery.com>
1921 Richard Earnshaw <rearnsha@arm.com>
1923 * config/tc-arm.c: Use arm_feature_set.
1924 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1925 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1926 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1929 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1930 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1931 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1932 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1934 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1935 (arm_opts): Move old cpu/arch options from here...
1936 (arm_legacy_opts): ... to here.
1937 (md_parse_option): Search arm_legacy_opts.
1938 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1939 (arm_float_abis, arm_eabis): Make const.
1941 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1943 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1945 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1947 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1948 in load immediate intruction.
1950 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1952 * config/bfin-parse.y (value_match): Use correct conversion
1953 specifications in template string for __FILE__ and __LINE__.
1957 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1959 Introduce TLS descriptors for i386 and x86_64.
1960 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1961 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1962 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1963 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1964 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1966 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1967 (lex_got): Handle @tlsdesc and @tlscall.
1968 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1970 2006-01-11 Nick Clifton <nickc@redhat.com>
1972 Fixes for building on 64-bit hosts:
1973 * config/tc-avr.c (mod_index): New union to allow conversion
1974 between pointers and integers.
1975 (md_begin, avr_ldi_expression): Use it.
1976 * config/tc-i370.c (md_assemble): Add cast for argument to print
1978 * config/tc-tic54x.c (subsym_substitute): Likewise.
1979 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1980 opindex field of fr_cgen structure into a pointer so that it can
1981 be stored in a frag.
1982 * config/tc-mn10300.c (md_assemble): Likewise.
1983 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1985 * config/tc-v850.c: Replace uses of (int) casts with correct
1988 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1991 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1993 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1996 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1997 a local-label reference.
1999 For older changes see ChangeLog-2005
2005 version-control: never