de4a1ba8624213dbdc7376eb6fac58e262ed5a00
[deliverable/binutils-gdb.git] / gas / ChangeLog
1 2006-10-25 Ben Elliston <bje@au.ibm.com>
2
3 * expr.c (expr): Replace O_add case in switch (op_left) explaining
4 why it can never occur.
5
6 2006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
7
8 * doc/c-ppc.texi (-mcell): Document.
9 * config/tc-ppc.c (parse_cpu): Parse -mcell.
10 (md_show_usage): Document -mcell.
11
12 2006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
13
14 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
15
16 2006-10-23 Alan Modra <amodra@bigpond.net.au>
17
18 * config/tc-m68hc11.c (md_assemble): Quiet warning.
19
20 2006-10-19 Mike Frysinger <vapier@gentoo.org>
21
22 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
23 (x86_64_section_letter): Likewise.
24
25 2006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
26
27 * config/tc-score.c (build_relax_frag): Compute correct
28 tc_frag_data.fixp.
29
30 2006-10-18 Roy Marples <uberlord@gentoo.org>
31
32 * config/tc-sparc.c (md_parse_option): Treat any target starting with
33 elf32-sparc as a viable target for the -32 switch and any target
34 starting with elf64-sparc as a viable target for the -64 switch.
35 (sparc_target_format): For 64-bit ELF flavoured output use
36 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
37 ELF_TARGET_FORMAT.
38 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
39
40 2006-10-17 H.J. Lu <hongjiu.lu@intel.com>
41
42 * configure: Regenerated.
43
44 2006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
45
46 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
47 in addition to testing for '\n'.
48 (TC_EOL_IN_INSN): Provide a default definition if necessary.
49
50 2006-10-13 Sterling Augstine <sterling@tensilica.com>
51
52 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
53 a disjoint DW_AT range.
54
55 2006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
56
57 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
58
59 2006-10-08 Paul Brook <paul@codesourcery.com>
60
61 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
62 (parse_operands): Use parse_big_immediate for OP_NILO.
63 (neon_cmode_for_logic_imm): Try smaller element sizes.
64 (neon_cmode_for_move_imm): Ditto.
65 (do_neon_logic): Handle .i64 pseudo-op.
66
67 2006-09-29 Alan Modra <amodra@bigpond.net.au>
68
69 * po/POTFILES.in: Regenerate.
70
71 2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
72
73 * config/tc-i386.h (CpuMNI): Renamed to ...
74 (CpuSSSE3): This.
75 (CpuUnknownFlags): Updated.
76 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
77 and PROCESSOR_MEROM with PROCESSOR_CORE2.
78 * config/tc-i386.c: Updated.
79 * doc/c-i386.texi: Likewise.
80
81 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
82
83 2006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
84
85 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
86
87 2006-09-27 Nick Clifton <nickc@redhat.com>
88
89 * output-file.c (output_file_close): Prevent an infinite loop
90 reporting that stdoutput could not be closed.
91
92 2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
93 Joseph Myers <joseph@codesourcery.com>
94 Ian Lance Taylor <ian@wasabisystems.com>
95 Ben Elliston <bje@wasabisystems.com>
96
97 * config/tc-arm.c (arm_cext_iwmmxt2): New.
98 (enum operand_parse_code): New code OP_RIWR_I32z.
99 (parse_operands): Handle OP_RIWR_I32z.
100 (do_iwmmxt_wmerge): New function.
101 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
102 a register.
103 (do_iwmmxt_wrwrwr_or_imm5): New function.
104 (insns): Mark instructions as RIWR_I32z as appropriate.
105 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
106 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
107 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
108 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
109 (md_begin): Handle IWMMXT2.
110 (arm_cpus): Add iwmmxt2.
111 (arm_extensions): Likewise.
112 (arm_archs): Likewise.
113
114 2006-09-25 Bob Wilson <bob.wilson@acm.org>
115
116 * doc/as.texinfo (Overview): Revise description of --keep-locals.
117 Add xref to "Symbol Names".
118 (L): Refer to "local symbols" instead of "local labels". Move
119 definition to "Symbol Names" section; add xref to that section.
120 (Symbol Names): Use "Local Symbol Names" section to define local
121 symbols. Add "Local Labels" heading for description of temporary
122 forward/backward labels, and refer to those as "local labels".
123
124 2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
125
126 PR binutils/3235
127 * config/tc-i386.c (match_template): Check address size prefix
128 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
129 operand.
130
131 2006-09-22 Alan Modra <amodra@bigpond.net.au>
132
133 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
134
135 2006-09-22 Alan Modra <amodra@bigpond.net.au>
136
137 * as.h (as_perror): Delete declaration.
138 * gdbinit.in (as_perror): Delete breakpoint.
139 * messages.c (as_perror): Delete function.
140 * doc/internals.texi: Remove as_perror description.
141 * listing.c (listing_print: Don't use as_perror.
142 * output-file.c (output_file_create, output_file_close): Likewise.
143 * symbols.c (symbol_create, symbol_clone): Likewise.
144 * write.c (write_contents): Likewise.
145 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
146 * config/tc-tic54x.c (tic54x_mlib): Likewise.
147
148 2006-09-22 Alan Modra <amodra@bigpond.net.au>
149
150 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
151 (ppc_handle_align): New function.
152 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
153 (SUB_SEGMENT_ALIGN): Define as zero.
154
155 2006-09-20 Bob Wilson <bob.wilson@acm.org>
156
157 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
158 (Overview): Skip cross reference in man page.
159
160 2006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
161
162 * configure.in: Add new target x86_64-pc-mingw64.
163 * configure: Regenerate.
164 * configure.tgt: Add new target x86_64-pc-mingw64.
165 * config/obj-coff.h: Add handling for TE_PEP target specific code
166 and definitions.
167 * config/tc-i386.c: Add new targets.
168 (md_parse_option): Add targets to OPTION_64.
169 (x86_64_target_format): Add new method for setup proper default
170 target cpu mode.
171 * config/te-pep.h: Add new target definition header.
172 (TE_PEP): New macro: Identifies new target architecture.
173 (COFF_WITH_pex64): Set proper includes in bfd.
174 * NEWS: Mention new target.
175
176 2006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
177
178 * config/bfin-parse.y (binary): Change sub of const to add of negated
179 const.
180
181 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
182
183 * config/tc-score.c: New file.
184 * config/tc-score.h: Newf file.
185 * configure.tgt: Add Score target.
186 * Makefile.am: Add Score files.
187 * Makefile.in: Regenerate.
188 * NEWS: Mention new target support.
189
190 2006-09-16 Paul Brook <paul@codesourcery.com>
191
192 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
193 * doc/c-arm.texi (movsp): Document offset argument.
194
195 2006-09-16 Paul Brook <paul@codesourcery.com>
196
197 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
198 unsigned int to avoid 64-bit host problems.
199
200 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
201
202 * config/bfin-parse.y (binary): Do some more constant folding for
203 additions.
204
205 2006-09-13 Jan Beulich <jbeulich@novell.com>
206
207 * input-file.c (input_file_give_next_buffer): Demote as_bad to
208 as_warn.
209
210 2006-09-13 Alan Modra <amodra@bigpond.net.au>
211
212 PR gas/3165
213 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
214 in parens.
215
216 2006-09-13 Alan Modra <amodra@bigpond.net.au>
217
218 * input-file.c (input_file_open): Replace as_perror with as_bad
219 so that gas exits with error on file errors. Correct error
220 message.
221 (input_file_get, input_file_give_next_buffer): Likewise.
222 * input-file.h: Update comment.
223
224 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
225
226 PR gas/3172
227 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
228 registers as a sub-class of wC registers.
229
230 2006-09-11 Alan Modra <amodra@bigpond.net.au>
231
232 PR gas/3165
233 * config/tc-mips.h (enum dwarf2_format): Forward declare.
234 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
235 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
236 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
237
238 2006-09-08 Nick Clifton <nickc@redhat.com>
239
240 PR gas/3129
241 * doc/as.texinfo (Macro): Improve documentation about separating
242 macro arguments from following text.
243
244 2006-09-08 Paul Brook <paul@codesourcery.com>
245
246 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
247
248 2006-09-07 Paul Brook <paul@codesourcery.com>
249
250 * config/tc-arm.c (parse_operands): Mark operand as present.
251
252 2006-09-04 Paul Brook <paul@codesourcery.com>
253
254 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
255 (do_neon_dyadic_if_i_d): Avoid setting U bit.
256 (do_neon_mac_maybe_scalar): Ditto.
257 (do_neon_dyadic_narrow): Force operand type to NT_integer.
258 (insns): Remove out of date comments.
259
260 2006-08-29 Nick Clifton <nickc@redhat.com>
261
262 * read.c (s_align): Initialize the 'stopc' variable to prevent
263 compiler complaints about it being used without being
264 initialized.
265 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
266 s_float_space, s_struct, cons_worker, equals): Likewise.
267
268 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
269
270 * ecoff.c (ecoff_directive_val): Fix message typo.
271 * config/tc-ns32k.c (convert_iif): Likewise.
272 * config/tc-sh64.c (shmedia_check_limits): Likewise.
273
274 2006-08-25 Sterling Augustine <sterling@tensilica.com>
275 Bob Wilson <bob.wilson@acm.org>
276
277 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
278 the state of the absolute_literals directive. Remove align frag at
279 the start of the literal pool position.
280
281 2006-08-25 Bob Wilson <bob.wilson@acm.org>
282
283 * doc/c-xtensa.texi: Add @group commands in examples.
284
285 2006-08-24 Bob Wilson <bob.wilson@acm.org>
286
287 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
288 (INIT_LITERAL_SECTION_NAME): Delete.
289 (lit_state struct): Remove segment names, init_lit_seg, and
290 fini_lit_seg. Add lit_prefix and current_text_seg.
291 (init_literal_head_h, init_literal_head): Delete.
292 (fini_literal_head_h, fini_literal_head): Delete.
293 (xtensa_begin_directive): Move argument parsing to
294 xtensa_literal_prefix function.
295 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
296 (xtensa_literal_prefix): Parse the directive argument here and
297 record it in the lit_prefix field. Remove code to derive literal
298 section names.
299 (linkonce_len): New.
300 (get_is_linkonce_section): Use linkonce_len. Check for any
301 ".gnu.linkonce.*" section, not just text sections.
302 (md_begin): Remove initialization of deleted lit_state fields.
303 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
304 to init_literal_head and fini_literal_head.
305 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
306 when traversing literal_head list.
307 (match_section_group): New.
308 (cache_literal_section): Rewrite to determine the literal section
309 name on the fly, create the section and return it.
310 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
311 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
312 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
313 Use xtensa_get_property_section from bfd.
314 (retrieve_xtensa_section): Delete.
315 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
316 description to refer to plural literal sections and add xref to
317 the Literal Directive section.
318 (Literal Directive): Describe new rules for deriving literal section
319 names. Add footnote for special case of .init/.fini with
320 --text-section-literals.
321 (Literal Prefix Directive): Replace old naming rules with xref to the
322 Literal Directive section.
323
324 2006-08-21 Joseph Myers <joseph@codesourcery.com>
325
326 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
327 merging with previous long opcode.
328
329 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
330
331 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
332 * Makefile.in: Regenerate.
333 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
334 renamed. Adjust.
335
336 2006-08-16 Julian Brown <julian@codesourcery.com>
337
338 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
339 to use ARM instructions on non-ARM-supporting cores.
340 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
341 mode automatically based on cpu variant.
342 (md_begin): Call above function.
343
344 2006-08-16 Julian Brown <julian@codesourcery.com>
345
346 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
347 recognized in non-unified syntax mode.
348
349 2006-08-15 Thiemo Seufer <ths@mips.com>
350 Nigel Stephens <nigel@mips.com>
351 David Ung <davidu@mips.com>
352
353 * configure.tgt: Handle mips*-sde-elf*.
354
355 2006-08-12 Thiemo Seufer <ths@networkno.de>
356
357 * config/tc-mips.c (mips16_ip): Fix argument register handling
358 for restore instruction.
359
360 2006-08-08 Bob Wilson <bob.wilson@acm.org>
361
362 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
363 (out_sleb128): New.
364 (out_fixed_inc_line_addr): New.
365 (process_entries): Use out_fixed_inc_line_addr when
366 DWARF2_USE_FIXED_ADVANCE_PC is set.
367 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
368
369 2006-08-08 DJ Delorie <dj@redhat.com>
370
371 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
372 vs full symbols so that we never have more than one pointer value
373 for any given symbol in our symbol table.
374
375 2006-08-08 Sterling Augustine <sterling@tensilica.com>
376
377 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
378 and emit DW_AT_ranges when code in compilation unit is not
379 contiguous.
380 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
381 is not contiguous.
382 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
383 (out_debug_ranges): New function to emit .debug_ranges section
384 when code is not contiguous.
385
386 2006-08-08 Nick Clifton <nickc@redhat.com>
387
388 * config/tc-arm.c (WARN_DEPRECATED): Enable.
389
390 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
391
392 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
393 only block.
394 (pe_directive_secrel) [TE_PE]: New function.
395 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
396 loc, loc_mark_labels.
397 [TE_PE]: Handle secrel32.
398 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
399 call.
400 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
401 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
402 (md_section_align): Only round section sizes here for AOUT
403 targets.
404 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
405 (tc_pe_dwarf2_emit_offset): New function.
406 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
407 (cons_fix_new_arm): Handle O_secrel.
408 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
409 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
410 of OBJ_ELF only block.
411 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
412 tc_pe_dwarf2_emit_offset.
413
414 2006-08-04 Richard Sandiford <richard@codesourcery.com>
415
416 * config/tc-sh.c (apply_full_field_fix): New function.
417 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
418 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
419 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
420 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
421
422 2006-08-03 Nick Clifton <nickc@redhat.com>
423
424 PR gas/2991
425 * config.in: Regenerate.
426
427 2006-08-03 Joseph Myers <joseph@codesourcery.com>
428
429 * config/tc-arm.c (parse_operands): Handle invalid register name
430 for OP_RIWR_RIWC.
431
432 2006-08-03 Joseph Myers <joseph@codesourcery.com>
433
434 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
435 (parse_operands): Handle it.
436 (insns): Use it for tmcr and tmrc.
437
438 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
439
440 PR binutils/2983
441 * config/tc-i386.c (md_parse_option): Treat any target starting
442 with elf64_x86_64 as a viable target for the -64 switch.
443 (i386_target_format): For 64-bit ELF flavoured output use
444 ELF_TARGET_FORMAT64.
445 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
446
447 2006-08-02 Nick Clifton <nickc@redhat.com>
448
449 PR gas/2991
450 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
451 bfd/aclocal.m4.
452 * configure.in: Run BFD_BINARY_FOPEN.
453 * configure: Regenerate.
454 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
455 file to include.
456
457 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
458
459 * config/tc-i386.c (md_assemble): Don't update
460 cpu_arch_isa_flags.
461
462 2006-08-01 Thiemo Seufer <ths@mips.com>
463
464 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
465
466 2006-08-01 Thiemo Seufer <ths@mips.com>
467
468 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
469 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
470 BFD_RELOC_32 and BFD_RELOC_16.
471 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
472 md_convert_frag, md_obj_end): Fix comment formatting.
473
474 2006-07-31 Thiemo Seufer <ths@mips.com>
475
476 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
477 handling for BFD_RELOC_MIPS16_JMP.
478
479 2006-07-24 Andreas Schwab <schwab@suse.de>
480
481 PR/2756
482 * read.c (read_a_source_file): Ignore unknown text after line
483 comment character. Fix misleading comment.
484
485 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
486
487 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
488 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
489 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
490 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
491 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
492 doc/c-z80.texi, doc/internals.texi: Fix some typos.
493
494 2006-07-21 Nick Clifton <nickc@redhat.com>
495
496 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
497 linker testsuite.
498
499 2006-07-20 Thiemo Seufer <ths@mips.com>
500 Nigel Stephens <nigel@mips.com>
501
502 * config/tc-mips.c (md_parse_option): Don't infer optimisation
503 options from debug options.
504
505 2006-07-20 Thiemo Seufer <ths@mips.com>
506
507 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
508 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
509
510 2006-07-19 Paul Brook <paul@codesourcery.com>
511
512 * config/tc-arm.c (insns): Fix rbit Arm opcode.
513
514 2006-07-18 Paul Brook <paul@codesourcery.com>
515
516 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
517 (md_convert_frag): Use correct reloc for add_pc. Use
518 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
519 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
520 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
521
522 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
523
524 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
525 when file and line unknown.
526
527 2006-07-17 Thiemo Seufer <ths@mips.com>
528
529 * read.c (s_struct): Use IS_ELF.
530 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
531 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
532 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
533 s_mips_mask): Likewise.
534
535 2006-07-16 Thiemo Seufer <ths@mips.com>
536 David Ung <davidu@mips.com>
537
538 * read.c (s_struct): Handle ELF section changing.
539 * config/tc-mips.c (s_align): Leave enabling auto-align to the
540 generic code.
541 (s_change_sec): Try section changing only if we output ELF.
542
543 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
544
545 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
546 CpuAmdFam10.
547 (smallest_imm_type): Remove Cpu086.
548 (i386_target_format): Likewise.
549
550 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
551 Update CpuXXX.
552
553 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
554 Michael Meissner <michael.meissner@amd.com>
555
556 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
557 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
558 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
559 architecture.
560 (i386_align_code): Ditto.
561 (md_assemble_code): Add support for insertq/extrq instructions,
562 swapping as needed for intel syntax.
563 (swap_imm_operands): New function to swap immediate operands.
564 (swap_operands): Deal with 4 operand instructions.
565 (build_modrm_byte): Add support for insertq instruction.
566
567 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
568
569 * config/tc-i386.h (Size64): Fix a typo in comment.
570
571 2006-07-12 Nick Clifton <nickc@redhat.com>
572
573 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
574 fixup_segment() to repeat a range check on a value that has
575 already been checked here.
576
577 2006-07-07 James E Wilson <wilson@specifix.com>
578
579 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
580
581 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
582 Nick Clifton <nickc@redhat.com>
583
584 PR binutils/2877
585 * doc/as.texi: Fix spelling typo: branchs => branches.
586 * doc/c-m68hc11.texi: Likewise.
587 * config/tc-m68hc11.c: Likewise.
588 Support old spelling of command line switch for backwards
589 compatibility.
590
591 2006-07-04 Thiemo Seufer <ths@mips.com>
592 David Ung <davidu@mips.com>
593
594 * config/tc-mips.c (s_is_linkonce): New function.
595 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
596 weak, external, and linkonce symbols.
597 (pic_need_relax): Use s_is_linkonce.
598
599 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
600
601 * doc/as.texinfo (Org): Remove space.
602 (P2align): Add "@var{abs-expr},".
603
604 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
605
606 * config/tc-i386.c (cpu_arch_tune_set): New.
607 (cpu_arch_isa): Likewise.
608 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
609 nops with short or long nop sequences based on -march=/.arch
610 and -mtune=.
611 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
612 set cpu_arch_tune and cpu_arch_tune_flags.
613 (md_parse_option): For -march=, set cpu_arch_isa and set
614 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
615 0. Set cpu_arch_tune_set to 1 for -mtune=.
616 (i386_target_format): Don't set cpu_arch_tune.
617
618 2006-06-23 Nigel Stephens <nigel@mips.com>
619
620 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
621 generated .sbss.* and .gnu.linkonce.sb.*.
622
623 2006-06-23 Thiemo Seufer <ths@mips.com>
624 David Ung <davidu@mips.com>
625
626 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
627 label_list.
628 * config/tc-mips.c (label_list): Define per-segment label_list.
629 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
630 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
631 mips_from_file_after_relocs, mips_define_label): Use per-segment
632 label_list.
633
634 2006-06-22 Thiemo Seufer <ths@mips.com>
635
636 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
637 (append_insn): Use it.
638 (md_apply_fix): Whitespace formatting.
639 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
640 mips16_extended_frag): Remove register specifier.
641 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
642 constants.
643
644 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
645
646 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
647 a directive saving VFP registers for ARMv6 or later.
648 (s_arm_unwind_save): Add parameter arch_v6 and call
649 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
650 appropriate.
651 (md_pseudo_table): Add entry for new "vsave" directive.
652 * doc/c-arm.texi: Correct error in example for "save"
653 directive (fstmdf -> fstmdx). Also document "vsave" directive.
654
655 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
656 Anatoly Sokolov <aesok@post.ru>
657
658 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
659 and atmega644p devices. Rename atmega164/atmega324 devices to
660 atmega164p/atmega324p.
661 * doc/c-avr.texi: Document new mcu and arch options.
662
663 2006-06-17 Nick Clifton <nickc@redhat.com>
664
665 * config/tc-arm.c (enum parse_operand_result): Move outside of
666 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
667
668 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
669
670 * config/tc-i386.h (processor_type): New.
671 (arch_entry): Add type.
672
673 * config/tc-i386.c (cpu_arch_tune): New.
674 (cpu_arch_tune_flags): Likewise.
675 (cpu_arch_isa_flags): Likewise.
676 (cpu_arch): Updated.
677 (set_cpu_arch): Also update cpu_arch_isa_flags.
678 (md_assemble): Update cpu_arch_isa_flags.
679 (OPTION_MARCH): New.
680 (OPTION_MTUNE): Likewise.
681 (md_longopts): Add -march= and -mtune=.
682 (md_parse_option): Support -march= and -mtune=.
683 (md_show_usage): Add -march=CPU/-mtune=CPU.
684 (i386_target_format): Also update cpu_arch_isa_flags,
685 cpu_arch_tune and cpu_arch_tune_flags.
686
687 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
688
689 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
690
691 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
692
693 * config/tc-arm.c (enum parse_operand_result): New.
694 (struct group_reloc_table_entry): New.
695 (enum group_reloc_type): New.
696 (group_reloc_table): New array.
697 (find_group_reloc_table_entry): New function.
698 (parse_shifter_operand_group_reloc): New function.
699 (parse_address_main): New function, incorporating code
700 from the old parse_address function. To be used via...
701 (parse_address): wrapper for parse_address_main; and
702 (parse_address_group_reloc): new function, likewise.
703 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
704 OP_ADDRGLDRS, OP_ADDRGLDC.
705 (parse_operands): Support for these new operand codes.
706 New macro po_misc_or_fail_no_backtrack.
707 (encode_arm_cp_address): Preserve group relocations.
708 (insns): Modify to use the above operand codes where group
709 relocations are permitted.
710 (md_apply_fix): Handle the group relocations
711 ALU_PC_G0_NC through LDC_SB_G2.
712 (tc_gen_reloc): Likewise.
713 (arm_force_relocation): Leave group relocations for the linker.
714 (arm_fix_adjustable): Likewise.
715
716 2006-06-15 Julian Brown <julian@codesourcery.com>
717
718 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
719 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
720 relocs properly.
721
722 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
723
724 * config/tc-i386.c (process_suffix): Don't add rex64 for
725 "xchg %rax,%rax".
726
727 2006-06-09 Thiemo Seufer <ths@mips.com>
728
729 * config/tc-mips.c (mips_ip): Maintain argument count.
730
731 2006-06-09 Alan Modra <amodra@bigpond.net.au>
732
733 * config/tc-iq2000.c: Include sb.h.
734
735 2006-06-08 Nigel Stephens <nigel@mips.com>
736
737 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
738 aliases for better compatibility with SGI tools.
739
740 2006-06-08 Alan Modra <amodra@bigpond.net.au>
741
742 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
743 * Makefile.am (GASLIBS): Expand @BFDLIB@.
744 (BFDVER_H): Delete.
745 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
746 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
747 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
748 Run "make dep-am".
749 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
750 * Makefile.in: Regenerate.
751 * doc/Makefile.in: Regenerate.
752 * configure: Regenerate.
753
754 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
755
756 * po/Make-in (pdf, ps): New dummy targets.
757
758 2006-06-07 Julian Brown <julian@codesourcery.com>
759
760 * config/tc-arm.c (stdarg.h): include.
761 (arm_it): Add uncond_value field. Add isvec and issingle to operand
762 array.
763 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
764 REG_TYPE_NSDQ (single, double or quad vector reg).
765 (reg_expected_msgs): Update.
766 (BAD_FPU): Add macro for unsupported FPU instruction error.
767 (parse_neon_type): Support 'd' as an alias for .f64.
768 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
769 sets of registers.
770 (parse_vfp_reg_list): Don't update first arg on error.
771 (parse_neon_mov): Support extra syntax for VFP moves.
772 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
773 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
774 (parse_operands): Support isvec, issingle operands fields, new parse
775 codes above.
776 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
777 msr variants.
778 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
779 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
780 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
781 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
782 shapes.
783 (neon_shape): Redefine in terms of above.
784 (neon_shape_class): New enumeration, table of shape classes.
785 (neon_shape_el): New enumeration. One element of a shape.
786 (neon_shape_el_size): Register widths of above, where appropriate.
787 (neon_shape_info): New struct. Info for shape table.
788 (neon_shape_tab): New array.
789 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
790 (neon_check_shape): Rewrite as...
791 (neon_select_shape): New function to classify instruction shapes,
792 driven by new table neon_shape_tab array.
793 (neon_quad): New function. Return 1 if shape should set Q flag in
794 instructions (or equivalent), 0 otherwise.
795 (type_chk_of_el_type): Support F64.
796 (el_type_of_type_chk): Likewise.
797 (neon_check_type): Add support for VFP type checking (VFP data
798 elements fill their containing registers).
799 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
800 in thumb mode for VFP instructions.
801 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
802 and encode the current instruction as if it were that opcode.
803 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
804 arguments, call function in PFN.
805 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
806 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
807 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
808 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
809 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
810 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
811 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
812 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
813 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
814 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
815 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
816 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
817 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
818 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
819 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
820 neon_quad.
821 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
822 between VFP and Neon turns out to belong to Neon. Perform
823 architecture check and fill in condition field if appropriate.
824 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
825 (do_neon_cvt): Add support for VFP variants of instructions.
826 (neon_cvt_flavour): Extend to cover VFP conversions.
827 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
828 vmov variants.
829 (do_neon_ldr_str): Handle single-precision VFP load/store.
830 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
831 NS_NULL not NS_IGNORE.
832 (opcode_tag): Add OT_csuffixF for operands which either take a
833 conditional suffix, or have 0xF in the condition field.
834 (md_assemble): Add support for OT_csuffixF.
835 (NCE): Replace macro with...
836 (NCE_tag, NCE, NCEF): New macros.
837 (nCE): Replace macro with...
838 (nCE_tag, nCE, nCEF): New macros.
839 (insns): Add support for VFP insns or VFP versions of insns msr,
840 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
841 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
842 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
843 VFP/Neon insns together.
844
845 2006-06-07 Alan Modra <amodra@bigpond.net.au>
846 Ladislav Michl <ladis@linux-mips.org>
847
848 * app.c: Don't include headers already included by as.h.
849 * as.c: Likewise.
850 * atof-generic.c: Likewise.
851 * cgen.c: Likewise.
852 * dwarf2dbg.c: Likewise.
853 * expr.c: Likewise.
854 * input-file.c: Likewise.
855 * input-scrub.c: Likewise.
856 * macro.c: Likewise.
857 * output-file.c: Likewise.
858 * read.c: Likewise.
859 * sb.c: Likewise.
860 * config/bfin-lex.l: Likewise.
861 * config/obj-coff.h: Likewise.
862 * config/obj-elf.h: Likewise.
863 * config/obj-som.h: Likewise.
864 * config/tc-arc.c: Likewise.
865 * config/tc-arm.c: Likewise.
866 * config/tc-avr.c: Likewise.
867 * config/tc-bfin.c: Likewise.
868 * config/tc-cris.c: Likewise.
869 * config/tc-d10v.c: Likewise.
870 * config/tc-d30v.c: Likewise.
871 * config/tc-dlx.h: Likewise.
872 * config/tc-fr30.c: Likewise.
873 * config/tc-frv.c: Likewise.
874 * config/tc-h8300.c: Likewise.
875 * config/tc-hppa.c: Likewise.
876 * config/tc-i370.c: Likewise.
877 * config/tc-i860.c: Likewise.
878 * config/tc-i960.c: Likewise.
879 * config/tc-ip2k.c: Likewise.
880 * config/tc-iq2000.c: Likewise.
881 * config/tc-m32c.c: Likewise.
882 * config/tc-m32r.c: Likewise.
883 * config/tc-maxq.c: Likewise.
884 * config/tc-mcore.c: Likewise.
885 * config/tc-mips.c: Likewise.
886 * config/tc-mmix.c: Likewise.
887 * config/tc-mn10200.c: Likewise.
888 * config/tc-mn10300.c: Likewise.
889 * config/tc-msp430.c: Likewise.
890 * config/tc-mt.c: Likewise.
891 * config/tc-ns32k.c: Likewise.
892 * config/tc-openrisc.c: Likewise.
893 * config/tc-ppc.c: Likewise.
894 * config/tc-s390.c: Likewise.
895 * config/tc-sh.c: Likewise.
896 * config/tc-sh64.c: Likewise.
897 * config/tc-sparc.c: Likewise.
898 * config/tc-tic30.c: Likewise.
899 * config/tc-tic4x.c: Likewise.
900 * config/tc-tic54x.c: Likewise.
901 * config/tc-v850.c: Likewise.
902 * config/tc-vax.c: Likewise.
903 * config/tc-xc16x.c: Likewise.
904 * config/tc-xstormy16.c: Likewise.
905 * config/tc-xtensa.c: Likewise.
906 * config/tc-z80.c: Likewise.
907 * config/tc-z8k.c: Likewise.
908 * macro.h: Don't include sb.h or ansidecl.h.
909 * sb.h: Don't include stdio.h or ansidecl.h.
910 * cond.c: Include sb.h.
911 * itbl-lex.l: Include as.h instead of other system headers.
912 * itbl-parse.y: Likewise.
913 * itbl-ops.c: Similarly.
914 * itbl-ops.h: Don't include as.h or ansidecl.h.
915 * config/bfin-defs.h: Don't include bfd.h or as.h.
916 * config/bfin-parse.y: Include as.h instead of other system headers.
917
918 2006-06-06 Ben Elliston <bje@au.ibm.com>
919 Anton Blanchard <anton@samba.org>
920
921 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
922 (md_show_usage): Document it.
923 (ppc_setup_opcodes): Test power6 opcode flag bits.
924 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
925
926 2006-06-06 Thiemo Seufer <ths@mips.com>
927 Chao-ying Fu <fu@mips.com>
928
929 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
930 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
931 (macro_build): Update comment.
932 (mips_ip): Allow DSP64 instructions for MIPS64R2.
933 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
934 CPU_HAS_MDMX.
935 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
936 MIPS_CPU_ASE_MDMX flags for sb1.
937
938 2006-06-05 Thiemo Seufer <ths@mips.com>
939
940 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
941 appropriate.
942 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
943 (mips_ip): Make overflowed/underflowed constant arguments in DSP
944 and MT instructions a fatal error. Use INSERT_OPERAND where
945 appropriate. Improve warnings for break and wait code overflows.
946 Use symbolic constant of OP_MASK_COPZ.
947 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
948
949 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
950
951 * po/Make-in (top_builddir): Define.
952
953 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
954
955 * doc/Makefile.am (TEXI2DVI): Define.
956 * doc/Makefile.in: Regenerate.
957 * doc/c-arc.texi: Fix typo.
958
959 2006-06-01 Alan Modra <amodra@bigpond.net.au>
960
961 * config/obj-ieee.c: Delete.
962 * config/obj-ieee.h: Delete.
963 * Makefile.am (OBJ_FORMATS): Remove ieee.
964 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
965 (obj-ieee.o): Remove rule.
966 * Makefile.in: Regenerate.
967 * configure.in (atof): Remove tahoe.
968 (OBJ_MAYBE_IEEE): Don't define.
969 * configure: Regenerate.
970 * config.in: Regenerate.
971 * doc/Makefile.in: Regenerate.
972 * po/POTFILES.in: Regenerate.
973
974 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
975
976 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
977 and LIBINTL_DEP everywhere.
978 (INTLLIBS): Remove.
979 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
980 * acinclude.m4: Include new gettext macros.
981 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
982 Remove local code for po/Makefile.
983 * Makefile.in, configure, doc/Makefile.in: Regenerated.
984
985 2006-05-30 Nick Clifton <nickc@redhat.com>
986
987 * po/es.po: Updated Spanish translation.
988
989 2006-05-06 Denis Chertykov <denisc@overta.ru>
990
991 * doc/c-avr.texi: New file.
992 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
993 * doc/all.texi: Set AVR
994 * doc/as.texinfo: Include c-avr.texi
995
996 2006-05-28 Jie Zhang <jie.zhang@analog.com>
997
998 * config/bfin-parse.y (check_macfunc): Loose the condition of
999 calling check_multiply_halfregs ().
1000
1001 2006-05-25 Jie Zhang <jie.zhang@analog.com>
1002
1003 * config/bfin-parse.y (asm_1): Better check and deal with
1004 vector and scalar Multiply 16-Bit Operands instructions.
1005
1006 2006-05-24 Nick Clifton <nickc@redhat.com>
1007
1008 * config/tc-hppa.c: Convert to ISO C90 format.
1009 * config/tc-hppa.h: Likewise.
1010
1011 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1012 Randolph Chung <randolph@tausq.org>
1013
1014 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1015 is_tls_ieoff, is_tls_leoff): Define.
1016 (fix_new_hppa): Handle TLS.
1017 (cons_fix_new_hppa): Likewise.
1018 (pa_ip): Likewise.
1019 (md_apply_fix): Handle TLS relocs.
1020 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1021
1022 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
1023
1024 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1025
1026 2006-05-23 Thiemo Seufer <ths@mips.com>
1027 David Ung <davidu@mips.com>
1028 Nigel Stephens <nigel@mips.com>
1029
1030 [ gas/ChangeLog ]
1031 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1032 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1033 ISA_HAS_MXHC1): New macros.
1034 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1035 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1036 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1037 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1038 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1039 (mips_after_parse_args): Change default handling of float register
1040 size to account for 32bit code with 64bit FP. Better sanity checking
1041 of ISA/ASE/ABI option combinations.
1042 (s_mipsset): Support switching of GPR and FPR sizes via
1043 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1044 options.
1045 (mips_elf_final_processing): We should record the use of 64bit FP
1046 registers in 32bit code but we don't, because ELF header flags are
1047 a scarce ressource.
1048 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1049 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1050 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1051 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1052 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1053 missing -march options. Document .set arch=CPU. Move .set smartmips
1054 to ASE page. Use @code for .set FOO examples.
1055
1056 2006-05-23 Jie Zhang <jie.zhang@analog.com>
1057
1058 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1059 if needed.
1060
1061 2006-05-23 Jie Zhang <jie.zhang@analog.com>
1062
1063 * config/bfin-defs.h (bfin_equals): Remove declaration.
1064 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1065 * config/tc-bfin.c (bfin_name_is_register): Remove.
1066 (bfin_equals): Remove.
1067 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1068 (bfin_name_is_register): Remove declaration.
1069
1070 2006-05-19 Thiemo Seufer <ths@mips.com>
1071 Nigel Stephens <nigel@mips.com>
1072
1073 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1074 (mips_oddfpreg_ok): New function.
1075 (mips_ip): Use it.
1076
1077 2006-05-19 Thiemo Seufer <ths@mips.com>
1078 David Ung <davidu@mips.com>
1079
1080 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1081 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1082 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1083 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1084 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1085 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1086 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1087 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1088 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1089 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1090 reg_names_o32, reg_names_n32n64): Define register classes.
1091 (reg_lookup): New function, use register classes.
1092 (md_begin): Reserve register names in the symbol table. Simplify
1093 OBJ_ELF defines.
1094 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1095 Use reg_lookup.
1096 (mips16_ip): Use reg_lookup.
1097 (tc_get_register): Likewise.
1098 (tc_mips_regname_to_dw2regnum): New function.
1099
1100 2006-05-19 Thiemo Seufer <ths@mips.com>
1101
1102 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1103 Un-constify string argument.
1104 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1105 Likewise.
1106 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1107 Likewise.
1108 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1109 Likewise.
1110 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1111 Likewise.
1112 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1113 Likewise.
1114 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1115 Likewise.
1116
1117 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1118
1119 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1120 cfloat/m68881 to correct architecture before using it.
1121
1122 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1123
1124 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
1125 constant values.
1126
1127 2006-05-15 Paul Brook <paul@codesourcery.com>
1128
1129 * config/tc-arm.c (arm_adjust_symtab): Use
1130 bfd_is_arm_special_symbol_name.
1131
1132 2006-05-15 Bob Wilson <bob.wilson@acm.org>
1133
1134 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1135 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1136 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1137 Handle errors from calls to xtensa_opcode_is_* functions.
1138
1139 2006-05-14 Thiemo Seufer <ths@mips.com>
1140
1141 * config/tc-mips.c (macro_build): Test for currently active
1142 mips16 option.
1143 (mips16_ip): Reject invalid opcodes.
1144
1145 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1146
1147 * doc/as.texinfo: Rename "Index" to "AS Index",
1148 and "ABORT" to "ABORT (COFF)".
1149
1150 2006-05-11 Paul Brook <paul@codesourcery.com>
1151
1152 * config/tc-arm.c (parse_half): New function.
1153 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1154 (parse_operands): Ditto.
1155 (do_mov16): Reject invalid relocations.
1156 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1157 (insns): Replace Iffff with HALF.
1158 (md_apply_fix): Add MOVW and MOVT relocs.
1159 (tc_gen_reloc): Ditto.
1160 * doc/c-arm.texi: Document relocation operators
1161
1162 2006-05-11 Paul Brook <paul@codesourcery.com>
1163
1164 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1165
1166 2006-05-11 Thiemo Seufer <ths@mips.com>
1167
1168 * config/tc-mips.c (append_insn): Don't check the range of j or
1169 jal addresses.
1170
1171 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1172
1173 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1174 relocs against external symbols for WinCE targets.
1175 (md_apply_fix): Likewise.
1176
1177 2006-05-09 David Ung <davidu@mips.com>
1178
1179 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1180 j or jal address.
1181
1182 2006-05-09 Nick Clifton <nickc@redhat.com>
1183
1184 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1185 against symbols which are not going to be placed into the symbol
1186 table.
1187
1188 2006-05-09 Ben Elliston <bje@au.ibm.com>
1189
1190 * expr.c (operand): Remove `if (0 && ..)' statement and
1191 subsequently unused target_op label. Collapse `if (1 || ..)'
1192 statement.
1193 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1194 separately above the switch.
1195
1196 2006-05-08 Nick Clifton <nickc@redhat.com>
1197
1198 PR gas/2623
1199 * config/tc-msp430.c (line_separator_character): Define as |.
1200
1201 2006-05-08 Thiemo Seufer <ths@mips.com>
1202 Nigel Stephens <nigel@mips.com>
1203 David Ung <davidu@mips.com>
1204
1205 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1206 (mips_opts): Likewise.
1207 (file_ase_smartmips): New variable.
1208 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1209 (macro_build): Handle SmartMIPS instructions.
1210 (mips_ip): Likewise.
1211 (md_longopts): Add argument handling for smartmips.
1212 (md_parse_options, mips_after_parse_args): Likewise.
1213 (s_mipsset): Add .set smartmips support.
1214 (md_show_usage): Document -msmartmips/-mno-smartmips.
1215 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1216 .set smartmips.
1217 * doc/c-mips.texi: Likewise.
1218
1219 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1220
1221 * write.c (relax_segment): Add pass count arg. Don't error on
1222 negative org/space on first two passes.
1223 (relax_seg_info): New struct.
1224 (relax_seg, write_object_file): Adjust.
1225 * write.h (relax_segment): Update prototype.
1226
1227 2006-05-05 Julian Brown <julian@codesourcery.com>
1228
1229 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1230 checking.
1231 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1232 architecture version checks.
1233 (insns): Allow overlapping instructions to be used in VFP mode.
1234
1235 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1236
1237 PR gas/2598
1238 * config/obj-elf.c (obj_elf_change_section): Allow user
1239 specified SHF_ALPHA_GPREL.
1240
1241 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1242
1243 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1244 for PMEM related expressions.
1245
1246 2006-05-05 Nick Clifton <nickc@redhat.com>
1247
1248 PR gas/2582
1249 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1250 insertion of a directory separator character into a string at a
1251 given offset. Uses heuristics to decide when to use a backslash
1252 character rather than a forward-slash character.
1253 (dwarf2_directive_loc): Use the macro.
1254 (out_debug_info): Likewise.
1255
1256 2006-05-05 Thiemo Seufer <ths@mips.com>
1257 David Ung <davidu@mips.com>
1258
1259 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1260 instruction.
1261 (macro): Add new case M_CACHE_AB.
1262
1263 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1264
1265 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1266 (opcode_lookup): Issue a warning for opcode with
1267 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1268 identical to OT_cinfix3.
1269 (TxC3w, TC3w, tC3w): New.
1270 (insns): Use tC3w and TC3w for comparison instructions with
1271 's' suffix.
1272
1273 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1274
1275 * subsegs.h (struct frchain): Delete frch_seg.
1276 (frchain_root): Delete.
1277 (seg_info): Define as macro.
1278 * subsegs.c (frchain_root): Delete.
1279 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1280 (subsegs_begin, subseg_change): Adjust for above.
1281 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1282 rather than to one big list.
1283 (subseg_get): Don't special case abs, und sections.
1284 (subseg_new, subseg_force_new): Don't set frchainP here.
1285 (seg_info): Delete.
1286 (subsegs_print_statistics): Adjust frag chain control list traversal.
1287 * debug.c (dmp_frags): Likewise.
1288 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1289 at frchain_root. Make use of known frchain ordering.
1290 (last_frag_for_seg): Likewise.
1291 (get_frag_fix): Likewise. Add seg param.
1292 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1293 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1294 (SUB_SEGMENT_ALIGN): Likewise.
1295 (subsegs_finish): Adjust frchain list traversal.
1296 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1297 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1298 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1299 (xtensa_fix_b_j_loop_end_frags): Likewise.
1300 (xtensa_fix_close_loop_end_frags): Likewise.
1301 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1302 (retrieve_segment_info): Delete frch_seg initialisation.
1303
1304 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1305
1306 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1307 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1308 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1309 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1310
1311 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1312
1313 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1314 here.
1315 (md_apply_fix3): Multiply offset by 4 here for
1316 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1317
1318 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1319 Jan Beulich <jbeulich@novell.com>
1320
1321 * config/tc-i386.c (output_invalid_buf): Change size for
1322 unsigned char.
1323 * config/tc-tic30.c (output_invalid_buf): Likewise.
1324
1325 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1326 unsigned char.
1327 * config/tc-tic30.c (output_invalid): Likewise.
1328
1329 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1330
1331 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1332 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1333 (asconfig.texi): Don't set top_srcdir.
1334 * doc/as.texinfo: Don't use top_srcdir.
1335 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1336
1337 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1338
1339 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1340 * config/tc-tic30.c (output_invalid_buf): Likewise.
1341
1342 * config/tc-i386.c (output_invalid): Use snprintf instead of
1343 sprintf.
1344 * config/tc-ia64.c (declare_register_set): Likewise.
1345 (emit_one_bundle): Likewise.
1346 (check_dependencies): Likewise.
1347 * config/tc-tic30.c (output_invalid): Likewise.
1348
1349 2006-05-02 Paul Brook <paul@codesourcery.com>
1350
1351 * config/tc-arm.c (arm_optimize_expr): New function.
1352 * config/tc-arm.h (md_optimize_expr): Define
1353 (arm_optimize_expr): Add prototype.
1354 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1355
1356 2006-05-02 Ben Elliston <bje@au.ibm.com>
1357
1358 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1359 field unsigned.
1360
1361 * sb.h (sb_list_vector): Move to sb.c.
1362 * sb.c (free_list): Use type of sb_list_vector directly.
1363 (sb_build): Fix off-by-one error in assertion about `size'.
1364
1365 2006-05-01 Ben Elliston <bje@au.ibm.com>
1366
1367 * listing.c (listing_listing): Remove useless loop.
1368 * macro.c (macro_expand): Remove is_positional local variable.
1369 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1370 and simplify surrounding expressions, where possible.
1371 (assign_symbol): Likewise.
1372 (s_weakref): Likewise.
1373 * symbols.c (colon): Likewise.
1374
1375 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1376
1377 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1378
1379 2006-04-30 Thiemo Seufer <ths@mips.com>
1380 David Ung <davidu@mips.com>
1381
1382 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1383 (mips_immed): New table that records various handling of udi
1384 instruction patterns.
1385 (mips_ip): Adds udi handling.
1386
1387 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1388
1389 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1390 of list rather than beginning.
1391
1392 2006-04-26 Julian Brown <julian@codesourcery.com>
1393
1394 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1395 (is_quarter_float): Rename from above. Simplify slightly.
1396 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1397 number.
1398 (parse_neon_mov): Parse floating-point constants.
1399 (neon_qfloat_bits): Fix encoding.
1400 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1401 preference to integer encoding when using the F32 type.
1402
1403 2006-04-26 Julian Brown <julian@codesourcery.com>
1404
1405 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1406 zero-initialising structures containing it will lead to invalid types).
1407 (arm_it): Add vectype to each operand.
1408 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1409 defined field.
1410 (neon_typed_alias): New structure. Extra information for typed
1411 register aliases.
1412 (reg_entry): Add neon type info field.
1413 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1414 Break out alternative syntax for coprocessor registers, etc. into...
1415 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1416 out from arm_reg_parse.
1417 (parse_neon_type): Move. Return SUCCESS/FAIL.
1418 (first_error): New function. Call to ensure first error which occurs is
1419 reported.
1420 (parse_neon_operand_type): Parse exactly one type.
1421 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1422 (parse_typed_reg_or_scalar): New function. Handle core of both
1423 arm_typed_reg_parse and parse_scalar.
1424 (arm_typed_reg_parse): Parse a register with an optional type.
1425 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1426 result.
1427 (parse_scalar): Parse a Neon scalar with optional type.
1428 (parse_reg_list): Use first_error.
1429 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1430 (neon_alias_types_same): New function. Return true if two (alias) types
1431 are the same.
1432 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1433 of elements.
1434 (insert_reg_alias): Return new reg_entry not void.
1435 (insert_neon_reg_alias): New function. Insert type/index information as
1436 well as register for alias.
1437 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1438 make typed register aliases accordingly.
1439 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1440 of line.
1441 (s_unreq): Delete type information if present.
1442 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1443 (s_arm_unwind_save_mmxwcg): Likewise.
1444 (s_arm_unwind_movsp): Likewise.
1445 (s_arm_unwind_setfp): Likewise.
1446 (parse_shift): Likewise.
1447 (parse_shifter_operand): Likewise.
1448 (parse_address): Likewise.
1449 (parse_tb): Likewise.
1450 (tc_arm_regname_to_dw2regnum): Likewise.
1451 (md_pseudo_table): Add dn, qn.
1452 (parse_neon_mov): Handle typed operands.
1453 (parse_operands): Likewise.
1454 (neon_type_mask): Add N_SIZ.
1455 (N_ALLMODS): New macro.
1456 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1457 (el_type_of_type_chk): Add some safeguards.
1458 (modify_types_allowed): Fix logic bug.
1459 (neon_check_type): Handle operands with types.
1460 (neon_three_same): Remove redundant optional arg handling.
1461 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1462 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1463 (do_neon_step): Adjust accordingly.
1464 (neon_cmode_for_logic_imm): Use first_error.
1465 (do_neon_bitfield): Call neon_check_type.
1466 (neon_dyadic): Rename to...
1467 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1468 to allow modification of type of the destination.
1469 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1470 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1471 (do_neon_compare): Make destination be an untyped bitfield.
1472 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1473 (neon_mul_mac): Return early in case of errors.
1474 (neon_move_immediate): Use first_error.
1475 (neon_mac_reg_scalar_long): Fix type to include scalar.
1476 (do_neon_dup): Likewise.
1477 (do_neon_mov): Likewise (in several places).
1478 (do_neon_tbl_tbx): Fix type.
1479 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1480 (do_neon_ld_dup): Exit early in case of errors and/or use
1481 first_error.
1482 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1483 Handle .dn/.qn directives.
1484 (REGDEF): Add zero for reg_entry neon field.
1485
1486 2006-04-26 Julian Brown <julian@codesourcery.com>
1487
1488 * config/tc-arm.c (limits.h): Include.
1489 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1490 (fpu_vfp_v3_or_neon_ext): Declare constants.
1491 (neon_el_type): New enumeration of types for Neon vector elements.
1492 (neon_type_el): New struct. Define type and size of a vector element.
1493 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1494 instruction.
1495 (neon_type): Define struct. The type of an instruction.
1496 (arm_it): Add 'vectype' for the current instruction.
1497 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1498 (vfp_sp_reg_pos): Rename to...
1499 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1500 tags.
1501 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1502 (Neon D or Q register).
1503 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1504 register.
1505 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1506 (my_get_expression): Allow above constant as argument to accept
1507 64-bit constants with optional prefix.
1508 (arm_reg_parse): Add extra argument to return the specific type of
1509 register in when either a D or Q register (REG_TYPE_NDQ) is
1510 requested. Can be NULL.
1511 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1512 (parse_reg_list): Update for new arm_reg_parse args.
1513 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1514 (parse_neon_el_struct_list): New function. Parse element/structure
1515 register lists for VLD<n>/VST<n> instructions.
1516 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1517 (s_arm_unwind_save_mmxwr): Likewise.
1518 (s_arm_unwind_save_mmxwcg): Likewise.
1519 (s_arm_unwind_movsp): Likewise.
1520 (s_arm_unwind_setfp): Likewise.
1521 (parse_big_immediate): New function. Parse an immediate, which may be
1522 64 bits wide. Put results in inst.operands[i].
1523 (parse_shift): Update for new arm_reg_parse args.
1524 (parse_address): Likewise. Add parsing of alignment specifiers.
1525 (parse_neon_mov): Parse the operands of a VMOV instruction.
1526 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1527 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1528 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1529 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1530 (parse_operands): Handle new codes above.
1531 (encode_arm_vfp_sp_reg): Rename to...
1532 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1533 selected VFP version only supports D0-D15.
1534 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1535 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1536 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1537 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1538 encode_arm_vfp_reg name, and allow 32 D regs.
1539 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1540 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1541 regs.
1542 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1543 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1544 constant-load and conversion insns introduced with VFPv3.
1545 (neon_tab_entry): New struct.
1546 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1547 those which are the targets of pseudo-instructions.
1548 (neon_opc): Enumerate opcodes, use as indices into...
1549 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1550 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1551 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1552 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1553 neon_enc_tab.
1554 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1555 Neon instructions.
1556 (neon_type_mask): New. Compact type representation for type checking.
1557 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1558 permitted type combinations.
1559 (N_IGNORE_TYPE): New macro.
1560 (neon_check_shape): New function. Check an instruction shape for
1561 multiple alternatives. Return the specific shape for the current
1562 instruction.
1563 (neon_modify_type_size): New function. Modify a vector type and size,
1564 depending on the bit mask in argument 1.
1565 (neon_type_promote): New function. Convert a given "key" type (of an
1566 operand) into the correct type for a different operand, based on a bit
1567 mask.
1568 (type_chk_of_el_type): New function. Convert a type and size into the
1569 compact representation used for type checking.
1570 (el_type_of_type_ckh): New function. Reverse of above (only when a
1571 single bit is set in the bit mask).
1572 (modify_types_allowed): New function. Alter a mask of allowed types
1573 based on a bit mask of modifications.
1574 (neon_check_type): New function. Check the type of the current
1575 instruction against the variable argument list. The "key" type of the
1576 instruction is returned.
1577 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1578 a Neon data-processing instruction depending on whether we're in ARM
1579 mode or Thumb-2 mode.
1580 (neon_logbits): New function.
1581 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1582 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1583 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1584 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1585 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1586 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1587 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1588 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1589 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1590 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1591 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1592 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1593 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1594 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1595 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1596 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1597 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1598 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1599 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1600 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1601 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1602 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1603 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1604 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1605 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1606 helpers.
1607 (parse_neon_type): New function. Parse Neon type specifier.
1608 (opcode_lookup): Allow parsing of Neon type specifiers.
1609 (REGNUM2, REGSETH, REGSET2): New macros.
1610 (reg_names): Add new VFPv3 and Neon registers.
1611 (NUF, nUF, NCE, nCE): New macros for opcode table.
1612 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1613 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1614 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1615 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1616 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1617 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1618 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1619 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1620 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1621 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1622 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1623 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1624 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1625 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1626 fto[us][lh][sd].
1627 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1628 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1629 (arm_option_cpu_value): Add vfp3 and neon.
1630 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1631 VFPv1 attribute.
1632
1633 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1634
1635 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1636 syntax instead of hardcoded opcodes with ".w18" suffixes.
1637 (wide_branch_opcode): New.
1638 (build_transition): Use it to check for wide branch opcodes with
1639 either ".w18" or ".w15" suffixes.
1640
1641 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1642
1643 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1644 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1645 frag's is_literal flag.
1646
1647 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1648
1649 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1650
1651 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1652
1653 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1654 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1655 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1656 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1657 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1658
1659 2005-04-20 Paul Brook <paul@codesourcery.com>
1660
1661 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1662 all targets.
1663 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1664
1665 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1666
1667 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1668 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1669 Make some cpus unsupported on ELF. Run "make dep-am".
1670 * Makefile.in: Regenerate.
1671
1672 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1673
1674 * configure.in (--enable-targets): Indent help message.
1675 * configure: Regenerate.
1676
1677 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1678
1679 PR gas/2533
1680 * config/tc-i386.c (i386_immediate): Check illegal immediate
1681 register operand.
1682
1683 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1684
1685 * config/tc-i386.c: Formatting.
1686 (output_disp, output_imm): ISO C90 params.
1687
1688 * frags.c (frag_offset_fixed_p): Constify args.
1689 * frags.h (frag_offset_fixed_p): Ditto.
1690
1691 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1692 (COFF_MAGIC): Delete.
1693
1694 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1695
1696 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1697
1698 * po/POTFILES.in: Regenerated.
1699
1700 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1701
1702 * doc/as.texinfo: Mention that some .type syntaxes are not
1703 supported on all architectures.
1704
1705 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1706
1707 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1708 instructions when such transformations have been disabled.
1709
1710 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1711
1712 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1713 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1714 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1715 decoding the loop instructions. Remove current_offset variable.
1716 (xtensa_fix_short_loop_frags): Likewise.
1717 (min_bytes_to_other_loop_end): Remove current_offset argument.
1718
1719 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1720
1721 * config/tc-z80.c (z80_optimize_expr): Removed.
1722 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1723
1724 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1725
1726 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1727 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1728 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1729 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1730 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1731 at90can64, at90usb646, at90usb647, at90usb1286 and
1732 at90usb1287.
1733 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1734
1735 2006-04-07 Paul Brook <paul@codesourcery.com>
1736
1737 * config/tc-arm.c (parse_operands): Set default error message.
1738
1739 2006-04-07 Paul Brook <paul@codesourcery.com>
1740
1741 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1742
1743 2006-04-07 Paul Brook <paul@codesourcery.com>
1744
1745 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1746
1747 2006-04-07 Paul Brook <paul@codesourcery.com>
1748
1749 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1750 (move_or_literal_pool): Handle Thumb-2 instructions.
1751 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1752
1753 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1754
1755 PR 2512.
1756 * config/tc-i386.c (match_template): Move 64-bit operand tests
1757 inside loop.
1758
1759 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1760
1761 * po/Make-in: Add install-html target.
1762 * Makefile.am: Add install-html and install-html-recursive targets.
1763 * Makefile.in: Regenerate.
1764 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1765 * configure: Regenerate.
1766 * doc/Makefile.am: Add install-html and install-html-am targets.
1767 * doc/Makefile.in: Regenerate.
1768
1769 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1770
1771 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1772 second scan.
1773
1774 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1775 Daniel Jacobowitz <dan@codesourcery.com>
1776
1777 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1778 (GOTT_BASE, GOTT_INDEX): New.
1779 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1780 GOTT_INDEX when generating VxWorks PIC.
1781 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1782 use the generic *-*-vxworks* stanza instead.
1783
1784 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1785
1786 PR 997
1787 * frags.c (frag_offset_fixed_p): New function.
1788 * frags.h (frag_offset_fixed_p): Declare.
1789 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1790 (resolve_expression): Likewise.
1791
1792 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1793
1794 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1795 of the same length but different numbers of slots.
1796
1797 2006-03-30 Andreas Schwab <schwab@suse.de>
1798
1799 * configure.in: Fix help string for --enable-targets option.
1800 * configure: Regenerate.
1801
1802 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1803
1804 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1805 (m68k_ip): ... here. Use for all chips. Protect against buffer
1806 overrun and avoid excessive copying.
1807
1808 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1809 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1810 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1811 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1812 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1813 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1814 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1815 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1816 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1817 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1818 (struct m68k_cpu): Change chip field to control_regs.
1819 (current_chip): Remove.
1820 (control_regs): New.
1821 (m68k_archs, m68k_extensions): Adjust.
1822 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1823 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1824 (find_cf_chip): Reimplement for new organization of cpu table.
1825 (select_control_regs): Remove.
1826 (mri_chip): Adjust.
1827 (struct save_opts): Save control regs, not chip.
1828 (s_save, s_restore): Adjust.
1829 (m68k_lookup_cpu): Give deprecated warning when necessary.
1830 (m68k_init_arch): Adjust.
1831 (md_show_usage): Adjust for new cpu table organization.
1832
1833 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1834
1835 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1836 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1837 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1838 "elf/bfin.h".
1839 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1840 (any_gotrel): New rule.
1841 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1842 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1843 "elf/bfin.h".
1844 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1845 (bfin_pic_ptr): New function.
1846 (md_pseudo_table): Add it for ".picptr".
1847 (OPTION_FDPIC): New macro.
1848 (md_longopts): Add -mfdpic.
1849 (md_parse_option): Handle it.
1850 (md_begin): Set BFD flags.
1851 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1852 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1853 us for GOT relocs.
1854 * Makefile.am (bfin-parse.o): Update dependencies.
1855 (DEPTC_bfin_elf): Likewise.
1856 * Makefile.in: Regenerate.
1857
1858 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1859
1860 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1861 mcfemac instead of mcfmac.
1862
1863 2006-03-23 Michael Matz <matz@suse.de>
1864
1865 * config/tc-i386.c (type_names): Correct placement of 'static'.
1866 (reloc): Map some more relocs to their 64 bit counterpart when
1867 size is 8.
1868 (output_insn): Work around breakage if DEBUG386 is defined.
1869 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1870 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1871 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1872 different from i386.
1873 (output_imm): Ditto.
1874 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1875 Imm64.
1876 (md_convert_frag): Jumps can now be larger than 2GB away, error
1877 out in that case.
1878 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1879 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1880
1881 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1882 Daniel Jacobowitz <dan@codesourcery.com>
1883 Phil Edwards <phil@codesourcery.com>
1884 Zack Weinberg <zack@codesourcery.com>
1885 Mark Mitchell <mark@codesourcery.com>
1886 Nathan Sidwell <nathan@codesourcery.com>
1887
1888 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1889 (md_begin): Complain about -G being used for PIC. Don't change
1890 the text, data and bss alignments on VxWorks.
1891 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1892 generating VxWorks PIC.
1893 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1894 (macro): Likewise, but do not treat la $25 specially for
1895 VxWorks PIC, and do not handle jal.
1896 (OPTION_MVXWORKS_PIC): New macro.
1897 (md_longopts): Add -mvxworks-pic.
1898 (md_parse_option): Don't complain about using PIC and -G together here.
1899 Handle OPTION_MVXWORKS_PIC.
1900 (md_estimate_size_before_relax): Always use the first relaxation
1901 sequence on VxWorks.
1902 * config/tc-mips.h (VXWORKS_PIC): New.
1903
1904 2006-03-21 Paul Brook <paul@codesourcery.com>
1905
1906 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1907
1908 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1909
1910 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1911 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1912 (get_loop_align_size): New.
1913 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1914 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1915 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1916 (get_noop_aligned_address): Use get_loop_align_size.
1917 (get_aligned_diff): Likewise.
1918
1919 2006-03-21 Paul Brook <paul@codesourcery.com>
1920
1921 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1922
1923 2006-03-20 Paul Brook <paul@codesourcery.com>
1924
1925 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1926 (do_t_branch): Encode branches inside IT blocks as unconditional.
1927 (do_t_cps): New function.
1928 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1929 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1930 (opcode_lookup): Allow conditional suffixes on all instructions in
1931 Thumb mode.
1932 (md_assemble): Advance condexec state before checking for errors.
1933 (insns): Use do_t_cps.
1934
1935 2006-03-20 Paul Brook <paul@codesourcery.com>
1936
1937 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1938 outputting the insn.
1939
1940 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1941
1942 * config/tc-vax.c: Update copyright year.
1943 * config/tc-vax.h: Likewise.
1944
1945 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1946
1947 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1948 make it static.
1949 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1950
1951 2006-03-17 Paul Brook <paul@codesourcery.com>
1952
1953 * config/tc-arm.c (insns): Add ldm and stm.
1954
1955 2006-03-17 Ben Elliston <bje@au.ibm.com>
1956
1957 PR gas/2446
1958 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1959
1960 2006-03-16 Paul Brook <paul@codesourcery.com>
1961
1962 * config/tc-arm.c (insns): Add "svc".
1963
1964 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1965
1966 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1967 flag and avoid double underscore prefixes.
1968
1969 2006-03-10 Paul Brook <paul@codesourcery.com>
1970
1971 * config/tc-arm.c (md_begin): Handle EABIv5.
1972 (arm_eabis): Add EF_ARM_EABI_VER5.
1973 * doc/c-arm.texi: Document -meabi=5.
1974
1975 2006-03-10 Ben Elliston <bje@au.ibm.com>
1976
1977 * app.c (do_scrub_chars): Simplify string handling.
1978
1979 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1980 Daniel Jacobowitz <dan@codesourcery.com>
1981 Zack Weinberg <zack@codesourcery.com>
1982 Nathan Sidwell <nathan@codesourcery.com>
1983 Paul Brook <paul@codesourcery.com>
1984 Ricardo Anguiano <anguiano@codesourcery.com>
1985 Phil Edwards <phil@codesourcery.com>
1986
1987 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1988 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1989 R_ARM_ABS12 reloc.
1990 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1991 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1992 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1993
1994 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1995
1996 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1997 even when using the text-section-literals option.
1998
1999 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2000
2001 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2002 and cf.
2003 (m68k_ip): <case 'J'> Check we have some control regs.
2004 (md_parse_option): Allow raw arch switch.
2005 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2006 whether 68881 or cfloat was meant by -mfloat.
2007 (md_show_usage): Adjust extension display.
2008 (m68k_elf_final_processing): Adjust.
2009
2010 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2011
2012 * config/tc-avr.c (avr_mod_hash_value): New function.
2013 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
2014 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
2015 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2016 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2017 of (int).
2018 (tc_gen_reloc): Handle substractions of symbols, if possible do
2019 fixups, abort otherwise.
2020 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2021 tc_fix_adjustable): Define.
2022
2023 2006-03-02 James E Wilson <wilson@specifix.com>
2024
2025 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2026 change the template, then clear md.slot[curr].end_of_insn_group.
2027
2028 2006-02-28 Jan Beulich <jbeulich@novell.com>
2029
2030 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2031
2032 2006-02-28 Jan Beulich <jbeulich@novell.com>
2033
2034 PR/1070
2035 * macro.c (getstring): Don't treat parentheses special anymore.
2036 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2037 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2038 characters.
2039
2040 2006-02-28 Mat <mat@csail.mit.edu>
2041
2042 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2043
2044 2006-02-27 Jakub Jelinek <jakub@redhat.com>
2045
2046 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2047 field.
2048 (CFI_signal_frame): Define.
2049 (cfi_pseudo_table): Add .cfi_signal_frame.
2050 (dot_cfi): Handle CFI_signal_frame.
2051 (output_cie): Handle cie->signal_frame.
2052 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2053 different. Copy signal_frame from FDE to newly created CIE.
2054 * doc/as.texinfo: Document .cfi_signal_frame.
2055
2056 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2057
2058 * doc/Makefile.am: Add html target.
2059 * doc/Makefile.in: Regenerate.
2060 * po/Make-in: Add html target.
2061
2062 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2063
2064 * config/tc-i386.c (output_insn): Support Intel Merom New
2065 Instructions.
2066
2067 * config/tc-i386.h (CpuMNI): New.
2068 (CpuUnknownFlags): Add CpuMNI.
2069
2070 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
2071
2072 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2073 (hpriv_reg_table): New table for hyperprivileged registers.
2074 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2075 register encoding.
2076
2077 2006-02-24 DJ Delorie <dj@redhat.com>
2078
2079 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2080 (tc_gen_reloc): Don't define.
2081 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2082 (OPTION_LINKRELAX): New.
2083 (md_longopts): Add it.
2084 (m32c_relax): New.
2085 (md_parse_options): Set it.
2086 (md_assemble): Emit relaxation relocs as needed.
2087 (md_convert_frag): Emit relaxation relocs as needed.
2088 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2089 (m32c_apply_fix): New.
2090 (tc_gen_reloc): New.
2091 (m32c_force_relocation): Force out jump relocs when relaxing.
2092 (m32c_fix_adjustable): Return false if relaxing.
2093
2094 2006-02-24 Paul Brook <paul@codesourcery.com>
2095
2096 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2097 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2098 (struct asm_barrier_opt): Define.
2099 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2100 (parse_psr): Accept V7M psr names.
2101 (parse_barrier): New function.
2102 (enum operand_parse_code): Add OP_oBARRIER.
2103 (parse_operands): Implement OP_oBARRIER.
2104 (do_barrier): New function.
2105 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2106 (do_t_cpsi): Add V7M restrictions.
2107 (do_t_mrs, do_t_msr): Validate V7M variants.
2108 (md_assemble): Check for NULL variants.
2109 (v7m_psrs, barrier_opt_names): New tables.
2110 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2111 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2112 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2113 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2114 (struct cpu_arch_ver_table): Define.
2115 (cpu_arch_ver): New.
2116 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2117 Tag_CPU_arch_profile.
2118 * doc/c-arm.texi: Document new cpu and arch options.
2119
2120 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2121
2122 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2123
2124 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2125
2126 * config/tc-ia64.c: Update copyright years.
2127
2128 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2129
2130 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2131 SDM 2.2.
2132
2133 2005-02-22 Paul Brook <paul@codesourcery.com>
2134
2135 * config/tc-arm.c (do_pld): Remove incorrect write to
2136 inst.instruction.
2137 (encode_thumb32_addr_mode): Use correct operand.
2138
2139 2006-02-21 Paul Brook <paul@codesourcery.com>
2140
2141 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2142
2143 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2144 Anil Paranjape <anilp1@kpitcummins.com>
2145 Shilin Shakti <shilins@kpitcummins.com>
2146
2147 * Makefile.am: Add xc16x related entry.
2148 * Makefile.in: Regenerate.
2149 * configure.in: Added xc16x related entry.
2150 * configure: Regenerate.
2151 * config/tc-xc16x.h: New file
2152 * config/tc-xc16x.c: New file
2153 * doc/c-xc16x.texi: New file for xc16x
2154 * doc/all.texi: Entry for xc16x
2155 * doc/Makefile.texi: Added c-xc16x.texi
2156 * NEWS: Announce the support for the new target.
2157
2158 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2159
2160 * configure.tgt: set emulation for mips-*-netbsd*
2161
2162 2006-02-14 Jakub Jelinek <jakub@redhat.com>
2163
2164 * config.in: Rebuilt.
2165
2166 2006-02-13 Bob Wilson <bob.wilson@acm.org>
2167
2168 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2169 from 1, not 0, in error messages.
2170 (md_assemble): Simplify special-case check for ENTRY instructions.
2171 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2172 operand in error message.
2173
2174 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2175
2176 * configure.tgt (arm-*-linux-gnueabi*): Change to
2177 arm-*-linux-*eabi*.
2178
2179 2006-02-10 Nick Clifton <nickc@redhat.com>
2180
2181 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2182 32-bit value is propagated into the upper bits of a 64-bit long.
2183
2184 * config/tc-arc.c (init_opcode_tables): Fix cast.
2185 (arc_extoper, md_operand): Likewise.
2186
2187 2006-02-09 David Heine <dlheine@tensilica.com>
2188
2189 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2190 each relaxation step.
2191
2192 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2193
2194 * configure.in (CHECK_DECLS): Add vsnprintf.
2195 * configure: Regenerate.
2196 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2197 include/declare here, but...
2198 * as.h: Move code detecting VARARGS idiom to the top.
2199 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2200 (vsnprintf): Declare if not already declared.
2201
2202 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2203
2204 * as.c (close_output_file): New.
2205 (main): Register close_output_file with xatexit before
2206 dump_statistics. Don't call output_file_close.
2207
2208 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2209
2210 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2211 mcf5329_control_regs): New.
2212 (not_current_architecture, selected_arch, selected_cpu): New.
2213 (m68k_archs, m68k_extensions): New.
2214 (archs): Renamed to ...
2215 (m68k_cpus): ... here. Adjust.
2216 (n_arches): Remove.
2217 (md_pseudo_table): Add arch and cpu directives.
2218 (find_cf_chip, m68k_ip): Adjust table scanning.
2219 (no_68851, no_68881): Remove.
2220 (md_assemble): Lazily initialize.
2221 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2222 (md_init_after_args): Move functionality to m68k_init_arch.
2223 (mri_chip): Adjust table scanning.
2224 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2225 options with saner parsing.
2226 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2227 m68k_init_arch): New.
2228 (s_m68k_cpu, s_m68k_arch): New.
2229 (md_show_usage): Adjust.
2230 (m68k_elf_final_processing): Set CF EF flags.
2231 * config/tc-m68k.h (m68k_init_after_args): Remove.
2232 (tc_init_after_args): Remove.
2233 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2234 (M68k-Directives): Document .arch and .cpu directives.
2235
2236 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2237
2238 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2239 synonyms for equ and defl.
2240 (z80_cons_fix_new): New function.
2241 (emit_byte): Disallow relative jumps to absolute locations.
2242 (emit_data): Only handle defb, prototype changed, because defb is
2243 now handled as pseudo-op rather than an instruction.
2244 (instab): Entries for defb,defw,db,dw moved from here...
2245 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2246 Add entries for def24,def32,d24,d32.
2247 (md_assemble): Improved error handling.
2248 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2249 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2250 (z80_cons_fix_new): Declare.
2251 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2252 (def24,d24,def32,d32): New pseudo-ops.
2253
2254 2006-02-02 Paul Brook <paul@codesourcery.com>
2255
2256 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2257
2258 2005-02-02 Paul Brook <paul@codesourcery.com>
2259
2260 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2261 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2262 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2263 T2_OPCODE_RSB): Define.
2264 (thumb32_negate_data_op): New function.
2265 (md_apply_fix): Use it.
2266
2267 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2268
2269 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2270 fields.
2271 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2272 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2273 subtracted symbols.
2274 (relaxation_requirements): Add pfinish_frag argument and use it to
2275 replace setting tinsn->record_fix fields.
2276 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2277 and vinsn_to_insnbuf. Remove references to record_fix and
2278 slot_sub_symbols fields.
2279 (xtensa_mark_narrow_branches): Delete unused code.
2280 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2281 a symbol.
2282 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2283 record_fix fields.
2284 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2285 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2286 of the record_fix field. Simplify error messages for unexpected
2287 symbolic operands.
2288 (set_expr_symbol_offset_diff): Delete.
2289
2290 2006-01-31 Paul Brook <paul@codesourcery.com>
2291
2292 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2293
2294 2006-01-31 Paul Brook <paul@codesourcery.com>
2295 Richard Earnshaw <rearnsha@arm.com>
2296
2297 * config/tc-arm.c: Use arm_feature_set.
2298 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2299 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2300 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2301 New variables.
2302 (insns): Use them.
2303 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2304 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2305 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2306 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2307 feature flags.
2308 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2309 (arm_opts): Move old cpu/arch options from here...
2310 (arm_legacy_opts): ... to here.
2311 (md_parse_option): Search arm_legacy_opts.
2312 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2313 (arm_float_abis, arm_eabis): Make const.
2314
2315 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2316
2317 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2318
2319 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2320
2321 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2322 in load immediate intruction.
2323
2324 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2325
2326 * config/bfin-parse.y (value_match): Use correct conversion
2327 specifications in template string for __FILE__ and __LINE__.
2328 (binary): Ditto.
2329 (unary): Ditto.
2330
2331 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2332
2333 Introduce TLS descriptors for i386 and x86_64.
2334 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2335 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2336 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2337 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2338 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2339 displacement bits.
2340 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2341 (lex_got): Handle @tlsdesc and @tlscall.
2342 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2343
2344 2006-01-11 Nick Clifton <nickc@redhat.com>
2345
2346 Fixes for building on 64-bit hosts:
2347 * config/tc-avr.c (mod_index): New union to allow conversion
2348 between pointers and integers.
2349 (md_begin, avr_ldi_expression): Use it.
2350 * config/tc-i370.c (md_assemble): Add cast for argument to print
2351 statement.
2352 * config/tc-tic54x.c (subsym_substitute): Likewise.
2353 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2354 opindex field of fr_cgen structure into a pointer so that it can
2355 be stored in a frag.
2356 * config/tc-mn10300.c (md_assemble): Likewise.
2357 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2358 types.
2359 * config/tc-v850.c: Replace uses of (int) casts with correct
2360 types.
2361
2362 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2363
2364 PR gas/2117
2365 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2366
2367 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2368
2369 PR gas/2101
2370 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2371 a local-label reference.
2372
2373 For older changes see ChangeLog-2005
2374 \f
2375 Local Variables:
2376 mode: change-log
2377 left-margin: 8
2378 fill-column: 74
2379 version-control: never
2380 End:
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