1 2006-05-30 Nick Clifton <nickc@redhat.com>
3 * po/es.po: Updated Spanish translation.
5 2006-05-06 Denis Chertykov <denisc@overta.ru>
7 * doc/c-avr.texi: New file.
8 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
9 * doc/all.texi: Set AVR
10 * doc/as.texinfo: Include c-avr.texi
12 2006-05-28 Jie Zhang <jie.zhang@analog.com>
14 * config/bfin-parse.y (check_macfunc): Loose the condition of
15 calling check_multiply_halfregs ().
17 2006-05-25 Jie Zhang <jie.zhang@analog.com>
19 * config/bfin-parse.y (asm_1): Better check and deal with
20 vector and scalar Multiply 16-Bit Operands instructions.
22 2006-05-24 Nick Clifton <nickc@redhat.com>
24 * config/tc-hppa.c: Convert to ISO C90 format.
25 * config/tc-hppa.h: Likewise.
27 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
28 Randolph Chung <randolph@tausq.org>
30 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
31 is_tls_ieoff, is_tls_leoff): Define.
32 (fix_new_hppa): Handle TLS.
33 (cons_fix_new_hppa): Likewise.
35 (md_apply_fix): Handle TLS relocs.
36 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
38 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
40 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
42 2006-05-23 Thiemo Seufer <ths@mips.com>
43 David Ung <davidu@mips.com>
44 Nigel Stephens <nigel@mips.com>
47 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
48 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
49 ISA_HAS_MXHC1): New macros.
50 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
51 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
52 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
53 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
54 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
55 (mips_after_parse_args): Change default handling of float register
56 size to account for 32bit code with 64bit FP. Better sanity checking
57 of ISA/ASE/ABI option combinations.
58 (s_mipsset): Support switching of GPR and FPR sizes via
59 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
61 (mips_elf_final_processing): We should record the use of 64bit FP
62 registers in 32bit code but we don't, because ELF header flags are
64 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
65 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
66 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
67 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
68 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
69 missing -march options. Document .set arch=CPU. Move .set smartmips
70 to ASE page. Use @code for .set FOO examples.
72 2006-05-23 Jie Zhang <jie.zhang@analog.com>
74 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
77 2006-05-23 Jie Zhang <jie.zhang@analog.com>
79 * config/bfin-defs.h (bfin_equals): Remove declaration.
80 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
81 * config/tc-bfin.c (bfin_name_is_register): Remove.
82 (bfin_equals): Remove.
83 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
84 (bfin_name_is_register): Remove declaration.
86 2006-05-19 Thiemo Seufer <ths@mips.com>
87 Nigel Stephens <nigel@mips.com>
89 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
90 (mips_oddfpreg_ok): New function.
93 2006-05-19 Thiemo Seufer <ths@mips.com>
94 David Ung <davidu@mips.com>
96 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
97 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
98 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
99 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
100 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
101 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
102 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
103 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
104 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
105 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
106 reg_names_o32, reg_names_n32n64): Define register classes.
107 (reg_lookup): New function, use register classes.
108 (md_begin): Reserve register names in the symbol table. Simplify
110 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
112 (mips16_ip): Use reg_lookup.
113 (tc_get_register): Likewise.
114 (tc_mips_regname_to_dw2regnum): New function.
116 2006-05-19 Thiemo Seufer <ths@mips.com>
118 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
119 Un-constify string argument.
120 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
122 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
124 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
126 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
128 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
130 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
133 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
135 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
136 cfloat/m68881 to correct architecture before using it.
138 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
140 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
143 2006-05-15 Paul Brook <paul@codesourcery.com>
145 * config/tc-arm.c (arm_adjust_symtab): Use
146 bfd_is_arm_special_symbol_name.
148 2006-05-15 Bob Wilson <bob.wilson@acm.org>
150 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
151 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
152 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
153 Handle errors from calls to xtensa_opcode_is_* functions.
155 2006-05-14 Thiemo Seufer <ths@mips.com>
157 * config/tc-mips.c (macro_build): Test for currently active
159 (mips16_ip): Reject invalid opcodes.
161 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
163 * doc/as.texinfo: Rename "Index" to "AS Index",
164 and "ABORT" to "ABORT (COFF)".
166 2006-05-11 Paul Brook <paul@codesourcery.com>
168 * config/tc-arm.c (parse_half): New function.
169 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
170 (parse_operands): Ditto.
171 (do_mov16): Reject invalid relocations.
172 (do_t_mov16): Ditto. Use Thumb reloc numbers.
173 (insns): Replace Iffff with HALF.
174 (md_apply_fix): Add MOVW and MOVT relocs.
175 (tc_gen_reloc): Ditto.
176 * doc/c-arm.texi: Document relocation operators
178 2006-05-11 Paul Brook <paul@codesourcery.com>
180 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
182 2006-05-11 Thiemo Seufer <ths@mips.com>
184 * config/tc-mips.c (append_insn): Don't check the range of j or
187 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
189 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
190 relocs against external symbols for WinCE targets.
191 (md_apply_fix): Likewise.
193 2006-05-09 David Ung <davidu@mips.com>
195 * config/tc-mips.c (append_insn): Only warn about an out-of-range
198 2006-05-09 Nick Clifton <nickc@redhat.com>
200 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
201 against symbols which are not going to be placed into the symbol
204 2006-05-09 Ben Elliston <bje@au.ibm.com>
206 * expr.c (operand): Remove `if (0 && ..)' statement and
207 subsequently unused target_op label. Collapse `if (1 || ..)'
209 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
210 separately above the switch.
212 2006-05-08 Nick Clifton <nickc@redhat.com>
215 * config/tc-msp430.c (line_separator_character): Define as |.
217 2006-05-08 Thiemo Seufer <ths@mips.com>
218 Nigel Stephens <nigel@mips.com>
219 David Ung <davidu@mips.com>
221 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
222 (mips_opts): Likewise.
223 (file_ase_smartmips): New variable.
224 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
225 (macro_build): Handle SmartMIPS instructions.
227 (md_longopts): Add argument handling for smartmips.
228 (md_parse_options, mips_after_parse_args): Likewise.
229 (s_mipsset): Add .set smartmips support.
230 (md_show_usage): Document -msmartmips/-mno-smartmips.
231 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
233 * doc/c-mips.texi: Likewise.
235 2006-05-08 Alan Modra <amodra@bigpond.net.au>
237 * write.c (relax_segment): Add pass count arg. Don't error on
238 negative org/space on first two passes.
239 (relax_seg_info): New struct.
240 (relax_seg, write_object_file): Adjust.
241 * write.h (relax_segment): Update prototype.
243 2006-05-05 Julian Brown <julian@codesourcery.com>
245 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
247 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
248 architecture version checks.
249 (insns): Allow overlapping instructions to be used in VFP mode.
251 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
254 * config/obj-elf.c (obj_elf_change_section): Allow user
255 specified SHF_ALPHA_GPREL.
257 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
259 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
260 for PMEM related expressions.
262 2006-05-05 Nick Clifton <nickc@redhat.com>
265 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
266 insertion of a directory separator character into a string at a
267 given offset. Uses heuristics to decide when to use a backslash
268 character rather than a forward-slash character.
269 (dwarf2_directive_loc): Use the macro.
270 (out_debug_info): Likewise.
272 2006-05-05 Thiemo Seufer <ths@mips.com>
273 David Ung <davidu@mips.com>
275 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
277 (macro): Add new case M_CACHE_AB.
279 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
281 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
282 (opcode_lookup): Issue a warning for opcode with
283 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
284 identical to OT_cinfix3.
285 (TxC3w, TC3w, tC3w): New.
286 (insns): Use tC3w and TC3w for comparison instructions with
289 2006-05-04 Alan Modra <amodra@bigpond.net.au>
291 * subsegs.h (struct frchain): Delete frch_seg.
292 (frchain_root): Delete.
293 (seg_info): Define as macro.
294 * subsegs.c (frchain_root): Delete.
295 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
296 (subsegs_begin, subseg_change): Adjust for above.
297 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
298 rather than to one big list.
299 (subseg_get): Don't special case abs, und sections.
300 (subseg_new, subseg_force_new): Don't set frchainP here.
302 (subsegs_print_statistics): Adjust frag chain control list traversal.
303 * debug.c (dmp_frags): Likewise.
304 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
305 at frchain_root. Make use of known frchain ordering.
306 (last_frag_for_seg): Likewise.
307 (get_frag_fix): Likewise. Add seg param.
308 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
309 * write.c (chain_frchains_together_1): Adjust for struct frchain.
310 (SUB_SEGMENT_ALIGN): Likewise.
311 (subsegs_finish): Adjust frchain list traversal.
312 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
313 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
314 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
315 (xtensa_fix_b_j_loop_end_frags): Likewise.
316 (xtensa_fix_close_loop_end_frags): Likewise.
317 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
318 (retrieve_segment_info): Delete frch_seg initialisation.
320 2006-05-03 Alan Modra <amodra@bigpond.net.au>
322 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
323 * config/obj-elf.h (obj_sec_set_private_data): Delete.
324 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
325 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
327 2006-05-02 Joseph Myers <joseph@codesourcery.com>
329 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
331 (md_apply_fix3): Multiply offset by 4 here for
332 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
334 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
335 Jan Beulich <jbeulich@novell.com>
337 * config/tc-i386.c (output_invalid_buf): Change size for
339 * config/tc-tic30.c (output_invalid_buf): Likewise.
341 * config/tc-i386.c (output_invalid): Cast none-ascii char to
343 * config/tc-tic30.c (output_invalid): Likewise.
345 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
347 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
348 (TEXI2POD): Use AM_MAKEINFOFLAGS.
349 (asconfig.texi): Don't set top_srcdir.
350 * doc/as.texinfo: Don't use top_srcdir.
351 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
353 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
355 * config/tc-i386.c (output_invalid_buf): Change size to 16.
356 * config/tc-tic30.c (output_invalid_buf): Likewise.
358 * config/tc-i386.c (output_invalid): Use snprintf instead of
360 * config/tc-ia64.c (declare_register_set): Likewise.
361 (emit_one_bundle): Likewise.
362 (check_dependencies): Likewise.
363 * config/tc-tic30.c (output_invalid): Likewise.
365 2006-05-02 Paul Brook <paul@codesourcery.com>
367 * config/tc-arm.c (arm_optimize_expr): New function.
368 * config/tc-arm.h (md_optimize_expr): Define
369 (arm_optimize_expr): Add prototype.
370 (TC_FORCE_RELOCATION_SUB_SAME): Define.
372 2006-05-02 Ben Elliston <bje@au.ibm.com>
374 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
377 * sb.h (sb_list_vector): Move to sb.c.
378 * sb.c (free_list): Use type of sb_list_vector directly.
379 (sb_build): Fix off-by-one error in assertion about `size'.
381 2006-05-01 Ben Elliston <bje@au.ibm.com>
383 * listing.c (listing_listing): Remove useless loop.
384 * macro.c (macro_expand): Remove is_positional local variable.
385 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
386 and simplify surrounding expressions, where possible.
387 (assign_symbol): Likewise.
388 (s_weakref): Likewise.
389 * symbols.c (colon): Likewise.
391 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
393 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
395 2006-04-30 Thiemo Seufer <ths@mips.com>
396 David Ung <davidu@mips.com>
398 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
399 (mips_immed): New table that records various handling of udi
400 instruction patterns.
401 (mips_ip): Adds udi handling.
403 2006-04-28 Alan Modra <amodra@bigpond.net.au>
405 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
406 of list rather than beginning.
408 2006-04-26 Julian Brown <julian@codesourcery.com>
410 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
411 (is_quarter_float): Rename from above. Simplify slightly.
412 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
414 (parse_neon_mov): Parse floating-point constants.
415 (neon_qfloat_bits): Fix encoding.
416 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
417 preference to integer encoding when using the F32 type.
419 2006-04-26 Julian Brown <julian@codesourcery.com>
421 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
422 zero-initialising structures containing it will lead to invalid types).
423 (arm_it): Add vectype to each operand.
424 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
426 (neon_typed_alias): New structure. Extra information for typed
428 (reg_entry): Add neon type info field.
429 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
430 Break out alternative syntax for coprocessor registers, etc. into...
431 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
432 out from arm_reg_parse.
433 (parse_neon_type): Move. Return SUCCESS/FAIL.
434 (first_error): New function. Call to ensure first error which occurs is
436 (parse_neon_operand_type): Parse exactly one type.
437 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
438 (parse_typed_reg_or_scalar): New function. Handle core of both
439 arm_typed_reg_parse and parse_scalar.
440 (arm_typed_reg_parse): Parse a register with an optional type.
441 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
443 (parse_scalar): Parse a Neon scalar with optional type.
444 (parse_reg_list): Use first_error.
445 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
446 (neon_alias_types_same): New function. Return true if two (alias) types
448 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
450 (insert_reg_alias): Return new reg_entry not void.
451 (insert_neon_reg_alias): New function. Insert type/index information as
452 well as register for alias.
453 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
454 make typed register aliases accordingly.
455 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
457 (s_unreq): Delete type information if present.
458 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
459 (s_arm_unwind_save_mmxwcg): Likewise.
460 (s_arm_unwind_movsp): Likewise.
461 (s_arm_unwind_setfp): Likewise.
462 (parse_shift): Likewise.
463 (parse_shifter_operand): Likewise.
464 (parse_address): Likewise.
465 (parse_tb): Likewise.
466 (tc_arm_regname_to_dw2regnum): Likewise.
467 (md_pseudo_table): Add dn, qn.
468 (parse_neon_mov): Handle typed operands.
469 (parse_operands): Likewise.
470 (neon_type_mask): Add N_SIZ.
471 (N_ALLMODS): New macro.
472 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
473 (el_type_of_type_chk): Add some safeguards.
474 (modify_types_allowed): Fix logic bug.
475 (neon_check_type): Handle operands with types.
476 (neon_three_same): Remove redundant optional arg handling.
477 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
478 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
479 (do_neon_step): Adjust accordingly.
480 (neon_cmode_for_logic_imm): Use first_error.
481 (do_neon_bitfield): Call neon_check_type.
482 (neon_dyadic): Rename to...
483 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
484 to allow modification of type of the destination.
485 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
486 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
487 (do_neon_compare): Make destination be an untyped bitfield.
488 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
489 (neon_mul_mac): Return early in case of errors.
490 (neon_move_immediate): Use first_error.
491 (neon_mac_reg_scalar_long): Fix type to include scalar.
492 (do_neon_dup): Likewise.
493 (do_neon_mov): Likewise (in several places).
494 (do_neon_tbl_tbx): Fix type.
495 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
496 (do_neon_ld_dup): Exit early in case of errors and/or use
498 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
499 Handle .dn/.qn directives.
500 (REGDEF): Add zero for reg_entry neon field.
502 2006-04-26 Julian Brown <julian@codesourcery.com>
504 * config/tc-arm.c (limits.h): Include.
505 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
506 (fpu_vfp_v3_or_neon_ext): Declare constants.
507 (neon_el_type): New enumeration of types for Neon vector elements.
508 (neon_type_el): New struct. Define type and size of a vector element.
509 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
511 (neon_type): Define struct. The type of an instruction.
512 (arm_it): Add 'vectype' for the current instruction.
513 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
514 (vfp_sp_reg_pos): Rename to...
515 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
517 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
518 (Neon D or Q register).
519 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
521 (GE_OPT_PREFIX_BIG): Define constant, for use in...
522 (my_get_expression): Allow above constant as argument to accept
523 64-bit constants with optional prefix.
524 (arm_reg_parse): Add extra argument to return the specific type of
525 register in when either a D or Q register (REG_TYPE_NDQ) is
526 requested. Can be NULL.
527 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
528 (parse_reg_list): Update for new arm_reg_parse args.
529 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
530 (parse_neon_el_struct_list): New function. Parse element/structure
531 register lists for VLD<n>/VST<n> instructions.
532 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
533 (s_arm_unwind_save_mmxwr): Likewise.
534 (s_arm_unwind_save_mmxwcg): Likewise.
535 (s_arm_unwind_movsp): Likewise.
536 (s_arm_unwind_setfp): Likewise.
537 (parse_big_immediate): New function. Parse an immediate, which may be
538 64 bits wide. Put results in inst.operands[i].
539 (parse_shift): Update for new arm_reg_parse args.
540 (parse_address): Likewise. Add parsing of alignment specifiers.
541 (parse_neon_mov): Parse the operands of a VMOV instruction.
542 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
543 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
544 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
545 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
546 (parse_operands): Handle new codes above.
547 (encode_arm_vfp_sp_reg): Rename to...
548 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
549 selected VFP version only supports D0-D15.
550 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
551 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
552 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
553 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
554 encode_arm_vfp_reg name, and allow 32 D regs.
555 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
556 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
558 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
559 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
560 constant-load and conversion insns introduced with VFPv3.
561 (neon_tab_entry): New struct.
562 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
563 those which are the targets of pseudo-instructions.
564 (neon_opc): Enumerate opcodes, use as indices into...
565 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
566 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
567 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
568 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
570 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
572 (neon_type_mask): New. Compact type representation for type checking.
573 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
574 permitted type combinations.
575 (N_IGNORE_TYPE): New macro.
576 (neon_check_shape): New function. Check an instruction shape for
577 multiple alternatives. Return the specific shape for the current
579 (neon_modify_type_size): New function. Modify a vector type and size,
580 depending on the bit mask in argument 1.
581 (neon_type_promote): New function. Convert a given "key" type (of an
582 operand) into the correct type for a different operand, based on a bit
584 (type_chk_of_el_type): New function. Convert a type and size into the
585 compact representation used for type checking.
586 (el_type_of_type_ckh): New function. Reverse of above (only when a
587 single bit is set in the bit mask).
588 (modify_types_allowed): New function. Alter a mask of allowed types
589 based on a bit mask of modifications.
590 (neon_check_type): New function. Check the type of the current
591 instruction against the variable argument list. The "key" type of the
592 instruction is returned.
593 (neon_dp_fixup): New function. Fill in and modify instruction bits for
594 a Neon data-processing instruction depending on whether we're in ARM
595 mode or Thumb-2 mode.
596 (neon_logbits): New function.
597 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
598 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
599 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
600 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
601 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
602 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
603 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
604 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
605 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
606 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
607 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
608 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
609 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
610 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
611 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
612 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
613 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
614 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
615 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
616 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
617 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
618 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
619 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
620 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
621 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
623 (parse_neon_type): New function. Parse Neon type specifier.
624 (opcode_lookup): Allow parsing of Neon type specifiers.
625 (REGNUM2, REGSETH, REGSET2): New macros.
626 (reg_names): Add new VFPv3 and Neon registers.
627 (NUF, nUF, NCE, nCE): New macros for opcode table.
628 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
629 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
630 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
631 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
632 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
633 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
634 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
635 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
636 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
637 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
638 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
639 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
640 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
641 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
643 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
644 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
645 (arm_option_cpu_value): Add vfp3 and neon.
646 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
649 2006-04-25 Bob Wilson <bob.wilson@acm.org>
651 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
652 syntax instead of hardcoded opcodes with ".w18" suffixes.
653 (wide_branch_opcode): New.
654 (build_transition): Use it to check for wide branch opcodes with
655 either ".w18" or ".w15" suffixes.
657 2006-04-25 Bob Wilson <bob.wilson@acm.org>
659 * config/tc-xtensa.c (xtensa_create_literal_symbol,
660 xg_assemble_literal, xg_assemble_literal_space): Do not set the
661 frag's is_literal flag.
663 2006-04-25 Bob Wilson <bob.wilson@acm.org>
665 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
667 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
669 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
670 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
671 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
672 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
673 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
675 2005-04-20 Paul Brook <paul@codesourcery.com>
677 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
679 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
681 2006-04-19 Alan Modra <amodra@bigpond.net.au>
683 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
684 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
685 Make some cpus unsupported on ELF. Run "make dep-am".
686 * Makefile.in: Regenerate.
688 2006-04-19 Alan Modra <amodra@bigpond.net.au>
690 * configure.in (--enable-targets): Indent help message.
691 * configure: Regenerate.
693 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
696 * config/tc-i386.c (i386_immediate): Check illegal immediate
699 2006-04-18 Alan Modra <amodra@bigpond.net.au>
701 * config/tc-i386.c: Formatting.
702 (output_disp, output_imm): ISO C90 params.
704 * frags.c (frag_offset_fixed_p): Constify args.
705 * frags.h (frag_offset_fixed_p): Ditto.
707 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
708 (COFF_MAGIC): Delete.
710 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
712 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
714 * po/POTFILES.in: Regenerated.
716 2006-04-16 Mark Mitchell <mark@codesourcery.com>
718 * doc/as.texinfo: Mention that some .type syntaxes are not
719 supported on all architectures.
721 2006-04-14 Sterling Augustine <sterling@tensilica.com>
723 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
724 instructions when such transformations have been disabled.
726 2006-04-10 Sterling Augustine <sterling@tensilica.com>
728 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
729 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
730 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
731 decoding the loop instructions. Remove current_offset variable.
732 (xtensa_fix_short_loop_frags): Likewise.
733 (min_bytes_to_other_loop_end): Remove current_offset argument.
735 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
737 * config/tc-z80.c (z80_optimize_expr): Removed.
738 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
740 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
742 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
743 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
744 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
745 atmega644, atmega329, atmega3290, atmega649, atmega6490,
746 atmega406, atmega640, atmega1280, atmega1281, at90can32,
747 at90can64, at90usb646, at90usb647, at90usb1286 and
749 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
751 2006-04-07 Paul Brook <paul@codesourcery.com>
753 * config/tc-arm.c (parse_operands): Set default error message.
755 2006-04-07 Paul Brook <paul@codesourcery.com>
757 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
759 2006-04-07 Paul Brook <paul@codesourcery.com>
761 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
763 2006-04-07 Paul Brook <paul@codesourcery.com>
765 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
766 (move_or_literal_pool): Handle Thumb-2 instructions.
767 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
769 2006-04-07 Alan Modra <amodra@bigpond.net.au>
772 * config/tc-i386.c (match_template): Move 64-bit operand tests
775 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
777 * po/Make-in: Add install-html target.
778 * Makefile.am: Add install-html and install-html-recursive targets.
779 * Makefile.in: Regenerate.
780 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
781 * configure: Regenerate.
782 * doc/Makefile.am: Add install-html and install-html-am targets.
783 * doc/Makefile.in: Regenerate.
785 2006-04-06 Alan Modra <amodra@bigpond.net.au>
787 * frags.c (frag_offset_fixed_p): Reinitialise offset before
790 2006-04-05 Richard Sandiford <richard@codesourcery.com>
791 Daniel Jacobowitz <dan@codesourcery.com>
793 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
794 (GOTT_BASE, GOTT_INDEX): New.
795 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
796 GOTT_INDEX when generating VxWorks PIC.
797 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
798 use the generic *-*-vxworks* stanza instead.
800 2006-04-04 Alan Modra <amodra@bigpond.net.au>
803 * frags.c (frag_offset_fixed_p): New function.
804 * frags.h (frag_offset_fixed_p): Declare.
805 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
806 (resolve_expression): Likewise.
808 2006-04-03 Sterling Augustine <sterling@tensilica.com>
810 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
811 of the same length but different numbers of slots.
813 2006-03-30 Andreas Schwab <schwab@suse.de>
815 * configure.in: Fix help string for --enable-targets option.
816 * configure: Regenerate.
818 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
820 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
821 (m68k_ip): ... here. Use for all chips. Protect against buffer
822 overrun and avoid excessive copying.
824 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
825 m68020_control_regs, m68040_control_regs, m68060_control_regs,
826 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
827 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
828 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
829 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
830 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
831 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
832 mcf5282_ctrl, mcfv4e_ctrl): ... these.
833 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
834 (struct m68k_cpu): Change chip field to control_regs.
835 (current_chip): Remove.
837 (m68k_archs, m68k_extensions): Adjust.
838 (m68k_cpus): Reorder to be in cpu number order. Adjust.
839 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
840 (find_cf_chip): Reimplement for new organization of cpu table.
841 (select_control_regs): Remove.
843 (struct save_opts): Save control regs, not chip.
844 (s_save, s_restore): Adjust.
845 (m68k_lookup_cpu): Give deprecated warning when necessary.
846 (m68k_init_arch): Adjust.
847 (md_show_usage): Adjust for new cpu table organization.
849 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
851 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
852 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
853 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
855 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
856 (any_gotrel): New rule.
857 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
858 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
860 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
861 (bfin_pic_ptr): New function.
862 (md_pseudo_table): Add it for ".picptr".
863 (OPTION_FDPIC): New macro.
864 (md_longopts): Add -mfdpic.
865 (md_parse_option): Handle it.
866 (md_begin): Set BFD flags.
867 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
868 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
870 * Makefile.am (bfin-parse.o): Update dependencies.
871 (DEPTC_bfin_elf): Likewise.
872 * Makefile.in: Regenerate.
874 2006-03-25 Richard Sandiford <richard@codesourcery.com>
876 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
877 mcfemac instead of mcfmac.
879 2006-03-23 Michael Matz <matz@suse.de>
881 * config/tc-i386.c (type_names): Correct placement of 'static'.
882 (reloc): Map some more relocs to their 64 bit counterpart when
884 (output_insn): Work around breakage if DEBUG386 is defined.
885 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
886 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
887 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
890 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
892 (md_convert_frag): Jumps can now be larger than 2GB away, error
894 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
895 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
897 2006-03-22 Richard Sandiford <richard@codesourcery.com>
898 Daniel Jacobowitz <dan@codesourcery.com>
899 Phil Edwards <phil@codesourcery.com>
900 Zack Weinberg <zack@codesourcery.com>
901 Mark Mitchell <mark@codesourcery.com>
902 Nathan Sidwell <nathan@codesourcery.com>
904 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
905 (md_begin): Complain about -G being used for PIC. Don't change
906 the text, data and bss alignments on VxWorks.
907 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
908 generating VxWorks PIC.
909 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
910 (macro): Likewise, but do not treat la $25 specially for
911 VxWorks PIC, and do not handle jal.
912 (OPTION_MVXWORKS_PIC): New macro.
913 (md_longopts): Add -mvxworks-pic.
914 (md_parse_option): Don't complain about using PIC and -G together here.
915 Handle OPTION_MVXWORKS_PIC.
916 (md_estimate_size_before_relax): Always use the first relaxation
918 * config/tc-mips.h (VXWORKS_PIC): New.
920 2006-03-21 Paul Brook <paul@codesourcery.com>
922 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
924 2006-03-21 Sterling Augustine <sterling@tensilica.com>
926 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
927 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
928 (get_loop_align_size): New.
929 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
930 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
931 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
932 (get_noop_aligned_address): Use get_loop_align_size.
933 (get_aligned_diff): Likewise.
935 2006-03-21 Paul Brook <paul@codesourcery.com>
937 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
939 2006-03-20 Paul Brook <paul@codesourcery.com>
941 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
942 (do_t_branch): Encode branches inside IT blocks as unconditional.
943 (do_t_cps): New function.
944 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
945 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
946 (opcode_lookup): Allow conditional suffixes on all instructions in
948 (md_assemble): Advance condexec state before checking for errors.
949 (insns): Use do_t_cps.
951 2006-03-20 Paul Brook <paul@codesourcery.com>
953 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
956 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
958 * config/tc-vax.c: Update copyright year.
959 * config/tc-vax.h: Likewise.
961 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
963 * config/tc-vax.c (md_chars_to_number): Used only locally, so
965 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
967 2006-03-17 Paul Brook <paul@codesourcery.com>
969 * config/tc-arm.c (insns): Add ldm and stm.
971 2006-03-17 Ben Elliston <bje@au.ibm.com>
974 * doc/as.texinfo (Ident): Document this directive more thoroughly.
976 2006-03-16 Paul Brook <paul@codesourcery.com>
978 * config/tc-arm.c (insns): Add "svc".
980 2006-03-13 Bob Wilson <bob.wilson@acm.org>
982 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
983 flag and avoid double underscore prefixes.
985 2006-03-10 Paul Brook <paul@codesourcery.com>
987 * config/tc-arm.c (md_begin): Handle EABIv5.
988 (arm_eabis): Add EF_ARM_EABI_VER5.
989 * doc/c-arm.texi: Document -meabi=5.
991 2006-03-10 Ben Elliston <bje@au.ibm.com>
993 * app.c (do_scrub_chars): Simplify string handling.
995 2006-03-07 Richard Sandiford <richard@codesourcery.com>
996 Daniel Jacobowitz <dan@codesourcery.com>
997 Zack Weinberg <zack@codesourcery.com>
998 Nathan Sidwell <nathan@codesourcery.com>
999 Paul Brook <paul@codesourcery.com>
1000 Ricardo Anguiano <anguiano@codesourcery.com>
1001 Phil Edwards <phil@codesourcery.com>
1003 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1004 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1006 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1007 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1008 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1010 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1012 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1013 even when using the text-section-literals option.
1015 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1017 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1019 (m68k_ip): <case 'J'> Check we have some control regs.
1020 (md_parse_option): Allow raw arch switch.
1021 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1022 whether 68881 or cfloat was meant by -mfloat.
1023 (md_show_usage): Adjust extension display.
1024 (m68k_elf_final_processing): Adjust.
1026 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1028 * config/tc-avr.c (avr_mod_hash_value): New function.
1029 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1030 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1031 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1032 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1034 (tc_gen_reloc): Handle substractions of symbols, if possible do
1035 fixups, abort otherwise.
1036 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1037 tc_fix_adjustable): Define.
1039 2006-03-02 James E Wilson <wilson@specifix.com>
1041 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1042 change the template, then clear md.slot[curr].end_of_insn_group.
1044 2006-02-28 Jan Beulich <jbeulich@novell.com>
1046 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1048 2006-02-28 Jan Beulich <jbeulich@novell.com>
1051 * macro.c (getstring): Don't treat parentheses special anymore.
1052 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1053 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1056 2006-02-28 Mat <mat@csail.mit.edu>
1058 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1060 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1062 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1064 (CFI_signal_frame): Define.
1065 (cfi_pseudo_table): Add .cfi_signal_frame.
1066 (dot_cfi): Handle CFI_signal_frame.
1067 (output_cie): Handle cie->signal_frame.
1068 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1069 different. Copy signal_frame from FDE to newly created CIE.
1070 * doc/as.texinfo: Document .cfi_signal_frame.
1072 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1074 * doc/Makefile.am: Add html target.
1075 * doc/Makefile.in: Regenerate.
1076 * po/Make-in: Add html target.
1078 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1080 * config/tc-i386.c (output_insn): Support Intel Merom New
1083 * config/tc-i386.h (CpuMNI): New.
1084 (CpuUnknownFlags): Add CpuMNI.
1086 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1088 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1089 (hpriv_reg_table): New table for hyperprivileged registers.
1090 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1093 2006-02-24 DJ Delorie <dj@redhat.com>
1095 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1096 (tc_gen_reloc): Don't define.
1097 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1098 (OPTION_LINKRELAX): New.
1099 (md_longopts): Add it.
1101 (md_parse_options): Set it.
1102 (md_assemble): Emit relaxation relocs as needed.
1103 (md_convert_frag): Emit relaxation relocs as needed.
1104 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1105 (m32c_apply_fix): New.
1106 (tc_gen_reloc): New.
1107 (m32c_force_relocation): Force out jump relocs when relaxing.
1108 (m32c_fix_adjustable): Return false if relaxing.
1110 2006-02-24 Paul Brook <paul@codesourcery.com>
1112 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1113 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1114 (struct asm_barrier_opt): Define.
1115 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1116 (parse_psr): Accept V7M psr names.
1117 (parse_barrier): New function.
1118 (enum operand_parse_code): Add OP_oBARRIER.
1119 (parse_operands): Implement OP_oBARRIER.
1120 (do_barrier): New function.
1121 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1122 (do_t_cpsi): Add V7M restrictions.
1123 (do_t_mrs, do_t_msr): Validate V7M variants.
1124 (md_assemble): Check for NULL variants.
1125 (v7m_psrs, barrier_opt_names): New tables.
1126 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1127 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1128 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1129 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1130 (struct cpu_arch_ver_table): Define.
1131 (cpu_arch_ver): New.
1132 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1133 Tag_CPU_arch_profile.
1134 * doc/c-arm.texi: Document new cpu and arch options.
1136 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1138 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1140 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1142 * config/tc-ia64.c: Update copyright years.
1144 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1146 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1149 2005-02-22 Paul Brook <paul@codesourcery.com>
1151 * config/tc-arm.c (do_pld): Remove incorrect write to
1153 (encode_thumb32_addr_mode): Use correct operand.
1155 2006-02-21 Paul Brook <paul@codesourcery.com>
1157 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1159 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1160 Anil Paranjape <anilp1@kpitcummins.com>
1161 Shilin Shakti <shilins@kpitcummins.com>
1163 * Makefile.am: Add xc16x related entry.
1164 * Makefile.in: Regenerate.
1165 * configure.in: Added xc16x related entry.
1166 * configure: Regenerate.
1167 * config/tc-xc16x.h: New file
1168 * config/tc-xc16x.c: New file
1169 * doc/c-xc16x.texi: New file for xc16x
1170 * doc/all.texi: Entry for xc16x
1171 * doc/Makefile.texi: Added c-xc16x.texi
1172 * NEWS: Announce the support for the new target.
1174 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1176 * configure.tgt: set emulation for mips-*-netbsd*
1178 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1180 * config.in: Rebuilt.
1182 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1184 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1185 from 1, not 0, in error messages.
1186 (md_assemble): Simplify special-case check for ENTRY instructions.
1187 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1188 operand in error message.
1190 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1192 * configure.tgt (arm-*-linux-gnueabi*): Change to
1195 2006-02-10 Nick Clifton <nickc@redhat.com>
1197 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1198 32-bit value is propagated into the upper bits of a 64-bit long.
1200 * config/tc-arc.c (init_opcode_tables): Fix cast.
1201 (arc_extoper, md_operand): Likewise.
1203 2006-02-09 David Heine <dlheine@tensilica.com>
1205 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1206 each relaxation step.
1208 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1210 * configure.in (CHECK_DECLS): Add vsnprintf.
1211 * configure: Regenerate.
1212 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1213 include/declare here, but...
1214 * as.h: Move code detecting VARARGS idiom to the top.
1215 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1216 (vsnprintf): Declare if not already declared.
1218 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1220 * as.c (close_output_file): New.
1221 (main): Register close_output_file with xatexit before
1222 dump_statistics. Don't call output_file_close.
1224 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1226 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1227 mcf5329_control_regs): New.
1228 (not_current_architecture, selected_arch, selected_cpu): New.
1229 (m68k_archs, m68k_extensions): New.
1230 (archs): Renamed to ...
1231 (m68k_cpus): ... here. Adjust.
1233 (md_pseudo_table): Add arch and cpu directives.
1234 (find_cf_chip, m68k_ip): Adjust table scanning.
1235 (no_68851, no_68881): Remove.
1236 (md_assemble): Lazily initialize.
1237 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1238 (md_init_after_args): Move functionality to m68k_init_arch.
1239 (mri_chip): Adjust table scanning.
1240 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1241 options with saner parsing.
1242 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1243 m68k_init_arch): New.
1244 (s_m68k_cpu, s_m68k_arch): New.
1245 (md_show_usage): Adjust.
1246 (m68k_elf_final_processing): Set CF EF flags.
1247 * config/tc-m68k.h (m68k_init_after_args): Remove.
1248 (tc_init_after_args): Remove.
1249 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1250 (M68k-Directives): Document .arch and .cpu directives.
1252 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1254 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1255 synonyms for equ and defl.
1256 (z80_cons_fix_new): New function.
1257 (emit_byte): Disallow relative jumps to absolute locations.
1258 (emit_data): Only handle defb, prototype changed, because defb is
1259 now handled as pseudo-op rather than an instruction.
1260 (instab): Entries for defb,defw,db,dw moved from here...
1261 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1262 Add entries for def24,def32,d24,d32.
1263 (md_assemble): Improved error handling.
1264 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1265 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1266 (z80_cons_fix_new): Declare.
1267 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1268 (def24,d24,def32,d32): New pseudo-ops.
1270 2006-02-02 Paul Brook <paul@codesourcery.com>
1272 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1274 2005-02-02 Paul Brook <paul@codesourcery.com>
1276 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1277 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1278 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1279 T2_OPCODE_RSB): Define.
1280 (thumb32_negate_data_op): New function.
1281 (md_apply_fix): Use it.
1283 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1285 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1287 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1288 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1290 (relaxation_requirements): Add pfinish_frag argument and use it to
1291 replace setting tinsn->record_fix fields.
1292 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1293 and vinsn_to_insnbuf. Remove references to record_fix and
1294 slot_sub_symbols fields.
1295 (xtensa_mark_narrow_branches): Delete unused code.
1296 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1298 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1300 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1301 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1302 of the record_fix field. Simplify error messages for unexpected
1304 (set_expr_symbol_offset_diff): Delete.
1306 2006-01-31 Paul Brook <paul@codesourcery.com>
1308 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1310 2006-01-31 Paul Brook <paul@codesourcery.com>
1311 Richard Earnshaw <rearnsha@arm.com>
1313 * config/tc-arm.c: Use arm_feature_set.
1314 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1315 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1316 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1319 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1320 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1321 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1322 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1324 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1325 (arm_opts): Move old cpu/arch options from here...
1326 (arm_legacy_opts): ... to here.
1327 (md_parse_option): Search arm_legacy_opts.
1328 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1329 (arm_float_abis, arm_eabis): Make const.
1331 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1333 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1335 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1337 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1338 in load immediate intruction.
1340 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1342 * config/bfin-parse.y (value_match): Use correct conversion
1343 specifications in template string for __FILE__ and __LINE__.
1347 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1349 Introduce TLS descriptors for i386 and x86_64.
1350 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1351 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1352 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1353 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1354 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1356 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1357 (lex_got): Handle @tlsdesc and @tlscall.
1358 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1360 2006-01-11 Nick Clifton <nickc@redhat.com>
1362 Fixes for building on 64-bit hosts:
1363 * config/tc-avr.c (mod_index): New union to allow conversion
1364 between pointers and integers.
1365 (md_begin, avr_ldi_expression): Use it.
1366 * config/tc-i370.c (md_assemble): Add cast for argument to print
1368 * config/tc-tic54x.c (subsym_substitute): Likewise.
1369 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1370 opindex field of fr_cgen structure into a pointer so that it can
1371 be stored in a frag.
1372 * config/tc-mn10300.c (md_assemble): Likewise.
1373 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1375 * config/tc-v850.c: Replace uses of (int) casts with correct
1378 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1381 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1383 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1386 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1387 a local-label reference.
1389 For older changes see ChangeLog-2005
1395 version-control: never
projects / deliverable / binutils-gdb.git / blob