gas/ChangeLog

   1 2006-05-02  Paul Brook  <paul@codesourcery.com>
   2
   3         * config/tc-arm.c (arm_optimize_expr): New function.
   4         * config/tc-arm.h (md_optimize_expr): Define
   5         (arm_optimize_expr): Add prototype.
   6         (TC_FORCE_RELOCATION_SUB_SAME): Define.
   7
   8 2006-05-02  Ben Elliston  <bje@au.ibm.com>
   9
  10         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
  11         field unsigned.
  12
  13         * sb.h (sb_list_vector): Move to sb.c.
  14         * sb.c (free_list): Use type of sb_list_vector directly.
  15         (sb_build): Fix off-by-one error in assertion about `size'.
  16
  17 2006-05-01  Ben Elliston  <bje@au.ibm.com>
  18
  19         * listing.c (listing_listing): Remove useless loop.
  20         * macro.c (macro_expand): Remove is_positional local variable.
  21         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
  22         and simplify surrounding expressions, where possible.
  23         (assign_symbol): Likewise.
  24         (s_weakref): Likewise.
  25         * symbols.c (colon): Likewise.
  26
  27 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
  28
  29         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
  30
  31 2006-04-30  Thiemo Seufer  <ths@mips.com>
  32             David Ung  <davidu@mips.com>
  33
  34         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
  35         (mips_immed): New table that records various handling of udi
  36         instruction patterns.
  37         (mips_ip): Adds udi handling.
  38
  39 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
  40
  41         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
  42         of list rather than beginning.
  43
  44 2006-04-26  Julian Brown  <julian@codesourcery.com>
  45
  46         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
  47         (is_quarter_float): Rename from above. Simplify slightly.
  48         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
  49         number.
  50         (parse_neon_mov): Parse floating-point constants.
  51         (neon_qfloat_bits): Fix encoding.
  52         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
  53         preference to integer encoding when using the F32 type.
  54
  55 2006-04-26  Julian Brown  <julian@codesourcery.com>
  56
  57         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
  58         zero-initialising structures containing it will lead to invalid types).
  59         (arm_it): Add vectype to each operand.
  60         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
  61         defined field.
  62         (neon_typed_alias): New structure. Extra information for typed
  63         register aliases.
  64         (reg_entry): Add neon type info field.
  65         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
  66         Break out alternative syntax for coprocessor registers, etc. into...
  67         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
  68         out from arm_reg_parse.
  69         (parse_neon_type): Move. Return SUCCESS/FAIL.
  70         (first_error): New function. Call to ensure first error which occurs is
  71         reported.
  72         (parse_neon_operand_type): Parse exactly one type.
  73         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
  74         (parse_typed_reg_or_scalar): New function. Handle core of both
  75         arm_typed_reg_parse and parse_scalar.
  76         (arm_typed_reg_parse): Parse a register with an optional type.
  77         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
  78         result.
  79         (parse_scalar): Parse a Neon scalar with optional type.
  80         (parse_reg_list): Use first_error.
  81         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
  82         (neon_alias_types_same): New function. Return true if two (alias) types
  83         are the same.
  84         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
  85         of elements.
  86         (insert_reg_alias): Return new reg_entry not void.
  87         (insert_neon_reg_alias): New function. Insert type/index information as
  88         well as register for alias.
  89         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
  90         make typed register aliases accordingly.
  91         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
  92         of line.
  93         (s_unreq): Delete type information if present.
  94         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
  95         (s_arm_unwind_save_mmxwcg): Likewise.
  96         (s_arm_unwind_movsp): Likewise.
  97         (s_arm_unwind_setfp): Likewise.
  98         (parse_shift): Likewise.
  99         (parse_shifter_operand): Likewise.
 100         (parse_address): Likewise.
 101         (parse_tb): Likewise.
 102         (tc_arm_regname_to_dw2regnum): Likewise.
 103         (md_pseudo_table): Add dn, qn.
 104         (parse_neon_mov): Handle typed operands.
 105         (parse_operands): Likewise.
 106         (neon_type_mask): Add N_SIZ.
 107         (N_ALLMODS): New macro.
 108         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 109         (el_type_of_type_chk): Add some safeguards.
 110         (modify_types_allowed): Fix logic bug.
 111         (neon_check_type): Handle operands with types.
 112         (neon_three_same): Remove redundant optional arg handling.
 113         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 114         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 115         (do_neon_step): Adjust accordingly.
 116         (neon_cmode_for_logic_imm): Use first_error.
 117         (do_neon_bitfield): Call neon_check_type.
 118         (neon_dyadic): Rename to...
 119         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 120         to allow modification of type of the destination.
 121         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 122         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 123         (do_neon_compare): Make destination be an untyped bitfield.
 124         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 125         (neon_mul_mac): Return early in case of errors.
 126         (neon_move_immediate): Use first_error.
 127         (neon_mac_reg_scalar_long): Fix type to include scalar.
 128         (do_neon_dup): Likewise.
 129         (do_neon_mov): Likewise (in several places).
 130         (do_neon_tbl_tbx): Fix type.
 131         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 132         (do_neon_ld_dup): Exit early in case of errors and/or use
 133         first_error.
 134         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 135         Handle .dn/.qn directives.
 136         (REGDEF): Add zero for reg_entry neon field.
 137
 138 2006-04-26  Julian Brown  <julian@codesourcery.com>
 139
 140         * config/tc-arm.c (limits.h): Include.
 141         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 142         (fpu_vfp_v3_or_neon_ext): Declare constants.
 143         (neon_el_type): New enumeration of types for Neon vector elements.
 144         (neon_type_el): New struct. Define type and size of a vector element.
 145         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 146         instruction.
 147         (neon_type): Define struct. The type of an instruction.
 148         (arm_it): Add 'vectype' for the current instruction.
 149         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 150         (vfp_sp_reg_pos): Rename to...
 151         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 152         tags.
 153         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 154         (Neon D or Q register).
 155         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 156         register.
 157         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 158         (my_get_expression): Allow above constant as argument to accept
 159         64-bit constants with optional prefix.
 160         (arm_reg_parse): Add extra argument to return the specific type of
 161         register in when either a D or Q register (REG_TYPE_NDQ) is
 162         requested. Can be NULL.
 163         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 164         (parse_reg_list): Update for new arm_reg_parse args.
 165         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 166         (parse_neon_el_struct_list): New function. Parse element/structure
 167         register lists for VLD<n>/VST<n> instructions.
 168         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 169         (s_arm_unwind_save_mmxwr): Likewise.
 170         (s_arm_unwind_save_mmxwcg): Likewise.
 171         (s_arm_unwind_movsp): Likewise.
 172         (s_arm_unwind_setfp): Likewise.
 173         (parse_big_immediate): New function. Parse an immediate, which may be
 174         64 bits wide. Put results in inst.operands[i].
 175         (parse_shift): Update for new arm_reg_parse args.
 176         (parse_address): Likewise. Add parsing of alignment specifiers.
 177         (parse_neon_mov): Parse the operands of a VMOV instruction.
 178         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 179         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 180         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 181         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 182         (parse_operands): Handle new codes above.
 183         (encode_arm_vfp_sp_reg): Rename to...
 184         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 185         selected VFP version only supports D0-D15.
 186         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 187         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 188         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 189         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 190         encode_arm_vfp_reg name, and allow 32 D regs.
 191         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 192         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 193         regs.
 194         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 195         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 196         constant-load and conversion insns introduced with VFPv3.
 197         (neon_tab_entry): New struct.
 198         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 199         those which are the targets of pseudo-instructions.
 200         (neon_opc): Enumerate opcodes, use as indices into...
 201         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 202         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 203         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 204         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 205         neon_enc_tab.
 206         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 207         Neon instructions.
 208         (neon_type_mask): New. Compact type representation for type checking.
 209         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 210         permitted type combinations.
 211         (N_IGNORE_TYPE): New macro.
 212         (neon_check_shape): New function. Check an instruction shape for
 213         multiple alternatives. Return the specific shape for the current
 214         instruction.
 215         (neon_modify_type_size): New function. Modify a vector type and size,
 216         depending on the bit mask in argument 1.
 217         (neon_type_promote): New function. Convert a given "key" type (of an
 218         operand) into the correct type for a different operand, based on a bit
 219         mask.
 220         (type_chk_of_el_type): New function. Convert a type and size into the
 221         compact representation used for type checking.
 222         (el_type_of_type_ckh): New function. Reverse of above (only when a
 223         single bit is set in the bit mask).
 224         (modify_types_allowed): New function. Alter a mask of allowed types
 225         based on a bit mask of modifications.
 226         (neon_check_type): New function. Check the type of the current
 227         instruction against the variable argument list. The "key" type of the
 228         instruction is returned.
 229         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 230         a Neon data-processing instruction depending on whether we're in ARM
 231         mode or Thumb-2 mode.
 232         (neon_logbits): New function.
 233         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 234         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 235         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 236         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 237         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 238         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 239         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 240         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 241         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 242         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 243         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 244         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 245         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 246         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 247         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 248         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 249         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 250         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 251         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 252         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 253         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 254         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 255         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 256         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 257         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 258         helpers.
 259         (parse_neon_type): New function. Parse Neon type specifier.
 260         (opcode_lookup): Allow parsing of Neon type specifiers.
 261         (REGNUM2, REGSETH, REGSET2): New macros.
 262         (reg_names): Add new VFPv3 and Neon registers.
 263         (NUF, nUF, NCE, nCE): New macros for opcode table.
 264         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 265         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 266         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 267         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 268         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 269         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 270         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 271         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 272         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 273         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 274         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 275         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 276         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 277         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 278         fto[us][lh][sd].
 279         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 280         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 281         (arm_option_cpu_value): Add vfp3 and neon.
 282         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 283         VFPv1 attribute.
 284
 285 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 286
 287         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 288         syntax instead of hardcoded opcodes with ".w18" suffixes.
 289         (wide_branch_opcode): New.
 290         (build_transition): Use it to check for wide branch opcodes with
 291         either ".w18" or ".w15" suffixes.
 292
 293 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 294
 295         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 296         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 297         frag's is_literal flag.
 298
 299 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 300
 301         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 302
 303 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 304
 305         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 306         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 307         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 308         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 309         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 310
 311 2005-04-20  Paul Brook  <paul@codesourcery.com>
 312
 313         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 314         all targets.
 315         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 316
 317 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 318
 319         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 320         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 321         Make some cpus unsupported on ELF.  Run "make dep-am".
 322         * Makefile.in: Regenerate.
 323
 324 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 325
 326         * configure.in (--enable-targets): Indent help message.
 327         * configure: Regenerate.
 328
 329 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 330
 331         PR gas/2533
 332         * config/tc-i386.c (i386_immediate): Check illegal immediate
 333         register operand.
 334
 335 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 336
 337         * config/tc-i386.c: Formatting.
 338         (output_disp, output_imm): ISO C90 params.
 339
 340         * frags.c (frag_offset_fixed_p): Constify args.
 341         * frags.h (frag_offset_fixed_p): Ditto.
 342
 343         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 344         (COFF_MAGIC): Delete.
 345
 346         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 347
 348 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 349
 350         * po/POTFILES.in: Regenerated.
 351
 352 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 353
 354         * doc/as.texinfo: Mention that some .type syntaxes are not
 355         supported on all architectures.
 356
 357 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 358
 359         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 360         instructions when such transformations have been disabled.
 361
 362 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 363
 364         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 365         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 366         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 367         decoding the loop instructions.  Remove current_offset variable.
 368         (xtensa_fix_short_loop_frags): Likewise.
 369         (min_bytes_to_other_loop_end): Remove current_offset argument.
 370
 371 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 372
 373         * config/tc-z80.c (z80_optimize_expr): Removed.
 374         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 375
 376 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 377
 378         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 379         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 380         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 381         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 382         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 383         at90can64, at90usb646, at90usb647, at90usb1286 and
 384         at90usb1287.
 385         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 386
 387 2006-04-07  Paul Brook  <paul@codesourcery.com>
 388
 389         * config/tc-arm.c (parse_operands): Set default error message.
 390
 391 2006-04-07  Paul Brook  <paul@codesourcery.com>
 392
 393         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 394
 395 2006-04-07  Paul Brook  <paul@codesourcery.com>
 396
 397         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 398
 399 2006-04-07  Paul Brook  <paul@codesourcery.com>
 400
 401         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 402         (move_or_literal_pool): Handle Thumb-2 instructions.
 403         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 404
 405 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 406
 407         PR 2512.
 408         * config/tc-i386.c (match_template): Move 64-bit operand tests
 409         inside loop.
 410
 411 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 412
 413         * po/Make-in: Add install-html target.
 414         * Makefile.am: Add install-html and install-html-recursive targets.
 415         * Makefile.in: Regenerate.
 416         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 417         * configure: Regenerate.
 418         * doc/Makefile.am: Add install-html and install-html-am targets.
 419         * doc/Makefile.in: Regenerate.
 420
 421 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 422
 423         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 424         second scan.
 425
 426 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 427             Daniel Jacobowitz  <dan@codesourcery.com>
 428
 429         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 430         (GOTT_BASE, GOTT_INDEX): New.
 431         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 432         GOTT_INDEX when generating VxWorks PIC.
 433         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 434         use the generic *-*-vxworks* stanza instead.
 435
 436 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 437
 438         PR 997
 439         * frags.c (frag_offset_fixed_p): New function.
 440         * frags.h (frag_offset_fixed_p): Declare.
 441         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 442         (resolve_expression): Likewise.
 443
 444 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 445
 446         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 447         of the same length but different numbers of slots.
 448
 449 2006-03-30  Andreas Schwab  <schwab@suse.de>
 450
 451         * configure.in: Fix help string for --enable-targets option.
 452         * configure: Regenerate.
 453
 454 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 455
 456         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 457         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 458         overrun and avoid excessive copying.
 459
 460         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 461         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 462         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 463         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 464         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 465         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 466         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 467         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 468         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 469         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 470         (struct m68k_cpu): Change chip field to control_regs.
 471         (current_chip): Remove.
 472         (control_regs): New.
 473         (m68k_archs, m68k_extensions): Adjust.
 474         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 475         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 476         (find_cf_chip): Reimplement for new organization of cpu table.
 477         (select_control_regs): Remove.
 478         (mri_chip): Adjust.
 479         (struct save_opts): Save control regs, not chip.
 480         (s_save, s_restore): Adjust.
 481         (m68k_lookup_cpu): Give deprecated warning when necessary.
 482         (m68k_init_arch): Adjust.
 483         (md_show_usage): Adjust for new cpu table organization.
 484
 485 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 486
 487         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 488         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 489         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 490         "elf/bfin.h".
 491         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 492         (any_gotrel): New rule.
 493         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 494         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 495         "elf/bfin.h".
 496         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 497         (bfin_pic_ptr): New function.
 498         (md_pseudo_table): Add it for ".picptr".
 499         (OPTION_FDPIC): New macro.
 500         (md_longopts): Add -mfdpic.
 501         (md_parse_option): Handle it.
 502         (md_begin): Set BFD flags.
 503         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 504         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 505         us for GOT relocs.
 506         * Makefile.am (bfin-parse.o): Update dependencies.
 507         (DEPTC_bfin_elf): Likewise.
 508         * Makefile.in: Regenerate.
 509
 510 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 511
 512         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 513         mcfemac instead of mcfmac.
 514
 515 2006-03-23  Michael Matz  <matz@suse.de>
 516
 517         * config/tc-i386.c (type_names): Correct placement of 'static'.
 518         (reloc): Map some more relocs to their 64 bit counterpart when
 519         size is 8.
 520         (output_insn): Work around breakage if DEBUG386 is defined.
 521         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 522         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 523         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 524         different from i386.
 525         (output_imm): Ditto.
 526         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 527         Imm64.
 528         (md_convert_frag): Jumps can now be larger than 2GB away, error
 529         out in that case.
 530         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 531         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 532
 533 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 534             Daniel Jacobowitz  <dan@codesourcery.com>
 535             Phil Edwards  <phil@codesourcery.com>
 536             Zack Weinberg  <zack@codesourcery.com>
 537             Mark Mitchell  <mark@codesourcery.com>
 538             Nathan Sidwell  <nathan@codesourcery.com>
 539
 540         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 541         (md_begin): Complain about -G being used for PIC.  Don't change
 542         the text, data and bss alignments on VxWorks.
 543         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 544         generating VxWorks PIC.
 545         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 546         (macro): Likewise, but do not treat la $25 specially for
 547         VxWorks PIC, and do not handle jal.
 548         (OPTION_MVXWORKS_PIC): New macro.
 549         (md_longopts): Add -mvxworks-pic.
 550         (md_parse_option): Don't complain about using PIC and -G together here.
 551         Handle OPTION_MVXWORKS_PIC.
 552         (md_estimate_size_before_relax): Always use the first relaxation
 553         sequence on VxWorks.
 554         * config/tc-mips.h (VXWORKS_PIC): New.
 555
 556 2006-03-21  Paul Brook  <paul@codesourcery.com>
 557
 558         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 559
 560 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 561
 562         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 563         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 564         (get_loop_align_size): New.
 565         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 566         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 567         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 568         (get_noop_aligned_address): Use get_loop_align_size.
 569         (get_aligned_diff): Likewise.
 570
 571 2006-03-21  Paul Brook  <paul@codesourcery.com>
 572
 573         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 574
 575 2006-03-20  Paul Brook  <paul@codesourcery.com>
 576
 577         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 578         (do_t_branch): Encode branches inside IT blocks as unconditional.
 579         (do_t_cps): New function.
 580         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 581         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 582         (opcode_lookup): Allow conditional suffixes on all instructions in
 583         Thumb mode.
 584         (md_assemble): Advance condexec state before checking for errors.
 585         (insns): Use do_t_cps.
 586
 587 2006-03-20  Paul Brook  <paul@codesourcery.com>
 588
 589         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 590         outputting the insn.
 591
 592 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 593
 594         * config/tc-vax.c: Update copyright year.
 595         * config/tc-vax.h: Likewise.
 596
 597 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 598
 599         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 600         make it static.
 601         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 602
 603 2006-03-17  Paul Brook  <paul@codesourcery.com>
 604
 605         * config/tc-arm.c (insns): Add ldm and stm.
 606
 607 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 608
 609         PR gas/2446
 610         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 611
 612 2006-03-16  Paul Brook  <paul@codesourcery.com>
 613
 614         * config/tc-arm.c (insns): Add "svc".
 615
 616 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 617
 618         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 619         flag and avoid double underscore prefixes.
 620
 621 2006-03-10  Paul Brook  <paul@codesourcery.com>
 622
 623         * config/tc-arm.c (md_begin): Handle EABIv5.
 624         (arm_eabis): Add EF_ARM_EABI_VER5.
 625         * doc/c-arm.texi: Document -meabi=5.
 626
 627 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 628
 629         * app.c (do_scrub_chars): Simplify string handling.
 630
 631 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 632             Daniel Jacobowitz  <dan@codesourcery.com>
 633             Zack Weinberg  <zack@codesourcery.com>
 634             Nathan Sidwell  <nathan@codesourcery.com>
 635             Paul Brook  <paul@codesourcery.com>
 636             Ricardo Anguiano  <anguiano@codesourcery.com>
 637             Phil Edwards  <phil@codesourcery.com>
 638
 639         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 640         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 641         R_ARM_ABS12 reloc.
 642         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 643         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 644         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 645
 646 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 647
 648         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 649         even when using the text-section-literals option.
 650
 651 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 652
 653         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 654         and cf.
 655         (m68k_ip): <case 'J'> Check we have some control regs.
 656         (md_parse_option): Allow raw arch switch.
 657         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 658         whether 68881 or cfloat was meant by -mfloat.
 659         (md_show_usage): Adjust extension display.
 660         (m68k_elf_final_processing): Adjust.
 661
 662 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 663
 664         * config/tc-avr.c (avr_mod_hash_value): New function.
 665         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 666         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 667         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 668         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 669         of (int).
 670         (tc_gen_reloc): Handle substractions of symbols, if possible do
 671         fixups, abort otherwise.
 672         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 673         tc_fix_adjustable): Define.
 674
 675 2006-03-02  James E Wilson  <wilson@specifix.com>
 676
 677         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 678         change the template, then clear md.slot[curr].end_of_insn_group.
 679
 680 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 681
 682         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 683
 684 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 685
 686         PR/1070
 687         * macro.c (getstring): Don't treat parentheses special anymore.
 688         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 689         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 690         characters.
 691
 692 2006-02-28  Mat <mat@csail.mit.edu>
 693
 694         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 695
 696 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 697
 698         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 699         field.
 700         (CFI_signal_frame): Define.
 701         (cfi_pseudo_table): Add .cfi_signal_frame.
 702         (dot_cfi): Handle CFI_signal_frame.
 703         (output_cie): Handle cie->signal_frame.
 704         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 705         different.  Copy signal_frame from FDE to newly created CIE.
 706         * doc/as.texinfo: Document .cfi_signal_frame.
 707
 708 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 709
 710         * doc/Makefile.am: Add html target.
 711         * doc/Makefile.in: Regenerate.
 712         * po/Make-in: Add html target.
 713
 714 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 715
 716         * config/tc-i386.c (output_insn): Support Intel Merom New
 717         Instructions.
 718
 719         * config/tc-i386.h (CpuMNI): New.
 720         (CpuUnknownFlags): Add CpuMNI.
 721
 722 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 723
 724         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 725         (hpriv_reg_table): New table for hyperprivileged registers.
 726         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 727         register encoding.
 728
 729 2006-02-24  DJ Delorie  <dj@redhat.com>
 730
 731         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 732         (tc_gen_reloc): Don't define.
 733         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 734         (OPTION_LINKRELAX): New.
 735         (md_longopts): Add it.
 736         (m32c_relax): New.
 737         (md_parse_options): Set it.
 738         (md_assemble): Emit relaxation relocs as needed.
 739         (md_convert_frag): Emit relaxation relocs as needed.
 740         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 741         (m32c_apply_fix): New.
 742         (tc_gen_reloc): New.
 743         (m32c_force_relocation): Force out jump relocs when relaxing.
 744         (m32c_fix_adjustable): Return false if relaxing.
 745
 746 2006-02-24  Paul Brook  <paul@codesourcery.com>
 747
 748         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 749         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 750         (struct asm_barrier_opt): Define.
 751         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 752         (parse_psr): Accept V7M psr names.
 753         (parse_barrier): New function.
 754         (enum operand_parse_code): Add OP_oBARRIER.
 755         (parse_operands): Implement OP_oBARRIER.
 756         (do_barrier): New function.
 757         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 758         (do_t_cpsi): Add V7M restrictions.
 759         (do_t_mrs, do_t_msr): Validate V7M variants.
 760         (md_assemble): Check for NULL variants.
 761         (v7m_psrs, barrier_opt_names): New tables.
 762         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 763         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 764         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 765         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 766         (struct cpu_arch_ver_table): Define.
 767         (cpu_arch_ver): New.
 768         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 769         Tag_CPU_arch_profile.
 770         * doc/c-arm.texi: Document new cpu and arch options.
 771
 772 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 773
 774         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 775
 776 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 777
 778         * config/tc-ia64.c: Update copyright years.
 779
 780 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 781
 782         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 783         SDM 2.2.
 784
 785 2005-02-22  Paul Brook  <paul@codesourcery.com>
 786
 787         * config/tc-arm.c (do_pld): Remove incorrect write to
 788         inst.instruction.
 789         (encode_thumb32_addr_mode): Use correct operand.
 790
 791 2006-02-21  Paul Brook  <paul@codesourcery.com>
 792
 793         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 794
 795 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 796             Anil Paranjape   <anilp1@kpitcummins.com>
 797             Shilin Shakti    <shilins@kpitcummins.com>
 798
 799         * Makefile.am: Add xc16x related entry.
 800         * Makefile.in: Regenerate.
 801         * configure.in: Added xc16x related entry.
 802         * configure: Regenerate.
 803         * config/tc-xc16x.h: New file
 804         * config/tc-xc16x.c: New file
 805         * doc/c-xc16x.texi: New file for xc16x
 806         * doc/all.texi: Entry for xc16x
 807         * doc/Makefile.texi: Added c-xc16x.texi
 808         * NEWS: Announce the support for the new target.
 809
 810 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 811
 812         * configure.tgt: set emulation for mips-*-netbsd*
 813
 814 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 815
 816         * config.in: Rebuilt.
 817
 818 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 819
 820         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 821         from 1, not 0, in error messages.
 822         (md_assemble): Simplify special-case check for ENTRY instructions.
 823         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 824         operand in error message.
 825
 826 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 827
 828         * configure.tgt (arm-*-linux-gnueabi*): Change to
 829         arm-*-linux-*eabi*.
 830
 831 2006-02-10  Nick Clifton  <nickc@redhat.com>
 832
 833         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 834         32-bit value is propagated into the upper bits of a 64-bit long.
 835
 836         * config/tc-arc.c (init_opcode_tables): Fix cast.
 837         (arc_extoper, md_operand): Likewise.
 838
 839 2006-02-09  David Heine  <dlheine@tensilica.com>
 840
 841         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
 842         each relaxation step.
 843
 844 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
 845
 846         * configure.in (CHECK_DECLS): Add vsnprintf.
 847         * configure: Regenerate.
 848         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
 849         include/declare here, but...
 850         * as.h: Move code detecting VARARGS idiom to the top.
 851         (errno.h, stdarg.h, varargs.h, va_list): ...here.
 852         (vsnprintf): Declare if not already declared.
 853
 854 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 855
 856         * as.c (close_output_file): New.
 857         (main): Register close_output_file with xatexit before
 858         dump_statistics. Don't call output_file_close.
 859
 860 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 861
 862         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
 863         mcf5329_control_regs): New.
 864         (not_current_architecture, selected_arch, selected_cpu): New.
 865         (m68k_archs, m68k_extensions): New.
 866         (archs): Renamed to ...
 867         (m68k_cpus): ... here.  Adjust.
 868         (n_arches): Remove.
 869         (md_pseudo_table): Add arch and cpu directives.
 870         (find_cf_chip, m68k_ip): Adjust table scanning.
 871         (no_68851, no_68881): Remove.
 872         (md_assemble): Lazily initialize.
 873         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
 874         (md_init_after_args): Move functionality to m68k_init_arch.
 875         (mri_chip): Adjust table scanning.
 876         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
 877         options with saner parsing.
 878         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
 879         m68k_init_arch): New.
 880         (s_m68k_cpu, s_m68k_arch): New.
 881         (md_show_usage): Adjust.
 882         (m68k_elf_final_processing): Set CF EF flags.
 883         * config/tc-m68k.h (m68k_init_after_args): Remove.
 884         (tc_init_after_args): Remove.
 885         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
 886         (M68k-Directives): Document .arch and .cpu directives.
 887
 888 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
 889
 890         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
 891         synonyms for equ and defl.
 892         (z80_cons_fix_new): New function.
 893         (emit_byte): Disallow relative jumps to absolute locations.
 894         (emit_data): Only handle defb, prototype changed, because defb is
 895         now handled as pseudo-op rather than an instruction.
 896         (instab): Entries for defb,defw,db,dw moved from here...
 897         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
 898         Add entries for def24,def32,d24,d32.
 899         (md_assemble): Improved error handling.
 900         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
 901         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
 902         (z80_cons_fix_new): Declare.
 903         * doc/c-z80.texi (defb, db): Mention warning on overflow.
 904         (def24,d24,def32,d32): New pseudo-ops.
 905
 906 2006-02-02  Paul Brook  <paul@codesourcery.com>
 907
 908         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
 909
 910 2005-02-02  Paul Brook  <paul@codesourcery.com>
 911
 912         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
 913         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
 914         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
 915         T2_OPCODE_RSB): Define.
 916         (thumb32_negate_data_op): New function.
 917         (md_apply_fix): Use it.
 918
 919 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
 920
 921         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
 922         fields.
 923         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
 924         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
 925         subtracted symbols.
 926         (relaxation_requirements): Add pfinish_frag argument and use it to
 927         replace setting tinsn->record_fix fields.
 928         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
 929         and vinsn_to_insnbuf.  Remove references to record_fix and
 930         slot_sub_symbols fields.
 931         (xtensa_mark_narrow_branches): Delete unused code.
 932         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
 933         a symbol.
 934         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
 935         record_fix fields.
 936         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
 937         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
 938         of the record_fix field.  Simplify error messages for unexpected
 939         symbolic operands.
 940         (set_expr_symbol_offset_diff): Delete.
 941
 942 2006-01-31  Paul Brook  <paul@codesourcery.com>
 943
 944         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
 945
 946 2006-01-31  Paul Brook  <paul@codesourcery.com>
 947         Richard Earnshaw <rearnsha@arm.com>
 948
 949         * config/tc-arm.c: Use arm_feature_set.
 950         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
 951         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
 952         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
 953         New variables.
 954         (insns): Use them.
 955         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
 956         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
 957         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
 958         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
 959         feature flags.
 960         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
 961         (arm_opts): Move old cpu/arch options from here...
 962         (arm_legacy_opts): ... to here.
 963         (md_parse_option): Search arm_legacy_opts.
 964         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
 965         (arm_float_abis, arm_eabis): Make const.
 966
 967 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
 968
 969         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
 970
 971 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 972
 973         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
 974         in load immediate intruction.
 975
 976 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 977
 978         * config/bfin-parse.y (value_match): Use correct conversion
 979         specifications in template string for __FILE__ and __LINE__.
 980         (binary): Ditto.
 981         (unary): Ditto.
 982
 983 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
 984
 985         Introduce TLS descriptors for i386 and x86_64.
 986         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
 987         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
 988         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
 989         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
 990         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
 991         displacement bits.
 992         (build_modrm_byte): Set up zero modrm for TLS desc calls.
 993         (lex_got): Handle @tlsdesc and @tlscall.
 994         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
 995
 996 2006-01-11  Nick Clifton  <nickc@redhat.com>
 997
 998         Fixes for building on 64-bit hosts:
 999         * config/tc-avr.c (mod_index): New union to allow conversion
1000         between pointers and integers.
1001         (md_begin, avr_ldi_expression): Use it.
1002         * config/tc-i370.c (md_assemble): Add cast for argument to print
1003         statement.
1004         * config/tc-tic54x.c (subsym_substitute): Likewise.
1005         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1006         opindex field of fr_cgen structure into a pointer so that it can
1007         be stored in a frag.
1008         * config/tc-mn10300.c (md_assemble): Likewise.
1009         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1010         types.
1011         * config/tc-v850.c: Replace uses of (int) casts with correct
1012         types.
1013
1014 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1015
1016         PR gas/2117
1017         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1018
1019 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1020
1021         PR gas/2101
1022         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1023         a local-label reference.
1024
1025 For older changes see ChangeLog-2005
1026 \f
1027 Local Variables:
1028 mode: change-log
1029 left-margin: 8
1030 fill-column: 74
1031 version-control: never
1032 End: