Add support for armv7ve to gas.
[deliverable/binutils-gdb.git] / gas / ChangeLog
1 2013-11-18 Renlin Li <Renlin.Li@arm.com>
2
3 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
4 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
5 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
6 (cpu_arch_ver): Likewise.
7 * doc/c-arm.texi: Document armv7ve.
8
9 2013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
10
11 * config/tc-aarch64.c (parse_sys_reg): Support
12 S2_<op1>_<Cn>_<Cm>_<op2>.
13
14 2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
15
16 Revert
17
18 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
19
20 * config/tc-aarch64.c (set_other_error): New function.
21 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
22 the variable to which it points with 'o'.
23 (parse_operands): Update; check for write to read-only system
24 registers or read from write-only ones.
25
26 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
27
28 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
29 indicate if instruction has the BND prefix. Return
30 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
31 bnd_prefix isn't zero.
32 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
33 if needed.
34 (output_jump): Update reloc call.
35 (output_interseg_jump): Likewise.
36 (output_disp): Likewise.
37 (output_imm): Likewise.
38 (x86_cons_fix_new): Likewise.
39 (lex_got): Add an argument, bnd_prefix, to indicate if
40 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
41 if needed.
42 (x86_cons): Update lex_got call.
43 (i386_immediate): Likewise.
44 (i386_displacement): Likewise.
45 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
46 BFD_RELOC_X86_64_PLT32_BND.
47 (tc_gen_reloc): Likewise.
48 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
49
50 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
51
52 * config/tc-aarch64.c (set_other_error): New function.
53 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
54 the variable to which it points with 'o'.
55 (parse_operands): Update; check for write to read-only system
56 registers or read from write-only ones.
57
58 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
59
60 * config/tc-i386.c (check_VecOperands): Reorder checks.
61
62 2013-11-11 Catherine Moore <clm@codesourcery.com>
63
64 * config/mips/tc-mips.c (convert_reg_type): Use
65 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
66 (reg_needs_delay): Likewise.
67 (insns_between): Likewise.
68
69 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
70
71 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
72
73 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
74
75 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
76 call aarch64_sys_reg_deprecated_p and warn about the deprecated
77 system registers.
78
79 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
80
81 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
82
83 2013-11-05 Will Newton <will.newton@linaro.org>
84
85 PR gas/16103
86 * config/tc-aarch64.c (parse_operands): Avoid trying to
87 parse a vector register as an immediate.
88
89 2013-11-04 Jan Beulich <jbeulich@suse.com>
90
91 * config/tc-i386.c (check_long_reg): Correct comment indentation.
92 (check_qword_reg): Correct comment and its indentation.
93 (check_word_reg): Extend comment and correct its indentation. Also
94 check for 64-bit register.
95
96 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
97
98 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
99 (ppc_elf_localentry): New function.
100 (ppc_force_relocation): Force relocs on all branches to localenty
101 symbols.
102 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
103
104 2013-10-30 Alan Modra <amodra@gmail.com>
105
106 * config/tc-ppc.c: Include elf/ppc64.h.
107 (ppc_abiversion): New variable.
108 (md_pseudo_table): Add .abiversion.
109 (ppc_elf_abiversion, ppc_elf_end): New functions.
110 * config/tc-ppc.h (md_end): Define.
111
112 2013-10-30 Alan Modra <amodra@gmail.com>
113
114 * config/tc-ppc.c (SEX16): Don't mask.
115 (REPORT_OVERFLOW_HI): Define as zero.
116 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
117 @tprel@high, and @tprel@higha modifiers.
118 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
119 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
120 Handle new relocs.
121 (md_apply_fix): Similarly.
122
123 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
124
125 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
126 (fpr_write_mask): Test MSA registers.
127 (can_swap_branch_p): Check fpr write followed by fpr read.
128
129 2013-10-18 Nick Clifton <nickc@redhat.com>
130
131 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
132
133 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
134 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
135
136 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
137 (md_longopts): Add mmsa and mno-msa.
138 (mips_ases): Add msa.
139 (RTYPE_MASK): Update.
140 (RTYPE_MSA): New define.
141 (OT_REG_ELEMENT): Replace with...
142 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
143 (mips_operand_token): Replace reg_element with index.
144 (mips_parse_argument_token): Treat vector indices as separate tokens.
145 Handle register indices.
146 (md_begin): Add MSA register names.
147 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
148 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
149 (match_mdmx_imm_reg_operand): Update accordingly.
150 (match_imm_index_operand): New function.
151 (match_reg_index_operand): New function.
152 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
153 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
154 (md_show_usage): Print -mmsa and -mno-msa.
155 * doc/as.texinfo: Document -mmsa and -mno-msa.
156 * doc/c-mips.texi: Document -mmsa and -mno-msa.
157 Document .set msa and .set nomsa.
158
159 2013-10-14 Nick Clifton <nickc@redhat.com>
160
161 * read.c (add_include_dir): Use xrealloc.
162 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
163 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
164
165 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
166
167 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
168 also test/refer to "sstatus". Reformat the warning message.
169
170 2013-10-10 Sean Keys <skeys@ipdatasys.com>
171
172 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
173
174 2013-10-10 Jan Beulich <jbeulich@suse.com>
175
176 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
177 swapping for bndmk, bndldx, and bndstx.
178
179 2013-10-09 Nick Clifton <nickc@redhat.com>
180
181 PR gas/16025
182 * config/tc-epiphany.c (md_convert_frag): Add missing break
183 statement.
184
185 PR gas/16026
186 * config/tc-mn10200.c (md_convert_frag): Add missing break
187 statement.
188
189 2013-10-08 Jan Beulich <jbeulich@suse.com>
190
191 * tc-i386.c (check_word_reg): Remove misplaced "else".
192 (check_long_reg): Restore symmetry with check_word_reg.
193
194 2013-10-08 Jan Beulich <jbeulich@suse.com>
195
196 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
197 LR/PC check.
198
199 2013-10-08 Nick Clifton <nickc@redhat.com>
200
201 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
202 for "<foo>a". Issue error messages for unrecognised or corrrupt
203 size extensions.
204
205 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
206
207 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
208 possible.
209
210 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
211
212 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
213 * doc/c-i386.texi: Add -march=bdver4 option.
214
215 2013-09-20 Alan Modra <amodra@gmail.com>
216
217 * configure: Regenerate.
218
219 2013-09-18 Tristan Gingold <gingold@adacore.com>
220
221 * NEWS: Add marker for 2.24.
222
223 2013-09-18 Nick Clifton <nickc@redhat.com>
224
225 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
226 (move_data): New variable.
227 (md_parse_option): Parse -md.
228 (msp430_section): New function. Catch references to the .bss or
229 .data sections and generate a special symbol for use by the libcrt
230 library.
231 (md_pseudo_table): Intercept .section directives.
232 (md_longopt): Add -md
233 (md_show_usage): Likewise.
234 (msp430_operands): Generate a warning message if a NOP is inserted
235 into the instruction stream.
236 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
237
238 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
239
240 * config/tc-mips.c (mips_elf_final_processing): Set
241 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
242
243 2013-09-16 Will Newton <will.newton@linaro.org>
244
245 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
246 disallowing element size 64 with interleave other than 1.
247
248 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
249
250 * config/tc-mips.c (match_insn): Set error when $31 is used for
251 bltzal* and bgezal*.
252
253 2013-09-04 Tristan Gingold <gingold@adacore.com>
254
255 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
256 symbols.
257
258 2013-09-04 Roland McGrath <mcgrathr@google.com>
259
260 PR gas/15914
261 * config/tc-arm.c (T16_32_TAB): Add _udf.
262 (do_t_udf): New function.
263 (insns): Add "udf".
264
265 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
266
267 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
268 assembler errors at correct position.
269
270 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
271
272 PR binutils/15834
273 * config/tc-ia64.c: Fix typos.
274 * config/tc-sparc.c: Likewise.
275 * config/tc-z80.c: Likewise.
276 * doc/c-i386.texi: Likewise.
277 * doc/c-m32r.texi: Likewise.
278
279 2013-08-23 Will Newton <will.newton@linaro.org>
280
281 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
282 for pre-indexed addressing modes.
283
284 2013-08-21 Alan Modra <amodra@gmail.com>
285
286 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
287 range check label number for use with fb_low_counter array.
288
289 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
290
291 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
292 (mips_parse_argument_token, validate_micromips_insn, md_begin)
293 (check_regno, match_float_constant, check_completed_insn, append_insn)
294 (match_insn, match_mips16_insn, match_insns, macro_start)
295 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
296 (mips16_ip, mips_set_option_string, md_parse_option)
297 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
298 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
299 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
300 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
301 Start error messages with a lower-case letter. Do not end error
302 messages with a period. Wrap long messages to 80 character-lines.
303 Use "cannot" instead of "can't" and "can not".
304
305 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
306
307 * config/tc-mips.c (imm_expr): Expand comment.
308 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
309 when populated.
310
311 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
312
313 * config/tc-mips.c (imm2_expr): Delete.
314 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
315
316 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
317
318 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
319 (macro): Remove M_DEXT and M_DINS handling.
320
321 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
322
323 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
324 lax_max with lax_match.
325 (match_int_operand): Update accordingly. Don't report an error
326 for !lax_match-only cases.
327 (match_insn): Replace more_alts with lax_match and use it to
328 initialize the mips_arg_info field. Add a complete_p parameter.
329 Handle implicit VU0 suffixes here.
330 (match_invalid_for_isa, match_insns, match_mips16_insns): New
331 functions.
332 (mips_ip, mips16_ip): Use them.
333
334 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
335
336 * config/tc-mips.c (match_expression): Report uses of registers here.
337 Add a "must be an immediate expression" error. Handle elided offsets
338 here rather than...
339 (match_int_operand): ...here.
340
341 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
342
343 * config/tc-mips.c (mips_arg_info): Remove soft_match.
344 (match_out_of_range, match_not_constant): New functions.
345 (match_const_int): Remove fallback parameter and check for soft_match.
346 Use match_not_constant.
347 (match_mapped_int_operand, match_addiusp_operand)
348 (match_perf_reg_operand, match_save_restore_list_operand)
349 (match_mdmx_imm_reg_operand): Update accordingly. Use
350 match_out_of_range and set_insn_error* instead of as_bad.
351 (match_int_operand): Likewise. Use match_not_constant in the
352 !allows_nonconst case.
353 (match_float_constant): Report invalid float constants.
354 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
355 match_float_constant to check for invalid constants. Fail the
356 match if match_const_int or match_float_constant return false.
357 (mips_ip): Update accordingly.
358 (mips16_ip): Likewise. Undo null termination of instruction name
359 once lookup is complete.
360
361 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
362
363 * config/tc-mips.c (mips_insn_error_format): New enum.
364 (mips_insn_error): New struct.
365 (insn_error): Change to a mips_insn_error.
366 (clear_insn_error, set_insn_error_format, set_insn_error)
367 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
368 functions.
369 (mips_parse_argument_token, md_assemble, match_insn)
370 (match_mips16_insn): Use them instead of manipulating insn_error
371 directly.
372 (mips_ip, mips16_ip): Likewise. Simplify control flow.
373
374 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
375
376 * config/tc-mips.c (normalize_constant_expr): Move further up file.
377 (normalize_address_expr): Likewise.
378 (match_insn, match_mips16_insn): New functions, split out from...
379 (mips_ip, mips16_ip): ...here.
380
381 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
382
383 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
384 OP_OPTIONAL_REG.
385 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
386 for optional operands.
387
388 2013-08-16 Alan Modra <amodra@gmail.com>
389
390 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
391 modifiers generally.
392
393 2013-08-16 Alan Modra <amodra@gmail.com>
394
395 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
396
397 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
398
399 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
400 argument as alignment.
401
402 2013-08-09 Nick Clifton <nickc@redhat.com>
403
404 * config/tc-rl78.c (elf_flags): New variable.
405 (enum options): Add OPTION_G10.
406 (md_longopts): Add mg10.
407 (md_parse_option): Parse -mg10.
408 (rl78_elf_final_processing): New function.
409 * config/tc-rl78.c (tc_final_processing): Define.
410 * doc/c-rl78.texi: Document -mg10 option.
411
412 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
413
414 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
415 suffixes to be elided too.
416 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
417 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
418 to be omitted too.
419
420 2013-08-05 John Tytgat <john@bass-software.com>
421
422 * po/POTFILES.in: Regenerate.
423
424 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
425 Konrad Eisele <konrad@gaisler.com>
426
427 * config/tc-sparc.c (sparc_arch_types): Add leon.
428 (sparc_arch): Move sparc4 around and add leon.
429 (sparc_target_format): Document -Aleon.
430 * doc/c-sparc.texi: Likewise.
431
432 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
433
434 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
435
436 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
437 Richard Sandiford <rdsandiford@googlemail.com>
438
439 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
440 (RWARN): Bump to 0x8000000.
441 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
442 (RTYPE_R5900_ACC): New register types.
443 (RTYPE_MASK): Include them.
444 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
445 macros.
446 (reg_names): Include them.
447 (mips_parse_register_1): New function, split out from...
448 (mips_parse_register): ...here. Add a channels_ptr parameter.
449 Look for VU0 channel suffixes when nonnull.
450 (reg_lookup): Update the call to mips_parse_register.
451 (mips_parse_vu0_channels): New function.
452 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
453 (mips_operand_token): Add a "channels" field to the union.
454 Extend the comment above "ch" to OT_DOUBLE_CHAR.
455 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
456 (mips_parse_argument_token): Handle channel suffixes here too.
457 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
458 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
459 Handle '#' formats.
460 (md_begin): Register $vfN and $vfI registers.
461 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
462 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
463 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
464 (match_vu0_suffix_operand): New function.
465 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
466 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
467 (mips_lookup_insn): New function.
468 (mips_ip): Use it. Allow "+K" operands to be elided at the end
469 of an instruction. Handle '#' sequences.
470
471 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
472
473 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
474 values and use it instead of sreg, treg, xreg, etc.
475
476 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
477
478 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
479 and mips_int_operand_max.
480 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
481 Delete.
482 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
483 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
484 instead of mips16_immed_operand.
485
486 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
487
488 * config/tc-mips.c (mips16_macro): Don't use move_register.
489 (mips16_ip): Allow macros to use 'p'.
490
491 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
492
493 * config/tc-mips.c (MAX_OPERANDS): New macro.
494 (mips_operand_array): New structure.
495 (mips_operands, mips16_operands, micromips_operands): New arrays.
496 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
497 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
498 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
499 (micromips_to_32_reg_q_map): Delete.
500 (insn_operands, insn_opno, insn_extract_operand): New functions.
501 (validate_mips_insn): Take a mips_operand_array as argument and
502 use it to build up a list of operands. Extend to handle INSN_MACRO
503 and MIPS16.
504 (validate_mips16_insn): New function.
505 (validate_micromips_insn): Take a mips_operand_array as argument.
506 Handle INSN_MACRO.
507 (md_begin): Initialize mips_operands, mips16_operands and
508 micromips_operands. Call validate_mips_insn and
509 validate_micromips_insn for macro instructions too.
510 Call validate_mips16_insn for MIPS16 instructions.
511 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
512 New functions.
513 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
514 them. Handle INSN_UDI.
515 (get_append_method): Use gpr_read_mask.
516
517 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
518
519 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
520 flags for MIPS16 and non-MIPS16 instructions.
521 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
522 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
523 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
524 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
525 and non-MIPS16 instructions. Fix formatting.
526
527 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
528
529 * config/tc-mips.c (reg_needs_delay): Move later in file.
530 Use gpr_write_mask.
531 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
532
533 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
534 Alexander Ivchenko <alexander.ivchenko@intel.com>
535 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
536 Sergey Lega <sergey.s.lega@intel.com>
537 Anna Tikhonova <anna.tikhonova@intel.com>
538 Ilya Tocar <ilya.tocar@intel.com>
539 Andrey Turetskiy <andrey.turetskiy@intel.com>
540 Ilya Verbin <ilya.verbin@intel.com>
541 Kirill Yukhin <kirill.yukhin@intel.com>
542 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
543
544 * config/tc-i386-intel.c (O_zmmword_ptr): New.
545 (i386_types): Add zmmword.
546 (i386_intel_simplify_register): Allow regzmm.
547 (i386_intel_simplify): Handle zmmwords.
548 (i386_intel_operand): Handle RC/SAE, vector operations and
549 zmmwords.
550 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
551 (struct RC_Operation): New.
552 (struct Mask_Operation): New.
553 (struct Broadcast_Operation): New.
554 (vex_prefix): Size of bytes increased to 4 to support EVEX
555 encoding.
556 (enum i386_error): Add new error codes: unsupported_broadcast,
557 broadcast_not_on_src_operand, broadcast_needed,
558 unsupported_masking, mask_not_on_destination, no_default_mask,
559 unsupported_rc_sae, rc_sae_operand_not_last_imm,
560 invalid_register_operand, try_vector_disp8.
561 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
562 rounding, broadcast, memshift.
563 (struct RC_name): New.
564 (RC_NamesTable): New.
565 (evexlig): New.
566 (evexwig): New.
567 (extra_symbol_chars): Add '{'.
568 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
569 (i386_operand_type): Add regzmm, regmask and vec_disp8.
570 (match_mem_size): Handle zmmwords.
571 (operand_type_match): Handle zmm-registers.
572 (mode_from_disp_size): Handle vec_disp8.
573 (fits_in_vec_disp8): New.
574 (md_begin): Handle {} properly.
575 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
576 (build_vex_prefix): Handle vrex.
577 (build_evex_prefix): New.
578 (process_immext): Adjust to properly handle EVEX.
579 (md_assemble): Add EVEX encoding support.
580 (swap_2_operands): Correctly handle operands with masking,
581 broadcasting or RC/SAE.
582 (check_VecOperands): Support EVEX features.
583 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
584 (match_template): Support regzmm and handle new error codes.
585 (process_suffix): Handle zmmwords and zmm-registers.
586 (check_byte_reg): Extend to zmm-registers.
587 (process_operands): Extend to zmm-registers.
588 (build_modrm_byte): Handle EVEX.
589 (output_insn): Adjust to properly handle EVEX case.
590 (disp_size): Handle vec_disp8.
591 (output_disp): Support compressed disp8*N evex feature.
592 (output_imm): Handle RC/SAE immediates properly.
593 (check_VecOperations): New.
594 (i386_immediate): Handle EVEX features.
595 (i386_index_check): Handle zmmwords and zmm-registers.
596 (RC_SAE_immediate): New.
597 (i386_att_operand): Handle EVEX features.
598 (parse_real_register): Add a check for ZMM/Mask registers.
599 (OPTION_MEVEXLIG): New.
600 (OPTION_MEVEXWIG): New.
601 (md_longopts): Add mevexlig and mevexwig.
602 (md_parse_option): Handle mevexlig and mevexwig options.
603 (md_show_usage): Add description for mevexlig and mevexwig.
604 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
605 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
606
607 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
608
609 * config/tc-i386.c (cpu_arch): Add .sha.
610 * doc/c-i386.texi: Document sha/.sha.
611
612 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
613 Kirill Yukhin <kirill.yukhin@intel.com>
614 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
615
616 * config/tc-i386.c (BND_PREFIX): New.
617 (struct _i386_insn): Add new field bnd_prefix.
618 (add_bnd_prefix): New.
619 (cpu_arch): Add MPX.
620 (i386_operand_type): Add regbnd.
621 (md_assemble): Handle BND prefixes.
622 (parse_insn): Likewise.
623 (output_branch): Likewise.
624 (output_jump): Likewise.
625 (build_modrm_byte): Handle regbnd.
626 (OPTION_MADD_BND_PREFIX): New.
627 (md_longopts): Add entry for 'madd-bnd-prefix'.
628 (md_parse_option): Handle madd-bnd-prefix option.
629 (md_show_usage): Add description for madd-bnd-prefix
630 option.
631 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
632
633 2013-07-24 Tristan Gingold <gingold@adacore.com>
634
635 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
636 xcoff targets.
637
638 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
639
640 * config/tc-s390.c (s390_machine): Don't force the .machine
641 argument to lower case.
642
643 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
644
645 * config/tc-arm.c (s_arm_arch_extension): Improve error message
646 for invalid extension.
647
648 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
649
650 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
651 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
652 (aarch64_abi): New variable.
653 (ilp32_p): Change to be a macro.
654 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
655 (struct aarch64_option_abi_value_table): New struct.
656 (aarch64_abis): New table.
657 (aarch64_parse_abi): New function.
658 (aarch64_long_opts): Add entry for -mabi=.
659 * doc/as.texinfo (Target AArch64 options): Document -mabi.
660 * doc/c-aarch64.texi: Likewise.
661
662 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
663
664 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
665 unsigned comparison.
666
667 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
668
669 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
670 RX610.
671 * config/rx-parse.y: (rx_check_float_support): Add function to
672 check floating point operation support for target RX100 and
673 RX200.
674 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
675 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
676 RX200, RX600, and RX610
677
678 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
679
680 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
681
682 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
683
684 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
685 * doc/c-avr.texi: Likewise.
686
687 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
688
689 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
690 error with older GCCs.
691 (mips16_macro_build): Dereference args.
692
693 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
694
695 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
696 New functions, split out from...
697 (reg_lookup): ...here. Remove itbl support.
698 (reglist_lookup): Delete.
699 (mips_operand_token_type): New enum.
700 (mips_operand_token): New structure.
701 (mips_operand_tokens): New variable.
702 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
703 (mips_parse_arguments): New functions.
704 (md_begin): Initialize mips_operand_tokens.
705 (mips_arg_info): Add a token field. Remove optional_reg field.
706 (match_char, match_expression): New functions.
707 (match_const_int): Use match_expression. Remove "s" argument
708 and return a boolean result. Remove O_register handling.
709 (match_regno, match_reg, match_reg_range): New functions.
710 (match_int_operand, match_mapped_int_operand, match_msb_operand)
711 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
712 (match_addiusp_operand, match_clo_clz_dest_operand)
713 (match_lwm_swm_list_operand, match_entry_exit_operand)
714 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
715 (match_tied_reg_operand): Remove "s" argument and return a boolean
716 result. Match tokens rather than text. Update calls to
717 match_const_int. Rely on match_regno to call check_regno.
718 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
719 "arg" argument. Return a boolean result.
720 (parse_float_constant): Replace with...
721 (match_float_constant): ...this new function.
722 (match_operand): Remove "s" argument and return a boolean result.
723 Update calls to subfunctions.
724 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
725 rather than string-parsing routines. Update handling of optional
726 registers for token scheme.
727
728 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
729
730 * config/tc-mips.c (parse_float_constant): Split out from...
731 (mips_ip): ...here.
732
733 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
734
735 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
736 Delete.
737
738 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
739
740 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
741 (match_entry_exit_operand): New function.
742 (match_save_restore_list_operand): Likewise.
743 (match_operand): Use them.
744 (check_absolute_expr): Delete.
745 (mips16_ip): Rewrite main parsing loop to use mips_operands.
746
747 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
748
749 * config/tc-mips.c: Enable functions commented out in previous patch.
750 (SKIP_SPACE_TABS): Move further up file.
751 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
752 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
753 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
754 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
755 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
756 (micromips_imm_b_map, micromips_imm_c_map): Delete.
757 (mips_lookup_reg_pair): Delete.
758 (macro): Use report_bad_range and report_bad_field.
759 (mips_immed, expr_const_in_range): Delete.
760 (mips_ip): Rewrite main parsing loop to use new functions.
761
762 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
763
764 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
765 Change return type to bfd_boolean.
766 (report_bad_range, report_bad_field): New functions.
767 (mips_arg_info): New structure.
768 (match_const_int, convert_reg_type, check_regno, match_int_operand)
769 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
770 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
771 (match_addiusp_operand, match_clo_clz_dest_operand)
772 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
773 (match_pc_operand, match_tied_reg_operand, match_operand)
774 (check_completed_insn): New functions, commented out for now.
775
776 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
777
778 * config/tc-mips.c (insn_insert_operand): New function.
779 (macro_build, mips16_macro_build): Put null character check
780 in the for loop and convert continues to breaks. Use operand
781 structures to handle constant operands.
782
783 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
784
785 * config/tc-mips.c (validate_mips_insn): Move further up file.
786 Add insn_bits and decode_operand arguments. Use the mips_operand
787 fields to work out which bits an operand occupies. Detect double
788 definitions.
789 (validate_micromips_insn): Move further up file. Call into
790 validate_mips_insn.
791
792 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
793
794 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
795
796 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
797
798 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
799 and "~".
800 (macro): Update accordingly.
801
802 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
803
804 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
805 (imm_reloc): Delete.
806 (md_assemble): Remove imm_reloc handling.
807 (mips_ip): Update commentary. Use offset_expr and offset_reloc
808 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
809 Use a temporary array rather than imm_reloc when parsing
810 constant expressions. Remove imm_reloc initialization.
811 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
812 for the relaxable field. Use a relax_char variable to track the
813 type of this field. Remove imm_reloc initialization.
814
815 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
816
817 * config/tc-mips.c (mips16_ip): Handle "I".
818
819 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
820
821 * config/tc-mips.c (mips_flag_nan2008): New variable.
822 (options): Add OPTION_NAN enum value.
823 (md_longopts): Handle it.
824 (md_parse_option): Likewise.
825 (s_nan): New function.
826 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
827 (md_show_usage): Add -mnan.
828
829 * doc/as.texinfo (Overview): Add -mnan.
830 * doc/c-mips.texi (MIPS Opts): Document -mnan.
831 (MIPS NaN Encodings): New node. Document .nan directive.
832 (MIPS-Dependent): List the new node.
833
834 2013-07-09 Tristan Gingold <gingold@adacore.com>
835
836 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
837
838 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
839
840 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
841 for 'A' and assume that the constant has been elided if the result
842 is an O_register.
843
844 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
845
846 * config/tc-mips.c (gprel16_reloc_p): New function.
847 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
848 BFD_RELOC_UNUSED.
849 (offset_high_part, small_offset_p): New functions.
850 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
851 register load and store macros, handle the 16-bit offset case first.
852 If a 16-bit offset is not suitable for the instruction we're
853 generating, load it into the temporary register using
854 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
855 M_L_DAB code once the address has been constructed. For double load
856 and store macros, again handle the 16-bit offset case first.
857 If the second register cannot be accessed from the same high
858 part as the first, load it into AT using ADDRESS_ADDI_INSN.
859 Fix the handling of LD in cases where the first register is the
860 same as the base. Also handle the case where the offset is
861 not 16 bits and the second register cannot be accessed from the
862 same high part as the first. For unaligned loads and stores,
863 fuse the offbits == 12 and old "ab" handling. Apply this handling
864 whenever the second offset needs a different high part from the first.
865 Construct the offset using ADDRESS_ADDI_INSN where possible,
866 for offbits == 16 as well as offbits == 12. Use offset_reloc
867 when constructing the individual loads and stores.
868 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
869 and offset_reloc before matching against a particular opcode.
870 Handle elided 'A' constants. Allow 'A' constants to use
871 relocation operators.
872
873 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
874
875 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
876 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
877 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
878
879 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
880
881 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
882 Require the msb to be <= 31 for "+s". Check that the size is <= 31
883 for both "+s" and "+S".
884
885 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
886
887 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
888 (mips_ip, mips16_ip): Handle "+i".
889
890 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
891
892 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
893 (micromips_to_32_reg_h_map): Rename to...
894 (micromips_to_32_reg_h_map1): ...this.
895 (micromips_to_32_reg_i_map): Rename to...
896 (micromips_to_32_reg_h_map2): ...this.
897 (mips_lookup_reg_pair): New function.
898 (gpr_write_mask, macro): Adjust after above renaming.
899 (validate_micromips_insn): Remove "mi" handling.
900 (mips_ip): Likewise. Parse both registers in a pair for "mh".
901
902 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
903
904 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
905 (mips_ip): Remove "+D" and "+T" handling.
906
907 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
908
909 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
910 relocs.
911
912 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
913
914 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
915
916 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
917
918 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
919 (aarch64_force_relocation): Likewise.
920
921 2013-07-02 Alan Modra <amodra@gmail.com>
922
923 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
924
925 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
926
927 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
928 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
929 Replace @sc{mips16} with literal `MIPS16'.
930 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
931
932 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
933
934 * config/tc-aarch64.c (reloc_table): Replace
935 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
936 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
937 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
938 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
939 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
940 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
941 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
942 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
943 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
944 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
945 (aarch64_force_relocation): Likewise.
946
947 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
948
949 * config/tc-aarch64.c (ilp32_p): New static variable.
950 (elf64_aarch64_target_format): Return the target according to the
951 value of 'ilp32_p'.
952 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
953 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
954 (aarch64_dwarf2_addr_size): New function.
955 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
956 (DWARF2_ADDR_SIZE): New define.
957
958 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
959
960 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
961
962 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
963
964 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
965
966 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
967
968 * config/tc-mips.c (mips_set_options): Add insn32 member.
969 (mips_opts): Initialize it.
970 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
971 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
972 (md_longopts): Add "minsn32" and "mno-insn32" options.
973 (is_size_valid): Handle insn32 mode.
974 (md_assemble): Pass instruction string down to macro.
975 (brk_fmt): Add second dimension and insn32 mode initializers.
976 (mfhl_fmt): Likewise.
977 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
978 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
979 (macro_build_jalr, move_register): Handle insn32 mode.
980 (macro_build_branch_rs): Likewise.
981 (macro): Handle insn32 mode.
982 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
983 (mips_ip): Handle insn32 mode.
984 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
985 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
986 (mips_handle_align): Handle insn32 mode.
987 (md_show_usage): Add -minsn32 and -mno-insn32.
988
989 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
990 -mno-insn32 options.
991 (-minsn32, -mno-insn32): New options.
992 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
993 options.
994 (MIPS assembly options): New node. Document .set insn32 and
995 .set noinsn32.
996 (MIPS-Dependent): List the new node.
997
998 2013-06-25 Nick Clifton <nickc@redhat.com>
999
1000 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1001 the PC in indirect addressing on 430xv2 parts.
1002 (msp430_operands): Add version test to hardware bug encoding
1003 restrictions.
1004
1005 2013-06-24 Roland McGrath <mcgrathr@google.com>
1006
1007 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1008 so it skips whitespace before it.
1009 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1010
1011 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1012 (arm_reg_parse_multi): Skip whitespace first.
1013 (parse_reg_list): Likewise.
1014 (parse_vfp_reg_list): Likewise.
1015 (s_arm_unwind_save_mmxwcg): Likewise.
1016
1017 2013-06-24 Nick Clifton <nickc@redhat.com>
1018
1019 PR gas/15623
1020 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1021
1022 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1023
1024 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1025
1026 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1027
1028 * config/tc-mips.c: Assert that offsetT and valueT are at least
1029 8 bytes in size.
1030 (GPR_SMIN, GPR_SMAX): New macros.
1031 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1032
1033 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1034
1035 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1036 conditions. Remove any code deselected by them.
1037 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1038
1039 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1040
1041 * NEWS: Note removal of ECOFF support.
1042 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1043 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1044 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1045 * Makefile.in: Regenerate.
1046 * configure.in: Remove MIPS ECOFF references.
1047 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1048 Delete cases.
1049 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1050 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1051 (mips-*-*): ...this single case.
1052 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1053 MIPS emulations to be e-mipself*.
1054 * configure: Regenerate.
1055 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1056 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1057 (mips-*-sysv*): Remove coff and ecoff cases.
1058 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1059 * ecoff.c: Remove reference to MIPS ECOFF.
1060 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1061 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1062 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1063 (mips_hi_fixup): Tweak comment.
1064 (append_insn): Require a howto.
1065 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1066
1067 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1068
1069 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1070 Use "CPU" instead of "cpu".
1071 * doc/c-mips.texi: Likewise.
1072 (MIPS Opts): Rename to MIPS Options.
1073 (MIPS option stack): Rename to MIPS Option Stack.
1074 (MIPS ASE instruction generation overrides): Rename to
1075 MIPS ASE Instruction Generation Overrides (for now).
1076 (MIPS floating-point): Rename to MIPS Floating-Point.
1077
1078 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1079
1080 * doc/c-mips.texi (MIPS Macros): New section.
1081 (MIPS Object): Replace with...
1082 (MIPS Small Data): ...this new section.
1083
1084 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1085
1086 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1087 Capitalize name. Use @kindex instead of @cindex for .set entries.
1088
1089 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1090
1091 * doc/c-mips.texi (MIPS Stabs): Remove section.
1092
1093 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1094
1095 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1096 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1097 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1098 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1099 (mips_ase): New structure.
1100 (mips_ases): New table.
1101 (FP64_ASES): New macro.
1102 (mips_ase_groups): New array.
1103 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1104 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1105 functions.
1106 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1107 (md_parse_option): Use mips_ases and mips_set_ase instead of
1108 separate case statements for each ASE option.
1109 (mips_after_parse_args): Use FP64_ASES. Use
1110 mips_check_isa_supports_ases to check the ASEs against
1111 other options.
1112 (s_mipsset): Use mips_ases and mips_set_ase instead of
1113 separate if statements for each ASE option. Use
1114 mips_check_isa_supports_ases, even when a non-ASE option
1115 is specified.
1116
1117 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1118
1119 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1120
1121 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1122
1123 * config/tc-mips.c (md_shortopts, options, md_longopts)
1124 (md_longopts_size): Move earlier in file.
1125
1126 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1127
1128 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1129 with a single "ase" bitmask.
1130 (mips_opts): Update accordingly.
1131 (file_ase, file_ase_explicit): New variables.
1132 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1133 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1134 (ISA_HAS_ROR): Adjust for mips_set_options change.
1135 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1136 (mips_ip): Adjust for mips_set_options change.
1137 (md_parse_option): Likewise. Update file_ase_explicit.
1138 (mips_after_parse_args): Adjust for mips_set_options change.
1139 Use bitmask operations to select the default ASEs. Set file_ase
1140 rather than individual per-ASE variables.
1141 (s_mipsset): Adjust for mips_set_options change.
1142 (mips_elf_final_processing): Test file_ase rather than
1143 file_ase_mdmx. Remove commented-out code.
1144
1145 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1146
1147 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1148 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1149 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1150 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1151 (mips_after_parse_args): Use the new "ase" field to choose
1152 the default ASEs.
1153 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1154 "ase" field.
1155
1156 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1157
1158 * config/tc-arm.c (symbol_preemptible): New function.
1159 (relax_branch): Use it.
1160
1161 2013-06-17 Catherine Moore <clm@codesourcery.com>
1162 Maciej W. Rozycki <macro@codesourcery.com>
1163 Chao-Ying Fu <fu@mips.com>
1164
1165 * config/tc-mips.c (mips_set_options): Add ase_eva.
1166 (mips_set_options mips_opts): Add ase_eva.
1167 (file_ase_eva): Declare.
1168 (ISA_SUPPORTS_EVA_ASE): Define.
1169 (IS_SEXT_9BIT_NUM): Define.
1170 (MIPS_CPU_ASE_EVA): Define.
1171 (is_opcode_valid): Add support for ase_eva.
1172 (macro_build): Likewise.
1173 (macro): Likewise.
1174 (validate_mips_insn): Likewise.
1175 (validate_micromips_insn): Likewise.
1176 (mips_ip): Likewise.
1177 (options): Add OPTION_EVA and OPTION_NO_EVA.
1178 (md_longopts): Add -meva and -mno-eva.
1179 (md_parse_option): Process new options.
1180 (mips_after_parse_args): Check for valid EVA combinations.
1181 (s_mipsset): Likewise.
1182
1183 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1184
1185 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1186 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1187 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1188 (dwarf2_gen_line_info_1): Update call accordingly.
1189 (dwarf2_move_insn): New function.
1190 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1191
1192 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1193
1194 Revert:
1195
1196 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1197
1198 PR gas/13024
1199 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1200 (dwarf2_gen_line_info_1): Delete.
1201 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1202 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1203 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1204 (dwarf2_directive_loc): Push previous .locs instead of generating
1205 them immediately.
1206
1207 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1208
1209 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1210 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1211
1212 2013-06-13 Nick Clifton <nickc@redhat.com>
1213
1214 PR gas/15602
1215 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1216 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1217 function. Generates an error if the adjusted offset is out of a
1218 16-bit range.
1219
1220 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1221
1222 * config/tc-nios2.c (md_apply_fix): Mask constant
1223 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1224
1225 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1226
1227 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1228 MIPS-3D instructions either.
1229 (md_convert_frag): Update the COPx branch mask accordingly.
1230
1231 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1232 option.
1233 * doc/as.texinfo (Overview): Add --relax-branch and
1234 --no-relax-branch.
1235 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1236 --no-relax-branch.
1237
1238 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1239
1240 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1241 omitted.
1242
1243 2013-06-08 Catherine Moore <clm@codesourcery.com>
1244
1245 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1246 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1247 (append_insn): Change INSN_xxxx to ASE_xxxx.
1248
1249 2013-06-01 George Thomas <george.thomas@atmel.com>
1250
1251 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1252 AVR_ISA_XMEGAU
1253
1254 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1255
1256 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1257 for ELF.
1258
1259 2013-05-31 Paul Brook <paul@codesourcery.com>
1260
1261 * config/tc-mips.c (s_ehword): New.
1262
1263 2013-05-30 Paul Brook <paul@codesourcery.com>
1264
1265 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1266
1267 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1268
1269 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1270 convert relocs who have no relocatable field either. Rephrase
1271 the conditional so that the PC-relative check is only applied
1272 for REL targets.
1273
1274 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1275
1276 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1277 calculation.
1278
1279 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1280
1281 * config/tc-aarch64.c (reloc_table): Update to use
1282 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1283 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1284 (md_apply_fix): Likewise.
1285 (aarch64_force_relocation): Likewise.
1286
1287 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1288
1289 * config/tc-arm.c (it_fsm_post_encode): Improve
1290 warning messages about deprecated IT block formats.
1291
1292 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1293
1294 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1295 inside fx_done condition.
1296
1297 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1298
1299 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1300
1301 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1302
1303 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1304 and clean up warning when using PRINT_OPCODE_TABLE.
1305
1306 2013-05-20 Alan Modra <amodra@gmail.com>
1307
1308 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1309 and data fixups performing shift/high adjust/sign extension on
1310 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1311 when writing data fixups rather than recalculating size.
1312
1313 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1314
1315 * doc/c-msp430.texi: Fix typo.
1316
1317 2013-05-16 Tristan Gingold <gingold@adacore.com>
1318
1319 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1320 are also TOC symbols.
1321
1322 2013-05-16 Nick Clifton <nickc@redhat.com>
1323
1324 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1325 Add -mcpu command to specify core type.
1326 * doc/c-msp430.texi: Update documentation.
1327
1328 2013-05-09 Andrew Pinski <apinski@cavium.com>
1329
1330 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1331 (mips_opts): Update for the new field.
1332 (file_ase_virt): New variable.
1333 (ISA_SUPPORTS_VIRT_ASE): New macro.
1334 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1335 (MIPS_CPU_ASE_VIRT): New define.
1336 (is_opcode_valid): Handle ase_virt.
1337 (macro_build): Handle "+J".
1338 (validate_mips_insn): Likewise.
1339 (mips_ip): Likewise.
1340 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1341 (md_longopts): Add mvirt and mnovirt
1342 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1343 (mips_after_parse_args): Handle ase_virt field.
1344 (s_mipsset): Handle "virt" and "novirt".
1345 (mips_elf_final_processing): Add a comment about virt ASE might need
1346 a new flag.
1347 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1348 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1349 Document ".set virt" and ".set novirt".
1350
1351 2013-05-09 Alan Modra <amodra@gmail.com>
1352
1353 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1354 control of operand flag bits.
1355
1356 2013-05-07 Alan Modra <amodra@gmail.com>
1357
1358 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1359 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1360 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1361 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1362 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1363 Shift and sign-extend fieldval for use by some VLE reloc
1364 operand->insert functions.
1365
1366 2013-05-06 Paul Brook <paul@codesourcery.com>
1367 Catherine Moore <clm@codesourcery.com>
1368
1369 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1370 (limited_pcrel_reloc_p): Likewise.
1371 (md_apply_fix): Likewise.
1372 (tc_gen_reloc): Likewise.
1373
1374 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1375
1376 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1377 (mips_fix_adjustable): Adjust pc-relative check to use
1378 limited_pc_reloc_p.
1379
1380 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1381
1382 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1383 (s_mips_stab): Do not restrict to stabn only.
1384
1385 2013-05-02 Nick Clifton <nickc@redhat.com>
1386
1387 * config/tc-msp430.c: Add support for the MSP430X architecture.
1388 Add code to insert a NOP instruction after any instruction that
1389 might change the interrupt state.
1390 Add support for the LARGE memory model.
1391 Add code to initialise the .MSP430.attributes section.
1392 * config/tc-msp430.h: Add support for the MSP430X architecture.
1393 * doc/c-msp430.texi: Document the new -mL and -mN command line
1394 options.
1395 * NEWS: Mention support for the MSP430X architecture.
1396
1397 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1398
1399 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1400 alpha*-*-linux*ecoff*.
1401
1402 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1403
1404 * config/tc-mips.c (mips_ip): Add sizelo.
1405 For "+C", "+G", and "+H", set sizelo and compare against it.
1406
1407 2013-04-29 Nick Clifton <nickc@redhat.com>
1408
1409 * as.c (Options): Add -gdwarf-sections.
1410 (parse_args): Likewise.
1411 * as.h (flag_dwarf_sections): Declare.
1412 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1413 (process_entries): When -gdwarf-sections is enabled generate
1414 fragmentary .debug_line sections.
1415 (out_debug_line): Set the section for the .debug_line section end
1416 symbol.
1417 * doc/as.texinfo: Document -gdwarf-sections.
1418 * NEWS: Mention -gdwarf-sections.
1419
1420 2013-04-26 Christian Groessler <chris@groessler.org>
1421
1422 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1423 according to the target parameter. Don't call s_segm since s_segm
1424 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1425 initialized yet.
1426 (md_begin): Call s_segm according to target parameter from command
1427 line.
1428
1429 2013-04-25 Alan Modra <amodra@gmail.com>
1430
1431 * configure.in: Allow little-endian linux.
1432 * configure: Regenerate.
1433
1434 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1435
1436 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1437 "fstatus" control register to "eccinj".
1438
1439 2013-04-19 Kai Tietz <ktietz@redhat.com>
1440
1441 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1442
1443 2013-04-15 Julian Brown <julian@codesourcery.com>
1444
1445 * expr.c (add_to_result, subtract_from_result): Make global.
1446 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1447 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1448 subtract_from_result to handle extra bit of precision for .sleb128
1449 directive operands.
1450
1451 2013-04-10 Julian Brown <julian@codesourcery.com>
1452
1453 * read.c (convert_to_bignum): Add sign parameter. Use it
1454 instead of X_unsigned to determine sign of resulting bignum.
1455 (emit_expr): Pass extra argument to convert_to_bignum.
1456 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1457 X_extrabit to convert_to_bignum.
1458 (parse_bitfield_cons): Set X_extrabit.
1459 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1460 Initialise X_extrabit field as appropriate.
1461 (add_to_result): New.
1462 (subtract_from_result): New.
1463 (expr): Use above.
1464 * expr.h (expressionS): Add X_extrabit field.
1465
1466 2013-04-10 Jan Beulich <jbeulich@suse.com>
1467
1468 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1469 register being PC when is_t or writeback, and use distinct
1470 diagnostic for the latter case.
1471
1472 2013-04-10 Jan Beulich <jbeulich@suse.com>
1473
1474 * gas/config/tc-arm.c (parse_operands): Re-write
1475 po_barrier_or_imm().
1476 (do_barrier): Remove bogus constraint().
1477 (do_t_barrier): Remove.
1478
1479 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1480
1481 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1482 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1483 ATmega2564RFR2
1484 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1485
1486 2013-04-09 Jan Beulich <jbeulich@suse.com>
1487
1488 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1489 Use local variable Rt in more places.
1490 (do_vmsr): Accept all control registers.
1491
1492 2013-04-09 Jan Beulich <jbeulich@suse.com>
1493
1494 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1495 if there was none specified for moves between scalar and core
1496 register.
1497
1498 2013-04-09 Jan Beulich <jbeulich@suse.com>
1499
1500 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1501 NEON_ALL_LANES case.
1502
1503 2013-04-08 Jan Beulich <jbeulich@suse.com>
1504
1505 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1506 PC-relative VSTR.
1507
1508 2013-04-08 Jan Beulich <jbeulich@suse.com>
1509
1510 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1511 entry to sp_fiq.
1512
1513 2013-04-03 Alan Modra <amodra@gmail.com>
1514
1515 * doc/as.texinfo: Add support to generate man options for h8300.
1516 * doc/c-h8300.texi: Likewise.
1517
1518 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1519
1520 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1521 Cortex-A57.
1522
1523 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1524
1525 PR binutils/15068
1526 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1527
1528 2013-03-26 Nick Clifton <nickc@redhat.com>
1529
1530 PR gas/15295
1531 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1532 start of the file each time.
1533
1534 PR gas/15178
1535 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1536 FreeBSD targets.
1537
1538 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1539
1540 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1541 after fixup.
1542
1543 2013-03-21 Will Newton <will.newton@linaro.org>
1544
1545 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1546 pc-relative str instructions in Thumb mode.
1547
1548 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1549
1550 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1551 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1552 R_H8_DISP32A16.
1553 * config/tc-h8300.h: Remove duplicated defines.
1554
1555 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1556
1557 PR gas/15282
1558 * tc-avr.c (mcu_has_3_byte_pc): New function.
1559 (tc_cfi_frame_initial_instructions): Call it to find return
1560 address size.
1561
1562 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1563
1564 PR gas/15095
1565 * config/tc-tic6x.c (tic6x_try_encode): Handle
1566 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1567 encode register pair numbers when required.
1568
1569 2013-03-15 Will Newton <will.newton@linaro.org>
1570
1571 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1572 in vstr in Thumb mode for pre-ARMv7 cores.
1573
1574 2013-03-14 Andreas Schwab <schwab@suse.de>
1575
1576 * doc/c-arc.texi (ARC Directives): Revert last change and use
1577 @itemize instead of @table.
1578 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1579
1580 2013-03-14 Nick Clifton <nickc@redhat.com>
1581
1582 PR gas/15273
1583 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1584 NULL message, instead just check ARM_CPU_IS_ANY directly.
1585
1586 2013-03-14 Nick Clifton <nickc@redhat.com>
1587
1588 PR gas/15212
1589 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1590 for table format.
1591 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1592 to the @item directives.
1593 (ARM-Neon-Alignment): Move to correct place in the document.
1594 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1595 formatting.
1596 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1597 @smallexample.
1598
1599 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1600
1601 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1602 case. Add default BAD_CASE to switch.
1603
1604 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1605
1606 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1607 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1608
1609 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1610
1611 * config/tc-arm.c (crc_ext_armv8): New feature set.
1612 (UNPRED_REG): New macro.
1613 (do_crc32_1): New function.
1614 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1615 do_crc32ch, do_crc32cw): Likewise.
1616 (TUEc): New macro.
1617 (insns): Add entries for crc32 mnemonics.
1618 (arm_extensions): Add entry for crc.
1619
1620 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1621
1622 * write.h (struct fix): Add fx_dot_frag field.
1623 (dot_frag): Declare.
1624 * write.c (dot_frag): New variable.
1625 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1626 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1627 * expr.c (expr): Save value of frag_now in dot_frag when setting
1628 dot_value.
1629 * read.c (emit_expr): Likewise. Delete comments.
1630
1631 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1632
1633 * config/tc-i386.c (flag_code_names): Removed.
1634 (i386_index_check): Rewrote.
1635
1636 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1637
1638 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1639 add comment.
1640 (aarch64_double_precision_fmovable): New function.
1641 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1642 function; handle hexadecimal representation of IEEE754 encoding.
1643 (parse_operands): Update the call to parse_aarch64_imm_float.
1644
1645 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1646
1647 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1648 (check_hle): Updated.
1649 (md_assemble): Likewise.
1650 (parse_insn): Likewise.
1651
1652 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1653
1654 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1655 (md_assemble): Check if REP prefix is OK.
1656 (parse_insn): Remove expecting_string_instruction. Set
1657 i.rep_prefix.
1658
1659 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1660
1661 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1662
1663 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1664
1665 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1666 for system registers.
1667
1668 2013-02-27 DJ Delorie <dj@redhat.com>
1669
1670 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1671 (rl78_op): Handle %code().
1672 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1673 (tc_gen_reloc): Likwise; convert to a computed reloc.
1674 (md_apply_fix): Likewise.
1675
1676 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1677
1678 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1679
1680 2013-02-25 Terry Guo <terry.guo@arm.com>
1681
1682 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1683 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1684 list of accepted CPUs.
1685
1686 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1687
1688 PR gas/15159
1689 * config/tc-i386.c (cpu_arch): Add ".smap".
1690
1691 * doc/c-i386.texi: Document smap.
1692
1693 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1694
1695 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1696 mips_assembling_insn appropriately.
1697 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1698
1699 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1700
1701 * config/tc-mips.c (append_insn): Correct indentation, remove
1702 extraneous braces.
1703
1704 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1705
1706 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1707
1708 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1709
1710 * configure.tgt: Add nios2-*-rtems*.
1711
1712 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1713
1714 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1715 NULL.
1716
1717 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1718
1719 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1720 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1721
1722 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1723
1724 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1725 core.
1726
1727 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1728 Andrew Jenner <andrew@codesourcery.com>
1729
1730 Based on patches from Altera Corporation.
1731
1732 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1733 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1734 * Makefile.in: Regenerated.
1735 * configure.tgt: Add case for nios2*-linux*.
1736 * config/obj-elf.c: Conditionally include elf/nios2.h.
1737 * config/tc-nios2.c: New file.
1738 * config/tc-nios2.h: New file.
1739 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1740 * doc/Makefile.in: Regenerated.
1741 * doc/all.texi: Set NIOSII.
1742 * doc/as.texinfo (Overview): Add Nios II options.
1743 (Machine Dependencies): Include c-nios2.texi.
1744 * doc/c-nios2.texi: New file.
1745 * NEWS: Note Altera Nios II support.
1746
1747 2013-02-06 Alan Modra <amodra@gmail.com>
1748
1749 PR gas/14255
1750 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1751 Don't skip fixups with fx_subsy non-NULL.
1752 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1753 with fx_subsy non-NULL.
1754
1755 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1756
1757 * doc/c-metag.texi: Add "@c man" markers.
1758
1759 2013-02-04 Alan Modra <amodra@gmail.com>
1760
1761 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1762 related code.
1763 (TC_ADJUST_RELOC_COUNT): Delete.
1764 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1765
1766 2013-02-04 Alan Modra <amodra@gmail.com>
1767
1768 * po/POTFILES.in: Regenerate.
1769
1770 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1771
1772 * config/tc-metag.c: Make SWAP instruction less permissive with
1773 its operands.
1774
1775 2013-01-29 DJ Delorie <dj@redhat.com>
1776
1777 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1778 relocs in .word/.etc statements.
1779
1780 2013-01-29 Roland McGrath <mcgrathr@google.com>
1781
1782 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1783 immediate value for 8-bit offset" error so it shows line info.
1784
1785 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1786
1787 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1788 for 64-bit output.
1789
1790 2013-01-24 Nick Clifton <nickc@redhat.com>
1791
1792 * config/tc-v850.c: Add support for e3v5 architecture.
1793 * doc/c-v850.texi: Mention new support.
1794
1795 2013-01-23 Nick Clifton <nickc@redhat.com>
1796
1797 PR gas/15039
1798 * config/tc-avr.c: Include dwarf2dbg.h.
1799
1800 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1801
1802 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1803 (tc_i386_fix_adjustable): Likewise.
1804 (lex_got): Likewise.
1805 (tc_gen_reloc): Likewise.
1806
1807 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1808
1809 * config/tc-aarch64.c (output_operand_error_record): Change to output
1810 the out-of-range error message as value-expected message if there is
1811 only one single value in the expected range.
1812 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1813 LSL #0 as a programmer-friendly feature.
1814
1815 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1816
1817 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1818 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1819 BFD_RELOC_64_SIZE relocations.
1820 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1821 for it.
1822 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1823 relocations against local symbols.
1824
1825 2013-01-16 Alan Modra <amodra@gmail.com>
1826
1827 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1828 finding some sort of toc syntax error, and break to avoid
1829 compiler uninit warning.
1830
1831 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1832
1833 PR gas/15019
1834 * config/tc-i386.c (lex_got): Increment length by 1 if the
1835 relocation token is removed.
1836
1837 2013-01-15 Nick Clifton <nickc@redhat.com>
1838
1839 * config/tc-v850.c (md_assemble): Allow signed values for
1840 V850E_IMMEDIATE.
1841
1842 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1843
1844 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1845 git to cvs.
1846
1847 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1848
1849 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1850 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1851 * config/tc-ppc.c (md_show_usage): Likewise.
1852 (ppc_handle_align): Handle power8's group ending nop.
1853
1854 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1855
1856 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1857 that the assember exits after the opcodes have been printed.
1858
1859 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1860
1861 * app.c: Remove trailing white spaces.
1862 * as.c: Likewise.
1863 * as.h: Likewise.
1864 * cond.c: Likewise.
1865 * dw2gencfi.c: Likewise.
1866 * dwarf2dbg.h: Likewise.
1867 * ecoff.c: Likewise.
1868 * input-file.c: Likewise.
1869 * itbl-lex.h: Likewise.
1870 * output-file.c: Likewise.
1871 * read.c: Likewise.
1872 * sb.c: Likewise.
1873 * subsegs.c: Likewise.
1874 * symbols.c: Likewise.
1875 * write.c: Likewise.
1876 * config/tc-i386.c: Likewise.
1877 * doc/Makefile.am: Likewise.
1878 * doc/Makefile.in: Likewise.
1879 * doc/c-aarch64.texi: Likewise.
1880 * doc/c-alpha.texi: Likewise.
1881 * doc/c-arc.texi: Likewise.
1882 * doc/c-arm.texi: Likewise.
1883 * doc/c-avr.texi: Likewise.
1884 * doc/c-bfin.texi: Likewise.
1885 * doc/c-cr16.texi: Likewise.
1886 * doc/c-d10v.texi: Likewise.
1887 * doc/c-d30v.texi: Likewise.
1888 * doc/c-h8300.texi: Likewise.
1889 * doc/c-hppa.texi: Likewise.
1890 * doc/c-i370.texi: Likewise.
1891 * doc/c-i386.texi: Likewise.
1892 * doc/c-i860.texi: Likewise.
1893 * doc/c-m32c.texi: Likewise.
1894 * doc/c-m32r.texi: Likewise.
1895 * doc/c-m68hc11.texi: Likewise.
1896 * doc/c-m68k.texi: Likewise.
1897 * doc/c-microblaze.texi: Likewise.
1898 * doc/c-mips.texi: Likewise.
1899 * doc/c-msp430.texi: Likewise.
1900 * doc/c-mt.texi: Likewise.
1901 * doc/c-s390.texi: Likewise.
1902 * doc/c-score.texi: Likewise.
1903 * doc/c-sh.texi: Likewise.
1904 * doc/c-sh64.texi: Likewise.
1905 * doc/c-tic54x.texi: Likewise.
1906 * doc/c-tic6x.texi: Likewise.
1907 * doc/c-v850.texi: Likewise.
1908 * doc/c-xc16x.texi: Likewise.
1909 * doc/c-xgate.texi: Likewise.
1910 * doc/c-xtensa.texi: Likewise.
1911 * doc/c-z80.texi: Likewise.
1912 * doc/internals.texi: Likewise.
1913
1914 2013-01-10 Roland McGrath <mcgrathr@google.com>
1915
1916 * hash.c (hash_new_sized): Make it global.
1917 * hash.h: Declare it.
1918 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1919 pass a small size.
1920
1921 2013-01-10 Will Newton <will.newton@imgtec.com>
1922
1923 * Makefile.am: Add Meta.
1924 * Makefile.in: Regenerate.
1925 * config/tc-metag.c: New file.
1926 * config/tc-metag.h: New file.
1927 * configure.tgt: Add Meta.
1928 * doc/Makefile.am: Add Meta.
1929 * doc/Makefile.in: Regenerate.
1930 * doc/all.texi: Add Meta.
1931 * doc/as.texiinfo: Document Meta options.
1932 * doc/c-metag.texi: New file.
1933
1934 2013-01-09 Steve Ellcey <sellcey@mips.com>
1935
1936 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1937 calls.
1938 * config/tc-mips.c (internalError): Remove, replace with abort.
1939
1940 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1941
1942 * config/tc-aarch64.c (parse_operands): Change to compare the result
1943 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1944
1945 2013-01-07 Nick Clifton <nickc@redhat.com>
1946
1947 PR gas/14887
1948 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1949 anticipated character.
1950 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1951 here as it is no longer needed.
1952
1953 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1954
1955 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1956 * doc/c-score.texi (SCORE-Opts): Likewise.
1957 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1958
1959 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1960
1961 * config/tc-mips.c: Add support for MIPS r5900.
1962 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1963 lq and sq.
1964 (can_swap_branch_p, get_append_method): Detect some conditional
1965 short loops to fix a bug on the r5900 by NOP in the branch delay
1966 slot.
1967 (M_MUL): Support 3 operands in multu on r5900.
1968 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1969 (s_mipsset): Force 32 bit floating point on r5900.
1970 (mips_ip): Check parameter range of instructions mfps and mtps on
1971 r5900.
1972 * configure.in: Detect CPU type when target string contains r5900
1973 (e.g. mips64r5900el-linux-gnu).
1974
1975 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1976
1977 * as.c (parse_args): Update copyright year to 2013.
1978
1979 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1980
1981 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1982 and "cortex57".
1983
1984 2013-01-02 Nick Clifton <nickc@redhat.com>
1985
1986 PR gas/14987
1987 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1988 closing bracket.
1989
1990 For older changes see ChangeLog-2012
1991 \f
1992 Copyright (C) 2013 Free Software Foundation, Inc.
1993
1994 Copying and distribution of this file, with or without modification,
1995 are permitted in any medium without royalty provided the copyright
1996 notice and this notice are preserved.
1997
1998 Local Variables:
1999 mode: change-log
2000 left-margin: 8
2001 fill-column: 74
2002 version-control: never
2003 End:
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