gas/ChangeLog

   1 2006-05-16  Bjoern Haase  <bjoern.m.haase@web.de>
   2
   3         * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
   4         constant values.
   5
   6 2006-05-15  Paul Brook  <paul@codesourcery.com>
   7
   8         * config/tc-arm.c (arm_adjust_symtab): Use
   9         bfd_is_arm_special_symbol_name.
  10
  11 2006-05-15  Bob Wilson  <bob.wilson@acm.org>
  12
  13         * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
  14         xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
  15         xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
  16         Handle errors from calls to xtensa_opcode_is_* functions.
  17
  18 2006-05-14  Thiemo Seufer  <ths@mips.com>
  19
  20         * config/tc-mips.c (macro_build): Test for currently active
  21         mips16 option.
  22         (mips16_ip): Reject invalid opcodes.
  23
  24 2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>
  25
  26         * doc/as.texinfo: Rename "Index" to "AS Index",
  27         and "ABORT" to "ABORT (COFF)".
  28
  29 2006-05-11  Paul Brook  <paul@codesourcery.com>
  30
  31         * config/tc-arm.c (parse_half): New function.
  32         (operand_parse_code): Remove OP_Iffff.  Add OP_HALF.
  33         (parse_operands): Ditto.
  34         (do_mov16): Reject invalid relocations.
  35         (do_t_mov16): Ditto.  Use Thumb reloc numbers.
  36         (insns): Replace Iffff with HALF.
  37         (md_apply_fix): Add MOVW and MOVT relocs.
  38         (tc_gen_reloc): Ditto.
  39         * doc/c-arm.texi: Document relocation operators
  40
  41 2006-05-11  Paul Brook  <paul@codesourcery.com>
  42
  43         * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
  44
  45 2006-05-11  Thiemo Seufer  <ths@mips.com>
  46
  47         * config/tc-mips.c (append_insn): Don't check the range of j or
  48         jal addresses.
  49
  50 2006-05-11  Pedro Alves  <pedro_alves@portugalmail.pt>
  51
  52         * config/tc-arm.c (md_pcrel_from_section): Force a bias for
  53         relocs against external symbols for WinCE targets.
  54         (md_apply_fix): Likewise.
  55
  56 2006-05-09  David Ung  <davidu@mips.com>
  57
  58         * config/tc-mips.c (append_insn): Only warn about an out-of-range
  59         j or jal address.
  60
  61 2006-05-09  Nick Clifton  <nickc@redhat.com>
  62
  63         * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
  64         against symbols which are not going to be placed into the symbol
  65         table.
  66
  67 2006-05-09  Ben Elliston  <bje@au.ibm.com>
  68
  69         * expr.c (operand): Remove `if (0 && ..)' statement and
  70         subsequently unused target_op label.  Collapse `if (1 || ..)'
  71         statement.
  72         * app.c (do_scrub_chars): Remove unused case 0, as it is handled
  73         separately above the switch.
  74
  75 2006-05-08  Nick Clifton  <nickc@redhat.com>
  76
  77         PR gas/2623
  78         * config/tc-msp430.c (line_separator_character): Define as |.
  79
  80 2006-05-08  Thiemo Seufer  <ths@mips.com>
  81             Nigel Stephens  <nigel@mips.com>
  82             David Ung  <davidu@mips.com>
  83
  84         * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
  85         (mips_opts): Likewise.
  86         (file_ase_smartmips): New variable.
  87         (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
  88         (macro_build): Handle SmartMIPS instructions.
  89         (mips_ip): Likewise.
  90         (md_longopts): Add argument handling for smartmips.
  91         (md_parse_options, mips_after_parse_args): Likewise.
  92         (s_mipsset): Add .set smartmips support.
  93         (md_show_usage): Document -msmartmips/-mno-smartmips.
  94         * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
  95         .set smartmips.
  96         * doc/c-mips.texi: Likewise.
  97
  98 2006-05-08  Alan Modra  <amodra@bigpond.net.au>
  99
 100         * write.c (relax_segment): Add pass count arg.  Don't error on
 101         negative org/space on first two passes.
 102         (relax_seg_info): New struct.
 103         (relax_seg, write_object_file): Adjust.
 104         * write.h (relax_segment): Update prototype.
 105
 106 2006-05-05  Julian Brown  <julian@codesourcery.com>
 107
 108         * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
 109         checking.
 110         (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
 111         architecture version checks.
 112         (insns): Allow overlapping instructions to be used in VFP mode.
 113
 114 2006-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 115
 116         PR gas/2598
 117         * config/obj-elf.c (obj_elf_change_section): Allow user
 118         specified SHF_ALPHA_GPREL.
 119
 120 2006-05-05  Bjoern Haase  <bjoern.m.haase@web.de>
 121
 122         * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define.  Disable fixups
 123         for PMEM related expressions.
 124
 125 2006-05-05  Nick Clifton  <nickc@redhat.com>
 126
 127         PR gas/2582
 128         * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro.  Handles the
 129         insertion of a directory separator character into a string at a
 130         given offset.  Uses heuristics to decide when to use a backslash
 131         character rather than a forward-slash character.
 132         (dwarf2_directive_loc): Use the macro.
 133         (out_debug_info): Likewise.
 134
 135 2006-05-05  Thiemo Seufer  <ths@mips.com>
 136             David Ung  <davidu@mips.com>
 137
 138         * config/tc-mips.c (macro_build): Add case 'k' to handle cache
 139         instruction.
 140         (macro): Add new case M_CACHE_AB.
 141
 142 2006-05-04  Kazu Hirata  <kazu@codesourcery.com>
 143
 144         * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
 145         (opcode_lookup): Issue a warning for opcode with
 146         OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
 147         identical to OT_cinfix3.
 148         (TxC3w, TC3w, tC3w): New.
 149         (insns): Use tC3w and TC3w for comparison instructions with
 150         's' suffix.
 151
 152 2006-05-04  Alan Modra  <amodra@bigpond.net.au>
 153
 154         * subsegs.h (struct frchain): Delete frch_seg.
 155         (frchain_root): Delete.
 156         (seg_info): Define as macro.
 157         * subsegs.c (frchain_root): Delete.
 158         (abs_seg_info, und_seg_info, absolute_frchain): Delete.
 159         (subsegs_begin, subseg_change): Adjust for above.
 160         (subseg_set_rest): Likewise.  Add new frchain structs to seginfo
 161         rather than to one big list.
 162         (subseg_get): Don't special case abs, und sections.
 163         (subseg_new, subseg_force_new): Don't set frchainP here.
 164         (seg_info): Delete.
 165         (subsegs_print_statistics): Adjust frag chain control list traversal.
 166         * debug.c (dmp_frags):  Likewise.
 167         * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
 168         at frchain_root.  Make use of known frchain ordering.
 169         (last_frag_for_seg): Likewise.
 170         (get_frag_fix): Likewise.  Add seg param.
 171         (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
 172         * write.c (chain_frchains_together_1): Adjust for struct frchain.
 173         (SUB_SEGMENT_ALIGN): Likewise.
 174         (subsegs_finish): Adjust frchain list traversal.
 175         * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
 176         (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
 177         (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
 178         (xtensa_fix_b_j_loop_end_frags): Likewise.
 179         (xtensa_fix_close_loop_end_frags): Likewise.
 180         (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
 181         (retrieve_segment_info): Delete frch_seg initialisation.
 182
 183 2006-05-03  Alan Modra  <amodra@bigpond.net.au>
 184
 185         * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
 186         * config/obj-elf.h (obj_sec_set_private_data): Delete.
 187         * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
 188         * config/tc-mn10300.c (tc_gen_reloc): Likewise.
 189
 190 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
 191
 192         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
 193         here.
 194         (md_apply_fix3): Multiply offset by 4 here for
 195         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
 196
 197 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 198             Jan Beulich  <jbeulich@novell.com>
 199
 200         * config/tc-i386.c (output_invalid_buf): Change size for
 201         unsigned char.
 202         * config/tc-tic30.c (output_invalid_buf): Likewise.
 203
 204         * config/tc-i386.c (output_invalid): Cast none-ascii char to
 205         unsigned char.
 206         * config/tc-tic30.c (output_invalid): Likewise.
 207
 208 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
 209
 210         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
 211         (TEXI2POD): Use AM_MAKEINFOFLAGS.
 212         (asconfig.texi): Don't set top_srcdir.
 213         * doc/as.texinfo: Don't use top_srcdir.
 214         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
 215
 216 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 217
 218         * config/tc-i386.c (output_invalid_buf): Change size to 16.
 219         * config/tc-tic30.c (output_invalid_buf): Likewise.
 220
 221         * config/tc-i386.c (output_invalid): Use snprintf instead of
 222         sprintf.
 223         * config/tc-ia64.c (declare_register_set): Likewise.
 224         (emit_one_bundle): Likewise.
 225         (check_dependencies): Likewise.
 226         * config/tc-tic30.c (output_invalid): Likewise.
 227
 228 2006-05-02  Paul Brook  <paul@codesourcery.com>
 229
 230         * config/tc-arm.c (arm_optimize_expr): New function.
 231         * config/tc-arm.h (md_optimize_expr): Define
 232         (arm_optimize_expr): Add prototype.
 233         (TC_FORCE_RELOCATION_SUB_SAME): Define.
 234
 235 2006-05-02  Ben Elliston  <bje@au.ibm.com>
 236
 237         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
 238         field unsigned.
 239
 240         * sb.h (sb_list_vector): Move to sb.c.
 241         * sb.c (free_list): Use type of sb_list_vector directly.
 242         (sb_build): Fix off-by-one error in assertion about `size'.
 243
 244 2006-05-01  Ben Elliston  <bje@au.ibm.com>
 245
 246         * listing.c (listing_listing): Remove useless loop.
 247         * macro.c (macro_expand): Remove is_positional local variable.
 248         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
 249         and simplify surrounding expressions, where possible.
 250         (assign_symbol): Likewise.
 251         (s_weakref): Likewise.
 252         * symbols.c (colon): Likewise.
 253
 254 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
 255
 256         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
 257
 258 2006-04-30  Thiemo Seufer  <ths@mips.com>
 259             David Ung  <davidu@mips.com>
 260
 261         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
 262         (mips_immed): New table that records various handling of udi
 263         instruction patterns.
 264         (mips_ip): Adds udi handling.
 265
 266 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
 267
 268         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
 269         of list rather than beginning.
 270
 271 2006-04-26  Julian Brown  <julian@codesourcery.com>
 272
 273         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
 274         (is_quarter_float): Rename from above. Simplify slightly.
 275         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
 276         number.
 277         (parse_neon_mov): Parse floating-point constants.
 278         (neon_qfloat_bits): Fix encoding.
 279         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
 280         preference to integer encoding when using the F32 type.
 281
 282 2006-04-26  Julian Brown  <julian@codesourcery.com>
 283
 284         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
 285         zero-initialising structures containing it will lead to invalid types).
 286         (arm_it): Add vectype to each operand.
 287         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
 288         defined field.
 289         (neon_typed_alias): New structure. Extra information for typed
 290         register aliases.
 291         (reg_entry): Add neon type info field.
 292         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 293         Break out alternative syntax for coprocessor registers, etc. into...
 294         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 295         out from arm_reg_parse.
 296         (parse_neon_type): Move. Return SUCCESS/FAIL.
 297         (first_error): New function. Call to ensure first error which occurs is
 298         reported.
 299         (parse_neon_operand_type): Parse exactly one type.
 300         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 301         (parse_typed_reg_or_scalar): New function. Handle core of both
 302         arm_typed_reg_parse and parse_scalar.
 303         (arm_typed_reg_parse): Parse a register with an optional type.
 304         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 305         result.
 306         (parse_scalar): Parse a Neon scalar with optional type.
 307         (parse_reg_list): Use first_error.
 308         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 309         (neon_alias_types_same): New function. Return true if two (alias) types
 310         are the same.
 311         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 312         of elements.
 313         (insert_reg_alias): Return new reg_entry not void.
 314         (insert_neon_reg_alias): New function. Insert type/index information as
 315         well as register for alias.
 316         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 317         make typed register aliases accordingly.
 318         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 319         of line.
 320         (s_unreq): Delete type information if present.
 321         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 322         (s_arm_unwind_save_mmxwcg): Likewise.
 323         (s_arm_unwind_movsp): Likewise.
 324         (s_arm_unwind_setfp): Likewise.
 325         (parse_shift): Likewise.
 326         (parse_shifter_operand): Likewise.
 327         (parse_address): Likewise.
 328         (parse_tb): Likewise.
 329         (tc_arm_regname_to_dw2regnum): Likewise.
 330         (md_pseudo_table): Add dn, qn.
 331         (parse_neon_mov): Handle typed operands.
 332         (parse_operands): Likewise.
 333         (neon_type_mask): Add N_SIZ.
 334         (N_ALLMODS): New macro.
 335         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 336         (el_type_of_type_chk): Add some safeguards.
 337         (modify_types_allowed): Fix logic bug.
 338         (neon_check_type): Handle operands with types.
 339         (neon_three_same): Remove redundant optional arg handling.
 340         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 341         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 342         (do_neon_step): Adjust accordingly.
 343         (neon_cmode_for_logic_imm): Use first_error.
 344         (do_neon_bitfield): Call neon_check_type.
 345         (neon_dyadic): Rename to...
 346         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 347         to allow modification of type of the destination.
 348         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 349         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 350         (do_neon_compare): Make destination be an untyped bitfield.
 351         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 352         (neon_mul_mac): Return early in case of errors.
 353         (neon_move_immediate): Use first_error.
 354         (neon_mac_reg_scalar_long): Fix type to include scalar.
 355         (do_neon_dup): Likewise.
 356         (do_neon_mov): Likewise (in several places).
 357         (do_neon_tbl_tbx): Fix type.
 358         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 359         (do_neon_ld_dup): Exit early in case of errors and/or use
 360         first_error.
 361         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 362         Handle .dn/.qn directives.
 363         (REGDEF): Add zero for reg_entry neon field.
 364
 365 2006-04-26  Julian Brown  <julian@codesourcery.com>
 366
 367         * config/tc-arm.c (limits.h): Include.
 368         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 369         (fpu_vfp_v3_or_neon_ext): Declare constants.
 370         (neon_el_type): New enumeration of types for Neon vector elements.
 371         (neon_type_el): New struct. Define type and size of a vector element.
 372         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 373         instruction.
 374         (neon_type): Define struct. The type of an instruction.
 375         (arm_it): Add 'vectype' for the current instruction.
 376         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 377         (vfp_sp_reg_pos): Rename to...
 378         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 379         tags.
 380         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 381         (Neon D or Q register).
 382         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 383         register.
 384         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 385         (my_get_expression): Allow above constant as argument to accept
 386         64-bit constants with optional prefix.
 387         (arm_reg_parse): Add extra argument to return the specific type of
 388         register in when either a D or Q register (REG_TYPE_NDQ) is
 389         requested. Can be NULL.
 390         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 391         (parse_reg_list): Update for new arm_reg_parse args.
 392         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 393         (parse_neon_el_struct_list): New function. Parse element/structure
 394         register lists for VLD<n>/VST<n> instructions.
 395         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 396         (s_arm_unwind_save_mmxwr): Likewise.
 397         (s_arm_unwind_save_mmxwcg): Likewise.
 398         (s_arm_unwind_movsp): Likewise.
 399         (s_arm_unwind_setfp): Likewise.
 400         (parse_big_immediate): New function. Parse an immediate, which may be
 401         64 bits wide. Put results in inst.operands[i].
 402         (parse_shift): Update for new arm_reg_parse args.
 403         (parse_address): Likewise. Add parsing of alignment specifiers.
 404         (parse_neon_mov): Parse the operands of a VMOV instruction.
 405         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 406         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 407         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 408         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 409         (parse_operands): Handle new codes above.
 410         (encode_arm_vfp_sp_reg): Rename to...
 411         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 412         selected VFP version only supports D0-D15.
 413         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 414         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 415         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 416         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 417         encode_arm_vfp_reg name, and allow 32 D regs.
 418         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 419         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 420         regs.
 421         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 422         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 423         constant-load and conversion insns introduced with VFPv3.
 424         (neon_tab_entry): New struct.
 425         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 426         those which are the targets of pseudo-instructions.
 427         (neon_opc): Enumerate opcodes, use as indices into...
 428         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 429         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 430         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 431         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 432         neon_enc_tab.
 433         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 434         Neon instructions.
 435         (neon_type_mask): New. Compact type representation for type checking.
 436         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 437         permitted type combinations.
 438         (N_IGNORE_TYPE): New macro.
 439         (neon_check_shape): New function. Check an instruction shape for
 440         multiple alternatives. Return the specific shape for the current
 441         instruction.
 442         (neon_modify_type_size): New function. Modify a vector type and size,
 443         depending on the bit mask in argument 1.
 444         (neon_type_promote): New function. Convert a given "key" type (of an
 445         operand) into the correct type for a different operand, based on a bit
 446         mask.
 447         (type_chk_of_el_type): New function. Convert a type and size into the
 448         compact representation used for type checking.
 449         (el_type_of_type_ckh): New function. Reverse of above (only when a
 450         single bit is set in the bit mask).
 451         (modify_types_allowed): New function. Alter a mask of allowed types
 452         based on a bit mask of modifications.
 453         (neon_check_type): New function. Check the type of the current
 454         instruction against the variable argument list. The "key" type of the
 455         instruction is returned.
 456         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 457         a Neon data-processing instruction depending on whether we're in ARM
 458         mode or Thumb-2 mode.
 459         (neon_logbits): New function.
 460         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 461         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 462         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 463         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 464         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 465         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 466         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 467         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 468         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 469         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 470         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 471         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 472         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 473         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 474         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 475         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 476         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 477         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 478         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 479         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 480         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 481         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 482         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 483         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 484         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 485         helpers.
 486         (parse_neon_type): New function. Parse Neon type specifier.
 487         (opcode_lookup): Allow parsing of Neon type specifiers.
 488         (REGNUM2, REGSETH, REGSET2): New macros.
 489         (reg_names): Add new VFPv3 and Neon registers.
 490         (NUF, nUF, NCE, nCE): New macros for opcode table.
 491         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 492         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 493         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 494         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 495         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 496         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 497         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 498         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 499         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 500         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 501         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 502         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 503         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 504         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 505         fto[us][lh][sd].
 506         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 507         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 508         (arm_option_cpu_value): Add vfp3 and neon.
 509         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 510         VFPv1 attribute.
 511
 512 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 513
 514         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 515         syntax instead of hardcoded opcodes with ".w18" suffixes.
 516         (wide_branch_opcode): New.
 517         (build_transition): Use it to check for wide branch opcodes with
 518         either ".w18" or ".w15" suffixes.
 519
 520 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 521
 522         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 523         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 524         frag's is_literal flag.
 525
 526 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 527
 528         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 529
 530 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 531
 532         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 533         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 534         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 535         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 536         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 537
 538 2005-04-20  Paul Brook  <paul@codesourcery.com>
 539
 540         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 541         all targets.
 542         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 543
 544 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 545
 546         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 547         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 548         Make some cpus unsupported on ELF.  Run "make dep-am".
 549         * Makefile.in: Regenerate.
 550
 551 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 552
 553         * configure.in (--enable-targets): Indent help message.
 554         * configure: Regenerate.
 555
 556 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 557
 558         PR gas/2533
 559         * config/tc-i386.c (i386_immediate): Check illegal immediate
 560         register operand.
 561
 562 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 563
 564         * config/tc-i386.c: Formatting.
 565         (output_disp, output_imm): ISO C90 params.
 566
 567         * frags.c (frag_offset_fixed_p): Constify args.
 568         * frags.h (frag_offset_fixed_p): Ditto.
 569
 570         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 571         (COFF_MAGIC): Delete.
 572
 573         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 574
 575 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 576
 577         * po/POTFILES.in: Regenerated.
 578
 579 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 580
 581         * doc/as.texinfo: Mention that some .type syntaxes are not
 582         supported on all architectures.
 583
 584 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 585
 586         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 587         instructions when such transformations have been disabled.
 588
 589 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 590
 591         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 592         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 593         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 594         decoding the loop instructions.  Remove current_offset variable.
 595         (xtensa_fix_short_loop_frags): Likewise.
 596         (min_bytes_to_other_loop_end): Remove current_offset argument.
 597
 598 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 599
 600         * config/tc-z80.c (z80_optimize_expr): Removed.
 601         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 602
 603 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 604
 605         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 606         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 607         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 608         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 609         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 610         at90can64, at90usb646, at90usb647, at90usb1286 and
 611         at90usb1287.
 612         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 613
 614 2006-04-07  Paul Brook  <paul@codesourcery.com>
 615
 616         * config/tc-arm.c (parse_operands): Set default error message.
 617
 618 2006-04-07  Paul Brook  <paul@codesourcery.com>
 619
 620         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 621
 622 2006-04-07  Paul Brook  <paul@codesourcery.com>
 623
 624         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 625
 626 2006-04-07  Paul Brook  <paul@codesourcery.com>
 627
 628         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 629         (move_or_literal_pool): Handle Thumb-2 instructions.
 630         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 631
 632 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 633
 634         PR 2512.
 635         * config/tc-i386.c (match_template): Move 64-bit operand tests
 636         inside loop.
 637
 638 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 639
 640         * po/Make-in: Add install-html target.
 641         * Makefile.am: Add install-html and install-html-recursive targets.
 642         * Makefile.in: Regenerate.
 643         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 644         * configure: Regenerate.
 645         * doc/Makefile.am: Add install-html and install-html-am targets.
 646         * doc/Makefile.in: Regenerate.
 647
 648 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 649
 650         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 651         second scan.
 652
 653 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 654             Daniel Jacobowitz  <dan@codesourcery.com>
 655
 656         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 657         (GOTT_BASE, GOTT_INDEX): New.
 658         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 659         GOTT_INDEX when generating VxWorks PIC.
 660         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 661         use the generic *-*-vxworks* stanza instead.
 662
 663 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 664
 665         PR 997
 666         * frags.c (frag_offset_fixed_p): New function.
 667         * frags.h (frag_offset_fixed_p): Declare.
 668         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 669         (resolve_expression): Likewise.
 670
 671 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 672
 673         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 674         of the same length but different numbers of slots.
 675
 676 2006-03-30  Andreas Schwab  <schwab@suse.de>
 677
 678         * configure.in: Fix help string for --enable-targets option.
 679         * configure: Regenerate.
 680
 681 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 682
 683         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 684         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 685         overrun and avoid excessive copying.
 686
 687         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 688         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 689         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 690         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 691         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 692         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 693         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 694         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 695         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 696         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 697         (struct m68k_cpu): Change chip field to control_regs.
 698         (current_chip): Remove.
 699         (control_regs): New.
 700         (m68k_archs, m68k_extensions): Adjust.
 701         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 702         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 703         (find_cf_chip): Reimplement for new organization of cpu table.
 704         (select_control_regs): Remove.
 705         (mri_chip): Adjust.
 706         (struct save_opts): Save control regs, not chip.
 707         (s_save, s_restore): Adjust.
 708         (m68k_lookup_cpu): Give deprecated warning when necessary.
 709         (m68k_init_arch): Adjust.
 710         (md_show_usage): Adjust for new cpu table organization.
 711
 712 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 713
 714         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 715         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 716         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 717         "elf/bfin.h".
 718         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 719         (any_gotrel): New rule.
 720         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 721         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 722         "elf/bfin.h".
 723         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 724         (bfin_pic_ptr): New function.
 725         (md_pseudo_table): Add it for ".picptr".
 726         (OPTION_FDPIC): New macro.
 727         (md_longopts): Add -mfdpic.
 728         (md_parse_option): Handle it.
 729         (md_begin): Set BFD flags.
 730         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 731         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 732         us for GOT relocs.
 733         * Makefile.am (bfin-parse.o): Update dependencies.
 734         (DEPTC_bfin_elf): Likewise.
 735         * Makefile.in: Regenerate.
 736
 737 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 738
 739         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 740         mcfemac instead of mcfmac.
 741
 742 2006-03-23  Michael Matz  <matz@suse.de>
 743
 744         * config/tc-i386.c (type_names): Correct placement of 'static'.
 745         (reloc): Map some more relocs to their 64 bit counterpart when
 746         size is 8.
 747         (output_insn): Work around breakage if DEBUG386 is defined.
 748         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 749         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 750         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 751         different from i386.
 752         (output_imm): Ditto.
 753         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 754         Imm64.
 755         (md_convert_frag): Jumps can now be larger than 2GB away, error
 756         out in that case.
 757         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 758         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 759
 760 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 761             Daniel Jacobowitz  <dan@codesourcery.com>
 762             Phil Edwards  <phil@codesourcery.com>
 763             Zack Weinberg  <zack@codesourcery.com>
 764             Mark Mitchell  <mark@codesourcery.com>
 765             Nathan Sidwell  <nathan@codesourcery.com>
 766
 767         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 768         (md_begin): Complain about -G being used for PIC.  Don't change
 769         the text, data and bss alignments on VxWorks.
 770         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 771         generating VxWorks PIC.
 772         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 773         (macro): Likewise, but do not treat la $25 specially for
 774         VxWorks PIC, and do not handle jal.
 775         (OPTION_MVXWORKS_PIC): New macro.
 776         (md_longopts): Add -mvxworks-pic.
 777         (md_parse_option): Don't complain about using PIC and -G together here.
 778         Handle OPTION_MVXWORKS_PIC.
 779         (md_estimate_size_before_relax): Always use the first relaxation
 780         sequence on VxWorks.
 781         * config/tc-mips.h (VXWORKS_PIC): New.
 782
 783 2006-03-21  Paul Brook  <paul@codesourcery.com>
 784
 785         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 786
 787 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 788
 789         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 790         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 791         (get_loop_align_size): New.
 792         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 793         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 794         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 795         (get_noop_aligned_address): Use get_loop_align_size.
 796         (get_aligned_diff): Likewise.
 797
 798 2006-03-21  Paul Brook  <paul@codesourcery.com>
 799
 800         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 801
 802 2006-03-20  Paul Brook  <paul@codesourcery.com>
 803
 804         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 805         (do_t_branch): Encode branches inside IT blocks as unconditional.
 806         (do_t_cps): New function.
 807         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 808         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 809         (opcode_lookup): Allow conditional suffixes on all instructions in
 810         Thumb mode.
 811         (md_assemble): Advance condexec state before checking for errors.
 812         (insns): Use do_t_cps.
 813
 814 2006-03-20  Paul Brook  <paul@codesourcery.com>
 815
 816         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 817         outputting the insn.
 818
 819 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 820
 821         * config/tc-vax.c: Update copyright year.
 822         * config/tc-vax.h: Likewise.
 823
 824 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 825
 826         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 827         make it static.
 828         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 829
 830 2006-03-17  Paul Brook  <paul@codesourcery.com>
 831
 832         * config/tc-arm.c (insns): Add ldm and stm.
 833
 834 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 835
 836         PR gas/2446
 837         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 838
 839 2006-03-16  Paul Brook  <paul@codesourcery.com>
 840
 841         * config/tc-arm.c (insns): Add "svc".
 842
 843 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 844
 845         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 846         flag and avoid double underscore prefixes.
 847
 848 2006-03-10  Paul Brook  <paul@codesourcery.com>
 849
 850         * config/tc-arm.c (md_begin): Handle EABIv5.
 851         (arm_eabis): Add EF_ARM_EABI_VER5.
 852         * doc/c-arm.texi: Document -meabi=5.
 853
 854 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 855
 856         * app.c (do_scrub_chars): Simplify string handling.
 857
 858 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 859             Daniel Jacobowitz  <dan@codesourcery.com>
 860             Zack Weinberg  <zack@codesourcery.com>
 861             Nathan Sidwell  <nathan@codesourcery.com>
 862             Paul Brook  <paul@codesourcery.com>
 863             Ricardo Anguiano  <anguiano@codesourcery.com>
 864             Phil Edwards  <phil@codesourcery.com>
 865
 866         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 867         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 868         R_ARM_ABS12 reloc.
 869         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 870         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 871         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 872
 873 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 874
 875         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 876         even when using the text-section-literals option.
 877
 878 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 879
 880         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 881         and cf.
 882         (m68k_ip): <case 'J'> Check we have some control regs.
 883         (md_parse_option): Allow raw arch switch.
 884         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 885         whether 68881 or cfloat was meant by -mfloat.
 886         (md_show_usage): Adjust extension display.
 887         (m68k_elf_final_processing): Adjust.
 888
 889 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 890
 891         * config/tc-avr.c (avr_mod_hash_value): New function.
 892         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 893         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 894         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 895         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 896         of (int).
 897         (tc_gen_reloc): Handle substractions of symbols, if possible do
 898         fixups, abort otherwise.
 899         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 900         tc_fix_adjustable): Define.
 901
 902 2006-03-02  James E Wilson  <wilson@specifix.com>
 903
 904         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 905         change the template, then clear md.slot[curr].end_of_insn_group.
 906
 907 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 908
 909         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 910
 911 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 912
 913         PR/1070
 914         * macro.c (getstring): Don't treat parentheses special anymore.
 915         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 916         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 917         characters.
 918
 919 2006-02-28  Mat <mat@csail.mit.edu>
 920
 921         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 922
 923 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 924
 925         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 926         field.
 927         (CFI_signal_frame): Define.
 928         (cfi_pseudo_table): Add .cfi_signal_frame.
 929         (dot_cfi): Handle CFI_signal_frame.
 930         (output_cie): Handle cie->signal_frame.
 931         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 932         different.  Copy signal_frame from FDE to newly created CIE.
 933         * doc/as.texinfo: Document .cfi_signal_frame.
 934
 935 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 936
 937         * doc/Makefile.am: Add html target.
 938         * doc/Makefile.in: Regenerate.
 939         * po/Make-in: Add html target.
 940
 941 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 942
 943         * config/tc-i386.c (output_insn): Support Intel Merom New
 944         Instructions.
 945
 946         * config/tc-i386.h (CpuMNI): New.
 947         (CpuUnknownFlags): Add CpuMNI.
 948
 949 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 950
 951         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 952         (hpriv_reg_table): New table for hyperprivileged registers.
 953         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 954         register encoding.
 955
 956 2006-02-24  DJ Delorie  <dj@redhat.com>
 957
 958         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 959         (tc_gen_reloc): Don't define.
 960         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 961         (OPTION_LINKRELAX): New.
 962         (md_longopts): Add it.
 963         (m32c_relax): New.
 964         (md_parse_options): Set it.
 965         (md_assemble): Emit relaxation relocs as needed.
 966         (md_convert_frag): Emit relaxation relocs as needed.
 967         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 968         (m32c_apply_fix): New.
 969         (tc_gen_reloc): New.
 970         (m32c_force_relocation): Force out jump relocs when relaxing.
 971         (m32c_fix_adjustable): Return false if relaxing.
 972
 973 2006-02-24  Paul Brook  <paul@codesourcery.com>
 974
 975         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 976         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 977         (struct asm_barrier_opt): Define.
 978         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 979         (parse_psr): Accept V7M psr names.
 980         (parse_barrier): New function.
 981         (enum operand_parse_code): Add OP_oBARRIER.
 982         (parse_operands): Implement OP_oBARRIER.
 983         (do_barrier): New function.
 984         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 985         (do_t_cpsi): Add V7M restrictions.
 986         (do_t_mrs, do_t_msr): Validate V7M variants.
 987         (md_assemble): Check for NULL variants.
 988         (v7m_psrs, barrier_opt_names): New tables.
 989         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 990         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 991         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 992         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 993         (struct cpu_arch_ver_table): Define.
 994         (cpu_arch_ver): New.
 995         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 996         Tag_CPU_arch_profile.
 997         * doc/c-arm.texi: Document new cpu and arch options.
 998
 999 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
1000
1001         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1002
1003 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
1004
1005         * config/tc-ia64.c: Update copyright years.
1006
1007 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
1008
1009         * config/tc-ia64.c (specify_resource): Add the rule 17 from
1010         SDM 2.2.
1011
1012 2005-02-22  Paul Brook  <paul@codesourcery.com>
1013
1014         * config/tc-arm.c (do_pld): Remove incorrect write to
1015         inst.instruction.
1016         (encode_thumb32_addr_mode): Use correct operand.
1017
1018 2006-02-21  Paul Brook  <paul@codesourcery.com>
1019
1020         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1021
1022 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
1023             Anil Paranjape   <anilp1@kpitcummins.com>
1024             Shilin Shakti    <shilins@kpitcummins.com>
1025
1026         * Makefile.am: Add xc16x related entry.
1027         * Makefile.in: Regenerate.
1028         * configure.in: Added xc16x related entry.
1029         * configure: Regenerate.
1030         * config/tc-xc16x.h: New file
1031         * config/tc-xc16x.c: New file
1032         * doc/c-xc16x.texi: New file for xc16x
1033         * doc/all.texi: Entry for xc16x
1034         * doc/Makefile.texi: Added c-xc16x.texi
1035         * NEWS: Announce the support for the new target.
1036
1037 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
1038
1039         * configure.tgt: set emulation for mips-*-netbsd*
1040
1041 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
1042
1043         * config.in: Rebuilt.
1044
1045 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
1046
1047         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1048         from 1, not 0, in error messages.
1049         (md_assemble): Simplify special-case check for ENTRY instructions.
1050         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1051         operand in error message.
1052
1053 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
1054
1055         * configure.tgt (arm-*-linux-gnueabi*): Change to
1056         arm-*-linux-*eabi*.
1057
1058 2006-02-10  Nick Clifton  <nickc@redhat.com>
1059
1060         * config/tc-crx.c (check_range): Ensure that the sign bit of a
1061         32-bit value is propagated into the upper bits of a 64-bit long.
1062
1063         * config/tc-arc.c (init_opcode_tables): Fix cast.
1064         (arc_extoper, md_operand): Likewise.
1065
1066 2006-02-09  David Heine  <dlheine@tensilica.com>
1067
1068         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1069         each relaxation step.
1070
1071 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
1072
1073         * configure.in (CHECK_DECLS): Add vsnprintf.
1074         * configure: Regenerate.
1075         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1076         include/declare here, but...
1077         * as.h: Move code detecting VARARGS idiom to the top.
1078         (errno.h, stdarg.h, varargs.h, va_list): ...here.
1079         (vsnprintf): Declare if not already declared.
1080
1081 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
1082
1083         * as.c (close_output_file): New.
1084         (main): Register close_output_file with xatexit before
1085         dump_statistics. Don't call output_file_close.
1086
1087 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
1088
1089         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1090         mcf5329_control_regs): New.
1091         (not_current_architecture, selected_arch, selected_cpu): New.
1092         (m68k_archs, m68k_extensions): New.
1093         (archs): Renamed to ...
1094         (m68k_cpus): ... here.  Adjust.
1095         (n_arches): Remove.
1096         (md_pseudo_table): Add arch and cpu directives.
1097         (find_cf_chip, m68k_ip): Adjust table scanning.
1098         (no_68851, no_68881): Remove.
1099         (md_assemble): Lazily initialize.
1100         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1101         (md_init_after_args): Move functionality to m68k_init_arch.
1102         (mri_chip): Adjust table scanning.
1103         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1104         options with saner parsing.
1105         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1106         m68k_init_arch): New.
1107         (s_m68k_cpu, s_m68k_arch): New.
1108         (md_show_usage): Adjust.
1109         (m68k_elf_final_processing): Set CF EF flags.
1110         * config/tc-m68k.h (m68k_init_after_args): Remove.
1111         (tc_init_after_args): Remove.
1112         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1113         (M68k-Directives): Document .arch and .cpu directives.
1114
1115 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
1116
1117         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1118         synonyms for equ and defl.
1119         (z80_cons_fix_new): New function.
1120         (emit_byte): Disallow relative jumps to absolute locations.
1121         (emit_data): Only handle defb, prototype changed, because defb is
1122         now handled as pseudo-op rather than an instruction.
1123         (instab): Entries for defb,defw,db,dw moved from here...
1124         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1125         Add entries for def24,def32,d24,d32.
1126         (md_assemble): Improved error handling.
1127         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1128         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1129         (z80_cons_fix_new): Declare.
1130         * doc/c-z80.texi (defb, db): Mention warning on overflow.
1131         (def24,d24,def32,d32): New pseudo-ops.
1132
1133 2006-02-02  Paul Brook  <paul@codesourcery.com>
1134
1135         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1136
1137 2005-02-02  Paul Brook  <paul@codesourcery.com>
1138
1139         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1140         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1141         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1142         T2_OPCODE_RSB): Define.
1143         (thumb32_negate_data_op): New function.
1144         (md_apply_fix): Use it.
1145
1146 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
1147
1148         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1149         fields.
1150         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1151         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1152         subtracted symbols.
1153         (relaxation_requirements): Add pfinish_frag argument and use it to
1154         replace setting tinsn->record_fix fields.
1155         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1156         and vinsn_to_insnbuf.  Remove references to record_fix and
1157         slot_sub_symbols fields.
1158         (xtensa_mark_narrow_branches): Delete unused code.
1159         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1160         a symbol.
1161         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1162         record_fix fields.
1163         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1164         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1165         of the record_fix field.  Simplify error messages for unexpected
1166         symbolic operands.
1167         (set_expr_symbol_offset_diff): Delete.
1168
1169 2006-01-31  Paul Brook  <paul@codesourcery.com>
1170
1171         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1172
1173 2006-01-31  Paul Brook  <paul@codesourcery.com>
1174         Richard Earnshaw <rearnsha@arm.com>
1175
1176         * config/tc-arm.c: Use arm_feature_set.
1177         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1178         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1179         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1180         New variables.
1181         (insns): Use them.
1182         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1183         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1184         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1185         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1186         feature flags.
1187         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1188         (arm_opts): Move old cpu/arch options from here...
1189         (arm_legacy_opts): ... to here.
1190         (md_parse_option): Search arm_legacy_opts.
1191         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1192         (arm_float_abis, arm_eabis): Make const.
1193
1194 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1195
1196         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1197
1198 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1199
1200         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1201         in load immediate intruction.
1202
1203 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1204
1205         * config/bfin-parse.y (value_match): Use correct conversion
1206         specifications in template string for __FILE__ and __LINE__.
1207         (binary): Ditto.
1208         (unary): Ditto.
1209
1210 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1211
1212         Introduce TLS descriptors for i386 and x86_64.
1213         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1214         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1215         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1216         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1217         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1218         displacement bits.
1219         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1220         (lex_got): Handle @tlsdesc and @tlscall.
1221         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1222
1223 2006-01-11  Nick Clifton  <nickc@redhat.com>
1224
1225         Fixes for building on 64-bit hosts:
1226         * config/tc-avr.c (mod_index): New union to allow conversion
1227         between pointers and integers.
1228         (md_begin, avr_ldi_expression): Use it.
1229         * config/tc-i370.c (md_assemble): Add cast for argument to print
1230         statement.
1231         * config/tc-tic54x.c (subsym_substitute): Likewise.
1232         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1233         opindex field of fr_cgen structure into a pointer so that it can
1234         be stored in a frag.
1235         * config/tc-mn10300.c (md_assemble): Likewise.
1236         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1237         types.
1238         * config/tc-v850.c: Replace uses of (int) casts with correct
1239         types.
1240
1241 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1242
1243         PR gas/2117
1244         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1245
1246 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1247
1248         PR gas/2101
1249         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1250         a local-label reference.
1251
1252 For older changes see ChangeLog-2005
1253 \f
1254 Local Variables:
1255 mode: change-log
1256 left-margin: 8
1257 fill-column: 74
1258 version-control: never
1259 End: