1 2013-11-19 Alexey Makhalov <makhaloff@gmail.com>
4 * app.c (do_scrub_chars): Only insert a newline character if
5 end-of-file has been reached.
7 2013-11-18 H.J. Lu <hongjiu.lu@intel.com>
9 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
12 2013-11-18 Renlin Li <Renlin.Li@arm.com>
14 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
15 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
16 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
17 (cpu_arch_ver): Likewise.
18 * doc/c-arm.texi: Document armv7ve.
20 2013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
22 * config/tc-aarch64.c (parse_sys_reg): Support
23 S2_<op1>_<Cn>_<Cm>_<op2>.
25 2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
29 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
31 * config/tc-aarch64.c (set_other_error): New function.
32 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
33 the variable to which it points with 'o'.
34 (parse_operands): Update; check for write to read-only system
35 registers or read from write-only ones.
37 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
39 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
40 indicate if instruction has the BND prefix. Return
41 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
42 bnd_prefix isn't zero.
43 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
45 (output_jump): Update reloc call.
46 (output_interseg_jump): Likewise.
47 (output_disp): Likewise.
48 (output_imm): Likewise.
49 (x86_cons_fix_new): Likewise.
50 (lex_got): Add an argument, bnd_prefix, to indicate if
51 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
53 (x86_cons): Update lex_got call.
54 (i386_immediate): Likewise.
55 (i386_displacement): Likewise.
56 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
57 BFD_RELOC_X86_64_PLT32_BND.
58 (tc_gen_reloc): Likewise.
59 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
61 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
63 * config/tc-aarch64.c (set_other_error): New function.
64 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
65 the variable to which it points with 'o'.
66 (parse_operands): Update; check for write to read-only system
67 registers or read from write-only ones.
69 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
71 * config/tc-i386.c (check_VecOperands): Reorder checks.
73 2013-11-11 Catherine Moore <clm@codesourcery.com>
75 * config/mips/tc-mips.c (convert_reg_type): Use
76 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
77 (reg_needs_delay): Likewise.
78 (insns_between): Likewise.
80 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
82 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
84 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
86 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
87 call aarch64_sys_reg_deprecated_p and warn about the deprecated
90 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
92 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
94 2013-11-05 Will Newton <will.newton@linaro.org>
97 * config/tc-aarch64.c (parse_operands): Avoid trying to
98 parse a vector register as an immediate.
100 2013-11-04 Jan Beulich <jbeulich@suse.com>
102 * config/tc-i386.c (check_long_reg): Correct comment indentation.
103 (check_qword_reg): Correct comment and its indentation.
104 (check_word_reg): Extend comment and correct its indentation. Also
105 check for 64-bit register.
107 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
109 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
110 (ppc_elf_localentry): New function.
111 (ppc_force_relocation): Force relocs on all branches to localenty
113 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
115 2013-10-30 Alan Modra <amodra@gmail.com>
117 * config/tc-ppc.c: Include elf/ppc64.h.
118 (ppc_abiversion): New variable.
119 (md_pseudo_table): Add .abiversion.
120 (ppc_elf_abiversion, ppc_elf_end): New functions.
121 * config/tc-ppc.h (md_end): Define.
123 2013-10-30 Alan Modra <amodra@gmail.com>
125 * config/tc-ppc.c (SEX16): Don't mask.
126 (REPORT_OVERFLOW_HI): Define as zero.
127 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
128 @tprel@high, and @tprel@higha modifiers.
129 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
130 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
132 (md_apply_fix): Similarly.
134 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
136 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
137 (fpr_write_mask): Test MSA registers.
138 (can_swap_branch_p): Check fpr write followed by fpr read.
140 2013-10-18 Nick Clifton <nickc@redhat.com>
142 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
144 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
145 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
147 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
148 (md_longopts): Add mmsa and mno-msa.
149 (mips_ases): Add msa.
150 (RTYPE_MASK): Update.
151 (RTYPE_MSA): New define.
152 (OT_REG_ELEMENT): Replace with...
153 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
154 (mips_operand_token): Replace reg_element with index.
155 (mips_parse_argument_token): Treat vector indices as separate tokens.
156 Handle register indices.
157 (md_begin): Add MSA register names.
158 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
159 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
160 (match_mdmx_imm_reg_operand): Update accordingly.
161 (match_imm_index_operand): New function.
162 (match_reg_index_operand): New function.
163 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
164 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
165 (md_show_usage): Print -mmsa and -mno-msa.
166 * doc/as.texinfo: Document -mmsa and -mno-msa.
167 * doc/c-mips.texi: Document -mmsa and -mno-msa.
168 Document .set msa and .set nomsa.
170 2013-10-14 Nick Clifton <nickc@redhat.com>
172 * read.c (add_include_dir): Use xrealloc.
173 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
174 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
176 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
178 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
179 also test/refer to "sstatus". Reformat the warning message.
181 2013-10-10 Sean Keys <skeys@ipdatasys.com>
183 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
185 2013-10-10 Jan Beulich <jbeulich@suse.com>
187 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
188 swapping for bndmk, bndldx, and bndstx.
190 2013-10-09 Nick Clifton <nickc@redhat.com>
193 * config/tc-epiphany.c (md_convert_frag): Add missing break
197 * config/tc-mn10200.c (md_convert_frag): Add missing break
200 2013-10-08 Jan Beulich <jbeulich@suse.com>
202 * tc-i386.c (check_word_reg): Remove misplaced "else".
203 (check_long_reg): Restore symmetry with check_word_reg.
205 2013-10-08 Jan Beulich <jbeulich@suse.com>
207 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
210 2013-10-08 Nick Clifton <nickc@redhat.com>
212 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
213 for "<foo>a". Issue error messages for unrecognised or corrrupt
216 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
218 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
221 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
223 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
224 * doc/c-i386.texi: Add -march=bdver4 option.
226 2013-09-20 Alan Modra <amodra@gmail.com>
228 * configure: Regenerate.
230 2013-09-18 Tristan Gingold <gingold@adacore.com>
232 * NEWS: Add marker for 2.24.
234 2013-09-18 Nick Clifton <nickc@redhat.com>
236 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
237 (move_data): New variable.
238 (md_parse_option): Parse -md.
239 (msp430_section): New function. Catch references to the .bss or
240 .data sections and generate a special symbol for use by the libcrt
242 (md_pseudo_table): Intercept .section directives.
243 (md_longopt): Add -md
244 (md_show_usage): Likewise.
245 (msp430_operands): Generate a warning message if a NOP is inserted
246 into the instruction stream.
247 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
249 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
251 * config/tc-mips.c (mips_elf_final_processing): Set
252 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
254 2013-09-16 Will Newton <will.newton@linaro.org>
256 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
257 disallowing element size 64 with interleave other than 1.
259 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
261 * config/tc-mips.c (match_insn): Set error when $31 is used for
264 2013-09-04 Tristan Gingold <gingold@adacore.com>
266 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
269 2013-09-04 Roland McGrath <mcgrathr@google.com>
272 * config/tc-arm.c (T16_32_TAB): Add _udf.
273 (do_t_udf): New function.
276 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
278 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
279 assembler errors at correct position.
281 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
284 * config/tc-ia64.c: Fix typos.
285 * config/tc-sparc.c: Likewise.
286 * config/tc-z80.c: Likewise.
287 * doc/c-i386.texi: Likewise.
288 * doc/c-m32r.texi: Likewise.
290 2013-08-23 Will Newton <will.newton@linaro.org>
292 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
293 for pre-indexed addressing modes.
295 2013-08-21 Alan Modra <amodra@gmail.com>
297 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
298 range check label number for use with fb_low_counter array.
300 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
302 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
303 (mips_parse_argument_token, validate_micromips_insn, md_begin)
304 (check_regno, match_float_constant, check_completed_insn, append_insn)
305 (match_insn, match_mips16_insn, match_insns, macro_start)
306 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
307 (mips16_ip, mips_set_option_string, md_parse_option)
308 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
309 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
310 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
311 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
312 Start error messages with a lower-case letter. Do not end error
313 messages with a period. Wrap long messages to 80 character-lines.
314 Use "cannot" instead of "can't" and "can not".
316 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
318 * config/tc-mips.c (imm_expr): Expand comment.
319 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
322 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
324 * config/tc-mips.c (imm2_expr): Delete.
325 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
327 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
329 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
330 (macro): Remove M_DEXT and M_DINS handling.
332 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
334 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
335 lax_max with lax_match.
336 (match_int_operand): Update accordingly. Don't report an error
337 for !lax_match-only cases.
338 (match_insn): Replace more_alts with lax_match and use it to
339 initialize the mips_arg_info field. Add a complete_p parameter.
340 Handle implicit VU0 suffixes here.
341 (match_invalid_for_isa, match_insns, match_mips16_insns): New
343 (mips_ip, mips16_ip): Use them.
345 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
347 * config/tc-mips.c (match_expression): Report uses of registers here.
348 Add a "must be an immediate expression" error. Handle elided offsets
350 (match_int_operand): ...here.
352 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
354 * config/tc-mips.c (mips_arg_info): Remove soft_match.
355 (match_out_of_range, match_not_constant): New functions.
356 (match_const_int): Remove fallback parameter and check for soft_match.
357 Use match_not_constant.
358 (match_mapped_int_operand, match_addiusp_operand)
359 (match_perf_reg_operand, match_save_restore_list_operand)
360 (match_mdmx_imm_reg_operand): Update accordingly. Use
361 match_out_of_range and set_insn_error* instead of as_bad.
362 (match_int_operand): Likewise. Use match_not_constant in the
363 !allows_nonconst case.
364 (match_float_constant): Report invalid float constants.
365 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
366 match_float_constant to check for invalid constants. Fail the
367 match if match_const_int or match_float_constant return false.
368 (mips_ip): Update accordingly.
369 (mips16_ip): Likewise. Undo null termination of instruction name
370 once lookup is complete.
372 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
374 * config/tc-mips.c (mips_insn_error_format): New enum.
375 (mips_insn_error): New struct.
376 (insn_error): Change to a mips_insn_error.
377 (clear_insn_error, set_insn_error_format, set_insn_error)
378 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
380 (mips_parse_argument_token, md_assemble, match_insn)
381 (match_mips16_insn): Use them instead of manipulating insn_error
383 (mips_ip, mips16_ip): Likewise. Simplify control flow.
385 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
387 * config/tc-mips.c (normalize_constant_expr): Move further up file.
388 (normalize_address_expr): Likewise.
389 (match_insn, match_mips16_insn): New functions, split out from...
390 (mips_ip, mips16_ip): ...here.
392 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
394 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
396 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
397 for optional operands.
399 2013-08-16 Alan Modra <amodra@gmail.com>
401 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
404 2013-08-16 Alan Modra <amodra@gmail.com>
406 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
408 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
410 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
411 argument as alignment.
413 2013-08-09 Nick Clifton <nickc@redhat.com>
415 * config/tc-rl78.c (elf_flags): New variable.
416 (enum options): Add OPTION_G10.
417 (md_longopts): Add mg10.
418 (md_parse_option): Parse -mg10.
419 (rl78_elf_final_processing): New function.
420 * config/tc-rl78.c (tc_final_processing): Define.
421 * doc/c-rl78.texi: Document -mg10 option.
423 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
425 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
426 suffixes to be elided too.
427 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
428 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
431 2013-08-05 John Tytgat <john@bass-software.com>
433 * po/POTFILES.in: Regenerate.
435 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
436 Konrad Eisele <konrad@gaisler.com>
438 * config/tc-sparc.c (sparc_arch_types): Add leon.
439 (sparc_arch): Move sparc4 around and add leon.
440 (sparc_target_format): Document -Aleon.
441 * doc/c-sparc.texi: Likewise.
443 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
445 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
447 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
448 Richard Sandiford <rdsandiford@googlemail.com>
450 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
451 (RWARN): Bump to 0x8000000.
452 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
453 (RTYPE_R5900_ACC): New register types.
454 (RTYPE_MASK): Include them.
455 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
457 (reg_names): Include them.
458 (mips_parse_register_1): New function, split out from...
459 (mips_parse_register): ...here. Add a channels_ptr parameter.
460 Look for VU0 channel suffixes when nonnull.
461 (reg_lookup): Update the call to mips_parse_register.
462 (mips_parse_vu0_channels): New function.
463 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
464 (mips_operand_token): Add a "channels" field to the union.
465 Extend the comment above "ch" to OT_DOUBLE_CHAR.
466 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
467 (mips_parse_argument_token): Handle channel suffixes here too.
468 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
469 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
471 (md_begin): Register $vfN and $vfI registers.
472 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
473 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
474 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
475 (match_vu0_suffix_operand): New function.
476 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
477 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
478 (mips_lookup_insn): New function.
479 (mips_ip): Use it. Allow "+K" operands to be elided at the end
480 of an instruction. Handle '#' sequences.
482 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
484 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
485 values and use it instead of sreg, treg, xreg, etc.
487 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
489 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
490 and mips_int_operand_max.
491 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
493 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
494 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
495 instead of mips16_immed_operand.
497 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
499 * config/tc-mips.c (mips16_macro): Don't use move_register.
500 (mips16_ip): Allow macros to use 'p'.
502 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
504 * config/tc-mips.c (MAX_OPERANDS): New macro.
505 (mips_operand_array): New structure.
506 (mips_operands, mips16_operands, micromips_operands): New arrays.
507 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
508 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
509 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
510 (micromips_to_32_reg_q_map): Delete.
511 (insn_operands, insn_opno, insn_extract_operand): New functions.
512 (validate_mips_insn): Take a mips_operand_array as argument and
513 use it to build up a list of operands. Extend to handle INSN_MACRO
515 (validate_mips16_insn): New function.
516 (validate_micromips_insn): Take a mips_operand_array as argument.
518 (md_begin): Initialize mips_operands, mips16_operands and
519 micromips_operands. Call validate_mips_insn and
520 validate_micromips_insn for macro instructions too.
521 Call validate_mips16_insn for MIPS16 instructions.
522 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
524 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
525 them. Handle INSN_UDI.
526 (get_append_method): Use gpr_read_mask.
528 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
530 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
531 flags for MIPS16 and non-MIPS16 instructions.
532 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
533 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
534 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
535 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
536 and non-MIPS16 instructions. Fix formatting.
538 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
540 * config/tc-mips.c (reg_needs_delay): Move later in file.
542 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
544 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
545 Alexander Ivchenko <alexander.ivchenko@intel.com>
546 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
547 Sergey Lega <sergey.s.lega@intel.com>
548 Anna Tikhonova <anna.tikhonova@intel.com>
549 Ilya Tocar <ilya.tocar@intel.com>
550 Andrey Turetskiy <andrey.turetskiy@intel.com>
551 Ilya Verbin <ilya.verbin@intel.com>
552 Kirill Yukhin <kirill.yukhin@intel.com>
553 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
555 * config/tc-i386-intel.c (O_zmmword_ptr): New.
556 (i386_types): Add zmmword.
557 (i386_intel_simplify_register): Allow regzmm.
558 (i386_intel_simplify): Handle zmmwords.
559 (i386_intel_operand): Handle RC/SAE, vector operations and
561 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
562 (struct RC_Operation): New.
563 (struct Mask_Operation): New.
564 (struct Broadcast_Operation): New.
565 (vex_prefix): Size of bytes increased to 4 to support EVEX
567 (enum i386_error): Add new error codes: unsupported_broadcast,
568 broadcast_not_on_src_operand, broadcast_needed,
569 unsupported_masking, mask_not_on_destination, no_default_mask,
570 unsupported_rc_sae, rc_sae_operand_not_last_imm,
571 invalid_register_operand, try_vector_disp8.
572 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
573 rounding, broadcast, memshift.
574 (struct RC_name): New.
575 (RC_NamesTable): New.
578 (extra_symbol_chars): Add '{'.
579 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
580 (i386_operand_type): Add regzmm, regmask and vec_disp8.
581 (match_mem_size): Handle zmmwords.
582 (operand_type_match): Handle zmm-registers.
583 (mode_from_disp_size): Handle vec_disp8.
584 (fits_in_vec_disp8): New.
585 (md_begin): Handle {} properly.
586 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
587 (build_vex_prefix): Handle vrex.
588 (build_evex_prefix): New.
589 (process_immext): Adjust to properly handle EVEX.
590 (md_assemble): Add EVEX encoding support.
591 (swap_2_operands): Correctly handle operands with masking,
592 broadcasting or RC/SAE.
593 (check_VecOperands): Support EVEX features.
594 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
595 (match_template): Support regzmm and handle new error codes.
596 (process_suffix): Handle zmmwords and zmm-registers.
597 (check_byte_reg): Extend to zmm-registers.
598 (process_operands): Extend to zmm-registers.
599 (build_modrm_byte): Handle EVEX.
600 (output_insn): Adjust to properly handle EVEX case.
601 (disp_size): Handle vec_disp8.
602 (output_disp): Support compressed disp8*N evex feature.
603 (output_imm): Handle RC/SAE immediates properly.
604 (check_VecOperations): New.
605 (i386_immediate): Handle EVEX features.
606 (i386_index_check): Handle zmmwords and zmm-registers.
607 (RC_SAE_immediate): New.
608 (i386_att_operand): Handle EVEX features.
609 (parse_real_register): Add a check for ZMM/Mask registers.
610 (OPTION_MEVEXLIG): New.
611 (OPTION_MEVEXWIG): New.
612 (md_longopts): Add mevexlig and mevexwig.
613 (md_parse_option): Handle mevexlig and mevexwig options.
614 (md_show_usage): Add description for mevexlig and mevexwig.
615 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
616 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
618 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
620 * config/tc-i386.c (cpu_arch): Add .sha.
621 * doc/c-i386.texi: Document sha/.sha.
623 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
624 Kirill Yukhin <kirill.yukhin@intel.com>
625 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
627 * config/tc-i386.c (BND_PREFIX): New.
628 (struct _i386_insn): Add new field bnd_prefix.
629 (add_bnd_prefix): New.
631 (i386_operand_type): Add regbnd.
632 (md_assemble): Handle BND prefixes.
633 (parse_insn): Likewise.
634 (output_branch): Likewise.
635 (output_jump): Likewise.
636 (build_modrm_byte): Handle regbnd.
637 (OPTION_MADD_BND_PREFIX): New.
638 (md_longopts): Add entry for 'madd-bnd-prefix'.
639 (md_parse_option): Handle madd-bnd-prefix option.
640 (md_show_usage): Add description for madd-bnd-prefix
642 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
644 2013-07-24 Tristan Gingold <gingold@adacore.com>
646 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
649 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
651 * config/tc-s390.c (s390_machine): Don't force the .machine
652 argument to lower case.
654 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
656 * config/tc-arm.c (s_arm_arch_extension): Improve error message
657 for invalid extension.
659 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
661 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
662 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
663 (aarch64_abi): New variable.
664 (ilp32_p): Change to be a macro.
665 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
666 (struct aarch64_option_abi_value_table): New struct.
667 (aarch64_abis): New table.
668 (aarch64_parse_abi): New function.
669 (aarch64_long_opts): Add entry for -mabi=.
670 * doc/as.texinfo (Target AArch64 options): Document -mabi.
671 * doc/c-aarch64.texi: Likewise.
673 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
675 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
678 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
680 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
682 * config/rx-parse.y: (rx_check_float_support): Add function to
683 check floating point operation support for target RX100 and
685 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
686 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
687 RX200, RX600, and RX610
689 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
691 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
693 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
695 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
696 * doc/c-avr.texi: Likewise.
698 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
700 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
701 error with older GCCs.
702 (mips16_macro_build): Dereference args.
704 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
706 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
707 New functions, split out from...
708 (reg_lookup): ...here. Remove itbl support.
709 (reglist_lookup): Delete.
710 (mips_operand_token_type): New enum.
711 (mips_operand_token): New structure.
712 (mips_operand_tokens): New variable.
713 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
714 (mips_parse_arguments): New functions.
715 (md_begin): Initialize mips_operand_tokens.
716 (mips_arg_info): Add a token field. Remove optional_reg field.
717 (match_char, match_expression): New functions.
718 (match_const_int): Use match_expression. Remove "s" argument
719 and return a boolean result. Remove O_register handling.
720 (match_regno, match_reg, match_reg_range): New functions.
721 (match_int_operand, match_mapped_int_operand, match_msb_operand)
722 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
723 (match_addiusp_operand, match_clo_clz_dest_operand)
724 (match_lwm_swm_list_operand, match_entry_exit_operand)
725 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
726 (match_tied_reg_operand): Remove "s" argument and return a boolean
727 result. Match tokens rather than text. Update calls to
728 match_const_int. Rely on match_regno to call check_regno.
729 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
730 "arg" argument. Return a boolean result.
731 (parse_float_constant): Replace with...
732 (match_float_constant): ...this new function.
733 (match_operand): Remove "s" argument and return a boolean result.
734 Update calls to subfunctions.
735 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
736 rather than string-parsing routines. Update handling of optional
737 registers for token scheme.
739 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
741 * config/tc-mips.c (parse_float_constant): Split out from...
744 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
746 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
749 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
751 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
752 (match_entry_exit_operand): New function.
753 (match_save_restore_list_operand): Likewise.
754 (match_operand): Use them.
755 (check_absolute_expr): Delete.
756 (mips16_ip): Rewrite main parsing loop to use mips_operands.
758 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
760 * config/tc-mips.c: Enable functions commented out in previous patch.
761 (SKIP_SPACE_TABS): Move further up file.
762 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
763 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
764 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
765 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
766 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
767 (micromips_imm_b_map, micromips_imm_c_map): Delete.
768 (mips_lookup_reg_pair): Delete.
769 (macro): Use report_bad_range and report_bad_field.
770 (mips_immed, expr_const_in_range): Delete.
771 (mips_ip): Rewrite main parsing loop to use new functions.
773 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
775 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
776 Change return type to bfd_boolean.
777 (report_bad_range, report_bad_field): New functions.
778 (mips_arg_info): New structure.
779 (match_const_int, convert_reg_type, check_regno, match_int_operand)
780 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
781 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
782 (match_addiusp_operand, match_clo_clz_dest_operand)
783 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
784 (match_pc_operand, match_tied_reg_operand, match_operand)
785 (check_completed_insn): New functions, commented out for now.
787 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
789 * config/tc-mips.c (insn_insert_operand): New function.
790 (macro_build, mips16_macro_build): Put null character check
791 in the for loop and convert continues to breaks. Use operand
792 structures to handle constant operands.
794 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
796 * config/tc-mips.c (validate_mips_insn): Move further up file.
797 Add insn_bits and decode_operand arguments. Use the mips_operand
798 fields to work out which bits an operand occupies. Detect double
800 (validate_micromips_insn): Move further up file. Call into
803 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
805 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
807 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
809 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
811 (macro): Update accordingly.
813 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
815 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
817 (md_assemble): Remove imm_reloc handling.
818 (mips_ip): Update commentary. Use offset_expr and offset_reloc
819 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
820 Use a temporary array rather than imm_reloc when parsing
821 constant expressions. Remove imm_reloc initialization.
822 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
823 for the relaxable field. Use a relax_char variable to track the
824 type of this field. Remove imm_reloc initialization.
826 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
828 * config/tc-mips.c (mips16_ip): Handle "I".
830 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
832 * config/tc-mips.c (mips_flag_nan2008): New variable.
833 (options): Add OPTION_NAN enum value.
834 (md_longopts): Handle it.
835 (md_parse_option): Likewise.
836 (s_nan): New function.
837 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
838 (md_show_usage): Add -mnan.
840 * doc/as.texinfo (Overview): Add -mnan.
841 * doc/c-mips.texi (MIPS Opts): Document -mnan.
842 (MIPS NaN Encodings): New node. Document .nan directive.
843 (MIPS-Dependent): List the new node.
845 2013-07-09 Tristan Gingold <gingold@adacore.com>
847 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
849 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
851 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
852 for 'A' and assume that the constant has been elided if the result
855 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
857 * config/tc-mips.c (gprel16_reloc_p): New function.
858 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
860 (offset_high_part, small_offset_p): New functions.
861 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
862 register load and store macros, handle the 16-bit offset case first.
863 If a 16-bit offset is not suitable for the instruction we're
864 generating, load it into the temporary register using
865 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
866 M_L_DAB code once the address has been constructed. For double load
867 and store macros, again handle the 16-bit offset case first.
868 If the second register cannot be accessed from the same high
869 part as the first, load it into AT using ADDRESS_ADDI_INSN.
870 Fix the handling of LD in cases where the first register is the
871 same as the base. Also handle the case where the offset is
872 not 16 bits and the second register cannot be accessed from the
873 same high part as the first. For unaligned loads and stores,
874 fuse the offbits == 12 and old "ab" handling. Apply this handling
875 whenever the second offset needs a different high part from the first.
876 Construct the offset using ADDRESS_ADDI_INSN where possible,
877 for offbits == 16 as well as offbits == 12. Use offset_reloc
878 when constructing the individual loads and stores.
879 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
880 and offset_reloc before matching against a particular opcode.
881 Handle elided 'A' constants. Allow 'A' constants to use
882 relocation operators.
884 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
886 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
887 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
888 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
890 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
892 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
893 Require the msb to be <= 31 for "+s". Check that the size is <= 31
894 for both "+s" and "+S".
896 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
898 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
899 (mips_ip, mips16_ip): Handle "+i".
901 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
903 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
904 (micromips_to_32_reg_h_map): Rename to...
905 (micromips_to_32_reg_h_map1): ...this.
906 (micromips_to_32_reg_i_map): Rename to...
907 (micromips_to_32_reg_h_map2): ...this.
908 (mips_lookup_reg_pair): New function.
909 (gpr_write_mask, macro): Adjust after above renaming.
910 (validate_micromips_insn): Remove "mi" handling.
911 (mips_ip): Likewise. Parse both registers in a pair for "mh".
913 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
915 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
916 (mips_ip): Remove "+D" and "+T" handling.
918 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
920 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
923 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
925 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
927 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
929 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
930 (aarch64_force_relocation): Likewise.
932 2013-07-02 Alan Modra <amodra@gmail.com>
934 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
936 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
938 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
939 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
940 Replace @sc{mips16} with literal `MIPS16'.
941 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
943 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
945 * config/tc-aarch64.c (reloc_table): Replace
946 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
947 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
948 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
949 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
950 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
951 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
952 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
953 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
954 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
955 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
956 (aarch64_force_relocation): Likewise.
958 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
960 * config/tc-aarch64.c (ilp32_p): New static variable.
961 (elf64_aarch64_target_format): Return the target according to the
963 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
964 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
965 (aarch64_dwarf2_addr_size): New function.
966 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
967 (DWARF2_ADDR_SIZE): New define.
969 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
971 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
973 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
975 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
977 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
979 * config/tc-mips.c (mips_set_options): Add insn32 member.
980 (mips_opts): Initialize it.
981 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
982 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
983 (md_longopts): Add "minsn32" and "mno-insn32" options.
984 (is_size_valid): Handle insn32 mode.
985 (md_assemble): Pass instruction string down to macro.
986 (brk_fmt): Add second dimension and insn32 mode initializers.
987 (mfhl_fmt): Likewise.
988 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
989 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
990 (macro_build_jalr, move_register): Handle insn32 mode.
991 (macro_build_branch_rs): Likewise.
992 (macro): Handle insn32 mode.
993 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
994 (mips_ip): Handle insn32 mode.
995 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
996 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
997 (mips_handle_align): Handle insn32 mode.
998 (md_show_usage): Add -minsn32 and -mno-insn32.
1000 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1001 -mno-insn32 options.
1002 (-minsn32, -mno-insn32): New options.
1003 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1005 (MIPS assembly options): New node. Document .set insn32 and
1007 (MIPS-Dependent): List the new node.
1009 2013-06-25 Nick Clifton <nickc@redhat.com>
1011 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1012 the PC in indirect addressing on 430xv2 parts.
1013 (msp430_operands): Add version test to hardware bug encoding
1016 2013-06-24 Roland McGrath <mcgrathr@google.com>
1018 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1019 so it skips whitespace before it.
1020 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1022 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1023 (arm_reg_parse_multi): Skip whitespace first.
1024 (parse_reg_list): Likewise.
1025 (parse_vfp_reg_list): Likewise.
1026 (s_arm_unwind_save_mmxwcg): Likewise.
1028 2013-06-24 Nick Clifton <nickc@redhat.com>
1031 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1033 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1035 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1037 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1039 * config/tc-mips.c: Assert that offsetT and valueT are at least
1041 (GPR_SMIN, GPR_SMAX): New macros.
1042 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1044 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1046 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1047 conditions. Remove any code deselected by them.
1048 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1050 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1052 * NEWS: Note removal of ECOFF support.
1053 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1054 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1055 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1056 * Makefile.in: Regenerate.
1057 * configure.in: Remove MIPS ECOFF references.
1058 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1060 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1061 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1062 (mips-*-*): ...this single case.
1063 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1064 MIPS emulations to be e-mipself*.
1065 * configure: Regenerate.
1066 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1067 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1068 (mips-*-sysv*): Remove coff and ecoff cases.
1069 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1070 * ecoff.c: Remove reference to MIPS ECOFF.
1071 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1072 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1073 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1074 (mips_hi_fixup): Tweak comment.
1075 (append_insn): Require a howto.
1076 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1078 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1080 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1081 Use "CPU" instead of "cpu".
1082 * doc/c-mips.texi: Likewise.
1083 (MIPS Opts): Rename to MIPS Options.
1084 (MIPS option stack): Rename to MIPS Option Stack.
1085 (MIPS ASE instruction generation overrides): Rename to
1086 MIPS ASE Instruction Generation Overrides (for now).
1087 (MIPS floating-point): Rename to MIPS Floating-Point.
1089 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1091 * doc/c-mips.texi (MIPS Macros): New section.
1092 (MIPS Object): Replace with...
1093 (MIPS Small Data): ...this new section.
1095 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1097 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1098 Capitalize name. Use @kindex instead of @cindex for .set entries.
1100 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1102 * doc/c-mips.texi (MIPS Stabs): Remove section.
1104 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1106 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1107 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1108 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1109 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1110 (mips_ase): New structure.
1111 (mips_ases): New table.
1112 (FP64_ASES): New macro.
1113 (mips_ase_groups): New array.
1114 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1115 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1117 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1118 (md_parse_option): Use mips_ases and mips_set_ase instead of
1119 separate case statements for each ASE option.
1120 (mips_after_parse_args): Use FP64_ASES. Use
1121 mips_check_isa_supports_ases to check the ASEs against
1123 (s_mipsset): Use mips_ases and mips_set_ase instead of
1124 separate if statements for each ASE option. Use
1125 mips_check_isa_supports_ases, even when a non-ASE option
1128 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1130 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1132 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1134 * config/tc-mips.c (md_shortopts, options, md_longopts)
1135 (md_longopts_size): Move earlier in file.
1137 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1139 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1140 with a single "ase" bitmask.
1141 (mips_opts): Update accordingly.
1142 (file_ase, file_ase_explicit): New variables.
1143 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1144 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1145 (ISA_HAS_ROR): Adjust for mips_set_options change.
1146 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1147 (mips_ip): Adjust for mips_set_options change.
1148 (md_parse_option): Likewise. Update file_ase_explicit.
1149 (mips_after_parse_args): Adjust for mips_set_options change.
1150 Use bitmask operations to select the default ASEs. Set file_ase
1151 rather than individual per-ASE variables.
1152 (s_mipsset): Adjust for mips_set_options change.
1153 (mips_elf_final_processing): Test file_ase rather than
1154 file_ase_mdmx. Remove commented-out code.
1156 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1158 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1159 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1160 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1161 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1162 (mips_after_parse_args): Use the new "ase" field to choose
1164 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1167 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1169 * config/tc-arm.c (symbol_preemptible): New function.
1170 (relax_branch): Use it.
1172 2013-06-17 Catherine Moore <clm@codesourcery.com>
1173 Maciej W. Rozycki <macro@codesourcery.com>
1174 Chao-Ying Fu <fu@mips.com>
1176 * config/tc-mips.c (mips_set_options): Add ase_eva.
1177 (mips_set_options mips_opts): Add ase_eva.
1178 (file_ase_eva): Declare.
1179 (ISA_SUPPORTS_EVA_ASE): Define.
1180 (IS_SEXT_9BIT_NUM): Define.
1181 (MIPS_CPU_ASE_EVA): Define.
1182 (is_opcode_valid): Add support for ase_eva.
1183 (macro_build): Likewise.
1185 (validate_mips_insn): Likewise.
1186 (validate_micromips_insn): Likewise.
1187 (mips_ip): Likewise.
1188 (options): Add OPTION_EVA and OPTION_NO_EVA.
1189 (md_longopts): Add -meva and -mno-eva.
1190 (md_parse_option): Process new options.
1191 (mips_after_parse_args): Check for valid EVA combinations.
1192 (s_mipsset): Likewise.
1194 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1196 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1197 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1198 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1199 (dwarf2_gen_line_info_1): Update call accordingly.
1200 (dwarf2_move_insn): New function.
1201 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1203 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1207 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1210 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1211 (dwarf2_gen_line_info_1): Delete.
1212 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1213 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1214 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1215 (dwarf2_directive_loc): Push previous .locs instead of generating
1218 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1220 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1221 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1223 2013-06-13 Nick Clifton <nickc@redhat.com>
1226 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1227 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1228 function. Generates an error if the adjusted offset is out of a
1231 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1233 * config/tc-nios2.c (md_apply_fix): Mask constant
1234 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1236 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1238 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1239 MIPS-3D instructions either.
1240 (md_convert_frag): Update the COPx branch mask accordingly.
1242 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1244 * doc/as.texinfo (Overview): Add --relax-branch and
1246 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1249 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1251 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1254 2013-06-08 Catherine Moore <clm@codesourcery.com>
1256 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1257 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1258 (append_insn): Change INSN_xxxx to ASE_xxxx.
1260 2013-06-01 George Thomas <george.thomas@atmel.com>
1262 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1265 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1267 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1270 2013-05-31 Paul Brook <paul@codesourcery.com>
1272 * config/tc-mips.c (s_ehword): New.
1274 2013-05-30 Paul Brook <paul@codesourcery.com>
1276 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1278 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1280 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1281 convert relocs who have no relocatable field either. Rephrase
1282 the conditional so that the PC-relative check is only applied
1285 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1287 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1290 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1292 * config/tc-aarch64.c (reloc_table): Update to use
1293 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1294 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1295 (md_apply_fix): Likewise.
1296 (aarch64_force_relocation): Likewise.
1298 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1300 * config/tc-arm.c (it_fsm_post_encode): Improve
1301 warning messages about deprecated IT block formats.
1303 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1305 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1306 inside fx_done condition.
1308 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1310 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1312 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1314 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1315 and clean up warning when using PRINT_OPCODE_TABLE.
1317 2013-05-20 Alan Modra <amodra@gmail.com>
1319 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1320 and data fixups performing shift/high adjust/sign extension on
1321 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1322 when writing data fixups rather than recalculating size.
1324 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1326 * doc/c-msp430.texi: Fix typo.
1328 2013-05-16 Tristan Gingold <gingold@adacore.com>
1330 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1331 are also TOC symbols.
1333 2013-05-16 Nick Clifton <nickc@redhat.com>
1335 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1336 Add -mcpu command to specify core type.
1337 * doc/c-msp430.texi: Update documentation.
1339 2013-05-09 Andrew Pinski <apinski@cavium.com>
1341 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1342 (mips_opts): Update for the new field.
1343 (file_ase_virt): New variable.
1344 (ISA_SUPPORTS_VIRT_ASE): New macro.
1345 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1346 (MIPS_CPU_ASE_VIRT): New define.
1347 (is_opcode_valid): Handle ase_virt.
1348 (macro_build): Handle "+J".
1349 (validate_mips_insn): Likewise.
1350 (mips_ip): Likewise.
1351 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1352 (md_longopts): Add mvirt and mnovirt
1353 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1354 (mips_after_parse_args): Handle ase_virt field.
1355 (s_mipsset): Handle "virt" and "novirt".
1356 (mips_elf_final_processing): Add a comment about virt ASE might need
1358 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1359 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1360 Document ".set virt" and ".set novirt".
1362 2013-05-09 Alan Modra <amodra@gmail.com>
1364 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1365 control of operand flag bits.
1367 2013-05-07 Alan Modra <amodra@gmail.com>
1369 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1370 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1371 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1372 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1373 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1374 Shift and sign-extend fieldval for use by some VLE reloc
1375 operand->insert functions.
1377 2013-05-06 Paul Brook <paul@codesourcery.com>
1378 Catherine Moore <clm@codesourcery.com>
1380 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1381 (limited_pcrel_reloc_p): Likewise.
1382 (md_apply_fix): Likewise.
1383 (tc_gen_reloc): Likewise.
1385 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1387 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1388 (mips_fix_adjustable): Adjust pc-relative check to use
1391 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1393 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1394 (s_mips_stab): Do not restrict to stabn only.
1396 2013-05-02 Nick Clifton <nickc@redhat.com>
1398 * config/tc-msp430.c: Add support for the MSP430X architecture.
1399 Add code to insert a NOP instruction after any instruction that
1400 might change the interrupt state.
1401 Add support for the LARGE memory model.
1402 Add code to initialise the .MSP430.attributes section.
1403 * config/tc-msp430.h: Add support for the MSP430X architecture.
1404 * doc/c-msp430.texi: Document the new -mL and -mN command line
1406 * NEWS: Mention support for the MSP430X architecture.
1408 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1410 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1411 alpha*-*-linux*ecoff*.
1413 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1415 * config/tc-mips.c (mips_ip): Add sizelo.
1416 For "+C", "+G", and "+H", set sizelo and compare against it.
1418 2013-04-29 Nick Clifton <nickc@redhat.com>
1420 * as.c (Options): Add -gdwarf-sections.
1421 (parse_args): Likewise.
1422 * as.h (flag_dwarf_sections): Declare.
1423 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1424 (process_entries): When -gdwarf-sections is enabled generate
1425 fragmentary .debug_line sections.
1426 (out_debug_line): Set the section for the .debug_line section end
1428 * doc/as.texinfo: Document -gdwarf-sections.
1429 * NEWS: Mention -gdwarf-sections.
1431 2013-04-26 Christian Groessler <chris@groessler.org>
1433 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1434 according to the target parameter. Don't call s_segm since s_segm
1435 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1437 (md_begin): Call s_segm according to target parameter from command
1440 2013-04-25 Alan Modra <amodra@gmail.com>
1442 * configure.in: Allow little-endian linux.
1443 * configure: Regenerate.
1445 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1447 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1448 "fstatus" control register to "eccinj".
1450 2013-04-19 Kai Tietz <ktietz@redhat.com>
1452 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1454 2013-04-15 Julian Brown <julian@codesourcery.com>
1456 * expr.c (add_to_result, subtract_from_result): Make global.
1457 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1458 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1459 subtract_from_result to handle extra bit of precision for .sleb128
1462 2013-04-10 Julian Brown <julian@codesourcery.com>
1464 * read.c (convert_to_bignum): Add sign parameter. Use it
1465 instead of X_unsigned to determine sign of resulting bignum.
1466 (emit_expr): Pass extra argument to convert_to_bignum.
1467 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1468 X_extrabit to convert_to_bignum.
1469 (parse_bitfield_cons): Set X_extrabit.
1470 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1471 Initialise X_extrabit field as appropriate.
1472 (add_to_result): New.
1473 (subtract_from_result): New.
1475 * expr.h (expressionS): Add X_extrabit field.
1477 2013-04-10 Jan Beulich <jbeulich@suse.com>
1479 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1480 register being PC when is_t or writeback, and use distinct
1481 diagnostic for the latter case.
1483 2013-04-10 Jan Beulich <jbeulich@suse.com>
1485 * gas/config/tc-arm.c (parse_operands): Re-write
1486 po_barrier_or_imm().
1487 (do_barrier): Remove bogus constraint().
1488 (do_t_barrier): Remove.
1490 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1492 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1493 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1495 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1497 2013-04-09 Jan Beulich <jbeulich@suse.com>
1499 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1500 Use local variable Rt in more places.
1501 (do_vmsr): Accept all control registers.
1503 2013-04-09 Jan Beulich <jbeulich@suse.com>
1505 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1506 if there was none specified for moves between scalar and core
1509 2013-04-09 Jan Beulich <jbeulich@suse.com>
1511 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1512 NEON_ALL_LANES case.
1514 2013-04-08 Jan Beulich <jbeulich@suse.com>
1516 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1519 2013-04-08 Jan Beulich <jbeulich@suse.com>
1521 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1524 2013-04-03 Alan Modra <amodra@gmail.com>
1526 * doc/as.texinfo: Add support to generate man options for h8300.
1527 * doc/c-h8300.texi: Likewise.
1529 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1531 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1534 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1537 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1539 2013-03-26 Nick Clifton <nickc@redhat.com>
1542 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1543 start of the file each time.
1546 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1549 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1551 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1554 2013-03-21 Will Newton <will.newton@linaro.org>
1556 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1557 pc-relative str instructions in Thumb mode.
1559 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1561 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1562 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1564 * config/tc-h8300.h: Remove duplicated defines.
1566 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1569 * tc-avr.c (mcu_has_3_byte_pc): New function.
1570 (tc_cfi_frame_initial_instructions): Call it to find return
1573 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1576 * config/tc-tic6x.c (tic6x_try_encode): Handle
1577 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1578 encode register pair numbers when required.
1580 2013-03-15 Will Newton <will.newton@linaro.org>
1582 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1583 in vstr in Thumb mode for pre-ARMv7 cores.
1585 2013-03-14 Andreas Schwab <schwab@suse.de>
1587 * doc/c-arc.texi (ARC Directives): Revert last change and use
1588 @itemize instead of @table.
1589 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1591 2013-03-14 Nick Clifton <nickc@redhat.com>
1594 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1595 NULL message, instead just check ARM_CPU_IS_ANY directly.
1597 2013-03-14 Nick Clifton <nickc@redhat.com>
1600 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1602 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1603 to the @item directives.
1604 (ARM-Neon-Alignment): Move to correct place in the document.
1605 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1607 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1610 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1612 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1613 case. Add default BAD_CASE to switch.
1615 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1617 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1618 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1620 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1622 * config/tc-arm.c (crc_ext_armv8): New feature set.
1623 (UNPRED_REG): New macro.
1624 (do_crc32_1): New function.
1625 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1626 do_crc32ch, do_crc32cw): Likewise.
1628 (insns): Add entries for crc32 mnemonics.
1629 (arm_extensions): Add entry for crc.
1631 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1633 * write.h (struct fix): Add fx_dot_frag field.
1634 (dot_frag): Declare.
1635 * write.c (dot_frag): New variable.
1636 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1637 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1638 * expr.c (expr): Save value of frag_now in dot_frag when setting
1640 * read.c (emit_expr): Likewise. Delete comments.
1642 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1644 * config/tc-i386.c (flag_code_names): Removed.
1645 (i386_index_check): Rewrote.
1647 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1649 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1651 (aarch64_double_precision_fmovable): New function.
1652 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1653 function; handle hexadecimal representation of IEEE754 encoding.
1654 (parse_operands): Update the call to parse_aarch64_imm_float.
1656 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1658 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1659 (check_hle): Updated.
1660 (md_assemble): Likewise.
1661 (parse_insn): Likewise.
1663 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1665 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1666 (md_assemble): Check if REP prefix is OK.
1667 (parse_insn): Remove expecting_string_instruction. Set
1670 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1672 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1674 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1676 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1677 for system registers.
1679 2013-02-27 DJ Delorie <dj@redhat.com>
1681 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1682 (rl78_op): Handle %code().
1683 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1684 (tc_gen_reloc): Likwise; convert to a computed reloc.
1685 (md_apply_fix): Likewise.
1687 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1689 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1691 2013-02-25 Terry Guo <terry.guo@arm.com>
1693 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1694 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1695 list of accepted CPUs.
1697 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1700 * config/tc-i386.c (cpu_arch): Add ".smap".
1702 * doc/c-i386.texi: Document smap.
1704 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1706 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1707 mips_assembling_insn appropriately.
1708 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1710 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1712 * config/tc-mips.c (append_insn): Correct indentation, remove
1715 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1717 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1719 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1721 * configure.tgt: Add nios2-*-rtems*.
1723 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1725 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1728 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1730 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1731 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1733 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1735 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1738 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1739 Andrew Jenner <andrew@codesourcery.com>
1741 Based on patches from Altera Corporation.
1743 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1744 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1745 * Makefile.in: Regenerated.
1746 * configure.tgt: Add case for nios2*-linux*.
1747 * config/obj-elf.c: Conditionally include elf/nios2.h.
1748 * config/tc-nios2.c: New file.
1749 * config/tc-nios2.h: New file.
1750 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1751 * doc/Makefile.in: Regenerated.
1752 * doc/all.texi: Set NIOSII.
1753 * doc/as.texinfo (Overview): Add Nios II options.
1754 (Machine Dependencies): Include c-nios2.texi.
1755 * doc/c-nios2.texi: New file.
1756 * NEWS: Note Altera Nios II support.
1758 2013-02-06 Alan Modra <amodra@gmail.com>
1761 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1762 Don't skip fixups with fx_subsy non-NULL.
1763 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1764 with fx_subsy non-NULL.
1766 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1768 * doc/c-metag.texi: Add "@c man" markers.
1770 2013-02-04 Alan Modra <amodra@gmail.com>
1772 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1774 (TC_ADJUST_RELOC_COUNT): Delete.
1775 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1777 2013-02-04 Alan Modra <amodra@gmail.com>
1779 * po/POTFILES.in: Regenerate.
1781 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1783 * config/tc-metag.c: Make SWAP instruction less permissive with
1786 2013-01-29 DJ Delorie <dj@redhat.com>
1788 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1789 relocs in .word/.etc statements.
1791 2013-01-29 Roland McGrath <mcgrathr@google.com>
1793 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1794 immediate value for 8-bit offset" error so it shows line info.
1796 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1798 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1801 2013-01-24 Nick Clifton <nickc@redhat.com>
1803 * config/tc-v850.c: Add support for e3v5 architecture.
1804 * doc/c-v850.texi: Mention new support.
1806 2013-01-23 Nick Clifton <nickc@redhat.com>
1809 * config/tc-avr.c: Include dwarf2dbg.h.
1811 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1813 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1814 (tc_i386_fix_adjustable): Likewise.
1815 (lex_got): Likewise.
1816 (tc_gen_reloc): Likewise.
1818 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1820 * config/tc-aarch64.c (output_operand_error_record): Change to output
1821 the out-of-range error message as value-expected message if there is
1822 only one single value in the expected range.
1823 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1824 LSL #0 as a programmer-friendly feature.
1826 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1828 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1829 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1830 BFD_RELOC_64_SIZE relocations.
1831 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1833 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1834 relocations against local symbols.
1836 2013-01-16 Alan Modra <amodra@gmail.com>
1838 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1839 finding some sort of toc syntax error, and break to avoid
1840 compiler uninit warning.
1842 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1845 * config/tc-i386.c (lex_got): Increment length by 1 if the
1846 relocation token is removed.
1848 2013-01-15 Nick Clifton <nickc@redhat.com>
1850 * config/tc-v850.c (md_assemble): Allow signed values for
1853 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1855 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1858 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1860 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1861 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1862 * config/tc-ppc.c (md_show_usage): Likewise.
1863 (ppc_handle_align): Handle power8's group ending nop.
1865 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1867 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1868 that the assember exits after the opcodes have been printed.
1870 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1872 * app.c: Remove trailing white spaces.
1876 * dw2gencfi.c: Likewise.
1877 * dwarf2dbg.h: Likewise.
1878 * ecoff.c: Likewise.
1879 * input-file.c: Likewise.
1880 * itbl-lex.h: Likewise.
1881 * output-file.c: Likewise.
1884 * subsegs.c: Likewise.
1885 * symbols.c: Likewise.
1886 * write.c: Likewise.
1887 * config/tc-i386.c: Likewise.
1888 * doc/Makefile.am: Likewise.
1889 * doc/Makefile.in: Likewise.
1890 * doc/c-aarch64.texi: Likewise.
1891 * doc/c-alpha.texi: Likewise.
1892 * doc/c-arc.texi: Likewise.
1893 * doc/c-arm.texi: Likewise.
1894 * doc/c-avr.texi: Likewise.
1895 * doc/c-bfin.texi: Likewise.
1896 * doc/c-cr16.texi: Likewise.
1897 * doc/c-d10v.texi: Likewise.
1898 * doc/c-d30v.texi: Likewise.
1899 * doc/c-h8300.texi: Likewise.
1900 * doc/c-hppa.texi: Likewise.
1901 * doc/c-i370.texi: Likewise.
1902 * doc/c-i386.texi: Likewise.
1903 * doc/c-i860.texi: Likewise.
1904 * doc/c-m32c.texi: Likewise.
1905 * doc/c-m32r.texi: Likewise.
1906 * doc/c-m68hc11.texi: Likewise.
1907 * doc/c-m68k.texi: Likewise.
1908 * doc/c-microblaze.texi: Likewise.
1909 * doc/c-mips.texi: Likewise.
1910 * doc/c-msp430.texi: Likewise.
1911 * doc/c-mt.texi: Likewise.
1912 * doc/c-s390.texi: Likewise.
1913 * doc/c-score.texi: Likewise.
1914 * doc/c-sh.texi: Likewise.
1915 * doc/c-sh64.texi: Likewise.
1916 * doc/c-tic54x.texi: Likewise.
1917 * doc/c-tic6x.texi: Likewise.
1918 * doc/c-v850.texi: Likewise.
1919 * doc/c-xc16x.texi: Likewise.
1920 * doc/c-xgate.texi: Likewise.
1921 * doc/c-xtensa.texi: Likewise.
1922 * doc/c-z80.texi: Likewise.
1923 * doc/internals.texi: Likewise.
1925 2013-01-10 Roland McGrath <mcgrathr@google.com>
1927 * hash.c (hash_new_sized): Make it global.
1928 * hash.h: Declare it.
1929 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1932 2013-01-10 Will Newton <will.newton@imgtec.com>
1934 * Makefile.am: Add Meta.
1935 * Makefile.in: Regenerate.
1936 * config/tc-metag.c: New file.
1937 * config/tc-metag.h: New file.
1938 * configure.tgt: Add Meta.
1939 * doc/Makefile.am: Add Meta.
1940 * doc/Makefile.in: Regenerate.
1941 * doc/all.texi: Add Meta.
1942 * doc/as.texiinfo: Document Meta options.
1943 * doc/c-metag.texi: New file.
1945 2013-01-09 Steve Ellcey <sellcey@mips.com>
1947 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1949 * config/tc-mips.c (internalError): Remove, replace with abort.
1951 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1953 * config/tc-aarch64.c (parse_operands): Change to compare the result
1954 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1956 2013-01-07 Nick Clifton <nickc@redhat.com>
1959 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1960 anticipated character.
1961 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1962 here as it is no longer needed.
1964 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1966 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1967 * doc/c-score.texi (SCORE-Opts): Likewise.
1968 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1970 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1972 * config/tc-mips.c: Add support for MIPS r5900.
1973 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1975 (can_swap_branch_p, get_append_method): Detect some conditional
1976 short loops to fix a bug on the r5900 by NOP in the branch delay
1978 (M_MUL): Support 3 operands in multu on r5900.
1979 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1980 (s_mipsset): Force 32 bit floating point on r5900.
1981 (mips_ip): Check parameter range of instructions mfps and mtps on
1983 * configure.in: Detect CPU type when target string contains r5900
1984 (e.g. mips64r5900el-linux-gnu).
1986 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1988 * as.c (parse_args): Update copyright year to 2013.
1990 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1992 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1995 2013-01-02 Nick Clifton <nickc@redhat.com>
1998 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2001 For older changes see ChangeLog-2012
2003 Copyright (C) 2013 Free Software Foundation, Inc.
2005 Copying and distribution of this file, with or without modification,
2006 are permitted in any medium without royalty provided the copyright
2007 notice and this notice are preserved.
2013 version-control: never