1 2006-10-29 Nick Clifton <nickc@redhat.com>
3 * config/tc-spu.c (md_assemble): Cast printf string size parameter
4 to int in order to avoid a compiler warning.
6 2006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
8 * config/tc-sh.c (md_assemble): Define size of branches.
10 2006-10-26 Ben Elliston <bje@au.ibm.com>
12 * dw2gencfi.c (cfi_add_CFA_offset):
13 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
15 * write.c (chain_frchains_together_1): Assert that this function
16 never returns a pointer to the auto variable `dummy'.
18 2006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
19 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
20 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
21 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
22 Alan Modra <amodra@bigpond.net.au>
24 * config/tc-spu.c: New file.
25 * config/tc-spu.h: New file.
26 * configure.tgt: Add SPU support.
27 * Makefile.am: Likewise. Run "make dep-am".
28 * Makefile.in: Regenerate.
29 * po/POTFILES.in: Regenerate.
31 2006-10-25 Ben Elliston <bje@au.ibm.com>
33 * expr.c (expr): Replace O_add case in switch (op_left) explaining
34 why it can never occur.
36 2006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
38 * doc/c-ppc.texi (-mcell): Document.
39 * config/tc-ppc.c (parse_cpu): Parse -mcell.
40 (md_show_usage): Document -mcell.
42 2006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
44 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
46 2006-10-23 Alan Modra <amodra@bigpond.net.au>
48 * config/tc-m68hc11.c (md_assemble): Quiet warning.
50 2006-10-19 Mike Frysinger <vapier@gentoo.org>
52 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
53 (x86_64_section_letter): Likewise.
55 2006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
57 * config/tc-score.c (build_relax_frag): Compute correct
60 2006-10-18 Roy Marples <uberlord@gentoo.org>
62 * config/tc-sparc.c (md_parse_option): Treat any target starting with
63 elf32-sparc as a viable target for the -32 switch and any target
64 starting with elf64-sparc as a viable target for the -64 switch.
65 (sparc_target_format): For 64-bit ELF flavoured output use
66 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
68 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
70 2006-10-17 H.J. Lu <hongjiu.lu@intel.com>
72 * configure: Regenerated.
74 2006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
76 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
77 in addition to testing for '\n'.
78 (TC_EOL_IN_INSN): Provide a default definition if necessary.
80 2006-10-13 Sterling Augstine <sterling@tensilica.com>
82 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
83 a disjoint DW_AT range.
85 2006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
87 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
89 2006-10-08 Paul Brook <paul@codesourcery.com>
91 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
92 (parse_operands): Use parse_big_immediate for OP_NILO.
93 (neon_cmode_for_logic_imm): Try smaller element sizes.
94 (neon_cmode_for_move_imm): Ditto.
95 (do_neon_logic): Handle .i64 pseudo-op.
97 2006-09-29 Alan Modra <amodra@bigpond.net.au>
99 * po/POTFILES.in: Regenerate.
101 2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
103 * config/tc-i386.h (CpuMNI): Renamed to ...
105 (CpuUnknownFlags): Updated.
106 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
107 and PROCESSOR_MEROM with PROCESSOR_CORE2.
108 * config/tc-i386.c: Updated.
109 * doc/c-i386.texi: Likewise.
111 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
113 2006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
115 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
117 2006-09-27 Nick Clifton <nickc@redhat.com>
119 * output-file.c (output_file_close): Prevent an infinite loop
120 reporting that stdoutput could not be closed.
122 2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
123 Joseph Myers <joseph@codesourcery.com>
124 Ian Lance Taylor <ian@wasabisystems.com>
125 Ben Elliston <bje@wasabisystems.com>
127 * config/tc-arm.c (arm_cext_iwmmxt2): New.
128 (enum operand_parse_code): New code OP_RIWR_I32z.
129 (parse_operands): Handle OP_RIWR_I32z.
130 (do_iwmmxt_wmerge): New function.
131 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
133 (do_iwmmxt_wrwrwr_or_imm5): New function.
134 (insns): Mark instructions as RIWR_I32z as appropriate.
135 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
136 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
137 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
138 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
139 (md_begin): Handle IWMMXT2.
140 (arm_cpus): Add iwmmxt2.
141 (arm_extensions): Likewise.
142 (arm_archs): Likewise.
144 2006-09-25 Bob Wilson <bob.wilson@acm.org>
146 * doc/as.texinfo (Overview): Revise description of --keep-locals.
147 Add xref to "Symbol Names".
148 (L): Refer to "local symbols" instead of "local labels". Move
149 definition to "Symbol Names" section; add xref to that section.
150 (Symbol Names): Use "Local Symbol Names" section to define local
151 symbols. Add "Local Labels" heading for description of temporary
152 forward/backward labels, and refer to those as "local labels".
154 2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
157 * config/tc-i386.c (match_template): Check address size prefix
158 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
161 2006-09-22 Alan Modra <amodra@bigpond.net.au>
163 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
165 2006-09-22 Alan Modra <amodra@bigpond.net.au>
167 * as.h (as_perror): Delete declaration.
168 * gdbinit.in (as_perror): Delete breakpoint.
169 * messages.c (as_perror): Delete function.
170 * doc/internals.texi: Remove as_perror description.
171 * listing.c (listing_print: Don't use as_perror.
172 * output-file.c (output_file_create, output_file_close): Likewise.
173 * symbols.c (symbol_create, symbol_clone): Likewise.
174 * write.c (write_contents): Likewise.
175 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
176 * config/tc-tic54x.c (tic54x_mlib): Likewise.
178 2006-09-22 Alan Modra <amodra@bigpond.net.au>
180 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
181 (ppc_handle_align): New function.
182 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
183 (SUB_SEGMENT_ALIGN): Define as zero.
185 2006-09-20 Bob Wilson <bob.wilson@acm.org>
187 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
188 (Overview): Skip cross reference in man page.
190 2006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
192 * configure.in: Add new target x86_64-pc-mingw64.
193 * configure: Regenerate.
194 * configure.tgt: Add new target x86_64-pc-mingw64.
195 * config/obj-coff.h: Add handling for TE_PEP target specific code
197 * config/tc-i386.c: Add new targets.
198 (md_parse_option): Add targets to OPTION_64.
199 (x86_64_target_format): Add new method for setup proper default
201 * config/te-pep.h: Add new target definition header.
202 (TE_PEP): New macro: Identifies new target architecture.
203 (COFF_WITH_pex64): Set proper includes in bfd.
204 * NEWS: Mention new target.
206 2006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
208 * config/bfin-parse.y (binary): Change sub of const to add of negated
211 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
213 * config/tc-score.c: New file.
214 * config/tc-score.h: Newf file.
215 * configure.tgt: Add Score target.
216 * Makefile.am: Add Score files.
217 * Makefile.in: Regenerate.
218 * NEWS: Mention new target support.
220 2006-09-16 Paul Brook <paul@codesourcery.com>
222 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
223 * doc/c-arm.texi (movsp): Document offset argument.
225 2006-09-16 Paul Brook <paul@codesourcery.com>
227 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
228 unsigned int to avoid 64-bit host problems.
230 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
232 * config/bfin-parse.y (binary): Do some more constant folding for
235 2006-09-13 Jan Beulich <jbeulich@novell.com>
237 * input-file.c (input_file_give_next_buffer): Demote as_bad to
240 2006-09-13 Alan Modra <amodra@bigpond.net.au>
243 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
246 2006-09-13 Alan Modra <amodra@bigpond.net.au>
248 * input-file.c (input_file_open): Replace as_perror with as_bad
249 so that gas exits with error on file errors. Correct error
251 (input_file_get, input_file_give_next_buffer): Likewise.
252 * input-file.h: Update comment.
254 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
257 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
258 registers as a sub-class of wC registers.
260 2006-09-11 Alan Modra <amodra@bigpond.net.au>
263 * config/tc-mips.h (enum dwarf2_format): Forward declare.
264 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
265 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
266 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
268 2006-09-08 Nick Clifton <nickc@redhat.com>
271 * doc/as.texinfo (Macro): Improve documentation about separating
272 macro arguments from following text.
274 2006-09-08 Paul Brook <paul@codesourcery.com>
276 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
278 2006-09-07 Paul Brook <paul@codesourcery.com>
280 * config/tc-arm.c (parse_operands): Mark operand as present.
282 2006-09-04 Paul Brook <paul@codesourcery.com>
284 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
285 (do_neon_dyadic_if_i_d): Avoid setting U bit.
286 (do_neon_mac_maybe_scalar): Ditto.
287 (do_neon_dyadic_narrow): Force operand type to NT_integer.
288 (insns): Remove out of date comments.
290 2006-08-29 Nick Clifton <nickc@redhat.com>
292 * read.c (s_align): Initialize the 'stopc' variable to prevent
293 compiler complaints about it being used without being
295 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
296 s_float_space, s_struct, cons_worker, equals): Likewise.
298 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
300 * ecoff.c (ecoff_directive_val): Fix message typo.
301 * config/tc-ns32k.c (convert_iif): Likewise.
302 * config/tc-sh64.c (shmedia_check_limits): Likewise.
304 2006-08-25 Sterling Augustine <sterling@tensilica.com>
305 Bob Wilson <bob.wilson@acm.org>
307 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
308 the state of the absolute_literals directive. Remove align frag at
309 the start of the literal pool position.
311 2006-08-25 Bob Wilson <bob.wilson@acm.org>
313 * doc/c-xtensa.texi: Add @group commands in examples.
315 2006-08-24 Bob Wilson <bob.wilson@acm.org>
317 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
318 (INIT_LITERAL_SECTION_NAME): Delete.
319 (lit_state struct): Remove segment names, init_lit_seg, and
320 fini_lit_seg. Add lit_prefix and current_text_seg.
321 (init_literal_head_h, init_literal_head): Delete.
322 (fini_literal_head_h, fini_literal_head): Delete.
323 (xtensa_begin_directive): Move argument parsing to
324 xtensa_literal_prefix function.
325 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
326 (xtensa_literal_prefix): Parse the directive argument here and
327 record it in the lit_prefix field. Remove code to derive literal
330 (get_is_linkonce_section): Use linkonce_len. Check for any
331 ".gnu.linkonce.*" section, not just text sections.
332 (md_begin): Remove initialization of deleted lit_state fields.
333 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
334 to init_literal_head and fini_literal_head.
335 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
336 when traversing literal_head list.
337 (match_section_group): New.
338 (cache_literal_section): Rewrite to determine the literal section
339 name on the fly, create the section and return it.
340 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
341 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
342 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
343 Use xtensa_get_property_section from bfd.
344 (retrieve_xtensa_section): Delete.
345 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
346 description to refer to plural literal sections and add xref to
347 the Literal Directive section.
348 (Literal Directive): Describe new rules for deriving literal section
349 names. Add footnote for special case of .init/.fini with
350 --text-section-literals.
351 (Literal Prefix Directive): Replace old naming rules with xref to the
352 Literal Directive section.
354 2006-08-21 Joseph Myers <joseph@codesourcery.com>
356 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
357 merging with previous long opcode.
359 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
361 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
362 * Makefile.in: Regenerate.
363 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
366 2006-08-16 Julian Brown <julian@codesourcery.com>
368 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
369 to use ARM instructions on non-ARM-supporting cores.
370 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
371 mode automatically based on cpu variant.
372 (md_begin): Call above function.
374 2006-08-16 Julian Brown <julian@codesourcery.com>
376 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
377 recognized in non-unified syntax mode.
379 2006-08-15 Thiemo Seufer <ths@mips.com>
380 Nigel Stephens <nigel@mips.com>
381 David Ung <davidu@mips.com>
383 * configure.tgt: Handle mips*-sde-elf*.
385 2006-08-12 Thiemo Seufer <ths@networkno.de>
387 * config/tc-mips.c (mips16_ip): Fix argument register handling
388 for restore instruction.
390 2006-08-08 Bob Wilson <bob.wilson@acm.org>
392 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
394 (out_fixed_inc_line_addr): New.
395 (process_entries): Use out_fixed_inc_line_addr when
396 DWARF2_USE_FIXED_ADVANCE_PC is set.
397 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
399 2006-08-08 DJ Delorie <dj@redhat.com>
401 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
402 vs full symbols so that we never have more than one pointer value
403 for any given symbol in our symbol table.
405 2006-08-08 Sterling Augustine <sterling@tensilica.com>
407 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
408 and emit DW_AT_ranges when code in compilation unit is not
410 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
412 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
413 (out_debug_ranges): New function to emit .debug_ranges section
414 when code is not contiguous.
416 2006-08-08 Nick Clifton <nickc@redhat.com>
418 * config/tc-arm.c (WARN_DEPRECATED): Enable.
420 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
422 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
424 (pe_directive_secrel) [TE_PE]: New function.
425 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
426 loc, loc_mark_labels.
427 [TE_PE]: Handle secrel32.
428 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
430 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
431 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
432 (md_section_align): Only round section sizes here for AOUT
434 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
435 (tc_pe_dwarf2_emit_offset): New function.
436 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
437 (cons_fix_new_arm): Handle O_secrel.
438 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
439 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
440 of OBJ_ELF only block.
441 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
442 tc_pe_dwarf2_emit_offset.
444 2006-08-04 Richard Sandiford <richard@codesourcery.com>
446 * config/tc-sh.c (apply_full_field_fix): New function.
447 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
448 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
449 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
450 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
452 2006-08-03 Nick Clifton <nickc@redhat.com>
455 * config.in: Regenerate.
457 2006-08-03 Joseph Myers <joseph@codesourcery.com>
459 * config/tc-arm.c (parse_operands): Handle invalid register name
462 2006-08-03 Joseph Myers <joseph@codesourcery.com>
464 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
465 (parse_operands): Handle it.
466 (insns): Use it for tmcr and tmrc.
468 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
471 * config/tc-i386.c (md_parse_option): Treat any target starting
472 with elf64_x86_64 as a viable target for the -64 switch.
473 (i386_target_format): For 64-bit ELF flavoured output use
475 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
477 2006-08-02 Nick Clifton <nickc@redhat.com>
480 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
482 * configure.in: Run BFD_BINARY_FOPEN.
483 * configure: Regenerate.
484 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
487 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
489 * config/tc-i386.c (md_assemble): Don't update
492 2006-08-01 Thiemo Seufer <ths@mips.com>
494 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
496 2006-08-01 Thiemo Seufer <ths@mips.com>
498 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
499 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
500 BFD_RELOC_32 and BFD_RELOC_16.
501 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
502 md_convert_frag, md_obj_end): Fix comment formatting.
504 2006-07-31 Thiemo Seufer <ths@mips.com>
506 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
507 handling for BFD_RELOC_MIPS16_JMP.
509 2006-07-24 Andreas Schwab <schwab@suse.de>
512 * read.c (read_a_source_file): Ignore unknown text after line
513 comment character. Fix misleading comment.
515 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
517 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
518 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
519 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
520 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
521 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
522 doc/c-z80.texi, doc/internals.texi: Fix some typos.
524 2006-07-21 Nick Clifton <nickc@redhat.com>
526 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
529 2006-07-20 Thiemo Seufer <ths@mips.com>
530 Nigel Stephens <nigel@mips.com>
532 * config/tc-mips.c (md_parse_option): Don't infer optimisation
533 options from debug options.
535 2006-07-20 Thiemo Seufer <ths@mips.com>
537 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
538 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
540 2006-07-19 Paul Brook <paul@codesourcery.com>
542 * config/tc-arm.c (insns): Fix rbit Arm opcode.
544 2006-07-18 Paul Brook <paul@codesourcery.com>
546 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
547 (md_convert_frag): Use correct reloc for add_pc. Use
548 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
549 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
550 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
552 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
554 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
555 when file and line unknown.
557 2006-07-17 Thiemo Seufer <ths@mips.com>
559 * read.c (s_struct): Use IS_ELF.
560 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
561 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
562 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
563 s_mips_mask): Likewise.
565 2006-07-16 Thiemo Seufer <ths@mips.com>
566 David Ung <davidu@mips.com>
568 * read.c (s_struct): Handle ELF section changing.
569 * config/tc-mips.c (s_align): Leave enabling auto-align to the
571 (s_change_sec): Try section changing only if we output ELF.
573 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
575 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
577 (smallest_imm_type): Remove Cpu086.
578 (i386_target_format): Likewise.
580 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
583 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
584 Michael Meissner <michael.meissner@amd.com>
586 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
587 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
588 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
590 (i386_align_code): Ditto.
591 (md_assemble_code): Add support for insertq/extrq instructions,
592 swapping as needed for intel syntax.
593 (swap_imm_operands): New function to swap immediate operands.
594 (swap_operands): Deal with 4 operand instructions.
595 (build_modrm_byte): Add support for insertq instruction.
597 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
599 * config/tc-i386.h (Size64): Fix a typo in comment.
601 2006-07-12 Nick Clifton <nickc@redhat.com>
603 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
604 fixup_segment() to repeat a range check on a value that has
605 already been checked here.
607 2006-07-07 James E Wilson <wilson@specifix.com>
609 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
611 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
612 Nick Clifton <nickc@redhat.com>
615 * doc/as.texi: Fix spelling typo: branchs => branches.
616 * doc/c-m68hc11.texi: Likewise.
617 * config/tc-m68hc11.c: Likewise.
618 Support old spelling of command line switch for backwards
621 2006-07-04 Thiemo Seufer <ths@mips.com>
622 David Ung <davidu@mips.com>
624 * config/tc-mips.c (s_is_linkonce): New function.
625 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
626 weak, external, and linkonce symbols.
627 (pic_need_relax): Use s_is_linkonce.
629 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
631 * doc/as.texinfo (Org): Remove space.
632 (P2align): Add "@var{abs-expr},".
634 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
636 * config/tc-i386.c (cpu_arch_tune_set): New.
637 (cpu_arch_isa): Likewise.
638 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
639 nops with short or long nop sequences based on -march=/.arch
641 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
642 set cpu_arch_tune and cpu_arch_tune_flags.
643 (md_parse_option): For -march=, set cpu_arch_isa and set
644 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
645 0. Set cpu_arch_tune_set to 1 for -mtune=.
646 (i386_target_format): Don't set cpu_arch_tune.
648 2006-06-23 Nigel Stephens <nigel@mips.com>
650 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
651 generated .sbss.* and .gnu.linkonce.sb.*.
653 2006-06-23 Thiemo Seufer <ths@mips.com>
654 David Ung <davidu@mips.com>
656 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
658 * config/tc-mips.c (label_list): Define per-segment label_list.
659 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
660 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
661 mips_from_file_after_relocs, mips_define_label): Use per-segment
664 2006-06-22 Thiemo Seufer <ths@mips.com>
666 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
667 (append_insn): Use it.
668 (md_apply_fix): Whitespace formatting.
669 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
670 mips16_extended_frag): Remove register specifier.
671 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
674 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
676 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
677 a directive saving VFP registers for ARMv6 or later.
678 (s_arm_unwind_save): Add parameter arch_v6 and call
679 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
681 (md_pseudo_table): Add entry for new "vsave" directive.
682 * doc/c-arm.texi: Correct error in example for "save"
683 directive (fstmdf -> fstmdx). Also document "vsave" directive.
685 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
686 Anatoly Sokolov <aesok@post.ru>
688 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
689 and atmega644p devices. Rename atmega164/atmega324 devices to
690 atmega164p/atmega324p.
691 * doc/c-avr.texi: Document new mcu and arch options.
693 2006-06-17 Nick Clifton <nickc@redhat.com>
695 * config/tc-arm.c (enum parse_operand_result): Move outside of
696 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
698 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
700 * config/tc-i386.h (processor_type): New.
701 (arch_entry): Add type.
703 * config/tc-i386.c (cpu_arch_tune): New.
704 (cpu_arch_tune_flags): Likewise.
705 (cpu_arch_isa_flags): Likewise.
707 (set_cpu_arch): Also update cpu_arch_isa_flags.
708 (md_assemble): Update cpu_arch_isa_flags.
710 (OPTION_MTUNE): Likewise.
711 (md_longopts): Add -march= and -mtune=.
712 (md_parse_option): Support -march= and -mtune=.
713 (md_show_usage): Add -march=CPU/-mtune=CPU.
714 (i386_target_format): Also update cpu_arch_isa_flags,
715 cpu_arch_tune and cpu_arch_tune_flags.
717 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
719 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
721 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
723 * config/tc-arm.c (enum parse_operand_result): New.
724 (struct group_reloc_table_entry): New.
725 (enum group_reloc_type): New.
726 (group_reloc_table): New array.
727 (find_group_reloc_table_entry): New function.
728 (parse_shifter_operand_group_reloc): New function.
729 (parse_address_main): New function, incorporating code
730 from the old parse_address function. To be used via...
731 (parse_address): wrapper for parse_address_main; and
732 (parse_address_group_reloc): new function, likewise.
733 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
734 OP_ADDRGLDRS, OP_ADDRGLDC.
735 (parse_operands): Support for these new operand codes.
736 New macro po_misc_or_fail_no_backtrack.
737 (encode_arm_cp_address): Preserve group relocations.
738 (insns): Modify to use the above operand codes where group
739 relocations are permitted.
740 (md_apply_fix): Handle the group relocations
741 ALU_PC_G0_NC through LDC_SB_G2.
742 (tc_gen_reloc): Likewise.
743 (arm_force_relocation): Leave group relocations for the linker.
744 (arm_fix_adjustable): Likewise.
746 2006-06-15 Julian Brown <julian@codesourcery.com>
748 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
749 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
752 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
754 * config/tc-i386.c (process_suffix): Don't add rex64 for
757 2006-06-09 Thiemo Seufer <ths@mips.com>
759 * config/tc-mips.c (mips_ip): Maintain argument count.
761 2006-06-09 Alan Modra <amodra@bigpond.net.au>
763 * config/tc-iq2000.c: Include sb.h.
765 2006-06-08 Nigel Stephens <nigel@mips.com>
767 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
768 aliases for better compatibility with SGI tools.
770 2006-06-08 Alan Modra <amodra@bigpond.net.au>
772 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
773 * Makefile.am (GASLIBS): Expand @BFDLIB@.
775 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
776 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
777 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
779 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
780 * Makefile.in: Regenerate.
781 * doc/Makefile.in: Regenerate.
782 * configure: Regenerate.
784 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
786 * po/Make-in (pdf, ps): New dummy targets.
788 2006-06-07 Julian Brown <julian@codesourcery.com>
790 * config/tc-arm.c (stdarg.h): include.
791 (arm_it): Add uncond_value field. Add isvec and issingle to operand
793 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
794 REG_TYPE_NSDQ (single, double or quad vector reg).
795 (reg_expected_msgs): Update.
796 (BAD_FPU): Add macro for unsupported FPU instruction error.
797 (parse_neon_type): Support 'd' as an alias for .f64.
798 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
800 (parse_vfp_reg_list): Don't update first arg on error.
801 (parse_neon_mov): Support extra syntax for VFP moves.
802 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
803 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
804 (parse_operands): Support isvec, issingle operands fields, new parse
806 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
808 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
809 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
810 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
811 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
813 (neon_shape): Redefine in terms of above.
814 (neon_shape_class): New enumeration, table of shape classes.
815 (neon_shape_el): New enumeration. One element of a shape.
816 (neon_shape_el_size): Register widths of above, where appropriate.
817 (neon_shape_info): New struct. Info for shape table.
818 (neon_shape_tab): New array.
819 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
820 (neon_check_shape): Rewrite as...
821 (neon_select_shape): New function to classify instruction shapes,
822 driven by new table neon_shape_tab array.
823 (neon_quad): New function. Return 1 if shape should set Q flag in
824 instructions (or equivalent), 0 otherwise.
825 (type_chk_of_el_type): Support F64.
826 (el_type_of_type_chk): Likewise.
827 (neon_check_type): Add support for VFP type checking (VFP data
828 elements fill their containing registers).
829 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
830 in thumb mode for VFP instructions.
831 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
832 and encode the current instruction as if it were that opcode.
833 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
834 arguments, call function in PFN.
835 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
836 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
837 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
838 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
839 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
840 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
841 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
842 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
843 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
844 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
845 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
846 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
847 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
848 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
849 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
851 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
852 between VFP and Neon turns out to belong to Neon. Perform
853 architecture check and fill in condition field if appropriate.
854 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
855 (do_neon_cvt): Add support for VFP variants of instructions.
856 (neon_cvt_flavour): Extend to cover VFP conversions.
857 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
859 (do_neon_ldr_str): Handle single-precision VFP load/store.
860 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
861 NS_NULL not NS_IGNORE.
862 (opcode_tag): Add OT_csuffixF for operands which either take a
863 conditional suffix, or have 0xF in the condition field.
864 (md_assemble): Add support for OT_csuffixF.
865 (NCE): Replace macro with...
866 (NCE_tag, NCE, NCEF): New macros.
867 (nCE): Replace macro with...
868 (nCE_tag, nCE, nCEF): New macros.
869 (insns): Add support for VFP insns or VFP versions of insns msr,
870 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
871 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
872 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
873 VFP/Neon insns together.
875 2006-06-07 Alan Modra <amodra@bigpond.net.au>
876 Ladislav Michl <ladis@linux-mips.org>
878 * app.c: Don't include headers already included by as.h.
880 * atof-generic.c: Likewise.
882 * dwarf2dbg.c: Likewise.
884 * input-file.c: Likewise.
885 * input-scrub.c: Likewise.
887 * output-file.c: Likewise.
890 * config/bfin-lex.l: Likewise.
891 * config/obj-coff.h: Likewise.
892 * config/obj-elf.h: Likewise.
893 * config/obj-som.h: Likewise.
894 * config/tc-arc.c: Likewise.
895 * config/tc-arm.c: Likewise.
896 * config/tc-avr.c: Likewise.
897 * config/tc-bfin.c: Likewise.
898 * config/tc-cris.c: Likewise.
899 * config/tc-d10v.c: Likewise.
900 * config/tc-d30v.c: Likewise.
901 * config/tc-dlx.h: Likewise.
902 * config/tc-fr30.c: Likewise.
903 * config/tc-frv.c: Likewise.
904 * config/tc-h8300.c: Likewise.
905 * config/tc-hppa.c: Likewise.
906 * config/tc-i370.c: Likewise.
907 * config/tc-i860.c: Likewise.
908 * config/tc-i960.c: Likewise.
909 * config/tc-ip2k.c: Likewise.
910 * config/tc-iq2000.c: Likewise.
911 * config/tc-m32c.c: Likewise.
912 * config/tc-m32r.c: Likewise.
913 * config/tc-maxq.c: Likewise.
914 * config/tc-mcore.c: Likewise.
915 * config/tc-mips.c: Likewise.
916 * config/tc-mmix.c: Likewise.
917 * config/tc-mn10200.c: Likewise.
918 * config/tc-mn10300.c: Likewise.
919 * config/tc-msp430.c: Likewise.
920 * config/tc-mt.c: Likewise.
921 * config/tc-ns32k.c: Likewise.
922 * config/tc-openrisc.c: Likewise.
923 * config/tc-ppc.c: Likewise.
924 * config/tc-s390.c: Likewise.
925 * config/tc-sh.c: Likewise.
926 * config/tc-sh64.c: Likewise.
927 * config/tc-sparc.c: Likewise.
928 * config/tc-tic30.c: Likewise.
929 * config/tc-tic4x.c: Likewise.
930 * config/tc-tic54x.c: Likewise.
931 * config/tc-v850.c: Likewise.
932 * config/tc-vax.c: Likewise.
933 * config/tc-xc16x.c: Likewise.
934 * config/tc-xstormy16.c: Likewise.
935 * config/tc-xtensa.c: Likewise.
936 * config/tc-z80.c: Likewise.
937 * config/tc-z8k.c: Likewise.
938 * macro.h: Don't include sb.h or ansidecl.h.
939 * sb.h: Don't include stdio.h or ansidecl.h.
940 * cond.c: Include sb.h.
941 * itbl-lex.l: Include as.h instead of other system headers.
942 * itbl-parse.y: Likewise.
943 * itbl-ops.c: Similarly.
944 * itbl-ops.h: Don't include as.h or ansidecl.h.
945 * config/bfin-defs.h: Don't include bfd.h or as.h.
946 * config/bfin-parse.y: Include as.h instead of other system headers.
948 2006-06-06 Ben Elliston <bje@au.ibm.com>
949 Anton Blanchard <anton@samba.org>
951 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
952 (md_show_usage): Document it.
953 (ppc_setup_opcodes): Test power6 opcode flag bits.
954 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
956 2006-06-06 Thiemo Seufer <ths@mips.com>
957 Chao-ying Fu <fu@mips.com>
959 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
960 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
961 (macro_build): Update comment.
962 (mips_ip): Allow DSP64 instructions for MIPS64R2.
963 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
965 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
966 MIPS_CPU_ASE_MDMX flags for sb1.
968 2006-06-05 Thiemo Seufer <ths@mips.com>
970 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
972 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
973 (mips_ip): Make overflowed/underflowed constant arguments in DSP
974 and MT instructions a fatal error. Use INSERT_OPERAND where
975 appropriate. Improve warnings for break and wait code overflows.
976 Use symbolic constant of OP_MASK_COPZ.
977 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
979 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
981 * po/Make-in (top_builddir): Define.
983 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
985 * doc/Makefile.am (TEXI2DVI): Define.
986 * doc/Makefile.in: Regenerate.
987 * doc/c-arc.texi: Fix typo.
989 2006-06-01 Alan Modra <amodra@bigpond.net.au>
991 * config/obj-ieee.c: Delete.
992 * config/obj-ieee.h: Delete.
993 * Makefile.am (OBJ_FORMATS): Remove ieee.
994 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
995 (obj-ieee.o): Remove rule.
996 * Makefile.in: Regenerate.
997 * configure.in (atof): Remove tahoe.
998 (OBJ_MAYBE_IEEE): Don't define.
999 * configure: Regenerate.
1000 * config.in: Regenerate.
1001 * doc/Makefile.in: Regenerate.
1002 * po/POTFILES.in: Regenerate.
1004 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1006 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1007 and LIBINTL_DEP everywhere.
1009 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1010 * acinclude.m4: Include new gettext macros.
1011 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1012 Remove local code for po/Makefile.
1013 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1015 2006-05-30 Nick Clifton <nickc@redhat.com>
1017 * po/es.po: Updated Spanish translation.
1019 2006-05-06 Denis Chertykov <denisc@overta.ru>
1021 * doc/c-avr.texi: New file.
1022 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1023 * doc/all.texi: Set AVR
1024 * doc/as.texinfo: Include c-avr.texi
1026 2006-05-28 Jie Zhang <jie.zhang@analog.com>
1028 * config/bfin-parse.y (check_macfunc): Loose the condition of
1029 calling check_multiply_halfregs ().
1031 2006-05-25 Jie Zhang <jie.zhang@analog.com>
1033 * config/bfin-parse.y (asm_1): Better check and deal with
1034 vector and scalar Multiply 16-Bit Operands instructions.
1036 2006-05-24 Nick Clifton <nickc@redhat.com>
1038 * config/tc-hppa.c: Convert to ISO C90 format.
1039 * config/tc-hppa.h: Likewise.
1041 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1042 Randolph Chung <randolph@tausq.org>
1044 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1045 is_tls_ieoff, is_tls_leoff): Define.
1046 (fix_new_hppa): Handle TLS.
1047 (cons_fix_new_hppa): Likewise.
1049 (md_apply_fix): Handle TLS relocs.
1050 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1052 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
1054 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1056 2006-05-23 Thiemo Seufer <ths@mips.com>
1057 David Ung <davidu@mips.com>
1058 Nigel Stephens <nigel@mips.com>
1061 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1062 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1063 ISA_HAS_MXHC1): New macros.
1064 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1065 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1066 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1067 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1068 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1069 (mips_after_parse_args): Change default handling of float register
1070 size to account for 32bit code with 64bit FP. Better sanity checking
1071 of ISA/ASE/ABI option combinations.
1072 (s_mipsset): Support switching of GPR and FPR sizes via
1073 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1075 (mips_elf_final_processing): We should record the use of 64bit FP
1076 registers in 32bit code but we don't, because ELF header flags are
1078 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1079 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1080 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1081 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1082 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1083 missing -march options. Document .set arch=CPU. Move .set smartmips
1084 to ASE page. Use @code for .set FOO examples.
1086 2006-05-23 Jie Zhang <jie.zhang@analog.com>
1088 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1091 2006-05-23 Jie Zhang <jie.zhang@analog.com>
1093 * config/bfin-defs.h (bfin_equals): Remove declaration.
1094 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1095 * config/tc-bfin.c (bfin_name_is_register): Remove.
1096 (bfin_equals): Remove.
1097 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1098 (bfin_name_is_register): Remove declaration.
1100 2006-05-19 Thiemo Seufer <ths@mips.com>
1101 Nigel Stephens <nigel@mips.com>
1103 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1104 (mips_oddfpreg_ok): New function.
1107 2006-05-19 Thiemo Seufer <ths@mips.com>
1108 David Ung <davidu@mips.com>
1110 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1111 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1112 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1113 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1114 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1115 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1116 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1117 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1118 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1119 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1120 reg_names_o32, reg_names_n32n64): Define register classes.
1121 (reg_lookup): New function, use register classes.
1122 (md_begin): Reserve register names in the symbol table. Simplify
1124 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1126 (mips16_ip): Use reg_lookup.
1127 (tc_get_register): Likewise.
1128 (tc_mips_regname_to_dw2regnum): New function.
1130 2006-05-19 Thiemo Seufer <ths@mips.com>
1132 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1133 Un-constify string argument.
1134 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1136 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1138 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1140 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1142 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1144 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1147 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1149 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1150 cfloat/m68881 to correct architecture before using it.
1152 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1154 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
1157 2006-05-15 Paul Brook <paul@codesourcery.com>
1159 * config/tc-arm.c (arm_adjust_symtab): Use
1160 bfd_is_arm_special_symbol_name.
1162 2006-05-15 Bob Wilson <bob.wilson@acm.org>
1164 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1165 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1166 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1167 Handle errors from calls to xtensa_opcode_is_* functions.
1169 2006-05-14 Thiemo Seufer <ths@mips.com>
1171 * config/tc-mips.c (macro_build): Test for currently active
1173 (mips16_ip): Reject invalid opcodes.
1175 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1177 * doc/as.texinfo: Rename "Index" to "AS Index",
1178 and "ABORT" to "ABORT (COFF)".
1180 2006-05-11 Paul Brook <paul@codesourcery.com>
1182 * config/tc-arm.c (parse_half): New function.
1183 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1184 (parse_operands): Ditto.
1185 (do_mov16): Reject invalid relocations.
1186 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1187 (insns): Replace Iffff with HALF.
1188 (md_apply_fix): Add MOVW and MOVT relocs.
1189 (tc_gen_reloc): Ditto.
1190 * doc/c-arm.texi: Document relocation operators
1192 2006-05-11 Paul Brook <paul@codesourcery.com>
1194 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1196 2006-05-11 Thiemo Seufer <ths@mips.com>
1198 * config/tc-mips.c (append_insn): Don't check the range of j or
1201 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1203 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1204 relocs against external symbols for WinCE targets.
1205 (md_apply_fix): Likewise.
1207 2006-05-09 David Ung <davidu@mips.com>
1209 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1212 2006-05-09 Nick Clifton <nickc@redhat.com>
1214 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1215 against symbols which are not going to be placed into the symbol
1218 2006-05-09 Ben Elliston <bje@au.ibm.com>
1220 * expr.c (operand): Remove `if (0 && ..)' statement and
1221 subsequently unused target_op label. Collapse `if (1 || ..)'
1223 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1224 separately above the switch.
1226 2006-05-08 Nick Clifton <nickc@redhat.com>
1229 * config/tc-msp430.c (line_separator_character): Define as |.
1231 2006-05-08 Thiemo Seufer <ths@mips.com>
1232 Nigel Stephens <nigel@mips.com>
1233 David Ung <davidu@mips.com>
1235 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1236 (mips_opts): Likewise.
1237 (file_ase_smartmips): New variable.
1238 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1239 (macro_build): Handle SmartMIPS instructions.
1240 (mips_ip): Likewise.
1241 (md_longopts): Add argument handling for smartmips.
1242 (md_parse_options, mips_after_parse_args): Likewise.
1243 (s_mipsset): Add .set smartmips support.
1244 (md_show_usage): Document -msmartmips/-mno-smartmips.
1245 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1247 * doc/c-mips.texi: Likewise.
1249 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1251 * write.c (relax_segment): Add pass count arg. Don't error on
1252 negative org/space on first two passes.
1253 (relax_seg_info): New struct.
1254 (relax_seg, write_object_file): Adjust.
1255 * write.h (relax_segment): Update prototype.
1257 2006-05-05 Julian Brown <julian@codesourcery.com>
1259 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1261 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1262 architecture version checks.
1263 (insns): Allow overlapping instructions to be used in VFP mode.
1265 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1268 * config/obj-elf.c (obj_elf_change_section): Allow user
1269 specified SHF_ALPHA_GPREL.
1271 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1273 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1274 for PMEM related expressions.
1276 2006-05-05 Nick Clifton <nickc@redhat.com>
1279 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1280 insertion of a directory separator character into a string at a
1281 given offset. Uses heuristics to decide when to use a backslash
1282 character rather than a forward-slash character.
1283 (dwarf2_directive_loc): Use the macro.
1284 (out_debug_info): Likewise.
1286 2006-05-05 Thiemo Seufer <ths@mips.com>
1287 David Ung <davidu@mips.com>
1289 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1291 (macro): Add new case M_CACHE_AB.
1293 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1295 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1296 (opcode_lookup): Issue a warning for opcode with
1297 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1298 identical to OT_cinfix3.
1299 (TxC3w, TC3w, tC3w): New.
1300 (insns): Use tC3w and TC3w for comparison instructions with
1303 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1305 * subsegs.h (struct frchain): Delete frch_seg.
1306 (frchain_root): Delete.
1307 (seg_info): Define as macro.
1308 * subsegs.c (frchain_root): Delete.
1309 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1310 (subsegs_begin, subseg_change): Adjust for above.
1311 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1312 rather than to one big list.
1313 (subseg_get): Don't special case abs, und sections.
1314 (subseg_new, subseg_force_new): Don't set frchainP here.
1316 (subsegs_print_statistics): Adjust frag chain control list traversal.
1317 * debug.c (dmp_frags): Likewise.
1318 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1319 at frchain_root. Make use of known frchain ordering.
1320 (last_frag_for_seg): Likewise.
1321 (get_frag_fix): Likewise. Add seg param.
1322 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1323 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1324 (SUB_SEGMENT_ALIGN): Likewise.
1325 (subsegs_finish): Adjust frchain list traversal.
1326 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1327 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1328 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1329 (xtensa_fix_b_j_loop_end_frags): Likewise.
1330 (xtensa_fix_close_loop_end_frags): Likewise.
1331 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1332 (retrieve_segment_info): Delete frch_seg initialisation.
1334 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1336 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1337 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1338 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1339 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1341 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1343 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1345 (md_apply_fix3): Multiply offset by 4 here for
1346 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1348 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1349 Jan Beulich <jbeulich@novell.com>
1351 * config/tc-i386.c (output_invalid_buf): Change size for
1353 * config/tc-tic30.c (output_invalid_buf): Likewise.
1355 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1357 * config/tc-tic30.c (output_invalid): Likewise.
1359 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1361 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1362 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1363 (asconfig.texi): Don't set top_srcdir.
1364 * doc/as.texinfo: Don't use top_srcdir.
1365 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1367 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1369 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1370 * config/tc-tic30.c (output_invalid_buf): Likewise.
1372 * config/tc-i386.c (output_invalid): Use snprintf instead of
1374 * config/tc-ia64.c (declare_register_set): Likewise.
1375 (emit_one_bundle): Likewise.
1376 (check_dependencies): Likewise.
1377 * config/tc-tic30.c (output_invalid): Likewise.
1379 2006-05-02 Paul Brook <paul@codesourcery.com>
1381 * config/tc-arm.c (arm_optimize_expr): New function.
1382 * config/tc-arm.h (md_optimize_expr): Define
1383 (arm_optimize_expr): Add prototype.
1384 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1386 2006-05-02 Ben Elliston <bje@au.ibm.com>
1388 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1391 * sb.h (sb_list_vector): Move to sb.c.
1392 * sb.c (free_list): Use type of sb_list_vector directly.
1393 (sb_build): Fix off-by-one error in assertion about `size'.
1395 2006-05-01 Ben Elliston <bje@au.ibm.com>
1397 * listing.c (listing_listing): Remove useless loop.
1398 * macro.c (macro_expand): Remove is_positional local variable.
1399 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1400 and simplify surrounding expressions, where possible.
1401 (assign_symbol): Likewise.
1402 (s_weakref): Likewise.
1403 * symbols.c (colon): Likewise.
1405 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1407 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1409 2006-04-30 Thiemo Seufer <ths@mips.com>
1410 David Ung <davidu@mips.com>
1412 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1413 (mips_immed): New table that records various handling of udi
1414 instruction patterns.
1415 (mips_ip): Adds udi handling.
1417 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1419 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1420 of list rather than beginning.
1422 2006-04-26 Julian Brown <julian@codesourcery.com>
1424 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1425 (is_quarter_float): Rename from above. Simplify slightly.
1426 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1428 (parse_neon_mov): Parse floating-point constants.
1429 (neon_qfloat_bits): Fix encoding.
1430 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1431 preference to integer encoding when using the F32 type.
1433 2006-04-26 Julian Brown <julian@codesourcery.com>
1435 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1436 zero-initialising structures containing it will lead to invalid types).
1437 (arm_it): Add vectype to each operand.
1438 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1440 (neon_typed_alias): New structure. Extra information for typed
1442 (reg_entry): Add neon type info field.
1443 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1444 Break out alternative syntax for coprocessor registers, etc. into...
1445 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1446 out from arm_reg_parse.
1447 (parse_neon_type): Move. Return SUCCESS/FAIL.
1448 (first_error): New function. Call to ensure first error which occurs is
1450 (parse_neon_operand_type): Parse exactly one type.
1451 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1452 (parse_typed_reg_or_scalar): New function. Handle core of both
1453 arm_typed_reg_parse and parse_scalar.
1454 (arm_typed_reg_parse): Parse a register with an optional type.
1455 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1457 (parse_scalar): Parse a Neon scalar with optional type.
1458 (parse_reg_list): Use first_error.
1459 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1460 (neon_alias_types_same): New function. Return true if two (alias) types
1462 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1464 (insert_reg_alias): Return new reg_entry not void.
1465 (insert_neon_reg_alias): New function. Insert type/index information as
1466 well as register for alias.
1467 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1468 make typed register aliases accordingly.
1469 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1471 (s_unreq): Delete type information if present.
1472 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1473 (s_arm_unwind_save_mmxwcg): Likewise.
1474 (s_arm_unwind_movsp): Likewise.
1475 (s_arm_unwind_setfp): Likewise.
1476 (parse_shift): Likewise.
1477 (parse_shifter_operand): Likewise.
1478 (parse_address): Likewise.
1479 (parse_tb): Likewise.
1480 (tc_arm_regname_to_dw2regnum): Likewise.
1481 (md_pseudo_table): Add dn, qn.
1482 (parse_neon_mov): Handle typed operands.
1483 (parse_operands): Likewise.
1484 (neon_type_mask): Add N_SIZ.
1485 (N_ALLMODS): New macro.
1486 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1487 (el_type_of_type_chk): Add some safeguards.
1488 (modify_types_allowed): Fix logic bug.
1489 (neon_check_type): Handle operands with types.
1490 (neon_three_same): Remove redundant optional arg handling.
1491 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1492 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1493 (do_neon_step): Adjust accordingly.
1494 (neon_cmode_for_logic_imm): Use first_error.
1495 (do_neon_bitfield): Call neon_check_type.
1496 (neon_dyadic): Rename to...
1497 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1498 to allow modification of type of the destination.
1499 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1500 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1501 (do_neon_compare): Make destination be an untyped bitfield.
1502 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1503 (neon_mul_mac): Return early in case of errors.
1504 (neon_move_immediate): Use first_error.
1505 (neon_mac_reg_scalar_long): Fix type to include scalar.
1506 (do_neon_dup): Likewise.
1507 (do_neon_mov): Likewise (in several places).
1508 (do_neon_tbl_tbx): Fix type.
1509 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1510 (do_neon_ld_dup): Exit early in case of errors and/or use
1512 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1513 Handle .dn/.qn directives.
1514 (REGDEF): Add zero for reg_entry neon field.
1516 2006-04-26 Julian Brown <julian@codesourcery.com>
1518 * config/tc-arm.c (limits.h): Include.
1519 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1520 (fpu_vfp_v3_or_neon_ext): Declare constants.
1521 (neon_el_type): New enumeration of types for Neon vector elements.
1522 (neon_type_el): New struct. Define type and size of a vector element.
1523 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1525 (neon_type): Define struct. The type of an instruction.
1526 (arm_it): Add 'vectype' for the current instruction.
1527 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1528 (vfp_sp_reg_pos): Rename to...
1529 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1531 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1532 (Neon D or Q register).
1533 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1535 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1536 (my_get_expression): Allow above constant as argument to accept
1537 64-bit constants with optional prefix.
1538 (arm_reg_parse): Add extra argument to return the specific type of
1539 register in when either a D or Q register (REG_TYPE_NDQ) is
1540 requested. Can be NULL.
1541 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1542 (parse_reg_list): Update for new arm_reg_parse args.
1543 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1544 (parse_neon_el_struct_list): New function. Parse element/structure
1545 register lists for VLD<n>/VST<n> instructions.
1546 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1547 (s_arm_unwind_save_mmxwr): Likewise.
1548 (s_arm_unwind_save_mmxwcg): Likewise.
1549 (s_arm_unwind_movsp): Likewise.
1550 (s_arm_unwind_setfp): Likewise.
1551 (parse_big_immediate): New function. Parse an immediate, which may be
1552 64 bits wide. Put results in inst.operands[i].
1553 (parse_shift): Update for new arm_reg_parse args.
1554 (parse_address): Likewise. Add parsing of alignment specifiers.
1555 (parse_neon_mov): Parse the operands of a VMOV instruction.
1556 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1557 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1558 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1559 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1560 (parse_operands): Handle new codes above.
1561 (encode_arm_vfp_sp_reg): Rename to...
1562 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1563 selected VFP version only supports D0-D15.
1564 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1565 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1566 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1567 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1568 encode_arm_vfp_reg name, and allow 32 D regs.
1569 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1570 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1572 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1573 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1574 constant-load and conversion insns introduced with VFPv3.
1575 (neon_tab_entry): New struct.
1576 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1577 those which are the targets of pseudo-instructions.
1578 (neon_opc): Enumerate opcodes, use as indices into...
1579 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1580 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1581 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1582 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1584 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1586 (neon_type_mask): New. Compact type representation for type checking.
1587 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1588 permitted type combinations.
1589 (N_IGNORE_TYPE): New macro.
1590 (neon_check_shape): New function. Check an instruction shape for
1591 multiple alternatives. Return the specific shape for the current
1593 (neon_modify_type_size): New function. Modify a vector type and size,
1594 depending on the bit mask in argument 1.
1595 (neon_type_promote): New function. Convert a given "key" type (of an
1596 operand) into the correct type for a different operand, based on a bit
1598 (type_chk_of_el_type): New function. Convert a type and size into the
1599 compact representation used for type checking.
1600 (el_type_of_type_ckh): New function. Reverse of above (only when a
1601 single bit is set in the bit mask).
1602 (modify_types_allowed): New function. Alter a mask of allowed types
1603 based on a bit mask of modifications.
1604 (neon_check_type): New function. Check the type of the current
1605 instruction against the variable argument list. The "key" type of the
1606 instruction is returned.
1607 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1608 a Neon data-processing instruction depending on whether we're in ARM
1609 mode or Thumb-2 mode.
1610 (neon_logbits): New function.
1611 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1612 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1613 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1614 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1615 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1616 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1617 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1618 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1619 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1620 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1621 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1622 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1623 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1624 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1625 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1626 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1627 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1628 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1629 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1630 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1631 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1632 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1633 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1634 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1635 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1637 (parse_neon_type): New function. Parse Neon type specifier.
1638 (opcode_lookup): Allow parsing of Neon type specifiers.
1639 (REGNUM2, REGSETH, REGSET2): New macros.
1640 (reg_names): Add new VFPv3 and Neon registers.
1641 (NUF, nUF, NCE, nCE): New macros for opcode table.
1642 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1643 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1644 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1645 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1646 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1647 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1648 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1649 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1650 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1651 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1652 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1653 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1654 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1655 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1657 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1658 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1659 (arm_option_cpu_value): Add vfp3 and neon.
1660 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1663 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1665 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1666 syntax instead of hardcoded opcodes with ".w18" suffixes.
1667 (wide_branch_opcode): New.
1668 (build_transition): Use it to check for wide branch opcodes with
1669 either ".w18" or ".w15" suffixes.
1671 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1673 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1674 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1675 frag's is_literal flag.
1677 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1679 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1681 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1683 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1684 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1685 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1686 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1687 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1689 2005-04-20 Paul Brook <paul@codesourcery.com>
1691 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1693 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1695 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1697 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1698 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1699 Make some cpus unsupported on ELF. Run "make dep-am".
1700 * Makefile.in: Regenerate.
1702 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1704 * configure.in (--enable-targets): Indent help message.
1705 * configure: Regenerate.
1707 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1710 * config/tc-i386.c (i386_immediate): Check illegal immediate
1713 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1715 * config/tc-i386.c: Formatting.
1716 (output_disp, output_imm): ISO C90 params.
1718 * frags.c (frag_offset_fixed_p): Constify args.
1719 * frags.h (frag_offset_fixed_p): Ditto.
1721 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1722 (COFF_MAGIC): Delete.
1724 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1726 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1728 * po/POTFILES.in: Regenerated.
1730 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1732 * doc/as.texinfo: Mention that some .type syntaxes are not
1733 supported on all architectures.
1735 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1737 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1738 instructions when such transformations have been disabled.
1740 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1742 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1743 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1744 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1745 decoding the loop instructions. Remove current_offset variable.
1746 (xtensa_fix_short_loop_frags): Likewise.
1747 (min_bytes_to_other_loop_end): Remove current_offset argument.
1749 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1751 * config/tc-z80.c (z80_optimize_expr): Removed.
1752 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1754 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1756 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1757 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1758 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1759 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1760 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1761 at90can64, at90usb646, at90usb647, at90usb1286 and
1763 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1765 2006-04-07 Paul Brook <paul@codesourcery.com>
1767 * config/tc-arm.c (parse_operands): Set default error message.
1769 2006-04-07 Paul Brook <paul@codesourcery.com>
1771 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1773 2006-04-07 Paul Brook <paul@codesourcery.com>
1775 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1777 2006-04-07 Paul Brook <paul@codesourcery.com>
1779 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1780 (move_or_literal_pool): Handle Thumb-2 instructions.
1781 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1783 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1786 * config/tc-i386.c (match_template): Move 64-bit operand tests
1789 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1791 * po/Make-in: Add install-html target.
1792 * Makefile.am: Add install-html and install-html-recursive targets.
1793 * Makefile.in: Regenerate.
1794 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1795 * configure: Regenerate.
1796 * doc/Makefile.am: Add install-html and install-html-am targets.
1797 * doc/Makefile.in: Regenerate.
1799 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1801 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1804 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1805 Daniel Jacobowitz <dan@codesourcery.com>
1807 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1808 (GOTT_BASE, GOTT_INDEX): New.
1809 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1810 GOTT_INDEX when generating VxWorks PIC.
1811 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1812 use the generic *-*-vxworks* stanza instead.
1814 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1817 * frags.c (frag_offset_fixed_p): New function.
1818 * frags.h (frag_offset_fixed_p): Declare.
1819 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1820 (resolve_expression): Likewise.
1822 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1824 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1825 of the same length but different numbers of slots.
1827 2006-03-30 Andreas Schwab <schwab@suse.de>
1829 * configure.in: Fix help string for --enable-targets option.
1830 * configure: Regenerate.
1832 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1834 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1835 (m68k_ip): ... here. Use for all chips. Protect against buffer
1836 overrun and avoid excessive copying.
1838 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1839 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1840 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1841 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1842 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1843 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1844 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1845 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1846 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1847 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1848 (struct m68k_cpu): Change chip field to control_regs.
1849 (current_chip): Remove.
1850 (control_regs): New.
1851 (m68k_archs, m68k_extensions): Adjust.
1852 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1853 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1854 (find_cf_chip): Reimplement for new organization of cpu table.
1855 (select_control_regs): Remove.
1857 (struct save_opts): Save control regs, not chip.
1858 (s_save, s_restore): Adjust.
1859 (m68k_lookup_cpu): Give deprecated warning when necessary.
1860 (m68k_init_arch): Adjust.
1861 (md_show_usage): Adjust for new cpu table organization.
1863 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1865 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1866 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1867 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1869 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1870 (any_gotrel): New rule.
1871 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1872 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1874 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1875 (bfin_pic_ptr): New function.
1876 (md_pseudo_table): Add it for ".picptr".
1877 (OPTION_FDPIC): New macro.
1878 (md_longopts): Add -mfdpic.
1879 (md_parse_option): Handle it.
1880 (md_begin): Set BFD flags.
1881 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1882 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1884 * Makefile.am (bfin-parse.o): Update dependencies.
1885 (DEPTC_bfin_elf): Likewise.
1886 * Makefile.in: Regenerate.
1888 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1890 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1891 mcfemac instead of mcfmac.
1893 2006-03-23 Michael Matz <matz@suse.de>
1895 * config/tc-i386.c (type_names): Correct placement of 'static'.
1896 (reloc): Map some more relocs to their 64 bit counterpart when
1898 (output_insn): Work around breakage if DEBUG386 is defined.
1899 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1900 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1901 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1902 different from i386.
1903 (output_imm): Ditto.
1904 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1906 (md_convert_frag): Jumps can now be larger than 2GB away, error
1908 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1909 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1911 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1912 Daniel Jacobowitz <dan@codesourcery.com>
1913 Phil Edwards <phil@codesourcery.com>
1914 Zack Weinberg <zack@codesourcery.com>
1915 Mark Mitchell <mark@codesourcery.com>
1916 Nathan Sidwell <nathan@codesourcery.com>
1918 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1919 (md_begin): Complain about -G being used for PIC. Don't change
1920 the text, data and bss alignments on VxWorks.
1921 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1922 generating VxWorks PIC.
1923 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1924 (macro): Likewise, but do not treat la $25 specially for
1925 VxWorks PIC, and do not handle jal.
1926 (OPTION_MVXWORKS_PIC): New macro.
1927 (md_longopts): Add -mvxworks-pic.
1928 (md_parse_option): Don't complain about using PIC and -G together here.
1929 Handle OPTION_MVXWORKS_PIC.
1930 (md_estimate_size_before_relax): Always use the first relaxation
1931 sequence on VxWorks.
1932 * config/tc-mips.h (VXWORKS_PIC): New.
1934 2006-03-21 Paul Brook <paul@codesourcery.com>
1936 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1938 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1940 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1941 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1942 (get_loop_align_size): New.
1943 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1944 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1945 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1946 (get_noop_aligned_address): Use get_loop_align_size.
1947 (get_aligned_diff): Likewise.
1949 2006-03-21 Paul Brook <paul@codesourcery.com>
1951 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1953 2006-03-20 Paul Brook <paul@codesourcery.com>
1955 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1956 (do_t_branch): Encode branches inside IT blocks as unconditional.
1957 (do_t_cps): New function.
1958 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1959 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1960 (opcode_lookup): Allow conditional suffixes on all instructions in
1962 (md_assemble): Advance condexec state before checking for errors.
1963 (insns): Use do_t_cps.
1965 2006-03-20 Paul Brook <paul@codesourcery.com>
1967 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1968 outputting the insn.
1970 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1972 * config/tc-vax.c: Update copyright year.
1973 * config/tc-vax.h: Likewise.
1975 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1977 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1979 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1981 2006-03-17 Paul Brook <paul@codesourcery.com>
1983 * config/tc-arm.c (insns): Add ldm and stm.
1985 2006-03-17 Ben Elliston <bje@au.ibm.com>
1988 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1990 2006-03-16 Paul Brook <paul@codesourcery.com>
1992 * config/tc-arm.c (insns): Add "svc".
1994 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1996 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1997 flag and avoid double underscore prefixes.
1999 2006-03-10 Paul Brook <paul@codesourcery.com>
2001 * config/tc-arm.c (md_begin): Handle EABIv5.
2002 (arm_eabis): Add EF_ARM_EABI_VER5.
2003 * doc/c-arm.texi: Document -meabi=5.
2005 2006-03-10 Ben Elliston <bje@au.ibm.com>
2007 * app.c (do_scrub_chars): Simplify string handling.
2009 2006-03-07 Richard Sandiford <richard@codesourcery.com>
2010 Daniel Jacobowitz <dan@codesourcery.com>
2011 Zack Weinberg <zack@codesourcery.com>
2012 Nathan Sidwell <nathan@codesourcery.com>
2013 Paul Brook <paul@codesourcery.com>
2014 Ricardo Anguiano <anguiano@codesourcery.com>
2015 Phil Edwards <phil@codesourcery.com>
2017 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2018 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2020 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2021 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2022 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2024 2006-03-06 Bob Wilson <bob.wilson@acm.org>
2026 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2027 even when using the text-section-literals option.
2029 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2031 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2033 (m68k_ip): <case 'J'> Check we have some control regs.
2034 (md_parse_option): Allow raw arch switch.
2035 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2036 whether 68881 or cfloat was meant by -mfloat.
2037 (md_show_usage): Adjust extension display.
2038 (m68k_elf_final_processing): Adjust.
2040 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2042 * config/tc-avr.c (avr_mod_hash_value): New function.
2043 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
2044 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
2045 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2046 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2048 (tc_gen_reloc): Handle substractions of symbols, if possible do
2049 fixups, abort otherwise.
2050 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2051 tc_fix_adjustable): Define.
2053 2006-03-02 James E Wilson <wilson@specifix.com>
2055 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2056 change the template, then clear md.slot[curr].end_of_insn_group.
2058 2006-02-28 Jan Beulich <jbeulich@novell.com>
2060 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2062 2006-02-28 Jan Beulich <jbeulich@novell.com>
2065 * macro.c (getstring): Don't treat parentheses special anymore.
2066 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2067 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2070 2006-02-28 Mat <mat@csail.mit.edu>
2072 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2074 2006-02-27 Jakub Jelinek <jakub@redhat.com>
2076 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2078 (CFI_signal_frame): Define.
2079 (cfi_pseudo_table): Add .cfi_signal_frame.
2080 (dot_cfi): Handle CFI_signal_frame.
2081 (output_cie): Handle cie->signal_frame.
2082 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2083 different. Copy signal_frame from FDE to newly created CIE.
2084 * doc/as.texinfo: Document .cfi_signal_frame.
2086 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2088 * doc/Makefile.am: Add html target.
2089 * doc/Makefile.in: Regenerate.
2090 * po/Make-in: Add html target.
2092 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2094 * config/tc-i386.c (output_insn): Support Intel Merom New
2097 * config/tc-i386.h (CpuMNI): New.
2098 (CpuUnknownFlags): Add CpuMNI.
2100 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
2102 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2103 (hpriv_reg_table): New table for hyperprivileged registers.
2104 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2107 2006-02-24 DJ Delorie <dj@redhat.com>
2109 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2110 (tc_gen_reloc): Don't define.
2111 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2112 (OPTION_LINKRELAX): New.
2113 (md_longopts): Add it.
2115 (md_parse_options): Set it.
2116 (md_assemble): Emit relaxation relocs as needed.
2117 (md_convert_frag): Emit relaxation relocs as needed.
2118 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2119 (m32c_apply_fix): New.
2120 (tc_gen_reloc): New.
2121 (m32c_force_relocation): Force out jump relocs when relaxing.
2122 (m32c_fix_adjustable): Return false if relaxing.
2124 2006-02-24 Paul Brook <paul@codesourcery.com>
2126 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2127 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2128 (struct asm_barrier_opt): Define.
2129 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2130 (parse_psr): Accept V7M psr names.
2131 (parse_barrier): New function.
2132 (enum operand_parse_code): Add OP_oBARRIER.
2133 (parse_operands): Implement OP_oBARRIER.
2134 (do_barrier): New function.
2135 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2136 (do_t_cpsi): Add V7M restrictions.
2137 (do_t_mrs, do_t_msr): Validate V7M variants.
2138 (md_assemble): Check for NULL variants.
2139 (v7m_psrs, barrier_opt_names): New tables.
2140 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2141 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2142 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2143 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2144 (struct cpu_arch_ver_table): Define.
2145 (cpu_arch_ver): New.
2146 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2147 Tag_CPU_arch_profile.
2148 * doc/c-arm.texi: Document new cpu and arch options.
2150 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2152 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2154 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2156 * config/tc-ia64.c: Update copyright years.
2158 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2160 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2163 2005-02-22 Paul Brook <paul@codesourcery.com>
2165 * config/tc-arm.c (do_pld): Remove incorrect write to
2167 (encode_thumb32_addr_mode): Use correct operand.
2169 2006-02-21 Paul Brook <paul@codesourcery.com>
2171 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2173 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2174 Anil Paranjape <anilp1@kpitcummins.com>
2175 Shilin Shakti <shilins@kpitcummins.com>
2177 * Makefile.am: Add xc16x related entry.
2178 * Makefile.in: Regenerate.
2179 * configure.in: Added xc16x related entry.
2180 * configure: Regenerate.
2181 * config/tc-xc16x.h: New file
2182 * config/tc-xc16x.c: New file
2183 * doc/c-xc16x.texi: New file for xc16x
2184 * doc/all.texi: Entry for xc16x
2185 * doc/Makefile.texi: Added c-xc16x.texi
2186 * NEWS: Announce the support for the new target.
2188 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2190 * configure.tgt: set emulation for mips-*-netbsd*
2192 2006-02-14 Jakub Jelinek <jakub@redhat.com>
2194 * config.in: Rebuilt.
2196 2006-02-13 Bob Wilson <bob.wilson@acm.org>
2198 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2199 from 1, not 0, in error messages.
2200 (md_assemble): Simplify special-case check for ENTRY instructions.
2201 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2202 operand in error message.
2204 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2206 * configure.tgt (arm-*-linux-gnueabi*): Change to
2209 2006-02-10 Nick Clifton <nickc@redhat.com>
2211 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2212 32-bit value is propagated into the upper bits of a 64-bit long.
2214 * config/tc-arc.c (init_opcode_tables): Fix cast.
2215 (arc_extoper, md_operand): Likewise.
2217 2006-02-09 David Heine <dlheine@tensilica.com>
2219 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2220 each relaxation step.
2222 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2224 * configure.in (CHECK_DECLS): Add vsnprintf.
2225 * configure: Regenerate.
2226 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2227 include/declare here, but...
2228 * as.h: Move code detecting VARARGS idiom to the top.
2229 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2230 (vsnprintf): Declare if not already declared.
2232 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2234 * as.c (close_output_file): New.
2235 (main): Register close_output_file with xatexit before
2236 dump_statistics. Don't call output_file_close.
2238 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2240 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2241 mcf5329_control_regs): New.
2242 (not_current_architecture, selected_arch, selected_cpu): New.
2243 (m68k_archs, m68k_extensions): New.
2244 (archs): Renamed to ...
2245 (m68k_cpus): ... here. Adjust.
2247 (md_pseudo_table): Add arch and cpu directives.
2248 (find_cf_chip, m68k_ip): Adjust table scanning.
2249 (no_68851, no_68881): Remove.
2250 (md_assemble): Lazily initialize.
2251 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2252 (md_init_after_args): Move functionality to m68k_init_arch.
2253 (mri_chip): Adjust table scanning.
2254 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2255 options with saner parsing.
2256 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2257 m68k_init_arch): New.
2258 (s_m68k_cpu, s_m68k_arch): New.
2259 (md_show_usage): Adjust.
2260 (m68k_elf_final_processing): Set CF EF flags.
2261 * config/tc-m68k.h (m68k_init_after_args): Remove.
2262 (tc_init_after_args): Remove.
2263 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2264 (M68k-Directives): Document .arch and .cpu directives.
2266 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2268 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2269 synonyms for equ and defl.
2270 (z80_cons_fix_new): New function.
2271 (emit_byte): Disallow relative jumps to absolute locations.
2272 (emit_data): Only handle defb, prototype changed, because defb is
2273 now handled as pseudo-op rather than an instruction.
2274 (instab): Entries for defb,defw,db,dw moved from here...
2275 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2276 Add entries for def24,def32,d24,d32.
2277 (md_assemble): Improved error handling.
2278 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2279 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2280 (z80_cons_fix_new): Declare.
2281 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2282 (def24,d24,def32,d32): New pseudo-ops.
2284 2006-02-02 Paul Brook <paul@codesourcery.com>
2286 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2288 2005-02-02 Paul Brook <paul@codesourcery.com>
2290 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2291 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2292 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2293 T2_OPCODE_RSB): Define.
2294 (thumb32_negate_data_op): New function.
2295 (md_apply_fix): Use it.
2297 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2299 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2301 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2302 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2304 (relaxation_requirements): Add pfinish_frag argument and use it to
2305 replace setting tinsn->record_fix fields.
2306 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2307 and vinsn_to_insnbuf. Remove references to record_fix and
2308 slot_sub_symbols fields.
2309 (xtensa_mark_narrow_branches): Delete unused code.
2310 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2312 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2314 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2315 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2316 of the record_fix field. Simplify error messages for unexpected
2318 (set_expr_symbol_offset_diff): Delete.
2320 2006-01-31 Paul Brook <paul@codesourcery.com>
2322 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2324 2006-01-31 Paul Brook <paul@codesourcery.com>
2325 Richard Earnshaw <rearnsha@arm.com>
2327 * config/tc-arm.c: Use arm_feature_set.
2328 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2329 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2330 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2333 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2334 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2335 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2336 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2338 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2339 (arm_opts): Move old cpu/arch options from here...
2340 (arm_legacy_opts): ... to here.
2341 (md_parse_option): Search arm_legacy_opts.
2342 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2343 (arm_float_abis, arm_eabis): Make const.
2345 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2347 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2349 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2351 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2352 in load immediate intruction.
2354 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2356 * config/bfin-parse.y (value_match): Use correct conversion
2357 specifications in template string for __FILE__ and __LINE__.
2361 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2363 Introduce TLS descriptors for i386 and x86_64.
2364 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2365 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2366 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2367 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2368 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2370 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2371 (lex_got): Handle @tlsdesc and @tlscall.
2372 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2374 2006-01-11 Nick Clifton <nickc@redhat.com>
2376 Fixes for building on 64-bit hosts:
2377 * config/tc-avr.c (mod_index): New union to allow conversion
2378 between pointers and integers.
2379 (md_begin, avr_ldi_expression): Use it.
2380 * config/tc-i370.c (md_assemble): Add cast for argument to print
2382 * config/tc-tic54x.c (subsym_substitute): Likewise.
2383 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2384 opindex field of fr_cgen structure into a pointer so that it can
2385 be stored in a frag.
2386 * config/tc-mn10300.c (md_assemble): Likewise.
2387 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2389 * config/tc-v850.c: Replace uses of (int) casts with correct
2392 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2395 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2397 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2400 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2401 a local-label reference.
2403 For older changes see ChangeLog-2005
2409 version-control: never