1 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
3 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
4 suffixes to be elided too.
5 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
6 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
9 2013-08-05 John Tytgat <john@bass-software.com>
11 * po/POTFILES.in: Regenerate.
13 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
14 Konrad Eisele <konrad@gaisler.com>
16 * config/tc-sparc.c (sparc_arch_types): Add leon.
17 (sparc_arch): Move sparc4 around and add leon.
18 (sparc_target_format): Document -Aleon.
19 * doc/c-sparc.texi: Likewise.
21 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
23 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
25 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
26 Richard Sandiford <rdsandiford@googlemail.com>
28 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
29 (RWARN): Bump to 0x8000000.
30 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
31 (RTYPE_R5900_ACC): New register types.
32 (RTYPE_MASK): Include them.
33 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
35 (reg_names): Include them.
36 (mips_parse_register_1): New function, split out from...
37 (mips_parse_register): ...here. Add a channels_ptr parameter.
38 Look for VU0 channel suffixes when nonnull.
39 (reg_lookup): Update the call to mips_parse_register.
40 (mips_parse_vu0_channels): New function.
41 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
42 (mips_operand_token): Add a "channels" field to the union.
43 Extend the comment above "ch" to OT_DOUBLE_CHAR.
44 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
45 (mips_parse_argument_token): Handle channel suffixes here too.
46 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
47 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
49 (md_begin): Register $vfN and $vfI registers.
50 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
51 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
52 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
53 (match_vu0_suffix_operand): New function.
54 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
55 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
56 (mips_lookup_insn): New function.
57 (mips_ip): Use it. Allow "+K" operands to be elided at the end
58 of an instruction. Handle '#' sequences.
60 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
62 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
63 values and use it instead of sreg, treg, xreg, etc.
65 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
67 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
68 and mips_int_operand_max.
69 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
71 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
72 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
73 instead of mips16_immed_operand.
75 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
77 * config/tc-mips.c (mips16_macro): Don't use move_register.
78 (mips16_ip): Allow macros to use 'p'.
80 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
82 * config/tc-mips.c (MAX_OPERANDS): New macro.
83 (mips_operand_array): New structure.
84 (mips_operands, mips16_operands, micromips_operands): New arrays.
85 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
86 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
87 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
88 (micromips_to_32_reg_q_map): Delete.
89 (insn_operands, insn_opno, insn_extract_operand): New functions.
90 (validate_mips_insn): Take a mips_operand_array as argument and
91 use it to build up a list of operands. Extend to handle INSN_MACRO
93 (validate_mips16_insn): New function.
94 (validate_micromips_insn): Take a mips_operand_array as argument.
96 (md_begin): Initialize mips_operands, mips16_operands and
97 micromips_operands. Call validate_mips_insn and
98 validate_micromips_insn for macro instructions too.
99 Call validate_mips16_insn for MIPS16 instructions.
100 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
102 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
103 them. Handle INSN_UDI.
104 (get_append_method): Use gpr_read_mask.
106 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
108 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
109 flags for MIPS16 and non-MIPS16 instructions.
110 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
111 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
112 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
113 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
114 and non-MIPS16 instructions. Fix formatting.
116 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
118 * config/tc-mips.c (reg_needs_delay): Move later in file.
120 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
122 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
123 Alexander Ivchenko <alexander.ivchenko@intel.com>
124 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
125 Sergey Lega <sergey.s.lega@intel.com>
126 Anna Tikhonova <anna.tikhonova@intel.com>
127 Ilya Tocar <ilya.tocar@intel.com>
128 Andrey Turetskiy <andrey.turetskiy@intel.com>
129 Ilya Verbin <ilya.verbin@intel.com>
130 Kirill Yukhin <kirill.yukhin@intel.com>
131 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
133 * config/tc-i386-intel.c (O_zmmword_ptr): New.
134 (i386_types): Add zmmword.
135 (i386_intel_simplify_register): Allow regzmm.
136 (i386_intel_simplify): Handle zmmwords.
137 (i386_intel_operand): Handle RC/SAE, vector operations and
139 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
140 (struct RC_Operation): New.
141 (struct Mask_Operation): New.
142 (struct Broadcast_Operation): New.
143 (vex_prefix): Size of bytes increased to 4 to support EVEX
145 (enum i386_error): Add new error codes: unsupported_broadcast,
146 broadcast_not_on_src_operand, broadcast_needed,
147 unsupported_masking, mask_not_on_destination, no_default_mask,
148 unsupported_rc_sae, rc_sae_operand_not_last_imm,
149 invalid_register_operand, try_vector_disp8.
150 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
151 rounding, broadcast, memshift.
152 (struct RC_name): New.
153 (RC_NamesTable): New.
156 (extra_symbol_chars): Add '{'.
157 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
158 (i386_operand_type): Add regzmm, regmask and vec_disp8.
159 (match_mem_size): Handle zmmwords.
160 (operand_type_match): Handle zmm-registers.
161 (mode_from_disp_size): Handle vec_disp8.
162 (fits_in_vec_disp8): New.
163 (md_begin): Handle {} properly.
164 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
165 (build_vex_prefix): Handle vrex.
166 (build_evex_prefix): New.
167 (process_immext): Adjust to properly handle EVEX.
168 (md_assemble): Add EVEX encoding support.
169 (swap_2_operands): Correctly handle operands with masking,
170 broadcasting or RC/SAE.
171 (check_VecOperands): Support EVEX features.
172 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
173 (match_template): Support regzmm and handle new error codes.
174 (process_suffix): Handle zmmwords and zmm-registers.
175 (check_byte_reg): Extend to zmm-registers.
176 (process_operands): Extend to zmm-registers.
177 (build_modrm_byte): Handle EVEX.
178 (output_insn): Adjust to properly handle EVEX case.
179 (disp_size): Handle vec_disp8.
180 (output_disp): Support compressed disp8*N evex feature.
181 (output_imm): Handle RC/SAE immediates properly.
182 (check_VecOperations): New.
183 (i386_immediate): Handle EVEX features.
184 (i386_index_check): Handle zmmwords and zmm-registers.
185 (RC_SAE_immediate): New.
186 (i386_att_operand): Handle EVEX features.
187 (parse_real_register): Add a check for ZMM/Mask registers.
188 (OPTION_MEVEXLIG): New.
189 (OPTION_MEVEXWIG): New.
190 (md_longopts): Add mevexlig and mevexwig.
191 (md_parse_option): Handle mevexlig and mevexwig options.
192 (md_show_usage): Add description for mevexlig and mevexwig.
193 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
194 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
196 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
198 * config/tc-i386.c (cpu_arch): Add .sha.
199 * doc/c-i386.texi: Document sha/.sha.
201 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
202 Kirill Yukhin <kirill.yukhin@intel.com>
203 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
205 * config/tc-i386.c (BND_PREFIX): New.
206 (struct _i386_insn): Add new field bnd_prefix.
207 (add_bnd_prefix): New.
209 (i386_operand_type): Add regbnd.
210 (md_assemble): Handle BND prefixes.
211 (parse_insn): Likewise.
212 (output_branch): Likewise.
213 (output_jump): Likewise.
214 (build_modrm_byte): Handle regbnd.
215 (OPTION_MADD_BND_PREFIX): New.
216 (md_longopts): Add entry for 'madd-bnd-prefix'.
217 (md_parse_option): Handle madd-bnd-prefix option.
218 (md_show_usage): Add description for madd-bnd-prefix
220 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
222 2013-07-24 Tristan Gingold <gingold@adacore.com>
224 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
227 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
229 * config/tc-s390.c (s390_machine): Don't force the .machine
230 argument to lower case.
232 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
234 * config/tc-arm.c (s_arm_arch_extension): Improve error message
235 for invalid extension.
237 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
239 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
240 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
241 (aarch64_abi): New variable.
242 (ilp32_p): Change to be a macro.
243 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
244 (struct aarch64_option_abi_value_table): New struct.
245 (aarch64_abis): New table.
246 (aarch64_parse_abi): New function.
247 (aarch64_long_opts): Add entry for -mabi=.
248 * doc/as.texinfo (Target AArch64 options): Document -mabi.
249 * doc/c-aarch64.texi: Likewise.
251 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
253 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
256 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
258 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
260 * config/rx-parse.y: (rx_check_float_support): Add function to
261 check floating point operation support for target RX100 and
263 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
264 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
265 RX200, RX600, and RX610
267 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
269 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
271 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
273 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
274 * doc/c-avr.texi: Likewise.
276 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
278 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
279 error with older GCCs.
280 (mips16_macro_build): Dereference args.
282 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
284 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
285 New functions, split out from...
286 (reg_lookup): ...here. Remove itbl support.
287 (reglist_lookup): Delete.
288 (mips_operand_token_type): New enum.
289 (mips_operand_token): New structure.
290 (mips_operand_tokens): New variable.
291 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
292 (mips_parse_arguments): New functions.
293 (md_begin): Initialize mips_operand_tokens.
294 (mips_arg_info): Add a token field. Remove optional_reg field.
295 (match_char, match_expression): New functions.
296 (match_const_int): Use match_expression. Remove "s" argument
297 and return a boolean result. Remove O_register handling.
298 (match_regno, match_reg, match_reg_range): New functions.
299 (match_int_operand, match_mapped_int_operand, match_msb_operand)
300 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
301 (match_addiusp_operand, match_clo_clz_dest_operand)
302 (match_lwm_swm_list_operand, match_entry_exit_operand)
303 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
304 (match_tied_reg_operand): Remove "s" argument and return a boolean
305 result. Match tokens rather than text. Update calls to
306 match_const_int. Rely on match_regno to call check_regno.
307 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
308 "arg" argument. Return a boolean result.
309 (parse_float_constant): Replace with...
310 (match_float_constant): ...this new function.
311 (match_operand): Remove "s" argument and return a boolean result.
312 Update calls to subfunctions.
313 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
314 rather than string-parsing routines. Update handling of optional
315 registers for token scheme.
317 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
319 * config/tc-mips.c (parse_float_constant): Split out from...
322 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
324 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
327 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
329 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
330 (match_entry_exit_operand): New function.
331 (match_save_restore_list_operand): Likewise.
332 (match_operand): Use them.
333 (check_absolute_expr): Delete.
334 (mips16_ip): Rewrite main parsing loop to use mips_operands.
336 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
338 * config/tc-mips.c: Enable functions commented out in previous patch.
339 (SKIP_SPACE_TABS): Move further up file.
340 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
341 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
342 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
343 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
344 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
345 (micromips_imm_b_map, micromips_imm_c_map): Delete.
346 (mips_lookup_reg_pair): Delete.
347 (macro): Use report_bad_range and report_bad_field.
348 (mips_immed, expr_const_in_range): Delete.
349 (mips_ip): Rewrite main parsing loop to use new functions.
351 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
353 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
354 Change return type to bfd_boolean.
355 (report_bad_range, report_bad_field): New functions.
356 (mips_arg_info): New structure.
357 (match_const_int, convert_reg_type, check_regno, match_int_operand)
358 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
359 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
360 (match_addiusp_operand, match_clo_clz_dest_operand)
361 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
362 (match_pc_operand, match_tied_reg_operand, match_operand)
363 (check_completed_insn): New functions, commented out for now.
365 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
367 * config/tc-mips.c (insn_insert_operand): New function.
368 (macro_build, mips16_macro_build): Put null character check
369 in the for loop and convert continues to breaks. Use operand
370 structures to handle constant operands.
372 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
374 * config/tc-mips.c (validate_mips_insn): Move further up file.
375 Add insn_bits and decode_operand arguments. Use the mips_operand
376 fields to work out which bits an operand occupies. Detect double
378 (validate_micromips_insn): Move further up file. Call into
381 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
383 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
385 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
387 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
389 (macro): Update accordingly.
391 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
393 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
395 (md_assemble): Remove imm_reloc handling.
396 (mips_ip): Update commentary. Use offset_expr and offset_reloc
397 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
398 Use a temporary array rather than imm_reloc when parsing
399 constant expressions. Remove imm_reloc initialization.
400 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
401 for the relaxable field. Use a relax_char variable to track the
402 type of this field. Remove imm_reloc initialization.
404 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
406 * config/tc-mips.c (mips16_ip): Handle "I".
408 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
410 * config/tc-mips.c (mips_flag_nan2008): New variable.
411 (options): Add OPTION_NAN enum value.
412 (md_longopts): Handle it.
413 (md_parse_option): Likewise.
414 (s_nan): New function.
415 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
416 (md_show_usage): Add -mnan.
418 * doc/as.texinfo (Overview): Add -mnan.
419 * doc/c-mips.texi (MIPS Opts): Document -mnan.
420 (MIPS NaN Encodings): New node. Document .nan directive.
421 (MIPS-Dependent): List the new node.
423 2013-07-09 Tristan Gingold <gingold@adacore.com>
425 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
427 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
429 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
430 for 'A' and assume that the constant has been elided if the result
433 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
435 * config/tc-mips.c (gprel16_reloc_p): New function.
436 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
438 (offset_high_part, small_offset_p): New functions.
439 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
440 register load and store macros, handle the 16-bit offset case first.
441 If a 16-bit offset is not suitable for the instruction we're
442 generating, load it into the temporary register using
443 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
444 M_L_DAB code once the address has been constructed. For double load
445 and store macros, again handle the 16-bit offset case first.
446 If the second register cannot be accessed from the same high
447 part as the first, load it into AT using ADDRESS_ADDI_INSN.
448 Fix the handling of LD in cases where the first register is the
449 same as the base. Also handle the case where the offset is
450 not 16 bits and the second register cannot be accessed from the
451 same high part as the first. For unaligned loads and stores,
452 fuse the offbits == 12 and old "ab" handling. Apply this handling
453 whenever the second offset needs a different high part from the first.
454 Construct the offset using ADDRESS_ADDI_INSN where possible,
455 for offbits == 16 as well as offbits == 12. Use offset_reloc
456 when constructing the individual loads and stores.
457 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
458 and offset_reloc before matching against a particular opcode.
459 Handle elided 'A' constants. Allow 'A' constants to use
460 relocation operators.
462 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
464 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
465 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
466 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
468 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
470 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
471 Require the msb to be <= 31 for "+s". Check that the size is <= 31
472 for both "+s" and "+S".
474 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
476 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
477 (mips_ip, mips16_ip): Handle "+i".
479 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
481 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
482 (micromips_to_32_reg_h_map): Rename to...
483 (micromips_to_32_reg_h_map1): ...this.
484 (micromips_to_32_reg_i_map): Rename to...
485 (micromips_to_32_reg_h_map2): ...this.
486 (mips_lookup_reg_pair): New function.
487 (gpr_write_mask, macro): Adjust after above renaming.
488 (validate_micromips_insn): Remove "mi" handling.
489 (mips_ip): Likewise. Parse both registers in a pair for "mh".
491 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
493 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
494 (mips_ip): Remove "+D" and "+T" handling.
496 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
498 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
501 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
503 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
505 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
507 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
508 (aarch64_force_relocation): Likewise.
510 2013-07-02 Alan Modra <amodra@gmail.com>
512 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
514 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
516 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
517 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
518 Replace @sc{mips16} with literal `MIPS16'.
519 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
521 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
523 * config/tc-aarch64.c (reloc_table): Replace
524 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
525 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
526 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
527 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
528 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
529 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
530 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
531 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
532 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
533 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
534 (aarch64_force_relocation): Likewise.
536 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
538 * config/tc-aarch64.c (ilp32_p): New static variable.
539 (elf64_aarch64_target_format): Return the target according to the
541 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
542 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
543 (aarch64_dwarf2_addr_size): New function.
544 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
545 (DWARF2_ADDR_SIZE): New define.
547 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
549 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
551 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
553 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
555 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
557 * config/tc-mips.c (mips_set_options): Add insn32 member.
558 (mips_opts): Initialize it.
559 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
560 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
561 (md_longopts): Add "minsn32" and "mno-insn32" options.
562 (is_size_valid): Handle insn32 mode.
563 (md_assemble): Pass instruction string down to macro.
564 (brk_fmt): Add second dimension and insn32 mode initializers.
565 (mfhl_fmt): Likewise.
566 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
567 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
568 (macro_build_jalr, move_register): Handle insn32 mode.
569 (macro_build_branch_rs): Likewise.
570 (macro): Handle insn32 mode.
571 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
572 (mips_ip): Handle insn32 mode.
573 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
574 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
575 (mips_handle_align): Handle insn32 mode.
576 (md_show_usage): Add -minsn32 and -mno-insn32.
578 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
580 (-minsn32, -mno-insn32): New options.
581 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
583 (MIPS assembly options): New node. Document .set insn32 and
585 (MIPS-Dependent): List the new node.
587 2013-06-25 Nick Clifton <nickc@redhat.com>
589 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
590 the PC in indirect addressing on 430xv2 parts.
591 (msp430_operands): Add version test to hardware bug encoding
594 2013-06-24 Roland McGrath <mcgrathr@google.com>
596 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
597 so it skips whitespace before it.
598 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
600 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
601 (arm_reg_parse_multi): Skip whitespace first.
602 (parse_reg_list): Likewise.
603 (parse_vfp_reg_list): Likewise.
604 (s_arm_unwind_save_mmxwcg): Likewise.
606 2013-06-24 Nick Clifton <nickc@redhat.com>
609 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
611 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
613 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
615 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
617 * config/tc-mips.c: Assert that offsetT and valueT are at least
619 (GPR_SMIN, GPR_SMAX): New macros.
620 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
622 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
624 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
625 conditions. Remove any code deselected by them.
626 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
628 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
630 * NEWS: Note removal of ECOFF support.
631 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
632 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
633 (MULTI_CFILES): Remove config/e-mipsecoff.c.
634 * Makefile.in: Regenerate.
635 * configure.in: Remove MIPS ECOFF references.
636 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
638 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
639 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
640 (mips-*-*): ...this single case.
641 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
642 MIPS emulations to be e-mipself*.
643 * configure: Regenerate.
644 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
645 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
646 (mips-*-sysv*): Remove coff and ecoff cases.
647 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
648 * ecoff.c: Remove reference to MIPS ECOFF.
649 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
650 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
651 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
652 (mips_hi_fixup): Tweak comment.
653 (append_insn): Require a howto.
654 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
656 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
658 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
659 Use "CPU" instead of "cpu".
660 * doc/c-mips.texi: Likewise.
661 (MIPS Opts): Rename to MIPS Options.
662 (MIPS option stack): Rename to MIPS Option Stack.
663 (MIPS ASE instruction generation overrides): Rename to
664 MIPS ASE Instruction Generation Overrides (for now).
665 (MIPS floating-point): Rename to MIPS Floating-Point.
667 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
669 * doc/c-mips.texi (MIPS Macros): New section.
670 (MIPS Object): Replace with...
671 (MIPS Small Data): ...this new section.
673 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
675 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
676 Capitalize name. Use @kindex instead of @cindex for .set entries.
678 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
680 * doc/c-mips.texi (MIPS Stabs): Remove section.
682 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
684 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
685 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
686 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
687 (ISA_SUPPORTS_VIRT64_ASE): Delete.
688 (mips_ase): New structure.
689 (mips_ases): New table.
690 (FP64_ASES): New macro.
691 (mips_ase_groups): New array.
692 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
693 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
695 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
696 (md_parse_option): Use mips_ases and mips_set_ase instead of
697 separate case statements for each ASE option.
698 (mips_after_parse_args): Use FP64_ASES. Use
699 mips_check_isa_supports_ases to check the ASEs against
701 (s_mipsset): Use mips_ases and mips_set_ase instead of
702 separate if statements for each ASE option. Use
703 mips_check_isa_supports_ases, even when a non-ASE option
706 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
708 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
710 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
712 * config/tc-mips.c (md_shortopts, options, md_longopts)
713 (md_longopts_size): Move earlier in file.
715 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
717 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
718 with a single "ase" bitmask.
719 (mips_opts): Update accordingly.
720 (file_ase, file_ase_explicit): New variables.
721 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
722 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
723 (ISA_HAS_ROR): Adjust for mips_set_options change.
724 (is_opcode_valid): Take the base ase mask directly from mips_opts.
725 (mips_ip): Adjust for mips_set_options change.
726 (md_parse_option): Likewise. Update file_ase_explicit.
727 (mips_after_parse_args): Adjust for mips_set_options change.
728 Use bitmask operations to select the default ASEs. Set file_ase
729 rather than individual per-ASE variables.
730 (s_mipsset): Adjust for mips_set_options change.
731 (mips_elf_final_processing): Test file_ase rather than
732 file_ase_mdmx. Remove commented-out code.
734 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
736 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
737 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
738 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
739 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
740 (mips_after_parse_args): Use the new "ase" field to choose
742 (mips_cpu_info_table): Move ASEs from the "flags" field to the
745 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
747 * config/tc-arm.c (symbol_preemptible): New function.
748 (relax_branch): Use it.
750 2013-06-17 Catherine Moore <clm@codesourcery.com>
751 Maciej W. Rozycki <macro@codesourcery.com>
752 Chao-Ying Fu <fu@mips.com>
754 * config/tc-mips.c (mips_set_options): Add ase_eva.
755 (mips_set_options mips_opts): Add ase_eva.
756 (file_ase_eva): Declare.
757 (ISA_SUPPORTS_EVA_ASE): Define.
758 (IS_SEXT_9BIT_NUM): Define.
759 (MIPS_CPU_ASE_EVA): Define.
760 (is_opcode_valid): Add support for ase_eva.
761 (macro_build): Likewise.
763 (validate_mips_insn): Likewise.
764 (validate_micromips_insn): Likewise.
766 (options): Add OPTION_EVA and OPTION_NO_EVA.
767 (md_longopts): Add -meva and -mno-eva.
768 (md_parse_option): Process new options.
769 (mips_after_parse_args): Check for valid EVA combinations.
770 (s_mipsset): Likewise.
772 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
774 * dwarf2dbg.h (dwarf2_move_insn): Declare.
775 * dwarf2dbg.c (line_subseg): Add pmove_tail.
776 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
777 (dwarf2_gen_line_info_1): Update call accordingly.
778 (dwarf2_move_insn): New function.
779 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
781 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
785 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
788 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
789 (dwarf2_gen_line_info_1): Delete.
790 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
791 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
792 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
793 (dwarf2_directive_loc): Push previous .locs instead of generating
796 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
798 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
799 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
801 2013-06-13 Nick Clifton <nickc@redhat.com>
804 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
805 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
806 function. Generates an error if the adjusted offset is out of a
809 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
811 * config/tc-nios2.c (md_apply_fix): Mask constant
812 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
814 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
816 * config/tc-mips.c (append_insn): Don't do branch relaxation for
817 MIPS-3D instructions either.
818 (md_convert_frag): Update the COPx branch mask accordingly.
820 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
822 * doc/as.texinfo (Overview): Add --relax-branch and
824 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
827 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
829 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
832 2013-06-08 Catherine Moore <clm@codesourcery.com>
834 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
835 (is_opcode_valid_16): Pass ase value to opcode_is_member.
836 (append_insn): Change INSN_xxxx to ASE_xxxx.
838 2013-06-01 George Thomas <george.thomas@atmel.com>
840 * gas/config/tc-avr.c: Change ISA for devices with USB support to
843 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
845 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
848 2013-05-31 Paul Brook <paul@codesourcery.com>
851 * config/tc-mips.c (s_ehword): New.
853 2013-05-30 Paul Brook <paul@codesourcery.com>
855 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
857 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
859 * write.c (resolve_reloc_expr_symbols): On REL targets don't
860 convert relocs who have no relocatable field either. Rephrase
861 the conditional so that the PC-relative check is only applied
864 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
866 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
869 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
871 * config/tc-aarch64.c (reloc_table): Update to use
872 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
873 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
874 (md_apply_fix): Likewise.
875 (aarch64_force_relocation): Likewise.
877 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
879 * config/tc-arm.c (it_fsm_post_encode): Improve
880 warning messages about deprecated IT block formats.
882 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
884 * config/tc-aarch64.c (md_apply_fix): Move value range checking
885 inside fx_done condition.
887 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
889 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
891 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
893 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
894 and clean up warning when using PRINT_OPCODE_TABLE.
896 2013-05-20 Alan Modra <amodra@gmail.com>
898 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
899 and data fixups performing shift/high adjust/sign extension on
900 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
901 when writing data fixups rather than recalculating size.
903 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
905 * doc/c-msp430.texi: Fix typo.
907 2013-05-16 Tristan Gingold <gingold@adacore.com>
909 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
910 are also TOC symbols.
912 2013-05-16 Nick Clifton <nickc@redhat.com>
914 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
915 Add -mcpu command to specify core type.
916 * doc/c-msp430.texi: Update documentation.
918 2013-05-09 Andrew Pinski <apinski@cavium.com>
920 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
921 (mips_opts): Update for the new field.
922 (file_ase_virt): New variable.
923 (ISA_SUPPORTS_VIRT_ASE): New macro.
924 (ISA_SUPPORTS_VIRT64_ASE): New macro.
925 (MIPS_CPU_ASE_VIRT): New define.
926 (is_opcode_valid): Handle ase_virt.
927 (macro_build): Handle "+J".
928 (validate_mips_insn): Likewise.
930 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
931 (md_longopts): Add mvirt and mnovirt
932 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
933 (mips_after_parse_args): Handle ase_virt field.
934 (s_mipsset): Handle "virt" and "novirt".
935 (mips_elf_final_processing): Add a comment about virt ASE might need
937 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
938 * doc/c-mips.texi: Document -mvirt and -mno-virt.
939 Document ".set virt" and ".set novirt".
941 2013-05-09 Alan Modra <amodra@gmail.com>
943 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
944 control of operand flag bits.
946 2013-05-07 Alan Modra <amodra@gmail.com>
948 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
949 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
950 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
951 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
952 (md_apply_fix): Set fx_no_overflow for assorted relocations.
953 Shift and sign-extend fieldval for use by some VLE reloc
954 operand->insert functions.
956 2013-05-06 Paul Brook <paul@codesourcery.com>
957 Catherine Moore <clm@codesourcery.com>
959 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
960 (limited_pcrel_reloc_p): Likewise.
961 (md_apply_fix): Likewise.
962 (tc_gen_reloc): Likewise.
964 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
966 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
967 (mips_fix_adjustable): Adjust pc-relative check to use
970 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
972 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
973 (s_mips_stab): Do not restrict to stabn only.
975 2013-05-02 Nick Clifton <nickc@redhat.com>
977 * config/tc-msp430.c: Add support for the MSP430X architecture.
978 Add code to insert a NOP instruction after any instruction that
979 might change the interrupt state.
980 Add support for the LARGE memory model.
981 Add code to initialise the .MSP430.attributes section.
982 * config/tc-msp430.h: Add support for the MSP430X architecture.
983 * doc/c-msp430.texi: Document the new -mL and -mN command line
985 * NEWS: Mention support for the MSP430X architecture.
987 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
989 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
990 alpha*-*-linux*ecoff*.
992 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
994 * config/tc-mips.c (mips_ip): Add sizelo.
995 For "+C", "+G", and "+H", set sizelo and compare against it.
997 2013-04-29 Nick Clifton <nickc@redhat.com>
999 * as.c (Options): Add -gdwarf-sections.
1000 (parse_args): Likewise.
1001 * as.h (flag_dwarf_sections): Declare.
1002 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1003 (process_entries): When -gdwarf-sections is enabled generate
1004 fragmentary .debug_line sections.
1005 (out_debug_line): Set the section for the .debug_line section end
1007 * doc/as.texinfo: Document -gdwarf-sections.
1008 * NEWS: Mention -gdwarf-sections.
1010 2013-04-26 Christian Groessler <chris@groessler.org>
1012 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1013 according to the target parameter. Don't call s_segm since s_segm
1014 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1016 (md_begin): Call s_segm according to target parameter from command
1019 2013-04-25 Alan Modra <amodra@gmail.com>
1021 * configure.in: Allow little-endian linux.
1022 * configure: Regenerate.
1024 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1026 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1027 "fstatus" control register to "eccinj".
1029 2013-04-19 Kai Tietz <ktietz@redhat.com>
1031 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1033 2013-04-15 Julian Brown <julian@codesourcery.com>
1035 * expr.c (add_to_result, subtract_from_result): Make global.
1036 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1037 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1038 subtract_from_result to handle extra bit of precision for .sleb128
1041 2013-04-10 Julian Brown <julian@codesourcery.com>
1043 * read.c (convert_to_bignum): Add sign parameter. Use it
1044 instead of X_unsigned to determine sign of resulting bignum.
1045 (emit_expr): Pass extra argument to convert_to_bignum.
1046 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1047 X_extrabit to convert_to_bignum.
1048 (parse_bitfield_cons): Set X_extrabit.
1049 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1050 Initialise X_extrabit field as appropriate.
1051 (add_to_result): New.
1052 (subtract_from_result): New.
1054 * expr.h (expressionS): Add X_extrabit field.
1056 2013-04-10 Jan Beulich <jbeulich@suse.com>
1058 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1059 register being PC when is_t or writeback, and use distinct
1060 diagnostic for the latter case.
1062 2013-04-10 Jan Beulich <jbeulich@suse.com>
1064 * gas/config/tc-arm.c (parse_operands): Re-write
1065 po_barrier_or_imm().
1066 (do_barrier): Remove bogus constraint().
1067 (do_t_barrier): Remove.
1069 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1071 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1072 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1074 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1076 2013-04-09 Jan Beulich <jbeulich@suse.com>
1078 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1079 Use local variable Rt in more places.
1080 (do_vmsr): Accept all control registers.
1082 2013-04-09 Jan Beulich <jbeulich@suse.com>
1084 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1085 if there was none specified for moves between scalar and core
1088 2013-04-09 Jan Beulich <jbeulich@suse.com>
1090 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1091 NEON_ALL_LANES case.
1093 2013-04-08 Jan Beulich <jbeulich@suse.com>
1095 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1098 2013-04-08 Jan Beulich <jbeulich@suse.com>
1100 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1103 2013-04-03 Alan Modra <amodra@gmail.com>
1105 * doc/as.texinfo: Add support to generate man options for h8300.
1106 * doc/c-h8300.texi: Likewise.
1108 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1110 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1113 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1116 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1118 2013-03-26 Nick Clifton <nickc@redhat.com>
1121 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1122 start of the file each time.
1125 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1128 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1130 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1133 2013-03-21 Will Newton <will.newton@linaro.org>
1135 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1136 pc-relative str instructions in Thumb mode.
1138 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1140 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1141 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1143 * config/tc-h8300.h: Remove duplicated defines.
1145 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1148 * tc-avr.c (mcu_has_3_byte_pc): New function.
1149 (tc_cfi_frame_initial_instructions): Call it to find return
1152 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1155 * config/tc-tic6x.c (tic6x_try_encode): Handle
1156 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1157 encode register pair numbers when required.
1159 2013-03-15 Will Newton <will.newton@linaro.org>
1161 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1162 in vstr in Thumb mode for pre-ARMv7 cores.
1164 2013-03-14 Andreas Schwab <schwab@suse.de>
1166 * doc/c-arc.texi (ARC Directives): Revert last change and use
1167 @itemize instead of @table.
1168 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1170 2013-03-14 Nick Clifton <nickc@redhat.com>
1173 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1174 NULL message, instead just check ARM_CPU_IS_ANY directly.
1176 2013-03-14 Nick Clifton <nickc@redhat.com>
1179 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1181 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1182 to the @item directives.
1183 (ARM-Neon-Alignment): Move to correct place in the document.
1184 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1186 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1189 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1191 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1192 case. Add default BAD_CASE to switch.
1194 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1196 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1197 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1199 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1201 * config/tc-arm.c (crc_ext_armv8): New feature set.
1202 (UNPRED_REG): New macro.
1203 (do_crc32_1): New function.
1204 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1205 do_crc32ch, do_crc32cw): Likewise.
1207 (insns): Add entries for crc32 mnemonics.
1208 (arm_extensions): Add entry for crc.
1210 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1212 * write.h (struct fix): Add fx_dot_frag field.
1213 (dot_frag): Declare.
1214 * write.c (dot_frag): New variable.
1215 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1216 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1217 * expr.c (expr): Save value of frag_now in dot_frag when setting
1219 * read.c (emit_expr): Likewise. Delete comments.
1221 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1223 * config/tc-i386.c (flag_code_names): Removed.
1224 (i386_index_check): Rewrote.
1226 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1228 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1230 (aarch64_double_precision_fmovable): New function.
1231 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1232 function; handle hexadecimal representation of IEEE754 encoding.
1233 (parse_operands): Update the call to parse_aarch64_imm_float.
1235 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1237 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1238 (check_hle): Updated.
1239 (md_assemble): Likewise.
1240 (parse_insn): Likewise.
1242 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1244 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1245 (md_assemble): Check if REP prefix is OK.
1246 (parse_insn): Remove expecting_string_instruction. Set
1249 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1251 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1253 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1255 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1256 for system registers.
1258 2013-02-27 DJ Delorie <dj@redhat.com>
1260 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1261 (rl78_op): Handle %code().
1262 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1263 (tc_gen_reloc): Likwise; convert to a computed reloc.
1264 (md_apply_fix): Likewise.
1266 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1268 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1270 2013-02-25 Terry Guo <terry.guo@arm.com>
1272 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1273 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1274 list of accepted CPUs.
1276 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1279 * config/tc-i386.c (cpu_arch): Add ".smap".
1281 * doc/c-i386.texi: Document smap.
1283 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1285 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1286 mips_assembling_insn appropriately.
1287 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1289 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1291 * config/tc-mips.c (append_insn): Correct indentation, remove
1294 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1296 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1298 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1300 * configure.tgt: Add nios2-*-rtems*.
1302 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1304 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1307 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1309 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1310 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1312 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1314 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1317 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1318 Andrew Jenner <andrew@codesourcery.com>
1320 Based on patches from Altera Corporation.
1322 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1323 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1324 * Makefile.in: Regenerated.
1325 * configure.tgt: Add case for nios2*-linux*.
1326 * config/obj-elf.c: Conditionally include elf/nios2.h.
1327 * config/tc-nios2.c: New file.
1328 * config/tc-nios2.h: New file.
1329 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1330 * doc/Makefile.in: Regenerated.
1331 * doc/all.texi: Set NIOSII.
1332 * doc/as.texinfo (Overview): Add Nios II options.
1333 (Machine Dependencies): Include c-nios2.texi.
1334 * doc/c-nios2.texi: New file.
1335 * NEWS: Note Altera Nios II support.
1337 2013-02-06 Alan Modra <amodra@gmail.com>
1340 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1341 Don't skip fixups with fx_subsy non-NULL.
1342 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1343 with fx_subsy non-NULL.
1345 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1347 * doc/c-metag.texi: Add "@c man" markers.
1349 2013-02-04 Alan Modra <amodra@gmail.com>
1351 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1353 (TC_ADJUST_RELOC_COUNT): Delete.
1354 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1356 2013-02-04 Alan Modra <amodra@gmail.com>
1358 * po/POTFILES.in: Regenerate.
1360 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1362 * config/tc-metag.c: Make SWAP instruction less permissive with
1365 2013-01-29 DJ Delorie <dj@redhat.com>
1367 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1368 relocs in .word/.etc statements.
1370 2013-01-29 Roland McGrath <mcgrathr@google.com>
1372 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1373 immediate value for 8-bit offset" error so it shows line info.
1375 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1377 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1380 2013-01-24 Nick Clifton <nickc@redhat.com>
1382 * config/tc-v850.c: Add support for e3v5 architecture.
1383 * doc/c-v850.texi: Mention new support.
1385 2013-01-23 Nick Clifton <nickc@redhat.com>
1388 * config/tc-avr.c: Include dwarf2dbg.h.
1390 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1392 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1393 (tc_i386_fix_adjustable): Likewise.
1394 (lex_got): Likewise.
1395 (tc_gen_reloc): Likewise.
1397 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1399 * config/tc-aarch64.c (output_operand_error_record): Change to output
1400 the out-of-range error message as value-expected message if there is
1401 only one single value in the expected range.
1402 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1403 LSL #0 as a programmer-friendly feature.
1405 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1407 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1408 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1409 BFD_RELOC_64_SIZE relocations.
1410 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1412 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1413 relocations against local symbols.
1415 2013-01-16 Alan Modra <amodra@gmail.com>
1417 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1418 finding some sort of toc syntax error, and break to avoid
1419 compiler uninit warning.
1421 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1424 * config/tc-i386.c (lex_got): Increment length by 1 if the
1425 relocation token is removed.
1427 2013-01-15 Nick Clifton <nickc@redhat.com>
1429 * config/tc-v850.c (md_assemble): Allow signed values for
1432 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1434 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1437 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1439 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1440 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1441 * config/tc-ppc.c (md_show_usage): Likewise.
1442 (ppc_handle_align): Handle power8's group ending nop.
1444 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1446 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1447 that the assember exits after the opcodes have been printed.
1449 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1451 * app.c: Remove trailing white spaces.
1455 * dw2gencfi.c: Likewise.
1456 * dwarf2dbg.h: Likewise.
1457 * ecoff.c: Likewise.
1458 * input-file.c: Likewise.
1459 * itbl-lex.h: Likewise.
1460 * output-file.c: Likewise.
1463 * subsegs.c: Likewise.
1464 * symbols.c: Likewise.
1465 * write.c: Likewise.
1466 * config/tc-i386.c: Likewise.
1467 * doc/Makefile.am: Likewise.
1468 * doc/Makefile.in: Likewise.
1469 * doc/c-aarch64.texi: Likewise.
1470 * doc/c-alpha.texi: Likewise.
1471 * doc/c-arc.texi: Likewise.
1472 * doc/c-arm.texi: Likewise.
1473 * doc/c-avr.texi: Likewise.
1474 * doc/c-bfin.texi: Likewise.
1475 * doc/c-cr16.texi: Likewise.
1476 * doc/c-d10v.texi: Likewise.
1477 * doc/c-d30v.texi: Likewise.
1478 * doc/c-h8300.texi: Likewise.
1479 * doc/c-hppa.texi: Likewise.
1480 * doc/c-i370.texi: Likewise.
1481 * doc/c-i386.texi: Likewise.
1482 * doc/c-i860.texi: Likewise.
1483 * doc/c-m32c.texi: Likewise.
1484 * doc/c-m32r.texi: Likewise.
1485 * doc/c-m68hc11.texi: Likewise.
1486 * doc/c-m68k.texi: Likewise.
1487 * doc/c-microblaze.texi: Likewise.
1488 * doc/c-mips.texi: Likewise.
1489 * doc/c-msp430.texi: Likewise.
1490 * doc/c-mt.texi: Likewise.
1491 * doc/c-s390.texi: Likewise.
1492 * doc/c-score.texi: Likewise.
1493 * doc/c-sh.texi: Likewise.
1494 * doc/c-sh64.texi: Likewise.
1495 * doc/c-tic54x.texi: Likewise.
1496 * doc/c-tic6x.texi: Likewise.
1497 * doc/c-v850.texi: Likewise.
1498 * doc/c-xc16x.texi: Likewise.
1499 * doc/c-xgate.texi: Likewise.
1500 * doc/c-xtensa.texi: Likewise.
1501 * doc/c-z80.texi: Likewise.
1502 * doc/internals.texi: Likewise.
1504 2013-01-10 Roland McGrath <mcgrathr@google.com>
1506 * hash.c (hash_new_sized): Make it global.
1507 * hash.h: Declare it.
1508 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1511 2013-01-10 Will Newton <will.newton@imgtec.com>
1513 * Makefile.am: Add Meta.
1514 * Makefile.in: Regenerate.
1515 * config/tc-metag.c: New file.
1516 * config/tc-metag.h: New file.
1517 * configure.tgt: Add Meta.
1518 * doc/Makefile.am: Add Meta.
1519 * doc/Makefile.in: Regenerate.
1520 * doc/all.texi: Add Meta.
1521 * doc/as.texiinfo: Document Meta options.
1522 * doc/c-metag.texi: New file.
1524 2013-01-09 Steve Ellcey <sellcey@mips.com>
1526 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1528 * config/tc-mips.c (internalError): Remove, replace with abort.
1530 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1532 * config/tc-aarch64.c (parse_operands): Change to compare the result
1533 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1535 2013-01-07 Nick Clifton <nickc@redhat.com>
1538 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1539 anticipated character.
1540 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1541 here as it is no longer needed.
1543 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1545 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1546 * doc/c-score.texi (SCORE-Opts): Likewise.
1547 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1549 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1551 * config/tc-mips.c: Add support for MIPS r5900.
1552 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1554 (can_swap_branch_p, get_append_method): Detect some conditional
1555 short loops to fix a bug on the r5900 by NOP in the branch delay
1557 (M_MUL): Support 3 operands in multu on r5900.
1558 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1559 (s_mipsset): Force 32 bit floating point on r5900.
1560 (mips_ip): Check parameter range of instructions mfps and mtps on
1562 * configure.in: Detect CPU type when target string contains r5900
1563 (e.g. mips64r5900el-linux-gnu).
1565 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1567 * as.c (parse_args): Update copyright year to 2013.
1569 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1571 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1574 2013-01-02 Nick Clifton <nickc@redhat.com>
1577 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1580 For older changes see ChangeLog-2012
1582 Copyright (C) 2013 Free Software Foundation, Inc.
1584 Copying and distribution of this file, with or without modification,
1585 are permitted in any medium without royalty provided the copyright
1586 notice and this notice are preserved.
1592 version-control: never