Synthesize array descriptors with -fgnat-encodings=minimal
[deliverable/binutils-gdb.git] / gas / NEWS
1 -*- text -*-
2
3 * Add support for Intel AVX VNNI instructions.
4
5 * Add support for Intel HRESET instruction.
6
7 * Add support for Intel UINTR instructions.
8
9 * Support non-absolute segment values for i386 lcall and ljmp.
10
11 * When setting the link order attribute of ELF sections, it is now possible to
12 use a numeric section index instead of symbol name.
13
14 * Add support for Cortex-A78, Cortex-A78AE and Cortex-X1 for AArch64 and ARM.
15 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
16
17 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
18 Extension), TRBE (Trace Buffer Extension), CSRE (Call Stack Recorder
19 Extension) and BRBE (Branch Record Buffer Extension) system registers for
20 AArch64.
21
22 * Add support for Armv8-R and Armv8.7-A AArch64.
23
24 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
25 AArch64.
26
27 * Add support for +csre feature for -march. Add CSR PDEC instruction for CSRE
28 feature.
29
30 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
31 64-byte load/store instructions for this feature.
32
33 * Add support for Intel TDX instructions.
34
35 * Add support for Intel Key Locker instructions.
36
37 * Added a .nop directive to generate a single no-op instruction in a target
38 neutral manner. This instruction does have an effect on DWARF line number
39 generation, if that is active.
40
41 * Removed --reduce-memory-overheads and --hash-size as gas now
42 uses hash tables that can be expand and shrink automatically.
43
44 * Add {disp16} pseudo prefix to x86 assembler.
45
46 * Add support for Intel AMX instructions.
47
48 * Configure with --enable-x86-used-note by default for Linux/x86.
49
50 Changes in 2.35:
51
52 * X86 NaCl target support is removed.
53
54 * Extend .symver directive to update visibility of the original symbol
55 and assign one original symbol to different versioned symbols.
56
57 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
58
59 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
60 -mlfence-before-ret= options to x86 assembler to help mitigate
61 CVE-2020-0551.
62
63 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
64 (if such output is being generated). Added the ability to generate
65 version 5 .debug_line sections.
66
67 * Add -mbig-obj support to i386 MingW targets.
68
69 Changes in 2.34:
70
71 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
72 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
73 options to x86 assembler to align branches within a fixed boundary
74 with segment prefixes or NOPs.
75
76 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
77
78 * Add support for z80-elf target.
79
80 * Add support for relocation of each byte or word of multibyte value to Z80
81 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
82 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
83
84 * Add SDCC support for Z80 targets.
85
86 Changes in 2.33:
87
88 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
89 instructions.
90
91 * Add support for the Arm Transactional Memory Extension (TME)
92 instructions.
93
94 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
95 instructions.
96
97 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
98 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
99 time option to set the default behavior. Set the default if the configure
100 option is not used to "no".
101
102 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
103 processors.
104
105 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
106 Cortex-A76AE, and Cortex-A77 processors.
107
108 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
109 floating point literals. Add .float16_format directive and
110 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
111 encoding.
112
113 * Add --gdwarf-cie-version command line flag. This allows control over which
114 version of DWARF CIE the assembler creates.
115
116 Changes in 2.32:
117
118 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
119 VEX.W-ignored (WIG) VEX instructions.
120
121 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
122 notes. Add a --enable-x86-used-note configure time option to set the
123 default behavior. Set the default if the configure option is not used
124 to "no".
125
126 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
127
128 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
129
130 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
131
132 * Add support for the C-SKY processor series.
133
134 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
135 ASE.
136
137 Changes in 2.31:
138
139 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
140 now only set the bottom bit of the address of thumb function symbols
141 if the -mthumb-interwork command line option is active.
142
143 * Add support for the MIPS Global INValidate (GINV) ASE.
144
145 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
146
147 * Add support for the Freescale S12Z architecture.
148
149 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
150 Build Attribute notes if none are present in the input sources. Add a
151 --enable-generate-build-notes=[yes|no] configure time option to set the
152 default behaviour. Set the default if the configure option is not used
153 to "no".
154
155 * Remove -mold-gcc command-line option for x86 targets.
156
157 * Add -O[2|s] command-line options to x86 assembler to enable alternate
158 shorter instruction encoding.
159
160 * Add support for .nops directive. It is currently supported only for
161 x86 targets.
162
163 Changes in 2.30:
164
165 * Add support for loaction views in DWARF debug line information.
166
167 Changes in 2.29:
168
169 * Add support for ELF SHF_GNU_MBIND.
170
171 * Add support for the WebAssembly file format and wasm32 ELF conversion.
172
173 * PowerPC gas now checks that the correct register class is used in
174 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
175 that the registers are invalid.
176
177 * Add support for the Texas Instruments PRU processor.
178
179 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
180 added to the ARM port.
181
182 Changes in 2.28:
183
184 * Add support for the RISC-V architecture.
185
186 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
187
188 Changes in 2.27:
189
190 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
191
192 * Add --no-pad-sections to stop the assembler from padding the end of output
193 sections up to their alignment boundary.
194
195 * Support for the ARMv8-M architecture has been added to the ARM port. Support
196 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
197 port.
198
199 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
200 .extCoreRegister pseudo-ops that allow an user to define custom
201 instructions, conditional codes, auxiliary and core registers.
202
203 * Add a configure option --enable-elf-stt-common to decide whether ELF
204 assembler should generate common symbols with the STT_COMMON type by
205 default. Default to no.
206
207 * New command-line option --elf-stt-common= for ELF targets to control
208 whether to generate common symbols with the STT_COMMON type.
209
210 * Add ability to set section flags and types via numeric values for ELF
211 based targets.
212
213 * Add a configure option --enable-x86-relax-relocations to decide whether
214 x86 assembler should generate relax relocations by default. Default to
215 yes, except for x86 Solaris targets older than Solaris 12.
216
217 * New command-line option -mrelax-relocations= for x86 target to control
218 whether to generate relax relocations.
219
220 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
221 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
222
223 * Add assembly-time relaxation option for ARC cpus.
224
225 * Add --with-cpu=TYPE configure option for ARC gas. This allows the default
226 cpu type to be adjusted at configure time.
227
228 Changes in 2.26:
229
230 * Add a configure option --enable-compressed-debug-sections={all,gas} to
231 decide whether DWARF debug sections should be compressed by default.
232
233 * Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
234 assembler support for Argonaut RISC architectures.
235
236 * Symbol and label names can now be enclosed in double quotes (") which allows
237 them to contain characters that are not part of valid symbol names in high
238 level languages.
239
240 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
241 previous spelling, -march=armv6zk, is still accepted.
242
243 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
244 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
245 extensions has also been added to the Aarch64 port.
246
247 * Support for the ARMv8.1 architecture has been added to the ARM port. Support
248 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
249 been added to the ARM port.
250
251 * Extend --compress-debug-sections option to support
252 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
253 targets.
254
255 * --compress-debug-sections is turned on for Linux/x86 by default.
256
257 Changes in 2.25:
258
259 * Add support for the AVR Tiny microcontrollers.
260
261 * Replace support for openrisc and or32 with support for or1k.
262
263 * Enhanced the ARM port to accept the assembler output from the CodeComposer
264 Studio tool. Support is enabled via the new command-line option -mccs.
265
266 * Add support for the Andes NDS32.
267
268 Changes in 2.24:
269
270 * Add support for the Texas Instruments MSP430X processor.
271
272 * Add -gdwarf-sections command-line option to enable per-code-section
273 generation of DWARF .debug_line sections.
274
275 * Add support for Altera Nios II.
276
277 * Add support for the Imagination Technologies Meta processor.
278
279 * Add support for the v850e3v5.
280
281 * Remove assembler support for MIPS ECOFF targets.
282
283 Changes in 2.23:
284
285 * Add support for the 64-bit ARM architecture: AArch64.
286
287 * Add support for S12X processor.
288
289 * Add support for the VLE extension to the PowerPC architecture.
290
291 * Add support for the Freescale XGATE architecture.
292
293 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
294 directives. These are currently available only for x86 and ARM targets.
295
296 * Add support for the Renesas RL78 architecture.
297
298 * Add support for the Adapteva EPIPHANY architecture.
299
300 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
301
302 Changes in 2.22:
303
304 * Add support for the Tilera TILEPro and TILE-Gx architectures.
305
306 Changes in 2.21:
307
308 * Gas no longer requires doubling of ampersands in macros.
309
310 * Add support for the TMS320C6000 (TI C6X) processor family.
311
312 * GAS now understands an extended syntax in the .section directive flags
313 for COFF targets that allows the section's alignment to be specified. This
314 feature has also been backported to the 2.20 release series, starting with
315 2.20.1.
316
317 * Add support for the Renesas RX processor.
318
319 * New command-line option, --compress-debug-sections, which requests
320 compression of DWARF debug information sections in the relocatable output
321 file. Compressed debug sections are supported by readelf, objdump, and
322 gold, but not currently by Gnu ld.
323
324 Changes in 2.20:
325
326 * Added support for v850e2 and v850e2v3.
327
328 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
329 pseudo op. It marks the symbol as being globally unique in the entire
330 process.
331
332 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
333 in binary rather than text.
334
335 * Add support for common symbol alignment to PE formats.
336
337 * Add support for the new discriminator column in the DWARF line table,
338 with a discriminator operand for the .loc directive.
339
340 * Add support for Sunplus score architecture.
341
342 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
343 indicate that if the symbol is the target of a relocation, its value should
344 not be use. Instead the function should be invoked and its result used as
345 the value.
346
347 * Add support for Lattice Mico32 (lm32) architecture.
348
349 * Add support for Xilinx MicroBlaze architecture.
350
351 Changes in 2.19:
352
353 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
354 tables without runtime relocation.
355
356 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
357 adds compatibility with H'00 style hex constants.
358
359 * New command-line option, -msse-check=[none|error|warning], for x86
360 targets.
361
362 * New sub-option added to the assembler's -a command-line switch to
363 generate a listing output. The 'g' sub-option will insert into the listing
364 various information about the assembly, such as assembler version, the
365 command-line options used, and a time stamp.
366
367 * New command-line option -msse2avx for x86 target to encode SSE
368 instructions with VEX prefix.
369
370 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
371
372 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
373 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
374 -mnaked-reg and -mold-gcc, for x86 targets.
375
376 * Support for generating wide character strings has been added via the new
377 pseudo ops: .string16, .string32 and .string64.
378
379 * Support for SSE5 has been added to the i386 port.
380
381 Changes in 2.18:
382
383 * The GAS sources are now released under the GPLv3.
384
385 * Support for the National Semiconductor CR16 target has been added.
386
387 * Added gas .reloc pseudo. This is a low-level interface for creating
388 relocations.
389
390 * Add support for x86_64 PE+ target.
391
392 * Add support for Score target.
393
394 Changes in 2.17:
395
396 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
397
398 * Support for ms2 architecture has been added.
399
400 * Support for the Z80 processor family has been added.
401
402 * Add support for the "@<file>" syntax to the command line, so that extra
403 switches can be read from <file>.
404
405 * The SH target supports a new command-line switch --enable-reg-prefix which,
406 if enabled, will allow register names to be optionally prefixed with a $
407 character. This allows register names to be distinguished from label names.
408
409 * Macros with a variable number of arguments are now supported. See the
410 documentation for how this works.
411
412 * Added --reduce-memory-overheads switch to reduce the size of the hash
413 tables used, at the expense of longer assembly times, and
414 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
415
416 * Macro names and macro parameter names can now be any identifier that would
417 also be legal as a symbol elsewhere. For macro parameter names, this is
418 known to cause problems in certain sources when the respective target uses
419 characters inconsistently, and thus macro parameter references may no longer
420 be recognized as such (see the documentation for details).
421
422 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
423 for the VAX target in order to be more compatible with the VAX MACRO
424 assembler.
425
426 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
427
428 Changes in 2.16:
429
430 * Redefinition of macros now results in an error.
431
432 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
433
434 * New command-line option -munwind-check=[warning|error] for IA64
435 targets.
436
437 * The IA64 port now uses automatic dependency violation removal as its default
438 mode.
439
440 * Port to MAXQ processor contributed by HCL Tech.
441
442 * Added support for generating unwind tables for ARM ELF targets.
443
444 * Add a -g command-line option to generate debug information in the target's
445 preferred debug format.
446
447 * Support for the crx-elf target added.
448
449 * Support for the sh-symbianelf target added.
450
451 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
452 on pe[i]-i386; required for this target's DWARF 2 support.
453
454 * Support for Motorola MCF521x/5249/547x/548x added.
455
456 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
457 instrucitons.
458
459 * New command-line option -mno-shared for MIPS ELF targets.
460
461 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
462 added to enter (and leave) alternate macro syntax mode.
463
464 Changes in 2.15:
465
466 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
467 deprecated and will be removed in a future release.
468
469 * Added PIC m32r Linux (ELF) and support to M32R assembler.
470
471 * Added support for ARM V6.
472
473 * Added support for sh4a and variants.
474
475 * Support for Renesas M32R2 added.
476
477 * Limited support for Mapping Symbols as specified in the ARM ELF
478 specification has been added to the arm assembler.
479
480 * On ARM architectures, added a new gas directive ".unreq" that undoes
481 definitions created by ".req".
482
483 * Support for Motorola ColdFire MCF528x added.
484
485 * Added --gstabs+ switch to enable the generation of STABS debug format
486 information with GNU extensions.
487
488 * Added support for MIPS64 Release 2.
489
490 * Added support for v850e1.
491
492 * Added -n switch for x86 assembler. By default, x86 GAS replaces
493 multiple nop instructions used for alignment within code sections
494 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
495 switch disables the optimization.
496
497 * Removed -n option from MIPS assembler. It was not useful, and confused the
498 existing -non_shared option.
499
500 Changes in 2.14:
501
502 * Added support for MIPS32 Release 2.
503
504 * Added support for Xtensa architecture.
505
506 * Support for Intel's iWMMXt processor (an ARM variant) added.
507
508 * An assembler test generator has been contributed and an example file that
509 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
510
511 * Support for SH2E added.
512
513 * GASP has now been removed.
514
515 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
516 DSP's contributed by Michael Hayes and Svein E. Seldal.
517
518 * Support for the Ubicom IP2xxx microcontroller added.
519
520 Changes in 2.13:
521
522 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
523 and FR500 included.
524
525 * Support for DLX processor added.
526
527 * GASP has now been deprecated and will be removed in a future release. Use
528 the macro facilities in GAS instead.
529
530 * GASP now correctly parses floating point numbers. Unless the base is
531 explicitly specified, they are interpreted as decimal numbers regardless of
532 the currently specified base.
533
534 Changes in 2.12:
535
536 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
537
538 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
539
540 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
541 specifying the target instruction set. The old method of specifying the
542 target processor has been deprecated, but is still accepted for
543 compatibility.
544
545 * Support for the VFP floating-point instruction set has been added to
546 the ARM assembler.
547
548 * New psuedo op: .incbin to include a set of binary data at a given point
549 in the assembly. Contributed by Anders Norlander.
550
551 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
552 but still works for compatability.
553
554 * The MIPS assembler no longer issues a warning by default when it
555 generates a nop instruction from a macro. The new command-line option
556 -n will turn on the warning.
557
558 Changes in 2.11:
559
560 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
561
562 * x86 gas now supports the full Pentium4 instruction set.
563
564 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
565
566 * Support for Motorola 68HC11 and 68HC12.
567
568 * Support for Texas Instruments TMS320C54x (tic54x).
569
570 * Support for IA-64.
571
572 * Support for i860, by Jason Eckhardt.
573
574 * Support for CRIS (Axis Communications ETRAX series).
575
576 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
577
578 * x86 gas -q command-line option quietens warnings about register size changes
579 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
580 translating various deprecated floating point instructions.
581
582 Changes in 2.10:
583
584 * Support for the ARM msr instruction was changed to only allow an immediate
585 operand when altering the flags field.
586
587 * Support for ATMEL AVR.
588
589 * Support for IBM 370 ELF. Somewhat experimental.
590
591 * Support for numbers with suffixes.
592
593 * Added support for breaking to the end of repeat loops.
594
595 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
596
597 * New .elseif pseudo-op added.
598
599 * New --fatal-warnings option.
600
601 * picoJava architecture support added.
602
603 * Motorola MCore 210 processor support added.
604
605 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
606 assembly programs with intel syntax.
607
608 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
609
610 * Added -gdwarf2 option to generate DWARF 2 debugging information.
611
612 * Full 16-bit mode support for i386.
613
614 * Greatly improved instruction operand checking for i386. This change will
615 produce errors or warnings on incorrect assembly code that previous versions
616 of gas accepted. If you get unexpected messages from code that worked with
617 older versions of gas, please double check the code before reporting a bug.
618
619 * Weak symbol support added for COFF targets.
620
621 * Mitsubishi D30V support added.
622
623 * Texas Instruments c80 (tms320c80) support added.
624
625 * i960 ELF support added.
626
627 * ARM ELF support added.
628
629 Changes in 2.9:
630
631 * Texas Instruments c30 (tms320c30) support added.
632
633 * The assembler now optimizes the exception frame information generated by egcs
634 and gcc 2.8. The new --traditional-format option disables this optimization.
635
636 * Added --gstabs option to generate stabs debugging information.
637
638 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
639 listing.
640
641 * Added -MD option to print dependencies.
642
643 Changes in 2.8:
644
645 * BeOS support added.
646
647 * MIPS16 support added.
648
649 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
650
651 * Alpha/VMS support added.
652
653 * m68k options --base-size-default-16, --base-size-default-32,
654 --disp-size-default-16, and --disp-size-default-32 added.
655
656 * The alignment directives now take an optional third argument, which is the
657 maximum number of bytes to skip. If doing the alignment would require
658 skipping more than the given number of bytes, the alignment is not done at
659 all.
660
661 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
662
663 * The -a option takes a new suboption, c (e.g., -alc), to skip false
664 conditionals in listings.
665
666 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
667 the symbol is already defined.
668
669 Changes in 2.7:
670
671 * The PowerPC assembler now allows the use of symbolic register names (r0,
672 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
673 can be used any time. PowerPC 860 move to/from SPR instructions have been
674 added.
675
676 * Alpha Linux (ELF) support added.
677
678 * PowerPC ELF support added.
679
680 * m68k Linux (ELF) support added.
681
682 * i960 Hx/Jx support added.
683
684 * i386/PowerPC gnu-win32 support added.
685
686 * SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
687 default is to build COFF-only support. To get a set of tools that generate
688 ELF (they'll understand both COFF and ELF), you must configure with
689 target=i386-unknown-sco3.2v5elf.
690
691 * m88k-motorola-sysv3* support added.
692
693 Changes in 2.6:
694
695 * Gas now directly supports macros, without requiring GASP.
696
697 * Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
698 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
699 ``.mri 0'' is seen; this can be convenient for inline assembler code.
700
701 * Added --defsym SYM=VALUE option.
702
703 * Added -mips4 support to MIPS assembler.
704
705 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
706
707 Changes in 2.4:
708
709 * Converted this directory to use an autoconf-generated configure script.
710
711 * ARM support, from Richard Earnshaw.
712
713 * Updated VMS support, from Pat Rankin, including considerably improved
714 debugging support.
715
716 * Support for the control registers in the 68060.
717
718 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
719 provide for possible future gcc changes, for targets where gas provides some
720 features not available in the native assembler. If the native assembler is
721 used, it should become obvious pretty quickly what the problem is.
722
723 * Usage message is available with "--help".
724
725 * The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
726 also, but didn't get into the NEWS file.)
727
728 * Weak symbol support for a.out.
729
730 * A bug in the listing code which could cause an infinite loop has been fixed.
731 Bugs in listings when generating a COFF object file have also been fixed.
732
733 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
734 Paul Kranenburg.
735
736 * Improved Alpha support. Immediate constants can have a much larger range
737 now. Support for the 21164 has been contributed by Digital.
738
739 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
740
741 Changes in 2.3:
742
743 * Mach i386 support, by David Mackenzie and Ken Raeburn.
744
745 * RS/6000 and PowerPC support by Ian Taylor.
746
747 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
748 based on mail received from various people. The `-h#' option should work
749 again too.
750
751 * HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
752 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
753 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
754 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
755 in the "dist" directory.
756
757 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
758 simple tests okay. I haven't put it through extensive testing. (GNU make is
759 currently required for BSD 4.3 builds.)
760
761 * Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
762 based on code donated by CMU, which used an a.out-based format. I'm afraid
763 the alpha-a.out support is pretty badly mangled, and much of it removed;
764 making it work will require rewriting it as BFD support for the format anyways.
765
766 * Irix 5 support.
767
768 * The test suites have been fixed up a bit, so that they should work with a
769 couple different versions of expect and dejagnu.
770
771 * Symbols' values are now handled internally as expressions, permitting more
772 flexibility in evaluating them in some cases. Some details of relocation
773 handling have also changed, and simple constant pool management has been
774 added, to make the Alpha port easier.
775
776 * New option "--statistics" for printing out program run times. This is
777 intended to be used with the gcc "-Q" option, which prints out times spent in
778 various phases of compilation. (You should be able to get all of them
779 printed out with "gcc -Q -Wa,--statistics", I think.)
780
781 Changes in 2.2:
782
783 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
784
785 * Configurations that are still in development (and therefore are convenient to
786 have listed in configure.in) still get rejected without a minor change to
787 gas/Makefile.in, so people not doing development work shouldn't get the
788 impression that support for such configurations is actually believed to be
789 reliable.
790
791 * The program name (usually "as") is printed when a fatal error message is
792 displayed. This should prevent some confusion about the source of occasional
793 messages about "internal errors".
794
795 * ELF support is falling into place. Support for the 386 should be working.
796 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
797
798 * Symbol values are maintained as expressions instead of being immediately
799 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
800 more complex calculations involving symbols whose values are not alreadey
801 known.
802
803 * DBX-style debugging info ("stabs") is now supported for COFF formats.
804 If any stabs directives are seen in the source, GAS will create two new
805 sections: a ".stab" and a ".stabstr" section. The format of the .stab
806 section is nearly identical to the a.out symbol format, and .stabstr is
807 its string table. For this to be useful, you must have configured GCC
808 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
809 that can use the stab sections (4.11 or later).
810
811 * LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
812 support is in progress.
813
814 Changes in 2.1:
815
816 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
817 incorporated, but not well tested yet.
818
819 * Altered the opcode table split for m68k; it should require less VM to compile
820 with gcc now.
821
822 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
823 suggested by Ronald Cole.
824
825 * HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
826 includes improved ELF support, which I've started adapting for SPARC Solaris
827 2.x. Integration isn't completely, so it probably won't work.
828
829 * HP9000/300 support, donated by HP, has been merged in.
830
831 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
832
833 * Better error messages for unsupported configurations (e.g., hppa-hpux).
834
835 * Test suite framework is starting to become reasonable.
836
837 Changes in 2.0:
838
839 * Mostly bug fixes.
840
841 * Some more merging of BFD and ELF code, but ELF still doesn't work.
842
843 Changes in 1.94:
844
845 * BFD merge is partly done. Adventurous souls may try giving configure the
846 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
847 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
848 or "solaris". (ELF isn't really supported yet. It needs work. I've got
849 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
850 fully merged yet.)
851
852 * The 68K opcode table has been split in half. It should now compile under gcc
853 without consuming ridiculous amounts of memory.
854
855 * A couple data structures have been reduced in size. This should result in
856 saving a little bit of space at runtime.
857
858 * Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
859 code provided ROSE format support, which I haven't merged in yet. (I can
860 make it available, if anyone wants to try it out.) Ralph's code, for BSD
861 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
862 coming.
863
864 * Support for the Hitachi H8/500 has been added.
865
866 * VMS host and target support should be working now, thanks chiefly to Eric
867 Youngdale.
868
869 Changes in 1.93.01:
870
871 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
872
873 * For i386, .align is now power-of-two; was number-of-bytes.
874
875 * For m68k, "%" is now accepted before register names. For COFF format, which
876 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
877 can be distinguished from the register.
878
879 * Last public release was 1.38. Lots of configuration changes since then, lots
880 of new CPUs and formats, lots of bugs fixed.
881
882 \f
883 Copyright (C) 2012-2020 Free Software Foundation, Inc.
884
885 Copying and distribution of this file, with or without modification,
886 are permitted in any medium without royalty provided the copyright
887 notice and this notice are preserved.
888
889 Local variables:
890 fill-column: 79
891 End:
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