Do not remove the symbol's value from the addend for fixups against local
[deliverable/binutils-gdb.git] / gas / config / tc-a29k.c
1 /* tc-a29k.c -- Assemble for the AMD 29000.
2 Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1998, 2000, 2001
3 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 /* John Gilmore has reorganized this module somewhat, to make it easier
23 to convert it to new machines' assemblers as desired. There was too
24 much bloody rewriting required before. There still probably is. */
25
26 #include "as.h"
27 #include "safe-ctype.h"
28
29 #include "opcode/a29k.h"
30
31 /* Make it easier to clone this machine desc into another one. */
32 #define machine_opcode a29k_opcode
33 #define machine_opcodes a29k_opcodes
34 #define machine_ip a29k_ip
35 #define machine_it a29k_it
36
37 #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */
38 #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */
39 #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */
40 #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */
41
42 /* handle of the OPCODE hash table */
43 static struct hash_control *op_hash = NULL;
44
45 struct machine_it
46 {
47 char *error;
48 unsigned long opcode;
49 struct nlist *nlistp;
50 expressionS exp;
51 int pcrel;
52 int reloc_offset; /* Offset of reloc within insn */
53
54 int reloc;
55 }
56 the_insn;
57
58 static void machine_ip PARAMS ((char *str));
59 /* static void print_insn PARAMS ((struct machine_it *insn)); */
60 #ifndef OBJ_COFF
61 static void s_data1 PARAMS ((void));
62 static void s_use PARAMS ((int));
63 #endif
64
65 const pseudo_typeS
66 md_pseudo_table[] =
67 {
68 {"align", s_align_bytes, 4},
69 {"block", s_space, 0},
70 {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050 */
71 {"reg", s_lsym, 0}, /* Register equate, same as equ */
72 {"space", s_ignore, 0}, /* Listing control */
73 {"sect", s_ignore, 0}, /* Creation of coff sections */
74 #ifndef OBJ_COFF
75 /* We can do this right with coff. */
76 {"use", s_use, 0},
77 #endif
78 {"word", cons, 4},
79 {NULL, 0, 0},
80 };
81
82 #if defined(BFD_HEADERS)
83 #ifdef RELSZ
84 const int md_reloc_size = RELSZ; /* Coff headers */
85 #else
86 const int md_reloc_size = 12; /* something else headers */
87 #endif
88 #else
89 const int md_reloc_size = 12; /* Not bfdized*/
90 #endif
91
92 /* This array holds the chars that always start a comment. If the
93 pre-processor is disabled, these aren't very useful */
94 const char comment_chars[] = ";";
95
96 /* This array holds the chars that only start a comment at the beginning of
97 a line. If the line seems to have the form '# 123 filename'
98 .line and .file directives will appear in the pre-processed output */
99 /* Note that input_file.c hand checks for '#' at the beginning of the
100 first line of the input file. This is because the compiler outputs
101 #NO_APP at the beginning of its output. */
102 /* Also note that comments like this one will always work */
103 const char line_comment_chars[] = "#";
104
105 /* We needed an unused char for line separation to work around the
106 lack of macros, using sed and such. */
107 const char line_separator_chars[] = "@";
108
109 /* Chars that can be used to separate mant from exp in floating point nums */
110 const char EXP_CHARS[] = "eE";
111
112 /* Chars that mean this number is a floating point constant */
113 /* As in 0f12.456 */
114 /* or 0d1.2345e12 */
115 const char FLT_CHARS[] = "rRsSfFdDxXpP";
116
117 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
118 changed in read.c. Ideally it shouldn't have to know about it at
119 all, but nothing is ideal around here. */
120
121 /*
122 * anull bit - causes the branch delay slot instructions to not be executed
123 */
124 #define ANNUL (1 << 29)
125
126 #ifndef OBJ_COFF
127
128 static void
129 s_use (ignore)
130 int ignore;
131 {
132 if (strncmp (input_line_pointer, ".text", 5) == 0)
133 {
134 input_line_pointer += 5;
135 s_text (0);
136 return;
137 }
138 if (strncmp (input_line_pointer, ".data", 5) == 0)
139 {
140 input_line_pointer += 5;
141 s_data (0);
142 return;
143 }
144 if (strncmp (input_line_pointer, ".data1", 6) == 0)
145 {
146 input_line_pointer += 6;
147 s_data1 ();
148 return;
149 }
150 /* Literals can't go in the text segment because you can't read from
151 instruction memory on some 29k's. So, into initialized data. */
152 if (strncmp (input_line_pointer, ".lit", 4) == 0)
153 {
154 input_line_pointer += 4;
155 subseg_set (SEG_DATA, 200);
156 demand_empty_rest_of_line ();
157 return;
158 }
159
160 as_bad (_("Unknown segment type"));
161 demand_empty_rest_of_line ();
162 }
163
164 static void
165 s_data1 ()
166 {
167 subseg_set (SEG_DATA, 1);
168 demand_empty_rest_of_line ();
169 }
170
171 #endif /* OBJ_COFF */
172
173 /* Install symbol definition that maps REGNAME to REGNO.
174 FIXME-SOON: These are not recognized in mixed case. */
175
176 static void
177 insert_sreg (regname, regnum)
178 char *regname;
179 int regnum;
180 {
181 /* FIXME-SOON, put something in these syms so they won't be output
182 to the symbol table of the resulting object file. */
183
184 /* Must be large enough to hold the names of the special registers. */
185 char buf[80];
186 int i;
187
188 symbol_table_insert (symbol_new (regname, SEG_REGISTER, (valueT) regnum,
189 &zero_address_frag));
190 for (i = 0; regname[i]; i++)
191 buf[i] = TOUPPER (regname[i]);
192 buf[i] = '\0';
193
194 symbol_table_insert (symbol_new (buf, SEG_REGISTER, (valueT) regnum,
195 &zero_address_frag));
196 }
197
198 /* Install symbol definitions for assorted special registers.
199 See ASM29K Ref page 2-9. */
200
201 void
202 define_some_regs ()
203 {
204 #define SREG 256
205
206 /* Protected special-purpose register names */
207 insert_sreg ("vab", SREG + 0);
208 insert_sreg ("ops", SREG + 1);
209 insert_sreg ("cps", SREG + 2);
210 insert_sreg ("cfg", SREG + 3);
211 insert_sreg ("cha", SREG + 4);
212 insert_sreg ("chd", SREG + 5);
213 insert_sreg ("chc", SREG + 6);
214 insert_sreg ("rbp", SREG + 7);
215 insert_sreg ("tmc", SREG + 8);
216 insert_sreg ("tmr", SREG + 9);
217 insert_sreg ("pc0", SREG + 10);
218 insert_sreg ("pc1", SREG + 11);
219 insert_sreg ("pc2", SREG + 12);
220 insert_sreg ("mmu", SREG + 13);
221 insert_sreg ("lru", SREG + 14);
222
223 /* Additional protected special-purpose registers for the 29050 */
224 insert_sreg ("rsn", SREG + 15);
225 insert_sreg ("rma0", SREG + 16);
226 insert_sreg ("rmc0", SREG + 17);
227 insert_sreg ("rma1", SREG + 18);
228 insert_sreg ("rmc1", SREG + 19);
229 insert_sreg ("spc0", SREG + 20);
230 insert_sreg ("spc1", SREG + 21);
231 insert_sreg ("spc2", SREG + 22);
232 insert_sreg ("iba0", SREG + 23);
233 insert_sreg ("ibc0", SREG + 24);
234 insert_sreg ("iba1", SREG + 25);
235 insert_sreg ("ibc1", SREG + 26);
236
237 /* Additional registers for the 29040. */
238 insert_sreg ("dba", SREG + 27);
239 insert_sreg ("dbc", SREG + 28);
240 insert_sreg ("cir", SREG + 29);
241 insert_sreg ("cdr", SREG + 30);
242
243 /* Unprotected special-purpose register names */
244 insert_sreg ("ipc", SREG + 128);
245 insert_sreg ("ipa", SREG + 129);
246 insert_sreg ("ipb", SREG + 130);
247 insert_sreg ("q", SREG + 131);
248 insert_sreg ("alu", SREG + 132);
249 insert_sreg ("bp", SREG + 133);
250 insert_sreg ("fc", SREG + 134);
251 insert_sreg ("cr", SREG + 135);
252 insert_sreg ("fpe", SREG + 160);
253 insert_sreg ("inte", SREG + 161);
254 insert_sreg ("fps", SREG + 162);
255 /* "", SREG+163); Reserved */
256 insert_sreg ("exop", SREG + 164);
257 }
258
259 /* This function is called once, at assembler startup time. It should
260 set up all the tables, etc., that the MD part of the assembler will
261 need. */
262 void
263 md_begin ()
264 {
265 register const char *retval = NULL;
266 int lose = 0;
267 register int skipnext = 0;
268 register unsigned int i;
269 register char *strend, *strend2;
270
271 /* Hash up all the opcodes for fast use later. */
272
273 op_hash = hash_new ();
274
275 for (i = 0; i < num_opcodes; i++)
276 {
277 const char *name = machine_opcodes[i].name;
278
279 if (skipnext)
280 {
281 skipnext = 0;
282 continue;
283 }
284
285 /* Hack to avoid multiple opcode entries. We pre-locate all the
286 variations (b/i field and P/A field) and handle them. */
287
288 if (!strcmp (name, machine_opcodes[i + 1].name))
289 {
290 if ((machine_opcodes[i].opcode & 0x01000000) != 0
291 || (machine_opcodes[i + 1].opcode & 0x01000000) == 0
292 || ((machine_opcodes[i].opcode | 0x01000000)
293 != machine_opcodes[i + 1].opcode))
294 goto bad_table;
295 strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1;
296 strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1;
297 switch (*strend)
298 {
299 case 'b':
300 if (*strend2 != 'i')
301 goto bad_table;
302 break;
303 case 'P':
304 if (*strend2 != 'A')
305 goto bad_table;
306 break;
307 default:
308 bad_table:
309 fprintf (stderr, "internal error: can't handle opcode %s\n",
310 name);
311 lose = 1;
312 }
313
314 /* OK, this is an i/b or A/P pair. We skip the
315 higher-valued one, and let the code for operand checking
316 handle OR-ing in the bit. */
317 skipnext = 1;
318 }
319
320 retval = hash_insert (op_hash, name, (PTR) &machine_opcodes[i]);
321 if (retval != NULL)
322 {
323 fprintf (stderr, "internal error: can't hash `%s': %s\n",
324 machine_opcodes[i].name, retval);
325 lose = 1;
326 }
327 }
328
329 if (lose)
330 as_fatal (_("Broken assembler. No assembly attempted."));
331
332 define_some_regs ();
333 }
334
335 /* Assemble a single instruction. Its label has already been handled
336 by the generic front end. We just parse opcode and operands, and
337 produce the bytes of data and relocation. */
338
339 void
340 md_assemble (str)
341 char *str;
342 {
343 char *toP;
344
345 know (str);
346 machine_ip (str);
347 toP = frag_more (4);
348 /* put out the opcode */
349 md_number_to_chars (toP, the_insn.opcode, 4);
350
351 /* put out the symbol-dependent stuff */
352 if (the_insn.reloc != NO_RELOC)
353 {
354 fix_new_exp (frag_now,
355 (toP - frag_now->fr_literal + the_insn.reloc_offset),
356 4, /* size */
357 &the_insn.exp,
358 the_insn.pcrel,
359 the_insn.reloc);
360 }
361 }
362
363 char *
364 parse_operand (s, operandp, opt)
365 char *s;
366 expressionS *operandp;
367 int opt;
368 {
369 char *save = input_line_pointer;
370 char *new;
371
372 input_line_pointer = s;
373 expression (operandp);
374 if (operandp->X_op == O_absent && ! opt)
375 as_bad (_("missing operand"));
376 new = input_line_pointer;
377 input_line_pointer = save;
378 return new;
379 }
380
381 /* Instruction parsing. Takes a string containing the opcode.
382 Operands are at input_line_pointer. Output is in the_insn.
383 Warnings or errors are generated. */
384
385 static void
386 machine_ip (str)
387 char *str;
388 {
389 char *s;
390 const char *args;
391 struct machine_opcode *insn;
392 char *argsStart;
393 unsigned long opcode;
394 expressionS the_operand;
395 expressionS *operand = &the_operand;
396 unsigned int reg;
397
398 /* Must handle `div0' opcode. */
399 s = str;
400 if (ISALPHA (*s))
401 for (; ISALNUM (*s); ++s)
402 *s = TOLOWER (*s);
403
404 switch (*s)
405 {
406 case '\0':
407 break;
408
409 case ' ': /* FIXME-SOMEDAY more whitespace */
410 *s++ = '\0';
411 break;
412
413 default:
414 as_bad (_("Unknown opcode: `%s'"), str);
415 return;
416 }
417 if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL)
418 {
419 as_bad (_("Unknown opcode `%s'."), str);
420 return;
421 }
422 argsStart = s;
423 opcode = insn->opcode;
424 memset (&the_insn, '\0', sizeof (the_insn));
425 the_insn.reloc = NO_RELOC;
426
427 /* Build the opcode, checking as we go to make sure that the
428 operands match.
429
430 If an operand matches, we modify the_insn or opcode appropriately,
431 and do a "continue". If an operand fails to match, we "break". */
432
433 if (insn->args[0] != '\0')
434 {
435 /* Prime the pump. */
436 s = parse_operand (s, operand, insn->args[0] == 'I');
437 }
438
439 for (args = insn->args;; ++args)
440 {
441 switch (*args)
442 {
443
444 case '\0': /* end of args */
445 if (*s == '\0')
446 {
447 /* We are truly done. */
448 the_insn.opcode = opcode;
449 return;
450 }
451 as_bad (_("Too many operands: %s"), s);
452 break;
453
454 case ',': /* Must match a comma */
455 if (*s++ == ',')
456 {
457 /* Parse next operand. */
458 s = parse_operand (s, operand, args[1] == 'I');
459 continue;
460 }
461 break;
462
463 case 'v': /* Trap numbers (immediate field) */
464 if (operand->X_op == O_constant)
465 {
466 if (operand->X_add_number < 256)
467 {
468 opcode |= (operand->X_add_number << 16);
469 continue;
470 }
471 else
472 {
473 as_bad (_("Immediate value of %ld is too large"),
474 (long) operand->X_add_number);
475 continue;
476 }
477 }
478 the_insn.reloc = RELOC_8;
479 the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */
480 the_insn.exp = *operand;
481 continue;
482
483 case 'b': /* A general register or 8-bit immediate */
484 case 'i':
485 /* We treat the two cases identically since we mashed
486 them together in the opcode table. */
487 if (operand->X_op == O_register)
488 goto general_reg;
489
490 /* Make sure the 'i' case really exists. */
491 if ((insn->opcode | IMMEDIATE_BIT) != (insn + 1)->opcode)
492 break;
493
494 opcode |= IMMEDIATE_BIT;
495 if (operand->X_op == O_constant)
496 {
497 if (operand->X_add_number < 256)
498 {
499 opcode |= operand->X_add_number;
500 continue;
501 }
502 else
503 {
504 as_bad (_("Immediate value of %ld is too large"),
505 (long) operand->X_add_number);
506 continue;
507 }
508 }
509 the_insn.reloc = RELOC_8;
510 the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */
511 the_insn.exp = *operand;
512 continue;
513
514 case 'a': /* next operand must be a register */
515 case 'c':
516 general_reg:
517 /* lrNNN or grNNN or %%expr or a user-def register name */
518 if (operand->X_op != O_register)
519 break; /* Only registers */
520 know (operand->X_add_symbol == 0);
521 know (operand->X_op_symbol == 0);
522 reg = operand->X_add_number;
523 if (reg >= SREG)
524 break; /* No special registers */
525
526 /* Got the register, now figure out where it goes in the
527 opcode. */
528 switch (*args)
529 {
530 case 'a':
531 opcode |= reg << 8;
532 continue;
533
534 case 'b':
535 case 'i':
536 opcode |= reg;
537 continue;
538
539 case 'c':
540 opcode |= reg << 16;
541 continue;
542 }
543 as_fatal (_("failed sanity check."));
544 break;
545
546 case 'x': /* 16 bit constant, zero-extended */
547 case 'X': /* 16 bit constant, one-extended */
548 if (operand->X_op == O_constant)
549 {
550 opcode |= (operand->X_add_number & 0xFF) << 0 |
551 ((operand->X_add_number & 0xFF00) << 8);
552 continue;
553 }
554 the_insn.reloc = RELOC_CONST;
555 the_insn.exp = *operand;
556 continue;
557
558 case 'h':
559 if (operand->X_op == O_constant)
560 {
561 opcode |= (operand->X_add_number & 0x00FF0000) >> 16 |
562 (((unsigned long) operand->X_add_number
563 /* avoid sign ext */ & 0xFF000000) >> 8);
564 continue;
565 }
566 the_insn.reloc = RELOC_CONSTH;
567 the_insn.exp = *operand;
568 continue;
569
570 case 'P': /* PC-relative jump address */
571 case 'A': /* Absolute jump address */
572 /* These two are treated together since we folded the
573 opcode table entries together. */
574 if (operand->X_op == O_constant)
575 {
576 /* Make sure the 'A' case really exists. */
577 if ((insn->opcode | ABSOLUTE_BIT) != (insn + 1)->opcode)
578 break;
579 {
580 bfd_vma v, mask;
581 mask = 0x1ffff;
582 v = operand->X_add_number & ~ mask;
583 if (v)
584 as_bad ("call/jmp target out of range");
585 }
586 opcode |= ABSOLUTE_BIT |
587 (operand->X_add_number & 0x0003FC00) << 6 |
588 ((operand->X_add_number & 0x000003FC) >> 2);
589 continue;
590 }
591 the_insn.reloc = RELOC_JUMPTARG;
592 the_insn.exp = *operand;
593 the_insn.pcrel = 1; /* Assume PC-relative jump */
594 /* FIXME-SOON, Do we figure out whether abs later, after
595 know sym val? */
596 continue;
597
598 case 'e': /* Coprocessor enable bit for LOAD/STORE insn */
599 if (operand->X_op == O_constant)
600 {
601 if (operand->X_add_number == 0)
602 continue;
603 if (operand->X_add_number == 1)
604 {
605 opcode |= CE_BIT;
606 continue;
607 }
608 }
609 break;
610
611 case 'n': /* Control bits for LOAD/STORE instructions */
612 if (operand->X_op == O_constant &&
613 operand->X_add_number < 128)
614 {
615 opcode |= (operand->X_add_number << 16);
616 continue;
617 }
618 break;
619
620 case 's': /* Special register number */
621 if (operand->X_op != O_register)
622 break; /* Only registers */
623 if (operand->X_add_number < SREG)
624 break; /* Not a special register */
625 opcode |= (operand->X_add_number & 0xFF) << 8;
626 continue;
627
628 case 'u': /* UI bit of CONVERT */
629 if (operand->X_op == O_constant)
630 {
631 if (operand->X_add_number == 0)
632 continue;
633 if (operand->X_add_number == 1)
634 {
635 opcode |= UI_BIT;
636 continue;
637 }
638 }
639 break;
640
641 case 'r': /* RND bits of CONVERT */
642 if (operand->X_op == O_constant &&
643 operand->X_add_number < 8)
644 {
645 opcode |= operand->X_add_number << 4;
646 continue;
647 }
648 break;
649
650 case 'I': /* ID bits of INV and IRETINV. */
651 /* This operand is optional. */
652 if (operand->X_op == O_absent)
653 continue;
654 else if (operand->X_op == O_constant
655 && operand->X_add_number < 4)
656 {
657 opcode |= operand->X_add_number << 16;
658 continue;
659 }
660 break;
661
662 case 'd': /* FD bits of CONVERT */
663 if (operand->X_op == O_constant &&
664 operand->X_add_number < 4)
665 {
666 opcode |= operand->X_add_number << 2;
667 continue;
668 }
669 break;
670
671 case 'f': /* FS bits of CONVERT */
672 if (operand->X_op == O_constant &&
673 operand->X_add_number < 4)
674 {
675 opcode |= operand->X_add_number << 0;
676 continue;
677 }
678 break;
679
680 case 'C':
681 if (operand->X_op == O_constant &&
682 operand->X_add_number < 4)
683 {
684 opcode |= operand->X_add_number << 16;
685 continue;
686 }
687 break;
688
689 case 'F':
690 if (operand->X_op == O_constant &&
691 operand->X_add_number < 16)
692 {
693 opcode |= operand->X_add_number << 18;
694 continue;
695 }
696 break;
697
698 default:
699 BAD_CASE (*args);
700 }
701 /* Types or values of args don't match. */
702 as_bad ("Invalid operands");
703 return;
704 }
705 }
706
707 /* This is identical to the md_atof in m68k.c. I think this is right,
708 but I'm not sure.
709
710 Turn a string in input_line_pointer into a floating point constant
711 of type TYPE, and store the appropriate bytes in *LITP. The number
712 of LITTLENUMS emitted is stored in *SIZEP. An error message is
713 returned, or NULL on OK. */
714
715 /* Equal to MAX_PRECISION in atof-ieee.c */
716 #define MAX_LITTLENUMS 6
717
718 char *
719 md_atof (type, litP, sizeP)
720 char type;
721 char *litP;
722 int *sizeP;
723 {
724 int prec;
725 LITTLENUM_TYPE words[MAX_LITTLENUMS];
726 LITTLENUM_TYPE *wordP;
727 char *t;
728
729 switch (type)
730 {
731
732 case 'f':
733 case 'F':
734 case 's':
735 case 'S':
736 prec = 2;
737 break;
738
739 case 'd':
740 case 'D':
741 case 'r':
742 case 'R':
743 prec = 4;
744 break;
745
746 case 'x':
747 case 'X':
748 prec = 6;
749 break;
750
751 case 'p':
752 case 'P':
753 prec = 6;
754 break;
755
756 default:
757 *sizeP = 0;
758 return "Bad call to MD_ATOF()";
759 }
760 t = atof_ieee (input_line_pointer, type, words);
761 if (t)
762 input_line_pointer = t;
763 *sizeP = prec * sizeof (LITTLENUM_TYPE);
764 for (wordP = words; prec--;)
765 {
766 md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE));
767 litP += sizeof (LITTLENUM_TYPE);
768 }
769 return 0;
770 }
771
772 /*
773 * Write out big-endian.
774 */
775 void
776 md_number_to_chars (buf, val, n)
777 char *buf;
778 valueT val;
779 int n;
780 {
781 number_to_chars_bigendian (buf, val, n);
782 }
783
784 void
785 md_apply_fix (fixP, val)
786 fixS *fixP;
787 long val;
788 {
789 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
790
791 fixP->fx_addnumber = val; /* Remember value for emit_reloc */
792
793 know (fixP->fx_size == 4);
794 know (fixP->fx_r_type < NO_RELOC);
795
796 /* This is a hack. There should be a better way to handle this. */
797 if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy)
798 {
799 val += fixP->fx_where + fixP->fx_frag->fr_address;
800 }
801
802 switch (fixP->fx_r_type)
803 {
804
805 case RELOC_32:
806 buf[0] = val >> 24;
807 buf[1] = val >> 16;
808 buf[2] = val >> 8;
809 buf[3] = val;
810 break;
811
812 case RELOC_8:
813 buf[0] = val;
814 break;
815
816 case RELOC_WDISP30:
817 val = (val >>= 2) + 1;
818 buf[0] |= (val >> 24) & 0x3f;
819 buf[1] = (val >> 16);
820 buf[2] = val >> 8;
821 buf[3] = val;
822 break;
823
824 case RELOC_HI22:
825 buf[1] |= (val >> 26) & 0x3f;
826 buf[2] = val >> 18;
827 buf[3] = val >> 10;
828 break;
829
830 case RELOC_LO10:
831 buf[2] |= (val >> 8) & 0x03;
832 buf[3] = val;
833 break;
834
835 case RELOC_BASE13:
836 buf[2] |= (val >> 8) & 0x1f;
837 buf[3] = val;
838 break;
839
840 case RELOC_WDISP22:
841 val = (val >>= 2) + 1;
842 /* FALLTHROUGH */
843 case RELOC_BASE22:
844 buf[1] |= (val >> 16) & 0x3f;
845 buf[2] = val >> 8;
846 buf[3] = val;
847 break;
848
849 case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */
850 if (!fixP->fx_done)
851 {
852 /* The linker tries to support both AMD and old GNU style
853 R_IREL relocs. That means that if the addend is exactly
854 the negative of the address within the section, the
855 linker will not handle it correctly. */
856 if (fixP->fx_pcrel
857 && val != 0
858 && val == - (fixP->fx_frag->fr_address + fixP->fx_where))
859 as_bad_where
860 (fixP->fx_file, fixP->fx_line,
861 "the linker will not handle this relocation correctly");
862 }
863 else if (fixP->fx_pcrel)
864 {
865 long v = val >> 17;
866 if (v != 0 && v != -1)
867 as_bad_where (fixP->fx_file, fixP->fx_line,
868 "call/jmp target out of range");
869 }
870 else
871 /* this case was supposed to be handled in machine_ip */
872 abort ();
873 buf[1] = val >> 10; /* Holds bits 0003FFFC of address */
874 buf[3] = val >> 2;
875 break;
876
877 case RELOC_CONST: /* 00XX00XX pattern in a word */
878 buf[1] = val >> 8; /* Holds bits 0000XXXX */
879 buf[3] = val;
880 break;
881
882 case RELOC_CONSTH: /* 00XX00XX pattern in a word */
883 buf[1] = val >> 24; /* Holds bits XXXX0000 */
884 buf[3] = val >> 16;
885 break;
886
887 case NO_RELOC:
888 default:
889 as_bad (_("bad relocation type: 0x%02x"), fixP->fx_r_type);
890 break;
891 }
892 }
893
894 #ifdef OBJ_COFF
895 short
896 tc_coff_fix2rtype (fixP)
897 fixS *fixP;
898 {
899
900 switch (fixP->fx_r_type)
901 {
902 case RELOC_32:
903 return (R_WORD);
904 case RELOC_8:
905 return (R_BYTE);
906 case RELOC_CONST:
907 return (R_ILOHALF);
908 case RELOC_CONSTH:
909 return (R_IHIHALF);
910 case RELOC_JUMPTARG:
911 return (R_IREL);
912 default:
913 printf (_("need %o3\n"), fixP->fx_r_type);
914 abort ();
915 } /* switch on type */
916
917 return (0);
918 }
919
920 #endif /* OBJ_COFF */
921
922 /* should never be called for 29k */
923 void
924 md_convert_frag (headers, seg, fragP)
925 object_headers *headers;
926 segT seg;
927 register fragS *fragP;
928 {
929 as_fatal (_("a29k_convert_frag\n"));
930 }
931
932 /* should never be called for a29k */
933 int
934 md_estimate_size_before_relax (fragP, segtype)
935 register fragS *fragP;
936 segT segtype;
937 {
938 as_fatal (_("a29k_estimate_size_before_relax\n"));
939 return 0;
940 }
941
942 #if 0
943 /* for debugging only */
944 static void
945 print_insn (insn)
946 struct machine_it *insn;
947 {
948 char *Reloc[] =
949 {
950 "RELOC_8",
951 "RELOC_16",
952 "RELOC_32",
953 "RELOC_DISP8",
954 "RELOC_DISP16",
955 "RELOC_DISP32",
956 "RELOC_WDISP30",
957 "RELOC_WDISP22",
958 "RELOC_HI22",
959 "RELOC_22",
960 "RELOC_13",
961 "RELOC_LO10",
962 "RELOC_SFA_BASE",
963 "RELOC_SFA_OFF13",
964 "RELOC_BASE10",
965 "RELOC_BASE13",
966 "RELOC_BASE22",
967 "RELOC_PC10",
968 "RELOC_PC22",
969 "RELOC_JMP_TBL",
970 "RELOC_SEGOFF16",
971 "RELOC_GLOB_DAT",
972 "RELOC_JMP_SLOT",
973 "RELOC_RELATIVE",
974 "NO_RELOC"
975 };
976
977 if (insn->error)
978 {
979 fprintf (stderr, "ERROR: %s\n");
980 }
981 fprintf (stderr, "opcode=0x%08x\n", insn->opcode);
982 fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]);
983 fprintf (stderr, "exp = {\n");
984 fprintf (stderr, "\t\tX_add_symbol = %s\n",
985 insn->exp.X_add_symbol ?
986 (S_GET_NAME (insn->exp.X_add_symbol) ?
987 S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0");
988 fprintf (stderr, "\t\tX_op_symbol = %s\n",
989 insn->exp.X_op_symbol ?
990 (S_GET_NAME (insn->exp.X_op_symbol) ?
991 S_GET_NAME (insn->exp.X_op_symbol) : "???") : "0");
992 fprintf (stderr, "\t\tX_add_number = %d\n",
993 insn->exp.X_add_number);
994 fprintf (stderr, "}\n");
995 }
996
997 #endif
998
999 /* Translate internal representation of relocation info to target format.
1000
1001 On sparc/29k: first 4 bytes are normal unsigned long address, next three
1002 bytes are index, most sig. byte first. Byte 7 is broken up with
1003 bit 7 as external, bits 6 & 5 unused, and the lower
1004 five bits as relocation type. Next 4 bytes are long addend. */
1005 /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
1006
1007 #ifdef OBJ_AOUT
1008
1009 void
1010 tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
1011 char *where;
1012 fixS *fixP;
1013 relax_addressT segment_address_in_file;
1014 {
1015 long r_symbolnum;
1016
1017 know (fixP->fx_r_type < NO_RELOC);
1018 know (fixP->fx_addsy != NULL);
1019
1020 md_number_to_chars (where,
1021 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
1022 4);
1023
1024 r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy)
1025 ? S_GET_TYPE (fixP->fx_addsy)
1026 : fixP->fx_addsy->sy_number);
1027
1028 where[4] = (r_symbolnum >> 16) & 0x0ff;
1029 where[5] = (r_symbolnum >> 8) & 0x0ff;
1030 where[6] = r_symbolnum & 0x0ff;
1031 where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F);
1032 /* Also easy */
1033 md_number_to_chars (&where[8], fixP->fx_addnumber, 4);
1034 }
1035
1036 #endif /* OBJ_AOUT */
1037 \f
1038 CONST char *md_shortopts = "";
1039 struct option md_longopts[] = {
1040 {NULL, no_argument, NULL, 0}
1041 };
1042 size_t md_longopts_size = sizeof (md_longopts);
1043
1044 int
1045 md_parse_option (c, arg)
1046 int c;
1047 char *arg;
1048 {
1049 return 0;
1050 }
1051
1052 void
1053 md_show_usage (stream)
1054 FILE *stream;
1055 {
1056 }
1057 \f
1058 /* This is called when a line is unrecognized. This is used to handle
1059 definitions of a29k style local labels. */
1060
1061 int
1062 a29k_unrecognized_line (c)
1063 int c;
1064 {
1065 int lab;
1066 char *s;
1067
1068 if (c != '$'
1069 || ! ISDIGIT (input_line_pointer[0]))
1070 return 0;
1071
1072 s = input_line_pointer;
1073
1074 lab = 0;
1075 while (ISDIGIT (*s))
1076 {
1077 lab = lab * 10 + *s - '0';
1078 ++s;
1079 }
1080
1081 if (*s != ':')
1082 {
1083 /* Not a label definition. */
1084 return 0;
1085 }
1086
1087 if (dollar_label_defined (lab))
1088 {
1089 as_bad (_("label \"$%d\" redefined"), lab);
1090 return 0;
1091 }
1092
1093 define_dollar_label (lab);
1094 colon (dollar_label_name (lab, 0));
1095 input_line_pointer = s + 1;
1096
1097 return 1;
1098 }
1099
1100 /* Default the values of symbols known that should be "predefined". We
1101 don't bother to predefine them unless you actually use one, since there
1102 are a lot of them. */
1103
1104 symbolS *
1105 md_undefined_symbol (name)
1106 char *name;
1107 {
1108 long regnum;
1109 char testbuf[5 + /*SLOP*/ 5];
1110
1111 if (name[0] == 'g' || name[0] == 'G'
1112 || name[0] == 'l' || name[0] == 'L'
1113 || name[0] == 's' || name[0] == 'S')
1114 {
1115 /* Perhaps a global or local register name */
1116 if (name[1] == 'r' || name[1] == 'R')
1117 {
1118 long maxreg;
1119
1120 /* Parse the number, make sure it has no extra zeroes or
1121 trailing chars. */
1122 regnum = atol (&name[2]);
1123
1124 if (name[0] == 's' || name[0] == 'S')
1125 maxreg = 255;
1126 else
1127 maxreg = 127;
1128 if (regnum > maxreg)
1129 return NULL;
1130
1131 sprintf (testbuf, "%ld", regnum);
1132 if (strcmp (testbuf, &name[2]) != 0)
1133 return NULL; /* gr007 or lr7foo or whatever */
1134
1135 /* We have a wiener! Define and return a new symbol for it. */
1136 if (name[0] == 'l' || name[0] == 'L')
1137 regnum += 128;
1138 else if (name[0] == 's' || name[0] == 'S')
1139 regnum += SREG;
1140 return (symbol_new (name, SEG_REGISTER, (valueT) regnum,
1141 &zero_address_frag));
1142 }
1143 }
1144
1145 return NULL;
1146 }
1147
1148 /* Parse an operand that is machine-specific. */
1149
1150 void
1151 md_operand (expressionP)
1152 expressionS *expressionP;
1153 {
1154
1155 if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%')
1156 {
1157 /* We have a numeric register expression. No biggy. */
1158 input_line_pointer += 2; /* Skip %% */
1159 (void) expression (expressionP);
1160 if (expressionP->X_op != O_constant
1161 || expressionP->X_add_number > 255)
1162 as_bad (_("Invalid expression after %%%%\n"));
1163 expressionP->X_op = O_register;
1164 }
1165 else if (input_line_pointer[0] == '&')
1166 {
1167 /* We are taking the 'address' of a register...this one is not
1168 in the manual, but it *is* in traps/fpsymbol.h! What they
1169 seem to want is the register number, as an absolute number. */
1170 input_line_pointer++; /* Skip & */
1171 (void) expression (expressionP);
1172 if (expressionP->X_op != O_register)
1173 as_bad (_("Invalid register in & expression"));
1174 else
1175 expressionP->X_op = O_constant;
1176 }
1177 else if (input_line_pointer[0] == '$'
1178 && ISDIGIT (input_line_pointer[1]))
1179 {
1180 long lab;
1181 char *name;
1182 symbolS *sym;
1183
1184 /* This is a local label. */
1185 ++input_line_pointer;
1186 lab = (long) get_absolute_expression ();
1187 if (dollar_label_defined (lab))
1188 {
1189 name = dollar_label_name (lab, 0);
1190 sym = symbol_find (name);
1191 }
1192 else
1193 {
1194 name = dollar_label_name (lab, 1);
1195 sym = symbol_find_or_make (name);
1196 }
1197
1198 expressionP->X_op = O_symbol;
1199 expressionP->X_add_symbol = sym;
1200 expressionP->X_add_number = 0;
1201 }
1202 else if (input_line_pointer[0] == '$')
1203 {
1204 char *s;
1205 char type;
1206 int fieldnum, fieldlimit;
1207 LITTLENUM_TYPE floatbuf[8];
1208
1209 /* $float(), $doubleN(), or $extendN() convert floating values
1210 to integers. */
1211
1212 s = input_line_pointer;
1213
1214 ++s;
1215
1216 fieldnum = 0;
1217 if (strncmp (s, "double", sizeof "double" - 1) == 0)
1218 {
1219 s += sizeof "double" - 1;
1220 type = 'd';
1221 fieldlimit = 2;
1222 }
1223 else if (strncmp (s, "float", sizeof "float" - 1) == 0)
1224 {
1225 s += sizeof "float" - 1;
1226 type = 'f';
1227 fieldlimit = 1;
1228 }
1229 else if (strncmp (s, "extend", sizeof "extend" - 1) == 0)
1230 {
1231 s += sizeof "extend" - 1;
1232 type = 'x';
1233 fieldlimit = 4;
1234 }
1235 else
1236 {
1237 return;
1238 }
1239
1240 if (ISDIGIT (*s))
1241 {
1242 fieldnum = *s - '0';
1243 ++s;
1244 }
1245 if (fieldnum >= fieldlimit)
1246 return;
1247
1248 SKIP_WHITESPACE ();
1249 if (*s != '(')
1250 return;
1251 ++s;
1252 SKIP_WHITESPACE ();
1253
1254 s = atof_ieee (s, type, floatbuf);
1255 if (s == NULL)
1256 return;
1257 s = s;
1258
1259 SKIP_WHITESPACE ();
1260 if (*s != ')')
1261 return;
1262 ++s;
1263 SKIP_WHITESPACE ();
1264
1265 input_line_pointer = s;
1266 expressionP->X_op = O_constant;
1267 expressionP->X_unsigned = 1;
1268 expressionP->X_add_number = ((floatbuf[fieldnum * 2]
1269 << LITTLENUM_NUMBER_OF_BITS)
1270 + floatbuf[fieldnum * 2 + 1]);
1271 }
1272 }
1273
1274 /* Round up a section size to the appropriate boundary. */
1275 valueT
1276 md_section_align (segment, size)
1277 segT segment;
1278 valueT size;
1279 {
1280 return size; /* Byte alignment is fine */
1281 }
1282
1283 /* Exactly what point is a PC-relative offset relative TO?
1284 On the 29000, they're relative to the address of the instruction,
1285 which we have set up as the address of the fixup too. */
1286 long
1287 md_pcrel_from (fixP)
1288 fixS *fixP;
1289 {
1290 return fixP->fx_where + fixP->fx_frag->fr_address;
1291 }
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