1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright (C) 1989, 93-98, 1999 Free Software Foundation, Inc.
3 Contributed by Carnegie Mellon University, 1993.
4 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
5 Modified by Ken Raeburn for gas-2.x and ECOFF support.
6 Modified by Richard Henderson for ELF support.
7 Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support.
9 This file is part of GAS, the GNU Assembler.
11 GAS is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
16 GAS is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with GAS; see the file COPYING. If not, write to the Free
23 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 * Mach Operating System
28 * Copyright (c) 1993 Carnegie Mellon University
29 * All Rights Reserved.
31 * Permission to use, copy, modify and distribute this software and its
32 * documentation is hereby granted, provided that both the copyright
33 * notice and this permission notice appear in all copies of the
34 * software, derivative works or modified versions, and any portions
35 * thereof, and that both notices appear in supporting documentation.
37 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
38 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
39 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
41 * Carnegie Mellon requests users of this software to return to
43 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
44 * School of Computer Science
45 * Carnegie Mellon University
46 * Pittsburgh PA 15213-3890
48 * any improvements or extensions that they make and grant Carnegie the
49 * rights to redistribute these changes.
56 #include "opcode/alpha.h"
59 #include "elf/alpha.h"
67 #define MAX_INSN_FIXUPS 2
68 #define MAX_INSN_ARGS 5
73 bfd_reloc_code_real_type reloc
;
80 struct alpha_fixup fixups
[MAX_INSN_FIXUPS
];
85 MACRO_EOA
= 1, MACRO_IR
, MACRO_PIR
, MACRO_CPIR
, MACRO_FPR
, MACRO_EXP
91 void (*emit
) PARAMS ((const expressionS
*, int, const PTR
));
93 enum alpha_macro_arg argsets
[16];
96 /* Two extra symbols we want to see in our input. This is a blatent
97 misuse of the expressionS.X_op field. */
99 #define O_pregister (O_max+1) /* O_register, but in parentheses */
100 #define O_cpregister (O_pregister+1) /* + a leading comma */
102 /* Macros for extracting the type and number of encoded register tokens */
104 #define is_ir_num(x) (((x) & 32) == 0)
105 #define is_fpr_num(x) (((x) & 32) != 0)
106 #define regno(x) ((x) & 31)
108 /* Something odd inherited from the old assembler */
110 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
111 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
113 /* Predicates for 16- and 32-bit ranges */
114 /* XXX: The non-shift version appears to trigger a compiler bug when
115 cross-assembling from x86 w/ gcc 2.7.2. */
118 #define range_signed_16(x) \
119 (((offsetT)(x) >> 15) == 0 || ((offsetT)(x) >> 15) == -1)
120 #define range_signed_32(x) \
121 (((offsetT)(x) >> 31) == 0 || ((offsetT)(x) >> 31) == -1)
123 #define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \
124 (offsetT)(x) <= (offsetT)0x7FFF)
125 #define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \
126 (offsetT)(x) <= (offsetT)0x7FFFFFFF)
129 /* Macros for sign extending from 16- and 32-bits. */
130 /* XXX: The cast macros will work on all the systems that I care about,
131 but really a predicate should be found to use the non-cast forms. */
134 #define sign_extend_16(x) ((short)(x))
135 #define sign_extend_32(x) ((int)(x))
137 #define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000)
138 #define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \
139 ^ 0x80000000) - 0x80000000)
142 /* Macros to build tokens */
144 #define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \
145 (t).X_op = O_register, \
146 (t).X_add_number = (r))
147 #define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \
148 (t).X_op = O_pregister, \
149 (t).X_add_number = (r))
150 #define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \
151 (t).X_op = O_cpregister, \
152 (t).X_add_number = (r))
153 #define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \
154 (t).X_op = O_register, \
155 (t).X_add_number = (r)+32)
156 #define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \
157 (t).X_op = O_symbol, \
158 (t).X_add_symbol = (s), \
159 (t).X_add_number = (a))
160 #define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \
161 (t).X_op = O_constant, \
162 (t).X_add_number = (n))
165 /* Prototypes for all local functions */
167 static int tokenize_arguments
PARAMS ((char *, expressionS
*, int));
168 static const struct alpha_opcode
*find_opcode_match
169 PARAMS ((const struct alpha_opcode
*, const expressionS
*, int *, int *));
170 static const struct alpha_macro
*find_macro_match
171 PARAMS ((const struct alpha_macro
*, const expressionS
*, int *));
172 static unsigned insert_operand
173 PARAMS ((unsigned, const struct alpha_operand
*, offsetT
, char *, unsigned));
174 static void assemble_insn
175 PARAMS ((const struct alpha_opcode
*, const expressionS
*, int,
176 struct alpha_insn
*));
177 static void emit_insn
PARAMS ((struct alpha_insn
*));
178 static void assemble_tokens_to_insn
179 PARAMS ((const char *, const expressionS
*, int, struct alpha_insn
*));
180 static void assemble_tokens
181 PARAMS ((const char *, const expressionS
*, int, int));
183 static int load_expression
184 PARAMS ((int, const expressionS
*, int *, expressionS
*));
186 static void emit_ldgp
PARAMS ((const expressionS
*, int, const PTR
));
187 static void emit_division
PARAMS ((const expressionS
*, int, const PTR
));
188 static void emit_lda
PARAMS ((const expressionS
*, int, const PTR
));
189 static void emit_ldah
PARAMS ((const expressionS
*, int, const PTR
));
190 static void emit_ir_load
PARAMS ((const expressionS
*, int, const PTR
));
191 static void emit_loadstore
PARAMS ((const expressionS
*, int, const PTR
));
192 static void emit_jsrjmp
PARAMS ((const expressionS
*, int, const PTR
));
193 static void emit_ldX
PARAMS ((const expressionS
*, int, const PTR
));
194 static void emit_ldXu
PARAMS ((const expressionS
*, int, const PTR
));
195 static void emit_uldX
PARAMS ((const expressionS
*, int, const PTR
));
196 static void emit_uldXu
PARAMS ((const expressionS
*, int, const PTR
));
197 static void emit_ldil
PARAMS ((const expressionS
*, int, const PTR
));
198 static void emit_stX
PARAMS ((const expressionS
*, int, const PTR
));
199 static void emit_ustX
PARAMS ((const expressionS
*, int, const PTR
));
200 static void emit_sextX
PARAMS ((const expressionS
*, int, const PTR
));
201 static void emit_retjcr
PARAMS ((const expressionS
*, int, const PTR
));
203 static void s_alpha_text
PARAMS ((int));
204 static void s_alpha_data
PARAMS ((int));
206 static void s_alpha_comm
PARAMS ((int));
207 static void s_alpha_rdata
PARAMS ((int));
210 static void s_alpha_sdata
PARAMS ((int));
213 static void s_alpha_section
PARAMS ((int));
214 static void s_alpha_ent
PARAMS ((int));
215 static void s_alpha_end
PARAMS ((int));
216 static void s_alpha_mask
PARAMS ((int));
217 static void s_alpha_frame
PARAMS ((int));
218 static void s_alpha_prologue
PARAMS ((int));
219 static void s_alpha_coff_wrapper
PARAMS ((int));
222 static void s_alpha_section
PARAMS ((int));
224 static void s_alpha_gprel32
PARAMS ((int));
225 static void s_alpha_float_cons
PARAMS ((int));
226 static void s_alpha_proc
PARAMS ((int));
227 static void s_alpha_set
PARAMS ((int));
228 static void s_alpha_base
PARAMS ((int));
229 static void s_alpha_align
PARAMS ((int));
230 static void s_alpha_stringer
PARAMS ((int));
231 static void s_alpha_space
PARAMS ((int));
233 static void create_literal_section
PARAMS ((const char *, segT
*, symbolS
**));
235 static void select_gp_value
PARAMS ((void));
237 static void alpha_align
PARAMS ((int, char *, symbolS
*, int));
240 /* Generic assembler global variables which must be defined by all
243 /* Characters which always start a comment. */
244 const char comment_chars
[] = "#";
246 /* Characters which start a comment at the beginning of a line. */
247 const char line_comment_chars
[] = "#";
249 /* Characters which may be used to separate multiple commands on a
251 const char line_separator_chars
[] = ";";
253 /* Characters which are used to indicate an exponent in a floating
255 const char EXP_CHARS
[] = "eE";
257 /* Characters which mean that a number is a floating point constant,
260 const char FLT_CHARS
[] = "dD";
262 /* XXX: Do all of these really get used on the alpha?? */
263 char FLT_CHARS
[] = "rRsSfFdDxXpP";
267 const char *md_shortopts
= "Fm:g+1h:HG:";
269 const char *md_shortopts
= "Fm:gG:";
272 struct option md_longopts
[] = {
273 #define OPTION_32ADDR (OPTION_MD_BASE)
274 { "32addr", no_argument
, NULL
, OPTION_32ADDR
},
275 #define OPTION_RELAX (OPTION_32ADDR+1)
276 { "relax", no_argument
, NULL
, OPTION_RELAX
},
278 #define OPTION_MDEBUG (OPTION_RELAX+1)
279 #define OPTION_NO_MDEBUG (OPTION_MDEBUG+1)
280 { "mdebug", no_argument
, NULL
, OPTION_MDEBUG
},
281 { "no-mdebug", no_argument
, NULL
, OPTION_NO_MDEBUG
},
283 { NULL
, no_argument
, NULL
, 0 }
286 size_t md_longopts_size
= sizeof(md_longopts
);
291 #define AXP_REG_R16 16
292 #define AXP_REG_R17 17
294 #define AXP_REG_T9 22
296 #define AXP_REG_T10 23
298 #define AXP_REG_T11 24
300 #define AXP_REG_T12 25
301 #define AXP_REG_AI 25
303 #define AXP_REG_FP 29
306 #define AXP_REG_GP AXP_REG_PV
307 #endif /* OBJ_EVAX */
309 /* The cpu for which we are generating code */
310 static unsigned alpha_target
= AXP_OPCODE_BASE
;
311 static const char *alpha_target_name
= "<all>";
313 /* The hash table of instruction opcodes */
314 static struct hash_control
*alpha_opcode_hash
;
316 /* The hash table of macro opcodes */
317 static struct hash_control
*alpha_macro_hash
;
320 /* The $gp relocation symbol */
321 static symbolS
*alpha_gp_symbol
;
323 /* XXX: what is this, and why is it exported? */
324 valueT alpha_gp_value
;
327 /* The current $gp register */
328 static int alpha_gp_register
= AXP_REG_GP
;
330 /* A table of the register symbols */
331 static symbolS
*alpha_register_table
[64];
333 /* Constant sections, or sections of constants */
335 static segT alpha_lita_section
;
336 static segT alpha_lit4_section
;
339 static segT alpha_link_section
;
340 static segT alpha_ctors_section
;
341 static segT alpha_dtors_section
;
343 static segT alpha_lit8_section
;
345 /* Symbols referring to said sections. */
347 static symbolS
*alpha_lita_symbol
;
348 static symbolS
*alpha_lit4_symbol
;
351 static symbolS
*alpha_link_symbol
;
352 static symbolS
*alpha_ctors_symbol
;
353 static symbolS
*alpha_dtors_symbol
;
355 static symbolS
*alpha_lit8_symbol
;
357 /* Literal for .litX+0x8000 within .lita */
359 static offsetT alpha_lit4_literal
;
360 static offsetT alpha_lit8_literal
;
363 /* The active .ent symbol. */
365 static symbolS
*alpha_cur_ent_sym
;
368 /* Is the assembler not allowed to use $at? */
369 static int alpha_noat_on
= 0;
371 /* Are macros enabled? */
372 static int alpha_macros_on
= 1;
374 /* Are floats disabled? */
375 static int alpha_nofloats_on
= 0;
377 /* Are addresses 32 bit? */
378 static int alpha_addr32_on
= 0;
380 /* Symbol labelling the current insn. When the Alpha gas sees
383 and the section happens to not be on an eight byte boundary, it
384 will align both the symbol and the .quad to an eight byte boundary. */
385 static symbolS
*alpha_insn_label
;
387 /* Whether we should automatically align data generation pseudo-ops.
388 .align 0 will turn this off. */
389 static int alpha_auto_align_on
= 1;
391 /* The known current alignment of the current section. */
392 static int alpha_current_align
;
394 /* These are exported to ECOFF code. */
395 unsigned long alpha_gprmask
, alpha_fprmask
;
397 /* Whether the debugging option was seen. */
398 static int alpha_debug
;
401 /* Whether we are emitting an mdebug section. */
402 int alpha_flag_mdebug
= 1;
405 /* Don't fully resolve relocations, allowing code movement in the linker. */
406 static int alpha_flag_relax
;
408 /* What value to give to bfd_set_gp_size. */
409 static int g_switch_value
= 8;
412 /* Collect information about current procedure here. */
414 symbolS
*symbol
; /* proc pdesc symbol */
416 int framereg
; /* register for frame pointer */
417 int framesize
; /* size of frame */
427 static int alpha_flag_hash_long_names
= 0; /* -+ */
428 static int alpha_flag_show_after_trunc
= 0; /* -H */
430 /* If the -+ switch is given, then a hash is appended to any name that is
431 * longer than 64 characters, else longer symbol names are truncated.
436 /* A table of CPU names and opcode sets. */
438 static const struct cpu_type
444 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
445 This supports usage under DU 4.0b that does ".arch ev4", and
446 usage in MILO that does -m21064. Probably something more
447 specific like -m21064-pal should be used, but oh well. */
449 { "21064", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
450 { "21064a", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
451 { "21066", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
452 { "21068", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
453 { "21164", AXP_OPCODE_BASE
|AXP_OPCODE_EV5
},
454 { "21164a", AXP_OPCODE_BASE
|AXP_OPCODE_EV5
|AXP_OPCODE_BWX
},
455 { "21164pc", (AXP_OPCODE_BASE
|AXP_OPCODE_EV5
|AXP_OPCODE_BWX
457 { "21264", (AXP_OPCODE_BASE
|AXP_OPCODE_EV6
|AXP_OPCODE_BWX
458 |AXP_OPCODE_MAX
|AXP_OPCODE_CIX
) },
460 { "ev4", AXP_OPCODE_BASE
},
461 { "ev45", AXP_OPCODE_BASE
},
462 { "lca45", AXP_OPCODE_BASE
},
463 { "ev5", AXP_OPCODE_BASE
},
464 { "ev56", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
},
465 { "pca56", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
},
466 { "ev6", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
|AXP_OPCODE_CIX
},
468 { "all", AXP_OPCODE_BASE
},
472 /* The macro table */
474 static const struct alpha_macro alpha_macros
[] = {
475 /* Load/Store macros */
476 { "lda", emit_lda
, NULL
,
477 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
478 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
479 { "ldah", emit_ldah
, NULL
,
480 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
482 { "ldl", emit_ir_load
, "ldl",
483 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
484 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
485 { "ldl_l", emit_ir_load
, "ldl_l",
486 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
487 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
488 { "ldq", emit_ir_load
, "ldq",
489 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
490 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
491 { "ldq_l", emit_ir_load
, "ldq_l",
492 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
493 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
494 { "ldq_u", emit_ir_load
, "ldq_u",
495 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
496 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
497 { "ldf", emit_loadstore
, "ldf",
498 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
499 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
500 { "ldg", emit_loadstore
, "ldg",
501 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
502 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
503 { "lds", emit_loadstore
, "lds",
504 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
505 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
506 { "ldt", emit_loadstore
, "ldt",
507 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
508 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
510 { "ldb", emit_ldX
, (PTR
)0,
511 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
512 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
513 { "ldbu", emit_ldXu
, (PTR
)0,
514 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
515 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
516 { "ldw", emit_ldX
, (PTR
)1,
517 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
518 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
519 { "ldwu", emit_ldXu
, (PTR
)1,
520 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
521 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
523 { "uldw", emit_uldX
, (PTR
)1,
524 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
525 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
526 { "uldwu", emit_uldXu
, (PTR
)1,
527 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
528 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
529 { "uldl", emit_uldX
, (PTR
)2,
530 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
531 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
532 { "uldlu", emit_uldXu
, (PTR
)2,
533 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
534 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
535 { "uldq", emit_uldXu
, (PTR
)3,
536 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
537 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
539 { "ldgp", emit_ldgp
, NULL
,
540 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
} },
542 { "ldi", emit_lda
, NULL
,
543 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
544 { "ldil", emit_ldil
, NULL
,
545 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
546 { "ldiq", emit_lda
, NULL
,
547 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
549 { "ldif" emit_ldiq
, NULL
,
550 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
551 { "ldid" emit_ldiq
, NULL
,
552 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
553 { "ldig" emit_ldiq
, NULL
,
554 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
555 { "ldis" emit_ldiq
, NULL
,
556 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
557 { "ldit" emit_ldiq
, NULL
,
558 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
561 { "stl", emit_loadstore
, "stl",
562 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
563 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
564 { "stl_c", emit_loadstore
, "stl_c",
565 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
566 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
567 { "stq", emit_loadstore
, "stq",
568 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
569 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
570 { "stq_c", emit_loadstore
, "stq_c",
571 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
572 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
573 { "stq_u", emit_loadstore
, "stq_u",
574 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
575 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
576 { "stf", emit_loadstore
, "stf",
577 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
578 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
579 { "stg", emit_loadstore
, "stg",
580 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
581 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
582 { "sts", emit_loadstore
, "sts",
583 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
584 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
585 { "stt", emit_loadstore
, "stt",
586 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
587 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
589 { "stb", emit_stX
, (PTR
)0,
590 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
591 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
592 { "stw", emit_stX
, (PTR
)1,
593 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
594 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
595 { "ustw", emit_ustX
, (PTR
)1,
596 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
597 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
598 { "ustl", emit_ustX
, (PTR
)2,
599 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
600 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
601 { "ustq", emit_ustX
, (PTR
)3,
602 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
603 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
605 /* Arithmetic macros */
607 { "absl" emit_absl
, 1, { IR
} },
608 { "absl" emit_absl
, 2, { IR
, IR
} },
609 { "absl" emit_absl
, 2, { EXP
, IR
} },
610 { "absq" emit_absq
, 1, { IR
} },
611 { "absq" emit_absq
, 2, { IR
, IR
} },
612 { "absq" emit_absq
, 2, { EXP
, IR
} },
615 { "sextb", emit_sextX
, (PTR
)0,
616 { MACRO_IR
, MACRO_IR
, MACRO_EOA
,
618 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
619 { "sextw", emit_sextX
, (PTR
)1,
620 { MACRO_IR
, MACRO_IR
, MACRO_EOA
,
622 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
624 { "divl", emit_division
, "__divl",
625 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
626 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
627 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
628 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
629 { "divlu", emit_division
, "__divlu",
630 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
631 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
632 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
633 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
634 { "divq", emit_division
, "__divq",
635 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
636 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
637 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
638 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
639 { "divqu", emit_division
, "__divqu",
640 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
641 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
642 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
643 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
644 { "reml", emit_division
, "__reml",
645 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
646 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
647 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
648 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
649 { "remlu", emit_division
, "__remlu",
650 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
651 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
652 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
653 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
654 { "remq", emit_division
, "__remq",
655 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
656 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
657 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
658 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
659 { "remqu", emit_division
, "__remqu",
660 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
661 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
662 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
663 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
665 { "jsr", emit_jsrjmp
, "jsr",
666 { MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
667 MACRO_PIR
, MACRO_EOA
,
668 MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
669 MACRO_EXP
, MACRO_EOA
} },
670 { "jmp", emit_jsrjmp
, "jmp",
671 { MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
672 MACRO_PIR
, MACRO_EOA
,
673 MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
674 MACRO_EXP
, MACRO_EOA
} },
675 { "ret", emit_retjcr
, "ret",
676 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
678 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
679 MACRO_PIR
, MACRO_EOA
,
680 MACRO_EXP
, MACRO_EOA
,
682 { "jcr", emit_retjcr
, "jcr",
683 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
685 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
686 MACRO_PIR
, MACRO_EOA
,
687 MACRO_EXP
, MACRO_EOA
,
689 { "jsr_coroutine", emit_retjcr
, "jcr",
690 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
692 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
693 MACRO_PIR
, MACRO_EOA
,
694 MACRO_EXP
, MACRO_EOA
,
698 static const int alpha_num_macros
699 = sizeof(alpha_macros
) / sizeof(*alpha_macros
);
701 /* Public interface functions */
703 /* This function is called once, at assembler startup time. It sets
704 up all the tables, etc. that the MD part of the assembler will
705 need, that can be determined before arguments are parsed. */
712 /* Create the opcode hash table */
714 alpha_opcode_hash
= hash_new ();
715 for (i
= 0; i
< alpha_num_opcodes
; )
717 const char *name
, *retval
, *slash
;
719 name
= alpha_opcodes
[i
].name
;
720 retval
= hash_insert (alpha_opcode_hash
, name
, (PTR
)&alpha_opcodes
[i
]);
722 as_fatal (_("internal error: can't hash opcode `%s': %s"), name
, retval
);
724 /* Some opcodes include modifiers of various sorts with a "/mod"
725 syntax, like the architecture manual suggests. However, for
726 use with gcc at least, we also need access to those same opcodes
729 if ((slash
= strchr (name
, '/')) != NULL
)
731 char *p
= xmalloc (strlen (name
));
732 memcpy (p
, name
, slash
- name
);
733 strcpy (p
+ (slash
- name
), slash
+ 1);
735 (void)hash_insert(alpha_opcode_hash
, p
, (PTR
)&alpha_opcodes
[i
]);
736 /* Ignore failures -- the opcode table does duplicate some
737 variants in different forms, like "hw_stq" and "hw_st/q". */
740 while (++i
< alpha_num_opcodes
741 && (alpha_opcodes
[i
].name
== name
742 || !strcmp (alpha_opcodes
[i
].name
, name
)))
746 /* Create the macro hash table */
748 alpha_macro_hash
= hash_new ();
749 for (i
= 0; i
< alpha_num_macros
; )
751 const char *name
, *retval
;
753 name
= alpha_macros
[i
].name
;
754 retval
= hash_insert (alpha_macro_hash
, name
, (PTR
)&alpha_macros
[i
]);
756 as_fatal (_("internal error: can't hash macro `%s': %s"), name
, retval
);
758 while (++i
< alpha_num_macros
759 && (alpha_macros
[i
].name
== name
760 || !strcmp (alpha_macros
[i
].name
, name
)))
764 /* Construct symbols for each of the registers */
766 for (i
= 0; i
< 32; ++i
)
769 sprintf(name
, "$%d", i
);
770 alpha_register_table
[i
] = symbol_create(name
, reg_section
, i
,
776 sprintf(name
, "$f%d", i
-32);
777 alpha_register_table
[i
] = symbol_create(name
, reg_section
, i
,
781 /* Create the special symbols and sections we'll be using */
783 /* So .sbss will get used for tiny objects. */
784 bfd_set_gp_size (stdoutput
, g_switch_value
);
787 create_literal_section (".lita", &alpha_lita_section
, &alpha_lita_symbol
);
789 /* For handling the GP, create a symbol that won't be output in the
790 symbol table. We'll edit it out of relocs later. */
791 alpha_gp_symbol
= symbol_create ("<GP value>", alpha_lita_section
, 0x8000,
796 create_literal_section (".link", &alpha_link_section
, &alpha_link_symbol
);
802 segT sec
= subseg_new(".mdebug", (subsegT
)0);
803 bfd_set_section_flags(stdoutput
, sec
, SEC_HAS_CONTENTS
|SEC_READONLY
);
804 bfd_set_section_alignment(stdoutput
, sec
, 3);
808 subseg_set(text_section
, 0);
811 /* The public interface to the instruction assembler. */
817 char opname
[32]; /* current maximum is 13 */
818 expressionS tok
[MAX_INSN_ARGS
];
819 int ntok
, opnamelen
, trunclen
;
821 /* split off the opcode */
822 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/468");
823 trunclen
= (opnamelen
< sizeof (opname
) - 1
825 : sizeof (opname
) - 1);
826 memcpy (opname
, str
, trunclen
);
827 opname
[trunclen
] = '\0';
829 /* tokenize the rest of the line */
830 if ((ntok
= tokenize_arguments (str
+ opnamelen
, tok
, MAX_INSN_ARGS
)) < 0)
832 as_bad (_("syntax error"));
837 assemble_tokens (opname
, tok
, ntok
, alpha_macros_on
);
840 /* Round up a section's size to the appropriate boundary. */
843 md_section_align (seg
, size
)
847 int align
= bfd_get_section_alignment(stdoutput
, seg
);
848 valueT mask
= ((valueT
)1 << align
) - 1;
850 return (size
+ mask
) & ~mask
;
853 /* Turn a string in input_line_pointer into a floating point constant
854 of type type, and store the appropriate bytes in *litP. The number
855 of LITTLENUMS emitted is stored in *sizeP. An error message is
856 returned, or NULL on OK. */
858 /* Equal to MAX_PRECISION in atof-ieee.c */
859 #define MAX_LITTLENUMS 6
861 extern char *vax_md_atof
PARAMS ((int, char *, int *));
864 md_atof (type
, litP
, sizeP
)
870 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
871 LITTLENUM_TYPE
*wordP
;
878 /* VAX md_atof doesn't like "G" for some reason. */
882 return vax_md_atof (type
, litP
, sizeP
);
905 return _("Bad call to MD_ATOF()");
907 t
= atof_ieee (input_line_pointer
, type
, words
);
909 input_line_pointer
= t
;
910 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
912 for (wordP
= words
+ prec
- 1; prec
--;)
914 md_number_to_chars (litP
, (long) (*wordP
--), sizeof (LITTLENUM_TYPE
));
915 litP
+= sizeof (LITTLENUM_TYPE
);
921 /* Take care of the target-specific command-line options. */
924 md_parse_option (c
, arg
)
931 alpha_nofloats_on
= 1;
943 g_switch_value
= atoi(arg
);
948 const struct cpu_type
*p
;
949 for (p
= cpu_types
; p
->name
; ++p
)
950 if (strcmp(arg
, p
->name
) == 0)
952 alpha_target_name
= p
->name
, alpha_target
= p
->flags
;
955 as_warn(_("Unknown CPU identifier `%s'"), arg
);
961 case '+': /* For g++. Hash any name > 63 chars long. */
962 alpha_flag_hash_long_names
= 1;
965 case 'H': /* Show new symbol after hash truncation */
966 alpha_flag_show_after_trunc
= 1;
969 case 'h': /* for gnu-c/vax compatibility. */
974 alpha_flag_relax
= 1;
979 alpha_flag_mdebug
= 1;
981 case OPTION_NO_MDEBUG
:
982 alpha_flag_mdebug
= 0;
993 /* Print a description of the command-line options that we accept. */
996 md_show_usage (stream
)
1001 -32addr treat addresses as 32-bit values\n\
1002 -F lack floating point instructions support\n\
1003 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mall\n\
1004 specify variant of Alpha architecture\n\
1005 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264\n\
1006 these variants include PALcode opcodes\n"),
1011 -+ hash encode (don't truncate) names longer than 64 characters\n\
1012 -H show new symbol after hash truncation\n"),
1017 /* Decide from what point a pc-relative relocation is relative to,
1018 relative to the pc-relative fixup. Er, relatively speaking. */
1021 md_pcrel_from (fixP
)
1024 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1025 switch (fixP
->fx_r_type
)
1027 case BFD_RELOC_ALPHA_GPDISP
:
1028 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1029 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1032 return fixP
->fx_size
+ addr
;
1036 /* Attempt to simplify or even eliminate a fixup. The return value is
1037 ignored; perhaps it was once meaningful, but now it is historical.
1038 To indicate that a fixup has been eliminated, set fixP->fx_done.
1040 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1041 internally into the GPDISP reloc used externally. We had to do
1042 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1043 the distance to the "lda" instruction for setting the addend to
1047 md_apply_fix (fixP
, valueP
)
1051 char * const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1052 valueT value
= *valueP
;
1053 unsigned image
, size
;
1055 switch (fixP
->fx_r_type
)
1057 /* The GPDISP relocations are processed internally with a symbol
1058 referring to the current function; we need to drop in a value
1059 which, when added to the address of the start of the function,
1060 gives the desired GP. */
1061 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1063 fixS
*next
= fixP
->fx_next
;
1064 assert (next
->fx_r_type
== BFD_RELOC_ALPHA_GPDISP_LO16
);
1066 fixP
->fx_offset
= (next
->fx_frag
->fr_address
+ next
->fx_where
1067 - fixP
->fx_frag
->fr_address
- fixP
->fx_where
);
1069 value
= (value
- sign_extend_16 (value
)) >> 16;
1072 fixP
->fx_r_type
= BFD_RELOC_ALPHA_GPDISP
;
1076 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1077 value
= sign_extend_16 (value
);
1078 fixP
->fx_offset
= 0;
1084 fixP
->fx_addsy
= section_symbol (now_seg
);
1085 md_number_to_chars (fixpos
, value
, 2);
1090 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
1095 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
1100 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
1103 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1105 md_number_to_chars (fixpos
, value
, size
);
1111 case BFD_RELOC_GPREL32
:
1112 assert (fixP
->fx_subsy
== alpha_gp_symbol
);
1114 /* FIXME: inherited this obliviousness of `value' -- why? */
1115 md_number_to_chars (fixpos
, -alpha_gp_value
, 4);
1119 case BFD_RELOC_GPREL32
:
1123 case BFD_RELOC_23_PCREL_S2
:
1124 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1126 image
= bfd_getl32(fixpos
);
1127 image
= (image
& ~0x1FFFFF) | ((value
>> 2) & 0x1FFFFF);
1132 case BFD_RELOC_ALPHA_HINT
:
1133 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1135 image
= bfd_getl32(fixpos
);
1136 image
= (image
& ~0x3FFF) | ((value
>> 2) & 0x3FFF);
1142 case BFD_RELOC_ALPHA_LITERAL
:
1143 md_number_to_chars (fixpos
, value
, 2);
1146 case BFD_RELOC_ALPHA_LITUSE
:
1150 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1151 case BFD_RELOC_ALPHA_LITUSE
:
1155 case BFD_RELOC_ALPHA_LINKAGE
:
1156 case BFD_RELOC_ALPHA_CODEADDR
:
1162 const struct alpha_operand
*operand
;
1164 if ((int)fixP
->fx_r_type
>= 0)
1165 as_fatal (_("unhandled relocation type %s"),
1166 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1168 assert (-(int)fixP
->fx_r_type
< alpha_num_operands
);
1169 operand
= &alpha_operands
[-(int)fixP
->fx_r_type
];
1171 /* The rest of these fixups only exist internally during symbol
1172 resolution and have no representation in the object file.
1173 Therefore they must be completely resolved as constants. */
1175 if (fixP
->fx_addsy
!= 0
1176 && S_GET_SEGMENT (fixP
->fx_addsy
) != absolute_section
)
1177 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1178 _("non-absolute expression in constant field"));
1180 image
= bfd_getl32(fixpos
);
1181 image
= insert_operand(image
, operand
, (offsetT
)value
,
1182 fixP
->fx_file
, fixP
->fx_line
);
1187 if (fixP
->fx_addsy
!= 0 || fixP
->fx_pcrel
!= 0)
1191 as_warn_where(fixP
->fx_file
, fixP
->fx_line
,
1192 _("type %d reloc done?\n"), (int)fixP
->fx_r_type
);
1197 md_number_to_chars(fixpos
, image
, 4);
1205 * Look for a register name in the given symbol.
1209 md_undefined_symbol(name
)
1214 int is_float
= 0, num
;
1219 if (name
[1] == 'p' && name
[2] == '\0')
1220 return alpha_register_table
[AXP_REG_FP
];
1225 if (!isdigit(*++name
))
1229 case '0': case '1': case '2': case '3': case '4':
1230 case '5': case '6': case '7': case '8': case '9':
1231 if (name
[1] == '\0')
1232 num
= name
[0] - '0';
1233 else if (name
[0] != '0' && isdigit(name
[1]) && name
[2] == '\0')
1235 num
= (name
[0] - '0') * 10 + name
[1] - '0';
1242 if (!alpha_noat_on
&& num
== AXP_REG_AT
)
1243 as_warn(_("Used $at without \".set noat\""));
1244 return alpha_register_table
[num
+ is_float
];
1247 if (name
[1] == 't' && name
[2] == '\0')
1250 as_warn(_("Used $at without \".set noat\""));
1251 return alpha_register_table
[AXP_REG_AT
];
1256 if (name
[1] == 'p' && name
[2] == '\0')
1257 return alpha_register_table
[alpha_gp_register
];
1261 if (name
[1] == 'p' && name
[2] == '\0')
1262 return alpha_register_table
[AXP_REG_SP
];
1270 /* @@@ Magic ECOFF bits. */
1273 alpha_frob_ecoff_data ()
1276 /* $zero and $f31 are read-only */
1277 alpha_gprmask
&= ~1;
1278 alpha_fprmask
&= ~1;
1282 /* Hook to remember a recently defined label so that the auto-align
1283 code can adjust the symbol after we know what alignment will be
1287 alpha_define_label (sym
)
1290 alpha_insn_label
= sym
;
1293 /* Return true if we must always emit a reloc for a type and false if
1294 there is some hope of resolving it a assembly time. */
1297 alpha_force_relocation (f
)
1300 if (alpha_flag_relax
)
1303 switch (f
->fx_r_type
)
1305 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1306 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1307 case BFD_RELOC_ALPHA_GPDISP
:
1309 case BFD_RELOC_ALPHA_LITERAL
:
1312 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1314 case BFD_RELOC_ALPHA_LITUSE
:
1315 case BFD_RELOC_GPREL32
:
1317 case BFD_RELOC_ALPHA_LINKAGE
:
1318 case BFD_RELOC_ALPHA_CODEADDR
:
1322 case BFD_RELOC_23_PCREL_S2
:
1325 case BFD_RELOC_ALPHA_HINT
:
1329 assert((int)f
->fx_r_type
< 0 && -(int)f
->fx_r_type
< alpha_num_operands
);
1334 /* Return true if we can partially resolve a relocation now. */
1337 alpha_fix_adjustable (f
)
1341 /* Prevent all adjustments to global symbols */
1342 if (S_IS_EXTERN (f
->fx_addsy
) || S_IS_WEAK (f
->fx_addsy
))
1346 /* Are there any relocation types for which we must generate a reloc
1347 but we can adjust the values contained within it? */
1348 switch (f
->fx_r_type
)
1350 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1351 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1352 case BFD_RELOC_ALPHA_GPDISP
:
1356 case BFD_RELOC_ALPHA_LITERAL
:
1359 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1362 case BFD_RELOC_ALPHA_LINKAGE
:
1363 case BFD_RELOC_ALPHA_CODEADDR
:
1367 case BFD_RELOC_ALPHA_LITUSE
:
1370 case BFD_RELOC_GPREL32
:
1371 case BFD_RELOC_23_PCREL_S2
:
1374 case BFD_RELOC_ALPHA_HINT
:
1378 assert ((int)f
->fx_r_type
< 0
1379 && - (int)f
->fx_r_type
< alpha_num_operands
);
1385 /* Generate the BFD reloc to be stuck in the object file from the
1386 fixup used internally in the assembler. */
1389 tc_gen_reloc (sec
, fixp
)
1395 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1396 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
1397 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1398 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1400 /* Make sure none of our internal relocations make it this far.
1401 They'd better have been fully resolved by this point. */
1402 assert ((int)fixp
->fx_r_type
> 0);
1404 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1405 if (reloc
->howto
== NULL
)
1407 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1408 _("cannot represent `%s' relocation in object file"),
1409 bfd_get_reloc_code_name (fixp
->fx_r_type
));
1413 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
1415 as_fatal (_("internal error? cannot generate `%s' relocation"),
1416 bfd_get_reloc_code_name (fixp
->fx_r_type
));
1418 assert (!fixp
->fx_pcrel
== !reloc
->howto
->pc_relative
);
1421 if (fixp
->fx_r_type
== BFD_RELOC_ALPHA_LITERAL
)
1423 /* fake out bfd_perform_relocation. sigh */
1424 reloc
->addend
= -alpha_gp_value
;
1429 reloc
->addend
= fixp
->fx_offset
;
1432 * Ohhh, this is ugly. The problem is that if this is a local global
1433 * symbol, the relocation will entirely be performed at link time, not
1434 * at assembly time. bfd_perform_reloc doesn't know about this sort
1435 * of thing, and as a result we need to fake it out here.
1437 if ((S_IS_EXTERN (fixp
->fx_addsy
) || S_IS_WEAK (fixp
->fx_addsy
))
1438 && !S_IS_COMMON(fixp
->fx_addsy
))
1439 reloc
->addend
-= symbol_get_bfdsym (fixp
->fx_addsy
)->value
;
1446 /* Parse a register name off of the input_line and return a register
1447 number. Gets md_undefined_symbol above to do the register name
1450 Only called as a part of processing the ECOFF .frame directive. */
1453 tc_get_register (frame
)
1456 int framereg
= AXP_REG_SP
;
1459 if (*input_line_pointer
== '$')
1461 char *s
= input_line_pointer
;
1462 char c
= get_symbol_end ();
1463 symbolS
*sym
= md_undefined_symbol (s
);
1465 *strchr(s
, '\0') = c
;
1466 if (sym
&& (framereg
= S_GET_VALUE (sym
)) <= 31)
1469 as_warn (_("frame reg expected, using $%d."), framereg
);
1472 note_gpreg (framereg
);
1476 /* This is called before the symbol table is processed. In order to
1477 work with gcc when using mips-tfile, we must keep all local labels.
1478 However, in other cases, we want to discard them. If we were
1479 called with -g, but we didn't see any debugging information, it may
1480 mean that gcc is smuggling debugging information through to
1481 mips-tfile, in which case we must generate all local labels. */
1486 alpha_frob_file_before_adjust ()
1488 if (alpha_debug
!= 0
1489 && ! ecoff_debugging_seen
)
1490 flag_keep_locals
= 1;
1493 #endif /* OBJ_ECOFF */
1495 /* Parse the arguments to an opcode. */
1498 tokenize_arguments (str
, tok
, ntok
)
1503 expressionS
*end_tok
= tok
+ ntok
;
1504 char *old_input_line_pointer
;
1505 int saw_comma
= 0, saw_arg
= 0;
1507 memset (tok
, 0, sizeof (*tok
) * ntok
);
1509 /* Save and restore input_line_pointer around this function */
1510 old_input_line_pointer
= input_line_pointer
;
1511 input_line_pointer
= str
;
1513 while (tok
< end_tok
&& *input_line_pointer
)
1516 switch (*input_line_pointer
)
1522 ++input_line_pointer
;
1523 if (saw_comma
|| !saw_arg
)
1530 char *hold
= input_line_pointer
++;
1532 /* First try for parenthesized register ... */
1534 if (*input_line_pointer
== ')' && tok
->X_op
== O_register
)
1536 tok
->X_op
= (saw_comma
? O_cpregister
: O_pregister
);
1539 ++input_line_pointer
;
1544 /* ... then fall through to plain expression */
1545 input_line_pointer
= hold
;
1549 if (saw_arg
&& !saw_comma
)
1552 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
1565 input_line_pointer
= old_input_line_pointer
;
1566 return ntok
- (end_tok
- tok
);
1569 input_line_pointer
= old_input_line_pointer
;
1573 /* Search forward through all variants of an opcode looking for a
1576 static const struct alpha_opcode
*
1577 find_opcode_match(first_opcode
, tok
, pntok
, pcpumatch
)
1578 const struct alpha_opcode
*first_opcode
;
1579 const expressionS
*tok
;
1583 const struct alpha_opcode
*opcode
= first_opcode
;
1585 int got_cpu_match
= 0;
1589 const unsigned char *opidx
;
1592 /* Don't match opcodes that don't exist on this architecture */
1593 if (!(opcode
->flags
& alpha_target
))
1598 for (opidx
= opcode
->operands
; *opidx
; ++opidx
)
1600 const struct alpha_operand
*operand
= &alpha_operands
[*opidx
];
1602 /* only take input from real operands */
1603 if (operand
->flags
& AXP_OPERAND_FAKE
)
1606 /* when we expect input, make sure we have it */
1609 if ((operand
->flags
& AXP_OPERAND_OPTIONAL_MASK
) == 0)
1614 /* match operand type with expression type */
1615 switch (operand
->flags
& AXP_OPERAND_TYPECHECK_MASK
)
1617 case AXP_OPERAND_IR
:
1618 if (tok
[tokidx
].X_op
!= O_register
1619 || !is_ir_num(tok
[tokidx
].X_add_number
))
1622 case AXP_OPERAND_FPR
:
1623 if (tok
[tokidx
].X_op
!= O_register
1624 || !is_fpr_num(tok
[tokidx
].X_add_number
))
1627 case AXP_OPERAND_IR
|AXP_OPERAND_PARENS
:
1628 if (tok
[tokidx
].X_op
!= O_pregister
1629 || !is_ir_num(tok
[tokidx
].X_add_number
))
1632 case AXP_OPERAND_IR
|AXP_OPERAND_PARENS
|AXP_OPERAND_COMMA
:
1633 if (tok
[tokidx
].X_op
!= O_cpregister
1634 || !is_ir_num(tok
[tokidx
].X_add_number
))
1638 case AXP_OPERAND_RELATIVE
:
1639 case AXP_OPERAND_SIGNED
:
1640 case AXP_OPERAND_UNSIGNED
:
1641 switch (tok
[tokidx
].X_op
)
1656 /* everything else should have been fake */
1662 /* possible match -- did we use all of our input? */
1671 while (++opcode
-alpha_opcodes
< alpha_num_opcodes
1672 && !strcmp(opcode
->name
, first_opcode
->name
));
1675 *pcpumatch
= got_cpu_match
;
1680 /* Search forward through all variants of a macro looking for a syntax
1683 static const struct alpha_macro
*
1684 find_macro_match(first_macro
, tok
, pntok
)
1685 const struct alpha_macro
*first_macro
;
1686 const expressionS
*tok
;
1689 const struct alpha_macro
*macro
= first_macro
;
1694 const enum alpha_macro_arg
*arg
= macro
->argsets
;
1709 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_register
1710 || !is_ir_num(tok
[tokidx
].X_add_number
))
1715 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_pregister
1716 || !is_ir_num(tok
[tokidx
].X_add_number
))
1721 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_cpregister
1722 || !is_ir_num(tok
[tokidx
].X_add_number
))
1727 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_register
1728 || !is_fpr_num(tok
[tokidx
].X_add_number
))
1736 switch (tok
[tokidx
].X_op
)
1752 while (*arg
!= MACRO_EOA
)
1760 while (++macro
-alpha_macros
< alpha_num_macros
1761 && !strcmp(macro
->name
, first_macro
->name
));
1766 /* Insert an operand value into an instruction. */
1769 insert_operand(insn
, operand
, val
, file
, line
)
1771 const struct alpha_operand
*operand
;
1776 if (operand
->bits
!= 32 && !(operand
->flags
& AXP_OPERAND_NOOVERFLOW
))
1780 if (operand
->flags
& AXP_OPERAND_SIGNED
)
1782 max
= (1 << (operand
->bits
- 1)) - 1;
1783 min
= -(1 << (operand
->bits
- 1));
1787 max
= (1 << operand
->bits
) - 1;
1791 if (val
< min
|| val
> max
)
1794 _("operand out of range (%s not between %d and %d)");
1795 char buf
[sizeof (val
) * 3 + 2];
1797 sprint_value(buf
, val
);
1799 as_warn_where(file
, line
, err
, buf
, min
, max
);
1801 as_warn(err
, buf
, min
, max
);
1805 if (operand
->insert
)
1807 const char *errmsg
= NULL
;
1809 insn
= (*operand
->insert
) (insn
, val
, &errmsg
);
1814 insn
|= ((val
& ((1 << operand
->bits
) - 1)) << operand
->shift
);
1820 * Turn an opcode description and a set of arguments into
1821 * an instruction and a fixup.
1825 assemble_insn(opcode
, tok
, ntok
, insn
)
1826 const struct alpha_opcode
*opcode
;
1827 const expressionS
*tok
;
1829 struct alpha_insn
*insn
;
1831 const unsigned char *argidx
;
1835 memset (insn
, 0, sizeof (*insn
));
1836 image
= opcode
->opcode
;
1838 for (argidx
= opcode
->operands
; *argidx
; ++argidx
)
1840 const struct alpha_operand
*operand
= &alpha_operands
[*argidx
];
1841 const expressionS
*t
;
1843 if (operand
->flags
& AXP_OPERAND_FAKE
)
1845 /* fake operands take no value and generate no fixup */
1846 image
= insert_operand(image
, operand
, 0, NULL
, 0);
1852 switch (operand
->flags
& AXP_OPERAND_OPTIONAL_MASK
)
1854 case AXP_OPERAND_DEFAULT_FIRST
:
1857 case AXP_OPERAND_DEFAULT_SECOND
:
1860 case AXP_OPERAND_DEFAULT_ZERO
:
1862 static const expressionS zero_exp
= { 0, 0, 0, O_constant
, 1 };
1878 image
= insert_operand(image
, operand
, regno(t
->X_add_number
),
1883 image
= insert_operand(image
, operand
, t
->X_add_number
, NULL
, 0);
1888 struct alpha_fixup
*fixup
;
1890 if (insn
->nfixups
>= MAX_INSN_FIXUPS
)
1891 as_fatal(_("too many fixups"));
1893 fixup
= &insn
->fixups
[insn
->nfixups
++];
1896 fixup
->reloc
= operand
->default_reloc
;
1906 * Actually output an instruction with its fixup.
1911 struct alpha_insn
*insn
;
1916 /* Take care of alignment duties */
1917 if (alpha_auto_align_on
&& alpha_current_align
< 2)
1918 alpha_align (2, (char *) NULL
, alpha_insn_label
, 0);
1919 if (alpha_current_align
> 2)
1920 alpha_current_align
= 2;
1921 alpha_insn_label
= NULL
;
1923 /* Write out the instruction. */
1925 md_number_to_chars (f
, insn
->insn
, 4);
1927 /* Apply the fixups in order */
1928 for (i
= 0; i
< insn
->nfixups
; ++i
)
1930 const struct alpha_operand
*operand
;
1931 struct alpha_fixup
*fixup
= &insn
->fixups
[i
];
1935 /* Some fixups are only used internally and so have no howto */
1936 if ((int)fixup
->reloc
< 0)
1938 operand
= &alpha_operands
[-(int)fixup
->reloc
];
1940 pcrel
= ((operand
->flags
& AXP_OPERAND_RELATIVE
) != 0);
1943 /* These relocation types are only used internally. */
1944 else if (fixup
->reloc
== BFD_RELOC_ALPHA_GPDISP_HI16
1945 || fixup
->reloc
== BFD_RELOC_ALPHA_GPDISP_LO16
)
1947 size
= 2, pcrel
= 0;
1952 reloc_howto_type
*reloc_howto
1953 = bfd_reloc_type_lookup (stdoutput
, fixup
->reloc
);
1954 assert (reloc_howto
);
1956 size
= bfd_get_reloc_size (reloc_howto
);
1957 pcrel
= reloc_howto
->pc_relative
;
1959 assert (size
>= 1 && size
<= 4);
1961 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
, size
,
1962 &fixup
->exp
, pcrel
, fixup
->reloc
);
1964 /* Turn off complaints that the addend is too large for some fixups */
1965 switch (fixup
->reloc
)
1967 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1969 case BFD_RELOC_ALPHA_LITERAL
:
1972 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1974 case BFD_RELOC_GPREL32
:
1975 fixP
->fx_no_overflow
= 1;
1979 if ((int)fixup
->reloc
< 0)
1981 if (operand
->flags
& AXP_OPERAND_NOOVERFLOW
)
1982 fixP
->fx_no_overflow
= 1;
1989 /* Given an opcode name and a pre-tokenized set of arguments, assemble
1990 the insn, but do not emit it.
1992 Note that this implies no macros allowed, since we can't store more
1993 than one insn in an insn structure. */
1996 assemble_tokens_to_insn(opname
, tok
, ntok
, insn
)
1998 const expressionS
*tok
;
2000 struct alpha_insn
*insn
;
2002 const struct alpha_opcode
*opcode
;
2004 /* search opcodes */
2005 opcode
= (const struct alpha_opcode
*) hash_find (alpha_opcode_hash
, opname
);
2009 opcode
= find_opcode_match (opcode
, tok
, &ntok
, &cpumatch
);
2012 assemble_insn (opcode
, tok
, ntok
, insn
);
2016 as_bad (_("inappropriate arguments for opcode `%s'"), opname
);
2018 as_bad (_("opcode `%s' not supported for target %s"), opname
,
2022 as_bad (_("unknown opcode `%s'"), opname
);
2025 /* Given an opcode name and a pre-tokenized set of arguments, take the
2026 opcode all the way through emission. */
2029 assemble_tokens (opname
, tok
, ntok
, local_macros_on
)
2031 const expressionS
*tok
;
2033 int local_macros_on
;
2035 int found_something
= 0;
2036 const struct alpha_opcode
*opcode
;
2037 const struct alpha_macro
*macro
;
2041 if (local_macros_on
)
2043 macro
= ((const struct alpha_macro
*)
2044 hash_find (alpha_macro_hash
, opname
));
2047 found_something
= 1;
2048 macro
= find_macro_match (macro
, tok
, &ntok
);
2051 (*macro
->emit
) (tok
, ntok
, macro
->arg
);
2057 /* search opcodes */
2058 opcode
= (const struct alpha_opcode
*) hash_find (alpha_opcode_hash
, opname
);
2061 found_something
= 1;
2062 opcode
= find_opcode_match (opcode
, tok
, &ntok
, &cpumatch
);
2065 struct alpha_insn insn
;
2066 assemble_insn (opcode
, tok
, ntok
, &insn
);
2072 if (found_something
)
2074 as_bad (_("inappropriate arguments for opcode `%s'"), opname
);
2076 as_bad (_("opcode `%s' not supported for target %s"), opname
,
2079 as_bad (_("unknown opcode `%s'"), opname
);
2083 /* Some instruction sets indexed by lg(size) */
2084 static const char * const sextX_op
[] = { "sextb", "sextw", "sextl", NULL
};
2085 static const char * const insXl_op
[] = { "insbl", "inswl", "insll", "insql" };
2086 static const char * const insXh_op
[] = { NULL
, "inswh", "inslh", "insqh" };
2087 static const char * const extXl_op
[] = { "extbl", "extwl", "extll", "extql" };
2088 static const char * const extXh_op
[] = { NULL
, "extwh", "extlh", "extqh" };
2089 static const char * const mskXl_op
[] = { "mskbl", "mskwl", "mskll", "mskql" };
2090 static const char * const mskXh_op
[] = { NULL
, "mskwh", "msklh", "mskqh" };
2091 static const char * const stX_op
[] = { "stb", "stw", "stl", "stq" };
2092 static const char * const ldX_op
[] = { "ldb", "ldw", "ldll", "ldq" };
2093 static const char * const ldXu_op
[] = { "ldbu", "ldwu", NULL
, NULL
};
2095 /* Implement the ldgp macro. */
2098 emit_ldgp (tok
, ntok
, unused
)
2099 const expressionS
*tok
;
2106 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2107 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2108 with appropriate constants and relocations. */
2109 struct alpha_insn insn
;
2110 expressionS newtok
[3];
2114 if (regno (tok
[2].X_add_number
) == AXP_REG_PV
)
2115 ecoff_set_gp_prolog_size (0);
2119 set_tok_const (newtok
[1], 0);
2122 assemble_tokens_to_insn ("ldah", newtok
, 3, &insn
);
2127 if (addend
.X_op
!= O_constant
)
2128 as_bad (_("can not resolve expression"));
2129 addend
.X_op
= O_symbol
;
2130 addend
.X_add_symbol
= alpha_gp_symbol
;
2134 insn
.fixups
[0].exp
= addend
;
2135 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_GPDISP_HI16
;
2139 set_tok_preg (newtok
[2], tok
[0].X_add_number
);
2141 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2144 addend
.X_add_number
+= 4;
2148 insn
.fixups
[0].exp
= addend
;
2149 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_GPDISP_LO16
;
2152 #endif /* OBJ_ECOFF || OBJ_ELF */
2157 /* Add symbol+addend to link pool.
2158 Return offset from basesym to entry in link pool.
2160 Add new fixup only if offset isn't 16bit. */
2163 add_to_link_pool (basesym
, sym
, addend
)
2168 segT current_section
= now_seg
;
2169 int current_subsec
= now_subseg
;
2171 bfd_reloc_code_real_type reloc_type
;
2173 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
2176 offset
= -basesym
->sy_obj
;
2178 /* @@ This assumes all entries in a given section will be of the same
2179 size... Probably correct, but unwise to rely on. */
2180 /* This must always be called with the same subsegment. */
2182 if (seginfo
->frchainP
)
2183 for (fixp
= seginfo
->frchainP
->fix_root
;
2184 fixp
!= (fixS
*) NULL
;
2185 fixp
= fixp
->fx_next
, offset
+= 8)
2187 if (fixp
->fx_addsy
== sym
&& fixp
->fx_offset
== addend
)
2189 if (range_signed_16 (offset
))
2196 /* Not found in 16bit signed range. */
2198 subseg_set (alpha_link_section
, 0);
2202 fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, sym
, addend
, 0,
2205 subseg_set (current_section
, current_subsec
);
2206 seginfo
->literal_pool_size
+= 8;
2210 #endif /* OBJ_EVAX */
2212 /* Load a (partial) expression into a target register.
2214 If poffset is not null, after the call it will either contain
2215 O_constant 0, or a 16-bit offset appropriate for any MEM format
2216 instruction. In addition, pbasereg will be modified to point to
2217 the base register to use in that MEM format instruction.
2219 In any case, *pbasereg should contain a base register to add to the
2220 expression. This will normally be either AXP_REG_ZERO or
2221 alpha_gp_register. Symbol addresses will always be loaded via $gp,
2222 so "foo($0)" is interpreted as adding the address of foo to $0;
2223 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
2224 but this is what OSF/1 does.
2226 Finally, the return value is true if the calling macro may emit a
2227 LITUSE reloc if otherwise appropriate. */
2230 load_expression (targreg
, exp
, pbasereg
, poffset
)
2232 const expressionS
*exp
;
2234 expressionS
*poffset
;
2236 int emit_lituse
= 0;
2237 offsetT addend
= exp
->X_add_number
;
2238 int basereg
= *pbasereg
;
2239 struct alpha_insn insn
;
2240 expressionS newtok
[3];
2249 /* attempt to reduce .lit load by splitting the offset from
2250 its symbol when possible, but don't create a situation in
2252 if (!range_signed_32 (addend
) &&
2253 (alpha_noat_on
|| targreg
== AXP_REG_AT
))
2255 lit
= add_to_literal_pool (exp
->X_add_symbol
, addend
,
2256 alpha_lita_section
, 8);
2261 lit
= add_to_literal_pool (exp
->X_add_symbol
, 0,
2262 alpha_lita_section
, 8);
2266 as_fatal (_("overflow in literal (.lita) table"));
2268 /* emit "ldq r, lit(gp)" */
2270 if (basereg
!= alpha_gp_register
&& targreg
== basereg
)
2273 as_bad (_("macro requires $at register while noat in effect"));
2274 if (targreg
== AXP_REG_AT
)
2275 as_bad (_("macro requires $at while $at in use"));
2277 set_tok_reg (newtok
[0], AXP_REG_AT
);
2280 set_tok_reg (newtok
[0], targreg
);
2281 set_tok_sym (newtok
[1], alpha_lita_symbol
, lit
);
2282 set_tok_preg (newtok
[2], alpha_gp_register
);
2284 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2286 assert (insn
.nfixups
== 1);
2287 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITERAL
;
2288 #endif /* OBJ_ECOFF */
2290 /* emit "ldq r, gotoff(gp)" */
2292 if (basereg
!= alpha_gp_register
&& targreg
== basereg
)
2295 as_bad (_("macro requires $at register while noat in effect"));
2296 if (targreg
== AXP_REG_AT
)
2297 as_bad (_("macro requires $at while $at in use"));
2299 set_tok_reg (newtok
[0], AXP_REG_AT
);
2302 set_tok_reg (newtok
[0], targreg
);
2304 /* XXX: Disable this .got minimizing optimization so that we can get
2305 better instruction offset knowledge in the compiler. This happens
2306 very infrequently anyway. */
2307 if (1 || (!range_signed_32 (addend
)
2308 && (alpha_noat_on
|| targreg
== AXP_REG_AT
)))
2315 set_tok_sym (newtok
[1], exp
->X_add_symbol
, 0);
2318 set_tok_preg (newtok
[2], alpha_gp_register
);
2320 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2322 assert (insn
.nfixups
== 1);
2323 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_ELF_LITERAL
;
2324 #endif /* OBJ_ELF */
2328 /* Find symbol or symbol pointer in link section. */
2330 if (exp
->X_add_symbol
== alpha_evax_proc
.symbol
)
2332 if (range_signed_16 (addend
))
2334 set_tok_reg (newtok
[0], targreg
);
2335 set_tok_const (newtok
[1], addend
);
2336 set_tok_preg (newtok
[2], basereg
);
2337 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2342 set_tok_reg (newtok
[0], targreg
);
2343 set_tok_const (newtok
[1], 0);
2344 set_tok_preg (newtok
[2], basereg
);
2345 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2350 if (!range_signed_32 (addend
))
2352 link
= add_to_link_pool (alpha_evax_proc
.symbol
,
2353 exp
->X_add_symbol
, addend
);
2358 link
= add_to_link_pool (alpha_evax_proc
.symbol
,
2359 exp
->X_add_symbol
, 0);
2361 set_tok_reg (newtok
[0], targreg
);
2362 set_tok_const (newtok
[1], link
);
2363 set_tok_preg (newtok
[2], basereg
);
2364 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2366 #endif /* OBJ_EVAX */
2373 if (basereg
!= alpha_gp_register
&& basereg
!= AXP_REG_ZERO
)
2375 /* emit "addq r, base, r" */
2377 set_tok_reg (newtok
[1], basereg
);
2378 set_tok_reg (newtok
[2], targreg
);
2379 assemble_tokens ("addq", newtok
, 3, 0);
2391 /* Assume that this difference expression will be resolved to an
2392 absolute value and that that value will fit in 16 bits. */
2394 set_tok_reg (newtok
[0], targreg
);
2396 set_tok_preg (newtok
[2], basereg
);
2397 assemble_tokens ("lda", newtok
, 3, 0);
2400 set_tok_const (*poffset
, 0);
2404 if (exp
->X_add_number
> 0)
2405 as_bad (_("bignum invalid; zero assumed"));
2407 as_bad (_("floating point number invalid; zero assumed"));
2412 as_bad (_("can't handle expression"));
2417 if (!range_signed_32 (addend
))
2421 /* for 64-bit addends, just put it in the literal pool */
2424 /* emit "ldq targreg, lit(basereg)" */
2425 lit
= add_to_link_pool (alpha_evax_proc
.symbol
,
2426 section_symbol (absolute_section
), addend
);
2427 set_tok_reg (newtok
[0], targreg
);
2428 set_tok_const (newtok
[1], lit
);
2429 set_tok_preg (newtok
[2], alpha_gp_register
);
2430 assemble_tokens ("ldq", newtok
, 3, 0);
2433 if (alpha_lit8_section
== NULL
)
2435 create_literal_section (".lit8",
2436 &alpha_lit8_section
,
2437 &alpha_lit8_symbol
);
2440 alpha_lit8_literal
= add_to_literal_pool (alpha_lit8_symbol
, 0x8000,
2441 alpha_lita_section
, 8);
2442 if (alpha_lit8_literal
>= 0x8000)
2443 as_fatal (_("overflow in literal (.lita) table"));
2447 lit
= add_to_literal_pool (NULL
, addend
, alpha_lit8_section
, 8) - 0x8000;
2449 as_fatal (_("overflow in literal (.lit8) table"));
2451 /* emit "lda litreg, .lit8+0x8000" */
2453 if (targreg
== basereg
)
2456 as_bad (_("macro requires $at register while noat in effect"));
2457 if (targreg
== AXP_REG_AT
)
2458 as_bad (_("macro requires $at while $at in use"));
2460 set_tok_reg (newtok
[0], AXP_REG_AT
);
2463 set_tok_reg (newtok
[0], targreg
);
2465 set_tok_sym (newtok
[1], alpha_lita_symbol
, alpha_lit8_literal
);
2468 set_tok_sym (newtok
[1], alpha_lit8_symbol
, 0x8000);
2470 set_tok_preg (newtok
[2], alpha_gp_register
);
2472 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2474 assert (insn
.nfixups
== 1);
2476 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITERAL
;
2479 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_ELF_LITERAL
;
2484 /* emit "ldq litreg, lit(litreg)" */
2486 set_tok_const (newtok
[1], lit
);
2487 set_tok_preg (newtok
[2], newtok
[0].X_add_number
);
2489 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2491 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2492 if (insn
.nfixups
> 0)
2494 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2495 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2498 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2499 insn
.fixups
[0].exp
.X_op
= O_symbol
;
2500 insn
.fixups
[0].exp
.X_add_symbol
= section_symbol (now_seg
);
2501 insn
.fixups
[0].exp
.X_add_number
= 1;
2506 /* emit "addq litreg, base, target" */
2508 if (basereg
!= AXP_REG_ZERO
)
2510 set_tok_reg (newtok
[1], basereg
);
2511 set_tok_reg (newtok
[2], targreg
);
2512 assemble_tokens ("addq", newtok
, 3, 0);
2514 #endif /* !OBJ_EVAX */
2517 set_tok_const (*poffset
, 0);
2518 *pbasereg
= targreg
;
2522 offsetT low
, high
, extra
, tmp
;
2524 /* for 32-bit operands, break up the addend */
2526 low
= sign_extend_16 (addend
);
2528 high
= sign_extend_16 (tmp
>> 16);
2530 if (tmp
- (high
<< 16))
2534 high
= sign_extend_16 (tmp
>> 16);
2539 set_tok_reg (newtok
[0], targreg
);
2540 set_tok_preg (newtok
[2], basereg
);
2544 /* emit "ldah r, extra(r) */
2545 set_tok_const (newtok
[1], extra
);
2546 assemble_tokens ("ldah", newtok
, 3, 0);
2547 set_tok_preg (newtok
[2], basereg
= targreg
);
2552 /* emit "ldah r, high(r) */
2553 set_tok_const (newtok
[1], high
);
2554 assemble_tokens ("ldah", newtok
, 3, 0);
2556 set_tok_preg (newtok
[2], basereg
);
2559 if ((low
&& !poffset
) || (!poffset
&& basereg
!= targreg
))
2561 /* emit "lda r, low(base)" */
2562 set_tok_const (newtok
[1], low
);
2563 assemble_tokens ("lda", newtok
, 3, 0);
2569 set_tok_const (*poffset
, low
);
2570 *pbasereg
= basereg
;
2576 /* The lda macro differs from the lda instruction in that it handles
2577 most simple expressions, particualrly symbol address loads and
2581 emit_lda (tok
, ntok
, unused
)
2582 const expressionS
*tok
;
2589 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2591 basereg
= tok
[2].X_add_number
;
2593 (void) load_expression (tok
[0].X_add_number
, &tok
[1], &basereg
, NULL
);
2596 /* The ldah macro differs from the ldah instruction in that it has $31
2597 as an implied base register. */
2600 emit_ldah (tok
, ntok
, unused
)
2601 const expressionS
*tok
;
2605 expressionS newtok
[3];
2609 set_tok_preg (newtok
[2], AXP_REG_ZERO
);
2611 assemble_tokens ("ldah", newtok
, 3, 0);
2614 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
2615 etc. They differ from the real instructions in that they do simple
2616 expressions like the lda macro. */
2619 emit_ir_load (tok
, ntok
, opname
)
2620 const expressionS
*tok
;
2624 int basereg
, lituse
;
2625 expressionS newtok
[3];
2626 struct alpha_insn insn
;
2629 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2631 basereg
= tok
[2].X_add_number
;
2633 lituse
= load_expression (tok
[0].X_add_number
, &tok
[1], &basereg
,
2637 set_tok_preg (newtok
[2], basereg
);
2639 assemble_tokens_to_insn ((const char *)opname
, newtok
, 3, &insn
);
2643 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2644 if (insn
.nfixups
> 0)
2646 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2647 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2650 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2651 insn
.fixups
[0].exp
.X_op
= O_symbol
;
2652 insn
.fixups
[0].exp
.X_add_symbol
= section_symbol (now_seg
);
2653 insn
.fixups
[0].exp
.X_add_number
= 1;
2659 /* Handle fp register loads, and both integer and fp register stores.
2660 Again, we handle simple expressions. */
2663 emit_loadstore (tok
, ntok
, opname
)
2664 const expressionS
*tok
;
2668 int basereg
, lituse
;
2669 expressionS newtok
[3];
2670 struct alpha_insn insn
;
2673 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2675 basereg
= tok
[2].X_add_number
;
2677 if (tok
[1].X_op
!= O_constant
|| !range_signed_16(tok
[1].X_add_number
))
2680 as_bad (_("macro requires $at register while noat in effect"));
2682 lituse
= load_expression (AXP_REG_AT
, &tok
[1], &basereg
, &newtok
[1]);
2691 set_tok_preg (newtok
[2], basereg
);
2693 assemble_tokens_to_insn ((const char *)opname
, newtok
, 3, &insn
);
2697 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2698 if (insn
.nfixups
> 0)
2700 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2701 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2704 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2705 insn
.fixups
[0].exp
.X_op
= O_symbol
;
2706 insn
.fixups
[0].exp
.X_add_symbol
= section_symbol (now_seg
);
2707 insn
.fixups
[0].exp
.X_add_number
= 1;
2713 /* Load a half-word or byte as an unsigned value. */
2716 emit_ldXu (tok
, ntok
, vlgsize
)
2717 const expressionS
*tok
;
2721 if (alpha_target
& AXP_OPCODE_BWX
)
2722 emit_ir_load (tok
, ntok
, ldXu_op
[(long)vlgsize
]);
2725 expressionS newtok
[3];
2728 as_bad (_("macro requires $at register while noat in effect"));
2730 /* emit "lda $at, exp" */
2732 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2733 newtok
[0].X_add_number
= AXP_REG_AT
;
2734 assemble_tokens ("lda", newtok
, ntok
, 1);
2736 /* emit "ldq_u targ, 0($at)" */
2739 set_tok_const (newtok
[1], 0);
2740 set_tok_preg (newtok
[2], AXP_REG_AT
);
2741 assemble_tokens ("ldq_u", newtok
, 3, 1);
2743 /* emit "extXl targ, $at, targ" */
2745 set_tok_reg (newtok
[1], AXP_REG_AT
);
2746 newtok
[2] = newtok
[0];
2747 assemble_tokens (extXl_op
[(long)vlgsize
], newtok
, 3, 1);
2751 /* Load a half-word or byte as a signed value. */
2754 emit_ldX (tok
, ntok
, vlgsize
)
2755 const expressionS
*tok
;
2759 emit_ldXu (tok
, ntok
, vlgsize
);
2760 assemble_tokens (sextX_op
[(long)vlgsize
], tok
, 1, 1);
2763 /* Load an integral value from an unaligned address as an unsigned
2767 emit_uldXu (tok
, ntok
, vlgsize
)
2768 const expressionS
*tok
;
2772 long lgsize
= (long)vlgsize
;
2773 expressionS newtok
[3];
2776 as_bad (_("macro requires $at register while noat in effect"));
2778 /* emit "lda $at, exp" */
2780 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2781 newtok
[0].X_add_number
= AXP_REG_AT
;
2782 assemble_tokens ("lda", newtok
, ntok
, 1);
2784 /* emit "ldq_u $t9, 0($at)" */
2786 set_tok_reg (newtok
[0], AXP_REG_T9
);
2787 set_tok_const (newtok
[1], 0);
2788 set_tok_preg (newtok
[2], AXP_REG_AT
);
2789 assemble_tokens ("ldq_u", newtok
, 3, 1);
2791 /* emit "ldq_u $t10, size-1($at)" */
2793 set_tok_reg (newtok
[0], AXP_REG_T10
);
2794 set_tok_const (newtok
[1], (1<<lgsize
)-1);
2795 assemble_tokens ("ldq_u", newtok
, 3, 1);
2797 /* emit "extXl $t9, $at, $t9" */
2799 set_tok_reg (newtok
[0], AXP_REG_T9
);
2800 set_tok_reg (newtok
[1], AXP_REG_AT
);
2801 set_tok_reg (newtok
[2], AXP_REG_T9
);
2802 assemble_tokens (extXl_op
[lgsize
], newtok
, 3, 1);
2804 /* emit "extXh $t10, $at, $t10" */
2806 set_tok_reg (newtok
[0], AXP_REG_T10
);
2807 set_tok_reg (newtok
[2], AXP_REG_T10
);
2808 assemble_tokens (extXh_op
[lgsize
], newtok
, 3, 1);
2810 /* emit "or $t9, $t10, targ" */
2812 set_tok_reg (newtok
[0], AXP_REG_T9
);
2813 set_tok_reg (newtok
[1], AXP_REG_T10
);
2815 assemble_tokens ("or", newtok
, 3, 1);
2818 /* Load an integral value from an unaligned address as a signed value.
2819 Note that quads should get funneled to the unsigned load since we
2820 don't have to do the sign extension. */
2823 emit_uldX (tok
, ntok
, vlgsize
)
2824 const expressionS
*tok
;
2828 emit_uldXu (tok
, ntok
, vlgsize
);
2829 assemble_tokens (sextX_op
[(long)vlgsize
], tok
, 1, 1);
2832 /* Implement the ldil macro. */
2835 emit_ldil (tok
, ntok
, unused
)
2836 const expressionS
*tok
;
2840 expressionS newtok
[2];
2842 memcpy (newtok
, tok
, sizeof(newtok
));
2843 newtok
[1].X_add_number
= sign_extend_32 (tok
[1].X_add_number
);
2845 assemble_tokens ("lda", newtok
, ntok
, 1);
2848 /* Store a half-word or byte. */
2851 emit_stX (tok
, ntok
, vlgsize
)
2852 const expressionS
*tok
;
2856 int lgsize
= (int)(long)vlgsize
;
2858 if (alpha_target
& AXP_OPCODE_BWX
)
2859 emit_loadstore (tok
, ntok
, stX_op
[lgsize
]);
2862 expressionS newtok
[3];
2865 as_bad(_("macro requires $at register while noat in effect"));
2867 /* emit "lda $at, exp" */
2869 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2870 newtok
[0].X_add_number
= AXP_REG_AT
;
2871 assemble_tokens ("lda", newtok
, ntok
, 1);
2873 /* emit "ldq_u $t9, 0($at)" */
2875 set_tok_reg (newtok
[0], AXP_REG_T9
);
2876 set_tok_const (newtok
[1], 0);
2877 set_tok_preg (newtok
[2], AXP_REG_AT
);
2878 assemble_tokens ("ldq_u", newtok
, 3, 1);
2880 /* emit "insXl src, $at, $t10" */
2883 set_tok_reg (newtok
[1], AXP_REG_AT
);
2884 set_tok_reg (newtok
[2], AXP_REG_T10
);
2885 assemble_tokens (insXl_op
[lgsize
], newtok
, 3, 1);
2887 /* emit "mskXl $t9, $at, $t9" */
2889 set_tok_reg (newtok
[0], AXP_REG_T9
);
2890 newtok
[2] = newtok
[0];
2891 assemble_tokens (mskXl_op
[lgsize
], newtok
, 3, 1);
2893 /* emit "or $t9, $t10, $t9" */
2895 set_tok_reg (newtok
[1], AXP_REG_T10
);
2896 assemble_tokens ("or", newtok
, 3, 1);
2898 /* emit "stq_u $t9, 0($at) */
2900 set_tok_const (newtok
[1], 0);
2901 set_tok_preg (newtok
[2], AXP_REG_AT
);
2902 assemble_tokens ("stq_u", newtok
, 3, 1);
2906 /* Store an integer to an unaligned address. */
2909 emit_ustX (tok
, ntok
, vlgsize
)
2910 const expressionS
*tok
;
2914 int lgsize
= (int)(long)vlgsize
;
2915 expressionS newtok
[3];
2917 /* emit "lda $at, exp" */
2919 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2920 newtok
[0].X_add_number
= AXP_REG_AT
;
2921 assemble_tokens ("lda", newtok
, ntok
, 1);
2923 /* emit "ldq_u $9, 0($at)" */
2925 set_tok_reg (newtok
[0], AXP_REG_T9
);
2926 set_tok_const (newtok
[1], 0);
2927 set_tok_preg (newtok
[2], AXP_REG_AT
);
2928 assemble_tokens ("ldq_u", newtok
, 3, 1);
2930 /* emit "ldq_u $10, size-1($at)" */
2932 set_tok_reg (newtok
[0], AXP_REG_T10
);
2933 set_tok_const (newtok
[1], (1 << lgsize
)-1);
2934 assemble_tokens ("ldq_u", newtok
, 3, 1);
2936 /* emit "insXl src, $at, $t11" */
2939 set_tok_reg (newtok
[1], AXP_REG_AT
);
2940 set_tok_reg (newtok
[2], AXP_REG_T11
);
2941 assemble_tokens (insXl_op
[lgsize
], newtok
, 3, 1);
2943 /* emit "insXh src, $at, $t12" */
2945 set_tok_reg (newtok
[2], AXP_REG_T12
);
2946 assemble_tokens (insXh_op
[lgsize
], newtok
, 3, 1);
2948 /* emit "mskXl $t9, $at, $t9" */
2950 set_tok_reg (newtok
[0], AXP_REG_T9
);
2951 newtok
[2] = newtok
[0];
2952 assemble_tokens (mskXl_op
[lgsize
], newtok
, 3, 1);
2954 /* emit "mskXh $t10, $at, $t10" */
2956 set_tok_reg (newtok
[0], AXP_REG_T10
);
2957 newtok
[2] = newtok
[0];
2958 assemble_tokens (mskXh_op
[lgsize
], newtok
, 3, 1);
2960 /* emit "or $t9, $t11, $t9" */
2962 set_tok_reg (newtok
[0], AXP_REG_T9
);
2963 set_tok_reg (newtok
[1], AXP_REG_T11
);
2964 newtok
[2] = newtok
[0];
2965 assemble_tokens ("or", newtok
, 3, 1);
2967 /* emit "or $t10, $t12, $t10" */
2969 set_tok_reg (newtok
[0], AXP_REG_T10
);
2970 set_tok_reg (newtok
[1], AXP_REG_T12
);
2971 newtok
[2] = newtok
[0];
2972 assemble_tokens ("or", newtok
, 3, 1);
2974 /* emit "stq_u $t9, 0($at)" */
2976 set_tok_reg (newtok
[0], AXP_REG_T9
);
2977 set_tok_const (newtok
[1], 0);
2978 set_tok_preg (newtok
[2], AXP_REG_AT
);
2979 assemble_tokens ("stq_u", newtok
, 3, 1);
2981 /* emit "stq_u $t10, size-1($at)" */
2983 set_tok_reg (newtok
[0], AXP_REG_T10
);
2984 set_tok_const (newtok
[1], (1 << lgsize
)-1);
2985 assemble_tokens ("stq_u", newtok
, 3, 1);
2988 /* Sign extend a half-word or byte. The 32-bit sign extend is
2989 implemented as "addl $31, $r, $t" in the opcode table. */
2992 emit_sextX (tok
, ntok
, vlgsize
)
2993 const expressionS
*tok
;
2997 long lgsize
= (long)vlgsize
;
2999 if (alpha_target
& AXP_OPCODE_BWX
)
3000 assemble_tokens (sextX_op
[lgsize
], tok
, ntok
, 0);
3003 int bitshift
= 64 - 8 * (1 << lgsize
);
3004 expressionS newtok
[3];
3006 /* emit "sll src,bits,dst" */
3009 set_tok_const (newtok
[1], bitshift
);
3010 newtok
[2] = tok
[ntok
- 1];
3011 assemble_tokens ("sll", newtok
, 3, 1);
3013 /* emit "sra dst,bits,dst" */
3015 newtok
[0] = newtok
[2];
3016 assemble_tokens ("sra", newtok
, 3, 1);
3020 /* Implement the division and modulus macros. */
3024 /* Make register usage like in normal procedure call.
3025 Don't clobber PV and RA. */
3028 emit_division (tok
, ntok
, symname
)
3029 const expressionS
*tok
;
3033 /* DIVISION and MODULUS. Yech.
3038 * mov x,R16 # if x != R16
3039 * mov y,R17 # if y != R17
3044 * with appropriate optimizations if R0,R16,R17 are the registers
3045 * specified by the compiler.
3050 expressionS newtok
[3];
3052 xr
= regno (tok
[0].X_add_number
);
3053 yr
= regno (tok
[1].X_add_number
);
3058 rr
= regno (tok
[2].X_add_number
);
3060 /* Move the operands into the right place */
3061 if (yr
== AXP_REG_R16
&& xr
== AXP_REG_R17
)
3063 /* They are in exactly the wrong order -- swap through AT */
3066 as_bad (_("macro requires $at register while noat in effect"));
3068 set_tok_reg (newtok
[0], AXP_REG_R16
);
3069 set_tok_reg (newtok
[1], AXP_REG_AT
);
3070 assemble_tokens ("mov", newtok
, 2, 1);
3072 set_tok_reg (newtok
[0], AXP_REG_R17
);
3073 set_tok_reg (newtok
[1], AXP_REG_R16
);
3074 assemble_tokens ("mov", newtok
, 2, 1);
3076 set_tok_reg (newtok
[0], AXP_REG_AT
);
3077 set_tok_reg (newtok
[1], AXP_REG_R17
);
3078 assemble_tokens ("mov", newtok
, 2, 1);
3082 if (yr
== AXP_REG_R16
)
3084 set_tok_reg (newtok
[0], AXP_REG_R16
);
3085 set_tok_reg (newtok
[1], AXP_REG_R17
);
3086 assemble_tokens ("mov", newtok
, 2, 1);
3089 if (xr
!= AXP_REG_R16
)
3091 set_tok_reg (newtok
[0], xr
);
3092 set_tok_reg (newtok
[1], AXP_REG_R16
);
3093 assemble_tokens ("mov", newtok
, 2, 1);
3096 if (yr
!= AXP_REG_R16
&& yr
!= AXP_REG_R17
)
3098 set_tok_reg (newtok
[0], yr
);
3099 set_tok_reg (newtok
[1], AXP_REG_R17
);
3100 assemble_tokens ("mov", newtok
, 2, 1);
3104 sym
= symbol_find_or_make ((const char *)symname
);
3106 set_tok_reg (newtok
[0], AXP_REG_AT
);
3107 set_tok_sym (newtok
[1], sym
, 0);
3108 assemble_tokens ("lda", newtok
, 2, 1);
3110 /* Call the division routine */
3111 set_tok_reg (newtok
[0], AXP_REG_AT
);
3112 set_tok_cpreg (newtok
[1], AXP_REG_AT
);
3113 set_tok_const (newtok
[2], 0);
3114 assemble_tokens ("jsr", newtok
, 3, 1);
3116 /* Move the result to the right place */
3117 if (rr
!= AXP_REG_R0
)
3119 set_tok_reg (newtok
[0], AXP_REG_R0
);
3120 set_tok_reg (newtok
[1], rr
);
3121 assemble_tokens ("mov", newtok
, 2, 1);
3125 #else /* !OBJ_EVAX */
3128 emit_division (tok
, ntok
, symname
)
3129 const expressionS
*tok
;
3133 /* DIVISION and MODULUS. Yech.
3143 * with appropriate optimizations if t10,t11,t12 are the registers
3144 * specified by the compiler.
3149 expressionS newtok
[3];
3151 xr
= regno (tok
[0].X_add_number
);
3152 yr
= regno (tok
[1].X_add_number
);
3157 rr
= regno (tok
[2].X_add_number
);
3159 sym
= symbol_find_or_make ((const char *)symname
);
3161 /* Move the operands into the right place */
3162 if (yr
== AXP_REG_T10
&& xr
== AXP_REG_T11
)
3164 /* They are in exactly the wrong order -- swap through AT */
3167 as_bad (_("macro requires $at register while noat in effect"));
3169 set_tok_reg (newtok
[0], AXP_REG_T10
);
3170 set_tok_reg (newtok
[1], AXP_REG_AT
);
3171 assemble_tokens ("mov", newtok
, 2, 1);
3173 set_tok_reg (newtok
[0], AXP_REG_T11
);
3174 set_tok_reg (newtok
[1], AXP_REG_T10
);
3175 assemble_tokens ("mov", newtok
, 2, 1);
3177 set_tok_reg (newtok
[0], AXP_REG_AT
);
3178 set_tok_reg (newtok
[1], AXP_REG_T11
);
3179 assemble_tokens ("mov", newtok
, 2, 1);
3183 if (yr
== AXP_REG_T10
)
3185 set_tok_reg (newtok
[0], AXP_REG_T10
);
3186 set_tok_reg (newtok
[1], AXP_REG_T11
);
3187 assemble_tokens ("mov", newtok
, 2, 1);
3190 if (xr
!= AXP_REG_T10
)
3192 set_tok_reg (newtok
[0], xr
);
3193 set_tok_reg (newtok
[1], AXP_REG_T10
);
3194 assemble_tokens ("mov", newtok
, 2, 1);
3197 if (yr
!= AXP_REG_T10
&& yr
!= AXP_REG_T11
)
3199 set_tok_reg (newtok
[0], yr
);
3200 set_tok_reg (newtok
[1], AXP_REG_T11
);
3201 assemble_tokens ("mov", newtok
, 2, 1);
3205 /* Call the division routine */
3206 set_tok_reg (newtok
[0], AXP_REG_T9
);
3207 set_tok_sym (newtok
[1], sym
, 0);
3208 assemble_tokens ("jsr", newtok
, 2, 1);
3210 /* Reload the GP register */
3214 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
3215 set_tok_reg (newtok
[0], alpha_gp_register
);
3216 set_tok_const (newtok
[1], 0);
3217 set_tok_preg (newtok
[2], AXP_REG_T9
);
3218 assemble_tokens ("ldgp", newtok
, 3, 1);
3221 /* Move the result to the right place */
3222 if (rr
!= AXP_REG_T12
)
3224 set_tok_reg (newtok
[0], AXP_REG_T12
);
3225 set_tok_reg (newtok
[1], rr
);
3226 assemble_tokens ("mov", newtok
, 2, 1);
3230 #endif /* !OBJ_EVAX */
3232 /* The jsr and jmp macros differ from their instruction counterparts
3233 in that they can load the target address and default most
3237 emit_jsrjmp (tok
, ntok
, vopname
)
3238 const expressionS
*tok
;
3242 const char *opname
= (const char *) vopname
;
3243 struct alpha_insn insn
;
3244 expressionS newtok
[3];
3245 int r
, tokidx
= 0, lituse
= 0;
3247 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_register
)
3248 r
= regno (tok
[tokidx
++].X_add_number
);
3250 r
= strcmp (opname
, "jmp") == 0 ? AXP_REG_ZERO
: AXP_REG_RA
;
3252 set_tok_reg (newtok
[0], r
);
3254 if (tokidx
< ntok
&&
3255 (tok
[tokidx
].X_op
== O_pregister
|| tok
[tokidx
].X_op
== O_cpregister
))
3256 r
= regno (tok
[tokidx
++].X_add_number
);
3258 /* keep register if jsr $n.<sym> */
3262 int basereg
= alpha_gp_register
;
3263 lituse
= load_expression (r
= AXP_REG_PV
, &tok
[tokidx
], &basereg
, NULL
);
3267 set_tok_cpreg (newtok
[1], r
);
3270 /* FIXME: Add hint relocs to BFD for evax. */
3273 newtok
[2] = tok
[tokidx
];
3276 set_tok_const (newtok
[2], 0);
3278 assemble_tokens_to_insn (opname
, newtok
, 3, &insn
);
3280 /* add the LITUSE fixup */
3283 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3284 if (insn
.nfixups
> 0)
3286 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
3287 sizeof(struct alpha_fixup
) * insn
.nfixups
);
3290 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
3291 insn
.fixups
[0].exp
.X_op
= O_symbol
;
3292 insn
.fixups
[0].exp
.X_add_symbol
= section_symbol (now_seg
);
3293 insn
.fixups
[0].exp
.X_add_number
= 3;
3299 /* The ret and jcr instructions differ from their instruction
3300 counterparts in that everything can be defaulted. */
3303 emit_retjcr (tok
, ntok
, vopname
)
3304 const expressionS
*tok
;
3308 const char *opname
= (const char *)vopname
;
3309 expressionS newtok
[3];
3312 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_register
)
3313 r
= regno (tok
[tokidx
++].X_add_number
);
3317 set_tok_reg (newtok
[0], r
);
3319 if (tokidx
< ntok
&&
3320 (tok
[tokidx
].X_op
== O_pregister
|| tok
[tokidx
].X_op
== O_cpregister
))
3321 r
= regno (tok
[tokidx
++].X_add_number
);
3325 set_tok_cpreg (newtok
[1], r
);
3328 newtok
[2] = tok
[tokidx
];
3330 set_tok_const (newtok
[2], strcmp(opname
, "ret") == 0);
3332 assemble_tokens (opname
, newtok
, 3, 0);
3335 /* Assembler directives */
3337 /* Handle the .text pseudo-op. This is like the usual one, but it
3338 clears alpha_insn_label and restores auto alignment. */
3346 alpha_insn_label
= NULL
;
3347 alpha_auto_align_on
= 1;
3348 alpha_current_align
= 0;
3351 /* Handle the .data pseudo-op. This is like the usual one, but it
3352 clears alpha_insn_label and restores auto alignment. */
3359 alpha_insn_label
= NULL
;
3360 alpha_auto_align_on
= 1;
3361 alpha_current_align
= 0;
3364 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
3366 /* Handle the OSF/1 and openVMS .comm pseudo quirks.
3367 openVMS constructs a section for every common symbol. */
3370 s_alpha_comm (ignore
)
3373 register char *name
;
3377 register symbolS
*symbolP
;
3380 segT current_section
= now_seg
;
3381 int current_subsec
= now_subseg
;
3385 name
= input_line_pointer
;
3386 c
= get_symbol_end ();
3388 /* just after name is now '\0' */
3389 p
= input_line_pointer
;
3394 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
3395 if (*input_line_pointer
== ',')
3397 input_line_pointer
++;
3400 if ((temp
= get_absolute_expression ()) < 0)
3402 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
3403 ignore_rest_of_line ();
3408 symbolP
= symbol_find_or_make (name
);
3411 /* Make a section for the common symbol. */
3412 new_seg
= subseg_new (xstrdup (name
), 0);
3418 /* alignment might follow */
3419 if (*input_line_pointer
== ',')
3423 input_line_pointer
++;
3424 align
= get_absolute_expression ();
3425 bfd_set_section_alignment (stdoutput
, new_seg
, align
);
3429 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
3431 as_bad (_("Ignoring attempt to re-define symbol"));
3432 ignore_rest_of_line ();
3437 if (bfd_section_size (stdoutput
, new_seg
) > 0)
3439 if (bfd_section_size (stdoutput
, new_seg
) != temp
)
3440 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3441 S_GET_NAME (symbolP
),
3442 (long) bfd_section_size (stdoutput
, new_seg
),
3446 if (S_GET_VALUE (symbolP
))
3448 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
3449 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3450 S_GET_NAME (symbolP
),
3451 (long) S_GET_VALUE (symbolP
),
3458 subseg_set (new_seg
, 0);
3459 p
= frag_more (temp
);
3460 new_seg
->flags
|= SEC_IS_COMMON
;
3461 if (! S_IS_DEFINED (symbolP
))
3462 S_SET_SEGMENT (symbolP
, new_seg
);
3464 S_SET_VALUE (symbolP
, (valueT
) temp
);
3466 S_SET_EXTERNAL (symbolP
);
3470 subseg_set (current_section
, current_subsec
);
3473 know (symbolP
->sy_frag
== &zero_address_frag
);
3475 demand_empty_rest_of_line ();
3478 #endif /* ! OBJ_ELF */
3482 /* Handle the .rdata pseudo-op. This is like the usual one, but it
3483 clears alpha_insn_label and restores auto alignment. */
3486 s_alpha_rdata (ignore
)
3491 temp
= get_absolute_expression ();
3492 subseg_new (".rdata", 0);
3493 demand_empty_rest_of_line ();
3494 alpha_insn_label
= NULL
;
3495 alpha_auto_align_on
= 1;
3496 alpha_current_align
= 0;
3503 /* Handle the .sdata pseudo-op. This is like the usual one, but it
3504 clears alpha_insn_label and restores auto alignment. */
3507 s_alpha_sdata (ignore
)
3512 temp
= get_absolute_expression ();
3513 subseg_new (".sdata", 0);
3514 demand_empty_rest_of_line ();
3515 alpha_insn_label
= NULL
;
3516 alpha_auto_align_on
= 1;
3517 alpha_current_align
= 0;
3523 /* Handle the .section pseudo-op. This is like the usual one, but it
3524 clears alpha_insn_label and restores auto alignment. */
3527 s_alpha_section (ignore
)
3530 obj_elf_section (ignore
);
3532 alpha_insn_label
= NULL
;
3533 alpha_auto_align_on
= 1;
3534 alpha_current_align
= 0;
3541 if (ECOFF_DEBUGGING
)
3542 ecoff_directive_ent (0);
3545 char *name
, name_end
;
3546 name
= input_line_pointer
;
3547 name_end
= get_symbol_end ();
3549 if (! is_name_beginner (*name
))
3551 as_warn (_(".ent directive has no name"));
3552 *input_line_pointer
= name_end
;
3558 if (alpha_cur_ent_sym
)
3559 as_warn (_("nested .ent directives"));
3561 sym
= symbol_find_or_make (name
);
3562 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
3563 alpha_cur_ent_sym
= sym
;
3565 /* The .ent directive is sometimes followed by a number. Not sure
3566 what it really means, but ignore it. */
3567 *input_line_pointer
= name_end
;
3569 if (*input_line_pointer
== ',')
3571 input_line_pointer
++;
3574 if (isdigit (*input_line_pointer
) || *input_line_pointer
== '-')
3575 (void) get_absolute_expression ();
3577 demand_empty_rest_of_line ();
3585 if (ECOFF_DEBUGGING
)
3586 ecoff_directive_end (0);
3589 char *name
, name_end
;
3590 name
= input_line_pointer
;
3591 name_end
= get_symbol_end ();
3593 if (! is_name_beginner (*name
))
3595 as_warn (_(".end directive has no name"));
3596 *input_line_pointer
= name_end
;
3602 sym
= symbol_find (name
);
3603 if (sym
!= alpha_cur_ent_sym
)
3604 as_warn (_(".end directive names different symbol than .ent"));
3606 /* Create an expression to calculate the size of the function. */
3609 symbol_get_obj (sym
)->size
=
3610 (expressionS
*) xmalloc (sizeof (expressionS
));
3611 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
3612 symbol_get_obj (sym
)->size
->X_add_symbol
3613 = symbol_new ("L0\001", now_seg
, frag_now_fix (), frag_now
);
3614 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
3615 symbol_get_obj (sym
)->size
->X_add_number
= 0;
3618 alpha_cur_ent_sym
= NULL
;
3620 *input_line_pointer
= name_end
;
3622 demand_empty_rest_of_line ();
3630 if (ECOFF_DEBUGGING
)
3633 ecoff_directive_fmask (0);
3635 ecoff_directive_mask (0);
3638 discard_rest_of_line ();
3642 s_alpha_frame (dummy
)
3645 if (ECOFF_DEBUGGING
)
3646 ecoff_directive_frame (0);
3648 discard_rest_of_line ();
3652 s_alpha_prologue (ignore
)
3658 arg
= get_absolute_expression ();
3659 demand_empty_rest_of_line ();
3661 if (ECOFF_DEBUGGING
)
3662 sym
= ecoff_get_cur_proc_sym ();
3664 sym
= alpha_cur_ent_sym
;
3669 case 0: /* No PV required. */
3670 S_SET_OTHER (sym
, STO_ALPHA_NOPV
);
3672 case 1: /* Std GP load. */
3673 S_SET_OTHER (sym
, STO_ALPHA_STD_GPLOAD
);
3675 case 2: /* Non-std use of PV. */
3679 as_bad (_("Invalid argument %d to .prologue."), arg
);
3685 s_alpha_coff_wrapper (which
)
3688 static void (* const fns
[]) PARAMS ((int)) = {
3689 ecoff_directive_begin
,
3690 ecoff_directive_bend
,
3691 ecoff_directive_def
,
3692 ecoff_directive_dim
,
3693 ecoff_directive_endef
,
3694 ecoff_directive_file
,
3695 ecoff_directive_scl
,
3696 ecoff_directive_tag
,
3697 ecoff_directive_val
,
3698 ecoff_directive_loc
,
3701 assert (which
>= 0 && which
< sizeof(fns
)/sizeof(*fns
));
3703 if (ECOFF_DEBUGGING
)
3707 as_bad (_("ECOFF debugging is disabled."));
3708 ignore_rest_of_line ();
3711 #endif /* OBJ_ELF */
3715 /* Handle the section specific pseudo-op. */
3718 s_alpha_section (secid
)
3722 #define EVAX_SECTION_COUNT 5
3723 static char *section_name
[EVAX_SECTION_COUNT
+1] =
3724 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
3726 if ((secid
<= 0) || (secid
> EVAX_SECTION_COUNT
))
3728 as_fatal (_("Unknown section directive"));
3729 demand_empty_rest_of_line ();
3732 temp
= get_absolute_expression ();
3733 subseg_new (section_name
[secid
], 0);
3734 demand_empty_rest_of_line ();
3735 alpha_insn_label
= NULL
;
3736 alpha_auto_align_on
= 1;
3737 alpha_current_align
= 0;
3741 /* Parse .ent directives. */
3744 s_alpha_ent (ignore
)
3748 expressionS symexpr
;
3750 alpha_evax_proc
.pdsckind
= 0;
3751 alpha_evax_proc
.framereg
= -1;
3752 alpha_evax_proc
.framesize
= 0;
3753 alpha_evax_proc
.rsa_offset
= 0;
3754 alpha_evax_proc
.ra_save
= AXP_REG_RA
;
3755 alpha_evax_proc
.fp_save
= -1;
3756 alpha_evax_proc
.imask
= 0;
3757 alpha_evax_proc
.fmask
= 0;
3758 alpha_evax_proc
.prologue
= 0;
3759 alpha_evax_proc
.type
= 0;
3761 expression (&symexpr
);
3763 if (symexpr
.X_op
!= O_symbol
)
3765 as_fatal (_(".ent directive has no symbol"));
3766 demand_empty_rest_of_line ();
3770 symbol
= make_expr_symbol (&symexpr
);
3771 symbol_get_bfdsym (symbol
)->flags
|= BSF_FUNCTION
;
3772 alpha_evax_proc
.symbol
= symbol
;
3774 demand_empty_rest_of_line ();
3779 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
3782 s_alpha_frame (ignore
)
3787 alpha_evax_proc
.framereg
= tc_get_register (1);
3790 if (*input_line_pointer
++ != ','
3791 || get_absolute_expression_and_terminator (&val
) != ',')
3793 as_warn (_("Bad .frame directive 1./2. param"));
3794 --input_line_pointer
;
3795 demand_empty_rest_of_line ();
3799 alpha_evax_proc
.framesize
= val
;
3801 (void) tc_get_register (1);
3803 if (*input_line_pointer
++ != ',')
3805 as_warn (_("Bad .frame directive 3./4. param"));
3806 --input_line_pointer
;
3807 demand_empty_rest_of_line ();
3810 alpha_evax_proc
.rsa_offset
= get_absolute_expression ();
3816 s_alpha_pdesc (ignore
)
3826 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
3828 if (now_seg
!= alpha_link_section
)
3830 as_bad (_(".pdesc directive not in link (.link) section"));
3831 demand_empty_rest_of_line ();
3835 if ((alpha_evax_proc
.symbol
== 0)
3836 || (!S_IS_DEFINED (alpha_evax_proc
.symbol
)))
3838 as_fatal (_(".pdesc has no matching .ent"));
3839 demand_empty_rest_of_line ();
3843 alpha_evax_proc
.symbol
->sy_obj
= (valueT
)seginfo
->literal_pool_size
;
3846 if (exp
.X_op
!= O_symbol
)
3848 as_warn (_(".pdesc directive has no entry symbol"));
3849 demand_empty_rest_of_line ();
3853 entry_sym
= make_expr_symbol (&exp
);
3854 /* Save bfd symbol of proc desc in function symbol. */
3855 symbol_get_bfdsym (alpha_evax_proc
.symbol
)->udata
.p
3856 = symbol_get_bfdsym (entry_sym
);
3859 if (*input_line_pointer
++ != ',')
3861 as_warn (_("No comma after .pdesc <entryname>"));
3862 demand_empty_rest_of_line ();
3867 name
= input_line_pointer
;
3868 name_end
= get_symbol_end ();
3870 if (strncmp(name
, "stack", 5) == 0)
3872 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_FP_STACK
;
3874 else if (strncmp(name
, "reg", 3) == 0)
3876 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_FP_REGISTER
;
3878 else if (strncmp(name
, "null", 4) == 0)
3880 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_NULL
;
3884 as_fatal (_("unknown procedure kind"));
3885 demand_empty_rest_of_line ();
3889 *input_line_pointer
= name_end
;
3890 demand_empty_rest_of_line ();
3892 #ifdef md_flush_pending_output
3893 md_flush_pending_output ();
3896 frag_align (3, 0, 0);
3898 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3900 seginfo
->literal_pool_size
+= 16;
3902 *p
= alpha_evax_proc
.pdsckind
3903 | ((alpha_evax_proc
.framereg
== 29) ? PDSC_S_M_BASE_REG_IS_FP
: 0);
3904 *(p
+1) = PDSC_S_M_NATIVE
3905 | PDSC_S_M_NO_JACKET
;
3907 switch (alpha_evax_proc
.pdsckind
)
3909 case PDSC_S_K_KIND_NULL
:
3913 case PDSC_S_K_KIND_FP_REGISTER
:
3914 *(p
+2) = alpha_evax_proc
.fp_save
;
3915 *(p
+3) = alpha_evax_proc
.ra_save
;
3917 case PDSC_S_K_KIND_FP_STACK
:
3918 md_number_to_chars (p
+2, (valueT
)alpha_evax_proc
.rsa_offset
, 2);
3920 default: /* impossible */
3925 *(p
+5) = alpha_evax_proc
.type
& 0x0f;
3927 /* Signature offset. */
3928 md_number_to_chars (p
+6, (valueT
)0, 2);
3930 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
+8, 8, &exp
, 0, BFD_RELOC_64
);
3932 if (alpha_evax_proc
.pdsckind
== PDSC_S_K_KIND_NULL
)
3935 /* Add dummy fix to make add_to_link_pool work. */
3937 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3939 seginfo
->literal_pool_size
+= 8;
3941 /* pdesc+16: Size. */
3942 md_number_to_chars (p
, (valueT
)alpha_evax_proc
.framesize
, 4);
3944 md_number_to_chars (p
+4, (valueT
)0, 2);
3947 md_number_to_chars (p
+6, alpha_evax_proc
.prologue
, 2);
3949 if (alpha_evax_proc
.pdsckind
== PDSC_S_K_KIND_FP_REGISTER
)
3952 /* Add dummy fix to make add_to_link_pool work. */
3954 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3956 seginfo
->literal_pool_size
+= 8;
3958 /* pdesc+24: register masks. */
3960 md_number_to_chars (p
, alpha_evax_proc
.imask
, 4);
3961 md_number_to_chars (p
+4, alpha_evax_proc
.fmask
, 4);
3967 /* Support for crash debug on vms. */
3970 s_alpha_name (ignore
)
3975 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
3977 if (now_seg
!= alpha_link_section
)
3979 as_bad (_(".name directive not in link (.link) section"));
3980 demand_empty_rest_of_line ();
3985 if (exp
.X_op
!= O_symbol
)
3987 as_warn (_(".name directive has no symbol"));
3988 demand_empty_rest_of_line ();
3992 demand_empty_rest_of_line ();
3994 #ifdef md_flush_pending_output
3995 md_flush_pending_output ();
3998 frag_align (3, 0, 0);
4000 seginfo
->literal_pool_size
+= 8;
4002 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
, 8, &exp
, 0, BFD_RELOC_64
);
4009 s_alpha_linkage (ignore
)
4015 #ifdef md_flush_pending_output
4016 md_flush_pending_output ();
4020 if (exp
.X_op
!= O_symbol
)
4022 as_fatal (_("No symbol after .linkage"));
4026 p
= frag_more (LKP_S_K_SIZE
);
4027 memset (p
, 0, LKP_S_K_SIZE
);
4028 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, LKP_S_K_SIZE
, &exp
, 0,\
4029 BFD_RELOC_ALPHA_LINKAGE
);
4031 demand_empty_rest_of_line ();
4038 s_alpha_code_address (ignore
)
4044 #ifdef md_flush_pending_output
4045 md_flush_pending_output ();
4049 if (exp
.X_op
!= O_symbol
)
4051 as_fatal (_("No symbol after .code_address"));
4057 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 8, &exp
, 0,\
4058 BFD_RELOC_ALPHA_CODEADDR
);
4060 demand_empty_rest_of_line ();
4067 s_alpha_fp_save (ignore
)
4071 alpha_evax_proc
.fp_save
= tc_get_register (1);
4073 demand_empty_rest_of_line ();
4079 s_alpha_mask (ignore
)
4084 if (get_absolute_expression_and_terminator (&val
) != ',')
4086 as_warn (_("Bad .mask directive"));
4087 --input_line_pointer
;
4091 alpha_evax_proc
.imask
= val
;
4092 (void)get_absolute_expression ();
4094 demand_empty_rest_of_line ();
4101 s_alpha_fmask (ignore
)
4106 if (get_absolute_expression_and_terminator (&val
) != ',')
4108 as_warn (_("Bad .fmask directive"));
4109 --input_line_pointer
;
4113 alpha_evax_proc
.fmask
= val
;
4114 (void) get_absolute_expression ();
4116 demand_empty_rest_of_line ();
4122 s_alpha_end (ignore
)
4127 c
= get_symbol_end ();
4128 *input_line_pointer
= c
;
4129 demand_empty_rest_of_line ();
4130 alpha_evax_proc
.symbol
= 0;
4137 s_alpha_file (ignore
)
4142 static char case_hack
[32];
4144 extern char *demand_copy_string
PARAMS ((int *lenP
));
4146 sprintf (case_hack
, "<CASE:%01d%01d>",
4147 alpha_flag_hash_long_names
, alpha_flag_show_after_trunc
);
4149 s
= symbol_find_or_make (case_hack
);
4150 symbol_get_bfdsym (s
)->flags
|= BSF_FILE
;
4152 get_absolute_expression ();
4153 s
= symbol_find_or_make (demand_copy_string (&length
));
4154 symbol_get_bfdsym (s
)->flags
|= BSF_FILE
;
4155 demand_empty_rest_of_line ();
4159 #endif /* OBJ_EVAX */
4161 /* Handle the .gprel32 pseudo op. */
4164 s_alpha_gprel32 (ignore
)
4177 e
.X_add_symbol
= section_symbol(absolute_section
);
4190 e
.X_add_symbol
= section_symbol (absolute_section
);
4193 e
.X_op
= O_subtract
;
4194 e
.X_op_symbol
= alpha_gp_symbol
;
4202 if (alpha_auto_align_on
&& alpha_current_align
< 2)
4203 alpha_align (2, (char *) NULL
, alpha_insn_label
, 0);
4204 if (alpha_current_align
> 2)
4205 alpha_current_align
= 2;
4206 alpha_insn_label
= NULL
;
4210 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
, 4,
4211 &e
, 0, BFD_RELOC_GPREL32
);
4214 /* Handle floating point allocation pseudo-ops. This is like the
4215 generic vresion, but it makes sure the current label, if any, is
4216 correctly aligned. */
4219 s_alpha_float_cons (type
)
4246 if (alpha_auto_align_on
&& alpha_current_align
< log_size
)
4247 alpha_align (log_size
, (char *) NULL
, alpha_insn_label
, 0);
4248 if (alpha_current_align
> log_size
)
4249 alpha_current_align
= log_size
;
4250 alpha_insn_label
= NULL
;
4255 /* Handle the .proc pseudo op. We don't really do much with it except
4259 s_alpha_proc (is_static
)
4268 /* Takes ".proc name,nargs" */
4270 name
= input_line_pointer
;
4271 c
= get_symbol_end ();
4272 p
= input_line_pointer
;
4273 symbolP
= symbol_find_or_make (name
);
4276 if (*input_line_pointer
!= ',')
4279 as_warn (_("Expected comma after name \"%s\""), name
);
4282 ignore_rest_of_line ();
4286 input_line_pointer
++;
4287 temp
= get_absolute_expression ();
4289 /* symbolP->sy_other = (signed char) temp; */
4290 as_warn (_("unhandled: .proc %s,%d"), name
, temp
);
4291 demand_empty_rest_of_line ();
4294 /* Handle the .set pseudo op. This is used to turn on and off most of
4295 the assembler features. */
4305 name
= input_line_pointer
;
4306 ch
= get_symbol_end ();
4309 if (s
[0] == 'n' && s
[1] == 'o')
4314 if (!strcmp ("reorder", s
))
4316 else if (!strcmp ("at", s
))
4317 alpha_noat_on
= !yesno
;
4318 else if (!strcmp ("macro", s
))
4319 alpha_macros_on
= yesno
;
4320 else if (!strcmp ("move", s
))
4322 else if (!strcmp ("volatile", s
))
4325 as_warn (_("Tried to .set unrecognized mode `%s'"), name
);
4327 *input_line_pointer
= ch
;
4328 demand_empty_rest_of_line ();
4331 /* Handle the .base pseudo op. This changes the assembler's notion of
4332 the $gp register. */
4335 s_alpha_base (ignore
)
4339 if (first_32bit_quadrant
)
4341 /* not fatal, but it might not work in the end */
4342 as_warn (_("File overrides no-base-register option."));
4343 first_32bit_quadrant
= 0;
4348 if (*input_line_pointer
== '$')
4350 input_line_pointer
++;
4351 if (*input_line_pointer
== 'r')
4352 input_line_pointer
++;
4355 alpha_gp_register
= get_absolute_expression ();
4356 if (alpha_gp_register
< 0 || alpha_gp_register
> 31)
4358 alpha_gp_register
= AXP_REG_GP
;
4359 as_warn (_("Bad base register, using $%d."), alpha_gp_register
);
4362 demand_empty_rest_of_line ();
4365 /* Handle the .align pseudo-op. This aligns to a power of two. It
4366 also adjusts any current instruction label. We treat this the same
4367 way the MIPS port does: .align 0 turns off auto alignment. */
4370 s_alpha_align (ignore
)
4375 long max_alignment
= 15;
4377 align
= get_absolute_expression ();
4378 if (align
> max_alignment
)
4380 align
= max_alignment
;
4381 as_bad (_("Alignment too large: %d. assumed"), align
);
4385 as_warn (_("Alignment negative: 0 assumed"));
4389 if (*input_line_pointer
== ',')
4391 input_line_pointer
++;
4392 fill
= get_absolute_expression ();
4400 alpha_auto_align_on
= 1;
4401 alpha_align (align
, pfill
, alpha_insn_label
, 1);
4405 alpha_auto_align_on
= 0;
4408 demand_empty_rest_of_line ();
4411 /* Hook the normal string processor to reset known alignment. */
4414 s_alpha_stringer (terminate
)
4417 alpha_current_align
= 0;
4418 alpha_insn_label
= NULL
;
4419 stringer (terminate
);
4422 /* Hook the normal space processing to reset known alignment. */
4425 s_alpha_space (ignore
)
4428 alpha_current_align
= 0;
4429 alpha_insn_label
= NULL
;
4433 /* Hook into cons for auto-alignment. */
4436 alpha_cons_align (size
)
4442 while ((size
>>= 1) != 0)
4445 if (alpha_auto_align_on
&& alpha_current_align
< log_size
)
4446 alpha_align (log_size
, (char *) NULL
, alpha_insn_label
, 0);
4447 if (alpha_current_align
> log_size
)
4448 alpha_current_align
= log_size
;
4449 alpha_insn_label
= NULL
;
4452 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
4453 pseudos. We just turn off auto-alignment and call down to cons. */
4456 s_alpha_ucons (bytes
)
4459 int hold
= alpha_auto_align_on
;
4460 alpha_auto_align_on
= 0;
4462 alpha_auto_align_on
= hold
;
4465 /* Switch the working cpu type. */
4468 s_alpha_arch (ignored
)
4472 const struct cpu_type
*p
;
4475 name
= input_line_pointer
;
4476 ch
= get_symbol_end ();
4478 for (p
= cpu_types
; p
->name
; ++p
)
4479 if (strcmp(name
, p
->name
) == 0)
4481 alpha_target_name
= p
->name
, alpha_target
= p
->flags
;
4484 as_warn("Unknown CPU identifier `%s'", name
);
4487 *input_line_pointer
= ch
;
4488 demand_empty_rest_of_line ();
4494 /* print token expression with alpha specific extension. */
4497 alpha_print_token(f
, exp
)
4499 const expressionS
*exp
;
4509 expressionS nexp
= *exp
;
4510 nexp
.X_op
= O_register
;
4511 print_expr (f
, &nexp
);
4516 print_expr (f
, exp
);
4523 /* The target specific pseudo-ops which we support. */
4525 const pseudo_typeS md_pseudo_table
[] =
4528 {"comm", s_alpha_comm
, 0}, /* osf1 compiler does this */
4529 {"rdata", s_alpha_rdata
, 0},
4531 {"text", s_alpha_text
, 0},
4532 {"data", s_alpha_data
, 0},
4534 {"sdata", s_alpha_sdata
, 0},
4537 {"section", s_alpha_section
, 0},
4538 {"section.s", s_alpha_section
, 0},
4539 {"sect", s_alpha_section
, 0},
4540 {"sect.s", s_alpha_section
, 0},
4543 { "pdesc", s_alpha_pdesc
, 0},
4544 { "name", s_alpha_name
, 0},
4545 { "linkage", s_alpha_linkage
, 0},
4546 { "code_address", s_alpha_code_address
, 0},
4547 { "ent", s_alpha_ent
, 0},
4548 { "frame", s_alpha_frame
, 0},
4549 { "fp_save", s_alpha_fp_save
, 0},
4550 { "mask", s_alpha_mask
, 0},
4551 { "fmask", s_alpha_fmask
, 0},
4552 { "end", s_alpha_end
, 0},
4553 { "file", s_alpha_file
, 0},
4554 { "rdata", s_alpha_section
, 1},
4555 { "comm", s_alpha_comm
, 0},
4556 { "link", s_alpha_section
, 3},
4557 { "ctors", s_alpha_section
, 4},
4558 { "dtors", s_alpha_section
, 5},
4561 /* Frame related pseudos. */
4562 {"ent", s_alpha_ent
, 0},
4563 {"end", s_alpha_end
, 0},
4564 {"mask", s_alpha_mask
, 0},
4565 {"fmask", s_alpha_mask
, 1},
4566 {"frame", s_alpha_frame
, 0},
4567 {"prologue", s_alpha_prologue
, 0},
4568 /* COFF debugging related pseudos. */
4569 {"begin", s_alpha_coff_wrapper
, 0},
4570 {"bend", s_alpha_coff_wrapper
, 1},
4571 {"def", s_alpha_coff_wrapper
, 2},
4572 {"dim", s_alpha_coff_wrapper
, 3},
4573 {"endef", s_alpha_coff_wrapper
, 4},
4574 {"file", s_alpha_coff_wrapper
, 5},
4575 {"scl", s_alpha_coff_wrapper
, 6},
4576 {"tag", s_alpha_coff_wrapper
, 7},
4577 {"val", s_alpha_coff_wrapper
, 8},
4578 {"loc", s_alpha_coff_wrapper
, 9},
4580 {"prologue", s_ignore
, 0},
4582 {"gprel32", s_alpha_gprel32
, 0},
4583 {"t_floating", s_alpha_float_cons
, 'd'},
4584 {"s_floating", s_alpha_float_cons
, 'f'},
4585 {"f_floating", s_alpha_float_cons
, 'F'},
4586 {"g_floating", s_alpha_float_cons
, 'G'},
4587 {"d_floating", s_alpha_float_cons
, 'D'},
4589 {"proc", s_alpha_proc
, 0},
4590 {"aproc", s_alpha_proc
, 1},
4591 {"set", s_alpha_set
, 0},
4592 {"reguse", s_ignore
, 0},
4593 {"livereg", s_ignore
, 0},
4594 {"base", s_alpha_base
, 0}, /*??*/
4595 {"option", s_ignore
, 0},
4596 {"aent", s_ignore
, 0},
4597 {"ugen", s_ignore
, 0},
4598 {"eflag", s_ignore
, 0},
4600 {"align", s_alpha_align
, 0},
4601 {"double", s_alpha_float_cons
, 'd'},
4602 {"float", s_alpha_float_cons
, 'f'},
4603 {"single", s_alpha_float_cons
, 'f'},
4604 {"ascii", s_alpha_stringer
, 0},
4605 {"asciz", s_alpha_stringer
, 1},
4606 {"string", s_alpha_stringer
, 1},
4607 {"space", s_alpha_space
, 0},
4608 {"skip", s_alpha_space
, 0},
4609 {"zero", s_alpha_space
, 0},
4611 /* Unaligned data pseudos. */
4612 {"uword", s_alpha_ucons
, 2},
4613 {"ulong", s_alpha_ucons
, 4},
4614 {"uquad", s_alpha_ucons
, 8},
4617 /* Dwarf wants these versions of unaligned. */
4618 {"2byte", s_alpha_ucons
, 2},
4619 {"4byte", s_alpha_ucons
, 4},
4620 {"8byte", s_alpha_ucons
, 8},
4623 /* We don't do any optimizing, so we can safely ignore these. */
4624 {"noalias", s_ignore
, 0},
4625 {"alias", s_ignore
, 0},
4627 {"arch", s_alpha_arch
, 0},
4633 /* Build a BFD section with its flags set appropriately for the .lita,
4634 .lit8, or .lit4 sections. */
4637 create_literal_section (name
, secp
, symp
)
4642 segT current_section
= now_seg
;
4643 int current_subsec
= now_subseg
;
4646 *secp
= new_sec
= subseg_new (name
, 0);
4647 subseg_set (current_section
, current_subsec
);
4648 bfd_set_section_alignment (stdoutput
, new_sec
, 4);
4649 bfd_set_section_flags (stdoutput
, new_sec
,
4650 SEC_RELOC
| SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
4653 S_CLEAR_EXTERNAL (*symp
= section_symbol (new_sec
));
4658 /* @@@ GP selection voodoo. All of this seems overly complicated and
4659 unnecessary; which is the primary reason it's for ECOFF only. */
4668 vma
= bfd_get_section_vma (foo
, sec
);
4669 if (vma
&& vma
< alpha_gp_value
)
4670 alpha_gp_value
= vma
;
4676 assert (alpha_gp_value
== 0);
4678 /* Get minus-one in whatever width... */
4679 alpha_gp_value
= 0; alpha_gp_value
--;
4681 /* Select the smallest VMA of these existing sections. */
4682 maybe_set_gp (alpha_lita_section
);
4684 /* These were disabled before -- should we use them? */
4685 maybe_set_gp (sdata
);
4686 maybe_set_gp (lit8_sec
);
4687 maybe_set_gp (lit4_sec
);
4690 /* @@ Will a simple 0x8000 work here? If not, why not? */
4691 #define GP_ADJUSTMENT (0x8000 - 0x10)
4693 alpha_gp_value
+= GP_ADJUSTMENT
;
4695 S_SET_VALUE (alpha_gp_symbol
, alpha_gp_value
);
4698 printf (_("Chose GP value of %lx\n"), alpha_gp_value
);
4701 #endif /* OBJ_ECOFF */
4703 /* Called internally to handle all alignment needs. This takes care
4704 of eliding calls to frag_align if'n the cached current alignment
4705 says we've already got it, as well as taking care of the auto-align
4706 feature wrt labels. */
4709 alpha_align (n
, pfill
, label
, force
)
4715 if (alpha_current_align
>= n
)
4721 && (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
) != 0)
4723 static char const unop
[4] = { 0x00, 0x00, 0xe0, 0x2f };
4724 static char const nopunop
[8] = {
4725 0x1f, 0x04, 0xff, 0x47,
4726 0x00, 0x00, 0xe0, 0x2f
4729 /* First, make sure we're on a four-byte boundary, in case
4730 someone has been putting .byte values into the text
4731 section. The DEC assembler silently fills with unaligned
4732 no-op instructions. This will zero-fill, then nop-fill
4733 with proper alignment. */
4734 if (alpha_current_align
< 2)
4735 frag_align (2, 0, 0);
4736 if (alpha_current_align
< 3)
4737 frag_align_pattern (3, unop
, sizeof unop
, 0);
4739 frag_align_pattern (n
, nopunop
, sizeof nopunop
, 0);
4742 frag_align (n
, 0, 0);
4745 frag_align (n
, *pfill
, 0);
4747 alpha_current_align
= n
;
4751 assert (S_GET_SEGMENT (label
) == now_seg
);
4752 symbol_set_frag (label
, frag_now
);
4753 S_SET_VALUE (label
, (valueT
) frag_now_fix ());
4756 record_alignment(now_seg
, n
);
4758 /* ??? if alpha_flag_relax && force && elf, record the requested alignment
4759 in a reloc for the linker to see. */
4762 /* The Alpha has support for some VAX floating point types, as well as for
4763 IEEE floating point. We consider IEEE to be the primary floating point
4764 format, and sneak in the VAX floating point support here. */
4765 #define md_atof vax_md_atof
4766 #include "config/atof-vax.c"