1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Carnegie Mellon University, 1993.
5 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
6 Modified by Ken Raeburn for gas-2.x and ECOFF support.
7 Modified by Richard Henderson for ELF support.
8 Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support.
10 This file is part of GAS, the GNU Assembler.
12 GAS is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
17 GAS is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with GAS; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
28 * Mach Operating System
29 * Copyright (c) 1993 Carnegie Mellon University
30 * All Rights Reserved.
32 * Permission to use, copy, modify and distribute this software and its
33 * documentation is hereby granted, provided that both the copyright
34 * notice and this permission notice appear in all copies of the
35 * software, derivative works or modified versions, and any portions
36 * thereof, and that both notices appear in supporting documentation.
38 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
39 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
40 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
42 * Carnegie Mellon requests users of this software to return to
44 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
45 * School of Computer Science
46 * Carnegie Mellon University
47 * Pittsburgh PA 15213-3890
49 * any improvements or extensions that they make and grant Carnegie the
50 * rights to redistribute these changes.
55 #include "struc-symbol.h"
58 #include "opcode/alpha.h"
61 #include "elf/alpha.h"
62 #include "dwarf2dbg.h"
65 #include "safe-ctype.h"
69 #define TOKENIZE_ERROR -1
70 #define TOKENIZE_ERROR_REPORT -2
72 #define MAX_INSN_FIXUPS 2
73 #define MAX_INSN_ARGS 5
78 bfd_reloc_code_real_type reloc
;
85 struct alpha_fixup fixups
[MAX_INSN_FIXUPS
];
103 void (*emit
) PARAMS ((const expressionS
*, int, const PTR
));
105 enum alpha_macro_arg argsets
[16];
108 /* Extra expression types. */
110 #define O_pregister O_md1 /* O_register, in parentheses */
111 #define O_cpregister O_md2 /* + a leading comma */
113 /* The alpha_reloc_op table below depends on the ordering of these. */
114 #define O_literal O_md3 /* !literal relocation */
115 #define O_lituse_addr O_md4 /* !lituse_addr relocation */
116 #define O_lituse_base O_md5 /* !lituse_base relocation */
117 #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation */
118 #define O_lituse_jsr O_md7 /* !lituse_jsr relocation */
119 #define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation */
120 #define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation */
121 #define O_gpdisp O_md10 /* !gpdisp relocation */
122 #define O_gprelhigh O_md11 /* !gprelhigh relocation */
123 #define O_gprellow O_md12 /* !gprellow relocation */
124 #define O_gprel O_md13 /* !gprel relocation */
125 #define O_samegp O_md14 /* !samegp relocation */
126 #define O_tlsgd O_md15 /* !tlsgd relocation */
127 #define O_tlsldm O_md16 /* !tlsldm relocation */
128 #define O_gotdtprel O_md17 /* !gotdtprel relocation */
129 #define O_dtprelhi O_md18 /* !dtprelhi relocation */
130 #define O_dtprello O_md19 /* !dtprello relocation */
131 #define O_dtprel O_md20 /* !dtprel relocation */
132 #define O_gottprel O_md21 /* !gottprel relocation */
133 #define O_tprelhi O_md22 /* !tprelhi relocation */
134 #define O_tprello O_md23 /* !tprello relocation */
135 #define O_tprel O_md24 /* !tprel relocation */
137 #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1)
138 #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2)
139 #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3)
140 #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4)
141 #define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5)
142 #define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6)
144 #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel)
146 /* Macros for extracting the type and number of encoded register tokens. */
148 #define is_ir_num(x) (((x) & 32) == 0)
149 #define is_fpr_num(x) (((x) & 32) != 0)
150 #define regno(x) ((x) & 31)
152 /* Something odd inherited from the old assembler. */
154 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
155 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
157 /* Predicates for 16- and 32-bit ranges */
158 /* XXX: The non-shift version appears to trigger a compiler bug when
159 cross-assembling from x86 w/ gcc 2.7.2. */
162 #define range_signed_16(x) \
163 (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1)
164 #define range_signed_32(x) \
165 (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1)
167 #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \
168 (offsetT) (x) <= (offsetT) 0x7FFF)
169 #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \
170 (offsetT) (x) <= (offsetT) 0x7FFFFFFF)
173 /* Macros for sign extending from 16- and 32-bits. */
174 /* XXX: The cast macros will work on all the systems that I care about,
175 but really a predicate should be found to use the non-cast forms. */
178 #define sign_extend_16(x) ((short) (x))
179 #define sign_extend_32(x) ((int) (x))
181 #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000)
182 #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \
183 ^ 0x80000000) - 0x80000000)
186 /* Macros to build tokens. */
188 #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
189 (t).X_op = O_register, \
190 (t).X_add_number = (r))
191 #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \
192 (t).X_op = O_pregister, \
193 (t).X_add_number = (r))
194 #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \
195 (t).X_op = O_cpregister, \
196 (t).X_add_number = (r))
197 #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \
198 (t).X_op = O_register, \
199 (t).X_add_number = (r) + 32)
200 #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \
201 (t).X_op = O_symbol, \
202 (t).X_add_symbol = (s), \
203 (t).X_add_number = (a))
204 #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \
205 (t).X_op = O_constant, \
206 (t).X_add_number = (n))
208 /* Prototypes for all local functions. */
210 static struct alpha_reloc_tag
*get_alpha_reloc_tag
PARAMS ((long));
211 static void alpha_adjust_relocs
PARAMS ((bfd
*, asection
*, PTR
));
213 static int tokenize_arguments
PARAMS ((char *, expressionS
*, int));
214 static const struct alpha_opcode
*find_opcode_match
215 PARAMS ((const struct alpha_opcode
*, const expressionS
*, int *, int *));
216 static const struct alpha_macro
*find_macro_match
217 PARAMS ((const struct alpha_macro
*, const expressionS
*, int *));
218 static unsigned insert_operand
219 PARAMS ((unsigned, const struct alpha_operand
*, offsetT
, char *, unsigned));
220 static void assemble_insn
221 PARAMS ((const struct alpha_opcode
*, const expressionS
*, int,
222 struct alpha_insn
*, bfd_reloc_code_real_type
));
223 static void emit_insn
PARAMS ((struct alpha_insn
*));
224 static void assemble_tokens_to_insn
225 PARAMS ((const char *, const expressionS
*, int, struct alpha_insn
*));
226 static void assemble_tokens
227 PARAMS ((const char *, const expressionS
*, int, int));
229 static long load_expression
230 PARAMS ((int, const expressionS
*, int *, expressionS
*));
232 static void emit_ldgp
PARAMS ((const expressionS
*, int, const PTR
));
233 static void emit_division
PARAMS ((const expressionS
*, int, const PTR
));
234 static void emit_lda
PARAMS ((const expressionS
*, int, const PTR
));
235 static void emit_ldah
PARAMS ((const expressionS
*, int, const PTR
));
236 static void emit_ir_load
PARAMS ((const expressionS
*, int, const PTR
));
237 static void emit_loadstore
PARAMS ((const expressionS
*, int, const PTR
));
238 static void emit_jsrjmp
PARAMS ((const expressionS
*, int, const PTR
));
239 static void emit_ldX
PARAMS ((const expressionS
*, int, const PTR
));
240 static void emit_ldXu
PARAMS ((const expressionS
*, int, const PTR
));
241 static void emit_uldX
PARAMS ((const expressionS
*, int, const PTR
));
242 static void emit_uldXu
PARAMS ((const expressionS
*, int, const PTR
));
243 static void emit_ldil
PARAMS ((const expressionS
*, int, const PTR
));
244 static void emit_stX
PARAMS ((const expressionS
*, int, const PTR
));
245 static void emit_ustX
PARAMS ((const expressionS
*, int, const PTR
));
246 static void emit_sextX
PARAMS ((const expressionS
*, int, const PTR
));
247 static void emit_retjcr
PARAMS ((const expressionS
*, int, const PTR
));
249 static void s_alpha_text
PARAMS ((int));
250 static void s_alpha_data
PARAMS ((int));
252 static void s_alpha_comm
PARAMS ((int));
253 static void s_alpha_rdata
PARAMS ((int));
256 static void s_alpha_sdata
PARAMS ((int));
259 static void s_alpha_section
PARAMS ((int));
260 static void s_alpha_ent
PARAMS ((int));
261 static void s_alpha_end
PARAMS ((int));
262 static void s_alpha_mask
PARAMS ((int));
263 static void s_alpha_frame
PARAMS ((int));
264 static void s_alpha_prologue
PARAMS ((int));
265 static void s_alpha_file
PARAMS ((int));
266 static void s_alpha_loc
PARAMS ((int));
267 static void s_alpha_stab
PARAMS ((int));
268 static void s_alpha_coff_wrapper
PARAMS ((int));
271 static void s_alpha_section
PARAMS ((int));
273 static void s_alpha_gprel32
PARAMS ((int));
274 static void s_alpha_float_cons
PARAMS ((int));
275 static void s_alpha_proc
PARAMS ((int));
276 static void s_alpha_set
PARAMS ((int));
277 static void s_alpha_base
PARAMS ((int));
278 static void s_alpha_align
PARAMS ((int));
279 static void s_alpha_stringer
PARAMS ((int));
280 static void s_alpha_space
PARAMS ((int));
281 static void s_alpha_ucons
PARAMS ((int));
282 static void s_alpha_arch
PARAMS ((int));
284 static void create_literal_section
PARAMS ((const char *, segT
*, symbolS
**));
286 static void select_gp_value
PARAMS ((void));
288 static void alpha_align
PARAMS ((int, char *, symbolS
*, int));
290 /* Generic assembler global variables which must be defined by all
293 /* Characters which always start a comment. */
294 const char comment_chars
[] = "#";
296 /* Characters which start a comment at the beginning of a line. */
297 const char line_comment_chars
[] = "#";
299 /* Characters which may be used to separate multiple commands on a
301 const char line_separator_chars
[] = ";";
303 /* Characters which are used to indicate an exponent in a floating
305 const char EXP_CHARS
[] = "eE";
307 /* Characters which mean that a number is a floating point constant,
310 const char FLT_CHARS
[] = "dD";
312 /* XXX: Do all of these really get used on the alpha?? */
313 char FLT_CHARS
[] = "rRsSfFdDxXpP";
317 const char *md_shortopts
= "Fm:g+1h:HG:";
319 const char *md_shortopts
= "Fm:gG:";
322 struct option md_longopts
[] =
324 #define OPTION_32ADDR (OPTION_MD_BASE)
325 { "32addr", no_argument
, NULL
, OPTION_32ADDR
},
326 #define OPTION_RELAX (OPTION_32ADDR + 1)
327 { "relax", no_argument
, NULL
, OPTION_RELAX
},
329 #define OPTION_MDEBUG (OPTION_RELAX + 1)
330 #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
331 { "mdebug", no_argument
, NULL
, OPTION_MDEBUG
},
332 { "no-mdebug", no_argument
, NULL
, OPTION_NO_MDEBUG
},
334 { NULL
, no_argument
, NULL
, 0 }
337 size_t md_longopts_size
= sizeof (md_longopts
);
341 #define AXP_REG_R16 16
342 #define AXP_REG_R17 17
344 #define AXP_REG_T9 22
346 #define AXP_REG_T10 23
348 #define AXP_REG_T11 24
350 #define AXP_REG_T12 25
351 #define AXP_REG_AI 25
353 #define AXP_REG_FP 29
356 #define AXP_REG_GP AXP_REG_PV
357 #endif /* OBJ_EVAX */
359 /* The cpu for which we are generating code. */
360 static unsigned alpha_target
= AXP_OPCODE_BASE
;
361 static const char *alpha_target_name
= "<all>";
363 /* The hash table of instruction opcodes. */
364 static struct hash_control
*alpha_opcode_hash
;
366 /* The hash table of macro opcodes. */
367 static struct hash_control
*alpha_macro_hash
;
370 /* The $gp relocation symbol. */
371 static symbolS
*alpha_gp_symbol
;
373 /* XXX: what is this, and why is it exported? */
374 valueT alpha_gp_value
;
377 /* The current $gp register. */
378 static int alpha_gp_register
= AXP_REG_GP
;
380 /* A table of the register symbols. */
381 static symbolS
*alpha_register_table
[64];
383 /* Constant sections, or sections of constants. */
385 static segT alpha_lita_section
;
388 static segT alpha_link_section
;
389 static segT alpha_ctors_section
;
390 static segT alpha_dtors_section
;
392 static segT alpha_lit8_section
;
394 /* Symbols referring to said sections. */
396 static symbolS
*alpha_lita_symbol
;
399 static symbolS
*alpha_link_symbol
;
400 static symbolS
*alpha_ctors_symbol
;
401 static symbolS
*alpha_dtors_symbol
;
403 static symbolS
*alpha_lit8_symbol
;
405 /* Literal for .litX+0x8000 within .lita. */
407 static offsetT alpha_lit8_literal
;
411 /* The active .ent symbol. */
412 static symbolS
*alpha_cur_ent_sym
;
415 /* Is the assembler not allowed to use $at? */
416 static int alpha_noat_on
= 0;
418 /* Are macros enabled? */
419 static int alpha_macros_on
= 1;
421 /* Are floats disabled? */
422 static int alpha_nofloats_on
= 0;
424 /* Are addresses 32 bit? */
425 static int alpha_addr32_on
= 0;
427 /* Symbol labelling the current insn. When the Alpha gas sees
430 and the section happens to not be on an eight byte boundary, it
431 will align both the symbol and the .quad to an eight byte boundary. */
432 static symbolS
*alpha_insn_label
;
434 /* Whether we should automatically align data generation pseudo-ops.
435 .align 0 will turn this off. */
436 static int alpha_auto_align_on
= 1;
438 /* The known current alignment of the current section. */
439 static int alpha_current_align
;
441 /* These are exported to ECOFF code. */
442 unsigned long alpha_gprmask
, alpha_fprmask
;
444 /* Whether the debugging option was seen. */
445 static int alpha_debug
;
448 /* Whether we are emitting an mdebug section. */
449 int alpha_flag_mdebug
= -1;
452 /* Don't fully resolve relocations, allowing code movement in the linker. */
453 static int alpha_flag_relax
;
455 /* What value to give to bfd_set_gp_size. */
456 static int g_switch_value
= 8;
459 /* Collect information about current procedure here. */
461 symbolS
*symbol
; /* proc pdesc symbol */
463 int framereg
; /* register for frame pointer */
464 int framesize
; /* size of frame */
474 static int alpha_flag_hash_long_names
= 0; /* -+ */
475 static int alpha_flag_show_after_trunc
= 0; /* -H */
477 /* If the -+ switch is given, then a hash is appended to any name that is
478 longer than 64 characters, else longer symbol names are truncated. */
483 /* A table to map the spelling of a relocation operand into an appropriate
484 bfd_reloc_code_real_type type. The table is assumed to be ordered such
485 that op-O_literal indexes into it. */
487 #define ALPHA_RELOC_TABLE(op) \
488 (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
490 : (int) (op) - (int) O_literal) ])
492 #define DEF(NAME, RELOC, REQ, ALLOW) \
493 { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
495 static const struct alpha_reloc_op_tag
497 const char *name
; /* string to lookup */
498 size_t length
; /* size of the string */
499 operatorT op
; /* which operator to use */
500 bfd_reloc_code_real_type reloc
; /* relocation before frob */
501 unsigned int require_seq
: 1; /* require a sequence number */
502 unsigned int allow_seq
: 1; /* allow a sequence number */
506 DEF(literal
, BFD_RELOC_ALPHA_ELF_LITERAL
, 0, 1),
507 DEF(lituse_addr
, DUMMY_RELOC_LITUSE_ADDR
, 1, 1),
508 DEF(lituse_base
, DUMMY_RELOC_LITUSE_BASE
, 1, 1),
509 DEF(lituse_bytoff
, DUMMY_RELOC_LITUSE_BYTOFF
, 1, 1),
510 DEF(lituse_jsr
, DUMMY_RELOC_LITUSE_JSR
, 1, 1),
511 DEF(lituse_tlsgd
, DUMMY_RELOC_LITUSE_TLSGD
, 1, 1),
512 DEF(lituse_tlsldm
, DUMMY_RELOC_LITUSE_TLSLDM
, 1, 1),
513 DEF(gpdisp
, BFD_RELOC_ALPHA_GPDISP
, 1, 1),
514 DEF(gprelhigh
, BFD_RELOC_ALPHA_GPREL_HI16
, 0, 0),
515 DEF(gprellow
, BFD_RELOC_ALPHA_GPREL_LO16
, 0, 0),
516 DEF(gprel
, BFD_RELOC_GPREL16
, 0, 0),
517 DEF(samegp
, BFD_RELOC_ALPHA_BRSGP
, 0, 0),
518 DEF(tlsgd
, BFD_RELOC_ALPHA_TLSGD
, 0, 1),
519 DEF(tlsldm
, BFD_RELOC_ALPHA_TLSLDM
, 0, 1),
520 DEF(gotdtprel
, BFD_RELOC_ALPHA_GOTDTPREL16
, 0, 0),
521 DEF(dtprelhi
, BFD_RELOC_ALPHA_DTPREL_HI16
, 0, 0),
522 DEF(dtprello
, BFD_RELOC_ALPHA_DTPREL_LO16
, 0, 0),
523 DEF(dtprel
, BFD_RELOC_ALPHA_DTPREL16
, 0, 0),
524 DEF(gottprel
, BFD_RELOC_ALPHA_GOTTPREL16
, 0, 0),
525 DEF(tprelhi
, BFD_RELOC_ALPHA_TPREL_HI16
, 0, 0),
526 DEF(tprello
, BFD_RELOC_ALPHA_TPREL_LO16
, 0, 0),
527 DEF(tprel
, BFD_RELOC_ALPHA_TPREL16
, 0, 0),
532 static const int alpha_num_reloc_op
533 = sizeof (alpha_reloc_op
) / sizeof (*alpha_reloc_op
);
534 #endif /* RELOC_OP_P */
536 /* Maximum # digits needed to hold the largest sequence # */
537 #define ALPHA_RELOC_DIGITS 25
539 /* Structure to hold explict sequence information. */
540 struct alpha_reloc_tag
542 fixS
*master
; /* the literal reloc */
543 fixS
*slaves
; /* head of linked list of lituses */
544 segT segment
; /* segment relocs are in or undefined_section*/
545 long sequence
; /* sequence # */
546 unsigned n_master
; /* # of literals */
547 unsigned n_slaves
; /* # of lituses */
548 unsigned saw_tlsgd
: 1; /* true if ... */
549 unsigned saw_tlsldm
: 1;
550 unsigned saw_lu_tlsgd
: 1;
551 unsigned saw_lu_tlsldm
: 1;
552 unsigned multi_section_p
: 1; /* true if more than one section was used */
553 char string
[1]; /* printable form of sequence to hash with */
556 /* Hash table to link up literals with the appropriate lituse */
557 static struct hash_control
*alpha_literal_hash
;
559 /* Sequence numbers for internal use by macros. */
560 static long next_sequence_num
= -1;
562 /* A table of CPU names and opcode sets. */
564 static const struct cpu_type
571 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
572 This supports usage under DU 4.0b that does ".arch ev4", and
573 usage in MILO that does -m21064. Probably something more
574 specific like -m21064-pal should be used, but oh well. */
576 { "21064", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
577 { "21064a", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
578 { "21066", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
579 { "21068", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
580 { "21164", AXP_OPCODE_BASE
|AXP_OPCODE_EV5
},
581 { "21164a", AXP_OPCODE_BASE
|AXP_OPCODE_EV5
|AXP_OPCODE_BWX
},
582 { "21164pc", (AXP_OPCODE_BASE
|AXP_OPCODE_EV5
|AXP_OPCODE_BWX
584 { "21264", (AXP_OPCODE_BASE
|AXP_OPCODE_EV6
|AXP_OPCODE_BWX
585 |AXP_OPCODE_MAX
|AXP_OPCODE_CIX
) },
586 { "21264a", (AXP_OPCODE_BASE
|AXP_OPCODE_EV6
|AXP_OPCODE_BWX
587 |AXP_OPCODE_MAX
|AXP_OPCODE_CIX
) },
588 { "21264b", (AXP_OPCODE_BASE
|AXP_OPCODE_EV6
|AXP_OPCODE_BWX
589 |AXP_OPCODE_MAX
|AXP_OPCODE_CIX
) },
591 { "ev4", AXP_OPCODE_BASE
},
592 { "ev45", AXP_OPCODE_BASE
},
593 { "lca45", AXP_OPCODE_BASE
},
594 { "ev5", AXP_OPCODE_BASE
},
595 { "ev56", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
},
596 { "pca56", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
},
597 { "ev6", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
|AXP_OPCODE_CIX
},
598 { "ev67", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
|AXP_OPCODE_CIX
},
599 { "ev68", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
|AXP_OPCODE_CIX
},
601 { "all", AXP_OPCODE_BASE
},
605 /* The macro table */
607 static const struct alpha_macro alpha_macros
[] =
609 /* Load/Store macros */
610 { "lda", emit_lda
, NULL
,
611 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
612 { "ldah", emit_ldah
, NULL
,
613 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
615 { "ldl", emit_ir_load
, "ldl",
616 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
617 { "ldl_l", emit_ir_load
, "ldl_l",
618 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
619 { "ldq", emit_ir_load
, "ldq",
620 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
621 { "ldq_l", emit_ir_load
, "ldq_l",
622 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
623 { "ldq_u", emit_ir_load
, "ldq_u",
624 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
625 { "ldf", emit_loadstore
, "ldf",
626 { MACRO_FPR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
627 { "ldg", emit_loadstore
, "ldg",
628 { MACRO_FPR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
629 { "lds", emit_loadstore
, "lds",
630 { MACRO_FPR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
631 { "ldt", emit_loadstore
, "ldt",
632 { MACRO_FPR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
634 { "ldb", emit_ldX
, (PTR
) 0,
635 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
636 { "ldbu", emit_ldXu
, (PTR
) 0,
637 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
638 { "ldw", emit_ldX
, (PTR
) 1,
639 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
640 { "ldwu", emit_ldXu
, (PTR
) 1,
641 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
643 { "uldw", emit_uldX
, (PTR
) 1,
644 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
645 { "uldwu", emit_uldXu
, (PTR
) 1,
646 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
647 { "uldl", emit_uldX
, (PTR
) 2,
648 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
649 { "uldlu", emit_uldXu
, (PTR
) 2,
650 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
651 { "uldq", emit_uldXu
, (PTR
) 3,
652 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
654 { "ldgp", emit_ldgp
, NULL
,
655 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
} },
657 { "ldi", emit_lda
, NULL
,
658 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
659 { "ldil", emit_ldil
, NULL
,
660 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
661 { "ldiq", emit_lda
, NULL
,
662 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
664 { "ldif" emit_ldiq
, NULL
,
665 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
666 { "ldid" emit_ldiq
, NULL
,
667 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
668 { "ldig" emit_ldiq
, NULL
,
669 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
670 { "ldis" emit_ldiq
, NULL
,
671 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
672 { "ldit" emit_ldiq
, NULL
,
673 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
676 { "stl", emit_loadstore
, "stl",
677 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
678 { "stl_c", emit_loadstore
, "stl_c",
679 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
680 { "stq", emit_loadstore
, "stq",
681 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
682 { "stq_c", emit_loadstore
, "stq_c",
683 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
684 { "stq_u", emit_loadstore
, "stq_u",
685 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
686 { "stf", emit_loadstore
, "stf",
687 { MACRO_FPR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
688 { "stg", emit_loadstore
, "stg",
689 { MACRO_FPR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
690 { "sts", emit_loadstore
, "sts",
691 { MACRO_FPR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
692 { "stt", emit_loadstore
, "stt",
693 { MACRO_FPR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
695 { "stb", emit_stX
, (PTR
) 0,
696 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
697 { "stw", emit_stX
, (PTR
) 1,
698 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
699 { "ustw", emit_ustX
, (PTR
) 1,
700 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
701 { "ustl", emit_ustX
, (PTR
) 2,
702 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
703 { "ustq", emit_ustX
, (PTR
) 3,
704 { MACRO_IR
, MACRO_EXP
, MACRO_OPIR
, MACRO_EOA
} },
706 /* Arithmetic macros */
708 { "absl" emit_absl
, 1, { IR
} },
709 { "absl" emit_absl
, 2, { IR
, IR
} },
710 { "absl" emit_absl
, 2, { EXP
, IR
} },
711 { "absq" emit_absq
, 1, { IR
} },
712 { "absq" emit_absq
, 2, { IR
, IR
} },
713 { "absq" emit_absq
, 2, { EXP
, IR
} },
716 { "sextb", emit_sextX
, (PTR
) 0,
717 { MACRO_IR
, MACRO_IR
, MACRO_EOA
,
719 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
720 { "sextw", emit_sextX
, (PTR
) 1,
721 { MACRO_IR
, MACRO_IR
, MACRO_EOA
,
723 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
725 { "divl", emit_division
, "__divl",
726 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
727 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
728 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
729 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
730 { "divlu", emit_division
, "__divlu",
731 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
732 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
733 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
734 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
735 { "divq", emit_division
, "__divq",
736 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
737 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
738 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
739 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
740 { "divqu", emit_division
, "__divqu",
741 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
742 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
743 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
744 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
745 { "reml", emit_division
, "__reml",
746 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
747 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
748 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
749 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
750 { "remlu", emit_division
, "__remlu",
751 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
752 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
753 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
754 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
755 { "remq", emit_division
, "__remq",
756 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
757 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
758 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
759 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
760 { "remqu", emit_division
, "__remqu",
761 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
762 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
763 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
764 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
766 { "jsr", emit_jsrjmp
, "jsr",
767 { MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
768 MACRO_PIR
, MACRO_EOA
,
769 MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
770 MACRO_EXP
, MACRO_EOA
} },
771 { "jmp", emit_jsrjmp
, "jmp",
772 { MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
773 MACRO_PIR
, MACRO_EOA
,
774 MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
775 MACRO_EXP
, MACRO_EOA
} },
776 { "ret", emit_retjcr
, "ret",
777 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
779 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
780 MACRO_PIR
, MACRO_EOA
,
781 MACRO_EXP
, MACRO_EOA
,
783 { "jcr", emit_retjcr
, "jcr",
784 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
786 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
787 MACRO_PIR
, MACRO_EOA
,
788 MACRO_EXP
, MACRO_EOA
,
790 { "jsr_coroutine", emit_retjcr
, "jcr",
791 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
793 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
794 MACRO_PIR
, MACRO_EOA
,
795 MACRO_EXP
, MACRO_EOA
,
799 static const unsigned int alpha_num_macros
800 = sizeof (alpha_macros
) / sizeof (*alpha_macros
);
802 /* Public interface functions */
804 /* This function is called once, at assembler startup time. It sets
805 up all the tables, etc. that the MD part of the assembler will
806 need, that can be determined before arguments are parsed. */
813 /* Verify that X_op field is wide enough. */
817 assert (e
.X_op
== O_max
);
820 /* Create the opcode hash table. */
821 alpha_opcode_hash
= hash_new ();
822 for (i
= 0; i
< alpha_num_opcodes
;)
824 const char *name
, *retval
, *slash
;
826 name
= alpha_opcodes
[i
].name
;
827 retval
= hash_insert (alpha_opcode_hash
, name
, (PTR
) &alpha_opcodes
[i
]);
829 as_fatal (_("internal error: can't hash opcode `%s': %s"),
832 /* Some opcodes include modifiers of various sorts with a "/mod"
833 syntax, like the architecture manual suggests. However, for
834 use with gcc at least, we also need access to those same opcodes
837 if ((slash
= strchr (name
, '/')) != NULL
)
839 char *p
= xmalloc (strlen (name
));
840 memcpy (p
, name
, slash
- name
);
841 strcpy (p
+ (slash
- name
), slash
+ 1);
843 (void) hash_insert (alpha_opcode_hash
, p
, (PTR
) &alpha_opcodes
[i
]);
844 /* Ignore failures -- the opcode table does duplicate some
845 variants in different forms, like "hw_stq" and "hw_st/q". */
848 while (++i
< alpha_num_opcodes
849 && (alpha_opcodes
[i
].name
== name
850 || !strcmp (alpha_opcodes
[i
].name
, name
)))
854 /* Create the macro hash table. */
855 alpha_macro_hash
= hash_new ();
856 for (i
= 0; i
< alpha_num_macros
;)
858 const char *name
, *retval
;
860 name
= alpha_macros
[i
].name
;
861 retval
= hash_insert (alpha_macro_hash
, name
, (PTR
) &alpha_macros
[i
]);
863 as_fatal (_("internal error: can't hash macro `%s': %s"),
866 while (++i
< alpha_num_macros
867 && (alpha_macros
[i
].name
== name
868 || !strcmp (alpha_macros
[i
].name
, name
)))
872 /* Construct symbols for each of the registers. */
873 for (i
= 0; i
< 32; ++i
)
877 sprintf (name
, "$%d", i
);
878 alpha_register_table
[i
] = symbol_create (name
, reg_section
, i
,
885 sprintf (name
, "$f%d", i
- 32);
886 alpha_register_table
[i
] = symbol_create (name
, reg_section
, i
,
890 /* Create the special symbols and sections we'll be using. */
892 /* So .sbss will get used for tiny objects. */
893 bfd_set_gp_size (stdoutput
, g_switch_value
);
896 create_literal_section (".lita", &alpha_lita_section
, &alpha_lita_symbol
);
898 /* For handling the GP, create a symbol that won't be output in the
899 symbol table. We'll edit it out of relocs later. */
900 alpha_gp_symbol
= symbol_create ("<GP value>", alpha_lita_section
, 0x8000,
905 create_literal_section (".link", &alpha_link_section
, &alpha_link_symbol
);
911 segT sec
= subseg_new (".mdebug", (subsegT
) 0);
912 bfd_set_section_flags (stdoutput
, sec
, SEC_HAS_CONTENTS
| SEC_READONLY
);
913 bfd_set_section_alignment (stdoutput
, sec
, 3);
917 /* Create literal lookup hash table. */
918 alpha_literal_hash
= hash_new ();
920 subseg_set (text_section
, 0);
923 /* The public interface to the instruction assembler. */
929 char opname
[32]; /* Current maximum is 13. */
930 expressionS tok
[MAX_INSN_ARGS
];
934 /* Split off the opcode. */
935 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/46819");
936 trunclen
= (opnamelen
< sizeof (opname
) - 1
938 : sizeof (opname
) - 1);
939 memcpy (opname
, str
, trunclen
);
940 opname
[trunclen
] = '\0';
942 /* Tokenize the rest of the line. */
943 if ((ntok
= tokenize_arguments (str
+ opnamelen
, tok
, MAX_INSN_ARGS
)) < 0)
945 if (ntok
!= TOKENIZE_ERROR_REPORT
)
946 as_bad (_("syntax error"));
952 assemble_tokens (opname
, tok
, ntok
, alpha_macros_on
);
955 /* Round up a section's size to the appropriate boundary. */
958 md_section_align (seg
, size
)
962 int align
= bfd_get_section_alignment (stdoutput
, seg
);
963 valueT mask
= ((valueT
) 1 << align
) - 1;
965 return (size
+ mask
) & ~mask
;
968 /* Turn a string in input_line_pointer into a floating point constant
969 of type TYPE, and store the appropriate bytes in *LITP. The number
970 of LITTLENUMS emitted is stored in *SIZEP. An error message is
971 returned, or NULL on OK. */
973 /* Equal to MAX_PRECISION in atof-ieee.c. */
974 #define MAX_LITTLENUMS 6
976 extern char *vax_md_atof
PARAMS ((int, char *, int *));
979 md_atof (type
, litP
, sizeP
)
985 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
986 LITTLENUM_TYPE
*wordP
;
993 /* VAX md_atof doesn't like "G" for some reason. */
997 return vax_md_atof (type
, litP
, sizeP
);
1020 return _("Bad call to MD_ATOF()");
1022 t
= atof_ieee (input_line_pointer
, type
, words
);
1024 input_line_pointer
= t
;
1025 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
1027 for (wordP
= words
+ prec
- 1; prec
--;)
1029 md_number_to_chars (litP
, (long) (*wordP
--), sizeof (LITTLENUM_TYPE
));
1030 litP
+= sizeof (LITTLENUM_TYPE
);
1036 /* Take care of the target-specific command-line options. */
1039 md_parse_option (c
, arg
)
1046 alpha_nofloats_on
= 1;
1050 alpha_addr32_on
= 1;
1058 g_switch_value
= atoi (arg
);
1063 const struct cpu_type
*p
;
1064 for (p
= cpu_types
; p
->name
; ++p
)
1065 if (strcmp (arg
, p
->name
) == 0)
1067 alpha_target_name
= p
->name
, alpha_target
= p
->flags
;
1070 as_warn (_("Unknown CPU identifier `%s'"), arg
);
1076 case '+': /* For g++. Hash any name > 63 chars long. */
1077 alpha_flag_hash_long_names
= 1;
1080 case 'H': /* Show new symbol after hash truncation */
1081 alpha_flag_show_after_trunc
= 1;
1084 case 'h': /* for gnu-c/vax compatibility. */
1089 alpha_flag_relax
= 1;
1094 alpha_flag_mdebug
= 1;
1096 case OPTION_NO_MDEBUG
:
1097 alpha_flag_mdebug
= 0;
1108 /* Print a description of the command-line options that we accept. */
1111 md_show_usage (stream
)
1116 -32addr treat addresses as 32-bit values\n\
1117 -F lack floating point instructions support\n\
1118 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\
1119 specify variant of Alpha architecture\n\
1120 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\
1121 these variants include PALcode opcodes\n"),
1126 -+ hash encode (don't truncate) names longer than 64 characters\n\
1127 -H show new symbol after hash truncation\n"),
1132 /* Decide from what point a pc-relative relocation is relative to,
1133 relative to the pc-relative fixup. Er, relatively speaking. */
1136 md_pcrel_from (fixP
)
1139 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1140 switch (fixP
->fx_r_type
)
1142 case BFD_RELOC_23_PCREL_S2
:
1143 case BFD_RELOC_ALPHA_HINT
:
1144 case BFD_RELOC_ALPHA_BRSGP
:
1151 /* Attempt to simplify or even eliminate a fixup. The return value is
1152 ignored; perhaps it was once meaningful, but now it is historical.
1153 To indicate that a fixup has been eliminated, set fixP->fx_done.
1155 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1156 internally into the GPDISP reloc used externally. We had to do
1157 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1158 the distance to the "lda" instruction for setting the addend to
1162 md_apply_fix3 (fixP
, valP
, seg
)
1167 char * const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1168 valueT value
= * valP
;
1169 unsigned image
, size
;
1171 switch (fixP
->fx_r_type
)
1173 /* The GPDISP relocations are processed internally with a symbol
1174 referring to the current function's section; we need to drop
1175 in a value which, when added to the address of the start of
1176 the function, gives the desired GP. */
1177 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1179 fixS
*next
= fixP
->fx_next
;
1181 /* With user-specified !gpdisp relocations, we can be missing
1182 the matching LO16 reloc. We will have already issued an
1185 fixP
->fx_offset
= (next
->fx_frag
->fr_address
+ next
->fx_where
1186 - fixP
->fx_frag
->fr_address
- fixP
->fx_where
);
1188 value
= (value
- sign_extend_16 (value
)) >> 16;
1191 fixP
->fx_r_type
= BFD_RELOC_ALPHA_GPDISP
;
1195 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1196 value
= sign_extend_16 (value
);
1197 fixP
->fx_offset
= 0;
1203 fixP
->fx_addsy
= section_symbol (seg
);
1204 md_number_to_chars (fixpos
, value
, 2);
1209 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
1214 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
1219 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
1222 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1224 md_number_to_chars (fixpos
, value
, size
);
1230 case BFD_RELOC_GPREL32
:
1231 assert (fixP
->fx_subsy
== alpha_gp_symbol
);
1233 /* FIXME: inherited this obliviousness of `value' -- why? */
1234 md_number_to_chars (fixpos
, -alpha_gp_value
, 4);
1237 case BFD_RELOC_GPREL32
:
1239 case BFD_RELOC_GPREL16
:
1240 case BFD_RELOC_ALPHA_GPREL_HI16
:
1241 case BFD_RELOC_ALPHA_GPREL_LO16
:
1244 case BFD_RELOC_23_PCREL_S2
:
1245 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1247 image
= bfd_getl32 (fixpos
);
1248 image
= (image
& ~0x1FFFFF) | ((value
>> 2) & 0x1FFFFF);
1253 case BFD_RELOC_ALPHA_HINT
:
1254 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1256 image
= bfd_getl32 (fixpos
);
1257 image
= (image
& ~0x3FFF) | ((value
>> 2) & 0x3FFF);
1263 case BFD_RELOC_ALPHA_BRSGP
:
1266 case BFD_RELOC_ALPHA_TLSGD
:
1267 case BFD_RELOC_ALPHA_TLSLDM
:
1268 case BFD_RELOC_ALPHA_GOTDTPREL16
:
1269 case BFD_RELOC_ALPHA_DTPREL_HI16
:
1270 case BFD_RELOC_ALPHA_DTPREL_LO16
:
1271 case BFD_RELOC_ALPHA_DTPREL16
:
1272 case BFD_RELOC_ALPHA_GOTTPREL16
:
1273 case BFD_RELOC_ALPHA_TPREL_HI16
:
1274 case BFD_RELOC_ALPHA_TPREL_LO16
:
1275 case BFD_RELOC_ALPHA_TPREL16
:
1277 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
1282 case BFD_RELOC_ALPHA_LITERAL
:
1283 md_number_to_chars (fixpos
, value
, 2);
1286 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1287 case BFD_RELOC_ALPHA_LITUSE
:
1288 case BFD_RELOC_ALPHA_LINKAGE
:
1289 case BFD_RELOC_ALPHA_CODEADDR
:
1292 case BFD_RELOC_VTABLE_INHERIT
:
1293 case BFD_RELOC_VTABLE_ENTRY
:
1298 const struct alpha_operand
*operand
;
1300 if ((int) fixP
->fx_r_type
>= 0)
1301 as_fatal (_("unhandled relocation type %s"),
1302 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1304 assert (-(int) fixP
->fx_r_type
< (int) alpha_num_operands
);
1305 operand
= &alpha_operands
[-(int) fixP
->fx_r_type
];
1307 /* The rest of these fixups only exist internally during symbol
1308 resolution and have no representation in the object file.
1309 Therefore they must be completely resolved as constants. */
1311 if (fixP
->fx_addsy
!= 0
1312 && S_GET_SEGMENT (fixP
->fx_addsy
) != absolute_section
)
1313 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1314 _("non-absolute expression in constant field"));
1316 image
= bfd_getl32 (fixpos
);
1317 image
= insert_operand (image
, operand
, (offsetT
) value
,
1318 fixP
->fx_file
, fixP
->fx_line
);
1323 if (fixP
->fx_addsy
!= 0 || fixP
->fx_pcrel
!= 0)
1327 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
1328 _("type %d reloc done?\n"), (int) fixP
->fx_r_type
);
1333 md_number_to_chars (fixpos
, image
, 4);
1339 /* Look for a register name in the given symbol. */
1342 md_undefined_symbol (name
)
1347 int is_float
= 0, num
;
1352 if (name
[1] == 'p' && name
[2] == '\0')
1353 return alpha_register_table
[AXP_REG_FP
];
1358 if (!ISDIGIT (*++name
))
1362 case '0': case '1': case '2': case '3': case '4':
1363 case '5': case '6': case '7': case '8': case '9':
1364 if (name
[1] == '\0')
1365 num
= name
[0] - '0';
1366 else if (name
[0] != '0' && ISDIGIT (name
[1]) && name
[2] == '\0')
1368 num
= (name
[0] - '0') * 10 + name
[1] - '0';
1375 if (!alpha_noat_on
&& (num
+ is_float
) == AXP_REG_AT
)
1376 as_warn (_("Used $at without \".set noat\""));
1377 return alpha_register_table
[num
+ is_float
];
1380 if (name
[1] == 't' && name
[2] == '\0')
1383 as_warn (_("Used $at without \".set noat\""));
1384 return alpha_register_table
[AXP_REG_AT
];
1389 if (name
[1] == 'p' && name
[2] == '\0')
1390 return alpha_register_table
[alpha_gp_register
];
1394 if (name
[1] == 'p' && name
[2] == '\0')
1395 return alpha_register_table
[AXP_REG_SP
];
1403 /* @@@ Magic ECOFF bits. */
1406 alpha_frob_ecoff_data ()
1409 /* $zero and $f31 are read-only */
1410 alpha_gprmask
&= ~1;
1411 alpha_fprmask
&= ~1;
1415 /* Hook to remember a recently defined label so that the auto-align
1416 code can adjust the symbol after we know what alignment will be
1420 alpha_define_label (sym
)
1423 alpha_insn_label
= sym
;
1426 /* Return true if we must always emit a reloc for a type and false if
1427 there is some hope of resolving it at assembly time. */
1430 alpha_force_relocation (f
)
1433 if (alpha_flag_relax
)
1436 switch (f
->fx_r_type
)
1438 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1439 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1440 case BFD_RELOC_ALPHA_GPDISP
:
1441 case BFD_RELOC_ALPHA_LITERAL
:
1442 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1443 case BFD_RELOC_ALPHA_LITUSE
:
1444 case BFD_RELOC_GPREL16
:
1445 case BFD_RELOC_GPREL32
:
1446 case BFD_RELOC_ALPHA_GPREL_HI16
:
1447 case BFD_RELOC_ALPHA_GPREL_LO16
:
1448 case BFD_RELOC_ALPHA_LINKAGE
:
1449 case BFD_RELOC_ALPHA_CODEADDR
:
1450 case BFD_RELOC_ALPHA_BRSGP
:
1451 case BFD_RELOC_VTABLE_INHERIT
:
1452 case BFD_RELOC_VTABLE_ENTRY
:
1453 case BFD_RELOC_ALPHA_TLSGD
:
1454 case BFD_RELOC_ALPHA_TLSLDM
:
1455 case BFD_RELOC_ALPHA_GOTDTPREL16
:
1456 case BFD_RELOC_ALPHA_DTPREL_HI16
:
1457 case BFD_RELOC_ALPHA_DTPREL_LO16
:
1458 case BFD_RELOC_ALPHA_DTPREL16
:
1459 case BFD_RELOC_ALPHA_GOTTPREL16
:
1460 case BFD_RELOC_ALPHA_TPREL_HI16
:
1461 case BFD_RELOC_ALPHA_TPREL_LO16
:
1462 case BFD_RELOC_ALPHA_TPREL16
:
1469 return S_FORCE_RELOC (f
->fx_addsy
);
1472 /* Return true if we can partially resolve a relocation now. */
1475 alpha_fix_adjustable (f
)
1478 /* Are there any relocation types for which we must generate a reloc
1479 but we can adjust the values contained within it? */
1480 switch (f
->fx_r_type
)
1482 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1483 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1484 case BFD_RELOC_ALPHA_GPDISP
:
1487 case BFD_RELOC_ALPHA_LITERAL
:
1488 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1489 case BFD_RELOC_ALPHA_LITUSE
:
1490 case BFD_RELOC_ALPHA_LINKAGE
:
1491 case BFD_RELOC_ALPHA_CODEADDR
:
1494 case BFD_RELOC_VTABLE_ENTRY
:
1495 case BFD_RELOC_VTABLE_INHERIT
:
1498 case BFD_RELOC_GPREL16
:
1499 case BFD_RELOC_GPREL32
:
1500 case BFD_RELOC_ALPHA_GPREL_HI16
:
1501 case BFD_RELOC_ALPHA_GPREL_LO16
:
1502 case BFD_RELOC_23_PCREL_S2
:
1505 case BFD_RELOC_ALPHA_HINT
:
1508 case BFD_RELOC_ALPHA_TLSGD
:
1509 case BFD_RELOC_ALPHA_TLSLDM
:
1510 case BFD_RELOC_ALPHA_GOTDTPREL16
:
1511 case BFD_RELOC_ALPHA_DTPREL_HI16
:
1512 case BFD_RELOC_ALPHA_DTPREL_LO16
:
1513 case BFD_RELOC_ALPHA_DTPREL16
:
1514 case BFD_RELOC_ALPHA_GOTTPREL16
:
1515 case BFD_RELOC_ALPHA_TPREL_HI16
:
1516 case BFD_RELOC_ALPHA_TPREL_LO16
:
1517 case BFD_RELOC_ALPHA_TPREL16
:
1518 /* ??? No idea why we can't return a reference to .tbss+10, but
1519 we're preventing this in the other assemblers. Follow for now. */
1523 case BFD_RELOC_ALPHA_BRSGP
:
1524 /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
1525 let it get resolved at assembly time. */
1527 symbolS
*sym
= f
->fx_addsy
;
1531 if (S_FORCE_RELOC (sym
))
1534 switch (S_GET_OTHER (sym
) & STO_ALPHA_STD_GPLOAD
)
1536 case STO_ALPHA_NOPV
:
1538 case STO_ALPHA_STD_GPLOAD
:
1542 if (S_IS_LOCAL (sym
))
1545 name
= S_GET_NAME (sym
);
1546 as_bad_where (f
->fx_file
, f
->fx_line
,
1547 _("!samegp reloc against symbol without .prologue: %s"),
1551 f
->fx_r_type
= BFD_RELOC_23_PCREL_S2
;
1552 f
->fx_offset
+= offset
;
1563 /* Generate the BFD reloc to be stuck in the object file from the
1564 fixup used internally in the assembler. */
1567 tc_gen_reloc (sec
, fixp
)
1568 asection
*sec ATTRIBUTE_UNUSED
;
1573 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1574 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
1575 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1576 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1578 /* Make sure none of our internal relocations make it this far.
1579 They'd better have been fully resolved by this point. */
1580 assert ((int) fixp
->fx_r_type
> 0);
1582 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1583 if (reloc
->howto
== NULL
)
1585 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1586 _("cannot represent `%s' relocation in object file"),
1587 bfd_get_reloc_code_name (fixp
->fx_r_type
));
1591 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
1593 as_fatal (_("internal error? cannot generate `%s' relocation"),
1594 bfd_get_reloc_code_name (fixp
->fx_r_type
));
1596 assert (!fixp
->fx_pcrel
== !reloc
->howto
->pc_relative
);
1599 if (fixp
->fx_r_type
== BFD_RELOC_ALPHA_LITERAL
)
1601 /* Fake out bfd_perform_relocation. sigh. */
1602 reloc
->addend
= -alpha_gp_value
;
1607 reloc
->addend
= fixp
->fx_offset
;
1609 /* Ohhh, this is ugly. The problem is that if this is a local global
1610 symbol, the relocation will entirely be performed at link time, not
1611 at assembly time. bfd_perform_reloc doesn't know about this sort
1612 of thing, and as a result we need to fake it out here. */
1613 if ((S_IS_EXTERN (fixp
->fx_addsy
) || S_IS_WEAK (fixp
->fx_addsy
)
1614 || (S_GET_SEGMENT (fixp
->fx_addsy
)->flags
& SEC_MERGE
)
1615 || (S_GET_SEGMENT (fixp
->fx_addsy
)->flags
& SEC_THREAD_LOCAL
))
1616 && !S_IS_COMMON (fixp
->fx_addsy
))
1617 reloc
->addend
-= symbol_get_bfdsym (fixp
->fx_addsy
)->value
;
1624 /* Parse a register name off of the input_line and return a register
1625 number. Gets md_undefined_symbol above to do the register name
1628 Only called as a part of processing the ECOFF .frame directive. */
1631 tc_get_register (frame
)
1632 int frame ATTRIBUTE_UNUSED
;
1634 int framereg
= AXP_REG_SP
;
1637 if (*input_line_pointer
== '$')
1639 char *s
= input_line_pointer
;
1640 char c
= get_symbol_end ();
1641 symbolS
*sym
= md_undefined_symbol (s
);
1643 *strchr (s
, '\0') = c
;
1644 if (sym
&& (framereg
= S_GET_VALUE (sym
)) <= 31)
1647 as_warn (_("frame reg expected, using $%d."), framereg
);
1650 note_gpreg (framereg
);
1654 /* This is called before the symbol table is processed. In order to
1655 work with gcc when using mips-tfile, we must keep all local labels.
1656 However, in other cases, we want to discard them. If we were
1657 called with -g, but we didn't see any debugging information, it may
1658 mean that gcc is smuggling debugging information through to
1659 mips-tfile, in which case we must generate all local labels. */
1664 alpha_frob_file_before_adjust ()
1666 if (alpha_debug
!= 0
1667 && ! ecoff_debugging_seen
)
1668 flag_keep_locals
= 1;
1671 #endif /* OBJ_ECOFF */
1673 static struct alpha_reloc_tag
*
1674 get_alpha_reloc_tag (sequence
)
1677 char buffer
[ALPHA_RELOC_DIGITS
];
1678 struct alpha_reloc_tag
*info
;
1680 sprintf (buffer
, "!%ld", sequence
);
1682 info
= (struct alpha_reloc_tag
*) hash_find (alpha_literal_hash
, buffer
);
1685 size_t len
= strlen (buffer
);
1688 info
= (struct alpha_reloc_tag
*)
1689 xcalloc (sizeof (struct alpha_reloc_tag
) + len
, 1);
1691 info
->segment
= now_seg
;
1692 info
->sequence
= sequence
;
1693 strcpy (info
->string
, buffer
);
1694 errmsg
= hash_insert (alpha_literal_hash
, info
->string
, (PTR
) info
);
1702 /* Before the relocations are written, reorder them, so that user
1703 supplied !lituse relocations follow the appropriate !literal
1704 relocations, and similarly for !gpdisp relocations. */
1709 if (alpha_literal_hash
)
1710 bfd_map_over_sections (stdoutput
, alpha_adjust_relocs
, NULL
);
1714 alpha_adjust_relocs (abfd
, sec
, ptr
)
1715 bfd
*abfd ATTRIBUTE_UNUSED
;
1717 PTR ptr ATTRIBUTE_UNUSED
;
1719 segment_info_type
*seginfo
= seg_info (sec
);
1725 /* If seginfo is NULL, we did not create this section; don't do
1726 anything with it. By using a pointer to a pointer, we can update
1727 the links in place. */
1728 if (seginfo
== NULL
)
1731 /* If there are no relocations, skip the section. */
1732 if (! seginfo
->fix_root
)
1735 /* First rebuild the fixup chain without the expicit lituse and
1736 gpdisp_lo16 relocs. */
1737 prevP
= &seginfo
->fix_root
;
1738 for (fixp
= seginfo
->fix_root
; fixp
; fixp
= next
)
1740 next
= fixp
->fx_next
;
1741 fixp
->fx_next
= (fixS
*) 0;
1743 switch (fixp
->fx_r_type
)
1745 case BFD_RELOC_ALPHA_LITUSE
:
1746 if (fixp
->tc_fix_data
.info
->n_master
== 0)
1747 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1748 _("No !literal!%ld was found"),
1749 fixp
->tc_fix_data
.info
->sequence
);
1751 if (fixp
->fx_offset
== LITUSE_ALPHA_TLSGD
)
1753 if (! fixp
->tc_fix_data
.info
->saw_tlsgd
)
1754 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1755 _("No !tlsgd!%ld was found"),
1756 fixp
->tc_fix_data
.info
->sequence
);
1758 else if (fixp
->fx_offset
== LITUSE_ALPHA_TLSLDM
)
1760 if (! fixp
->tc_fix_data
.info
->saw_tlsldm
)
1761 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1762 _("No !tlsldm!%ld was found"),
1763 fixp
->tc_fix_data
.info
->sequence
);
1768 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1769 if (fixp
->tc_fix_data
.info
->n_master
== 0)
1770 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1771 _("No ldah !gpdisp!%ld was found"),
1772 fixp
->tc_fix_data
.info
->sequence
);
1775 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1776 if (fixp
->tc_fix_data
.info
1777 && (fixp
->tc_fix_data
.info
->saw_tlsgd
1778 || fixp
->tc_fix_data
.info
->saw_tlsldm
))
1784 prevP
= &fixp
->fx_next
;
1789 /* Go back and re-chain dependent relocations. They are currently
1790 linked through the next_reloc field in reverse order, so as we
1791 go through the next_reloc chain, we effectively reverse the chain
1794 Except if there is more than one !literal for a given sequence
1795 number. In that case, the programmer and/or compiler is not sure
1796 how control flows from literal to lituse, and we can't be sure to
1797 get the relaxation correct.
1799 ??? Well, actually we could, if there are enough lituses such that
1800 we can make each literal have at least one of each lituse type
1801 present. Not implemented.
1803 Also suppress the optimization if the !literals/!lituses are spread
1804 in different segments. This can happen with "intersting" uses of
1805 inline assembly; examples are present in the Linux kernel semaphores. */
1807 for (fixp
= seginfo
->fix_root
; fixp
; fixp
= next
)
1809 next
= fixp
->fx_next
;
1810 switch (fixp
->fx_r_type
)
1812 case BFD_RELOC_ALPHA_TLSGD
:
1813 case BFD_RELOC_ALPHA_TLSLDM
:
1814 if (!fixp
->tc_fix_data
.info
)
1816 if (fixp
->tc_fix_data
.info
->n_master
== 0)
1818 else if (fixp
->tc_fix_data
.info
->n_master
> 1)
1820 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1821 _("too many !literal!%ld for %s"),
1822 fixp
->tc_fix_data
.info
->sequence
,
1823 (fixp
->fx_r_type
== BFD_RELOC_ALPHA_TLSGD
1824 ? "!tlsgd" : "!tlsldm"));
1828 fixp
->tc_fix_data
.info
->master
->fx_next
= fixp
->fx_next
;
1829 fixp
->fx_next
= fixp
->tc_fix_data
.info
->master
;
1830 fixp
= fixp
->fx_next
;
1833 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1834 if (fixp
->tc_fix_data
.info
1835 && fixp
->tc_fix_data
.info
->n_master
== 1
1836 && ! fixp
->tc_fix_data
.info
->multi_section_p
)
1838 for (slave
= fixp
->tc_fix_data
.info
->slaves
;
1839 slave
!= (fixS
*) 0;
1840 slave
= slave
->tc_fix_data
.next_reloc
)
1842 slave
->fx_next
= fixp
->fx_next
;
1843 fixp
->fx_next
= slave
;
1848 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1849 if (fixp
->tc_fix_data
.info
->n_slaves
== 0)
1850 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1851 _("No lda !gpdisp!%ld was found"),
1852 fixp
->tc_fix_data
.info
->sequence
);
1855 slave
= fixp
->tc_fix_data
.info
->slaves
;
1856 slave
->fx_next
= next
;
1857 fixp
->fx_next
= slave
;
1869 debug_exp (tok
, ntok
)
1875 fprintf (stderr
, "debug_exp: %d tokens", ntok
);
1876 for (i
= 0; i
< ntok
; i
++)
1878 expressionS
*t
= &tok
[i
];
1883 default: name
= "unknown"; break;
1884 case O_illegal
: name
= "O_illegal"; break;
1885 case O_absent
: name
= "O_absent"; break;
1886 case O_constant
: name
= "O_constant"; break;
1887 case O_symbol
: name
= "O_symbol"; break;
1888 case O_symbol_rva
: name
= "O_symbol_rva"; break;
1889 case O_register
: name
= "O_register"; break;
1890 case O_big
: name
= "O_big"; break;
1891 case O_uminus
: name
= "O_uminus"; break;
1892 case O_bit_not
: name
= "O_bit_not"; break;
1893 case O_logical_not
: name
= "O_logical_not"; break;
1894 case O_multiply
: name
= "O_multiply"; break;
1895 case O_divide
: name
= "O_divide"; break;
1896 case O_modulus
: name
= "O_modulus"; break;
1897 case O_left_shift
: name
= "O_left_shift"; break;
1898 case O_right_shift
: name
= "O_right_shift"; break;
1899 case O_bit_inclusive_or
: name
= "O_bit_inclusive_or"; break;
1900 case O_bit_or_not
: name
= "O_bit_or_not"; break;
1901 case O_bit_exclusive_or
: name
= "O_bit_exclusive_or"; break;
1902 case O_bit_and
: name
= "O_bit_and"; break;
1903 case O_add
: name
= "O_add"; break;
1904 case O_subtract
: name
= "O_subtract"; break;
1905 case O_eq
: name
= "O_eq"; break;
1906 case O_ne
: name
= "O_ne"; break;
1907 case O_lt
: name
= "O_lt"; break;
1908 case O_le
: name
= "O_le"; break;
1909 case O_ge
: name
= "O_ge"; break;
1910 case O_gt
: name
= "O_gt"; break;
1911 case O_logical_and
: name
= "O_logical_and"; break;
1912 case O_logical_or
: name
= "O_logical_or"; break;
1913 case O_index
: name
= "O_index"; break;
1914 case O_pregister
: name
= "O_pregister"; break;
1915 case O_cpregister
: name
= "O_cpregister"; break;
1916 case O_literal
: name
= "O_literal"; break;
1917 case O_lituse_addr
: name
= "O_lituse_addr"; break;
1918 case O_lituse_base
: name
= "O_lituse_base"; break;
1919 case O_lituse_bytoff
: name
= "O_lituse_bytoff"; break;
1920 case O_lituse_jsr
: name
= "O_lituse_jsr"; break;
1921 case O_lituse_tlsgd
: name
= "O_lituse_tlsgd"; break;
1922 case O_lituse_tlsldm
: name
= "O_lituse_tlsldm"; break;
1923 case O_gpdisp
: name
= "O_gpdisp"; break;
1924 case O_gprelhigh
: name
= "O_gprelhigh"; break;
1925 case O_gprellow
: name
= "O_gprellow"; break;
1926 case O_gprel
: name
= "O_gprel"; break;
1927 case O_samegp
: name
= "O_samegp"; break;
1928 case O_tlsgd
: name
= "O_tlsgd"; break;
1929 case O_tlsldm
: name
= "O_tlsldm"; break;
1930 case O_gotdtprel
: name
= "O_gotdtprel"; break;
1931 case O_dtprelhi
: name
= "O_dtprelhi"; break;
1932 case O_dtprello
: name
= "O_dtprello"; break;
1933 case O_dtprel
: name
= "O_dtprel"; break;
1934 case O_gottprel
: name
= "O_gottprel"; break;
1935 case O_tprelhi
: name
= "O_tprelhi"; break;
1936 case O_tprello
: name
= "O_tprello"; break;
1937 case O_tprel
: name
= "O_tprel"; break;
1940 fprintf (stderr
, ", %s(%s, %s, %d)", name
,
1941 (t
->X_add_symbol
) ? S_GET_NAME (t
->X_add_symbol
) : "--",
1942 (t
->X_op_symbol
) ? S_GET_NAME (t
->X_op_symbol
) : "--",
1943 (int) t
->X_add_number
);
1945 fprintf (stderr
, "\n");
1950 /* Parse the arguments to an opcode. */
1953 tokenize_arguments (str
, tok
, ntok
)
1958 expressionS
*end_tok
= tok
+ ntok
;
1959 char *old_input_line_pointer
;
1960 int saw_comma
= 0, saw_arg
= 0;
1962 expressionS
*orig_tok
= tok
;
1966 const struct alpha_reloc_op_tag
*r
;
1969 int reloc_found_p
= 0;
1972 memset (tok
, 0, sizeof (*tok
) * ntok
);
1974 /* Save and restore input_line_pointer around this function. */
1975 old_input_line_pointer
= input_line_pointer
;
1976 input_line_pointer
= str
;
1979 /* ??? Wrest control of ! away from the regular expression parser. */
1980 is_end_of_line
[(unsigned char) '!'] = 1;
1983 while (tok
< end_tok
&& *input_line_pointer
)
1986 switch (*input_line_pointer
)
1993 /* A relocation operand can be placed after the normal operand on an
1994 assembly language statement, and has the following form:
1995 !relocation_type!sequence_number. */
1998 /* Only support one relocation op per insn. */
1999 as_bad (_("More than one relocation op per insn"));
2006 ++input_line_pointer
;
2008 p
= input_line_pointer
;
2009 c
= get_symbol_end ();
2011 /* Parse !relocation_type. */
2012 len
= input_line_pointer
- p
;
2015 as_bad (_("No relocation operand"));
2019 r
= &alpha_reloc_op
[0];
2020 for (i
= alpha_num_reloc_op
- 1; i
>= 0; i
--, r
++)
2021 if (len
== r
->length
&& memcmp (p
, r
->name
, len
) == 0)
2025 as_bad (_("Unknown relocation operand: !%s"), p
);
2029 *input_line_pointer
= c
;
2031 if (*input_line_pointer
!= '!')
2035 as_bad (_("no sequence number after !%s"), p
);
2039 tok
->X_add_number
= 0;
2045 as_bad (_("!%s does not use a sequence number"), p
);
2049 input_line_pointer
++;
2051 /* Parse !sequence_number. */
2053 if (tok
->X_op
!= O_constant
|| tok
->X_add_number
<= 0)
2055 as_bad (_("Bad sequence number: !%s!%s"),
2056 r
->name
, input_line_pointer
);
2065 #endif /* RELOC_OP_P */
2068 ++input_line_pointer
;
2069 if (saw_comma
|| !saw_arg
)
2076 char *hold
= input_line_pointer
++;
2078 /* First try for parenthesized register ... */
2080 if (*input_line_pointer
== ')' && tok
->X_op
== O_register
)
2082 tok
->X_op
= (saw_comma
? O_cpregister
: O_pregister
);
2085 ++input_line_pointer
;
2090 /* ... then fall through to plain expression. */
2091 input_line_pointer
= hold
;
2095 if (saw_arg
&& !saw_comma
)
2099 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
2112 input_line_pointer
= old_input_line_pointer
;
2115 debug_exp (orig_tok
, ntok
- (end_tok
- tok
));
2118 is_end_of_line
[(unsigned char) '!'] = 0;
2121 return ntok
- (end_tok
- tok
);
2125 is_end_of_line
[(unsigned char) '!'] = 0;
2127 input_line_pointer
= old_input_line_pointer
;
2128 return TOKENIZE_ERROR
;
2132 is_end_of_line
[(unsigned char) '!'] = 0;
2134 input_line_pointer
= old_input_line_pointer
;
2135 return TOKENIZE_ERROR_REPORT
;
2138 /* Search forward through all variants of an opcode looking for a
2141 static const struct alpha_opcode
*
2142 find_opcode_match (first_opcode
, tok
, pntok
, pcpumatch
)
2143 const struct alpha_opcode
*first_opcode
;
2144 const expressionS
*tok
;
2148 const struct alpha_opcode
*opcode
= first_opcode
;
2150 int got_cpu_match
= 0;
2154 const unsigned char *opidx
;
2157 /* Don't match opcodes that don't exist on this architecture. */
2158 if (!(opcode
->flags
& alpha_target
))
2163 for (opidx
= opcode
->operands
; *opidx
; ++opidx
)
2165 const struct alpha_operand
*operand
= &alpha_operands
[*opidx
];
2167 /* Only take input from real operands. */
2168 if (operand
->flags
& AXP_OPERAND_FAKE
)
2171 /* When we expect input, make sure we have it. */
2174 if ((operand
->flags
& AXP_OPERAND_OPTIONAL_MASK
) == 0)
2179 /* Match operand type with expression type. */
2180 switch (operand
->flags
& AXP_OPERAND_TYPECHECK_MASK
)
2182 case AXP_OPERAND_IR
:
2183 if (tok
[tokidx
].X_op
!= O_register
2184 || !is_ir_num (tok
[tokidx
].X_add_number
))
2187 case AXP_OPERAND_FPR
:
2188 if (tok
[tokidx
].X_op
!= O_register
2189 || !is_fpr_num (tok
[tokidx
].X_add_number
))
2192 case AXP_OPERAND_IR
| AXP_OPERAND_PARENS
:
2193 if (tok
[tokidx
].X_op
!= O_pregister
2194 || !is_ir_num (tok
[tokidx
].X_add_number
))
2197 case AXP_OPERAND_IR
| AXP_OPERAND_PARENS
| AXP_OPERAND_COMMA
:
2198 if (tok
[tokidx
].X_op
!= O_cpregister
2199 || !is_ir_num (tok
[tokidx
].X_add_number
))
2203 case AXP_OPERAND_RELATIVE
:
2204 case AXP_OPERAND_SIGNED
:
2205 case AXP_OPERAND_UNSIGNED
:
2206 switch (tok
[tokidx
].X_op
)
2221 /* Everything else should have been fake. */
2227 /* Possible match -- did we use all of our input? */
2236 while (++opcode
- alpha_opcodes
< (int) alpha_num_opcodes
2237 && !strcmp (opcode
->name
, first_opcode
->name
));
2240 *pcpumatch
= got_cpu_match
;
2245 /* Search forward through all variants of a macro looking for a syntax
2248 static const struct alpha_macro
*
2249 find_macro_match (first_macro
, tok
, pntok
)
2250 const struct alpha_macro
*first_macro
;
2251 const expressionS
*tok
;
2254 const struct alpha_macro
*macro
= first_macro
;
2259 const enum alpha_macro_arg
*arg
= macro
->argsets
;
2273 /* Index register. */
2275 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_register
2276 || !is_ir_num (tok
[tokidx
].X_add_number
))
2281 /* Parenthesized index register. */
2283 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_pregister
2284 || !is_ir_num (tok
[tokidx
].X_add_number
))
2289 /* Optional parenthesized index register. */
2291 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_pregister
2292 && is_ir_num (tok
[tokidx
].X_add_number
))
2296 /* Leading comma with a parenthesized index register. */
2298 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_cpregister
2299 || !is_ir_num (tok
[tokidx
].X_add_number
))
2304 /* Floating point register. */
2306 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_register
2307 || !is_fpr_num (tok
[tokidx
].X_add_number
))
2312 /* Normal expression. */
2316 switch (tok
[tokidx
].X_op
)
2325 case O_lituse_bytoff
:
2341 while (*arg
!= MACRO_EOA
)
2349 while (++macro
- alpha_macros
< (int) alpha_num_macros
2350 && !strcmp (macro
->name
, first_macro
->name
));
2355 /* Insert an operand value into an instruction. */
2358 insert_operand (insn
, operand
, val
, file
, line
)
2360 const struct alpha_operand
*operand
;
2365 if (operand
->bits
!= 32 && !(operand
->flags
& AXP_OPERAND_NOOVERFLOW
))
2369 if (operand
->flags
& AXP_OPERAND_SIGNED
)
2371 max
= (1 << (operand
->bits
- 1)) - 1;
2372 min
= -(1 << (operand
->bits
- 1));
2376 max
= (1 << operand
->bits
) - 1;
2380 if (val
< min
|| val
> max
)
2383 _("operand out of range (%s not between %d and %d)");
2384 char buf
[sizeof (val
) * 3 + 2];
2386 sprint_value (buf
, val
);
2388 as_warn_where (file
, line
, err
, buf
, min
, max
);
2390 as_warn (err
, buf
, min
, max
);
2394 if (operand
->insert
)
2396 const char *errmsg
= NULL
;
2398 insn
= (*operand
->insert
) (insn
, val
, &errmsg
);
2403 insn
|= ((val
& ((1 << operand
->bits
) - 1)) << operand
->shift
);
2408 /* Turn an opcode description and a set of arguments into
2409 an instruction and a fixup. */
2412 assemble_insn (opcode
, tok
, ntok
, insn
, reloc
)
2413 const struct alpha_opcode
*opcode
;
2414 const expressionS
*tok
;
2416 struct alpha_insn
*insn
;
2417 bfd_reloc_code_real_type reloc
;
2419 const struct alpha_operand
*reloc_operand
= NULL
;
2420 const expressionS
*reloc_exp
= NULL
;
2421 const unsigned char *argidx
;
2425 memset (insn
, 0, sizeof (*insn
));
2426 image
= opcode
->opcode
;
2428 for (argidx
= opcode
->operands
; *argidx
; ++argidx
)
2430 const struct alpha_operand
*operand
= &alpha_operands
[*argidx
];
2431 const expressionS
*t
= (const expressionS
*) 0;
2433 if (operand
->flags
& AXP_OPERAND_FAKE
)
2435 /* fake operands take no value and generate no fixup */
2436 image
= insert_operand (image
, operand
, 0, NULL
, 0);
2442 switch (operand
->flags
& AXP_OPERAND_OPTIONAL_MASK
)
2444 case AXP_OPERAND_DEFAULT_FIRST
:
2447 case AXP_OPERAND_DEFAULT_SECOND
:
2450 case AXP_OPERAND_DEFAULT_ZERO
:
2452 static expressionS zero_exp
;
2454 zero_exp
.X_op
= O_constant
;
2455 zero_exp
.X_unsigned
= 1;
2470 image
= insert_operand (image
, operand
, regno (t
->X_add_number
),
2475 image
= insert_operand (image
, operand
, t
->X_add_number
, NULL
, 0);
2476 assert (reloc_operand
== NULL
);
2477 reloc_operand
= operand
;
2482 /* This is only 0 for fields that should contain registers,
2483 which means this pattern shouldn't have matched. */
2484 if (operand
->default_reloc
== 0)
2487 /* There is one special case for which an insn receives two
2488 relocations, and thus the user-supplied reloc does not
2489 override the operand reloc. */
2490 if (operand
->default_reloc
== BFD_RELOC_ALPHA_HINT
)
2492 struct alpha_fixup
*fixup
;
2494 if (insn
->nfixups
>= MAX_INSN_FIXUPS
)
2495 as_fatal (_("too many fixups"));
2497 fixup
= &insn
->fixups
[insn
->nfixups
++];
2499 fixup
->reloc
= BFD_RELOC_ALPHA_HINT
;
2503 if (reloc
== BFD_RELOC_UNUSED
)
2504 reloc
= operand
->default_reloc
;
2506 assert (reloc_operand
== NULL
);
2507 reloc_operand
= operand
;
2514 if (reloc
!= BFD_RELOC_UNUSED
)
2516 struct alpha_fixup
*fixup
;
2518 if (insn
->nfixups
>= MAX_INSN_FIXUPS
)
2519 as_fatal (_("too many fixups"));
2521 /* ??? My but this is hacky. But the OSF/1 assembler uses the same
2522 relocation tag for both ldah and lda with gpdisp. Choose the
2523 correct internal relocation based on the opcode. */
2524 if (reloc
== BFD_RELOC_ALPHA_GPDISP
)
2526 if (strcmp (opcode
->name
, "ldah") == 0)
2527 reloc
= BFD_RELOC_ALPHA_GPDISP_HI16
;
2528 else if (strcmp (opcode
->name
, "lda") == 0)
2529 reloc
= BFD_RELOC_ALPHA_GPDISP_LO16
;
2531 as_bad (_("invalid relocation for instruction"));
2534 /* If this is a real relocation (as opposed to a lituse hint), then
2535 the relocation width should match the operand width. */
2536 else if (reloc
< BFD_RELOC_UNUSED
)
2538 reloc_howto_type
*reloc_howto
2539 = bfd_reloc_type_lookup (stdoutput
, reloc
);
2540 if (reloc_howto
->bitsize
!= reloc_operand
->bits
)
2542 as_bad (_("invalid relocation for field"));
2547 fixup
= &insn
->fixups
[insn
->nfixups
++];
2549 fixup
->exp
= *reloc_exp
;
2551 fixup
->exp
.X_op
= O_absent
;
2552 fixup
->reloc
= reloc
;
2558 /* Actually output an instruction with its fixup. */
2562 struct alpha_insn
*insn
;
2567 /* Take care of alignment duties. */
2568 if (alpha_auto_align_on
&& alpha_current_align
< 2)
2569 alpha_align (2, (char *) NULL
, alpha_insn_label
, 0);
2570 if (alpha_current_align
> 2)
2571 alpha_current_align
= 2;
2572 alpha_insn_label
= NULL
;
2574 /* Write out the instruction. */
2576 md_number_to_chars (f
, insn
->insn
, 4);
2579 dwarf2_emit_insn (4);
2582 /* Apply the fixups in order. */
2583 for (i
= 0; i
< insn
->nfixups
; ++i
)
2585 const struct alpha_operand
*operand
= (const struct alpha_operand
*) 0;
2586 struct alpha_fixup
*fixup
= &insn
->fixups
[i
];
2587 struct alpha_reloc_tag
*info
= NULL
;
2591 /* Some fixups are only used internally and so have no howto. */
2592 if ((int) fixup
->reloc
< 0)
2594 operand
= &alpha_operands
[-(int) fixup
->reloc
];
2596 pcrel
= ((operand
->flags
& AXP_OPERAND_RELATIVE
) != 0);
2598 else if (fixup
->reloc
> BFD_RELOC_UNUSED
2599 || fixup
->reloc
== BFD_RELOC_ALPHA_GPDISP_HI16
2600 || fixup
->reloc
== BFD_RELOC_ALPHA_GPDISP_LO16
)
2607 reloc_howto_type
*reloc_howto
2608 = bfd_reloc_type_lookup (stdoutput
, fixup
->reloc
);
2609 assert (reloc_howto
);
2611 size
= bfd_get_reloc_size (reloc_howto
);
2612 assert (size
>= 1 && size
<= 4);
2614 pcrel
= reloc_howto
->pc_relative
;
2617 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
, size
,
2618 &fixup
->exp
, pcrel
, fixup
->reloc
);
2620 /* Turn off complaints that the addend is too large for some fixups,
2621 and copy in the sequence number for the explicit relocations. */
2622 switch (fixup
->reloc
)
2624 case BFD_RELOC_ALPHA_HINT
:
2625 case BFD_RELOC_GPREL32
:
2626 case BFD_RELOC_GPREL16
:
2627 case BFD_RELOC_ALPHA_GPREL_HI16
:
2628 case BFD_RELOC_ALPHA_GPREL_LO16
:
2629 case BFD_RELOC_ALPHA_GOTDTPREL16
:
2630 case BFD_RELOC_ALPHA_DTPREL_HI16
:
2631 case BFD_RELOC_ALPHA_DTPREL_LO16
:
2632 case BFD_RELOC_ALPHA_DTPREL16
:
2633 case BFD_RELOC_ALPHA_GOTTPREL16
:
2634 case BFD_RELOC_ALPHA_TPREL_HI16
:
2635 case BFD_RELOC_ALPHA_TPREL_LO16
:
2636 case BFD_RELOC_ALPHA_TPREL16
:
2637 fixP
->fx_no_overflow
= 1;
2640 case BFD_RELOC_ALPHA_GPDISP_HI16
:
2641 fixP
->fx_no_overflow
= 1;
2642 fixP
->fx_addsy
= section_symbol (now_seg
);
2643 fixP
->fx_offset
= 0;
2645 info
= get_alpha_reloc_tag (insn
->sequence
);
2646 if (++info
->n_master
> 1)
2647 as_bad (_("too many ldah insns for !gpdisp!%ld"), insn
->sequence
);
2648 if (info
->segment
!= now_seg
)
2649 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
2651 fixP
->tc_fix_data
.info
= info
;
2654 case BFD_RELOC_ALPHA_GPDISP_LO16
:
2655 fixP
->fx_no_overflow
= 1;
2657 info
= get_alpha_reloc_tag (insn
->sequence
);
2658 if (++info
->n_slaves
> 1)
2659 as_bad (_("too many lda insns for !gpdisp!%ld"), insn
->sequence
);
2660 if (info
->segment
!= now_seg
)
2661 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
2663 fixP
->tc_fix_data
.info
= info
;
2664 info
->slaves
= fixP
;
2667 case BFD_RELOC_ALPHA_LITERAL
:
2668 case BFD_RELOC_ALPHA_ELF_LITERAL
:
2669 fixP
->fx_no_overflow
= 1;
2671 if (insn
->sequence
== 0)
2673 info
= get_alpha_reloc_tag (insn
->sequence
);
2674 info
->master
= fixP
;
2676 if (info
->segment
!= now_seg
)
2677 info
->multi_section_p
= 1;
2678 fixP
->tc_fix_data
.info
= info
;
2682 case DUMMY_RELOC_LITUSE_ADDR
:
2683 fixP
->fx_offset
= LITUSE_ALPHA_ADDR
;
2685 case DUMMY_RELOC_LITUSE_BASE
:
2686 fixP
->fx_offset
= LITUSE_ALPHA_BASE
;
2688 case DUMMY_RELOC_LITUSE_BYTOFF
:
2689 fixP
->fx_offset
= LITUSE_ALPHA_BYTOFF
;
2691 case DUMMY_RELOC_LITUSE_JSR
:
2692 fixP
->fx_offset
= LITUSE_ALPHA_JSR
;
2694 case DUMMY_RELOC_LITUSE_TLSGD
:
2695 fixP
->fx_offset
= LITUSE_ALPHA_TLSGD
;
2697 case DUMMY_RELOC_LITUSE_TLSLDM
:
2698 fixP
->fx_offset
= LITUSE_ALPHA_TLSLDM
;
2701 fixP
->fx_addsy
= section_symbol (now_seg
);
2702 fixP
->fx_r_type
= BFD_RELOC_ALPHA_LITUSE
;
2704 info
= get_alpha_reloc_tag (insn
->sequence
);
2705 if (fixup
->reloc
== DUMMY_RELOC_LITUSE_TLSGD
)
2706 info
->saw_lu_tlsgd
= 1;
2707 else if (fixup
->reloc
== DUMMY_RELOC_LITUSE_TLSLDM
)
2708 info
->saw_lu_tlsldm
= 1;
2709 if (++info
->n_slaves
> 1)
2711 if (info
->saw_lu_tlsgd
)
2712 as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"),
2714 else if (info
->saw_lu_tlsldm
)
2715 as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"),
2718 fixP
->tc_fix_data
.info
= info
;
2719 fixP
->tc_fix_data
.next_reloc
= info
->slaves
;
2720 info
->slaves
= fixP
;
2721 if (info
->segment
!= now_seg
)
2722 info
->multi_section_p
= 1;
2725 case BFD_RELOC_ALPHA_TLSGD
:
2726 fixP
->fx_no_overflow
= 1;
2728 if (insn
->sequence
== 0)
2730 info
= get_alpha_reloc_tag (insn
->sequence
);
2731 if (info
->saw_tlsgd
)
2732 as_bad (_("duplicate !tlsgd!%ld"), insn
->sequence
);
2733 else if (info
->saw_tlsldm
)
2734 as_bad (_("sequence number in use for !tlsldm!%ld"),
2737 info
->saw_tlsgd
= 1;
2738 fixP
->tc_fix_data
.info
= info
;
2741 case BFD_RELOC_ALPHA_TLSLDM
:
2742 fixP
->fx_no_overflow
= 1;
2744 if (insn
->sequence
== 0)
2746 info
= get_alpha_reloc_tag (insn
->sequence
);
2747 if (info
->saw_tlsldm
)
2748 as_bad (_("duplicate !tlsldm!%ld"), insn
->sequence
);
2749 else if (info
->saw_tlsgd
)
2750 as_bad (_("sequence number in use for !tlsgd!%ld"),
2753 info
->saw_tlsldm
= 1;
2754 fixP
->tc_fix_data
.info
= info
;
2758 if ((int) fixup
->reloc
< 0)
2760 if (operand
->flags
& AXP_OPERAND_NOOVERFLOW
)
2761 fixP
->fx_no_overflow
= 1;
2768 /* Given an opcode name and a pre-tokenized set of arguments, assemble
2769 the insn, but do not emit it.
2771 Note that this implies no macros allowed, since we can't store more
2772 than one insn in an insn structure. */
2775 assemble_tokens_to_insn (opname
, tok
, ntok
, insn
)
2777 const expressionS
*tok
;
2779 struct alpha_insn
*insn
;
2781 const struct alpha_opcode
*opcode
;
2783 /* search opcodes */
2784 opcode
= (const struct alpha_opcode
*) hash_find (alpha_opcode_hash
, opname
);
2788 opcode
= find_opcode_match (opcode
, tok
, &ntok
, &cpumatch
);
2791 assemble_insn (opcode
, tok
, ntok
, insn
, BFD_RELOC_UNUSED
);
2795 as_bad (_("inappropriate arguments for opcode `%s'"), opname
);
2797 as_bad (_("opcode `%s' not supported for target %s"), opname
,
2801 as_bad (_("unknown opcode `%s'"), opname
);
2804 /* Given an opcode name and a pre-tokenized set of arguments, take the
2805 opcode all the way through emission. */
2808 assemble_tokens (opname
, tok
, ntok
, local_macros_on
)
2810 const expressionS
*tok
;
2812 int local_macros_on
;
2814 int found_something
= 0;
2815 const struct alpha_opcode
*opcode
;
2816 const struct alpha_macro
*macro
;
2818 bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
2821 /* If a user-specified relocation is present, this is not a macro. */
2822 if (ntok
&& USER_RELOC_P (tok
[ntok
- 1].X_op
))
2824 reloc
= ALPHA_RELOC_TABLE (tok
[ntok
- 1].X_op
)->reloc
;
2829 if (local_macros_on
)
2831 macro
= ((const struct alpha_macro
*)
2832 hash_find (alpha_macro_hash
, opname
));
2835 found_something
= 1;
2836 macro
= find_macro_match (macro
, tok
, &ntok
);
2839 (*macro
->emit
) (tok
, ntok
, macro
->arg
);
2845 /* Search opcodes. */
2846 opcode
= (const struct alpha_opcode
*) hash_find (alpha_opcode_hash
, opname
);
2849 found_something
= 1;
2850 opcode
= find_opcode_match (opcode
, tok
, &ntok
, &cpumatch
);
2853 struct alpha_insn insn
;
2854 assemble_insn (opcode
, tok
, ntok
, &insn
, reloc
);
2856 /* Copy the sequence number for the reloc from the reloc token. */
2857 if (reloc
!= BFD_RELOC_UNUSED
)
2858 insn
.sequence
= tok
[ntok
].X_add_number
;
2865 if (found_something
)
2868 as_bad (_("inappropriate arguments for opcode `%s'"), opname
);
2870 as_bad (_("opcode `%s' not supported for target %s"), opname
,
2874 as_bad (_("unknown opcode `%s'"), opname
);
2877 /* Some instruction sets indexed by lg(size). */
2878 static const char * const sextX_op
[] = { "sextb", "sextw", "sextl", NULL
};
2879 static const char * const insXl_op
[] = { "insbl", "inswl", "insll", "insql" };
2880 static const char * const insXh_op
[] = { NULL
, "inswh", "inslh", "insqh" };
2881 static const char * const extXl_op
[] = { "extbl", "extwl", "extll", "extql" };
2882 static const char * const extXh_op
[] = { NULL
, "extwh", "extlh", "extqh" };
2883 static const char * const mskXl_op
[] = { "mskbl", "mskwl", "mskll", "mskql" };
2884 static const char * const mskXh_op
[] = { NULL
, "mskwh", "msklh", "mskqh" };
2885 static const char * const stX_op
[] = { "stb", "stw", "stl", "stq" };
2886 static const char * const ldXu_op
[] = { "ldbu", "ldwu", NULL
, NULL
};
2888 /* Implement the ldgp macro. */
2891 emit_ldgp (tok
, ntok
, unused
)
2892 const expressionS
*tok
;
2893 int ntok ATTRIBUTE_UNUSED
;
2894 const PTR unused ATTRIBUTE_UNUSED
;
2899 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2900 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2901 with appropriate constants and relocations. */
2902 struct alpha_insn insn
;
2903 expressionS newtok
[3];
2907 if (regno (tok
[2].X_add_number
) == AXP_REG_PV
)
2908 ecoff_set_gp_prolog_size (0);
2912 set_tok_const (newtok
[1], 0);
2915 assemble_tokens_to_insn ("ldah", newtok
, 3, &insn
);
2920 if (addend
.X_op
!= O_constant
)
2921 as_bad (_("can not resolve expression"));
2922 addend
.X_op
= O_symbol
;
2923 addend
.X_add_symbol
= alpha_gp_symbol
;
2927 insn
.fixups
[0].exp
= addend
;
2928 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_GPDISP_HI16
;
2929 insn
.sequence
= next_sequence_num
;
2933 set_tok_preg (newtok
[2], tok
[0].X_add_number
);
2935 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2938 addend
.X_add_number
+= 4;
2942 insn
.fixups
[0].exp
= addend
;
2943 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_GPDISP_LO16
;
2944 insn
.sequence
= next_sequence_num
--;
2947 #endif /* OBJ_ECOFF || OBJ_ELF */
2952 /* Add symbol+addend to link pool.
2953 Return offset from basesym to entry in link pool.
2955 Add new fixup only if offset isn't 16bit. */
2958 add_to_link_pool (basesym
, sym
, addend
)
2963 segT current_section
= now_seg
;
2964 int current_subsec
= now_subseg
;
2966 bfd_reloc_code_real_type reloc_type
;
2968 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
2971 offset
= - *symbol_get_obj (basesym
);
2973 /* @@ This assumes all entries in a given section will be of the same
2974 size... Probably correct, but unwise to rely on. */
2975 /* This must always be called with the same subsegment. */
2977 if (seginfo
->frchainP
)
2978 for (fixp
= seginfo
->frchainP
->fix_root
;
2979 fixp
!= (fixS
*) NULL
;
2980 fixp
= fixp
->fx_next
, offset
+= 8)
2982 if (fixp
->fx_addsy
== sym
&& fixp
->fx_offset
== addend
)
2984 if (range_signed_16 (offset
))
2991 /* Not found in 16bit signed range. */
2993 subseg_set (alpha_link_section
, 0);
2997 fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, sym
, addend
, 0,
3000 subseg_set (current_section
, current_subsec
);
3001 seginfo
->literal_pool_size
+= 8;
3005 #endif /* OBJ_EVAX */
3007 /* Load a (partial) expression into a target register.
3009 If poffset is not null, after the call it will either contain
3010 O_constant 0, or a 16-bit offset appropriate for any MEM format
3011 instruction. In addition, pbasereg will be modified to point to
3012 the base register to use in that MEM format instruction.
3014 In any case, *pbasereg should contain a base register to add to the
3015 expression. This will normally be either AXP_REG_ZERO or
3016 alpha_gp_register. Symbol addresses will always be loaded via $gp,
3017 so "foo($0)" is interpreted as adding the address of foo to $0;
3018 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
3019 but this is what OSF/1 does.
3021 If explicit relocations of the form !literal!<number> are allowed,
3022 and used, then explict_reloc with be an expression pointer.
3024 Finally, the return value is nonzero if the calling macro may emit
3025 a LITUSE reloc if otherwise appropriate; the return value is the
3026 sequence number to use. */
3029 load_expression (targreg
, exp
, pbasereg
, poffset
)
3031 const expressionS
*exp
;
3033 expressionS
*poffset
;
3035 long emit_lituse
= 0;
3036 offsetT addend
= exp
->X_add_number
;
3037 int basereg
= *pbasereg
;
3038 struct alpha_insn insn
;
3039 expressionS newtok
[3];
3048 /* Attempt to reduce .lit load by splitting the offset from
3049 its symbol when possible, but don't create a situation in
3051 if (!range_signed_32 (addend
) &&
3052 (alpha_noat_on
|| targreg
== AXP_REG_AT
))
3054 lit
= add_to_literal_pool (exp
->X_add_symbol
, addend
,
3055 alpha_lita_section
, 8);
3060 lit
= add_to_literal_pool (exp
->X_add_symbol
, 0,
3061 alpha_lita_section
, 8);
3065 as_fatal (_("overflow in literal (.lita) table"));
3067 /* emit "ldq r, lit(gp)" */
3069 if (basereg
!= alpha_gp_register
&& targreg
== basereg
)
3072 as_bad (_("macro requires $at register while noat in effect"));
3073 if (targreg
== AXP_REG_AT
)
3074 as_bad (_("macro requires $at while $at in use"));
3076 set_tok_reg (newtok
[0], AXP_REG_AT
);
3079 set_tok_reg (newtok
[0], targreg
);
3080 set_tok_sym (newtok
[1], alpha_lita_symbol
, lit
);
3081 set_tok_preg (newtok
[2], alpha_gp_register
);
3083 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
3085 assert (insn
.nfixups
== 1);
3086 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITERAL
;
3087 insn
.sequence
= emit_lituse
= next_sequence_num
--;
3088 #endif /* OBJ_ECOFF */
3090 /* emit "ldq r, gotoff(gp)" */
3092 if (basereg
!= alpha_gp_register
&& targreg
== basereg
)
3095 as_bad (_("macro requires $at register while noat in effect"));
3096 if (targreg
== AXP_REG_AT
)
3097 as_bad (_("macro requires $at while $at in use"));
3099 set_tok_reg (newtok
[0], AXP_REG_AT
);
3102 set_tok_reg (newtok
[0], targreg
);
3104 /* XXX: Disable this .got minimizing optimization so that we can get
3105 better instruction offset knowledge in the compiler. This happens
3106 very infrequently anyway. */
3108 || (!range_signed_32 (addend
)
3109 && (alpha_noat_on
|| targreg
== AXP_REG_AT
)))
3116 set_tok_sym (newtok
[1], exp
->X_add_symbol
, 0);
3119 set_tok_preg (newtok
[2], alpha_gp_register
);
3121 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
3123 assert (insn
.nfixups
== 1);
3124 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_ELF_LITERAL
;
3125 insn
.sequence
= emit_lituse
= next_sequence_num
--;
3126 #endif /* OBJ_ELF */
3130 /* Find symbol or symbol pointer in link section. */
3132 if (exp
->X_add_symbol
== alpha_evax_proc
.symbol
)
3134 if (range_signed_16 (addend
))
3136 set_tok_reg (newtok
[0], targreg
);
3137 set_tok_const (newtok
[1], addend
);
3138 set_tok_preg (newtok
[2], basereg
);
3139 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
3144 set_tok_reg (newtok
[0], targreg
);
3145 set_tok_const (newtok
[1], 0);
3146 set_tok_preg (newtok
[2], basereg
);
3147 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
3152 if (!range_signed_32 (addend
))
3154 link
= add_to_link_pool (alpha_evax_proc
.symbol
,
3155 exp
->X_add_symbol
, addend
);
3160 link
= add_to_link_pool (alpha_evax_proc
.symbol
,
3161 exp
->X_add_symbol
, 0);
3163 set_tok_reg (newtok
[0], targreg
);
3164 set_tok_const (newtok
[1], link
);
3165 set_tok_preg (newtok
[2], basereg
);
3166 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
3168 #endif /* OBJ_EVAX */
3173 if (basereg
!= alpha_gp_register
&& basereg
!= AXP_REG_ZERO
)
3175 /* emit "addq r, base, r" */
3177 set_tok_reg (newtok
[1], basereg
);
3178 set_tok_reg (newtok
[2], targreg
);
3179 assemble_tokens ("addq", newtok
, 3, 0);
3191 /* Assume that this difference expression will be resolved to an
3192 absolute value and that that value will fit in 16 bits. */
3194 set_tok_reg (newtok
[0], targreg
);
3196 set_tok_preg (newtok
[2], basereg
);
3197 assemble_tokens ("lda", newtok
, 3, 0);
3200 set_tok_const (*poffset
, 0);
3204 if (exp
->X_add_number
> 0)
3205 as_bad (_("bignum invalid; zero assumed"));
3207 as_bad (_("floating point number invalid; zero assumed"));
3212 as_bad (_("can't handle expression"));
3217 if (!range_signed_32 (addend
))
3220 long seq_num
= next_sequence_num
--;
3222 /* For 64-bit addends, just put it in the literal pool. */
3225 /* emit "ldq targreg, lit(basereg)" */
3226 lit
= add_to_link_pool (alpha_evax_proc
.symbol
,
3227 section_symbol (absolute_section
), addend
);
3228 set_tok_reg (newtok
[0], targreg
);
3229 set_tok_const (newtok
[1], lit
);
3230 set_tok_preg (newtok
[2], alpha_gp_register
);
3231 assemble_tokens ("ldq", newtok
, 3, 0);
3234 if (alpha_lit8_section
== NULL
)
3236 create_literal_section (".lit8",
3237 &alpha_lit8_section
,
3238 &alpha_lit8_symbol
);
3241 alpha_lit8_literal
= add_to_literal_pool (alpha_lit8_symbol
, 0x8000,
3242 alpha_lita_section
, 8);
3243 if (alpha_lit8_literal
>= 0x8000)
3244 as_fatal (_("overflow in literal (.lita) table"));
3248 lit
= add_to_literal_pool (NULL
, addend
, alpha_lit8_section
, 8) - 0x8000;
3250 as_fatal (_("overflow in literal (.lit8) table"));
3252 /* emit "lda litreg, .lit8+0x8000" */
3254 if (targreg
== basereg
)
3257 as_bad (_("macro requires $at register while noat in effect"));
3258 if (targreg
== AXP_REG_AT
)
3259 as_bad (_("macro requires $at while $at in use"));
3261 set_tok_reg (newtok
[0], AXP_REG_AT
);
3264 set_tok_reg (newtok
[0], targreg
);
3266 set_tok_sym (newtok
[1], alpha_lita_symbol
, alpha_lit8_literal
);
3269 set_tok_sym (newtok
[1], alpha_lit8_symbol
, 0x8000);
3271 set_tok_preg (newtok
[2], alpha_gp_register
);
3273 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
3275 assert (insn
.nfixups
== 1);
3277 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITERAL
;
3280 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_ELF_LITERAL
;
3282 insn
.sequence
= seq_num
;
3286 /* emit "ldq litreg, lit(litreg)" */
3288 set_tok_const (newtok
[1], lit
);
3289 set_tok_preg (newtok
[2], newtok
[0].X_add_number
);
3291 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
3293 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3294 insn
.fixups
[insn
.nfixups
].reloc
= DUMMY_RELOC_LITUSE_BASE
;
3295 insn
.fixups
[insn
.nfixups
].exp
.X_op
= O_absent
;
3297 insn
.sequence
= seq_num
;
3302 /* emit "addq litreg, base, target" */
3304 if (basereg
!= AXP_REG_ZERO
)
3306 set_tok_reg (newtok
[1], basereg
);
3307 set_tok_reg (newtok
[2], targreg
);
3308 assemble_tokens ("addq", newtok
, 3, 0);
3310 #endif /* !OBJ_EVAX */
3313 set_tok_const (*poffset
, 0);
3314 *pbasereg
= targreg
;
3318 offsetT low
, high
, extra
, tmp
;
3320 /* for 32-bit operands, break up the addend */
3322 low
= sign_extend_16 (addend
);
3324 high
= sign_extend_16 (tmp
>> 16);
3326 if (tmp
- (high
<< 16))
3330 high
= sign_extend_16 (tmp
>> 16);
3335 set_tok_reg (newtok
[0], targreg
);
3336 set_tok_preg (newtok
[2], basereg
);
3340 /* emit "ldah r, extra(r) */
3341 set_tok_const (newtok
[1], extra
);
3342 assemble_tokens ("ldah", newtok
, 3, 0);
3343 set_tok_preg (newtok
[2], basereg
= targreg
);
3348 /* emit "ldah r, high(r) */
3349 set_tok_const (newtok
[1], high
);
3350 assemble_tokens ("ldah", newtok
, 3, 0);
3352 set_tok_preg (newtok
[2], basereg
);
3355 if ((low
&& !poffset
) || (!poffset
&& basereg
!= targreg
))
3357 /* emit "lda r, low(base)" */
3358 set_tok_const (newtok
[1], low
);
3359 assemble_tokens ("lda", newtok
, 3, 0);
3365 set_tok_const (*poffset
, low
);
3366 *pbasereg
= basereg
;
3372 /* The lda macro differs from the lda instruction in that it handles
3373 most simple expressions, particualrly symbol address loads and
3377 emit_lda (tok
, ntok
, unused
)
3378 const expressionS
*tok
;
3380 const PTR unused ATTRIBUTE_UNUSED
;
3385 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
3387 basereg
= tok
[2].X_add_number
;
3389 (void) load_expression (tok
[0].X_add_number
, &tok
[1], &basereg
, NULL
);
3392 /* The ldah macro differs from the ldah instruction in that it has $31
3393 as an implied base register. */
3396 emit_ldah (tok
, ntok
, unused
)
3397 const expressionS
*tok
;
3398 int ntok ATTRIBUTE_UNUSED
;
3399 const PTR unused ATTRIBUTE_UNUSED
;
3401 expressionS newtok
[3];
3405 set_tok_preg (newtok
[2], AXP_REG_ZERO
);
3407 assemble_tokens ("ldah", newtok
, 3, 0);
3410 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
3411 etc. They differ from the real instructions in that they do simple
3412 expressions like the lda macro. */
3415 emit_ir_load (tok
, ntok
, opname
)
3416 const expressionS
*tok
;
3422 expressionS newtok
[3];
3423 struct alpha_insn insn
;
3426 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
3428 basereg
= tok
[2].X_add_number
;
3430 lituse
= load_expression (tok
[0].X_add_number
, &tok
[1], &basereg
,
3434 set_tok_preg (newtok
[2], basereg
);
3436 assemble_tokens_to_insn ((const char *) opname
, newtok
, 3, &insn
);
3440 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3441 insn
.fixups
[insn
.nfixups
].reloc
= DUMMY_RELOC_LITUSE_BASE
;
3442 insn
.fixups
[insn
.nfixups
].exp
.X_op
= O_absent
;
3444 insn
.sequence
= lituse
;
3450 /* Handle fp register loads, and both integer and fp register stores.
3451 Again, we handle simple expressions. */
3454 emit_loadstore (tok
, ntok
, opname
)
3455 const expressionS
*tok
;
3461 expressionS newtok
[3];
3462 struct alpha_insn insn
;
3465 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
3467 basereg
= tok
[2].X_add_number
;
3469 if (tok
[1].X_op
!= O_constant
|| !range_signed_16 (tok
[1].X_add_number
))
3472 as_bad (_("macro requires $at register while noat in effect"));
3474 lituse
= load_expression (AXP_REG_AT
, &tok
[1], &basereg
, &newtok
[1]);
3483 set_tok_preg (newtok
[2], basereg
);
3485 assemble_tokens_to_insn ((const char *) opname
, newtok
, 3, &insn
);
3489 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3490 insn
.fixups
[insn
.nfixups
].reloc
= DUMMY_RELOC_LITUSE_BASE
;
3491 insn
.fixups
[insn
.nfixups
].exp
.X_op
= O_absent
;
3493 insn
.sequence
= lituse
;
3499 /* Load a half-word or byte as an unsigned value. */
3502 emit_ldXu (tok
, ntok
, vlgsize
)
3503 const expressionS
*tok
;
3507 if (alpha_target
& AXP_OPCODE_BWX
)
3508 emit_ir_load (tok
, ntok
, ldXu_op
[(long) vlgsize
]);
3511 expressionS newtok
[3];
3512 struct alpha_insn insn
;
3517 as_bad (_("macro requires $at register while noat in effect"));
3520 basereg
= (tok
[1].X_op
== O_constant
3521 ? AXP_REG_ZERO
: alpha_gp_register
);
3523 basereg
= tok
[2].X_add_number
;
3525 /* emit "lda $at, exp" */
3527 lituse
= load_expression (AXP_REG_AT
, &tok
[1], &basereg
, NULL
);
3529 /* emit "ldq_u targ, 0($at)" */
3532 set_tok_const (newtok
[1], 0);
3533 set_tok_preg (newtok
[2], basereg
);
3534 assemble_tokens_to_insn ("ldq_u", newtok
, 3, &insn
);
3538 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3539 insn
.fixups
[insn
.nfixups
].reloc
= DUMMY_RELOC_LITUSE_BASE
;
3540 insn
.fixups
[insn
.nfixups
].exp
.X_op
= O_absent
;
3542 insn
.sequence
= lituse
;
3547 /* emit "extXl targ, $at, targ" */
3549 set_tok_reg (newtok
[1], basereg
);
3550 newtok
[2] = newtok
[0];
3551 assemble_tokens_to_insn (extXl_op
[(long) vlgsize
], newtok
, 3, &insn
);
3555 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3556 insn
.fixups
[insn
.nfixups
].reloc
= DUMMY_RELOC_LITUSE_BYTOFF
;
3557 insn
.fixups
[insn
.nfixups
].exp
.X_op
= O_absent
;
3559 insn
.sequence
= lituse
;
3566 /* Load a half-word or byte as a signed value. */
3569 emit_ldX (tok
, ntok
, vlgsize
)
3570 const expressionS
*tok
;
3574 emit_ldXu (tok
, ntok
, vlgsize
);
3575 assemble_tokens (sextX_op
[(long) vlgsize
], tok
, 1, 1);
3578 /* Load an integral value from an unaligned address as an unsigned
3582 emit_uldXu (tok
, ntok
, vlgsize
)
3583 const expressionS
*tok
;
3587 long lgsize
= (long) vlgsize
;
3588 expressionS newtok
[3];
3591 as_bad (_("macro requires $at register while noat in effect"));
3593 /* emit "lda $at, exp" */
3595 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
3596 newtok
[0].X_add_number
= AXP_REG_AT
;
3597 assemble_tokens ("lda", newtok
, ntok
, 1);
3599 /* emit "ldq_u $t9, 0($at)" */
3601 set_tok_reg (newtok
[0], AXP_REG_T9
);
3602 set_tok_const (newtok
[1], 0);
3603 set_tok_preg (newtok
[2], AXP_REG_AT
);
3604 assemble_tokens ("ldq_u", newtok
, 3, 1);
3606 /* emit "ldq_u $t10, size-1($at)" */
3608 set_tok_reg (newtok
[0], AXP_REG_T10
);
3609 set_tok_const (newtok
[1], (1 << lgsize
) - 1);
3610 assemble_tokens ("ldq_u", newtok
, 3, 1);
3612 /* emit "extXl $t9, $at, $t9" */
3614 set_tok_reg (newtok
[0], AXP_REG_T9
);
3615 set_tok_reg (newtok
[1], AXP_REG_AT
);
3616 set_tok_reg (newtok
[2], AXP_REG_T9
);
3617 assemble_tokens (extXl_op
[lgsize
], newtok
, 3, 1);
3619 /* emit "extXh $t10, $at, $t10" */
3621 set_tok_reg (newtok
[0], AXP_REG_T10
);
3622 set_tok_reg (newtok
[2], AXP_REG_T10
);
3623 assemble_tokens (extXh_op
[lgsize
], newtok
, 3, 1);
3625 /* emit "or $t9, $t10, targ" */
3627 set_tok_reg (newtok
[0], AXP_REG_T9
);
3628 set_tok_reg (newtok
[1], AXP_REG_T10
);
3630 assemble_tokens ("or", newtok
, 3, 1);
3633 /* Load an integral value from an unaligned address as a signed value.
3634 Note that quads should get funneled to the unsigned load since we
3635 don't have to do the sign extension. */
3638 emit_uldX (tok
, ntok
, vlgsize
)
3639 const expressionS
*tok
;
3643 emit_uldXu (tok
, ntok
, vlgsize
);
3644 assemble_tokens (sextX_op
[(long) vlgsize
], tok
, 1, 1);
3647 /* Implement the ldil macro. */
3650 emit_ldil (tok
, ntok
, unused
)
3651 const expressionS
*tok
;
3653 const PTR unused ATTRIBUTE_UNUSED
;
3655 expressionS newtok
[2];
3657 memcpy (newtok
, tok
, sizeof (newtok
));
3658 newtok
[1].X_add_number
= sign_extend_32 (tok
[1].X_add_number
);
3660 assemble_tokens ("lda", newtok
, ntok
, 1);
3663 /* Store a half-word or byte. */
3666 emit_stX (tok
, ntok
, vlgsize
)
3667 const expressionS
*tok
;
3671 int lgsize
= (int) (long) vlgsize
;
3673 if (alpha_target
& AXP_OPCODE_BWX
)
3674 emit_loadstore (tok
, ntok
, stX_op
[lgsize
]);
3677 expressionS newtok
[3];
3678 struct alpha_insn insn
;
3683 as_bad (_("macro requires $at register while noat in effect"));
3686 basereg
= (tok
[1].X_op
== O_constant
3687 ? AXP_REG_ZERO
: alpha_gp_register
);
3689 basereg
= tok
[2].X_add_number
;
3691 /* emit "lda $at, exp" */
3693 lituse
= load_expression (AXP_REG_AT
, &tok
[1], &basereg
, NULL
);
3695 /* emit "ldq_u $t9, 0($at)" */
3697 set_tok_reg (newtok
[0], AXP_REG_T9
);
3698 set_tok_const (newtok
[1], 0);
3699 set_tok_preg (newtok
[2], basereg
);
3700 assemble_tokens_to_insn ("ldq_u", newtok
, 3, &insn
);
3704 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3705 insn
.fixups
[insn
.nfixups
].reloc
= DUMMY_RELOC_LITUSE_BASE
;
3706 insn
.fixups
[insn
.nfixups
].exp
.X_op
= O_absent
;
3708 insn
.sequence
= lituse
;
3713 /* emit "insXl src, $at, $t10" */
3716 set_tok_reg (newtok
[1], basereg
);
3717 set_tok_reg (newtok
[2], AXP_REG_T10
);
3718 assemble_tokens_to_insn (insXl_op
[lgsize
], newtok
, 3, &insn
);
3722 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3723 insn
.fixups
[insn
.nfixups
].reloc
= DUMMY_RELOC_LITUSE_BYTOFF
;
3724 insn
.fixups
[insn
.nfixups
].exp
.X_op
= O_absent
;
3726 insn
.sequence
= lituse
;
3731 /* emit "mskXl $t9, $at, $t9" */
3733 set_tok_reg (newtok
[0], AXP_REG_T9
);
3734 newtok
[2] = newtok
[0];
3735 assemble_tokens_to_insn (mskXl_op
[lgsize
], newtok
, 3, &insn
);
3739 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3740 insn
.fixups
[insn
.nfixups
].reloc
= DUMMY_RELOC_LITUSE_BYTOFF
;
3741 insn
.fixups
[insn
.nfixups
].exp
.X_op
= O_absent
;
3743 insn
.sequence
= lituse
;
3748 /* emit "or $t9, $t10, $t9" */
3750 set_tok_reg (newtok
[1], AXP_REG_T10
);
3751 assemble_tokens ("or", newtok
, 3, 1);
3753 /* emit "stq_u $t9, 0($at) */
3755 set_tok_const(newtok
[1], 0);
3756 set_tok_preg (newtok
[2], AXP_REG_AT
);
3757 assemble_tokens_to_insn ("stq_u", newtok
, 3, &insn
);
3761 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3762 insn
.fixups
[insn
.nfixups
].reloc
= DUMMY_RELOC_LITUSE_BASE
;
3763 insn
.fixups
[insn
.nfixups
].exp
.X_op
= O_absent
;
3765 insn
.sequence
= lituse
;
3772 /* Store an integer to an unaligned address. */
3775 emit_ustX (tok
, ntok
, vlgsize
)
3776 const expressionS
*tok
;
3780 int lgsize
= (int) (long) vlgsize
;
3781 expressionS newtok
[3];
3783 /* emit "lda $at, exp" */
3785 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
3786 newtok
[0].X_add_number
= AXP_REG_AT
;
3787 assemble_tokens ("lda", newtok
, ntok
, 1);
3789 /* emit "ldq_u $9, 0($at)" */
3791 set_tok_reg (newtok
[0], AXP_REG_T9
);
3792 set_tok_const (newtok
[1], 0);
3793 set_tok_preg (newtok
[2], AXP_REG_AT
);
3794 assemble_tokens ("ldq_u", newtok
, 3, 1);
3796 /* emit "ldq_u $10, size-1($at)" */
3798 set_tok_reg (newtok
[0], AXP_REG_T10
);
3799 set_tok_const (newtok
[1], (1 << lgsize
) - 1);
3800 assemble_tokens ("ldq_u", newtok
, 3, 1);
3802 /* emit "insXl src, $at, $t11" */
3805 set_tok_reg (newtok
[1], AXP_REG_AT
);
3806 set_tok_reg (newtok
[2], AXP_REG_T11
);
3807 assemble_tokens (insXl_op
[lgsize
], newtok
, 3, 1);
3809 /* emit "insXh src, $at, $t12" */
3811 set_tok_reg (newtok
[2], AXP_REG_T12
);
3812 assemble_tokens (insXh_op
[lgsize
], newtok
, 3, 1);
3814 /* emit "mskXl $t9, $at, $t9" */
3816 set_tok_reg (newtok
[0], AXP_REG_T9
);
3817 newtok
[2] = newtok
[0];
3818 assemble_tokens (mskXl_op
[lgsize
], newtok
, 3, 1);
3820 /* emit "mskXh $t10, $at, $t10" */
3822 set_tok_reg (newtok
[0], AXP_REG_T10
);
3823 newtok
[2] = newtok
[0];
3824 assemble_tokens (mskXh_op
[lgsize
], newtok
, 3, 1);
3826 /* emit "or $t9, $t11, $t9" */
3828 set_tok_reg (newtok
[0], AXP_REG_T9
);
3829 set_tok_reg (newtok
[1], AXP_REG_T11
);
3830 newtok
[2] = newtok
[0];
3831 assemble_tokens ("or", newtok
, 3, 1);
3833 /* emit "or $t10, $t12, $t10" */
3835 set_tok_reg (newtok
[0], AXP_REG_T10
);
3836 set_tok_reg (newtok
[1], AXP_REG_T12
);
3837 newtok
[2] = newtok
[0];
3838 assemble_tokens ("or", newtok
, 3, 1);
3840 /* emit "stq_u $t9, 0($at)" */
3842 set_tok_reg (newtok
[0], AXP_REG_T9
);
3843 set_tok_const (newtok
[1], 0);
3844 set_tok_preg (newtok
[2], AXP_REG_AT
);
3845 assemble_tokens ("stq_u", newtok
, 3, 1);
3847 /* emit "stq_u $t10, size-1($at)" */
3849 set_tok_reg (newtok
[0], AXP_REG_T10
);
3850 set_tok_const (newtok
[1], (1 << lgsize
) - 1);
3851 assemble_tokens ("stq_u", newtok
, 3, 1);
3854 /* Sign extend a half-word or byte. The 32-bit sign extend is
3855 implemented as "addl $31, $r, $t" in the opcode table. */
3858 emit_sextX (tok
, ntok
, vlgsize
)
3859 const expressionS
*tok
;
3863 long lgsize
= (long) vlgsize
;
3865 if (alpha_target
& AXP_OPCODE_BWX
)
3866 assemble_tokens (sextX_op
[lgsize
], tok
, ntok
, 0);
3869 int bitshift
= 64 - 8 * (1 << lgsize
);
3870 expressionS newtok
[3];
3872 /* emit "sll src,bits,dst" */
3875 set_tok_const (newtok
[1], bitshift
);
3876 newtok
[2] = tok
[ntok
- 1];
3877 assemble_tokens ("sll", newtok
, 3, 1);
3879 /* emit "sra dst,bits,dst" */
3881 newtok
[0] = newtok
[2];
3882 assemble_tokens ("sra", newtok
, 3, 1);
3886 /* Implement the division and modulus macros. */
3890 /* Make register usage like in normal procedure call.
3891 Don't clobber PV and RA. */
3894 emit_division (tok
, ntok
, symname
)
3895 const expressionS
*tok
;
3899 /* DIVISION and MODULUS. Yech.
3904 mov x,R16 # if x != R16
3905 mov y,R17 # if y != R17
3910 with appropriate optimizations if R0,R16,R17 are the registers
3911 specified by the compiler. */
3915 expressionS newtok
[3];
3917 xr
= regno (tok
[0].X_add_number
);
3918 yr
= regno (tok
[1].X_add_number
);
3923 rr
= regno (tok
[2].X_add_number
);
3925 /* Move the operands into the right place. */
3926 if (yr
== AXP_REG_R16
&& xr
== AXP_REG_R17
)
3928 /* They are in exactly the wrong order -- swap through AT. */
3931 as_bad (_("macro requires $at register while noat in effect"));
3933 set_tok_reg (newtok
[0], AXP_REG_R16
);
3934 set_tok_reg (newtok
[1], AXP_REG_AT
);
3935 assemble_tokens ("mov", newtok
, 2, 1);
3937 set_tok_reg (newtok
[0], AXP_REG_R17
);
3938 set_tok_reg (newtok
[1], AXP_REG_R16
);
3939 assemble_tokens ("mov", newtok
, 2, 1);
3941 set_tok_reg (newtok
[0], AXP_REG_AT
);
3942 set_tok_reg (newtok
[1], AXP_REG_R17
);
3943 assemble_tokens ("mov", newtok
, 2, 1);
3947 if (yr
== AXP_REG_R16
)
3949 set_tok_reg (newtok
[0], AXP_REG_R16
);
3950 set_tok_reg (newtok
[1], AXP_REG_R17
);
3951 assemble_tokens ("mov", newtok
, 2, 1);
3954 if (xr
!= AXP_REG_R16
)
3956 set_tok_reg (newtok
[0], xr
);
3957 set_tok_reg (newtok
[1], AXP_REG_R16
);
3958 assemble_tokens ("mov", newtok
, 2, 1);
3961 if (yr
!= AXP_REG_R16
&& yr
!= AXP_REG_R17
)
3963 set_tok_reg (newtok
[0], yr
);
3964 set_tok_reg (newtok
[1], AXP_REG_R17
);
3965 assemble_tokens ("mov", newtok
, 2, 1);
3969 sym
= symbol_find_or_make ((const char *) symname
);
3971 set_tok_reg (newtok
[0], AXP_REG_AT
);
3972 set_tok_sym (newtok
[1], sym
, 0);
3973 assemble_tokens ("lda", newtok
, 2, 1);
3975 /* Call the division routine. */
3976 set_tok_reg (newtok
[0], AXP_REG_AT
);
3977 set_tok_cpreg (newtok
[1], AXP_REG_AT
);
3978 set_tok_const (newtok
[2], 0);
3979 assemble_tokens ("jsr", newtok
, 3, 1);
3981 /* Move the result to the right place. */
3982 if (rr
!= AXP_REG_R0
)
3984 set_tok_reg (newtok
[0], AXP_REG_R0
);
3985 set_tok_reg (newtok
[1], rr
);
3986 assemble_tokens ("mov", newtok
, 2, 1);
3990 #else /* !OBJ_EVAX */
3993 emit_division (tok
, ntok
, symname
)
3994 const expressionS
*tok
;
3998 /* DIVISION and MODULUS. Yech.
4008 with appropriate optimizations if t10,t11,t12 are the registers
4009 specified by the compiler. */
4013 expressionS newtok
[3];
4015 xr
= regno (tok
[0].X_add_number
);
4016 yr
= regno (tok
[1].X_add_number
);
4021 rr
= regno (tok
[2].X_add_number
);
4023 sym
= symbol_find_or_make ((const char *) symname
);
4025 /* Move the operands into the right place. */
4026 if (yr
== AXP_REG_T10
&& xr
== AXP_REG_T11
)
4028 /* They are in exactly the wrong order -- swap through AT. */
4030 as_bad (_("macro requires $at register while noat in effect"));
4032 set_tok_reg (newtok
[0], AXP_REG_T10
);
4033 set_tok_reg (newtok
[1], AXP_REG_AT
);
4034 assemble_tokens ("mov", newtok
, 2, 1);
4036 set_tok_reg (newtok
[0], AXP_REG_T11
);
4037 set_tok_reg (newtok
[1], AXP_REG_T10
);
4038 assemble_tokens ("mov", newtok
, 2, 1);
4040 set_tok_reg (newtok
[0], AXP_REG_AT
);
4041 set_tok_reg (newtok
[1], AXP_REG_T11
);
4042 assemble_tokens ("mov", newtok
, 2, 1);
4046 if (yr
== AXP_REG_T10
)
4048 set_tok_reg (newtok
[0], AXP_REG_T10
);
4049 set_tok_reg (newtok
[1], AXP_REG_T11
);
4050 assemble_tokens ("mov", newtok
, 2, 1);
4053 if (xr
!= AXP_REG_T10
)
4055 set_tok_reg (newtok
[0], xr
);
4056 set_tok_reg (newtok
[1], AXP_REG_T10
);
4057 assemble_tokens ("mov", newtok
, 2, 1);
4060 if (yr
!= AXP_REG_T10
&& yr
!= AXP_REG_T11
)
4062 set_tok_reg (newtok
[0], yr
);
4063 set_tok_reg (newtok
[1], AXP_REG_T11
);
4064 assemble_tokens ("mov", newtok
, 2, 1);
4068 /* Call the division routine. */
4069 set_tok_reg (newtok
[0], AXP_REG_T9
);
4070 set_tok_sym (newtok
[1], sym
, 0);
4071 assemble_tokens ("jsr", newtok
, 2, 1);
4073 /* Reload the GP register. */
4077 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
4078 set_tok_reg (newtok
[0], alpha_gp_register
);
4079 set_tok_const (newtok
[1], 0);
4080 set_tok_preg (newtok
[2], AXP_REG_T9
);
4081 assemble_tokens ("ldgp", newtok
, 3, 1);
4084 /* Move the result to the right place. */
4085 if (rr
!= AXP_REG_T12
)
4087 set_tok_reg (newtok
[0], AXP_REG_T12
);
4088 set_tok_reg (newtok
[1], rr
);
4089 assemble_tokens ("mov", newtok
, 2, 1);
4093 #endif /* !OBJ_EVAX */
4095 /* The jsr and jmp macros differ from their instruction counterparts
4096 in that they can load the target address and default most
4100 emit_jsrjmp (tok
, ntok
, vopname
)
4101 const expressionS
*tok
;
4105 const char *opname
= (const char *) vopname
;
4106 struct alpha_insn insn
;
4107 expressionS newtok
[3];
4111 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_register
)
4112 r
= regno (tok
[tokidx
++].X_add_number
);
4114 r
= strcmp (opname
, "jmp") == 0 ? AXP_REG_ZERO
: AXP_REG_RA
;
4116 set_tok_reg (newtok
[0], r
);
4118 if (tokidx
< ntok
&&
4119 (tok
[tokidx
].X_op
== O_pregister
|| tok
[tokidx
].X_op
== O_cpregister
))
4120 r
= regno (tok
[tokidx
++].X_add_number
);
4122 /* keep register if jsr $n.<sym> */
4126 int basereg
= alpha_gp_register
;
4127 lituse
= load_expression (r
= AXP_REG_PV
, &tok
[tokidx
], &basereg
, NULL
);
4131 set_tok_cpreg (newtok
[1], r
);
4134 /* FIXME: Add hint relocs to BFD for evax. */
4137 newtok
[2] = tok
[tokidx
];
4140 set_tok_const (newtok
[2], 0);
4142 assemble_tokens_to_insn (opname
, newtok
, 3, &insn
);
4146 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
4147 insn
.fixups
[insn
.nfixups
].reloc
= DUMMY_RELOC_LITUSE_JSR
;
4148 insn
.fixups
[insn
.nfixups
].exp
.X_op
= O_absent
;
4150 insn
.sequence
= lituse
;
4156 /* The ret and jcr instructions differ from their instruction
4157 counterparts in that everything can be defaulted. */
4160 emit_retjcr (tok
, ntok
, vopname
)
4161 const expressionS
*tok
;
4165 const char *opname
= (const char *) vopname
;
4166 expressionS newtok
[3];
4169 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_register
)
4170 r
= regno (tok
[tokidx
++].X_add_number
);
4174 set_tok_reg (newtok
[0], r
);
4176 if (tokidx
< ntok
&&
4177 (tok
[tokidx
].X_op
== O_pregister
|| tok
[tokidx
].X_op
== O_cpregister
))
4178 r
= regno (tok
[tokidx
++].X_add_number
);
4182 set_tok_cpreg (newtok
[1], r
);
4185 newtok
[2] = tok
[tokidx
];
4187 set_tok_const (newtok
[2], strcmp (opname
, "ret") == 0);
4189 assemble_tokens (opname
, newtok
, 3, 0);
4192 /* Assembler directives. */
4194 /* Handle the .text pseudo-op. This is like the usual one, but it
4195 clears alpha_insn_label and restores auto alignment. */
4207 alpha_insn_label
= NULL
;
4208 alpha_auto_align_on
= 1;
4209 alpha_current_align
= 0;
4212 /* Handle the .data pseudo-op. This is like the usual one, but it
4213 clears alpha_insn_label and restores auto alignment. */
4224 alpha_insn_label
= NULL
;
4225 alpha_auto_align_on
= 1;
4226 alpha_current_align
= 0;
4229 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
4231 /* Handle the OSF/1 and openVMS .comm pseudo quirks.
4232 openVMS constructs a section for every common symbol. */
4235 s_alpha_comm (ignore
)
4236 int ignore ATTRIBUTE_UNUSED
;
4238 register char *name
;
4242 register symbolS
*symbolP
;
4245 segT current_section
= now_seg
;
4246 int current_subsec
= now_subseg
;
4250 name
= input_line_pointer
;
4251 c
= get_symbol_end ();
4253 /* just after name is now '\0' */
4254 p
= input_line_pointer
;
4259 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
4260 if (*input_line_pointer
== ',')
4262 input_line_pointer
++;
4265 if ((temp
= get_absolute_expression ()) < 0)
4267 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
4268 ignore_rest_of_line ();
4273 symbolP
= symbol_find_or_make (name
);
4276 /* Make a section for the common symbol. */
4277 new_seg
= subseg_new (xstrdup (name
), 0);
4283 /* alignment might follow */
4284 if (*input_line_pointer
== ',')
4288 input_line_pointer
++;
4289 align
= get_absolute_expression ();
4290 bfd_set_section_alignment (stdoutput
, new_seg
, align
);
4294 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
4296 as_bad (_("Ignoring attempt to re-define symbol"));
4297 ignore_rest_of_line ();
4302 if (bfd_section_size (stdoutput
, new_seg
) > 0)
4304 if (bfd_section_size (stdoutput
, new_seg
) != temp
)
4305 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4306 S_GET_NAME (symbolP
),
4307 (long) bfd_section_size (stdoutput
, new_seg
),
4311 if (S_GET_VALUE (symbolP
))
4313 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
4314 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4315 S_GET_NAME (symbolP
),
4316 (long) S_GET_VALUE (symbolP
),
4323 subseg_set (new_seg
, 0);
4324 p
= frag_more (temp
);
4325 new_seg
->flags
|= SEC_IS_COMMON
;
4326 if (! S_IS_DEFINED (symbolP
))
4327 S_SET_SEGMENT (symbolP
, new_seg
);
4329 S_SET_VALUE (symbolP
, (valueT
) temp
);
4331 S_SET_EXTERNAL (symbolP
);
4335 subseg_set (current_section
, current_subsec
);
4338 know (symbol_get_frag (symbolP
) == &zero_address_frag
);
4340 demand_empty_rest_of_line ();
4343 #endif /* ! OBJ_ELF */
4347 /* Handle the .rdata pseudo-op. This is like the usual one, but it
4348 clears alpha_insn_label and restores auto alignment. */
4351 s_alpha_rdata (ignore
)
4352 int ignore ATTRIBUTE_UNUSED
;
4356 temp
= get_absolute_expression ();
4357 subseg_new (".rdata", 0);
4358 demand_empty_rest_of_line ();
4359 alpha_insn_label
= NULL
;
4360 alpha_auto_align_on
= 1;
4361 alpha_current_align
= 0;
4368 /* Handle the .sdata pseudo-op. This is like the usual one, but it
4369 clears alpha_insn_label and restores auto alignment. */
4372 s_alpha_sdata (ignore
)
4373 int ignore ATTRIBUTE_UNUSED
;
4377 temp
= get_absolute_expression ();
4378 subseg_new (".sdata", 0);
4379 demand_empty_rest_of_line ();
4380 alpha_insn_label
= NULL
;
4381 alpha_auto_align_on
= 1;
4382 alpha_current_align
= 0;
4388 /* Handle the .section pseudo-op. This is like the usual one, but it
4389 clears alpha_insn_label and restores auto alignment. */
4392 s_alpha_section (ignore
)
4393 int ignore ATTRIBUTE_UNUSED
;
4395 obj_elf_section (ignore
);
4397 alpha_insn_label
= NULL
;
4398 alpha_auto_align_on
= 1;
4399 alpha_current_align
= 0;
4404 int dummy ATTRIBUTE_UNUSED
;
4406 if (ECOFF_DEBUGGING
)
4407 ecoff_directive_ent (0);
4410 char *name
, name_end
;
4411 name
= input_line_pointer
;
4412 name_end
= get_symbol_end ();
4414 if (! is_name_beginner (*name
))
4416 as_warn (_(".ent directive has no name"));
4417 *input_line_pointer
= name_end
;
4423 if (alpha_cur_ent_sym
)
4424 as_warn (_("nested .ent directives"));
4426 sym
= symbol_find_or_make (name
);
4427 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4428 alpha_cur_ent_sym
= sym
;
4430 /* The .ent directive is sometimes followed by a number. Not sure
4431 what it really means, but ignore it. */
4432 *input_line_pointer
= name_end
;
4434 if (*input_line_pointer
== ',')
4436 input_line_pointer
++;
4439 if (ISDIGIT (*input_line_pointer
) || *input_line_pointer
== '-')
4440 (void) get_absolute_expression ();
4442 demand_empty_rest_of_line ();
4448 int dummy ATTRIBUTE_UNUSED
;
4450 if (ECOFF_DEBUGGING
)
4451 ecoff_directive_end (0);
4454 char *name
, name_end
;
4455 name
= input_line_pointer
;
4456 name_end
= get_symbol_end ();
4458 if (! is_name_beginner (*name
))
4460 as_warn (_(".end directive has no name"));
4461 *input_line_pointer
= name_end
;
4467 sym
= symbol_find (name
);
4468 if (sym
!= alpha_cur_ent_sym
)
4469 as_warn (_(".end directive names different symbol than .ent"));
4471 /* Create an expression to calculate the size of the function. */
4474 symbol_get_obj (sym
)->size
=
4475 (expressionS
*) xmalloc (sizeof (expressionS
));
4476 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4477 symbol_get_obj (sym
)->size
->X_add_symbol
4478 = symbol_new ("L0\001", now_seg
, frag_now_fix (), frag_now
);
4479 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4480 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4483 alpha_cur_ent_sym
= NULL
;
4485 *input_line_pointer
= name_end
;
4487 demand_empty_rest_of_line ();
4495 if (ECOFF_DEBUGGING
)
4498 ecoff_directive_fmask (0);
4500 ecoff_directive_mask (0);
4503 discard_rest_of_line ();
4507 s_alpha_frame (dummy
)
4508 int dummy ATTRIBUTE_UNUSED
;
4510 if (ECOFF_DEBUGGING
)
4511 ecoff_directive_frame (0);
4513 discard_rest_of_line ();
4517 s_alpha_prologue (ignore
)
4518 int ignore ATTRIBUTE_UNUSED
;
4523 arg
= get_absolute_expression ();
4524 demand_empty_rest_of_line ();
4526 if (ECOFF_DEBUGGING
)
4527 sym
= ecoff_get_cur_proc_sym ();
4529 sym
= alpha_cur_ent_sym
;
4533 as_bad (_(".prologue directive without a preceding .ent directive"));
4539 case 0: /* No PV required. */
4540 S_SET_OTHER (sym
, STO_ALPHA_NOPV
4541 | (S_GET_OTHER (sym
) & ~STO_ALPHA_STD_GPLOAD
));
4543 case 1: /* Std GP load. */
4544 S_SET_OTHER (sym
, STO_ALPHA_STD_GPLOAD
4545 | (S_GET_OTHER (sym
) & ~STO_ALPHA_STD_GPLOAD
));
4547 case 2: /* Non-std use of PV. */
4551 as_bad (_("Invalid argument %d to .prologue."), arg
);
4556 static char *first_file_directive
;
4559 s_alpha_file (ignore
)
4560 int ignore ATTRIBUTE_UNUSED
;
4562 /* Save the first .file directive we see, so that we can change our
4563 minds about whether ecoff debugging should or shouldn't be enabled. */
4564 if (alpha_flag_mdebug
< 0 && ! first_file_directive
)
4566 char *start
= input_line_pointer
;
4569 discard_rest_of_line ();
4571 len
= input_line_pointer
- start
;
4572 first_file_directive
= xmalloc (len
+ 1);
4573 memcpy (first_file_directive
, start
, len
);
4574 first_file_directive
[len
] = '\0';
4576 input_line_pointer
= start
;
4579 if (ECOFF_DEBUGGING
)
4580 ecoff_directive_file (0);
4582 dwarf2_directive_file (0);
4586 s_alpha_loc (ignore
)
4587 int ignore ATTRIBUTE_UNUSED
;
4589 if (ECOFF_DEBUGGING
)
4590 ecoff_directive_loc (0);
4592 dwarf2_directive_loc (0);
4599 /* If we've been undecided about mdebug, make up our minds in favour. */
4600 if (alpha_flag_mdebug
< 0)
4602 segT sec
= subseg_new (".mdebug", 0);
4603 bfd_set_section_flags (stdoutput
, sec
, SEC_HAS_CONTENTS
| SEC_READONLY
);
4604 bfd_set_section_alignment (stdoutput
, sec
, 3);
4606 ecoff_read_begin_hook ();
4608 if (first_file_directive
)
4610 char *save_ilp
= input_line_pointer
;
4611 input_line_pointer
= first_file_directive
;
4612 ecoff_directive_file (0);
4613 input_line_pointer
= save_ilp
;
4614 free (first_file_directive
);
4617 alpha_flag_mdebug
= 1;
4623 s_alpha_coff_wrapper (which
)
4626 static void (* const fns
[]) PARAMS ((int)) = {
4627 ecoff_directive_begin
,
4628 ecoff_directive_bend
,
4629 ecoff_directive_def
,
4630 ecoff_directive_dim
,
4631 ecoff_directive_endef
,
4632 ecoff_directive_scl
,
4633 ecoff_directive_tag
,
4634 ecoff_directive_val
,
4637 assert (which
>= 0 && which
< (int) (sizeof (fns
)/sizeof (*fns
)));
4639 if (ECOFF_DEBUGGING
)
4643 as_bad (_("ECOFF debugging is disabled."));
4644 ignore_rest_of_line ();
4647 #endif /* OBJ_ELF */
4651 /* Handle the section specific pseudo-op. */
4654 s_alpha_section (secid
)
4658 #define EVAX_SECTION_COUNT 5
4659 static char *section_name
[EVAX_SECTION_COUNT
+ 1] =
4660 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
4662 if ((secid
<= 0) || (secid
> EVAX_SECTION_COUNT
))
4664 as_fatal (_("Unknown section directive"));
4665 demand_empty_rest_of_line ();
4668 temp
= get_absolute_expression ();
4669 subseg_new (section_name
[secid
], 0);
4670 demand_empty_rest_of_line ();
4671 alpha_insn_label
= NULL
;
4672 alpha_auto_align_on
= 1;
4673 alpha_current_align
= 0;
4676 /* Parse .ent directives. */
4679 s_alpha_ent (ignore
)
4680 int ignore ATTRIBUTE_UNUSED
;
4683 expressionS symexpr
;
4685 alpha_evax_proc
.pdsckind
= 0;
4686 alpha_evax_proc
.framereg
= -1;
4687 alpha_evax_proc
.framesize
= 0;
4688 alpha_evax_proc
.rsa_offset
= 0;
4689 alpha_evax_proc
.ra_save
= AXP_REG_RA
;
4690 alpha_evax_proc
.fp_save
= -1;
4691 alpha_evax_proc
.imask
= 0;
4692 alpha_evax_proc
.fmask
= 0;
4693 alpha_evax_proc
.prologue
= 0;
4694 alpha_evax_proc
.type
= 0;
4696 expression (&symexpr
);
4698 if (symexpr
.X_op
!= O_symbol
)
4700 as_fatal (_(".ent directive has no symbol"));
4701 demand_empty_rest_of_line ();
4705 symbol
= make_expr_symbol (&symexpr
);
4706 symbol_get_bfdsym (symbol
)->flags
|= BSF_FUNCTION
;
4707 alpha_evax_proc
.symbol
= symbol
;
4709 demand_empty_rest_of_line ();
4713 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
4716 s_alpha_frame (ignore
)
4717 int ignore ATTRIBUTE_UNUSED
;
4721 alpha_evax_proc
.framereg
= tc_get_register (1);
4724 if (*input_line_pointer
++ != ','
4725 || get_absolute_expression_and_terminator (&val
) != ',')
4727 as_warn (_("Bad .frame directive 1./2. param"));
4728 --input_line_pointer
;
4729 demand_empty_rest_of_line ();
4733 alpha_evax_proc
.framesize
= val
;
4735 (void) tc_get_register (1);
4737 if (*input_line_pointer
++ != ',')
4739 as_warn (_("Bad .frame directive 3./4. param"));
4740 --input_line_pointer
;
4741 demand_empty_rest_of_line ();
4744 alpha_evax_proc
.rsa_offset
= get_absolute_expression ();
4750 s_alpha_pdesc (ignore
)
4751 int ignore ATTRIBUTE_UNUSED
;
4760 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
4762 if (now_seg
!= alpha_link_section
)
4764 as_bad (_(".pdesc directive not in link (.link) section"));
4765 demand_empty_rest_of_line ();
4769 if ((alpha_evax_proc
.symbol
== 0)
4770 || (!S_IS_DEFINED (alpha_evax_proc
.symbol
)))
4772 as_fatal (_(".pdesc has no matching .ent"));
4773 demand_empty_rest_of_line ();
4777 *symbol_get_obj (alpha_evax_proc
.symbol
) =
4778 (valueT
) seginfo
->literal_pool_size
;
4781 if (exp
.X_op
!= O_symbol
)
4783 as_warn (_(".pdesc directive has no entry symbol"));
4784 demand_empty_rest_of_line ();
4788 entry_sym
= make_expr_symbol (&exp
);
4789 /* Save bfd symbol of proc desc in function symbol. */
4790 symbol_get_bfdsym (alpha_evax_proc
.symbol
)->udata
.p
4791 = symbol_get_bfdsym (entry_sym
);
4794 if (*input_line_pointer
++ != ',')
4796 as_warn (_("No comma after .pdesc <entryname>"));
4797 demand_empty_rest_of_line ();
4802 name
= input_line_pointer
;
4803 name_end
= get_symbol_end ();
4805 if (strncmp (name
, "stack", 5) == 0)
4807 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_FP_STACK
;
4809 else if (strncmp (name
, "reg", 3) == 0)
4811 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_FP_REGISTER
;
4813 else if (strncmp (name
, "null", 4) == 0)
4815 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_NULL
;
4819 as_fatal (_("unknown procedure kind"));
4820 demand_empty_rest_of_line ();
4824 *input_line_pointer
= name_end
;
4825 demand_empty_rest_of_line ();
4827 #ifdef md_flush_pending_output
4828 md_flush_pending_output ();
4831 frag_align (3, 0, 0);
4833 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
4835 seginfo
->literal_pool_size
+= 16;
4837 *p
= alpha_evax_proc
.pdsckind
4838 | ((alpha_evax_proc
.framereg
== 29) ? PDSC_S_M_BASE_REG_IS_FP
: 0);
4839 *(p
+ 1) = PDSC_S_M_NATIVE
| PDSC_S_M_NO_JACKET
;
4841 switch (alpha_evax_proc
.pdsckind
)
4843 case PDSC_S_K_KIND_NULL
:
4847 case PDSC_S_K_KIND_FP_REGISTER
:
4848 *(p
+ 2) = alpha_evax_proc
.fp_save
;
4849 *(p
+ 3) = alpha_evax_proc
.ra_save
;
4851 case PDSC_S_K_KIND_FP_STACK
:
4852 md_number_to_chars (p
+ 2, (valueT
) alpha_evax_proc
.rsa_offset
, 2);
4854 default: /* impossible */
4859 *(p
+ 5) = alpha_evax_proc
.type
& 0x0f;
4861 /* Signature offset. */
4862 md_number_to_chars (p
+ 6, (valueT
) 0, 2);
4864 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+8, 8, &exp
, 0, BFD_RELOC_64
);
4866 if (alpha_evax_proc
.pdsckind
== PDSC_S_K_KIND_NULL
)
4869 /* Add dummy fix to make add_to_link_pool work. */
4871 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
4873 seginfo
->literal_pool_size
+= 8;
4875 /* pdesc+16: Size. */
4876 md_number_to_chars (p
, (valueT
) alpha_evax_proc
.framesize
, 4);
4878 md_number_to_chars (p
+ 4, (valueT
) 0, 2);
4881 md_number_to_chars (p
+ 6, alpha_evax_proc
.prologue
, 2);
4883 if (alpha_evax_proc
.pdsckind
== PDSC_S_K_KIND_FP_REGISTER
)
4886 /* Add dummy fix to make add_to_link_pool work. */
4888 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
4890 seginfo
->literal_pool_size
+= 8;
4892 /* pdesc+24: register masks. */
4894 md_number_to_chars (p
, alpha_evax_proc
.imask
, 4);
4895 md_number_to_chars (p
+ 4, alpha_evax_proc
.fmask
, 4);
4900 /* Support for crash debug on vms. */
4903 s_alpha_name (ignore
)
4904 int ignore ATTRIBUTE_UNUSED
;
4908 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
4910 if (now_seg
!= alpha_link_section
)
4912 as_bad (_(".name directive not in link (.link) section"));
4913 demand_empty_rest_of_line ();
4918 if (exp
.X_op
!= O_symbol
)
4920 as_warn (_(".name directive has no symbol"));
4921 demand_empty_rest_of_line ();
4925 demand_empty_rest_of_line ();
4927 #ifdef md_flush_pending_output
4928 md_flush_pending_output ();
4931 frag_align (3, 0, 0);
4933 seginfo
->literal_pool_size
+= 8;
4935 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 8, &exp
, 0, BFD_RELOC_64
);
4941 s_alpha_linkage (ignore
)
4942 int ignore ATTRIBUTE_UNUSED
;
4947 #ifdef md_flush_pending_output
4948 md_flush_pending_output ();
4952 if (exp
.X_op
!= O_symbol
)
4954 as_fatal (_("No symbol after .linkage"));
4958 p
= frag_more (LKP_S_K_SIZE
);
4959 memset (p
, 0, LKP_S_K_SIZE
);
4960 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, LKP_S_K_SIZE
, &exp
, 0,\
4961 BFD_RELOC_ALPHA_LINKAGE
);
4963 demand_empty_rest_of_line ();
4969 s_alpha_code_address (ignore
)
4970 int ignore ATTRIBUTE_UNUSED
;
4975 #ifdef md_flush_pending_output
4976 md_flush_pending_output ();
4980 if (exp
.X_op
!= O_symbol
)
4982 as_fatal (_("No symbol after .code_address"));
4988 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 8, &exp
, 0,\
4989 BFD_RELOC_ALPHA_CODEADDR
);
4991 demand_empty_rest_of_line ();
4997 s_alpha_fp_save (ignore
)
4998 int ignore ATTRIBUTE_UNUSED
;
5001 alpha_evax_proc
.fp_save
= tc_get_register (1);
5003 demand_empty_rest_of_line ();
5008 s_alpha_mask (ignore
)
5009 int ignore ATTRIBUTE_UNUSED
;
5013 if (get_absolute_expression_and_terminator (&val
) != ',')
5015 as_warn (_("Bad .mask directive"));
5016 --input_line_pointer
;
5020 alpha_evax_proc
.imask
= val
;
5021 (void) get_absolute_expression ();
5023 demand_empty_rest_of_line ();
5029 s_alpha_fmask (ignore
)
5030 int ignore ATTRIBUTE_UNUSED
;
5034 if (get_absolute_expression_and_terminator (&val
) != ',')
5036 as_warn (_("Bad .fmask directive"));
5037 --input_line_pointer
;
5041 alpha_evax_proc
.fmask
= val
;
5042 (void) get_absolute_expression ();
5044 demand_empty_rest_of_line ();
5050 s_alpha_end (ignore
)
5051 int ignore ATTRIBUTE_UNUSED
;
5055 c
= get_symbol_end ();
5056 *input_line_pointer
= c
;
5057 demand_empty_rest_of_line ();
5058 alpha_evax_proc
.symbol
= 0;
5064 s_alpha_file (ignore
)
5065 int ignore ATTRIBUTE_UNUSED
;
5069 static char case_hack
[32];
5071 extern char *demand_copy_string
PARAMS ((int *lenP
));
5073 sprintf (case_hack
, "<CASE:%01d%01d>",
5074 alpha_flag_hash_long_names
, alpha_flag_show_after_trunc
);
5076 s
= symbol_find_or_make (case_hack
);
5077 symbol_get_bfdsym (s
)->flags
|= BSF_FILE
;
5079 get_absolute_expression ();
5080 s
= symbol_find_or_make (demand_copy_string (&length
));
5081 symbol_get_bfdsym (s
)->flags
|= BSF_FILE
;
5082 demand_empty_rest_of_line ();
5086 #endif /* OBJ_EVAX */
5088 /* Handle the .gprel32 pseudo op. */
5091 s_alpha_gprel32 (ignore
)
5092 int ignore ATTRIBUTE_UNUSED
;
5104 e
.X_add_symbol
= section_symbol (absolute_section
);
5117 e
.X_add_symbol
= section_symbol (absolute_section
);
5120 e
.X_op
= O_subtract
;
5121 e
.X_op_symbol
= alpha_gp_symbol
;
5129 if (alpha_auto_align_on
&& alpha_current_align
< 2)
5130 alpha_align (2, (char *) NULL
, alpha_insn_label
, 0);
5131 if (alpha_current_align
> 2)
5132 alpha_current_align
= 2;
5133 alpha_insn_label
= NULL
;
5137 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
5138 &e
, 0, BFD_RELOC_GPREL32
);
5141 /* Handle floating point allocation pseudo-ops. This is like the
5142 generic vresion, but it makes sure the current label, if any, is
5143 correctly aligned. */
5146 s_alpha_float_cons (type
)
5173 if (alpha_auto_align_on
&& alpha_current_align
< log_size
)
5174 alpha_align (log_size
, (char *) NULL
, alpha_insn_label
, 0);
5175 if (alpha_current_align
> log_size
)
5176 alpha_current_align
= log_size
;
5177 alpha_insn_label
= NULL
;
5182 /* Handle the .proc pseudo op. We don't really do much with it except
5186 s_alpha_proc (is_static
)
5187 int is_static ATTRIBUTE_UNUSED
;
5195 /* Takes ".proc name,nargs" */
5197 name
= input_line_pointer
;
5198 c
= get_symbol_end ();
5199 p
= input_line_pointer
;
5200 symbolP
= symbol_find_or_make (name
);
5203 if (*input_line_pointer
!= ',')
5206 as_warn (_("Expected comma after name \"%s\""), name
);
5209 ignore_rest_of_line ();
5213 input_line_pointer
++;
5214 temp
= get_absolute_expression ();
5216 /* *symbol_get_obj (symbolP) = (signed char) temp; */
5217 as_warn (_("unhandled: .proc %s,%d"), name
, temp
);
5218 demand_empty_rest_of_line ();
5221 /* Handle the .set pseudo op. This is used to turn on and off most of
5222 the assembler features. */
5226 int x ATTRIBUTE_UNUSED
;
5232 name
= input_line_pointer
;
5233 ch
= get_symbol_end ();
5236 if (s
[0] == 'n' && s
[1] == 'o')
5241 if (!strcmp ("reorder", s
))
5243 else if (!strcmp ("at", s
))
5244 alpha_noat_on
= !yesno
;
5245 else if (!strcmp ("macro", s
))
5246 alpha_macros_on
= yesno
;
5247 else if (!strcmp ("move", s
))
5249 else if (!strcmp ("volatile", s
))
5252 as_warn (_("Tried to .set unrecognized mode `%s'"), name
);
5254 *input_line_pointer
= ch
;
5255 demand_empty_rest_of_line ();
5258 /* Handle the .base pseudo op. This changes the assembler's notion of
5259 the $gp register. */
5262 s_alpha_base (ignore
)
5263 int ignore ATTRIBUTE_UNUSED
;
5266 if (first_32bit_quadrant
)
5268 /* not fatal, but it might not work in the end */
5269 as_warn (_("File overrides no-base-register option."));
5270 first_32bit_quadrant
= 0;
5275 if (*input_line_pointer
== '$')
5277 input_line_pointer
++;
5278 if (*input_line_pointer
== 'r')
5279 input_line_pointer
++;
5282 alpha_gp_register
= get_absolute_expression ();
5283 if (alpha_gp_register
< 0 || alpha_gp_register
> 31)
5285 alpha_gp_register
= AXP_REG_GP
;
5286 as_warn (_("Bad base register, using $%d."), alpha_gp_register
);
5289 demand_empty_rest_of_line ();
5292 /* Handle the .align pseudo-op. This aligns to a power of two. It
5293 also adjusts any current instruction label. We treat this the same
5294 way the MIPS port does: .align 0 turns off auto alignment. */
5297 s_alpha_align (ignore
)
5298 int ignore ATTRIBUTE_UNUSED
;
5302 long max_alignment
= 15;
5304 align
= get_absolute_expression ();
5305 if (align
> max_alignment
)
5307 align
= max_alignment
;
5308 as_bad (_("Alignment too large: %d. assumed"), align
);
5312 as_warn (_("Alignment negative: 0 assumed"));
5316 if (*input_line_pointer
== ',')
5318 input_line_pointer
++;
5319 fill
= get_absolute_expression ();
5327 alpha_auto_align_on
= 1;
5328 alpha_align (align
, pfill
, alpha_insn_label
, 1);
5332 alpha_auto_align_on
= 0;
5335 demand_empty_rest_of_line ();
5338 /* Hook the normal string processor to reset known alignment. */
5341 s_alpha_stringer (terminate
)
5344 alpha_current_align
= 0;
5345 alpha_insn_label
= NULL
;
5346 stringer (terminate
);
5349 /* Hook the normal space processing to reset known alignment. */
5352 s_alpha_space (ignore
)
5355 alpha_current_align
= 0;
5356 alpha_insn_label
= NULL
;
5360 /* Hook into cons for auto-alignment. */
5363 alpha_cons_align (size
)
5369 while ((size
>>= 1) != 0)
5372 if (alpha_auto_align_on
&& alpha_current_align
< log_size
)
5373 alpha_align (log_size
, (char *) NULL
, alpha_insn_label
, 0);
5374 if (alpha_current_align
> log_size
)
5375 alpha_current_align
= log_size
;
5376 alpha_insn_label
= NULL
;
5379 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
5380 pseudos. We just turn off auto-alignment and call down to cons. */
5383 s_alpha_ucons (bytes
)
5386 int hold
= alpha_auto_align_on
;
5387 alpha_auto_align_on
= 0;
5389 alpha_auto_align_on
= hold
;
5392 /* Switch the working cpu type. */
5395 s_alpha_arch (ignored
)
5396 int ignored ATTRIBUTE_UNUSED
;
5399 const struct cpu_type
*p
;
5402 name
= input_line_pointer
;
5403 ch
= get_symbol_end ();
5405 for (p
= cpu_types
; p
->name
; ++p
)
5406 if (strcmp (name
, p
->name
) == 0)
5408 alpha_target_name
= p
->name
, alpha_target
= p
->flags
;
5411 as_warn ("Unknown CPU identifier `%s'", name
);
5414 *input_line_pointer
= ch
;
5415 demand_empty_rest_of_line ();
5419 /* print token expression with alpha specific extension. */
5422 alpha_print_token (f
, exp
)
5424 const expressionS
*exp
;
5434 expressionS nexp
= *exp
;
5435 nexp
.X_op
= O_register
;
5436 print_expr (f
, &nexp
);
5441 print_expr (f
, exp
);
5448 /* The target specific pseudo-ops which we support. */
5450 const pseudo_typeS md_pseudo_table
[] = {
5452 {"comm", s_alpha_comm
, 0}, /* osf1 compiler does this */
5453 {"rdata", s_alpha_rdata
, 0},
5455 {"text", s_alpha_text
, 0},
5456 {"data", s_alpha_data
, 0},
5458 {"sdata", s_alpha_sdata
, 0},
5461 {"section", s_alpha_section
, 0},
5462 {"section.s", s_alpha_section
, 0},
5463 {"sect", s_alpha_section
, 0},
5464 {"sect.s", s_alpha_section
, 0},
5467 { "pdesc", s_alpha_pdesc
, 0},
5468 { "name", s_alpha_name
, 0},
5469 { "linkage", s_alpha_linkage
, 0},
5470 { "code_address", s_alpha_code_address
, 0},
5471 { "ent", s_alpha_ent
, 0},
5472 { "frame", s_alpha_frame
, 0},
5473 { "fp_save", s_alpha_fp_save
, 0},
5474 { "mask", s_alpha_mask
, 0},
5475 { "fmask", s_alpha_fmask
, 0},
5476 { "end", s_alpha_end
, 0},
5477 { "file", s_alpha_file
, 0},
5478 { "rdata", s_alpha_section
, 1},
5479 { "comm", s_alpha_comm
, 0},
5480 { "link", s_alpha_section
, 3},
5481 { "ctors", s_alpha_section
, 4},
5482 { "dtors", s_alpha_section
, 5},
5485 /* Frame related pseudos. */
5486 {"ent", s_alpha_ent
, 0},
5487 {"end", s_alpha_end
, 0},
5488 {"mask", s_alpha_mask
, 0},
5489 {"fmask", s_alpha_mask
, 1},
5490 {"frame", s_alpha_frame
, 0},
5491 {"prologue", s_alpha_prologue
, 0},
5492 {"file", s_alpha_file
, 5},
5493 {"loc", s_alpha_loc
, 9},
5494 {"stabs", s_alpha_stab
, 's'},
5495 {"stabn", s_alpha_stab
, 'n'},
5496 /* COFF debugging related pseudos. */
5497 {"begin", s_alpha_coff_wrapper
, 0},
5498 {"bend", s_alpha_coff_wrapper
, 1},
5499 {"def", s_alpha_coff_wrapper
, 2},
5500 {"dim", s_alpha_coff_wrapper
, 3},
5501 {"endef", s_alpha_coff_wrapper
, 4},
5502 {"scl", s_alpha_coff_wrapper
, 5},
5503 {"tag", s_alpha_coff_wrapper
, 6},
5504 {"val", s_alpha_coff_wrapper
, 7},
5506 {"prologue", s_ignore
, 0},
5508 {"gprel32", s_alpha_gprel32
, 0},
5509 {"t_floating", s_alpha_float_cons
, 'd'},
5510 {"s_floating", s_alpha_float_cons
, 'f'},
5511 {"f_floating", s_alpha_float_cons
, 'F'},
5512 {"g_floating", s_alpha_float_cons
, 'G'},
5513 {"d_floating", s_alpha_float_cons
, 'D'},
5515 {"proc", s_alpha_proc
, 0},
5516 {"aproc", s_alpha_proc
, 1},
5517 {"set", s_alpha_set
, 0},
5518 {"reguse", s_ignore
, 0},
5519 {"livereg", s_ignore
, 0},
5520 {"base", s_alpha_base
, 0}, /*??*/
5521 {"option", s_ignore
, 0},
5522 {"aent", s_ignore
, 0},
5523 {"ugen", s_ignore
, 0},
5524 {"eflag", s_ignore
, 0},
5526 {"align", s_alpha_align
, 0},
5527 {"double", s_alpha_float_cons
, 'd'},
5528 {"float", s_alpha_float_cons
, 'f'},
5529 {"single", s_alpha_float_cons
, 'f'},
5530 {"ascii", s_alpha_stringer
, 0},
5531 {"asciz", s_alpha_stringer
, 1},
5532 {"string", s_alpha_stringer
, 1},
5533 {"space", s_alpha_space
, 0},
5534 {"skip", s_alpha_space
, 0},
5535 {"zero", s_alpha_space
, 0},
5537 /* Unaligned data pseudos. */
5538 {"uword", s_alpha_ucons
, 2},
5539 {"ulong", s_alpha_ucons
, 4},
5540 {"uquad", s_alpha_ucons
, 8},
5543 /* Dwarf wants these versions of unaligned. */
5544 {"2byte", s_alpha_ucons
, 2},
5545 {"4byte", s_alpha_ucons
, 4},
5546 {"8byte", s_alpha_ucons
, 8},
5549 /* We don't do any optimizing, so we can safely ignore these. */
5550 {"noalias", s_ignore
, 0},
5551 {"alias", s_ignore
, 0},
5553 {"arch", s_alpha_arch
, 0},
5558 /* Build a BFD section with its flags set appropriately for the .lita,
5559 .lit8, or .lit4 sections. */
5562 create_literal_section (name
, secp
, symp
)
5567 segT current_section
= now_seg
;
5568 int current_subsec
= now_subseg
;
5571 *secp
= new_sec
= subseg_new (name
, 0);
5572 subseg_set (current_section
, current_subsec
);
5573 bfd_set_section_alignment (stdoutput
, new_sec
, 4);
5574 bfd_set_section_flags (stdoutput
, new_sec
,
5575 SEC_RELOC
| SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
5578 S_CLEAR_EXTERNAL (*symp
= section_symbol (new_sec
));
5583 /* @@@ GP selection voodoo. All of this seems overly complicated and
5584 unnecessary; which is the primary reason it's for ECOFF only. */
5585 static inline void maybe_set_gp
PARAMS ((asection
*));
5594 vma
= bfd_get_section_vma (foo
, sec
);
5595 if (vma
&& vma
< alpha_gp_value
)
5596 alpha_gp_value
= vma
;
5602 assert (alpha_gp_value
== 0);
5604 /* Get minus-one in whatever width... */
5608 /* Select the smallest VMA of these existing sections. */
5609 maybe_set_gp (alpha_lita_section
);
5611 /* These were disabled before -- should we use them? */
5612 maybe_set_gp (sdata
);
5613 maybe_set_gp (lit8_sec
);
5614 maybe_set_gp (lit4_sec
);
5617 /* @@ Will a simple 0x8000 work here? If not, why not? */
5618 #define GP_ADJUSTMENT (0x8000 - 0x10)
5620 alpha_gp_value
+= GP_ADJUSTMENT
;
5622 S_SET_VALUE (alpha_gp_symbol
, alpha_gp_value
);
5625 printf (_("Chose GP value of %lx\n"), alpha_gp_value
);
5628 #endif /* OBJ_ECOFF */
5631 /* Map 's' to SHF_ALPHA_GPREL. */
5634 alpha_elf_section_letter (letter
, ptr_msg
)
5639 return SHF_ALPHA_GPREL
;
5641 *ptr_msg
= _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
5645 /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
5648 alpha_elf_section_flags (flags
, attr
, type
)
5650 int attr
, type ATTRIBUTE_UNUSED
;
5652 if (attr
& SHF_ALPHA_GPREL
)
5653 flags
|= SEC_SMALL_DATA
;
5656 #endif /* OBJ_ELF */
5658 /* Called internally to handle all alignment needs. This takes care
5659 of eliding calls to frag_align if'n the cached current alignment
5660 says we've already got it, as well as taking care of the auto-align
5661 feature wrt labels. */
5664 alpha_align (n
, pfill
, label
, force
)
5668 int force ATTRIBUTE_UNUSED
;
5670 if (alpha_current_align
>= n
)
5675 if (subseg_text_p (now_seg
))
5676 frag_align_code (n
, 0);
5678 frag_align (n
, 0, 0);
5681 frag_align (n
, *pfill
, 0);
5683 alpha_current_align
= n
;
5685 if (label
!= NULL
&& S_GET_SEGMENT (label
) == now_seg
)
5687 symbol_set_frag (label
, frag_now
);
5688 S_SET_VALUE (label
, (valueT
) frag_now_fix ());
5691 record_alignment (now_seg
, n
);
5693 /* ??? If alpha_flag_relax && force && elf, record the requested alignment
5694 in a reloc for the linker to see. */
5697 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
5698 of an rs_align_code fragment. */
5701 alpha_handle_align (fragp
)
5704 static char const unop
[4] = { 0x00, 0x00, 0xfe, 0x2f };
5705 static char const nopunop
[8] = {
5706 0x1f, 0x04, 0xff, 0x47,
5707 0x00, 0x00, 0xfe, 0x2f
5713 if (fragp
->fr_type
!= rs_align_code
)
5716 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
5717 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
5730 memcpy (p
, unop
, 4);
5736 memcpy (p
, nopunop
, 8);
5738 fragp
->fr_fix
+= fix
;
5742 /* The Alpha has support for some VAX floating point types, as well as for
5743 IEEE floating point. We consider IEEE to be the primary floating point
5744 format, and sneak in the VAX floating point support here. */
5745 #define md_atof vax_md_atof
5746 #include "config/atof-vax.c"