1 /* tc-arc.c -- Assembler for the ARC
2 Copyright (C) 1994-2015 Free Software Foundation, Inc.
3 Contributed by Doug Evans (dje@cygnus.com).
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "struc-symbol.h"
24 #include "safe-ctype.h"
26 #include "opcode/arc.h"
27 #include "../opcodes/arc-ext.h"
29 #include "dwarf2dbg.h"
31 const struct suffix_classes
37 { "SUFFIX_COND|SUFFIX_FLAG",23 },
38 { "SUFFIX_FLAG", 11 },
39 { "SUFFIX_COND", 11 },
43 #define MAXSUFFIXCLASS (sizeof (suffixclass) / sizeof (struct suffix_classes))
45 const struct syntax_classes
52 { "SYNTAX_3OP|OP1_MUST_BE_IMM", 26, SYNTAX_3OP
|OP1_MUST_BE_IMM
|SYNTAX_VALID
},
53 { "OP1_MUST_BE_IMM|SYNTAX_3OP", 26, OP1_MUST_BE_IMM
|SYNTAX_3OP
|SYNTAX_VALID
},
54 { "SYNTAX_2OP|OP1_IMM_IMPLIED", 26, SYNTAX_2OP
|OP1_IMM_IMPLIED
|SYNTAX_VALID
},
55 { "OP1_IMM_IMPLIED|SYNTAX_2OP", 26, OP1_IMM_IMPLIED
|SYNTAX_2OP
|SYNTAX_VALID
},
56 { "SYNTAX_3OP", 10, SYNTAX_3OP
|SYNTAX_VALID
},
57 { "SYNTAX_2OP", 10, SYNTAX_2OP
|SYNTAX_VALID
}
60 #define MAXSYNTAXCLASS (sizeof (syntaxclass) / sizeof (struct syntax_classes))
62 /* This array holds the chars that always start a comment. If the
63 pre-processor is disabled, these aren't very useful. */
64 const char comment_chars
[] = "#;";
66 /* This array holds the chars that only start a comment at the beginning of
67 a line. If the line seems to have the form '# 123 filename'
68 .line and .file directives will appear in the pre-processed output */
69 /* Note that input_file.c hand checks for '#' at the beginning of the
70 first line of the input file. This is because the compiler outputs
71 #NO_APP at the beginning of its output. */
72 /* Also note that comments started like this one will always
73 work if '/' isn't otherwise defined. */
74 const char line_comment_chars
[] = "#";
76 const char line_separator_chars
[] = "";
78 /* Chars that can be used to separate mant from exp in floating point nums. */
79 const char EXP_CHARS
[] = "eE";
81 /* Chars that mean this number is a floating point constant
82 As in 0f12.456 or 0d1.2345e12. */
83 const char FLT_CHARS
[] = "rRsSfFdD";
86 extern int target_big_endian
;
87 const char *arc_target_format
= DEFAULT_TARGET_FORMAT
;
88 static int byte_order
= DEFAULT_BYTE_ORDER
;
90 static segT arcext_section
;
92 /* One of bfd_mach_arc_n. */
93 static int arc_mach_type
= bfd_mach_arc_6
;
95 /* Non-zero if the cpu type has been explicitly specified. */
96 static int mach_type_specified_p
= 0;
98 /* Non-zero if opcode tables have been initialized.
99 A .option command must appear before any instructions. */
100 static int cpu_tables_init_p
= 0;
102 static struct hash_control
*arc_suffix_hash
= NULL
;
104 const char *md_shortopts
= "";
108 OPTION_EB
= OPTION_MD_BASE
,
117 struct option md_longopts
[] =
119 { "EB", no_argument
, NULL
, OPTION_EB
},
120 { "EL", no_argument
, NULL
, OPTION_EL
},
121 { "marc5", no_argument
, NULL
, OPTION_ARC5
},
122 { "pre-v6", no_argument
, NULL
, OPTION_ARC5
},
123 { "marc6", no_argument
, NULL
, OPTION_ARC6
},
124 { "marc7", no_argument
, NULL
, OPTION_ARC7
},
125 { "marc8", no_argument
, NULL
, OPTION_ARC8
},
126 { "marc", no_argument
, NULL
, OPTION_ARC
},
127 { NULL
, no_argument
, NULL
, 0 }
129 size_t md_longopts_size
= sizeof (md_longopts
);
131 #define IS_SYMBOL_OPERAND(o) \
132 ((o) == 'b' || (o) == 'c' || (o) == 's' || (o) == 'o' || (o) == 'O')
134 struct arc_operand_value
*get_ext_suffix (char *s
);
136 /* Invocation line includes a switch not recognized by the base assembler.
137 See if it's a processor-specific option. */
140 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
145 arc_mach_type
= bfd_mach_arc_5
;
149 arc_mach_type
= bfd_mach_arc_6
;
152 arc_mach_type
= bfd_mach_arc_7
;
155 arc_mach_type
= bfd_mach_arc_8
;
158 byte_order
= BIG_ENDIAN
;
159 arc_target_format
= "elf32-bigarc";
162 byte_order
= LITTLE_ENDIAN
;
163 arc_target_format
= "elf32-littlearc";
172 md_show_usage (FILE *stream
)
176 -marc[5|6|7|8] select processor variant (default arc%d)\n\
177 -EB assemble code for a big endian cpu\n\
178 -EL assemble code for a little endian cpu\n", arc_mach_type
+ 5);
181 /* This function is called once, at assembler startup time. It should
182 set up all the tables, etc. that the MD part of the assembler will need.
183 Opcode selection is deferred until later because we might see a .option
189 /* The endianness can be chosen "at the factory". */
190 target_big_endian
= byte_order
== BIG_ENDIAN
;
192 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_arc
, arc_mach_type
))
193 as_warn (_("could not set architecture and machine"));
195 /* This call is necessary because we need to initialize `arc_operand_map'
196 which may be needed before we see the first insn. */
197 arc_opcode_init_tables (arc_get_opcode_mach (arc_mach_type
,
201 /* Initialize the various opcode and operand tables.
202 MACH is one of bfd_mach_arc_xxx. */
205 init_opcode_tables (int mach
)
210 if ((arc_suffix_hash
= hash_new ()) == NULL
)
211 as_fatal (_("virtual memory exhausted"));
213 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_arc
, mach
))
214 as_warn (_("could not set architecture and machine"));
216 /* This initializes a few things in arc-opc.c that we need.
217 This must be called before the various arc_xxx_supported fns. */
218 arc_opcode_init_tables (arc_get_opcode_mach (mach
, target_big_endian
));
220 /* Only put the first entry of each equivalently named suffix in the
223 for (i
= 0; i
< arc_suffixes_count
; i
++)
225 if (strcmp (arc_suffixes
[i
].name
, last
) != 0)
226 hash_insert (arc_suffix_hash
, arc_suffixes
[i
].name
, (void *) (arc_suffixes
+ i
));
227 last
= arc_suffixes
[i
].name
;
230 /* Since registers don't have a prefix, we put them in the symbol table so
231 they can't be used as symbols. This also simplifies argument parsing as
232 we can let gas parse registers for us. The recorded register number is
233 the address of the register's entry in arc_reg_names.
235 If the register name is already in the table, then the existing
236 definition is assumed to be from an .ExtCoreRegister pseudo-op. */
238 for (i
= 0; i
< arc_reg_names_count
; i
++)
240 if (symbol_find (arc_reg_names
[i
].name
))
242 /* Use symbol_create here instead of symbol_new so we don't try to
243 output registers into the object file's symbol table. */
244 symbol_table_insert (symbol_create (arc_reg_names
[i
].name
,
246 (valueT
) &arc_reg_names
[i
],
247 &zero_address_frag
));
250 /* Tell `.option' it's too late. */
251 cpu_tables_init_p
= 1;
254 /* Insert an operand value into an instruction.
255 If REG is non-NULL, it is a register number and ignore VAL. */
258 arc_insert_operand (arc_insn insn
,
259 const struct arc_operand
*operand
,
261 const struct arc_operand_value
*reg
,
266 if (operand
->bits
!= 32)
271 if ((operand
->flags
& ARC_OPERAND_SIGNED
) != 0)
273 if ((operand
->flags
& ARC_OPERAND_SIGNOPT
) != 0)
274 max
= (1 << operand
->bits
) - 1;
276 max
= (1 << (operand
->bits
- 1)) - 1;
277 min
= - (1 << (operand
->bits
- 1));
281 max
= (1 << operand
->bits
) - 1;
285 if ((operand
->flags
& ARC_OPERAND_NEGATIVE
) != 0)
290 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
291 as_warn_value_out_of_range (_("operand"), test
, (offsetT
) min
, (offsetT
) max
, file
, line
);
299 insn
= (*operand
->insert
) (insn
, operand
, mods
, reg
, (long) val
, &errmsg
);
300 if (errmsg
!= (const char *) NULL
)
301 as_warn ("%s", errmsg
);
304 insn
|= (((long) val
& ((1 << operand
->bits
) - 1))
310 /* We need to keep a list of fixups. We can't simply generate them as
311 we go, because that would require us to first create the frag, and
312 that would screw up references to ``.''. */
316 /* index into `arc_operands' */
323 #define MAX_SUFFIXES 5
325 /* Compute the reloc type of an expression.
326 The possibly modified expression is stored in EXPNEW.
328 This is used to convert the expressions generated by the %-op's into
329 the appropriate operand type. It is called for both data in instructions
330 (operands) and data outside instructions (variables, debugging info, etc.).
332 Currently supported %-ops:
334 %st(symbol): represented as "symbol >> 2"
335 "st" is short for STatus as in the status register (pc)
337 DEFAULT_TYPE is the type to use if no special processing is required.
339 DATA_P is non-zero for data or limm values, zero for insn operands.
340 Remember that the opcode "insertion fns" cannot be used on data, they're
341 only for inserting operands into insns. They also can't be used for limm
342 values as the insertion routines don't handle limm values. When called for
343 insns we return fudged reloc types (real_value - BFD_RELOC_UNUSED). When
344 called for data or limm values we use real reloc types. */
347 get_arc_exp_reloc_type (int data_p
,
352 /* If the expression is "symbol >> 2" we must change it to just "symbol",
353 as fix_new_exp can't handle it. Similarly for (symbol - symbol) >> 2.
354 That's ok though. What's really going on here is that we're using
355 ">> 2" as a special syntax for specifying BFD_RELOC_ARC_B26. */
357 if (exp
->X_op
== O_right_shift
358 && exp
->X_op_symbol
!= NULL
359 && exp
->X_op_symbol
->sy_value
.X_op
== O_constant
360 && exp
->X_op_symbol
->sy_value
.X_add_number
== 2
361 && exp
->X_add_number
== 0)
363 if (exp
->X_add_symbol
!= NULL
364 && (exp
->X_add_symbol
->sy_value
.X_op
== O_constant
365 || exp
->X_add_symbol
->sy_value
.X_op
== O_symbol
))
368 expnew
->X_op
= O_symbol
;
369 expnew
->X_op_symbol
= NULL
;
370 return data_p
? BFD_RELOC_ARC_B26
: arc_operand_map
['J'];
372 else if (exp
->X_add_symbol
!= NULL
373 && exp
->X_add_symbol
->sy_value
.X_op
== O_subtract
)
375 *expnew
= exp
->X_add_symbol
->sy_value
;
376 return data_p
? BFD_RELOC_ARC_B26
: arc_operand_map
['J'];
385 arc_set_ext_seg (void)
389 arcext_section
= subseg_new (".arcextmap", 0);
390 bfd_set_section_flags (stdoutput
, arcext_section
,
391 SEC_READONLY
| SEC_HAS_CONTENTS
);
394 subseg_set (arcext_section
, 0);
399 arc_extoper (int opertype
)
407 struct arc_ext_operand_value
*ext_oper
;
413 c
= get_symbol_name (&name
);
414 name
= xstrdup (name
);
423 /* just after name is now '\0' */
424 p
= input_line_pointer
;
425 (void) restore_line_pointer (c
);
428 if (*input_line_pointer
!= ',')
430 as_bad (_("expected comma after operand name"));
431 ignore_rest_of_line ();
436 input_line_pointer
++; /* skip ',' */
437 number
= get_absolute_expression ();
441 as_bad (_("negative operand number %d"), number
);
442 ignore_rest_of_line ();
451 if (*input_line_pointer
!= ',')
453 as_bad (_("expected comma after register-number"));
454 ignore_rest_of_line ();
459 input_line_pointer
++; /* skip ',' */
460 mode
= input_line_pointer
;
462 if (!strncmp (mode
, "r|w", 3))
465 input_line_pointer
+= 3;
469 if (!strncmp (mode
, "r", 1))
471 imode
= ARC_REGISTER_READONLY
;
472 input_line_pointer
+= 1;
476 if (strncmp (mode
, "w", 1))
478 as_bad (_("invalid mode"));
479 ignore_rest_of_line ();
485 imode
= ARC_REGISTER_WRITEONLY
;
486 input_line_pointer
+= 1;
493 if (*input_line_pointer
!= ',')
495 as_bad (_("expected comma after register-mode"));
496 ignore_rest_of_line ();
501 input_line_pointer
++; /* skip ',' */
503 if (!strncmp (input_line_pointer
, "cannot_shortcut", 15))
505 imode
|= arc_get_noshortcut_flag ();
506 input_line_pointer
+= 15;
510 if (strncmp (input_line_pointer
, "can_shortcut", 12))
512 as_bad (_("shortcut designator invalid"));
513 ignore_rest_of_line ();
519 input_line_pointer
+= 12;
525 if ((opertype
== 1) && number
> 60)
527 as_bad (_("core register value (%d) too large"), number
);
528 ignore_rest_of_line ();
533 if ((opertype
== 0) && number
> 31)
535 as_bad (_("condition code value (%d) too large"), number
);
536 ignore_rest_of_line ();
541 ext_oper
= (struct arc_ext_operand_value
*)
542 xmalloc (sizeof (struct arc_ext_operand_value
));
546 /* If the symbol already exists, point it at the new definition. */
547 if ((symbolP
= symbol_find (name
)))
549 if (S_GET_SEGMENT (symbolP
) == reg_section
)
550 S_SET_VALUE (symbolP
, (valueT
) &ext_oper
->operand
);
553 as_bad (_("attempt to override symbol: %s"), name
);
554 ignore_rest_of_line ();
562 /* If its not there, add it. */
563 symbol_table_insert (symbol_create (name
, reg_section
,
564 (valueT
) &ext_oper
->operand
,
565 &zero_address_frag
));
569 ext_oper
->operand
.name
= name
;
570 ext_oper
->operand
.value
= number
;
571 ext_oper
->operand
.type
= arc_operand_type (opertype
);
572 ext_oper
->operand
.flags
= imode
;
574 ext_oper
->next
= arc_ext_operands
;
575 arc_ext_operands
= ext_oper
;
577 /* OK, now that we know what this operand is, put a description in
578 the arc extension section of the output file. */
581 old_subsec
= now_subseg
;
589 *p
= 3 + strlen (name
) + 1;
594 p
= frag_more (strlen (name
) + 1);
599 *p
= 3 + strlen (name
) + 1;
601 *p
= EXT_CORE_REGISTER
;
604 p
= frag_more (strlen (name
) + 1);
609 *p
= 6 + strlen (name
) + 1;
611 *p
= EXT_AUX_REGISTER
;
613 *p
= number
>> 24 & 0xff;
615 *p
= number
>> 16 & 0xff;
617 *p
= number
>> 8 & 0xff;
620 p
= frag_more (strlen (name
) + 1);
624 as_bad (_("invalid opertype"));
625 ignore_rest_of_line ();
631 subseg_set (old_sec
, old_subsec
);
633 /* Enter all registers into the symbol table. */
635 demand_empty_rest_of_line ();
639 arc_extinst (int ignore ATTRIBUTE_UNUSED
)
646 int opcode
, subopcode
;
650 struct arc_opcode
*ext_op
;
655 c
= get_symbol_name (&name
);
656 name
= xstrdup (name
);
657 strcpy (syntax
, name
);
658 name_len
= strlen (name
);
660 /* just after name is now '\0' */
661 p
= input_line_pointer
;
662 (void) restore_line_pointer (c
);
666 if (*input_line_pointer
!= ',')
668 as_bad (_("expected comma after operand name"));
669 ignore_rest_of_line ();
673 input_line_pointer
++; /* skip ',' */
674 opcode
= get_absolute_expression ();
678 if (*input_line_pointer
!= ',')
680 as_bad (_("expected comma after opcode"));
681 ignore_rest_of_line ();
685 input_line_pointer
++; /* skip ',' */
686 subopcode
= get_absolute_expression ();
690 as_bad (_("negative subopcode %d"), subopcode
);
691 ignore_rest_of_line ();
699 as_bad (_("subcode value found when opcode not equal 0x03"));
700 ignore_rest_of_line ();
705 if (subopcode
< 0x09 || subopcode
== 0x3f)
707 as_bad (_("invalid subopcode %d"), subopcode
);
708 ignore_rest_of_line ();
716 if (*input_line_pointer
!= ',')
718 as_bad (_("expected comma after subopcode"));
719 ignore_rest_of_line ();
723 input_line_pointer
++; /* skip ',' */
725 for (i
= 0; i
< (int) MAXSUFFIXCLASS
; i
++)
727 if (!strncmp (suffixclass
[i
].name
,input_line_pointer
, suffixclass
[i
].len
))
730 input_line_pointer
+= suffixclass
[i
].len
;
735 if (-1 == suffixcode
)
737 as_bad (_("invalid suffix class"));
738 ignore_rest_of_line ();
744 if (*input_line_pointer
!= ',')
746 as_bad (_("expected comma after suffix class"));
747 ignore_rest_of_line ();
751 input_line_pointer
++; /* skip ',' */
753 for (i
= 0; i
< (int) MAXSYNTAXCLASS
; i
++)
755 if (!strncmp (syntaxclass
[i
].name
,input_line_pointer
, syntaxclass
[i
].len
))
757 s_class
= syntaxclass
[i
].s_class
;
758 input_line_pointer
+= syntaxclass
[i
].len
;
763 if (0 == (SYNTAX_VALID
& s_class
))
765 as_bad (_("invalid syntax class"));
766 ignore_rest_of_line ();
770 if ((0x3 == opcode
) & (s_class
& SYNTAX_3OP
))
772 as_bad (_("opcode 0x3 and SYNTAX_3OP invalid"));
773 ignore_rest_of_line ();
780 strcat (syntax
, "%.q%.f ");
783 strcat (syntax
, "%.f ");
786 strcat (syntax
, "%.q ");
789 strcat (syntax
, " ");
792 as_bad (_("unknown suffix class"));
793 ignore_rest_of_line ();
798 strcat (syntax
, ((opcode
== 0x3) ? "%a,%b" : ((s_class
& SYNTAX_3OP
) ? "%a,%b,%c" : "%b,%c")));
800 strcat (syntax
, "%F");
801 strcat (syntax
, "%S%L");
803 ext_op
= (struct arc_opcode
*) xmalloc (sizeof (struct arc_opcode
));
804 ext_op
->syntax
= xstrdup (syntax
);
806 ext_op
->mask
= I (-1) | ((0x3 == opcode
) ? C (-1) : 0);
807 ext_op
->value
= I (opcode
) | ((0x3 == opcode
) ? C (subopcode
) : 0);
808 ext_op
->flags
= s_class
;
809 ext_op
->next_asm
= arc_ext_opcodes
;
810 ext_op
->next_dis
= arc_ext_opcodes
;
811 arc_ext_opcodes
= ext_op
;
813 /* OK, now that we know what this inst is, put a description in the
814 arc extension section of the output file. */
817 old_subsec
= now_subseg
;
822 *p
= 5 + name_len
+ 1;
824 *p
= EXT_INSTRUCTION
;
830 *p
= (s_class
& (OP1_MUST_BE_IMM
| OP1_IMM_IMPLIED
) ? IGNORE_FIRST_OPD
: 0);
831 p
= frag_more (name_len
);
832 strncpy (p
, syntax
, name_len
);
836 subseg_set (old_sec
, old_subsec
);
838 demand_empty_rest_of_line ();
842 arc_common (int localScope
)
850 c
= get_symbol_name (&name
);
851 /* just after name is now '\0' */
852 p
= input_line_pointer
;
853 (void) restore_line_pointer (c
);
856 if (*input_line_pointer
!= ',')
858 as_bad (_("expected comma after symbol name"));
859 ignore_rest_of_line ();
863 input_line_pointer
++; /* skip ',' */
864 size
= get_absolute_expression ();
868 as_bad (_("negative symbol length"));
869 ignore_rest_of_line ();
874 symbolP
= symbol_find_or_make (name
);
877 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
879 as_bad (_("ignoring attempt to re-define symbol"));
880 ignore_rest_of_line ();
883 if (((int) S_GET_VALUE (symbolP
) != 0) \
884 && ((int) S_GET_VALUE (symbolP
) != size
))
886 as_warn (_("length of symbol \"%s\" already %ld, ignoring %d"),
887 S_GET_NAME (symbolP
), (long) S_GET_VALUE (symbolP
), size
);
889 gas_assert (symbolP
->sy_frag
== &zero_address_frag
);
891 /* Now parse the alignment field. This field is optional for
892 local and global symbols. Default alignment is zero. */
893 if (*input_line_pointer
== ',')
895 input_line_pointer
++;
896 align
= get_absolute_expression ();
900 as_warn (_("assuming symbol alignment of zero"));
913 old_subsec
= now_subseg
;
914 record_alignment (bss_section
, align
);
915 subseg_set (bss_section
, 0); /* ??? subseg_set (bss_section, 1); ??? */
919 frag_align (align
, 0, 0);
921 /* Detach from old frag. */
922 if (S_GET_SEGMENT (symbolP
) == bss_section
)
923 symbolP
->sy_frag
->fr_symbol
= NULL
;
925 symbolP
->sy_frag
= frag_now
;
926 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
,
927 (offsetT
) size
, (char *) 0);
930 S_SET_SIZE (symbolP
, size
);
931 S_SET_SEGMENT (symbolP
, bss_section
);
932 S_CLEAR_EXTERNAL (symbolP
);
933 symbol_get_obj (symbolP
)->local
= 1;
934 subseg_set (old_sec
, old_subsec
);
938 S_SET_VALUE (symbolP
, (valueT
) size
);
939 S_SET_ALIGN (symbolP
, align
);
940 S_SET_EXTERNAL (symbolP
);
941 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
944 symbolP
->bsym
->flags
|= BSF_OBJECT
;
946 demand_empty_rest_of_line ();
949 /* Select the cpu we're assembling for. */
952 arc_option (int ignore ATTRIBUTE_UNUSED
)
954 extern int arc_get_mach (char *);
959 c
= get_symbol_name (&cpu
);
960 mach
= arc_get_mach (cpu
);
961 (void) restore_line_pointer (c
);
963 /* If an instruction has already been seen, it's too late. */
964 if (cpu_tables_init_p
)
966 as_bad (_("\".option\" directive must appear before any instructions"));
967 ignore_rest_of_line ();
974 if (mach_type_specified_p
&& mach
!= arc_mach_type
)
976 as_bad (_("\".option\" directive conflicts with initial definition"));
977 ignore_rest_of_line ();
982 /* The cpu may have been selected on the command line. */
983 if (mach
!= arc_mach_type
)
984 as_warn (_("\".option\" directive overrides command-line (default) value"));
985 arc_mach_type
= mach
;
986 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_arc
, mach
))
987 as_fatal (_("could not set architecture and machine"));
988 mach_type_specified_p
= 1;
990 demand_empty_rest_of_line ();
994 as_bad (_("invalid identifier for \".option\""));
995 ignore_rest_of_line ();
999 md_atof (int type
, char *litP
, int *sizeP
)
1001 return ieee_md_atof (type
, litP
, sizeP
, TRUE
);
1004 /* Write a value out to the object file, using the appropriate
1008 md_number_to_chars (char *buf
, valueT val
, int n
)
1010 if (target_big_endian
)
1011 number_to_chars_bigendian (buf
, val
, n
);
1013 number_to_chars_littleendian (buf
, val
, n
);
1016 /* Round up a section size to the appropriate boundary. */
1019 md_section_align (segT segment
, valueT size
)
1021 int align
= bfd_get_section_alignment (stdoutput
, segment
);
1023 return ((size
+ (1 << align
) - 1) & (-1 << align
));
1026 /* We don't have any form of relaxing. */
1029 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
1030 asection
*seg ATTRIBUTE_UNUSED
)
1032 as_fatal (_("relaxation not supported\n"));
1036 /* Convert a machine dependent frag. We never generate these. */
1039 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
1040 asection
*sec ATTRIBUTE_UNUSED
,
1041 fragS
*fragp ATTRIBUTE_UNUSED
)
1047 arc_code_symbol (expressionS
*expressionP
)
1049 if (expressionP
->X_op
== O_symbol
&& expressionP
->X_add_number
== 0)
1053 expressionP
->X_op
= O_right_shift
;
1054 expressionP
->X_add_symbol
->sy_value
.X_op
= O_constant
;
1055 two
.X_op
= O_constant
;
1056 two
.X_add_symbol
= two
.X_op_symbol
= NULL
;
1057 two
.X_add_number
= 2;
1058 expressionP
->X_op_symbol
= make_expr_symbol (&two
);
1060 /* Allow %st(sym1-sym2) */
1061 else if (expressionP
->X_op
== O_subtract
1062 && expressionP
->X_add_symbol
!= NULL
1063 && expressionP
->X_op_symbol
!= NULL
1064 && expressionP
->X_add_number
== 0)
1068 expressionP
->X_add_symbol
= make_expr_symbol (expressionP
);
1069 expressionP
->X_op
= O_right_shift
;
1070 two
.X_op
= O_constant
;
1071 two
.X_add_symbol
= two
.X_op_symbol
= NULL
;
1072 two
.X_add_number
= 2;
1073 expressionP
->X_op_symbol
= make_expr_symbol (&two
);
1076 as_bad (_("expression too complex code symbol"));
1079 /* Parse an operand that is machine-specific.
1081 The ARC has a special %-op to adjust addresses so they're usable in
1082 branches. The "st" is short for the STatus register.
1083 ??? Later expand this to take a flags value too.
1085 ??? We can't create new expression types so we map the %-op's onto the
1086 existing syntax. This means that the user could use the chosen syntax
1087 to achieve the same effect. */
1090 md_operand (expressionS
*expressionP
)
1092 char *p
= input_line_pointer
;
1097 if (strncmp (p
, "%st(", 4) == 0)
1099 input_line_pointer
+= 4;
1100 expression (expressionP
);
1101 if (*input_line_pointer
!= ')')
1103 as_bad (_("missing ')' in %%-op"));
1106 ++input_line_pointer
;
1107 arc_code_symbol (expressionP
);
1111 /* It could be a register. */
1113 struct arc_ext_operand_value
*ext_oper
= arc_ext_operands
;
1118 l
= strlen (ext_oper
->operand
.name
);
1119 if (!strncmp (p
, ext_oper
->operand
.name
, l
) && !ISALNUM (*(p
+ l
)))
1121 input_line_pointer
+= l
+ 1;
1122 expressionP
->X_op
= O_register
;
1123 expressionP
->X_add_number
= (offsetT
) &ext_oper
->operand
;
1126 ext_oper
= ext_oper
->next
;
1128 for (i
= 0; i
< arc_reg_names_count
; i
++)
1130 l
= strlen (arc_reg_names
[i
].name
);
1131 if (!strncmp (p
, arc_reg_names
[i
].name
, l
) && !ISALNUM (*(p
+ l
)))
1133 input_line_pointer
+= l
+ 1;
1134 expressionP
->X_op
= O_register
;
1135 expressionP
->X_add_number
= (offsetT
) &arc_reg_names
[i
];
1142 /* We have no need to default values of symbols.
1143 We could catch register names here, but that is handled by inserting
1144 them all in the symbol table to begin with. */
1147 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
1152 /* Functions concerning expressions. */
1154 /* Parse a .byte, .word, etc. expression.
1156 Values for the status register are specified with %st(label).
1157 `label' will be right shifted by 2. */
1159 bfd_reloc_code_real_type
1160 arc_parse_cons_expression (expressionS
*exp
,
1161 unsigned int nbytes ATTRIBUTE_UNUSED
)
1163 char *p
= input_line_pointer
;
1164 int code_symbol_fix
= 0;
1166 for (; ! is_end_of_line
[(unsigned char) *p
]; p
++)
1167 if (*p
== '@' && !strncmp (p
, "@h30", 4))
1169 code_symbol_fix
= 1;
1172 expression_and_evaluate (exp
);
1173 if (code_symbol_fix
)
1175 arc_code_symbol (exp
);
1176 input_line_pointer
= p
;
1178 return BFD_RELOC_NONE
;
1181 /* Record a fixup for a cons expression. */
1184 arc_cons_fix_new (fragS
*frag
,
1188 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED
)
1195 /* This may be a special ARC reloc (eg: %st()). */
1196 reloc_type
= get_arc_exp_reloc_type (1, BFD_RELOC_32
, exp
, &exptmp
);
1197 fix_new_exp (frag
, where
, nbytes
, &exptmp
, 0,
1198 (enum bfd_reloc_code_real
) reloc_type
);
1202 fix_new_exp (frag
, where
, nbytes
, exp
, 0,
1203 nbytes
== 2 ? BFD_RELOC_16
1204 : nbytes
== 8 ? BFD_RELOC_64
1209 /* Functions concerning relocs. */
1211 /* The location from which a PC relative jump should be calculated,
1212 given a PC relative reloc. */
1215 md_pcrel_from (fixS
*fixP
)
1217 /* Return the address of the delay slot. */
1218 return fixP
->fx_frag
->fr_address
+ fixP
->fx_where
+ fixP
->fx_size
;
1221 /* Apply a fixup to the object code. This is called for all the
1222 fixups we generated by the call to fix_new_exp, above. In the call
1223 above we used a reloc code which was the largest legal reloc code
1224 plus the operand index. Here we undo that to recover the operand
1225 index. At this point all symbol values should be fully resolved,
1226 and we attempt to completely resolve the reloc. If we can not do
1227 that, we determine the correct reloc code and put it back in the fixup. */
1230 md_apply_fix (fixS
*fixP
, valueT
* valP
, segT seg
)
1232 valueT value
= * valP
;
1234 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
1237 else if (fixP
->fx_pcrel
)
1239 /* Hack around bfd_install_relocation brain damage. */
1240 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
1241 value
+= md_pcrel_from (fixP
);
1244 /* We can't actually support subtracting a symbol. */
1245 if (fixP
->fx_subsy
!= NULL
)
1246 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
1248 if ((int) fixP
->fx_r_type
>= (int) BFD_RELOC_UNUSED
)
1251 const struct arc_operand
*operand
;
1255 opindex
= (int) fixP
->fx_r_type
- (int) BFD_RELOC_UNUSED
;
1257 operand
= &arc_operands
[opindex
];
1259 /* Fetch the instruction, insert the fully resolved operand
1260 value, and stuff the instruction back again. */
1261 where
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1262 if (target_big_endian
)
1263 insn
= bfd_getb32 ((unsigned char *) where
);
1265 insn
= bfd_getl32 ((unsigned char *) where
);
1266 insn
= arc_insert_operand (insn
, operand
, -1, NULL
, (offsetT
) value
,
1267 fixP
->fx_file
, fixP
->fx_line
);
1268 if (target_big_endian
)
1269 bfd_putb32 ((bfd_vma
) insn
, (unsigned char *) where
);
1271 bfd_putl32 ((bfd_vma
) insn
, (unsigned char *) where
);
1274 /* Nothing else to do here. */
1277 /* Determine a BFD reloc value based on the operand information.
1278 We are only prepared to turn a few of the operands into relocs.
1279 !!! Note that we can't handle limm values here. Since we're using
1280 implicit addends the addend must be inserted into the instruction,
1281 however, the opcode insertion routines currently do nothing with
1283 if (operand
->fmt
== 'B')
1285 gas_assert ((operand
->flags
& ARC_OPERAND_RELATIVE_BRANCH
) != 0
1286 && operand
->bits
== 20
1287 && operand
->shift
== 7);
1288 fixP
->fx_r_type
= BFD_RELOC_ARC_B22_PCREL
;
1290 else if (operand
->fmt
== 'J')
1292 gas_assert ((operand
->flags
& ARC_OPERAND_ABSOLUTE_BRANCH
) != 0
1293 && operand
->bits
== 24
1294 && operand
->shift
== 32);
1295 fixP
->fx_r_type
= BFD_RELOC_ARC_B26
;
1297 else if (operand
->fmt
== 'L')
1299 gas_assert ((operand
->flags
& ARC_OPERAND_LIMM
) != 0
1300 && operand
->bits
== 32
1301 && operand
->shift
== 32);
1302 fixP
->fx_r_type
= BFD_RELOC_32
;
1306 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1307 _("unresolved expression that must be resolved"));
1314 switch (fixP
->fx_r_type
)
1317 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
1321 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
1325 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
1328 case BFD_RELOC_ARC_B26
:
1329 /* If !fixP->fx_done then `value' is an implicit addend.
1330 We must shift it right by 2 in this case as well because the
1331 linker performs the relocation and then adds this in (as opposed
1332 to adding this in and then shifting right by 2). */
1334 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
1343 /* Translate internal representation of relocation info to BFD target
1347 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
,
1352 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1353 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
1355 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
1356 reloc
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
1357 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
1358 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
1360 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1361 _("internal error: can't export reloc type %d (`%s')"),
1363 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1367 gas_assert (!fixP
->fx_pcrel
== !reloc
->howto
->pc_relative
);
1369 /* Set addend to account for PC being advanced one insn before the
1370 target address is computed. */
1372 reloc
->addend
= (fixP
->fx_pcrel
? -4 : 0);
1377 const pseudo_typeS md_pseudo_table
[] =
1379 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
1380 { "comm", arc_common
, 0 },
1381 { "common", arc_common
, 0 },
1382 { "lcomm", arc_common
, 1 },
1383 { "lcommon", arc_common
, 1 },
1384 { "2byte", cons
, 2 },
1385 { "half", cons
, 2 },
1386 { "short", cons
, 2 },
1387 { "3byte", cons
, 3 },
1388 { "4byte", cons
, 4 },
1389 { "word", cons
, 4 },
1390 { "option", arc_option
, 0 },
1391 { "cpu", arc_option
, 0 },
1392 { "block", s_space
, 0 },
1393 { "extcondcode", arc_extoper
, 0 },
1394 { "extcoreregister", arc_extoper
, 1 },
1395 { "extauxregister", arc_extoper
, 2 },
1396 { "extinstruction", arc_extinst
, 0 },
1400 /* This routine is called for each instruction to be assembled. */
1403 md_assemble (char *str
)
1405 const struct arc_opcode
*opcode
;
1406 const struct arc_opcode
*std_opcode
;
1407 struct arc_opcode
*ext_opcode
;
1409 const char *last_errmsg
= 0;
1411 static int init_tables_p
= 0;
1413 /* Opcode table initialization is deferred until here because we have to
1414 wait for a possible .option command. */
1417 init_opcode_tables (arc_mach_type
);
1421 /* Skip leading white space. */
1422 while (ISSPACE (*str
))
1425 /* The instructions are stored in lists hashed by the first letter (though
1426 we needn't care how they're hashed). Get the first in the list. */
1428 ext_opcode
= arc_ext_opcodes
;
1429 std_opcode
= arc_opcode_lookup_asm (str
);
1431 /* Keep looking until we find a match. */
1433 for (opcode
= (ext_opcode
? ext_opcode
: std_opcode
);
1435 opcode
= (ARC_OPCODE_NEXT_ASM (opcode
)
1436 ? ARC_OPCODE_NEXT_ASM (opcode
)
1437 : (ext_opcode
? ext_opcode
= NULL
, std_opcode
: NULL
)))
1439 int past_opcode_p
, fc
, num_suffixes
;
1442 struct arc_fixup fixups
[MAX_FIXUPS
];
1443 /* Used as a sanity check. If we need a limm reloc, make sure we ask
1444 for an extra 4 bytes from frag_more. */
1447 const struct arc_operand_value
*insn_suffixes
[MAX_SUFFIXES
];
1449 /* Is this opcode supported by the selected cpu? */
1450 if (! arc_opcode_supported (opcode
))
1453 /* Scan the syntax string. If it doesn't match, try the next one. */
1454 arc_opcode_init_insert ();
1455 insn
= opcode
->value
;
1462 /* We don't check for (*str != '\0') here because we want to parse
1463 any trailing fake arguments in the syntax string. */
1464 for (str
= start
, syn
= opcode
->syntax
; *syn
!= '\0';)
1467 const struct arc_operand
*operand
;
1469 /* Non operand chars must match exactly. */
1470 if (*syn
!= '%' || *++syn
== '%')
1484 /* We have an operand. Pick out any modifiers. */
1486 while (ARC_MOD_P (arc_operands
[arc_operand_map
[(int) *syn
]].flags
))
1488 mods
|= arc_operands
[arc_operand_map
[(int) *syn
]].flags
& ARC_MOD_BITS
;
1491 operand
= arc_operands
+ arc_operand_map
[(int) *syn
];
1492 if (operand
->fmt
== 0)
1493 as_fatal (_("unknown syntax format character `%c'"), *syn
);
1495 if (operand
->flags
& ARC_OPERAND_FAKE
)
1497 const char *errmsg
= NULL
;
1498 if (operand
->insert
)
1500 insn
= (*operand
->insert
) (insn
, operand
, mods
, NULL
, 0, &errmsg
);
1501 if (errmsg
!= (const char *) NULL
)
1503 last_errmsg
= errmsg
;
1504 if (operand
->flags
& ARC_OPERAND_ERROR
)
1506 as_bad ("%s", errmsg
);
1509 else if (operand
->flags
& ARC_OPERAND_WARN
)
1510 as_warn ("%s", errmsg
);
1514 && (operand
->flags
&& operand
->flags
& ARC_OPERAND_LIMM
)
1515 && (operand
->flags
&
1516 (ARC_OPERAND_ABSOLUTE_BRANCH
| ARC_OPERAND_ADDRESS
)))
1518 fixups
[fix_up_at
].opindex
= arc_operand_map
[operand
->fmt
];
1523 /* Are we finished with suffixes? */
1524 else if (!past_opcode_p
)
1529 const struct arc_operand_value
*suf
, *suffix_end
;
1530 const struct arc_operand_value
*suffix
= NULL
;
1532 if (!(operand
->flags
& ARC_OPERAND_SUFFIX
))
1535 /* If we're at a space in the input string, we want to skip the
1536 remaining suffixes. There may be some fake ones though, so
1537 just go on to try the next one. */
1545 if (mods
& ARC_MOD_DOT
)
1553 /* This can happen in "b.nd foo" and we're currently looking
1554 for "%q" (ie: a condition code suffix). */
1562 /* Pick the suffix out and look it up via the hash table. */
1563 for (t
= s
; *t
&& ISALNUM (*t
); ++t
)
1567 if ((suf
= get_ext_suffix (s
)))
1570 suf
= (const struct arc_operand_value
*)
1571 hash_find (arc_suffix_hash
, s
);
1574 /* This can happen in "blle foo" and we're currently using
1575 the template "b%q%.n %j". The "bl" insn occurs later in
1576 the table so "lle" isn't an illegal suffix. */
1581 /* Is it the right type? Note that the same character is used
1582 several times, so we have to examine all of them. This is
1583 relatively efficient as equivalent entries are kept
1584 together. If it's not the right type, don't increment `str'
1585 so we try the next one in the series. */
1587 if (ext_suffix_p
&& arc_operands
[suf
->type
].fmt
== *syn
)
1589 /* Insert the suffix's value into the insn. */
1591 if (operand
->insert
)
1592 insn
= (*operand
->insert
) (insn
, operand
,
1593 mods
, NULL
, suf
->value
,
1596 insn
|= suf
->value
<< operand
->shift
;
1604 suffix_end
= arc_suffixes
+ arc_suffixes_count
;
1606 suffix
< suffix_end
&& strcmp (suffix
->name
, suf
->name
) == 0;
1609 if (arc_operands
[suffix
->type
].fmt
== *syn
)
1611 /* Insert the suffix's value into the insn. */
1612 if (operand
->insert
)
1613 insn
= (*operand
->insert
) (insn
, operand
,
1614 mods
, NULL
, suffix
->value
,
1617 insn
|= suffix
->value
<< operand
->shift
;
1627 /* Wrong type. Just go on to try next insn entry. */
1631 if (num_suffixes
== MAX_SUFFIXES
)
1632 as_bad (_("too many suffixes"));
1634 insn_suffixes
[num_suffixes
++] = suffix
;
1638 /* This is either a register or an expression of some kind. */
1641 const struct arc_operand_value
*reg
= NULL
;
1645 if (operand
->flags
& ARC_OPERAND_SUFFIX
)
1648 /* Is there anything left to parse?
1649 We don't check for this at the top because we want to parse
1650 any trailing fake arguments in the syntax string. */
1651 if (is_end_of_line
[(unsigned char) *str
])
1654 /* Parse the operand. */
1655 hold
= input_line_pointer
;
1656 input_line_pointer
= str
;
1658 str
= input_line_pointer
;
1659 input_line_pointer
= hold
;
1661 if (exp
.X_op
== O_illegal
)
1662 as_bad (_("illegal operand"));
1663 else if (exp
.X_op
== O_absent
)
1664 as_bad (_("missing operand"));
1665 else if (exp
.X_op
== O_constant
)
1666 value
= exp
.X_add_number
;
1667 else if (exp
.X_op
== O_register
)
1668 reg
= (struct arc_operand_value
*) exp
.X_add_number
;
1669 #define IS_REG_DEST_OPERAND(o) ((o) == 'a')
1670 else if (IS_REG_DEST_OPERAND (*syn
))
1671 as_bad (_("symbol as destination register"));
1674 if (!strncmp (str
, "@h30", 4))
1676 arc_code_symbol (&exp
);
1679 /* We need to generate a fixup for this expression. */
1680 if (fc
>= MAX_FIXUPS
)
1681 as_fatal (_("too many fixups"));
1682 fixups
[fc
].exp
= exp
;
1683 /* We don't support shimm relocs. break here to force
1684 the assembler to output a limm. */
1685 #define IS_REG_SHIMM_OFFSET(o) ((o) == 'd')
1686 if (IS_REG_SHIMM_OFFSET (*syn
))
1688 /* If this is a register constant (IE: one whose
1689 register value gets stored as 61-63) then this
1691 /* ??? This bit could use some cleaning up.
1692 Referencing the format chars like this goes
1694 if (IS_SYMBOL_OPERAND (*syn
))
1698 /* Save this, we don't yet know what reloc to use. */
1700 /* Tell insert_reg we need a limm. This is
1701 needed because the value at this point is
1703 /* ??? We need a cleaner interface than this. */
1704 (*arc_operands
[arc_operand_map
['Q']].insert
)
1705 (insn
, operand
, mods
, reg
, 0L, &junk
);
1708 fixups
[fc
].opindex
= arc_operand_map
[(int) *syn
];
1713 /* Insert the register or expression into the instruction. */
1714 if (operand
->insert
)
1716 const char *errmsg
= NULL
;
1717 insn
= (*operand
->insert
) (insn
, operand
, mods
,
1718 reg
, (long) value
, &errmsg
);
1719 if (errmsg
!= (const char *) NULL
)
1721 last_errmsg
= errmsg
;
1722 if (operand
->flags
& ARC_OPERAND_ERROR
)
1724 as_bad ("%s", errmsg
);
1727 else if (operand
->flags
& ARC_OPERAND_WARN
)
1728 as_warn ("%s", errmsg
);
1733 insn
|= (value
& ((1 << operand
->bits
) - 1)) << operand
->shift
;
1739 /* If we're at the end of the syntax string, we're done. */
1740 /* FIXME: try to move this to a separate function. */
1747 /* For the moment we assume a valid `str' can only contain blanks
1748 now. IE: We needn't try again with a longer version of the
1749 insn and it is assumed that longer versions of insns appear
1750 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
1752 while (ISSPACE (*str
))
1755 if (!is_end_of_line
[(unsigned char) *str
])
1756 as_bad (_("junk at end of line: `%s'"), str
);
1758 /* Is there a limm value? */
1759 limm_p
= arc_opcode_limm_p (&limm
);
1761 /* Perform various error and warning tests. */
1764 static int in_delay_slot_p
= 0;
1765 static int prev_insn_needs_cc_nop_p
= 0;
1766 /* delay slot type seen */
1767 int delay_slot_type
= ARC_DELAY_NONE
;
1768 /* conditional execution flag seen */
1769 int conditional
= 0;
1770 /* 1 if condition codes are being set */
1772 /* 1 if conditional branch, including `b' "branch always" */
1773 int cond_branch_p
= opcode
->flags
& ARC_OPCODE_COND_BRANCH
;
1775 for (i
= 0; i
< num_suffixes
; ++i
)
1777 switch (arc_operands
[insn_suffixes
[i
]->type
].fmt
)
1780 delay_slot_type
= insn_suffixes
[i
]->value
;
1783 conditional
= insn_suffixes
[i
]->value
;
1791 /* Putting an insn with a limm value in a delay slot is supposed to
1792 be legal, but let's warn the user anyway. Ditto for 8 byte
1793 jumps with delay slots. */
1794 if (in_delay_slot_p
&& limm_p
)
1795 as_warn (_("8 byte instruction in delay slot"));
1796 if (delay_slot_type
!= ARC_DELAY_NONE
1797 && limm_p
&& arc_insn_not_jl (insn
)) /* except for jl addr */
1798 as_warn (_("8 byte jump instruction with delay slot"));
1799 in_delay_slot_p
= (delay_slot_type
!= ARC_DELAY_NONE
) && !limm_p
;
1801 /* Warn when a conditional branch immediately follows a set of
1802 the condition codes. Note that this needn't be done if the
1803 insn that sets the condition codes uses a limm. */
1804 if (cond_branch_p
&& conditional
!= 0 /* 0 = "always" */
1805 && prev_insn_needs_cc_nop_p
&& arc_mach_type
== bfd_mach_arc_5
)
1806 as_warn (_("conditional branch follows set of flags"));
1807 prev_insn_needs_cc_nop_p
=
1808 /* FIXME: ??? not required:
1809 (delay_slot_type != ARC_DELAY_NONE) && */
1810 cc_set_p
&& !limm_p
;
1813 /* Write out the instruction.
1814 It is important to fetch enough space in one call to `frag_more'.
1815 We use (f - frag_now->fr_literal) to compute where we are and we
1816 don't want frag_now to change between calls. */
1820 md_number_to_chars (f
, insn
, 4);
1821 md_number_to_chars (f
+ 4, limm
, 4);
1822 dwarf2_emit_insn (8);
1824 else if (limm_reloc_p
)
1825 /* We need a limm reloc, but the tables think we don't. */
1830 md_number_to_chars (f
, insn
, 4);
1831 dwarf2_emit_insn (4);
1834 /* Create any fixups. */
1835 for (i
= 0; i
< fc
; ++i
)
1837 int op_type
, reloc_type
;
1839 const struct arc_operand
*operand
;
1841 /* Create a fixup for this operand.
1842 At this point we do not use a bfd_reloc_code_real_type for
1843 operands residing in the insn, but instead just use the
1844 operand index. This lets us easily handle fixups for any
1845 operand type, although that is admittedly not a very exciting
1846 feature. We pick a BFD reloc type in md_apply_fix.
1848 Limm values (4 byte immediate "constants") must be treated
1849 normally because they're not part of the actual insn word
1850 and thus the insertion routines don't handle them. */
1852 if (arc_operands
[fixups
[i
].opindex
].flags
& ARC_OPERAND_LIMM
)
1854 /* Modify the fixup addend as required by the cpu. */
1855 fixups
[i
].exp
.X_add_number
+= arc_limm_fixup_adjust (insn
);
1856 op_type
= fixups
[i
].opindex
;
1857 /* FIXME: can we add this data to the operand table? */
1858 if (op_type
== arc_operand_map
['L']
1859 || op_type
== arc_operand_map
['s']
1860 || op_type
== arc_operand_map
['o']
1861 || op_type
== arc_operand_map
['O'])
1862 reloc_type
= BFD_RELOC_32
;
1863 else if (op_type
== arc_operand_map
['J'])
1864 reloc_type
= BFD_RELOC_ARC_B26
;
1867 reloc_type
= get_arc_exp_reloc_type (1, reloc_type
,
1873 op_type
= get_arc_exp_reloc_type (0, fixups
[i
].opindex
,
1874 &fixups
[i
].exp
, &exptmp
);
1875 reloc_type
= op_type
+ (int) BFD_RELOC_UNUSED
;
1877 operand
= &arc_operands
[op_type
];
1878 fix_new_exp (frag_now
,
1879 ((f
- frag_now
->fr_literal
)
1880 + (operand
->flags
& ARC_OPERAND_LIMM
? 4 : 0)), 4,
1882 (operand
->flags
& ARC_OPERAND_RELATIVE_BRANCH
) != 0,
1883 (bfd_reloc_code_real_type
) reloc_type
);
1889 if (NULL
== last_errmsg
)
1890 as_bad (_("bad instruction `%s'"), start
);
1892 as_bad ("%s", last_errmsg
);