1 /* tc-arc.c -- Assembler for the ARC
2 Copyright (C) 1994-2014 Free Software Foundation, Inc.
3 Contributed by Doug Evans (dje@cygnus.com).
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "struc-symbol.h"
24 #include "safe-ctype.h"
26 #include "opcode/arc.h"
27 #include "../opcodes/arc-ext.h"
29 #include "dwarf2dbg.h"
31 const struct suffix_classes
37 { "SUFFIX_COND|SUFFIX_FLAG",23 },
38 { "SUFFIX_FLAG", 11 },
39 { "SUFFIX_COND", 11 },
43 #define MAXSUFFIXCLASS (sizeof (suffixclass) / sizeof (struct suffix_classes))
45 const struct syntax_classes
52 { "SYNTAX_3OP|OP1_MUST_BE_IMM", 26, SYNTAX_3OP
|OP1_MUST_BE_IMM
|SYNTAX_VALID
},
53 { "OP1_MUST_BE_IMM|SYNTAX_3OP", 26, OP1_MUST_BE_IMM
|SYNTAX_3OP
|SYNTAX_VALID
},
54 { "SYNTAX_2OP|OP1_IMM_IMPLIED", 26, SYNTAX_2OP
|OP1_IMM_IMPLIED
|SYNTAX_VALID
},
55 { "OP1_IMM_IMPLIED|SYNTAX_2OP", 26, OP1_IMM_IMPLIED
|SYNTAX_2OP
|SYNTAX_VALID
},
56 { "SYNTAX_3OP", 10, SYNTAX_3OP
|SYNTAX_VALID
},
57 { "SYNTAX_2OP", 10, SYNTAX_2OP
|SYNTAX_VALID
}
60 #define MAXSYNTAXCLASS (sizeof (syntaxclass) / sizeof (struct syntax_classes))
62 /* This array holds the chars that always start a comment. If the
63 pre-processor is disabled, these aren't very useful. */
64 const char comment_chars
[] = "#;";
66 /* This array holds the chars that only start a comment at the beginning of
67 a line. If the line seems to have the form '# 123 filename'
68 .line and .file directives will appear in the pre-processed output */
69 /* Note that input_file.c hand checks for '#' at the beginning of the
70 first line of the input file. This is because the compiler outputs
71 #NO_APP at the beginning of its output. */
72 /* Also note that comments started like this one will always
73 work if '/' isn't otherwise defined. */
74 const char line_comment_chars
[] = "#";
76 const char line_separator_chars
[] = "";
78 /* Chars that can be used to separate mant from exp in floating point nums. */
79 const char EXP_CHARS
[] = "eE";
81 /* Chars that mean this number is a floating point constant
82 As in 0f12.456 or 0d1.2345e12. */
83 const char FLT_CHARS
[] = "rRsSfFdD";
86 extern int target_big_endian
;
87 const char *arc_target_format
= DEFAULT_TARGET_FORMAT
;
88 static int byte_order
= DEFAULT_BYTE_ORDER
;
90 static segT arcext_section
;
92 /* One of bfd_mach_arc_n. */
93 static int arc_mach_type
= bfd_mach_arc_6
;
95 /* Non-zero if the cpu type has been explicitly specified. */
96 static int mach_type_specified_p
= 0;
98 /* Non-zero if opcode tables have been initialized.
99 A .option command must appear before any instructions. */
100 static int cpu_tables_init_p
= 0;
102 static struct hash_control
*arc_suffix_hash
= NULL
;
104 const char *md_shortopts
= "";
108 OPTION_EB
= OPTION_MD_BASE
,
117 struct option md_longopts
[] =
119 { "EB", no_argument
, NULL
, OPTION_EB
},
120 { "EL", no_argument
, NULL
, OPTION_EL
},
121 { "marc5", no_argument
, NULL
, OPTION_ARC5
},
122 { "pre-v6", no_argument
, NULL
, OPTION_ARC5
},
123 { "marc6", no_argument
, NULL
, OPTION_ARC6
},
124 { "marc7", no_argument
, NULL
, OPTION_ARC7
},
125 { "marc8", no_argument
, NULL
, OPTION_ARC8
},
126 { "marc", no_argument
, NULL
, OPTION_ARC
},
127 { NULL
, no_argument
, NULL
, 0 }
129 size_t md_longopts_size
= sizeof (md_longopts
);
131 #define IS_SYMBOL_OPERAND(o) \
132 ((o) == 'b' || (o) == 'c' || (o) == 's' || (o) == 'o' || (o) == 'O')
134 struct arc_operand_value
*get_ext_suffix (char *s
);
136 /* Invocation line includes a switch not recognized by the base assembler.
137 See if it's a processor-specific option. */
140 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
145 arc_mach_type
= bfd_mach_arc_5
;
149 arc_mach_type
= bfd_mach_arc_6
;
152 arc_mach_type
= bfd_mach_arc_7
;
155 arc_mach_type
= bfd_mach_arc_8
;
158 byte_order
= BIG_ENDIAN
;
159 arc_target_format
= "elf32-bigarc";
162 byte_order
= LITTLE_ENDIAN
;
163 arc_target_format
= "elf32-littlearc";
172 md_show_usage (FILE *stream
)
176 -marc[5|6|7|8] select processor variant (default arc%d)\n\
177 -EB assemble code for a big endian cpu\n\
178 -EL assemble code for a little endian cpu\n", arc_mach_type
+ 5);
181 /* This function is called once, at assembler startup time. It should
182 set up all the tables, etc. that the MD part of the assembler will need.
183 Opcode selection is deferred until later because we might see a .option
189 /* The endianness can be chosen "at the factory". */
190 target_big_endian
= byte_order
== BIG_ENDIAN
;
192 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_arc
, arc_mach_type
))
193 as_warn (_("could not set architecture and machine"));
195 /* This call is necessary because we need to initialize `arc_operand_map'
196 which may be needed before we see the first insn. */
197 arc_opcode_init_tables (arc_get_opcode_mach (arc_mach_type
,
201 /* Initialize the various opcode and operand tables.
202 MACH is one of bfd_mach_arc_xxx. */
205 init_opcode_tables (int mach
)
210 if ((arc_suffix_hash
= hash_new ()) == NULL
)
211 as_fatal (_("virtual memory exhausted"));
213 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_arc
, mach
))
214 as_warn (_("could not set architecture and machine"));
216 /* This initializes a few things in arc-opc.c that we need.
217 This must be called before the various arc_xxx_supported fns. */
218 arc_opcode_init_tables (arc_get_opcode_mach (mach
, target_big_endian
));
220 /* Only put the first entry of each equivalently named suffix in the
223 for (i
= 0; i
< arc_suffixes_count
; i
++)
225 if (strcmp (arc_suffixes
[i
].name
, last
) != 0)
226 hash_insert (arc_suffix_hash
, arc_suffixes
[i
].name
, (void *) (arc_suffixes
+ i
));
227 last
= arc_suffixes
[i
].name
;
230 /* Since registers don't have a prefix, we put them in the symbol table so
231 they can't be used as symbols. This also simplifies argument parsing as
232 we can let gas parse registers for us. The recorded register number is
233 the address of the register's entry in arc_reg_names.
235 If the register name is already in the table, then the existing
236 definition is assumed to be from an .ExtCoreRegister pseudo-op. */
238 for (i
= 0; i
< arc_reg_names_count
; i
++)
240 if (symbol_find (arc_reg_names
[i
].name
))
242 /* Use symbol_create here instead of symbol_new so we don't try to
243 output registers into the object file's symbol table. */
244 symbol_table_insert (symbol_create (arc_reg_names
[i
].name
,
246 (valueT
) &arc_reg_names
[i
],
247 &zero_address_frag
));
250 /* Tell `.option' it's too late. */
251 cpu_tables_init_p
= 1;
254 /* Insert an operand value into an instruction.
255 If REG is non-NULL, it is a register number and ignore VAL. */
258 arc_insert_operand (arc_insn insn
,
259 const struct arc_operand
*operand
,
261 const struct arc_operand_value
*reg
,
266 if (operand
->bits
!= 32)
271 if ((operand
->flags
& ARC_OPERAND_SIGNED
) != 0)
273 if ((operand
->flags
& ARC_OPERAND_SIGNOPT
) != 0)
274 max
= (1 << operand
->bits
) - 1;
276 max
= (1 << (operand
->bits
- 1)) - 1;
277 min
= - (1 << (operand
->bits
- 1));
281 max
= (1 << operand
->bits
) - 1;
285 if ((operand
->flags
& ARC_OPERAND_NEGATIVE
) != 0)
290 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
291 as_warn_value_out_of_range (_("operand"), test
, (offsetT
) min
, (offsetT
) max
, file
, line
);
299 insn
= (*operand
->insert
) (insn
, operand
, mods
, reg
, (long) val
, &errmsg
);
300 if (errmsg
!= (const char *) NULL
)
301 as_warn ("%s", errmsg
);
304 insn
|= (((long) val
& ((1 << operand
->bits
) - 1))
310 /* We need to keep a list of fixups. We can't simply generate them as
311 we go, because that would require us to first create the frag, and
312 that would screw up references to ``.''. */
316 /* index into `arc_operands' */
323 #define MAX_SUFFIXES 5
325 /* Compute the reloc type of an expression.
326 The possibly modified expression is stored in EXPNEW.
328 This is used to convert the expressions generated by the %-op's into
329 the appropriate operand type. It is called for both data in instructions
330 (operands) and data outside instructions (variables, debugging info, etc.).
332 Currently supported %-ops:
334 %st(symbol): represented as "symbol >> 2"
335 "st" is short for STatus as in the status register (pc)
337 DEFAULT_TYPE is the type to use if no special processing is required.
339 DATA_P is non-zero for data or limm values, zero for insn operands.
340 Remember that the opcode "insertion fns" cannot be used on data, they're
341 only for inserting operands into insns. They also can't be used for limm
342 values as the insertion routines don't handle limm values. When called for
343 insns we return fudged reloc types (real_value - BFD_RELOC_UNUSED). When
344 called for data or limm values we use real reloc types. */
347 get_arc_exp_reloc_type (int data_p
,
352 /* If the expression is "symbol >> 2" we must change it to just "symbol",
353 as fix_new_exp can't handle it. Similarly for (symbol - symbol) >> 2.
354 That's ok though. What's really going on here is that we're using
355 ">> 2" as a special syntax for specifying BFD_RELOC_ARC_B26. */
357 if (exp
->X_op
== O_right_shift
358 && exp
->X_op_symbol
!= NULL
359 && exp
->X_op_symbol
->sy_value
.X_op
== O_constant
360 && exp
->X_op_symbol
->sy_value
.X_add_number
== 2
361 && exp
->X_add_number
== 0)
363 if (exp
->X_add_symbol
!= NULL
364 && (exp
->X_add_symbol
->sy_value
.X_op
== O_constant
365 || exp
->X_add_symbol
->sy_value
.X_op
== O_symbol
))
368 expnew
->X_op
= O_symbol
;
369 expnew
->X_op_symbol
= NULL
;
370 return data_p
? BFD_RELOC_ARC_B26
: arc_operand_map
['J'];
372 else if (exp
->X_add_symbol
!= NULL
373 && exp
->X_add_symbol
->sy_value
.X_op
== O_subtract
)
375 *expnew
= exp
->X_add_symbol
->sy_value
;
376 return data_p
? BFD_RELOC_ARC_B26
: arc_operand_map
['J'];
385 arc_set_ext_seg (void)
389 arcext_section
= subseg_new (".arcextmap", 0);
390 bfd_set_section_flags (stdoutput
, arcext_section
,
391 SEC_READONLY
| SEC_HAS_CONTENTS
);
394 subseg_set (arcext_section
, 0);
399 arc_extoper (int opertype
)
407 struct arc_ext_operand_value
*ext_oper
;
413 name
= input_line_pointer
;
414 c
= get_symbol_end ();
415 name
= xstrdup (name
);
424 /* just after name is now '\0' */
425 p
= input_line_pointer
;
429 if (*input_line_pointer
!= ',')
431 as_bad (_("expected comma after operand name"));
432 ignore_rest_of_line ();
437 input_line_pointer
++; /* skip ',' */
438 number
= get_absolute_expression ();
442 as_bad (_("negative operand number %d"), number
);
443 ignore_rest_of_line ();
452 if (*input_line_pointer
!= ',')
454 as_bad (_("expected comma after register-number"));
455 ignore_rest_of_line ();
460 input_line_pointer
++; /* skip ',' */
461 mode
= input_line_pointer
;
463 if (!strncmp (mode
, "r|w", 3))
466 input_line_pointer
+= 3;
470 if (!strncmp (mode
, "r", 1))
472 imode
= ARC_REGISTER_READONLY
;
473 input_line_pointer
+= 1;
477 if (strncmp (mode
, "w", 1))
479 as_bad (_("invalid mode"));
480 ignore_rest_of_line ();
486 imode
= ARC_REGISTER_WRITEONLY
;
487 input_line_pointer
+= 1;
494 if (*input_line_pointer
!= ',')
496 as_bad (_("expected comma after register-mode"));
497 ignore_rest_of_line ();
502 input_line_pointer
++; /* skip ',' */
504 if (!strncmp (input_line_pointer
, "cannot_shortcut", 15))
506 imode
|= arc_get_noshortcut_flag ();
507 input_line_pointer
+= 15;
511 if (strncmp (input_line_pointer
, "can_shortcut", 12))
513 as_bad (_("shortcut designator invalid"));
514 ignore_rest_of_line ();
520 input_line_pointer
+= 12;
526 if ((opertype
== 1) && number
> 60)
528 as_bad (_("core register value (%d) too large"), number
);
529 ignore_rest_of_line ();
534 if ((opertype
== 0) && number
> 31)
536 as_bad (_("condition code value (%d) too large"), number
);
537 ignore_rest_of_line ();
542 ext_oper
= (struct arc_ext_operand_value
*)
543 xmalloc (sizeof (struct arc_ext_operand_value
));
547 /* If the symbol already exists, point it at the new definition. */
548 if ((symbolP
= symbol_find (name
)))
550 if (S_GET_SEGMENT (symbolP
) == reg_section
)
551 S_SET_VALUE (symbolP
, (valueT
) &ext_oper
->operand
);
554 as_bad (_("attempt to override symbol: %s"), name
);
555 ignore_rest_of_line ();
563 /* If its not there, add it. */
564 symbol_table_insert (symbol_create (name
, reg_section
,
565 (valueT
) &ext_oper
->operand
,
566 &zero_address_frag
));
570 ext_oper
->operand
.name
= name
;
571 ext_oper
->operand
.value
= number
;
572 ext_oper
->operand
.type
= arc_operand_type (opertype
);
573 ext_oper
->operand
.flags
= imode
;
575 ext_oper
->next
= arc_ext_operands
;
576 arc_ext_operands
= ext_oper
;
578 /* OK, now that we know what this operand is, put a description in
579 the arc extension section of the output file. */
582 old_subsec
= now_subseg
;
590 *p
= 3 + strlen (name
) + 1;
595 p
= frag_more (strlen (name
) + 1);
600 *p
= 3 + strlen (name
) + 1;
602 *p
= EXT_CORE_REGISTER
;
605 p
= frag_more (strlen (name
) + 1);
610 *p
= 6 + strlen (name
) + 1;
612 *p
= EXT_AUX_REGISTER
;
614 *p
= number
>> 24 & 0xff;
616 *p
= number
>> 16 & 0xff;
618 *p
= number
>> 8 & 0xff;
621 p
= frag_more (strlen (name
) + 1);
625 as_bad (_("invalid opertype"));
626 ignore_rest_of_line ();
632 subseg_set (old_sec
, old_subsec
);
634 /* Enter all registers into the symbol table. */
636 demand_empty_rest_of_line ();
640 arc_extinst (int ignore ATTRIBUTE_UNUSED
)
647 int opcode
, subopcode
;
651 struct arc_opcode
*ext_op
;
656 name
= input_line_pointer
;
657 c
= get_symbol_end ();
658 name
= xstrdup (name
);
659 strcpy (syntax
, name
);
660 name_len
= strlen (name
);
662 /* just after name is now '\0' */
663 p
= input_line_pointer
;
668 if (*input_line_pointer
!= ',')
670 as_bad (_("expected comma after operand name"));
671 ignore_rest_of_line ();
675 input_line_pointer
++; /* skip ',' */
676 opcode
= get_absolute_expression ();
680 if (*input_line_pointer
!= ',')
682 as_bad (_("expected comma after opcode"));
683 ignore_rest_of_line ();
687 input_line_pointer
++; /* skip ',' */
688 subopcode
= get_absolute_expression ();
692 as_bad (_("negative subopcode %d"), subopcode
);
693 ignore_rest_of_line ();
701 as_bad (_("subcode value found when opcode not equal 0x03"));
702 ignore_rest_of_line ();
707 if (subopcode
< 0x09 || subopcode
== 0x3f)
709 as_bad (_("invalid subopcode %d"), subopcode
);
710 ignore_rest_of_line ();
718 if (*input_line_pointer
!= ',')
720 as_bad (_("expected comma after subopcode"));
721 ignore_rest_of_line ();
725 input_line_pointer
++; /* skip ',' */
727 for (i
= 0; i
< (int) MAXSUFFIXCLASS
; i
++)
729 if (!strncmp (suffixclass
[i
].name
,input_line_pointer
, suffixclass
[i
].len
))
732 input_line_pointer
+= suffixclass
[i
].len
;
737 if (-1 == suffixcode
)
739 as_bad (_("invalid suffix class"));
740 ignore_rest_of_line ();
746 if (*input_line_pointer
!= ',')
748 as_bad (_("expected comma after suffix class"));
749 ignore_rest_of_line ();
753 input_line_pointer
++; /* skip ',' */
755 for (i
= 0; i
< (int) MAXSYNTAXCLASS
; i
++)
757 if (!strncmp (syntaxclass
[i
].name
,input_line_pointer
, syntaxclass
[i
].len
))
759 s_class
= syntaxclass
[i
].s_class
;
760 input_line_pointer
+= syntaxclass
[i
].len
;
765 if (0 == (SYNTAX_VALID
& s_class
))
767 as_bad (_("invalid syntax class"));
768 ignore_rest_of_line ();
772 if ((0x3 == opcode
) & (s_class
& SYNTAX_3OP
))
774 as_bad (_("opcode 0x3 and SYNTAX_3OP invalid"));
775 ignore_rest_of_line ();
782 strcat (syntax
, "%.q%.f ");
785 strcat (syntax
, "%.f ");
788 strcat (syntax
, "%.q ");
791 strcat (syntax
, " ");
794 as_bad (_("unknown suffix class"));
795 ignore_rest_of_line ();
800 strcat (syntax
, ((opcode
== 0x3) ? "%a,%b" : ((s_class
& SYNTAX_3OP
) ? "%a,%b,%c" : "%b,%c")));
802 strcat (syntax
, "%F");
803 strcat (syntax
, "%S%L");
805 ext_op
= (struct arc_opcode
*) xmalloc (sizeof (struct arc_opcode
));
806 ext_op
->syntax
= xstrdup (syntax
);
808 ext_op
->mask
= I (-1) | ((0x3 == opcode
) ? C (-1) : 0);
809 ext_op
->value
= I (opcode
) | ((0x3 == opcode
) ? C (subopcode
) : 0);
810 ext_op
->flags
= s_class
;
811 ext_op
->next_asm
= arc_ext_opcodes
;
812 ext_op
->next_dis
= arc_ext_opcodes
;
813 arc_ext_opcodes
= ext_op
;
815 /* OK, now that we know what this inst is, put a description in the
816 arc extension section of the output file. */
819 old_subsec
= now_subseg
;
824 *p
= 5 + name_len
+ 1;
826 *p
= EXT_INSTRUCTION
;
832 *p
= (s_class
& (OP1_MUST_BE_IMM
| OP1_IMM_IMPLIED
) ? IGNORE_FIRST_OPD
: 0);
833 p
= frag_more (name_len
);
834 strncpy (p
, syntax
, name_len
);
838 subseg_set (old_sec
, old_subsec
);
840 demand_empty_rest_of_line ();
844 arc_common (int localScope
)
852 name
= input_line_pointer
;
853 c
= get_symbol_end ();
854 /* just after name is now '\0' */
855 p
= input_line_pointer
;
859 if (*input_line_pointer
!= ',')
861 as_bad (_("expected comma after symbol name"));
862 ignore_rest_of_line ();
866 input_line_pointer
++; /* skip ',' */
867 size
= get_absolute_expression ();
871 as_bad (_("negative symbol length"));
872 ignore_rest_of_line ();
877 symbolP
= symbol_find_or_make (name
);
880 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
882 as_bad (_("ignoring attempt to re-define symbol"));
883 ignore_rest_of_line ();
886 if (((int) S_GET_VALUE (symbolP
) != 0) \
887 && ((int) S_GET_VALUE (symbolP
) != size
))
889 as_warn (_("length of symbol \"%s\" already %ld, ignoring %d"),
890 S_GET_NAME (symbolP
), (long) S_GET_VALUE (symbolP
), size
);
892 gas_assert (symbolP
->sy_frag
== &zero_address_frag
);
894 /* Now parse the alignment field. This field is optional for
895 local and global symbols. Default alignment is zero. */
896 if (*input_line_pointer
== ',')
898 input_line_pointer
++;
899 align
= get_absolute_expression ();
903 as_warn (_("assuming symbol alignment of zero"));
916 old_subsec
= now_subseg
;
917 record_alignment (bss_section
, align
);
918 subseg_set (bss_section
, 0); /* ??? subseg_set (bss_section, 1); ??? */
922 frag_align (align
, 0, 0);
924 /* Detach from old frag. */
925 if (S_GET_SEGMENT (symbolP
) == bss_section
)
926 symbolP
->sy_frag
->fr_symbol
= NULL
;
928 symbolP
->sy_frag
= frag_now
;
929 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
,
930 (offsetT
) size
, (char *) 0);
933 S_SET_SIZE (symbolP
, size
);
934 S_SET_SEGMENT (symbolP
, bss_section
);
935 S_CLEAR_EXTERNAL (symbolP
);
936 symbol_get_obj (symbolP
)->local
= 1;
937 subseg_set (old_sec
, old_subsec
);
941 S_SET_VALUE (symbolP
, (valueT
) size
);
942 S_SET_ALIGN (symbolP
, align
);
943 S_SET_EXTERNAL (symbolP
);
944 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
947 symbolP
->bsym
->flags
|= BSF_OBJECT
;
949 demand_empty_rest_of_line ();
952 /* Select the cpu we're assembling for. */
955 arc_option (int ignore ATTRIBUTE_UNUSED
)
957 extern int arc_get_mach (char *);
962 cpu
= input_line_pointer
;
963 c
= get_symbol_end ();
964 mach
= arc_get_mach (cpu
);
965 *input_line_pointer
= c
;
967 /* If an instruction has already been seen, it's too late. */
968 if (cpu_tables_init_p
)
970 as_bad (_("\".option\" directive must appear before any instructions"));
971 ignore_rest_of_line ();
978 if (mach_type_specified_p
&& mach
!= arc_mach_type
)
980 as_bad (_("\".option\" directive conflicts with initial definition"));
981 ignore_rest_of_line ();
986 /* The cpu may have been selected on the command line. */
987 if (mach
!= arc_mach_type
)
988 as_warn (_("\".option\" directive overrides command-line (default) value"));
989 arc_mach_type
= mach
;
990 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_arc
, mach
))
991 as_fatal (_("could not set architecture and machine"));
992 mach_type_specified_p
= 1;
994 demand_empty_rest_of_line ();
998 as_bad (_("invalid identifier for \".option\""));
999 ignore_rest_of_line ();
1003 md_atof (int type
, char *litP
, int *sizeP
)
1005 return ieee_md_atof (type
, litP
, sizeP
, TRUE
);
1008 /* Write a value out to the object file, using the appropriate
1012 md_number_to_chars (char *buf
, valueT val
, int n
)
1014 if (target_big_endian
)
1015 number_to_chars_bigendian (buf
, val
, n
);
1017 number_to_chars_littleendian (buf
, val
, n
);
1020 /* Round up a section size to the appropriate boundary. */
1023 md_section_align (segT segment
, valueT size
)
1025 int align
= bfd_get_section_alignment (stdoutput
, segment
);
1027 return ((size
+ (1 << align
) - 1) & (-1 << align
));
1030 /* We don't have any form of relaxing. */
1033 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
1034 asection
*seg ATTRIBUTE_UNUSED
)
1036 as_fatal (_("relaxation not supported\n"));
1040 /* Convert a machine dependent frag. We never generate these. */
1043 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
1044 asection
*sec ATTRIBUTE_UNUSED
,
1045 fragS
*fragp ATTRIBUTE_UNUSED
)
1051 arc_code_symbol (expressionS
*expressionP
)
1053 if (expressionP
->X_op
== O_symbol
&& expressionP
->X_add_number
== 0)
1057 expressionP
->X_op
= O_right_shift
;
1058 expressionP
->X_add_symbol
->sy_value
.X_op
= O_constant
;
1059 two
.X_op
= O_constant
;
1060 two
.X_add_symbol
= two
.X_op_symbol
= NULL
;
1061 two
.X_add_number
= 2;
1062 expressionP
->X_op_symbol
= make_expr_symbol (&two
);
1064 /* Allow %st(sym1-sym2) */
1065 else if (expressionP
->X_op
== O_subtract
1066 && expressionP
->X_add_symbol
!= NULL
1067 && expressionP
->X_op_symbol
!= NULL
1068 && expressionP
->X_add_number
== 0)
1072 expressionP
->X_add_symbol
= make_expr_symbol (expressionP
);
1073 expressionP
->X_op
= O_right_shift
;
1074 two
.X_op
= O_constant
;
1075 two
.X_add_symbol
= two
.X_op_symbol
= NULL
;
1076 two
.X_add_number
= 2;
1077 expressionP
->X_op_symbol
= make_expr_symbol (&two
);
1080 as_bad (_("expression too complex code symbol"));
1083 /* Parse an operand that is machine-specific.
1085 The ARC has a special %-op to adjust addresses so they're usable in
1086 branches. The "st" is short for the STatus register.
1087 ??? Later expand this to take a flags value too.
1089 ??? We can't create new expression types so we map the %-op's onto the
1090 existing syntax. This means that the user could use the chosen syntax
1091 to achieve the same effect. */
1094 md_operand (expressionS
*expressionP
)
1096 char *p
= input_line_pointer
;
1101 if (strncmp (p
, "%st(", 4) == 0)
1103 input_line_pointer
+= 4;
1104 expression (expressionP
);
1105 if (*input_line_pointer
!= ')')
1107 as_bad (_("missing ')' in %%-op"));
1110 ++input_line_pointer
;
1111 arc_code_symbol (expressionP
);
1115 /* It could be a register. */
1117 struct arc_ext_operand_value
*ext_oper
= arc_ext_operands
;
1122 l
= strlen (ext_oper
->operand
.name
);
1123 if (!strncmp (p
, ext_oper
->operand
.name
, l
) && !ISALNUM (*(p
+ l
)))
1125 input_line_pointer
+= l
+ 1;
1126 expressionP
->X_op
= O_register
;
1127 expressionP
->X_add_number
= (offsetT
) &ext_oper
->operand
;
1130 ext_oper
= ext_oper
->next
;
1132 for (i
= 0; i
< arc_reg_names_count
; i
++)
1134 l
= strlen (arc_reg_names
[i
].name
);
1135 if (!strncmp (p
, arc_reg_names
[i
].name
, l
) && !ISALNUM (*(p
+ l
)))
1137 input_line_pointer
+= l
+ 1;
1138 expressionP
->X_op
= O_register
;
1139 expressionP
->X_add_number
= (offsetT
) &arc_reg_names
[i
];
1146 /* We have no need to default values of symbols.
1147 We could catch register names here, but that is handled by inserting
1148 them all in the symbol table to begin with. */
1151 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
1156 /* Functions concerning expressions. */
1158 /* Parse a .byte, .word, etc. expression.
1160 Values for the status register are specified with %st(label).
1161 `label' will be right shifted by 2. */
1164 arc_parse_cons_expression (expressionS
*exp
,
1165 unsigned int nbytes ATTRIBUTE_UNUSED
)
1167 char *p
= input_line_pointer
;
1168 int code_symbol_fix
= 0;
1170 for (; ! is_end_of_line
[(unsigned char) *p
]; p
++)
1171 if (*p
== '@' && !strncmp (p
, "@h30", 4))
1173 code_symbol_fix
= 1;
1176 expression_and_evaluate (exp
);
1177 if (code_symbol_fix
)
1179 arc_code_symbol (exp
);
1180 input_line_pointer
= p
;
1184 /* Record a fixup for a cons expression. */
1187 arc_cons_fix_new (fragS
*frag
,
1197 /* This may be a special ARC reloc (eg: %st()). */
1198 reloc_type
= get_arc_exp_reloc_type (1, BFD_RELOC_32
, exp
, &exptmp
);
1199 fix_new_exp (frag
, where
, nbytes
, &exptmp
, 0,
1200 (enum bfd_reloc_code_real
) reloc_type
);
1204 fix_new_exp (frag
, where
, nbytes
, exp
, 0,
1205 nbytes
== 2 ? BFD_RELOC_16
1206 : nbytes
== 8 ? BFD_RELOC_64
1211 /* Functions concerning relocs. */
1213 /* The location from which a PC relative jump should be calculated,
1214 given a PC relative reloc. */
1217 md_pcrel_from (fixS
*fixP
)
1219 /* Return the address of the delay slot. */
1220 return fixP
->fx_frag
->fr_address
+ fixP
->fx_where
+ fixP
->fx_size
;
1223 /* Apply a fixup to the object code. This is called for all the
1224 fixups we generated by the call to fix_new_exp, above. In the call
1225 above we used a reloc code which was the largest legal reloc code
1226 plus the operand index. Here we undo that to recover the operand
1227 index. At this point all symbol values should be fully resolved,
1228 and we attempt to completely resolve the reloc. If we can not do
1229 that, we determine the correct reloc code and put it back in the fixup. */
1232 md_apply_fix (fixS
*fixP
, valueT
* valP
, segT seg
)
1234 valueT value
= * valP
;
1236 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
1239 else if (fixP
->fx_pcrel
)
1241 /* Hack around bfd_install_relocation brain damage. */
1242 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
1243 value
+= md_pcrel_from (fixP
);
1246 /* We can't actually support subtracting a symbol. */
1247 if (fixP
->fx_subsy
!= NULL
)
1248 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
1250 if ((int) fixP
->fx_r_type
>= (int) BFD_RELOC_UNUSED
)
1253 const struct arc_operand
*operand
;
1257 opindex
= (int) fixP
->fx_r_type
- (int) BFD_RELOC_UNUSED
;
1259 operand
= &arc_operands
[opindex
];
1261 /* Fetch the instruction, insert the fully resolved operand
1262 value, and stuff the instruction back again. */
1263 where
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1264 if (target_big_endian
)
1265 insn
= bfd_getb32 ((unsigned char *) where
);
1267 insn
= bfd_getl32 ((unsigned char *) where
);
1268 insn
= arc_insert_operand (insn
, operand
, -1, NULL
, (offsetT
) value
,
1269 fixP
->fx_file
, fixP
->fx_line
);
1270 if (target_big_endian
)
1271 bfd_putb32 ((bfd_vma
) insn
, (unsigned char *) where
);
1273 bfd_putl32 ((bfd_vma
) insn
, (unsigned char *) where
);
1276 /* Nothing else to do here. */
1279 /* Determine a BFD reloc value based on the operand information.
1280 We are only prepared to turn a few of the operands into relocs.
1281 !!! Note that we can't handle limm values here. Since we're using
1282 implicit addends the addend must be inserted into the instruction,
1283 however, the opcode insertion routines currently do nothing with
1285 if (operand
->fmt
== 'B')
1287 gas_assert ((operand
->flags
& ARC_OPERAND_RELATIVE_BRANCH
) != 0
1288 && operand
->bits
== 20
1289 && operand
->shift
== 7);
1290 fixP
->fx_r_type
= BFD_RELOC_ARC_B22_PCREL
;
1292 else if (operand
->fmt
== 'J')
1294 gas_assert ((operand
->flags
& ARC_OPERAND_ABSOLUTE_BRANCH
) != 0
1295 && operand
->bits
== 24
1296 && operand
->shift
== 32);
1297 fixP
->fx_r_type
= BFD_RELOC_ARC_B26
;
1299 else if (operand
->fmt
== 'L')
1301 gas_assert ((operand
->flags
& ARC_OPERAND_LIMM
) != 0
1302 && operand
->bits
== 32
1303 && operand
->shift
== 32);
1304 fixP
->fx_r_type
= BFD_RELOC_32
;
1308 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1309 _("unresolved expression that must be resolved"));
1316 switch (fixP
->fx_r_type
)
1319 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
1323 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
1327 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
1330 case BFD_RELOC_ARC_B26
:
1331 /* If !fixP->fx_done then `value' is an implicit addend.
1332 We must shift it right by 2 in this case as well because the
1333 linker performs the relocation and then adds this in (as opposed
1334 to adding this in and then shifting right by 2). */
1336 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
1345 /* Translate internal representation of relocation info to BFD target
1349 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
,
1354 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1355 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
1357 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
1358 reloc
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
1359 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
1360 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
1362 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1363 _("internal error: can't export reloc type %d (`%s')"),
1365 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1369 gas_assert (!fixP
->fx_pcrel
== !reloc
->howto
->pc_relative
);
1371 /* Set addend to account for PC being advanced one insn before the
1372 target address is computed. */
1374 reloc
->addend
= (fixP
->fx_pcrel
? -4 : 0);
1379 const pseudo_typeS md_pseudo_table
[] =
1381 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
1382 { "comm", arc_common
, 0 },
1383 { "common", arc_common
, 0 },
1384 { "lcomm", arc_common
, 1 },
1385 { "lcommon", arc_common
, 1 },
1386 { "2byte", cons
, 2 },
1387 { "half", cons
, 2 },
1388 { "short", cons
, 2 },
1389 { "3byte", cons
, 3 },
1390 { "4byte", cons
, 4 },
1391 { "word", cons
, 4 },
1392 { "option", arc_option
, 0 },
1393 { "cpu", arc_option
, 0 },
1394 { "block", s_space
, 0 },
1395 { "extcondcode", arc_extoper
, 0 },
1396 { "extcoreregister", arc_extoper
, 1 },
1397 { "extauxregister", arc_extoper
, 2 },
1398 { "extinstruction", arc_extinst
, 0 },
1402 /* This routine is called for each instruction to be assembled. */
1405 md_assemble (char *str
)
1407 const struct arc_opcode
*opcode
;
1408 const struct arc_opcode
*std_opcode
;
1409 struct arc_opcode
*ext_opcode
;
1411 const char *last_errmsg
= 0;
1413 static int init_tables_p
= 0;
1415 /* Opcode table initialization is deferred until here because we have to
1416 wait for a possible .option command. */
1419 init_opcode_tables (arc_mach_type
);
1423 /* Skip leading white space. */
1424 while (ISSPACE (*str
))
1427 /* The instructions are stored in lists hashed by the first letter (though
1428 we needn't care how they're hashed). Get the first in the list. */
1430 ext_opcode
= arc_ext_opcodes
;
1431 std_opcode
= arc_opcode_lookup_asm (str
);
1433 /* Keep looking until we find a match. */
1435 for (opcode
= (ext_opcode
? ext_opcode
: std_opcode
);
1437 opcode
= (ARC_OPCODE_NEXT_ASM (opcode
)
1438 ? ARC_OPCODE_NEXT_ASM (opcode
)
1439 : (ext_opcode
? ext_opcode
= NULL
, std_opcode
: NULL
)))
1441 int past_opcode_p
, fc
, num_suffixes
;
1444 struct arc_fixup fixups
[MAX_FIXUPS
];
1445 /* Used as a sanity check. If we need a limm reloc, make sure we ask
1446 for an extra 4 bytes from frag_more. */
1449 const struct arc_operand_value
*insn_suffixes
[MAX_SUFFIXES
];
1451 /* Is this opcode supported by the selected cpu? */
1452 if (! arc_opcode_supported (opcode
))
1455 /* Scan the syntax string. If it doesn't match, try the next one. */
1456 arc_opcode_init_insert ();
1457 insn
= opcode
->value
;
1464 /* We don't check for (*str != '\0') here because we want to parse
1465 any trailing fake arguments in the syntax string. */
1466 for (str
= start
, syn
= opcode
->syntax
; *syn
!= '\0';)
1469 const struct arc_operand
*operand
;
1471 /* Non operand chars must match exactly. */
1472 if (*syn
!= '%' || *++syn
== '%')
1486 /* We have an operand. Pick out any modifiers. */
1488 while (ARC_MOD_P (arc_operands
[arc_operand_map
[(int) *syn
]].flags
))
1490 mods
|= arc_operands
[arc_operand_map
[(int) *syn
]].flags
& ARC_MOD_BITS
;
1493 operand
= arc_operands
+ arc_operand_map
[(int) *syn
];
1494 if (operand
->fmt
== 0)
1495 as_fatal (_("unknown syntax format character `%c'"), *syn
);
1497 if (operand
->flags
& ARC_OPERAND_FAKE
)
1499 const char *errmsg
= NULL
;
1500 if (operand
->insert
)
1502 insn
= (*operand
->insert
) (insn
, operand
, mods
, NULL
, 0, &errmsg
);
1503 if (errmsg
!= (const char *) NULL
)
1505 last_errmsg
= errmsg
;
1506 if (operand
->flags
& ARC_OPERAND_ERROR
)
1508 as_bad ("%s", errmsg
);
1511 else if (operand
->flags
& ARC_OPERAND_WARN
)
1512 as_warn ("%s", errmsg
);
1516 && (operand
->flags
&& operand
->flags
& ARC_OPERAND_LIMM
)
1517 && (operand
->flags
&
1518 (ARC_OPERAND_ABSOLUTE_BRANCH
| ARC_OPERAND_ADDRESS
)))
1520 fixups
[fix_up_at
].opindex
= arc_operand_map
[operand
->fmt
];
1525 /* Are we finished with suffixes? */
1526 else if (!past_opcode_p
)
1531 const struct arc_operand_value
*suf
, *suffix_end
;
1532 const struct arc_operand_value
*suffix
= NULL
;
1534 if (!(operand
->flags
& ARC_OPERAND_SUFFIX
))
1537 /* If we're at a space in the input string, we want to skip the
1538 remaining suffixes. There may be some fake ones though, so
1539 just go on to try the next one. */
1547 if (mods
& ARC_MOD_DOT
)
1555 /* This can happen in "b.nd foo" and we're currently looking
1556 for "%q" (ie: a condition code suffix). */
1564 /* Pick the suffix out and look it up via the hash table. */
1565 for (t
= s
; *t
&& ISALNUM (*t
); ++t
)
1569 if ((suf
= get_ext_suffix (s
)))
1572 suf
= (const struct arc_operand_value
*)
1573 hash_find (arc_suffix_hash
, s
);
1576 /* This can happen in "blle foo" and we're currently using
1577 the template "b%q%.n %j". The "bl" insn occurs later in
1578 the table so "lle" isn't an illegal suffix. */
1583 /* Is it the right type? Note that the same character is used
1584 several times, so we have to examine all of them. This is
1585 relatively efficient as equivalent entries are kept
1586 together. If it's not the right type, don't increment `str'
1587 so we try the next one in the series. */
1589 if (ext_suffix_p
&& arc_operands
[suf
->type
].fmt
== *syn
)
1591 /* Insert the suffix's value into the insn. */
1593 if (operand
->insert
)
1594 insn
= (*operand
->insert
) (insn
, operand
,
1595 mods
, NULL
, suf
->value
,
1598 insn
|= suf
->value
<< operand
->shift
;
1606 suffix_end
= arc_suffixes
+ arc_suffixes_count
;
1608 suffix
< suffix_end
&& strcmp (suffix
->name
, suf
->name
) == 0;
1611 if (arc_operands
[suffix
->type
].fmt
== *syn
)
1613 /* Insert the suffix's value into the insn. */
1614 if (operand
->insert
)
1615 insn
= (*operand
->insert
) (insn
, operand
,
1616 mods
, NULL
, suffix
->value
,
1619 insn
|= suffix
->value
<< operand
->shift
;
1629 /* Wrong type. Just go on to try next insn entry. */
1633 if (num_suffixes
== MAX_SUFFIXES
)
1634 as_bad (_("too many suffixes"));
1636 insn_suffixes
[num_suffixes
++] = suffix
;
1640 /* This is either a register or an expression of some kind. */
1643 const struct arc_operand_value
*reg
= NULL
;
1647 if (operand
->flags
& ARC_OPERAND_SUFFIX
)
1650 /* Is there anything left to parse?
1651 We don't check for this at the top because we want to parse
1652 any trailing fake arguments in the syntax string. */
1653 if (is_end_of_line
[(unsigned char) *str
])
1656 /* Parse the operand. */
1657 hold
= input_line_pointer
;
1658 input_line_pointer
= str
;
1660 str
= input_line_pointer
;
1661 input_line_pointer
= hold
;
1663 if (exp
.X_op
== O_illegal
)
1664 as_bad (_("illegal operand"));
1665 else if (exp
.X_op
== O_absent
)
1666 as_bad (_("missing operand"));
1667 else if (exp
.X_op
== O_constant
)
1668 value
= exp
.X_add_number
;
1669 else if (exp
.X_op
== O_register
)
1670 reg
= (struct arc_operand_value
*) exp
.X_add_number
;
1671 #define IS_REG_DEST_OPERAND(o) ((o) == 'a')
1672 else if (IS_REG_DEST_OPERAND (*syn
))
1673 as_bad (_("symbol as destination register"));
1676 if (!strncmp (str
, "@h30", 4))
1678 arc_code_symbol (&exp
);
1681 /* We need to generate a fixup for this expression. */
1682 if (fc
>= MAX_FIXUPS
)
1683 as_fatal (_("too many fixups"));
1684 fixups
[fc
].exp
= exp
;
1685 /* We don't support shimm relocs. break here to force
1686 the assembler to output a limm. */
1687 #define IS_REG_SHIMM_OFFSET(o) ((o) == 'd')
1688 if (IS_REG_SHIMM_OFFSET (*syn
))
1690 /* If this is a register constant (IE: one whose
1691 register value gets stored as 61-63) then this
1693 /* ??? This bit could use some cleaning up.
1694 Referencing the format chars like this goes
1696 if (IS_SYMBOL_OPERAND (*syn
))
1700 /* Save this, we don't yet know what reloc to use. */
1702 /* Tell insert_reg we need a limm. This is
1703 needed because the value at this point is
1705 /* ??? We need a cleaner interface than this. */
1706 (*arc_operands
[arc_operand_map
['Q']].insert
)
1707 (insn
, operand
, mods
, reg
, 0L, &junk
);
1710 fixups
[fc
].opindex
= arc_operand_map
[(int) *syn
];
1715 /* Insert the register or expression into the instruction. */
1716 if (operand
->insert
)
1718 const char *errmsg
= NULL
;
1719 insn
= (*operand
->insert
) (insn
, operand
, mods
,
1720 reg
, (long) value
, &errmsg
);
1721 if (errmsg
!= (const char *) NULL
)
1723 last_errmsg
= errmsg
;
1724 if (operand
->flags
& ARC_OPERAND_ERROR
)
1726 as_bad ("%s", errmsg
);
1729 else if (operand
->flags
& ARC_OPERAND_WARN
)
1730 as_warn ("%s", errmsg
);
1735 insn
|= (value
& ((1 << operand
->bits
) - 1)) << operand
->shift
;
1741 /* If we're at the end of the syntax string, we're done. */
1742 /* FIXME: try to move this to a separate function. */
1749 /* For the moment we assume a valid `str' can only contain blanks
1750 now. IE: We needn't try again with a longer version of the
1751 insn and it is assumed that longer versions of insns appear
1752 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
1754 while (ISSPACE (*str
))
1757 if (!is_end_of_line
[(unsigned char) *str
])
1758 as_bad (_("junk at end of line: `%s'"), str
);
1760 /* Is there a limm value? */
1761 limm_p
= arc_opcode_limm_p (&limm
);
1763 /* Perform various error and warning tests. */
1766 static int in_delay_slot_p
= 0;
1767 static int prev_insn_needs_cc_nop_p
= 0;
1768 /* delay slot type seen */
1769 int delay_slot_type
= ARC_DELAY_NONE
;
1770 /* conditional execution flag seen */
1771 int conditional
= 0;
1772 /* 1 if condition codes are being set */
1774 /* 1 if conditional branch, including `b' "branch always" */
1775 int cond_branch_p
= opcode
->flags
& ARC_OPCODE_COND_BRANCH
;
1777 for (i
= 0; i
< num_suffixes
; ++i
)
1779 switch (arc_operands
[insn_suffixes
[i
]->type
].fmt
)
1782 delay_slot_type
= insn_suffixes
[i
]->value
;
1785 conditional
= insn_suffixes
[i
]->value
;
1793 /* Putting an insn with a limm value in a delay slot is supposed to
1794 be legal, but let's warn the user anyway. Ditto for 8 byte
1795 jumps with delay slots. */
1796 if (in_delay_slot_p
&& limm_p
)
1797 as_warn (_("8 byte instruction in delay slot"));
1798 if (delay_slot_type
!= ARC_DELAY_NONE
1799 && limm_p
&& arc_insn_not_jl (insn
)) /* except for jl addr */
1800 as_warn (_("8 byte jump instruction with delay slot"));
1801 in_delay_slot_p
= (delay_slot_type
!= ARC_DELAY_NONE
) && !limm_p
;
1803 /* Warn when a conditional branch immediately follows a set of
1804 the condition codes. Note that this needn't be done if the
1805 insn that sets the condition codes uses a limm. */
1806 if (cond_branch_p
&& conditional
!= 0 /* 0 = "always" */
1807 && prev_insn_needs_cc_nop_p
&& arc_mach_type
== bfd_mach_arc_5
)
1808 as_warn (_("conditional branch follows set of flags"));
1809 prev_insn_needs_cc_nop_p
=
1810 /* FIXME: ??? not required:
1811 (delay_slot_type != ARC_DELAY_NONE) && */
1812 cc_set_p
&& !limm_p
;
1815 /* Write out the instruction.
1816 It is important to fetch enough space in one call to `frag_more'.
1817 We use (f - frag_now->fr_literal) to compute where we are and we
1818 don't want frag_now to change between calls. */
1822 md_number_to_chars (f
, insn
, 4);
1823 md_number_to_chars (f
+ 4, limm
, 4);
1824 dwarf2_emit_insn (8);
1826 else if (limm_reloc_p
)
1827 /* We need a limm reloc, but the tables think we don't. */
1832 md_number_to_chars (f
, insn
, 4);
1833 dwarf2_emit_insn (4);
1836 /* Create any fixups. */
1837 for (i
= 0; i
< fc
; ++i
)
1839 int op_type
, reloc_type
;
1841 const struct arc_operand
*operand
;
1843 /* Create a fixup for this operand.
1844 At this point we do not use a bfd_reloc_code_real_type for
1845 operands residing in the insn, but instead just use the
1846 operand index. This lets us easily handle fixups for any
1847 operand type, although that is admittedly not a very exciting
1848 feature. We pick a BFD reloc type in md_apply_fix.
1850 Limm values (4 byte immediate "constants") must be treated
1851 normally because they're not part of the actual insn word
1852 and thus the insertion routines don't handle them. */
1854 if (arc_operands
[fixups
[i
].opindex
].flags
& ARC_OPERAND_LIMM
)
1856 /* Modify the fixup addend as required by the cpu. */
1857 fixups
[i
].exp
.X_add_number
+= arc_limm_fixup_adjust (insn
);
1858 op_type
= fixups
[i
].opindex
;
1859 /* FIXME: can we add this data to the operand table? */
1860 if (op_type
== arc_operand_map
['L']
1861 || op_type
== arc_operand_map
['s']
1862 || op_type
== arc_operand_map
['o']
1863 || op_type
== arc_operand_map
['O'])
1864 reloc_type
= BFD_RELOC_32
;
1865 else if (op_type
== arc_operand_map
['J'])
1866 reloc_type
= BFD_RELOC_ARC_B26
;
1869 reloc_type
= get_arc_exp_reloc_type (1, reloc_type
,
1875 op_type
= get_arc_exp_reloc_type (0, fixups
[i
].opindex
,
1876 &fixups
[i
].exp
, &exptmp
);
1877 reloc_type
= op_type
+ (int) BFD_RELOC_UNUSED
;
1879 operand
= &arc_operands
[op_type
];
1880 fix_new_exp (frag_now
,
1881 ((f
- frag_now
->fr_literal
)
1882 + (operand
->flags
& ARC_OPERAND_LIMM
? 4 : 0)), 4,
1884 (operand
->flags
& ARC_OPERAND_RELATIVE_BRANCH
) != 0,
1885 (bfd_reloc_code_real_type
) reloc_type
);
1891 if (NULL
== last_errmsg
)
1892 as_bad (_("bad instruction `%s'"), start
);
1894 as_bad ("%s", last_errmsg
);