1 /* tc-arc.c -- Assembler for the ARC
2 Copyright (C) 1994-2015 Free Software Foundation, Inc.
4 Contributor: Claudiu Zissulescu <claziss@synopsys.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
25 #include "struc-symbol.h"
26 #include "dwarf2dbg.h"
27 #include "safe-ctype.h"
29 #include "opcode/arc.h"
32 /* Defines section. */
34 #define MAX_FLAG_NAME_LENGHT 3
35 #define MAX_INSN_FIXUPS 2
36 #define MAX_CONSTR_STR 20
39 # define pr_debug(fmt, args...) fprintf (stderr, fmt, ##args)
41 # define pr_debug(fmt, args...)
44 #define MAJOR_OPCODE(x) (((x) & 0xF8000000) >> 27)
45 #define SUB_OPCODE(x) (((x) & 0x003F0000) >> 16)
46 #define LP_INSN(x) ((MAJOR_OPCODE (x) == 0x4) && \
47 (SUB_OPCODE (x) == 0x28))
49 /* Equal to MAX_PRECISION in atof-ieee.c. */
50 #define MAX_LITTLENUMS 6
54 #define regno(x) ((x) & 0x3F)
55 #define is_ir_num(x) (((x) & ~0x3F) == 0)
56 #define is_code_density_p(op) (((op)->subclass == CD1 || (op)->subclass == CD2))
57 #define is_br_jmp_insn_p(op) (((op)->class == BRANCH || (op)->class == JUMP))
58 #define is_kernel_insn_p(op) (((op)->class == KERNEL))
60 /* Generic assembler global variables which must be defined by all
63 /* Characters which always start a comment. */
64 const char comment_chars
[] = "#;";
66 /* Characters which start a comment at the beginning of a line. */
67 const char line_comment_chars
[] = "#";
69 /* Characters which may be used to separate multiple commands on a
71 const char line_separator_chars
[] = "`";
73 /* Characters which are used to indicate an exponent in a floating
75 const char EXP_CHARS
[] = "eE";
77 /* Chars that mean this number is a floating point constant
78 As in 0f12.456 or 0d1.2345e12. */
79 const char FLT_CHARS
[] = "rRsSfFdD";
82 extern int target_big_endian
;
83 const char *arc_target_format
= DEFAULT_TARGET_FORMAT
;
84 static int byte_order
= DEFAULT_BYTE_ORDER
;
86 extern int arc_get_mach (char *);
88 /* Forward declaration. */
89 static void arc_lcomm (int);
90 static void arc_option (int);
91 static void arc_extra_reloc (int);
93 const pseudo_typeS md_pseudo_table
[] =
95 /* Make sure that .word is 32 bits. */
98 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
99 { "lcomm", arc_lcomm
, 0 },
100 { "lcommon", arc_lcomm
, 0 },
101 { "cpu", arc_option
, 0 },
103 { "tls_gd_ld", arc_extra_reloc
, BFD_RELOC_ARC_TLS_GD_LD
},
104 { "tls_gd_call", arc_extra_reloc
, BFD_RELOC_ARC_TLS_GD_CALL
},
109 const char *md_shortopts
= "";
113 OPTION_EB
= OPTION_MD_BASE
,
125 /* The following options are deprecated and provided here only for
126 compatibility reasons. */
152 struct option md_longopts
[] =
154 { "EB", no_argument
, NULL
, OPTION_EB
},
155 { "EL", no_argument
, NULL
, OPTION_EL
},
156 { "mcpu", required_argument
, NULL
, OPTION_MCPU
},
157 { "mA6", no_argument
, NULL
, OPTION_ARC600
},
158 { "mARC600", no_argument
, NULL
, OPTION_ARC600
},
159 { "mARC601", no_argument
, NULL
, OPTION_ARC601
},
160 { "mARC700", no_argument
, NULL
, OPTION_ARC700
},
161 { "mA7", no_argument
, NULL
, OPTION_ARC700
},
162 { "mEM", no_argument
, NULL
, OPTION_ARCEM
},
163 { "mHS", no_argument
, NULL
, OPTION_ARCHS
},
164 { "mcode-density", no_argument
, NULL
, OPTION_CD
},
166 /* The following options are deprecated and provided here only for
167 compatibility reasons. */
168 { "mav2em", no_argument
, NULL
, OPTION_ARCEM
},
169 { "mav2hs", no_argument
, NULL
, OPTION_ARCHS
},
170 { "muser-mode-only", no_argument
, NULL
, OPTION_USER_MODE
},
171 { "mld-extension-reg-mask", required_argument
, NULL
, OPTION_LD_EXT_MASK
},
172 { "mswap", no_argument
, NULL
, OPTION_SWAP
},
173 { "mnorm", no_argument
, NULL
, OPTION_NORM
},
174 { "mbarrel-shifter", no_argument
, NULL
, OPTION_BARREL_SHIFT
},
175 { "mbarrel_shifter", no_argument
, NULL
, OPTION_BARREL_SHIFT
},
176 { "mmin-max", no_argument
, NULL
, OPTION_MIN_MAX
},
177 { "mmin_max", no_argument
, NULL
, OPTION_MIN_MAX
},
178 { "mno-mpy", no_argument
, NULL
, OPTION_NO_MPY
},
179 { "mea", no_argument
, NULL
, OPTION_EA
},
180 { "mEA", no_argument
, NULL
, OPTION_EA
},
181 { "mmul64", no_argument
, NULL
, OPTION_MUL64
},
182 { "msimd", no_argument
, NULL
, OPTION_SIMD
},
183 { "mspfp", no_argument
, NULL
, OPTION_SPFP
},
184 { "mspfp-compact", no_argument
, NULL
, OPTION_SPFP
},
185 { "mspfp_compact", no_argument
, NULL
, OPTION_SPFP
},
186 { "mspfp-fast", no_argument
, NULL
, OPTION_SPFP
},
187 { "mspfp_fast", no_argument
, NULL
, OPTION_SPFP
},
188 { "mdpfp", no_argument
, NULL
, OPTION_DPFP
},
189 { "mdpfp-compact", no_argument
, NULL
, OPTION_DPFP
},
190 { "mdpfp_compact", no_argument
, NULL
, OPTION_DPFP
},
191 { "mdpfp-fast", no_argument
, NULL
, OPTION_DPFP
},
192 { "mdpfp_fast", no_argument
, NULL
, OPTION_DPFP
},
193 { "mmac-d16", no_argument
, NULL
, OPTION_XMAC_D16
},
194 { "mmac_d16", no_argument
, NULL
, OPTION_XMAC_D16
},
195 { "mmac-24", no_argument
, NULL
, OPTION_XMAC_24
},
196 { "mmac_24", no_argument
, NULL
, OPTION_XMAC_24
},
197 { "mdsp-packa", no_argument
, NULL
, OPTION_DSP_PACKA
},
198 { "mdsp_packa", no_argument
, NULL
, OPTION_DSP_PACKA
},
199 { "mcrc", no_argument
, NULL
, OPTION_CRC
},
200 { "mdvbf", no_argument
, NULL
, OPTION_DVBF
},
201 { "mtelephony", no_argument
, NULL
, OPTION_TELEPHONY
},
202 { "mxy", no_argument
, NULL
, OPTION_XYMEMORY
},
203 { "mlock", no_argument
, NULL
, OPTION_LOCK
},
204 { "mswape", no_argument
, NULL
, OPTION_SWAPE
},
205 { "mrtsc", no_argument
, NULL
, OPTION_RTSC
},
206 { "mfpuda", no_argument
, NULL
, OPTION_FPUDA
},
208 { NULL
, no_argument
, NULL
, 0 }
211 size_t md_longopts_size
= sizeof (md_longopts
);
213 /* Local data and data types. */
215 /* Used since new relocation types are introduced in this
216 file (DUMMY_RELOC_LITUSE_*). */
217 typedef int extended_bfd_reloc_code_real_type
;
223 extended_bfd_reloc_code_real_type reloc
;
225 /* index into arc_operands. */
226 unsigned int opindex
;
228 /* PC-relative, used by internals fixups. */
231 /* TRUE if this fixup is for LIMM operand. */
239 struct arc_fixup fixups
[MAX_INSN_FIXUPS
];
241 bfd_boolean short_insn
; /* Boolean value: TRUE if current insn is
243 bfd_boolean has_limm
; /* Boolean value: TRUE if limm field is
247 /* Structure to hold any last two instructions. */
248 static struct arc_last_insn
250 /* Saved instruction opcode. */
251 const struct arc_opcode
*opcode
;
253 /* Boolean value: TRUE if current insn is short. */
254 bfd_boolean has_limm
;
256 /* Boolean value: TRUE if current insn has delay slot. */
257 bfd_boolean has_delay_slot
;
260 /* The cpu for which we are generating code. */
261 static unsigned arc_target
= ARC_OPCODE_BASE
;
262 static const char *arc_target_name
= "<all>";
263 static unsigned arc_features
= 0x00;
265 /* The default architecture. */
266 static int arc_mach_type
= bfd_mach_arc_arcv2
;
268 /* Non-zero if the cpu type has been explicitly specified. */
269 static int mach_type_specified_p
= 0;
271 /* The hash table of instruction opcodes. */
272 static struct hash_control
*arc_opcode_hash
;
274 /* The hash table of register symbols. */
275 static struct hash_control
*arc_reg_hash
;
277 /* A table of CPU names and opcode sets. */
278 static const struct cpu_type
288 { "arc600", ARC_OPCODE_ARC600
, bfd_mach_arc_arc600
,
289 E_ARC_MACH_ARC600
, 0x00},
290 { "arc700", ARC_OPCODE_ARC700
, bfd_mach_arc_arc700
,
291 E_ARC_MACH_ARC700
, 0x00},
292 { "arcem", ARC_OPCODE_ARCv2EM
, bfd_mach_arc_arcv2
,
293 EF_ARC_CPU_ARCV2EM
, 0x00},
294 { "archs", ARC_OPCODE_ARCv2HS
, bfd_mach_arc_arcv2
,
295 EF_ARC_CPU_ARCV2HS
, ARC_CD
},
296 { "all", ARC_OPCODE_BASE
, bfd_mach_arc_arcv2
,
303 /* Name of the parsed flag. */
304 char name
[MAX_FLAG_NAME_LENGHT
+1];
306 /* The code of the parsed flag. Valid when is not zero. */
310 /* Used by the arc_reloc_op table. Order is important. */
311 #define O_gotoff O_md1 /* @gotoff relocation. */
312 #define O_gotpc O_md2 /* @gotpc relocation. */
313 #define O_plt O_md3 /* @plt relocation. */
314 #define O_sda O_md4 /* @sda relocation. */
315 #define O_pcl O_md5 /* @pcl relocation. */
316 #define O_tlsgd O_md6 /* @tlsgd relocation. */
317 #define O_tlsie O_md7 /* @tlsie relocation. */
318 #define O_tpoff9 O_md8 /* @tpoff9 relocation. */
319 #define O_tpoff O_md9 /* @tpoff relocation. */
320 #define O_dtpoff9 O_md10 /* @dtpoff9 relocation. */
321 #define O_dtpoff O_md11 /* @dtpoff relocation. */
322 #define O_last O_dtpoff
324 /* Used to define a bracket as operand in tokens. */
325 #define O_bracket O_md32
327 /* Dummy relocation, to be sorted out. */
328 #define DUMMY_RELOC_ARC_ENTRY (BFD_RELOC_UNUSED + 1)
330 #define USER_RELOC_P(R) ((R) >= O_gotoff && (R) <= O_last)
332 /* A table to map the spelling of a relocation operand into an appropriate
333 bfd_reloc_code_real_type type. The table is assumed to be ordered such
334 that op-O_literal indexes into it. */
335 #define ARC_RELOC_TABLE(op) \
336 (&arc_reloc_op[ ((!USER_RELOC_P (op)) \
338 : (int) (op) - (int) O_gotoff) ])
340 #define DEF(NAME, RELOC, REQ) \
341 { #NAME, sizeof (#NAME)-1, O_##NAME, RELOC, REQ}
343 static const struct arc_reloc_op_tag
345 /* String to lookup. */
347 /* Size of the string. */
349 /* Which operator to use. */
351 extended_bfd_reloc_code_real_type reloc
;
352 /* Allows complex relocation expression like identifier@reloc +
354 unsigned int complex_expr
: 1;
358 DEF (gotoff
, BFD_RELOC_ARC_GOTOFF
, 1),
359 DEF (gotpc
, BFD_RELOC_ARC_GOTPC32
, 0),
360 DEF (plt
, BFD_RELOC_ARC_PLT32
, 0),
361 DEF (sda
, DUMMY_RELOC_ARC_ENTRY
, 1),
362 DEF (pcl
, BFD_RELOC_ARC_PC32
, 1),
363 DEF (tlsgd
, BFD_RELOC_ARC_TLS_GD_GOT
, 0),
364 DEF (tlsie
, BFD_RELOC_ARC_TLS_IE_GOT
, 0),
365 DEF (tpoff9
, BFD_RELOC_ARC_TLS_LE_S9
, 0),
366 DEF (tpoff
, BFD_RELOC_ARC_TLS_LE_32
, 0),
367 DEF (dtpoff9
, BFD_RELOC_ARC_TLS_DTPOFF_S9
, 0),
368 DEF (dtpoff
, BFD_RELOC_ARC_TLS_DTPOFF
, 0),
371 static const int arc_num_reloc_op
372 = sizeof (arc_reloc_op
) / sizeof (*arc_reloc_op
);
374 /* Flags to set in the elf header. */
375 static flagword arc_eflag
= 0x00;
377 /* Pre-defined "_GLOBAL_OFFSET_TABLE_". */
378 symbolS
* GOT_symbol
= 0;
380 /* Set to TRUE when we assemble instructions. */
381 static bfd_boolean assembling_insn
= FALSE
;
383 /* Functions declaration. */
385 static void assemble_tokens (const char *, expressionS
*, int,
386 struct arc_flags
*, int);
387 static const struct arc_opcode
*find_opcode_match (const struct arc_opcode
*,
388 expressionS
*, int *,
391 static void assemble_insn (const struct arc_opcode
*, const expressionS
*,
392 int, const struct arc_flags
*, int,
394 static void emit_insn (struct arc_insn
*);
395 static unsigned insert_operand (unsigned, const struct arc_operand
*,
396 offsetT
, char *, unsigned);
397 static const struct arc_opcode
*find_special_case_flag (const char *,
400 static const struct arc_opcode
*find_special_case (const char *,
403 expressionS
*, int *);
404 static const struct arc_opcode
*find_special_case_pseudo (const char *,
410 /* Functions implementation. */
412 /* Like md_number_to_chars but used for limms. The 4-byte limm value,
413 is encoded as 'middle-endian' for a little-endian target. FIXME!
414 this function is used for regular 4 byte instructions as well. */
417 md_number_to_chars_midend (char *buf
, valueT val
, int n
)
421 md_number_to_chars (buf
, (val
& 0xffff0000) >> 16, 2);
422 md_number_to_chars (buf
+ 2, (val
& 0xffff), 2);
426 md_number_to_chars (buf
, val
, n
);
430 /* Here ends all the ARCompact extension instruction assembling
434 arc_extra_reloc (int r_type
)
437 symbolS
*sym
, *lab
= NULL
;
439 if (*input_line_pointer
== '@')
440 input_line_pointer
++;
441 c
= get_symbol_name (&sym_name
);
442 sym
= symbol_find_or_make (sym_name
);
443 restore_line_pointer (c
);
444 if (c
== ',' && r_type
== BFD_RELOC_ARC_TLS_GD_LD
)
446 ++input_line_pointer
;
448 c
= get_symbol_name (&lab_name
);
449 lab
= symbol_find_or_make (lab_name
);
450 restore_line_pointer (c
);
453 = fix_new (frag_now
, /* Which frag? */
454 frag_now_fix (), /* Where in that frag? */
455 2, /* size: 1, 2, or 4 usually. */
456 sym
, /* X_add_symbol. */
457 0, /* X_add_number. */
458 FALSE
, /* TRUE if PC-relative relocation. */
459 r_type
/* Relocation type. */);
460 fixP
->fx_subsy
= lab
;
464 arc_lcomm_internal (int ignore ATTRIBUTE_UNUSED
,
465 symbolS
*symbolP
, addressT size
)
470 if (*input_line_pointer
== ',')
472 align
= parse_align (1);
474 if (align
== (addressT
) -1)
489 bss_alloc (symbolP
, size
, align
);
490 S_CLEAR_EXTERNAL (symbolP
);
496 arc_lcomm (int ignore
)
498 symbolS
*symbolP
= s_comm_internal (ignore
, arc_lcomm_internal
);
501 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
504 /* Select the cpu we're assembling for. */
507 arc_option (int ignore ATTRIBUTE_UNUSED
)
513 c
= get_symbol_name (&cpu
);
514 mach
= arc_get_mach (cpu
);
515 restore_line_pointer (c
);
520 if (!mach_type_specified_p
)
522 arc_mach_type
= mach
;
523 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_arc
, mach
))
524 as_fatal ("could not set architecture and machine");
526 mach_type_specified_p
= 1;
529 if (arc_mach_type
!= mach
)
530 as_warn ("Command-line value overrides \".cpu\" directive");
532 demand_empty_rest_of_line ();
537 as_bad ("invalid identifier for \".cpu\"");
538 ignore_rest_of_line ();
541 /* Smartly print an expression. */
544 debug_exp (expressionS
*t
)
546 const char *name ATTRIBUTE_UNUSED
;
547 const char *namemd ATTRIBUTE_UNUSED
;
549 pr_debug ("debug_exp: ");
553 default: name
= "unknown"; break;
554 case O_illegal
: name
= "O_illegal"; break;
555 case O_absent
: name
= "O_absent"; break;
556 case O_constant
: name
= "O_constant"; break;
557 case O_symbol
: name
= "O_symbol"; break;
558 case O_symbol_rva
: name
= "O_symbol_rva"; break;
559 case O_register
: name
= "O_register"; break;
560 case O_big
: name
= "O_big"; break;
561 case O_uminus
: name
= "O_uminus"; break;
562 case O_bit_not
: name
= "O_bit_not"; break;
563 case O_logical_not
: name
= "O_logical_not"; break;
564 case O_multiply
: name
= "O_multiply"; break;
565 case O_divide
: name
= "O_divide"; break;
566 case O_modulus
: name
= "O_modulus"; break;
567 case O_left_shift
: name
= "O_left_shift"; break;
568 case O_right_shift
: name
= "O_right_shift"; break;
569 case O_bit_inclusive_or
: name
= "O_bit_inclusive_or"; break;
570 case O_bit_or_not
: name
= "O_bit_or_not"; break;
571 case O_bit_exclusive_or
: name
= "O_bit_exclusive_or"; break;
572 case O_bit_and
: name
= "O_bit_and"; break;
573 case O_add
: name
= "O_add"; break;
574 case O_subtract
: name
= "O_subtract"; break;
575 case O_eq
: name
= "O_eq"; break;
576 case O_ne
: name
= "O_ne"; break;
577 case O_lt
: name
= "O_lt"; break;
578 case O_le
: name
= "O_le"; break;
579 case O_ge
: name
= "O_ge"; break;
580 case O_gt
: name
= "O_gt"; break;
581 case O_logical_and
: name
= "O_logical_and"; break;
582 case O_logical_or
: name
= "O_logical_or"; break;
583 case O_index
: name
= "O_index"; break;
584 case O_bracket
: name
= "O_bracket"; break;
589 default: namemd
= "unknown"; break;
590 case O_gotoff
: namemd
= "O_gotoff"; break;
591 case O_gotpc
: namemd
= "O_gotpc"; break;
592 case O_plt
: namemd
= "O_plt"; break;
593 case O_sda
: namemd
= "O_sda"; break;
594 case O_pcl
: namemd
= "O_pcl"; break;
595 case O_tlsgd
: namemd
= "O_tlsgd"; break;
596 case O_tlsie
: namemd
= "O_tlsie"; break;
597 case O_tpoff9
: namemd
= "O_tpoff9"; break;
598 case O_tpoff
: namemd
= "O_tpoff"; break;
599 case O_dtpoff9
: namemd
= "O_dtpoff9"; break;
600 case O_dtpoff
: namemd
= "O_dtpoff"; break;
603 pr_debug ("%s (%s, %s, %d, %s)", name
,
604 (t
->X_add_symbol
) ? S_GET_NAME (t
->X_add_symbol
) : "--",
605 (t
->X_op_symbol
) ? S_GET_NAME (t
->X_op_symbol
) : "--",
606 (int) t
->X_add_number
,
607 (t
->X_md
) ? namemd
: "--");
612 /* Parse the arguments to an opcode. */
615 tokenize_arguments (char *str
,
619 char *old_input_line_pointer
;
620 bfd_boolean saw_comma
= FALSE
;
621 bfd_boolean saw_arg
= FALSE
;
626 const struct arc_reloc_op_tag
*r
;
630 memset (tok
, 0, sizeof (*tok
) * ntok
);
632 /* Save and restore input_line_pointer around this function. */
633 old_input_line_pointer
= input_line_pointer
;
634 input_line_pointer
= str
;
636 while (*input_line_pointer
)
639 switch (*input_line_pointer
)
645 input_line_pointer
++;
646 if (saw_comma
|| !saw_arg
)
653 ++input_line_pointer
;
657 tok
->X_op
= O_bracket
;
664 input_line_pointer
++;
668 tok
->X_op
= O_bracket
;
674 /* We have labels, function names and relocations, all
675 starting with @ symbol. Sort them out. */
676 if (saw_arg
&& !saw_comma
)
680 tok
->X_op
= O_symbol
;
681 tok
->X_md
= O_absent
;
683 if (*input_line_pointer
!= '@')
684 goto normalsymbol
; /* This is not a relocation. */
688 /* A relocation opernad has the following form
689 @identifier@relocation_type. The identifier is already
691 if (tok
->X_op
!= O_symbol
)
693 as_bad (_("No valid label relocation operand"));
697 /* Parse @relocation_type. */
698 input_line_pointer
++;
699 c
= get_symbol_name (&reloc_name
);
700 len
= input_line_pointer
- reloc_name
;
703 as_bad (_("No relocation operand"));
707 /* Go through known relocation and try to find a match. */
708 r
= &arc_reloc_op
[0];
709 for (i
= arc_num_reloc_op
- 1; i
>= 0; i
--, r
++)
711 && memcmp (reloc_name
, r
->name
, len
) == 0)
715 as_bad (_("Unknown relocation operand: @%s"), reloc_name
);
719 *input_line_pointer
= c
;
720 SKIP_WHITESPACE_AFTER_NAME ();
721 /* Extra check for TLS: base. */
722 if (*input_line_pointer
== '@')
725 if (tok
->X_op_symbol
!= NULL
726 || tok
->X_op
!= O_symbol
)
728 as_bad (_("Unable to parse TLS base: %s"),
732 input_line_pointer
++;
734 c
= get_symbol_name (&sym_name
);
735 base
= symbol_find_or_make (sym_name
);
736 tok
->X_op
= O_subtract
;
737 tok
->X_op_symbol
= base
;
738 restore_line_pointer (c
);
739 tmpE
.X_add_number
= 0;
741 else if ((*input_line_pointer
!= '+')
742 && (*input_line_pointer
!= '-'))
744 tmpE
.X_add_number
= 0;
748 /* Parse the constant of a complex relocation expression
749 like @identifier@reloc +/- const. */
750 if (! r
->complex_expr
)
752 as_bad (_("@%s is not a complex relocation."), r
->name
);
756 if (tmpE
.X_op
!= O_constant
)
758 as_bad (_("Bad expression: @%s + %s."),
759 r
->name
, input_line_pointer
);
765 tok
->X_add_number
= tmpE
.X_add_number
;
776 /* Can be a register. */
777 ++input_line_pointer
;
781 if (saw_arg
&& !saw_comma
)
784 tok
->X_op
= O_absent
;
785 tok
->X_md
= O_absent
;
788 /* Legacy: There are cases when we have
789 identifier@relocation_type, if it is the case parse the
790 relocation type as well. */
791 if (*input_line_pointer
== '@')
797 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
809 if (saw_comma
|| brk_lvl
)
811 input_line_pointer
= old_input_line_pointer
;
817 as_bad (_("Brackets in operand field incorrect"));
819 as_bad (_("extra comma"));
821 as_bad (_("missing argument"));
823 as_bad (_("missing comma or colon"));
824 input_line_pointer
= old_input_line_pointer
;
828 /* Parse the flags to a structure. */
831 tokenize_flags (const char *str
,
832 struct arc_flags flags
[],
835 char *old_input_line_pointer
;
836 bfd_boolean saw_flg
= FALSE
;
837 bfd_boolean saw_dot
= FALSE
;
841 memset (flags
, 0, sizeof (*flags
) * nflg
);
843 /* Save and restore input_line_pointer around this function. */
844 old_input_line_pointer
= input_line_pointer
;
845 input_line_pointer
= (char *) str
;
847 while (*input_line_pointer
)
849 switch (*input_line_pointer
)
856 input_line_pointer
++;
864 if (saw_flg
&& !saw_dot
)
867 if (num_flags
>= nflg
)
870 flgnamelen
= strspn (input_line_pointer
, "abcdefghilmnopqrstvwxz");
871 if (flgnamelen
> MAX_FLAG_NAME_LENGHT
)
874 memcpy (flags
->name
, input_line_pointer
, flgnamelen
);
876 input_line_pointer
+= flgnamelen
;
886 input_line_pointer
= old_input_line_pointer
;
891 as_bad (_("extra dot"));
893 as_bad (_("unrecognized flag"));
895 as_bad (_("failed to parse flags"));
896 input_line_pointer
= old_input_line_pointer
;
900 /* The public interface to the instruction assembler. */
903 md_assemble (char *str
)
906 expressionS tok
[MAX_INSN_ARGS
];
909 struct arc_flags flags
[MAX_INSN_FLGS
];
911 /* Split off the opcode. */
912 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_0123468");
913 opname
= xmalloc (opnamelen
+ 1);
914 memcpy (opname
, str
, opnamelen
);
915 opname
[opnamelen
] = '\0';
917 /* Signalize we are assmbling the instructions. */
918 assembling_insn
= TRUE
;
920 /* Tokenize the flags. */
921 if ((nflg
= tokenize_flags (str
+ opnamelen
, flags
, MAX_INSN_FLGS
)) == -1)
923 as_bad (_("syntax error"));
927 /* Scan up to the end of the mnemonic which must end in space or end
930 for (; *str
!= '\0'; str
++)
934 /* Tokenize the rest of the line. */
935 if ((ntok
= tokenize_arguments (str
, tok
, MAX_INSN_ARGS
)) < 0)
937 as_bad (_("syntax error"));
942 assemble_tokens (opname
, tok
, ntok
, flags
, nflg
);
943 assembling_insn
= FALSE
;
946 /* Callback to insert a register into the hash table. */
949 declare_register (char *name
, int number
)
952 symbolS
*regS
= symbol_create (name
, reg_section
,
953 number
, &zero_address_frag
);
955 err
= hash_insert (arc_reg_hash
, S_GET_NAME (regS
), (void *) regS
);
957 as_fatal ("Inserting \"%s\" into register table failed: %s",
961 /* Construct symbols for each of the general registers. */
964 declare_register_set (void)
967 for (i
= 0; i
< 32; ++i
)
971 sprintf (name
, "r%d", i
);
972 declare_register (name
, i
);
975 sprintf (name
, "r%dr%d", i
, i
+1);
976 declare_register (name
, i
);
981 /* Port-specific assembler initialization. This function is called
982 once, at assembler startup time. */
989 /* The endianness can be chosen "at the factory". */
990 target_big_endian
= byte_order
== BIG_ENDIAN
;
992 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_arc
, arc_mach_type
))
993 as_warn (_("could not set architecture and machine"));
995 /* Set elf header flags. */
996 bfd_set_private_flags (stdoutput
, arc_eflag
);
998 /* Set up a hash table for the instructions. */
999 arc_opcode_hash
= hash_new ();
1000 if (arc_opcode_hash
== NULL
)
1001 as_fatal (_("Virtual memory exhausted"));
1003 /* Initialize the hash table with the insns. */
1004 for (i
= 0; i
< arc_num_opcodes
;)
1006 const char *name
, *retval
;
1008 name
= arc_opcodes
[i
].name
;
1009 retval
= hash_insert (arc_opcode_hash
, name
, (void *) &arc_opcodes
[i
]);
1011 as_fatal (_("internal error: can't hash opcode '%s': %s"),
1014 while (++i
< arc_num_opcodes
1015 && (arc_opcodes
[i
].name
== name
1016 || !strcmp (arc_opcodes
[i
].name
, name
)))
1020 /* Register declaration. */
1021 arc_reg_hash
= hash_new ();
1022 if (arc_reg_hash
== NULL
)
1023 as_fatal (_("Virtual memory exhausted"));
1025 declare_register_set ();
1026 declare_register ("gp", 26);
1027 declare_register ("fp", 27);
1028 declare_register ("sp", 28);
1029 declare_register ("ilink", 29);
1030 declare_register ("ilink1", 29);
1031 declare_register ("ilink2", 30);
1032 declare_register ("blink", 31);
1034 declare_register ("mlo", 57);
1035 declare_register ("mmid", 58);
1036 declare_register ("mhi", 59);
1038 declare_register ("acc1", 56);
1039 declare_register ("acc2", 57);
1041 declare_register ("lp_count", 60);
1042 declare_register ("pcl", 63);
1044 /* Initialize the last instructions. */
1045 memset (&arc_last_insns
[0], 0, sizeof (arc_last_insns
));
1048 /* Write a value out to the object file, using the appropriate
1052 md_number_to_chars (char *buf
,
1056 if (target_big_endian
)
1057 number_to_chars_bigendian (buf
, val
, n
);
1059 number_to_chars_littleendian (buf
, val
, n
);
1062 /* Round up a section size to the appropriate boundary. */
1065 md_section_align (segT segment
,
1068 int align
= bfd_get_section_alignment (stdoutput
, segment
);
1070 return ((size
+ (1 << align
) - 1) & -(1 << align
));
1073 /* The location from which a PC relative jump should be calculated,
1074 given a PC relative reloc. */
1077 md_pcrel_from_section (fixS
*fixP
,
1080 offsetT base
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1082 pr_debug ("pcrel_from_section, fx_offset = %d\n", (int) fixP
->fx_offset
);
1084 if (fixP
->fx_addsy
!= (symbolS
*) NULL
1085 && (!S_IS_DEFINED (fixP
->fx_addsy
)
1086 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
1088 pr_debug ("Unknown pcrel symbol: %s\n", S_GET_NAME (fixP
->fx_addsy
));
1090 /* The symbol is undefined (or is defined but not in this section).
1091 Let the linker figure it out. */
1095 if ((int) fixP
->fx_r_type
< 0)
1097 /* These are the "internal" relocations. Align them to
1098 32 bit boundary (PCL), for the moment. */
1103 switch (fixP
->fx_r_type
)
1105 case BFD_RELOC_ARC_PC32
:
1106 /* The hardware calculates relative to the start of the
1107 insn, but this relocation is relative to location of the
1108 LIMM, compensate. TIP: the base always needs to be
1109 substracted by 4 as we do not support this type of PCrel
1110 relocation for short instructions. */
1111 base
-= fixP
->fx_where
- fixP
->fx_dot_value
;
1112 gas_assert ((fixP
->fx_where
- fixP
->fx_dot_value
) == 4);
1114 case BFD_RELOC_ARC_PLT32
:
1115 case BFD_RELOC_ARC_S25H_PCREL_PLT
:
1116 case BFD_RELOC_ARC_S21H_PCREL_PLT
:
1117 case BFD_RELOC_ARC_S25W_PCREL_PLT
:
1118 case BFD_RELOC_ARC_S21W_PCREL_PLT
:
1120 case BFD_RELOC_ARC_S21H_PCREL
:
1121 case BFD_RELOC_ARC_S25H_PCREL
:
1122 case BFD_RELOC_ARC_S13_PCREL
:
1123 case BFD_RELOC_ARC_S21W_PCREL
:
1124 case BFD_RELOC_ARC_S25W_PCREL
:
1128 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1129 _("unhandled reloc %s in md_pcrel_from_section"),
1130 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1135 pr_debug ("pcrel from %x + %lx = %x, symbol: %s (%x)\n",
1136 fixP
->fx_frag
->fr_address
, fixP
->fx_where
, base
,
1137 fixP
->fx_addsy
? S_GET_NAME (fixP
->fx_addsy
) : "(null)",
1138 fixP
->fx_addsy
? S_GET_VALUE (fixP
->fx_addsy
) : 0);
1143 /* Given a BFD relocation find the coresponding operand. */
1145 static const struct arc_operand
*
1146 find_operand_for_reloc (extended_bfd_reloc_code_real_type reloc
)
1150 for (i
= 0; i
< arc_num_operands
; i
++)
1151 if (arc_operands
[i
].default_reloc
== reloc
)
1152 return &arc_operands
[i
];
1156 /* Apply a fixup to the object code. At this point all symbol values
1157 should be fully resolved, and we attempt to completely resolve the
1158 reloc. If we can not do that, we determine the correct reloc code
1159 and put it back in the fixup. To indicate that a fixup has been
1160 eliminated, set fixP->fx_done. */
1163 md_apply_fix (fixS
*fixP
,
1167 char * const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1168 valueT value
= *valP
;
1170 symbolS
*fx_addsy
, *fx_subsy
;
1172 segT add_symbol_segment
= absolute_section
;
1173 segT sub_symbol_segment
= absolute_section
;
1174 const struct arc_operand
*operand
= NULL
;
1175 extended_bfd_reloc_code_real_type reloc
;
1177 pr_debug ("%s:%u: apply_fix: r_type=%d (%s) value=0x%lX offset=0x%lX\n",
1178 fixP
->fx_file
, fixP
->fx_line
, fixP
->fx_r_type
,
1179 ((int) fixP
->fx_r_type
< 0) ? "Internal":
1180 bfd_get_reloc_code_name (fixP
->fx_r_type
), value
,
1183 fx_addsy
= fixP
->fx_addsy
;
1184 fx_subsy
= fixP
->fx_subsy
;
1189 add_symbol_segment
= S_GET_SEGMENT (fx_addsy
);
1193 && fixP
->fx_r_type
!= BFD_RELOC_ARC_TLS_DTPOFF
1194 && fixP
->fx_r_type
!= BFD_RELOC_ARC_TLS_DTPOFF_S9
1195 && fixP
->fx_r_type
!= BFD_RELOC_ARC_TLS_GD_LD
)
1197 resolve_symbol_value (fx_subsy
);
1198 sub_symbol_segment
= S_GET_SEGMENT (fx_subsy
);
1200 if (sub_symbol_segment
== absolute_section
)
1202 /* The symbol is really a constant. */
1203 fx_offset
-= S_GET_VALUE (fx_subsy
);
1208 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1209 _("can't resolve `%s' {%s section} - `%s' {%s section}"),
1210 fx_addsy
? S_GET_NAME (fx_addsy
) : "0",
1211 segment_name (add_symbol_segment
),
1212 S_GET_NAME (fx_subsy
),
1213 segment_name (sub_symbol_segment
));
1219 && !S_IS_WEAK (fx_addsy
))
1221 if (add_symbol_segment
== seg
1224 value
+= S_GET_VALUE (fx_addsy
);
1225 value
-= md_pcrel_from_section (fixP
, seg
);
1227 fixP
->fx_pcrel
= FALSE
;
1229 else if (add_symbol_segment
== absolute_section
)
1231 value
= fixP
->fx_offset
;
1232 fx_offset
+= S_GET_VALUE (fixP
->fx_addsy
);
1234 fixP
->fx_pcrel
= FALSE
;
1239 fixP
->fx_done
= TRUE
;
1244 && ((S_IS_DEFINED (fx_addsy
)
1245 && S_GET_SEGMENT (fx_addsy
) != seg
)
1246 || S_IS_WEAK (fx_addsy
)))
1247 value
+= md_pcrel_from_section (fixP
, seg
);
1249 switch (fixP
->fx_r_type
)
1251 case BFD_RELOC_ARC_32_ME
:
1252 /* This is a pc-relative value in a LIMM. Adjust it to the
1253 address of the instruction not to the address of the
1254 LIMM. Note: it is not anylonger valid this afirmation as
1255 the linker consider ARC_PC32 a fixup to entire 64 bit
1257 fixP
->fx_offset
+= fixP
->fx_frag
->fr_address
;
1260 fixP
->fx_r_type
= BFD_RELOC_ARC_PC32
;
1262 case BFD_RELOC_ARC_PC32
:
1263 /* fixP->fx_offset += fixP->fx_where - fixP->fx_dot_value; */
1266 if ((int) fixP
->fx_r_type
< 0)
1267 as_fatal (_("PC relative relocation not allowed for (internal) type %d"),
1273 pr_debug ("%s:%u: apply_fix: r_type=%d (%s) value=0x%lX offset=0x%lX\n",
1274 fixP
->fx_file
, fixP
->fx_line
, fixP
->fx_r_type
,
1275 ((int) fixP
->fx_r_type
< 0) ? "Internal":
1276 bfd_get_reloc_code_name (fixP
->fx_r_type
), value
,
1280 /* Now check for TLS relocations. */
1281 reloc
= fixP
->fx_r_type
;
1284 case BFD_RELOC_ARC_TLS_DTPOFF
:
1285 case BFD_RELOC_ARC_TLS_LE_32
:
1286 fixP
->fx_offset
= 0;
1288 case BFD_RELOC_ARC_TLS_GD_GOT
:
1289 case BFD_RELOC_ARC_TLS_IE_GOT
:
1290 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
1293 case BFD_RELOC_ARC_TLS_GD_LD
:
1294 gas_assert (!fixP
->fx_offset
);
1297 = (S_GET_VALUE (fixP
->fx_subsy
)
1298 - fixP
->fx_frag
->fr_address
- fixP
->fx_where
);
1299 fixP
->fx_subsy
= NULL
;
1301 case BFD_RELOC_ARC_TLS_GD_CALL
:
1302 /* These two relocs are there just to allow ld to change the tls
1303 model for this symbol, by patching the code. The offset -
1304 and scale, if any - will be installed by the linker. */
1305 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
1308 case BFD_RELOC_ARC_TLS_LE_S9
:
1309 case BFD_RELOC_ARC_TLS_DTPOFF_S9
:
1310 as_bad (_("TLS_*_S9 relocs are not supported yet"));
1322 /* Addjust the value if we have a constant. */
1325 /* For hosts with longs bigger than 32-bits make sure that the top
1326 bits of a 32-bit negative value read in by the parser are set,
1327 so that the correct comparisons are made. */
1328 if (value
& 0x80000000)
1329 value
|= (-1L << 31);
1331 reloc
= fixP
->fx_r_type
;
1339 case BFD_RELOC_ARC_32_PCREL
:
1340 md_number_to_chars (fixpos
, value
, fixP
->fx_size
);
1343 case BFD_RELOC_ARC_GOTPC32
:
1344 /* I cannot fix an GOTPC relocation because I need to relax it
1345 from ld rx,[pcl,@sym@gotpc] to add rx,pcl,@sym@gotpc. */
1346 as_bad (_("Unsupported operation on reloc"));
1348 case BFD_RELOC_ARC_GOTOFF
:
1349 case BFD_RELOC_ARC_32_ME
:
1350 case BFD_RELOC_ARC_PC32
:
1351 md_number_to_chars_midend (fixpos
, value
, fixP
->fx_size
);
1354 case BFD_RELOC_ARC_PLT32
:
1355 md_number_to_chars_midend (fixpos
, value
, fixP
->fx_size
);
1358 case BFD_RELOC_ARC_S25H_PCREL_PLT
:
1359 reloc
= BFD_RELOC_ARC_S25W_PCREL
;
1362 case BFD_RELOC_ARC_S21H_PCREL_PLT
:
1363 reloc
= BFD_RELOC_ARC_S21H_PCREL
;
1366 case BFD_RELOC_ARC_S25W_PCREL_PLT
:
1367 reloc
= BFD_RELOC_ARC_S25W_PCREL
;
1370 case BFD_RELOC_ARC_S21W_PCREL_PLT
:
1371 reloc
= BFD_RELOC_ARC_S21W_PCREL
;
1373 case BFD_RELOC_ARC_S25W_PCREL
:
1374 case BFD_RELOC_ARC_S21W_PCREL
:
1375 case BFD_RELOC_ARC_S21H_PCREL
:
1376 case BFD_RELOC_ARC_S25H_PCREL
:
1377 case BFD_RELOC_ARC_S13_PCREL
:
1379 operand
= find_operand_for_reloc (reloc
);
1380 gas_assert (operand
);
1385 if ((int) fixP
->fx_r_type
>= 0)
1386 as_fatal (_("unhandled relocation type %s"),
1387 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1389 /* The rest of these fixups needs to be completely resolved as
1391 if (fixP
->fx_addsy
!= 0
1392 && S_GET_SEGMENT (fixP
->fx_addsy
) != absolute_section
)
1393 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1394 _("non-absolute expression in constant field"));
1396 gas_assert (-(int) fixP
->fx_r_type
< (int) arc_num_operands
);
1397 operand
= &arc_operands
[-(int) fixP
->fx_r_type
];
1402 if (target_big_endian
)
1404 switch (fixP
->fx_size
)
1407 insn
= bfd_getb32 (fixpos
);
1410 insn
= bfd_getb16 (fixpos
);
1413 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1414 _("unknown fixup size"));
1420 switch (fixP
->fx_size
)
1423 insn
= bfd_getl16 (fixpos
) << 16 | bfd_getl16 (fixpos
+ 2);
1426 insn
= bfd_getl16 (fixpos
);
1429 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1430 _("unknown fixup size"));
1434 insn
= insert_operand (insn
, operand
, (offsetT
) value
,
1435 fixP
->fx_file
, fixP
->fx_line
);
1437 md_number_to_chars_midend (fixpos
, insn
, fixP
->fx_size
);
1440 /* Prepare machine-dependent frags for relaxation.
1442 Called just before relaxation starts. Any symbol that is now undefined
1443 will not become defined.
1445 Return the correct fr_subtype in the frag.
1447 Return the initial "guess for fr_var" to caller. The guess for fr_var
1448 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
1449 or fr_var contributes to our returned value.
1451 Although it may not be explicit in the frag, pretend
1452 fr_var starts with a value. */
1455 md_estimate_size_before_relax (fragS
*fragP ATTRIBUTE_UNUSED
,
1456 segT segment ATTRIBUTE_UNUSED
)
1461 pr_debug ("%s:%d: md_estimate_size_before_relax: %d\n",
1462 fragP
->fr_file
, fragP
->fr_line
, growth
);
1464 as_fatal (_("md_estimate_size_before_relax\n"));
1468 /* Translate internal representation of relocation info to BFD target
1472 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
,
1476 bfd_reloc_code_real_type code
;
1478 reloc
= (arelent
*) xmalloc (sizeof (* reloc
));
1479 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
1480 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
1481 reloc
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
1483 /* Make sure none of our internal relocations make it this far.
1484 They'd better have been fully resolved by this point. */
1485 gas_assert ((int) fixP
->fx_r_type
> 0);
1487 code
= fixP
->fx_r_type
;
1489 /* if we have something like add gp, pcl,
1490 _GLOBAL_OFFSET_TABLE_@gotpc. */
1491 if (code
== BFD_RELOC_ARC_GOTPC32
1493 && fixP
->fx_addsy
== GOT_symbol
)
1494 code
= BFD_RELOC_ARC_GOTPC
;
1496 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
1497 if (reloc
->howto
== NULL
)
1499 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1500 _("cannot represent `%s' relocation in object file"),
1501 bfd_get_reloc_code_name (code
));
1505 if (!fixP
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
1506 as_fatal (_("internal error? cannot generate `%s' relocation"),
1507 bfd_get_reloc_code_name (code
));
1509 gas_assert (!fixP
->fx_pcrel
== !reloc
->howto
->pc_relative
);
1511 if (code
== BFD_RELOC_ARC_TLS_DTPOFF
1512 || code
== BFD_RELOC_ARC_TLS_DTPOFF_S9
)
1515 = fixP
->fx_subsy
? symbol_get_bfdsym (fixP
->fx_subsy
) : NULL
;
1516 /* We just want to store a 24 bit index, but we have to wait
1517 till after write_contents has been called via
1518 bfd_map_over_sections before we can get the index from
1519 _bfd_elf_symbol_from_bfd_symbol. Thus, the write_relocs
1520 function is elf32-arc.c has to pick up the slack.
1521 Unfortunately, this leads to problems with hosts that have
1522 pointers wider than long (bfd_vma). There would be various
1523 ways to handle this, all error-prone :-( */
1524 reloc
->addend
= (bfd_vma
) sym
;
1525 if ((asymbol
*) reloc
->addend
!= sym
)
1527 as_bad ("Can't store pointer\n");
1532 reloc
->addend
= fixP
->fx_offset
;
1537 /* Perform post-processing of machine-dependent frags after relaxation.
1538 Called after relaxation is finished.
1539 In: Address of frag.
1540 fr_type == rs_machine_dependent.
1541 fr_subtype is what the address relaxed to.
1543 Out: Any fixS:s and constants are set up. */
1546 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
1547 segT segment ATTRIBUTE_UNUSED
,
1548 fragS
*fragP ATTRIBUTE_UNUSED
)
1550 pr_debug ("%s:%d: md_convert_frag, subtype: %d, fix: %d, var: %d\n",
1551 fragP
->fr_file
, fragP
->fr_line
,
1552 fragP
->fr_subtype
, fragP
->fr_fix
, fragP
->fr_var
);
1556 /* We have no need to default values of symbols. We could catch
1557 register names here, but that is handled by inserting them all in
1558 the symbol table to begin with. */
1561 md_undefined_symbol (char *name
)
1563 /* The arc abi demands that a GOT[0] should be referencible as
1564 [pc+_DYNAMIC@gotpc]. Hence we convert a _DYNAMIC@gotpc to a
1565 GOTPC reference to _GLOBAL_OFFSET_TABLE_. */
1567 && (*(name
+1) == 'G')
1568 && (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0))
1570 && (*(name
+1) == 'D')
1571 && (strcmp (name
, DYNAMIC_STRUCT_NAME
) == 0)))
1575 if (symbol_find (name
))
1576 as_bad ("GOT already in symbol table");
1578 GOT_symbol
= symbol_new (GLOBAL_OFFSET_TABLE_NAME
, undefined_section
,
1579 (valueT
) 0, &zero_address_frag
);
1586 /* Turn a string in input_line_pointer into a floating point constant
1587 of type type, and store the appropriate bytes in *litP. The number
1588 of LITTLENUMS emitted is stored in *sizeP. An error message is
1589 returned, or NULL on OK. */
1592 md_atof (int type
, char *litP
, int *sizeP
)
1594 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
1597 /* Called for any expression that can not be recognized. When the
1598 function is called, `input_line_pointer' will point to the start of
1602 md_operand (expressionS
*expressionP ATTRIBUTE_UNUSED
)
1604 char *p
= input_line_pointer
;
1607 input_line_pointer
++;
1608 expressionP
->X_op
= O_symbol
;
1609 expression (expressionP
);
1613 /* This function is called from the function 'expression', it attempts
1614 to parse special names (in our case register names). It fills in
1615 the expression with the identified register. It returns TRUE if
1616 it is a register and FALSE otherwise. */
1619 arc_parse_name (const char *name
,
1620 struct expressionS
*e
)
1624 if (!assembling_insn
)
1627 /* Handle only registers. */
1628 if (e
->X_op
!= O_absent
)
1631 sym
= hash_find (arc_reg_hash
, name
);
1634 e
->X_op
= O_register
;
1635 e
->X_add_number
= S_GET_VALUE (sym
);
1642 Invocation line includes a switch not recognized by the base assembler.
1643 See if it's a processor-specific option.
1645 New options (supported) are:
1647 -mcpu=<cpu name> Assemble for selected processor
1648 -EB/-mbig-endian Big-endian
1649 -EL/-mlittle-endian Little-endian
1651 The following CPU names are recognized:
1652 arc700, av2em, av2hs. */
1655 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
1657 int cpu_flags
= EF_ARC_CPU_GENERIC
;
1663 return md_parse_option (OPTION_MCPU
, "arc600");
1666 return md_parse_option (OPTION_MCPU
, "arc700");
1669 return md_parse_option (OPTION_MCPU
, "arcem");
1672 return md_parse_option (OPTION_MCPU
, "archs");
1677 char *s
= alloca (strlen (arg
) + 1);
1684 *t
= TOLOWER (*arg1
++);
1688 for (i
= 0; cpu_types
[i
].name
; ++i
)
1690 if (!strcmp (cpu_types
[i
].name
, s
))
1692 arc_target
= cpu_types
[i
].flags
;
1693 arc_target_name
= cpu_types
[i
].name
;
1694 arc_features
= cpu_types
[i
].features
;
1695 arc_mach_type
= cpu_types
[i
].mach
;
1696 cpu_flags
= cpu_types
[i
].eflags
;
1698 mach_type_specified_p
= 1;
1703 if (!cpu_types
[i
].name
)
1705 as_fatal (_("unknown architecture: %s\n"), arg
);
1711 arc_target_format
= "elf32-bigarc";
1712 byte_order
= BIG_ENDIAN
;
1716 arc_target_format
= "elf32-littlearc";
1717 byte_order
= LITTLE_ENDIAN
;
1721 /* This option has an effect only on ARC EM. */
1722 if (arc_target
& ARC_OPCODE_ARCv2EM
)
1723 arc_features
|= ARC_CD
;
1726 case OPTION_USER_MODE
:
1727 case OPTION_LD_EXT_MASK
:
1730 case OPTION_BARREL_SHIFT
:
1731 case OPTION_MIN_MAX
:
1738 case OPTION_XMAC_D16
:
1739 case OPTION_XMAC_24
:
1740 case OPTION_DSP_PACKA
:
1743 case OPTION_TELEPHONY
:
1744 case OPTION_XYMEMORY
:
1749 /* Dummy options. */
1755 if (cpu_flags
!= EF_ARC_CPU_GENERIC
)
1756 arc_eflag
= (arc_eflag
& ~EF_ARC_MACH_MSK
) | cpu_flags
;
1762 md_show_usage (FILE *stream
)
1764 fprintf (stream
, _("ARC-specific assembler options:\n"));
1766 fprintf (stream
, " -mcpu=<cpu name>\t assemble for CPU <cpu name>\n");
1768 " -mcode-density\t enable code density option for ARC EM\n");
1770 fprintf (stream
, _("\
1771 -EB assemble code for a big-endian cpu\n"));
1772 fprintf (stream
, _("\
1773 -EL assemble code for a little-endian cpu\n"));
1777 preprocess_operands (const struct arc_opcode
*opcode
,
1785 const struct arc_aux_reg
*auxr
;
1787 for (i
= 0; i
< ntok
; i
++)
1789 switch (tok
[i
].X_op
)
1793 break; /* Throw and error. */
1796 if (opcode
->class != AUXREG
)
1798 /* Convert the symbol to a constant if possible. */
1799 p
= S_GET_NAME (tok
[i
].X_add_symbol
);
1802 auxr
= &arc_aux_regs
[0];
1803 for (j
= 0; j
< arc_num_aux_regs
; j
++, auxr
++)
1804 if (len
== auxr
->length
1805 && strcasecmp (auxr
->name
, p
) == 0)
1807 tok
[i
].X_op
= O_constant
;
1808 tok
[i
].X_add_number
= auxr
->address
;
1818 /* Given an opcode name, pre-tockenized set of argumenst and the
1819 opcode flags, take it all the way through emission. */
1822 assemble_tokens (const char *opname
,
1825 struct arc_flags
*pflags
,
1828 bfd_boolean found_something
= FALSE
;
1829 const struct arc_opcode
*opcode
;
1832 /* Search opcodes. */
1833 opcode
= (const struct arc_opcode
*) hash_find (arc_opcode_hash
, opname
);
1835 /* Couldn't find opcode conventional way, try special cases. */
1837 opcode
= find_special_case (opname
, &nflgs
, pflags
, tok
, &ntok
);
1841 pr_debug ("%s:%d: assemble_tokens: %s trying opcode 0x%08X\n",
1842 frag_now
->fr_file
, frag_now
->fr_line
, opcode
->name
,
1845 preprocess_operands (opcode
, tok
, ntok
);
1847 found_something
= TRUE
;
1848 opcode
= find_opcode_match (opcode
, tok
, &ntok
, pflags
, nflgs
, &cpumatch
);
1851 struct arc_insn insn
;
1852 assemble_insn (opcode
, tok
, ntok
, pflags
, nflgs
, &insn
);
1858 if (found_something
)
1861 as_bad (_("inappropriate arguments for opcode '%s'"), opname
);
1863 as_bad (_("opcode '%s' not supported for target %s"), opname
,
1867 as_bad (_("unknown opcode '%s'"), opname
);
1870 /* Used to find special case opcode. */
1872 static const struct arc_opcode
*
1873 find_special_case (const char *opname
,
1875 struct arc_flags
*pflags
,
1879 const struct arc_opcode
*opcode
;
1881 opcode
= find_special_case_pseudo (opname
, ntok
, tok
, nflgs
, pflags
);
1884 opcode
= find_special_case_flag (opname
, nflgs
, pflags
);
1889 /* Swap operand tokens. */
1892 swap_operand (expressionS
*operand_array
,
1894 unsigned destination
)
1896 expressionS cpy_operand
;
1897 expressionS
*src_operand
;
1898 expressionS
*dst_operand
;
1901 if (source
== destination
)
1904 src_operand
= &operand_array
[source
];
1905 dst_operand
= &operand_array
[destination
];
1906 size
= sizeof (expressionS
);
1908 /* Make copy of operand to swap with and swap. */
1909 memcpy (&cpy_operand
, dst_operand
, size
);
1910 memcpy (dst_operand
, src_operand
, size
);
1911 memcpy (src_operand
, &cpy_operand
, size
);
1914 /* Check if *op matches *tok type.
1915 Returns FALSE if they don't match, TRUE if they match. */
1918 pseudo_operand_match (const expressionS
*tok
,
1919 const struct arc_operand_operation
*op
)
1921 offsetT min
, max
, val
;
1923 const struct arc_operand
*operand_real
= &arc_operands
[op
->operand_idx
];
1929 if (operand_real
->bits
== 32 && (operand_real
->flags
& ARC_OPERAND_LIMM
))
1931 else if (!(operand_real
->flags
& ARC_OPERAND_IR
))
1933 val
= tok
->X_add_number
;
1934 if (operand_real
->flags
& ARC_OPERAND_SIGNED
)
1936 max
= (1 << (operand_real
->bits
- 1)) - 1;
1937 min
= -(1 << (operand_real
->bits
- 1));
1941 max
= (1 << operand_real
->bits
) - 1;
1944 if (min
<= val
&& val
<= max
)
1950 /* Handle all symbols as long immediates or signed 9. */
1951 if (operand_real
->flags
& ARC_OPERAND_LIMM
||
1952 ((operand_real
->flags
& ARC_OPERAND_SIGNED
) && operand_real
->bits
== 9))
1957 if (operand_real
->flags
& ARC_OPERAND_IR
)
1962 if (operand_real
->flags
& ARC_OPERAND_BRAKET
)
1973 /* Find pseudo instruction in array. */
1975 static const struct arc_pseudo_insn
*
1976 find_pseudo_insn (const char *opname
,
1978 const expressionS
*tok
)
1980 const struct arc_pseudo_insn
*pseudo_insn
= NULL
;
1981 const struct arc_operand_operation
*op
;
1985 for (i
= 0; i
< arc_num_pseudo_insn
; ++i
)
1987 pseudo_insn
= &arc_pseudo_insns
[i
];
1988 if (strcmp (pseudo_insn
->mnemonic_p
, opname
) == 0)
1990 op
= pseudo_insn
->operand
;
1991 for (j
= 0; j
< ntok
; ++j
)
1992 if (!pseudo_operand_match (&tok
[j
], &op
[j
]))
1995 /* Found the right instruction. */
2003 /* Assumes the expressionS *tok is of sufficient size. */
2005 static const struct arc_opcode
*
2006 find_special_case_pseudo (const char *opname
,
2010 struct arc_flags
*pflags
)
2012 const struct arc_pseudo_insn
*pseudo_insn
= NULL
;
2013 const struct arc_operand_operation
*operand_pseudo
;
2014 const struct arc_operand
*operand_real
;
2016 char construct_operand
[MAX_CONSTR_STR
];
2018 /* Find whether opname is in pseudo instruction array. */
2019 pseudo_insn
= find_pseudo_insn (opname
, *ntok
, tok
);
2021 if (pseudo_insn
== NULL
)
2024 /* Handle flag, Limited to one flag at the moment. */
2025 if (pseudo_insn
->flag_r
!= NULL
)
2026 *nflgs
+= tokenize_flags (pseudo_insn
->flag_r
, &pflags
[*nflgs
],
2027 MAX_INSN_FLGS
- *nflgs
);
2029 /* Handle operand operations. */
2030 for (i
= 0; i
< pseudo_insn
->operand_cnt
; ++i
)
2032 operand_pseudo
= &pseudo_insn
->operand
[i
];
2033 operand_real
= &arc_operands
[operand_pseudo
->operand_idx
];
2035 if (operand_real
->flags
& ARC_OPERAND_BRAKET
&&
2036 !operand_pseudo
->needs_insert
)
2039 /* Has to be inserted (i.e. this token does not exist yet). */
2040 if (operand_pseudo
->needs_insert
)
2042 if (operand_real
->flags
& ARC_OPERAND_BRAKET
)
2044 tok
[i
].X_op
= O_bracket
;
2049 /* Check if operand is a register or constant and handle it
2051 if (operand_real
->flags
& ARC_OPERAND_IR
)
2052 snprintf (construct_operand
, MAX_CONSTR_STR
, "r%d",
2053 operand_pseudo
->count
);
2055 snprintf (construct_operand
, MAX_CONSTR_STR
, "%d",
2056 operand_pseudo
->count
);
2058 tokenize_arguments (construct_operand
, &tok
[i
], 1);
2062 else if (operand_pseudo
->count
)
2064 /* Operand number has to be adjusted accordingly (by operand
2066 switch (tok
[i
].X_op
)
2069 tok
[i
].X_add_number
+= operand_pseudo
->count
;
2082 /* Swap operands if necessary. Only supports one swap at the
2084 for (i
= 0; i
< pseudo_insn
->operand_cnt
; ++i
)
2086 operand_pseudo
= &pseudo_insn
->operand
[i
];
2088 if (operand_pseudo
->swap_operand_idx
== i
)
2091 swap_operand (tok
, i
, operand_pseudo
->swap_operand_idx
);
2093 /* Prevent a swap back later by breaking out. */
2097 return (const struct arc_opcode
*)
2098 hash_find (arc_opcode_hash
, pseudo_insn
->mnemonic_r
);
2101 static const struct arc_opcode
*
2102 find_special_case_flag (const char *opname
,
2104 struct arc_flags
*pflags
)
2108 unsigned flag_idx
, flag_arr_idx
;
2109 size_t flaglen
, oplen
;
2110 const struct arc_flag_special
*arc_flag_special_opcode
;
2111 const struct arc_opcode
*opcode
;
2113 /* Search for special case instruction. */
2114 for (i
= 0; i
< arc_num_flag_special
; i
++)
2116 arc_flag_special_opcode
= &arc_flag_special_cases
[i
];
2117 oplen
= strlen (arc_flag_special_opcode
->name
);
2119 if (strncmp (opname
, arc_flag_special_opcode
->name
, oplen
) != 0)
2122 /* Found a potential special case instruction, now test for
2124 for (flag_arr_idx
= 0;; ++flag_arr_idx
)
2126 flag_idx
= arc_flag_special_opcode
->flags
[flag_arr_idx
];
2128 break; /* End of array, nothing found. */
2130 flagnm
= arc_flag_operands
[flag_idx
].name
;
2131 flaglen
= strlen (flagnm
);
2132 if (strcmp (opname
+ oplen
, flagnm
) == 0)
2134 opcode
= (const struct arc_opcode
*)
2135 hash_find (arc_opcode_hash
,
2136 arc_flag_special_opcode
->name
);
2138 if (*nflgs
+ 1 > MAX_INSN_FLGS
)
2140 memcpy (pflags
[*nflgs
].name
, flagnm
, flaglen
);
2141 pflags
[*nflgs
].name
[flaglen
] = '\0';
2150 /* Check whether a symbol involves a register. */
2153 contains_register (symbolS
*sym
)
2157 expressionS
*ex
= symbol_get_value_expression (sym
);
2158 return ((O_register
== ex
->X_op
)
2159 && !contains_register (ex
->X_add_symbol
)
2160 && !contains_register (ex
->X_op_symbol
));
2166 /* Returns the register number within a symbol. */
2169 get_register (symbolS
*sym
)
2171 if (!contains_register (sym
))
2174 expressionS
*ex
= symbol_get_value_expression (sym
);
2175 return regno (ex
->X_add_number
);
2178 /* Allocates a tok entry. */
2181 allocate_tok (expressionS
*tok
, int ntok
, int cidx
)
2183 if (ntok
> MAX_INSN_ARGS
- 2)
2184 return 0; /* No space left. */
2187 return 0; /* Incorect args. */
2189 memcpy (&tok
[ntok
+1], &tok
[ntok
], sizeof (*tok
));
2192 return 1; /* Success. */
2193 return allocate_tok (tok
, ntok
- 1, cidx
);
2196 /* Return true if a RELOC is generic. A generic reloc is PC-rel of a
2197 simple ME relocation (e.g. RELOC_ARC_32_ME, BFD_RELOC_ARC_PC32. */
2200 generic_reloc_p (extended_bfd_reloc_code_real_type reloc
)
2207 case BFD_RELOC_ARC_SDA_LDST
:
2208 case BFD_RELOC_ARC_SDA_LDST1
:
2209 case BFD_RELOC_ARC_SDA_LDST2
:
2210 case BFD_RELOC_ARC_SDA16_LD
:
2211 case BFD_RELOC_ARC_SDA16_LD1
:
2212 case BFD_RELOC_ARC_SDA16_LD2
:
2213 case BFD_RELOC_ARC_SDA16_ST2
:
2214 case BFD_RELOC_ARC_SDA32_ME
:
2222 /* Search forward through all variants of an opcode looking for a
2225 static const struct arc_opcode
*
2226 find_opcode_match (const struct arc_opcode
*first_opcode
,
2229 struct arc_flags
*first_pflag
,
2233 const struct arc_opcode
*opcode
= first_opcode
;
2235 int got_cpu_match
= 0;
2236 expressionS bktok
[MAX_INSN_ARGS
];
2240 memset (&emptyE
, 0, sizeof (emptyE
));
2241 memcpy (bktok
, tok
, MAX_INSN_ARGS
* sizeof (*tok
));
2246 const unsigned char *opidx
;
2247 const unsigned char *flgidx
;
2249 const expressionS
*t
= &emptyE
;
2251 pr_debug ("%s:%d: find_opcode_match: trying opcode 0x%08X ",
2252 frag_now
->fr_file
, frag_now
->fr_line
, opcode
->opcode
);
2254 /* Don't match opcodes that don't exist on this
2256 if (!(opcode
->cpu
& arc_target
))
2259 if (is_code_density_p (opcode
) && !(arc_features
& ARC_CD
))
2265 /* Check the operands. */
2266 for (opidx
= opcode
->operands
; *opidx
; ++opidx
)
2268 const struct arc_operand
*operand
= &arc_operands
[*opidx
];
2270 /* Only take input from real operands. */
2271 if ((operand
->flags
& ARC_OPERAND_FAKE
)
2272 && !(operand
->flags
& ARC_OPERAND_BRAKET
))
2275 /* When we expect input, make sure we have it. */
2279 /* Match operand type with expression type. */
2280 switch (operand
->flags
& ARC_OPERAND_TYPECHECK_MASK
)
2282 case ARC_OPERAND_IR
:
2283 /* Check to be a register. */
2284 if ((tok
[tokidx
].X_op
!= O_register
2285 || !is_ir_num (tok
[tokidx
].X_add_number
))
2286 && !(operand
->flags
& ARC_OPERAND_IGNORE
))
2289 /* If expect duplicate, make sure it is duplicate. */
2290 if (operand
->flags
& ARC_OPERAND_DUPLICATE
)
2292 /* Check for duplicate. */
2293 if (t
->X_op
!= O_register
2294 || !is_ir_num (t
->X_add_number
)
2295 || (regno (t
->X_add_number
) !=
2296 regno (tok
[tokidx
].X_add_number
)))
2300 /* Special handling? */
2301 if (operand
->insert
)
2303 const char *errmsg
= NULL
;
2304 (*operand
->insert
)(0,
2305 regno (tok
[tokidx
].X_add_number
),
2309 if (operand
->flags
& ARC_OPERAND_IGNORE
)
2311 /* Missing argument, create one. */
2312 if (!allocate_tok (tok
, ntok
- 1, tokidx
))
2315 tok
[tokidx
].X_op
= O_absent
;
2326 case ARC_OPERAND_BRAKET
:
2327 /* Check if bracket is also in opcode table as
2329 if (tok
[tokidx
].X_op
!= O_bracket
)
2333 case ARC_OPERAND_LIMM
:
2334 case ARC_OPERAND_SIGNED
:
2335 case ARC_OPERAND_UNSIGNED
:
2336 switch (tok
[tokidx
].X_op
)
2344 /* Got an (too) early bracket, check if it is an
2345 ignored operand. N.B. This procedure works only
2346 when bracket is the last operand! */
2347 if (!(operand
->flags
& ARC_OPERAND_IGNORE
))
2349 /* Insert the missing operand. */
2350 if (!allocate_tok (tok
, ntok
- 1, tokidx
))
2353 tok
[tokidx
].X_op
= O_absent
;
2358 /* Check the range. */
2359 if (operand
->bits
!= 32
2360 && !(operand
->flags
& ARC_OPERAND_NCHK
))
2362 offsetT min
, max
, val
;
2363 val
= tok
[tokidx
].X_add_number
;
2365 if (operand
->flags
& ARC_OPERAND_SIGNED
)
2367 max
= (1 << (operand
->bits
- 1)) - 1;
2368 min
= -(1 << (operand
->bits
- 1));
2372 max
= (1 << operand
->bits
) - 1;
2376 if (val
< min
|| val
> max
)
2379 /* Check alignmets. */
2380 if ((operand
->flags
& ARC_OPERAND_ALIGNED32
)
2384 if ((operand
->flags
& ARC_OPERAND_ALIGNED16
)
2388 else if (operand
->flags
& ARC_OPERAND_NCHK
)
2390 if (operand
->insert
)
2392 const char *errmsg
= NULL
;
2393 (*operand
->insert
)(0,
2394 tok
[tokidx
].X_add_number
,
2405 /* Check if it is register range. */
2406 if ((tok
[tokidx
].X_add_number
== 0)
2407 && contains_register (tok
[tokidx
].X_add_symbol
)
2408 && contains_register (tok
[tokidx
].X_op_symbol
))
2412 regs
= get_register (tok
[tokidx
].X_add_symbol
);
2414 regs
|= get_register (tok
[tokidx
].X_op_symbol
);
2415 if (operand
->insert
)
2417 const char *errmsg
= NULL
;
2418 (*operand
->insert
)(0,
2429 if (operand
->default_reloc
== 0)
2430 goto match_failed
; /* The operand needs relocation. */
2432 /* Relocs requiring long immediate. FIXME! make it
2433 generic and move it to a function. */
2434 switch (tok
[tokidx
].X_md
)
2443 if (!(operand
->flags
& ARC_OPERAND_LIMM
))
2446 if (!generic_reloc_p (operand
->default_reloc
))
2453 /* If expect duplicate, make sure it is duplicate. */
2454 if (operand
->flags
& ARC_OPERAND_DUPLICATE
)
2456 if (t
->X_op
== O_illegal
2457 || t
->X_op
== O_absent
2458 || t
->X_op
== O_register
2459 || (t
->X_add_number
!= tok
[tokidx
].X_add_number
))
2466 /* Everything else should have been fake. */
2474 /* Check the flags. Iterate over the valid flag classes. */
2477 for (flgidx
= opcode
->flags
; *flgidx
&& lnflg
; ++flgidx
)
2479 /* Get a valid flag class. */
2480 const struct arc_flag_class
*cl_flags
= &arc_flag_classes
[*flgidx
];
2481 const unsigned *flgopridx
;
2483 for (flgopridx
= cl_flags
->flags
; *flgopridx
; ++flgopridx
)
2485 const struct arc_flag_operand
*flg_operand
;
2486 struct arc_flags
*pflag
= first_pflag
;
2489 flg_operand
= &arc_flag_operands
[*flgopridx
];
2490 for (i
= 0; i
< nflgs
; i
++, pflag
++)
2492 /* Match against the parsed flags. */
2493 if (!strcmp (flg_operand
->name
, pflag
->name
))
2495 /*TODO: Check if it is duplicated. */
2496 pflag
->code
= *flgopridx
;
2498 break; /* goto next flag class and parsed flag. */
2503 /* Did I check all the parsed flags? */
2508 /* Possible match -- did we use all of our input? */
2518 /* Restore the original parameters. */
2519 memcpy (tok
, bktok
, MAX_INSN_ARGS
* sizeof (*tok
));
2522 while (++opcode
- arc_opcodes
< (int) arc_num_opcodes
2523 && !strcmp (opcode
->name
, first_opcode
->name
));
2526 *pcpumatch
= got_cpu_match
;
2531 /* Find the proper relocation for the given opcode. */
2533 static extended_bfd_reloc_code_real_type
2534 find_reloc (const char *name
,
2535 const char *opcodename
,
2536 const struct arc_flags
*pflags
,
2538 extended_bfd_reloc_code_real_type reloc
)
2542 bfd_boolean found_flag
;
2543 extended_bfd_reloc_code_real_type ret
= BFD_RELOC_UNUSED
;
2545 for (i
= 0; i
< arc_num_equiv_tab
; i
++)
2547 const struct arc_reloc_equiv_tab
*r
= &arc_reloc_equiv
[i
];
2549 /* Find the entry. */
2550 if (strcmp (name
, r
->name
))
2552 if (r
->mnemonic
&& (strcmp (r
->mnemonic
, opcodename
)))
2559 for (j
= 0; j
< nflg
; j
++)
2560 if (pflags
[i
].code
== r
->flagcode
)
2569 if (reloc
!= r
->oldreloc
)
2576 if (ret
== BFD_RELOC_UNUSED
)
2577 as_bad (_("Unable to find %s relocation for instruction %s"),
2582 /* Turn an opcode description and a set of arguments into
2583 an instruction and a fixup. */
2586 assemble_insn (const struct arc_opcode
*opcode
,
2587 const expressionS
*tok
,
2589 const struct arc_flags
*pflags
,
2591 struct arc_insn
*insn
)
2593 const expressionS
*reloc_exp
= NULL
;
2595 const unsigned char *argidx
;
2598 unsigned char pcrel
= 0;
2599 bfd_boolean needGOTSymbol
;
2600 bfd_boolean has_delay_slot
= FALSE
;
2601 extended_bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
2603 memset (insn
, 0, sizeof (*insn
));
2604 image
= opcode
->opcode
;
2606 pr_debug ("%s:%d: assemble_insn: %s using opcode %x\n",
2607 frag_now
->fr_file
, frag_now
->fr_line
, opcode
->name
,
2610 /* Handle operands. */
2611 for (argidx
= opcode
->operands
; *argidx
; ++argidx
)
2613 const struct arc_operand
*operand
= &arc_operands
[*argidx
];
2614 const expressionS
*t
= (const expressionS
*) 0;
2616 if ((operand
->flags
& ARC_OPERAND_FAKE
)
2617 && !(operand
->flags
& ARC_OPERAND_BRAKET
))
2620 if (operand
->flags
& ARC_OPERAND_DUPLICATE
)
2622 /* Duplicate operand, already inserted. */
2634 /* Regardless if we have a reloc or not mark the instruction
2635 limm if it is the case. */
2636 if (operand
->flags
& ARC_OPERAND_LIMM
)
2637 insn
->has_limm
= TRUE
;
2642 image
= insert_operand (image
, operand
, regno (t
->X_add_number
),
2647 image
= insert_operand (image
, operand
, t
->X_add_number
, NULL
, 0);
2649 if (operand
->flags
& ARC_OPERAND_LIMM
)
2650 insn
->limm
= t
->X_add_number
;
2654 /* Ignore brackets. */
2658 gas_assert (operand
->flags
& ARC_OPERAND_IGNORE
);
2662 /* Maybe register range. */
2663 if ((t
->X_add_number
== 0)
2664 && contains_register (t
->X_add_symbol
)
2665 && contains_register (t
->X_op_symbol
))
2669 regs
= get_register (t
->X_add_symbol
);
2671 regs
|= get_register (t
->X_op_symbol
);
2672 image
= insert_operand (image
, operand
, regs
, NULL
, 0);
2677 /* This operand needs a relocation. */
2678 needGOTSymbol
= FALSE
;
2683 needGOTSymbol
= TRUE
;
2684 reloc
= find_reloc ("plt", opcode
->name
,
2686 operand
->default_reloc
);
2691 needGOTSymbol
= TRUE
;
2692 reloc
= ARC_RELOC_TABLE (t
->X_md
)->reloc
;
2695 reloc
= ARC_RELOC_TABLE (t
->X_md
)->reloc
;
2696 if (ARC_SHORT (opcode
->mask
))
2697 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
2698 _("Unable to use @pcl relocation for insn %s"),
2702 reloc
= find_reloc ("sda", opcode
->name
,
2704 operand
->default_reloc
);
2708 needGOTSymbol
= TRUE
;
2713 reloc
= ARC_RELOC_TABLE (t
->X_md
)->reloc
;
2716 case O_tpoff9
: /*FIXME! Check for the conditionality of
2718 case O_dtpoff9
: /*FIXME! Check for the conditionality of
2720 as_bad (_("TLS_*_S9 relocs are not supported yet"));
2724 /* Just consider the default relocation. */
2725 reloc
= operand
->default_reloc
;
2729 if (needGOTSymbol
&& (GOT_symbol
== NULL
))
2730 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2737 /* sanity checks. */
2738 reloc_howto_type
*reloc_howto
2739 = bfd_reloc_type_lookup (stdoutput
,
2740 (bfd_reloc_code_real_type
) reloc
);
2741 unsigned reloc_bitsize
= reloc_howto
->bitsize
;
2742 if (reloc_howto
->rightshift
)
2743 reloc_bitsize
-= reloc_howto
->rightshift
;
2744 if (reloc_bitsize
!= operand
->bits
)
2746 as_bad (_("invalid relocation %s for field"),
2747 bfd_get_reloc_code_name (reloc
));
2752 if (insn
->nfixups
>= MAX_INSN_FIXUPS
)
2753 as_fatal (_("too many fixups"));
2755 struct arc_fixup
*fixup
;
2756 fixup
= &insn
->fixups
[insn
->nfixups
++];
2758 fixup
->reloc
= reloc
;
2759 pcrel
= (operand
->flags
& ARC_OPERAND_PCREL
) ? 1 : 0;
2760 fixup
->pcrel
= pcrel
;
2761 fixup
->islong
= (operand
->flags
& ARC_OPERAND_LIMM
) ?
2768 for (i
= 0; i
< nflg
; i
++)
2770 const struct arc_flag_operand
*flg_operand
=
2771 &arc_flag_operands
[pflags
[i
].code
];
2773 /* Check if the instruction has a delay slot. */
2774 if (!strcmp (flg_operand
->name
, "d"))
2775 has_delay_slot
= TRUE
;
2777 /* There is an exceptional case when we cannot insert a flag
2778 just as it is. The .T flag must be handled in relation with
2779 the relative address. */
2780 if (!strcmp (flg_operand
->name
, "t")
2781 || !strcmp (flg_operand
->name
, "nt"))
2783 unsigned bitYoperand
= 0;
2784 /* FIXME! move selection bbit/brcc in arc-opc.c. */
2785 if (!strcmp (flg_operand
->name
, "t"))
2786 if (!strcmp (opcode
->name
, "bbit0")
2787 || !strcmp (opcode
->name
, "bbit1"))
2788 bitYoperand
= arc_NToperand
;
2790 bitYoperand
= arc_Toperand
;
2792 if (!strcmp (opcode
->name
, "bbit0")
2793 || !strcmp (opcode
->name
, "bbit1"))
2794 bitYoperand
= arc_Toperand
;
2796 bitYoperand
= arc_NToperand
;
2798 gas_assert (reloc_exp
!= NULL
);
2799 if (reloc_exp
->X_op
== O_constant
)
2801 /* Check if we have a constant and solved it
2803 offsetT val
= reloc_exp
->X_add_number
;
2804 image
|= insert_operand (image
, &arc_operands
[bitYoperand
],
2809 struct arc_fixup
*fixup
;
2811 if (insn
->nfixups
>= MAX_INSN_FIXUPS
)
2812 as_fatal (_("too many fixups"));
2814 fixup
= &insn
->fixups
[insn
->nfixups
++];
2815 fixup
->exp
= *reloc_exp
;
2816 fixup
->reloc
= -bitYoperand
;
2817 fixup
->pcrel
= pcrel
;
2818 fixup
->islong
= FALSE
;
2822 image
|= (flg_operand
->code
& ((1 << flg_operand
->bits
) - 1))
2823 << flg_operand
->shift
;
2826 /* Short instruction? */
2827 insn
->short_insn
= ARC_SHORT (opcode
->mask
) ? TRUE
: FALSE
;
2831 /* Update last insn status. */
2832 arc_last_insns
[1] = arc_last_insns
[0];
2833 arc_last_insns
[0].opcode
= opcode
;
2834 arc_last_insns
[0].has_limm
= insn
->has_limm
;
2835 arc_last_insns
[0].has_delay_slot
= has_delay_slot
;
2837 /* Check if the current instruction is legally used. */
2838 if (arc_last_insns
[1].has_delay_slot
2839 && is_br_jmp_insn_p (arc_last_insns
[0].opcode
))
2840 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
2841 _("A jump/branch instruction in delay slot."));
2844 /* Actually output an instruction with its fixup. */
2847 emit_insn (struct arc_insn
*insn
)
2852 pr_debug ("Emit insn : 0x%x\n", insn
->insn
);
2853 pr_debug ("\tShort : 0x%d\n", insn
->short_insn
);
2854 pr_debug ("\tLong imm: 0x%lx\n", insn
->limm
);
2856 /* Write out the instruction. */
2857 if (insn
->short_insn
)
2862 md_number_to_chars (f
, insn
->insn
, 2);
2863 md_number_to_chars_midend (f
+ 2, insn
->limm
, 4);
2864 dwarf2_emit_insn (6);
2869 md_number_to_chars (f
, insn
->insn
, 2);
2870 dwarf2_emit_insn (2);
2878 md_number_to_chars_midend (f
, insn
->insn
, 4);
2879 md_number_to_chars_midend (f
+ 4, insn
->limm
, 4);
2880 dwarf2_emit_insn (8);
2885 md_number_to_chars_midend (f
, insn
->insn
, 4);
2886 dwarf2_emit_insn (4);
2890 /* Apply the fixups in order. */
2891 for (i
= 0; i
< insn
->nfixups
; i
++)
2893 struct arc_fixup
*fixup
= &insn
->fixups
[i
];
2894 int size
, pcrel
, offset
= 0;
2896 /*FIXME! the reloc size is wrong in the BFD file. When it will
2897 be fixed please delete me. */
2898 size
= (insn
->short_insn
&& !fixup
->islong
) ? 2 : 4;
2901 offset
= (insn
->short_insn
) ? 2 : 4;
2903 /* Some fixups are only used internally, thus no howto. */
2904 if ((int) fixup
->reloc
< 0)
2906 /*FIXME! the reloc size is wrong in the BFD file. When it
2907 will be fixed please enable me.
2908 size = (insn->short_insn && !fixup->islong) ? 2 : 4; */
2909 pcrel
= fixup
->pcrel
;
2913 reloc_howto_type
*reloc_howto
=
2914 bfd_reloc_type_lookup (stdoutput
,
2915 (bfd_reloc_code_real_type
) fixup
->reloc
);
2916 gas_assert (reloc_howto
);
2917 /*FIXME! the reloc size is wrong in the BFD file. When it
2918 will be fixed please enable me.
2919 size = bfd_get_reloc_size (reloc_howto); */
2920 pcrel
= reloc_howto
->pc_relative
;
2923 pr_debug ("%s:%d: emit_insn: new %s fixup (PCrel:%s) of size %d @ offset %d\n",
2924 frag_now
->fr_file
, frag_now
->fr_line
,
2925 (fixup
->reloc
< 0) ? "Internal" :
2926 bfd_get_reloc_code_name (fixup
->reloc
),
2929 fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
2930 size
, &fixup
->exp
, pcrel
, fixup
->reloc
);
2932 /* Check for ZOLs, and update symbol info if any. */
2933 if (LP_INSN (insn
->insn
))
2935 gas_assert (fixup
->exp
.X_add_symbol
);
2936 ARC_SET_FLAG (fixup
->exp
.X_add_symbol
, ARC_FLAG_ZOL
);
2941 /* Insert an operand value into an instruction. */
2944 insert_operand (unsigned insn
,
2945 const struct arc_operand
*operand
,
2950 offsetT min
= 0, max
= 0;
2952 if (operand
->bits
!= 32
2953 && !(operand
->flags
& ARC_OPERAND_NCHK
)
2954 && !(operand
->flags
& ARC_OPERAND_FAKE
))
2956 if (operand
->flags
& ARC_OPERAND_SIGNED
)
2958 max
= (1 << (operand
->bits
- 1)) - 1;
2959 min
= -(1 << (operand
->bits
- 1));
2963 max
= (1 << operand
->bits
) - 1;
2967 if (val
< min
|| val
> max
)
2968 as_bad_value_out_of_range (_("operand"),
2969 val
, min
, max
, file
, line
);
2972 pr_debug ("insert field: %ld <= %ld <= %ld in 0x%08x\n",
2973 min
, val
, max
, insn
);
2975 if ((operand
->flags
& ARC_OPERAND_ALIGNED32
)
2977 as_bad_where (file
, line
,
2978 _("Unaligned operand. Needs to be 32bit aligned"));
2980 if ((operand
->flags
& ARC_OPERAND_ALIGNED16
)
2982 as_bad_where (file
, line
,
2983 _("Unaligned operand. Needs to be 16bit aligned"));
2985 if (operand
->insert
)
2987 const char *errmsg
= NULL
;
2989 insn
= (*operand
->insert
) (insn
, val
, &errmsg
);
2991 as_warn_where (file
, line
, "%s", errmsg
);
2995 if (operand
->flags
& ARC_OPERAND_TRUNCATE
)
2997 if (operand
->flags
& ARC_OPERAND_ALIGNED32
)
2999 if (operand
->flags
& ARC_OPERAND_ALIGNED16
)
3002 insn
|= ((val
& ((1 << operand
->bits
) - 1)) << operand
->shift
);
3008 arc_handle_align (fragS
* fragP
)
3010 if ((fragP
)->fr_type
== rs_align_code
)
3012 char *dest
= (fragP
)->fr_literal
+ (fragP
)->fr_fix
;
3013 valueT count
= ((fragP
)->fr_next
->fr_address
3014 - (fragP
)->fr_address
- (fragP
)->fr_fix
);
3016 (fragP
)->fr_var
= 2;
3018 if (count
& 1)/* Padding in the gap till the next 2-byte
3019 boundary with 0s. */
3024 /* Writing nop_s. */
3025 md_number_to_chars (dest
, NOP_OPCODE_S
, 2);
3029 /* Here we decide which fixups can be adjusted to make them relative
3030 to the beginning of the section instead of the symbol. Basically
3031 we need to make sure that the dynamic relocations are done
3032 correctly, so in some cases we force the original symbol to be
3036 tc_arc_fix_adjustable (fixS
*fixP
)
3039 /* Prevent all adjustments to global symbols. */
3040 if (S_IS_EXTERNAL (fixP
->fx_addsy
))
3042 if (S_IS_WEAK (fixP
->fx_addsy
))
3045 /* Adjust_reloc_syms doesn't know about the GOT. */
3046 switch (fixP
->fx_r_type
)
3048 case BFD_RELOC_ARC_GOTPC32
:
3049 case BFD_RELOC_ARC_PLT32
:
3050 case BFD_RELOC_ARC_S25H_PCREL_PLT
:
3051 case BFD_RELOC_ARC_S21H_PCREL_PLT
:
3052 case BFD_RELOC_ARC_S25W_PCREL_PLT
:
3053 case BFD_RELOC_ARC_S21W_PCREL_PLT
:
3060 return 0; /* FIXME! return 1, fix it in the linker. */
3063 /* Compute the reloc type of an expression EXP. */
3066 arc_check_reloc (expressionS
*exp
,
3067 bfd_reloc_code_real_type
*r_type_p
)
3069 if (*r_type_p
== BFD_RELOC_32
3070 && exp
->X_op
== O_subtract
3071 && exp
->X_op_symbol
!= NULL
3072 && exp
->X_op_symbol
->bsym
->section
== now_seg
)
3073 *r_type_p
= BFD_RELOC_ARC_32_PCREL
;
3077 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
3080 arc_cons_fix_new (fragS
*frag
,
3084 bfd_reloc_code_real_type r_type
)
3086 r_type
= BFD_RELOC_UNUSED
;
3091 r_type
= BFD_RELOC_8
;
3095 r_type
= BFD_RELOC_16
;
3099 r_type
= BFD_RELOC_24
;
3103 r_type
= BFD_RELOC_32
;
3104 arc_check_reloc (exp
, &r_type
);
3108 r_type
= BFD_RELOC_64
;
3112 as_bad (_("unsupported BFD relocation size %u"), size
);
3113 r_type
= BFD_RELOC_UNUSED
;
3116 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
3119 /* The actual routine that checks the ZOL conditions. */
3122 check_zol (symbolS
*s
)
3124 switch (arc_mach_type
)
3126 case bfd_mach_arc_arcv2
:
3127 if (arc_target
& ARC_OPCODE_ARCv2EM
)
3130 if (is_br_jmp_insn_p (arc_last_insns
[0].opcode
)
3131 || arc_last_insns
[1].has_delay_slot
)
3132 as_bad (_("Jump/Branch instruction detected at the end of the ZOL label @%s"),
3136 case bfd_mach_arc_arc600
:
3138 if (is_kernel_insn_p (arc_last_insns
[0].opcode
))
3139 as_bad (_("Kernel instruction detected at the end of the ZOL label @%s"),
3142 if (arc_last_insns
[0].has_limm
3143 && is_br_jmp_insn_p (arc_last_insns
[0].opcode
))
3144 as_bad (_("A jump instruction with long immediate detected at the \
3145 end of the ZOL label @%s"), S_GET_NAME (s
));
3148 case bfd_mach_arc_arc700
:
3149 if (arc_last_insns
[0].has_delay_slot
)
3150 as_bad (_("An illegal use of delay slot detected at the end of the ZOL label @%s"),
3159 /* If ZOL end check the last two instruction for illegals. */
3161 arc_frob_label (symbolS
* sym
)
3163 if (ARC_GET_FLAG (sym
) & ARC_FLAG_ZOL
)
3166 dwarf2_emit_label (sym
);