Add support for ARC instruction relaxation in the assembler.
[deliverable/binutils-gdb.git] / gas / config / tc-arc.h
1 /* tc-arc.h - Macros and type defines for the ARC.
2 Copyright (C) 2014-2016 Free Software Foundation, Inc.
3
4 Contributed by Claudiu Zissulescu (claziss@synopsys.com)
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 3,
11 or (at your option) any later version.
12
13 GAS is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16 the GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23
24 /* By convention, you should define this macro in the `.h' file. For
25 example, `tc-m68k.h' defines `TC_M68K'. You might have to use this
26 if it is necessary to add CPU specific code to the object format
27 file. */
28 #define TC_ARC
29
30 /* We want local label support. */
31 #define LOCAL_LABELS_FB 1
32
33 /* This macro is the BFD architecture to pass to
34 `bfd_set_arch_mach'. */
35 #define TARGET_ARCH bfd_arch_arc
36
37 /* The `extsym - .' expressions can be emitted using PC-relative
38 relocs. */
39 #define DIFF_EXPR_OK
40
41 #define REGISTER_PREFIX '%'
42
43 #undef LITTLE_ENDIAN
44 #define LITTLE_ENDIAN 1234
45
46 #undef BIG_ENDIAN
47 #define BIG_ENDIAN 4321
48
49 #ifdef TARGET_BYTES_BIG_ENDIAN
50
51 # define DEFAULT_TARGET_FORMAT "elf32-bigarc"
52 # define DEFAULT_BYTE_ORDER BIG_ENDIAN
53
54 #else
55 /* You should define this macro to be non-zero if the target is big
56 endian, and zero if the target is little endian. */
57 # define TARGET_BYTES_BIG_ENDIAN 0
58
59 # define DEFAULT_TARGET_FORMAT "elf32-littlearc"
60 # define DEFAULT_BYTE_ORDER LITTLE_ENDIAN
61
62 #endif /* TARGET_BYTES_BIG_ENDIAN. */
63
64 /* The endianness of the target format may change based on command
65 line arguments. */
66 extern const char *arc_target_format;
67
68 /* This macro is the BFD target name to use when creating the output
69 file. This will normally depend upon the `OBJ_FMT' macro. */
70 #define TARGET_FORMAT arc_target_format
71
72 /* `md_short_jump_size'
73 `md_long_jump_size'
74 `md_create_short_jump'
75 `md_create_long_jump'
76
77 If `WORKING_DOT_WORD' is defined, GAS will not do broken word
78 processing (*note Broken words::.). Otherwise, you should set
79 `md_short_jump_size' to the size of a short jump (a jump that is
80 just long enough to jump around a long jmp) and `md_long_jump_size'
81 to the size of a long jump (a jump that can go anywhere in the
82 function). You should define `md_create_short_jump' to create a
83 short jump around a long jump, and define `md_create_long_jump' to
84 create a long jump. */
85 #define WORKING_DOT_WORD
86
87 #define LISTING_HEADER "ARC GAS "
88
89 /* The number of bytes to put into a word in a listing. This affects
90 the way the bytes are clumped together in the listing. For
91 example, a value of 2 might print `1234 5678' where a value of 1
92 would print `12 34 56 78'. The default value is 4. */
93 #define LISTING_WORD_SIZE 2
94
95 /* If you define this macro, it should return the position from which
96 the PC relative adjustment for a PC relative fixup should be made.
97 On many processors, the base of a PC relative instruction is the
98 next instruction, so this macro would return the length of an
99 instruction, plus the address of the PC relative fixup. The latter
100 can be calculated as fixp->fx_where +
101 fixp->fx_frag->fr_address. */
102 extern long md_pcrel_from_section (struct fix *, segT);
103 #define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
104
105 /* [ ] is index operator. */
106 #define NEED_INDEX_OPERATOR
107
108 #define MAX_MEM_FOR_RS_ALIGN_CODE (1+2)
109
110 /* HANDLE_ALIGN called after all the assembly has been done,
111 so we can fill in all the rs_align_code type frags with
112 nop instructions. */
113 #define HANDLE_ALIGN(FRAGP) arc_handle_align (FRAGP)
114
115 /* Values passed to md_apply_fix3 don't include the symbol value. */
116 #define MD_APPLY_SYM_VALUE(FIX) 0
117
118 /* No shared lib support, so we don't need to ensure externally
119 visible symbols can be overridden. */
120 #define EXTERN_FORCE_RELOC 0
121
122 /* You may define this macro to generate a fixup for a data allocation
123 pseudo-op. */
124 #define TC_CONS_FIX_NEW(FRAG, OFF, LEN, EXP, RELOC) \
125 arc_cons_fix_new ((FRAG), (OFF), (LEN), (EXP), (RELOC))
126
127 /* We don't want gas to fixup the following program memory related
128 relocations. Check also that fx_addsy is not NULL, in order to
129 make sure that the fixup refers to some sort of label. */
130 #define TC_VALIDATE_FIX(FIXP,SEG,SKIP) \
131 if ((FIXP->fx_r_type == BFD_RELOC_ARC_GOTPC32 \
132 || FIXP->fx_r_type == BFD_RELOC_ARC_PLT32 \
133 || FIXP->fx_r_type == BFD_RELOC_ARC_S25W_PCREL_PLT \
134 || FIXP->fx_r_type == BFD_RELOC_ARC_S25H_PCREL_PLT \
135 || FIXP->fx_r_type == BFD_RELOC_ARC_S21W_PCREL_PLT \
136 || FIXP->fx_r_type == BFD_RELOC_ARC_S21H_PCREL_PLT) \
137 && FIXP->fx_addsy != NULL \
138 && FIXP->fx_subsy == NULL) \
139 { \
140 symbol_mark_used_in_reloc (FIXP->fx_addsy); \
141 goto SKIP; \
142 }
143
144 /* BFD_RELOC_ARC_TLS_GD_LD may use fx_subsy to store a label that is
145 later turned into fx_offset. */
146 #define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) \
147 ((FIX)->fx_r_type == BFD_RELOC_ARC_TLS_GD_LD)
148
149 #define TC_VALIDATE_FIX_SUB(FIX, SEG) \
150 ((md_register_arithmetic || (SEG) != reg_section) \
151 && ((FIX)->fx_r_type == BFD_RELOC_GPREL32 \
152 || (FIX)->fx_r_type == BFD_RELOC_GPREL16 \
153 || (FIX)->fx_r_type == BFD_RELOC_ARC_TLS_DTPOFF \
154 || (FIX)->fx_r_type == BFD_RELOC_ARC_TLS_DTPOFF_S9 \
155 || TC_FORCE_RELOCATION_SUB_LOCAL (FIX, SEG)))
156
157 /* We use this to mark the end-loop label. We use this mark for ZOL
158 validity checks. */
159 #define TC_SYMFIELD_TYPE unsigned int
160 #define ARC_GET_FLAG(s) (*symbol_get_tc (s))
161 #define ARC_SET_FLAG(s,v) (*symbol_get_tc (s) |= (v))
162
163 /* The symbol is a ZOL's end loop label. */
164 #define ARC_FLAG_ZOL (1 << 0)
165
166 /* We use this hook to check the validity of the last to instructions
167 of a ZOL. */
168 #define tc_frob_label(S) arc_frob_label (S)
169
170 #define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
171 #define DYNAMIC_STRUCT_NAME "_DYNAMIC"
172
173 /* We need to take care of not having section relative fixups for the
174 fixups with respect to Position Independent Code. */
175 #define tc_fix_adjustable(FIX) tc_arc_fix_adjustable(FIX)
176
177 /* This hook is required to parse register names as operands. */
178 #define md_parse_name(name, exp, m, c) arc_parse_name (name, exp)
179
180 /* Used within frags to pass some information to some relaxation
181 machine dependent values. */
182 #define TC_FRAG_TYPE struct arc_relax_type
183
184 /* Adjust non PC-rel values at relaxation time. */
185 #define TC_PCREL_ADJUST(F) arc_pcrel_adjust (F)
186
187 extern int arc_pcrel_adjust (fragS *);
188 extern bfd_boolean arc_parse_name (const char *, struct expressionS *);
189 extern int tc_arc_fix_adjustable (struct fix *);
190 extern void arc_handle_align (fragS *);
191 extern void arc_cons_fix_new (fragS *, int, int, expressionS *,
192 bfd_reloc_code_real_type);
193 extern void arc_frob_label (symbolS *);
194
195 /* The blink register is r31. */
196 #define DWARF2_DEFAULT_RETURN_COLUMN 31
197 /* Registers are generally saved at negative offsets to the CFA. */
198 #define DWARF2_CIE_DATA_ALIGNMENT (-4)
199
200 /* Define the NOPs. */
201 #define NOP_OPCODE_S 0x000078E0
202 #define NOP_OPCODE_L 0x264A7000 /* mov 0,0. */
203
204 #define MAX_FLAG_NAME_LENGHT 3
205
206 struct arc_flags
207 {
208 /* Name of the parsed flag. */
209 char name[MAX_FLAG_NAME_LENGHT + 1];
210
211 /* The code of the parsed flag. Valid when is not zero. */
212 unsigned char code;
213 };
214
215 #ifndef MAX_INSN_ARGS
216 #define MAX_INSN_ARGS 6
217 #endif
218
219 #ifndef MAX_INSN_FLGS
220 #define MAX_INSN_FLGS 3
221 #endif
222
223 extern const relax_typeS md_relax_table[];
224 #define TC_GENERIC_RELAX_TABLE md_relax_table
225
226 /* Used to construct instructions at md_convert_frag stage of
227 relaxation. */
228 struct arc_relax_type
229 {
230 /* Dictates whether the pc-relativity should be kept in mind when
231 relax_frag is called or whether the pc-relativity should be
232 solved outside of relaxation. For clarification: BL(_S) and
233 B(_S) use pcrel == 1 and ADD with a solvable expression as 3rd
234 operand use pcrel == 0. */
235 unsigned char pcrel;
236
237 /* Expressions that dictate the operands. Used for re-assembling in
238 md_convert_frag. */
239 expressionS tok[MAX_INSN_ARGS];
240
241 /* Number of tok (i.e. number of operands). Used for re-assembling
242 in md_convert_frag. */
243 int ntok;
244
245 /* Flags of instruction. Used for re-assembling in
246 md_convert_frag. */
247 struct arc_flags pflags[MAX_INSN_FLGS];
248
249 /* Number of flags. Used for re-assembling in md_convert_frag. */
250 int nflg;
251 };
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