1 /* tc-avr.c -- Assembler code for the ATMEL AVR
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "safe-ctype.h"
32 int insn_size
; /* In words. */
34 unsigned int bin_opcode
;
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
40 struct avr_opcodes_s avr_opcodes
[] =
42 #include "opcode/avr.h"
46 const char comment_chars
[] = ";";
47 const char line_comment_chars
[] = "#";
48 const char line_separator_chars
[] = "$";
50 const char *md_shortopts
= "m:";
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
62 static struct mcu_type_s mcu_types
[] =
64 {"avr1", AVR_ISA_TINY1
, bfd_mach_avr1
},
65 {"avr2", AVR_ISA_TINY2
, bfd_mach_avr2
},
66 {"avr3", AVR_ISA_M103
, bfd_mach_avr3
},
67 {"avr4", AVR_ISA_M8
, bfd_mach_avr4
},
68 {"avr5", AVR_ISA_ALL
, bfd_mach_avr5
},
69 {"avr6", AVR_ISA_ALL
, bfd_mach_avr6
},
70 {"at90s1200", AVR_ISA_1200
, bfd_mach_avr1
},
71 {"attiny10", AVR_ISA_TINY1
, bfd_mach_avr1
}, /* XXX -> tn11 */
72 {"attiny11", AVR_ISA_TINY1
, bfd_mach_avr1
},
73 {"attiny12", AVR_ISA_TINY1
, bfd_mach_avr1
},
74 {"attiny15", AVR_ISA_TINY1
, bfd_mach_avr1
},
75 {"attiny28", AVR_ISA_TINY1
, bfd_mach_avr1
},
76 {"at90s2313", AVR_ISA_2xxx
, bfd_mach_avr2
},
77 {"at90s2323", AVR_ISA_2xxx
, bfd_mach_avr2
},
78 {"at90s2333", AVR_ISA_2xxx
, bfd_mach_avr2
}, /* XXX -> 4433 */
79 {"at90s2343", AVR_ISA_2xxx
, bfd_mach_avr2
},
80 {"attiny22", AVR_ISA_2xxx
, bfd_mach_avr2
}, /* XXX -> 2343 */
81 {"attiny26", AVR_ISA_2xxx
, bfd_mach_avr2
},
82 {"at90s4433", AVR_ISA_2xxx
, bfd_mach_avr2
},
83 {"at90s4414", AVR_ISA_2xxx
, bfd_mach_avr2
}, /* XXX -> 8515 */
84 {"at90s4434", AVR_ISA_2xxx
, bfd_mach_avr2
}, /* XXX -> 8535 */
85 {"at90s8515", AVR_ISA_2xxx
, bfd_mach_avr2
},
86 {"at90s8535", AVR_ISA_2xxx
, bfd_mach_avr2
},
87 {"at90c8534", AVR_ISA_2xxx
, bfd_mach_avr2
},
88 {"at86rf401", AVR_ISA_2xxx
, bfd_mach_avr2
},
89 {"attiny13", AVR_ISA_TINY2
, bfd_mach_avr2
},
90 {"attiny2313", AVR_ISA_TINY2
, bfd_mach_avr2
},
91 {"attiny261", AVR_ISA_TINY2
, bfd_mach_avr2
},
92 {"attiny461", AVR_ISA_TINY2
, bfd_mach_avr2
},
93 {"attiny861", AVR_ISA_TINY2
, bfd_mach_avr2
},
94 {"attiny24", AVR_ISA_TINY2
, bfd_mach_avr2
},
95 {"attiny44", AVR_ISA_TINY2
, bfd_mach_avr2
},
96 {"attiny84", AVR_ISA_TINY2
, bfd_mach_avr2
},
97 {"attiny25", AVR_ISA_TINY2
, bfd_mach_avr2
},
98 {"attiny45", AVR_ISA_TINY2
, bfd_mach_avr2
},
99 {"attiny85", AVR_ISA_TINY2
, bfd_mach_avr2
},
100 {"attiny43u", AVR_ISA_TINY2
, bfd_mach_avr2
},
101 {"attiny48", AVR_ISA_TINY2
, bfd_mach_avr2
},
102 {"atmega603", AVR_ISA_M603
, bfd_mach_avr3
}, /* XXX -> m103 */
103 {"atmega103", AVR_ISA_M103
, bfd_mach_avr3
},
104 {"at43usb320", AVR_ISA_M103
, bfd_mach_avr3
},
105 {"at43usb355", AVR_ISA_M603
, bfd_mach_avr3
},
106 {"at76c711", AVR_ISA_M603
, bfd_mach_avr3
},
107 {"atmega48", AVR_ISA_PWMx
, bfd_mach_avr4
},
108 {"atmega8", AVR_ISA_M8
, bfd_mach_avr4
},
109 {"atmega83", AVR_ISA_M8
, bfd_mach_avr4
}, /* XXX -> m8535 */
110 {"atmega85", AVR_ISA_M8
, bfd_mach_avr4
}, /* XXX -> m8 */
111 {"atmega88", AVR_ISA_PWMx
, bfd_mach_avr4
},
112 {"atmega8515", AVR_ISA_M8
, bfd_mach_avr4
},
113 {"atmega8535", AVR_ISA_M8
, bfd_mach_avr4
},
114 {"atmega8hva", AVR_ISA_PWMx
, bfd_mach_avr4
},
115 {"at90pwm1", AVR_ISA_PWMx
, bfd_mach_avr4
},
116 {"at90pwm2", AVR_ISA_PWMx
, bfd_mach_avr4
},
117 {"at90pwm2b", AVR_ISA_PWMx
, bfd_mach_avr4
},
118 {"at90pwm3", AVR_ISA_PWMx
, bfd_mach_avr4
},
119 {"at90pwm3b", AVR_ISA_PWMx
, bfd_mach_avr4
},
120 {"atmega16", AVR_ISA_M323
, bfd_mach_avr5
},
121 {"atmega161", AVR_ISA_M161
, bfd_mach_avr5
},
122 {"atmega162", AVR_ISA_M323
, bfd_mach_avr5
},
123 {"atmega163", AVR_ISA_M161
, bfd_mach_avr5
},
124 {"atmega164p", AVR_ISA_M323
, bfd_mach_avr5
},
125 {"atmega165", AVR_ISA_M323
, bfd_mach_avr5
},
126 {"atmega165p", AVR_ISA_M323
, bfd_mach_avr5
},
127 {"atmega168", AVR_ISA_M323
, bfd_mach_avr5
},
128 {"atmega169", AVR_ISA_M323
, bfd_mach_avr5
},
129 {"atmega169p", AVR_ISA_M323
, bfd_mach_avr5
},
130 {"atmega32", AVR_ISA_M323
, bfd_mach_avr5
},
131 {"atmega323", AVR_ISA_M323
, bfd_mach_avr5
},
132 {"atmega324p", AVR_ISA_M323
, bfd_mach_avr5
},
133 {"atmega325", AVR_ISA_M323
, bfd_mach_avr5
},
134 {"atmega325p", AVR_ISA_M323
, bfd_mach_avr5
},
135 {"atmega329", AVR_ISA_M323
, bfd_mach_avr5
},
136 {"atmega329p", AVR_ISA_M323
, bfd_mach_avr5
},
137 {"atmega3250", AVR_ISA_M323
, bfd_mach_avr5
},
138 {"atmega3250p",AVR_ISA_M323
, bfd_mach_avr5
},
139 {"atmega3290", AVR_ISA_M323
, bfd_mach_avr5
},
140 {"atmega3290p",AVR_ISA_M323
, bfd_mach_avr5
},
141 {"atmega406", AVR_ISA_M323
, bfd_mach_avr5
},
142 {"atmega64", AVR_ISA_M323
, bfd_mach_avr5
},
143 {"atmega640", AVR_ISA_M323
, bfd_mach_avr5
},
144 {"atmega644", AVR_ISA_M323
, bfd_mach_avr5
},
145 {"atmega644p", AVR_ISA_M323
, bfd_mach_avr5
},
146 {"atmega128", AVR_ISA_M128
, bfd_mach_avr5
},
147 {"atmega1280", AVR_ISA_M128
, bfd_mach_avr5
},
148 {"atmega1281", AVR_ISA_M128
, bfd_mach_avr5
},
149 {"atmega645", AVR_ISA_M323
, bfd_mach_avr5
},
150 {"atmega649", AVR_ISA_M323
, bfd_mach_avr5
},
151 {"atmega6450", AVR_ISA_M323
, bfd_mach_avr5
},
152 {"atmega6490", AVR_ISA_M323
, bfd_mach_avr5
},
153 {"atmega16hva",AVR_ISA_M323
, bfd_mach_avr5
},
154 {"at90can32" , AVR_ISA_M323
, bfd_mach_avr5
},
155 {"at90can64" , AVR_ISA_M323
, bfd_mach_avr5
},
156 {"at90can128", AVR_ISA_M128
, bfd_mach_avr5
},
157 {"at90pwm216", AVR_ISA_M323
, bfd_mach_avr5
},
158 {"at90pwm316", AVR_ISA_M323
, bfd_mach_avr5
},
159 {"at90usb82", AVR_ISA_M323
, bfd_mach_avr5
},
160 {"at90usb162", AVR_ISA_M323
, bfd_mach_avr5
},
161 {"at90usb646", AVR_ISA_M323
, bfd_mach_avr5
},
162 {"at90usb647", AVR_ISA_M323
, bfd_mach_avr5
},
163 {"at90usb1286",AVR_ISA_M128
, bfd_mach_avr5
},
164 {"at90usb1287",AVR_ISA_M128
, bfd_mach_avr5
},
165 {"at94k", AVR_ISA_94K
, bfd_mach_avr5
},
166 {"atmega2560", AVR_ISA_ALL
, bfd_mach_avr6
},
167 {"atmega2561", AVR_ISA_ALL
, bfd_mach_avr6
},
171 /* Current MCU type. */
172 static struct mcu_type_s default_mcu
= {"avr2", AVR_ISA_2xxx
,bfd_mach_avr2
};
173 static struct mcu_type_s
* avr_mcu
= & default_mcu
;
175 /* AVR target-specific switches. */
178 int all_opcodes
; /* -mall-opcodes: accept all known AVR opcodes. */
179 int no_skip_bug
; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
180 int no_wrap
; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
183 static struct avr_opt_s avr_opt
= { 0, 0, 0 };
185 const char EXP_CHARS
[] = "eE";
186 const char FLT_CHARS
[] = "dD";
188 static void avr_set_arch (int);
190 /* The target specific pseudo-ops which we support. */
191 const pseudo_typeS md_pseudo_table
[] =
193 {"arch", avr_set_arch
, 0},
197 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
199 #define EXP_MOD_NAME(i) exp_mod[i].name
200 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
201 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
202 #define HAVE_PM_P(i) exp_mod[i].have_pm
207 bfd_reloc_code_real_type reloc
;
208 bfd_reloc_code_real_type neg_reloc
;
212 static struct exp_mod_s exp_mod
[] =
214 {"hh8", BFD_RELOC_AVR_HH8_LDI
, BFD_RELOC_AVR_HH8_LDI_NEG
, 1},
215 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM
, BFD_RELOC_AVR_HH8_LDI_PM_NEG
, 0},
216 {"hi8", BFD_RELOC_AVR_HI8_LDI
, BFD_RELOC_AVR_HI8_LDI_NEG
, 1},
217 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM
, BFD_RELOC_AVR_HI8_LDI_PM_NEG
, 0},
218 {"lo8", BFD_RELOC_AVR_LO8_LDI
, BFD_RELOC_AVR_LO8_LDI_NEG
, 1},
219 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM
, BFD_RELOC_AVR_LO8_LDI_PM_NEG
, 0},
220 {"hlo8", BFD_RELOC_AVR_HH8_LDI
, BFD_RELOC_AVR_HH8_LDI_NEG
, 0},
221 {"hhi8", BFD_RELOC_AVR_MS8_LDI
, BFD_RELOC_AVR_MS8_LDI_NEG
, 0},
224 /* A union used to store indicies into the exp_mod[] array
225 in a hash table which expects void * data types. */
232 /* Opcode hash table. */
233 static struct hash_control
*avr_hash
;
235 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
236 static struct hash_control
*avr_mod_hash
;
238 #define OPTION_MMCU 'm'
241 OPTION_ALL_OPCODES
= OPTION_MD_BASE
+ 1,
246 struct option md_longopts
[] =
248 { "mmcu", required_argument
, NULL
, OPTION_MMCU
},
249 { "mall-opcodes", no_argument
, NULL
, OPTION_ALL_OPCODES
},
250 { "mno-skip-bug", no_argument
, NULL
, OPTION_NO_SKIP_BUG
},
251 { "mno-wrap", no_argument
, NULL
, OPTION_NO_WRAP
},
252 { NULL
, no_argument
, NULL
, 0 }
255 size_t md_longopts_size
= sizeof (md_longopts
);
257 /* Display nicely formatted list of known MCU names. */
260 show_mcu_list (FILE *stream
)
264 fprintf (stream
, _("Known MCU names:"));
267 for (i
= 0; mcu_types
[i
].name
; i
++)
269 int len
= strlen (mcu_types
[i
].name
);
274 fprintf (stream
, " %s", mcu_types
[i
].name
);
277 fprintf (stream
, "\n %s", mcu_types
[i
].name
);
282 fprintf (stream
, "\n");
288 while (*s
== ' ' || *s
== '\t')
293 /* Extract one word from FROM and copy it to TO. */
296 extract_word (char *from
, char *to
, int limit
)
302 /* Drop leading whitespace. */
303 from
= skip_space (from
);
306 /* Find the op code end. */
307 for (op_start
= op_end
= from
; *op_end
!= 0 && is_part_of_name (*op_end
);)
309 to
[size
++] = *op_end
++;
310 if (size
+ 1 >= limit
)
319 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
320 asection
*seg ATTRIBUTE_UNUSED
)
327 md_show_usage (FILE *stream
)
331 " -mmcu=[avr-name] select microcontroller variant\n"
332 " [avr-name] can be:\n"
333 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
334 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
335 " avr3 - ATmega103, ATmega603\n"
336 " avr4 - ATmega83, ATmega85\n"
337 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
338 " or immediate microcontroller name.\n"));
340 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
341 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
342 " (default for avr4, avr5)\n"
343 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
344 " (default for avr3, avr5)\n"));
345 show_mcu_list (stream
);
349 avr_set_arch (int dummy ATTRIBUTE_UNUSED
)
353 input_line_pointer
= extract_word (input_line_pointer
, str
, 20);
354 md_parse_option (OPTION_MMCU
, str
);
355 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, avr_mcu
->mach
);
359 md_parse_option (int c
, char *arg
)
366 char *s
= alloca (strlen (arg
) + 1);
373 *t
= TOLOWER (*arg1
++);
377 for (i
= 0; mcu_types
[i
].name
; ++i
)
378 if (strcmp (mcu_types
[i
].name
, s
) == 0)
381 if (!mcu_types
[i
].name
)
383 show_mcu_list (stderr
);
384 as_fatal (_("unknown MCU: %s\n"), arg
);
387 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
388 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
389 as .arch ... in the asm output at the same time. */
390 if (avr_mcu
== &default_mcu
|| avr_mcu
->mach
== mcu_types
[i
].mach
)
391 avr_mcu
= &mcu_types
[i
];
393 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
394 avr_mcu
->name
, mcu_types
[i
].name
);
397 case OPTION_ALL_OPCODES
:
398 avr_opt
.all_opcodes
= 1;
400 case OPTION_NO_SKIP_BUG
:
401 avr_opt
.no_skip_bug
= 1;
412 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
418 md_atof (int type
, char *litP
, int *sizeP
)
420 return ieee_md_atof (type
, litP
, sizeP
, FALSE
);
424 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
425 asection
*sec ATTRIBUTE_UNUSED
,
426 fragS
*fragP ATTRIBUTE_UNUSED
)
435 struct avr_opcodes_s
*opcode
;
437 avr_hash
= hash_new ();
439 /* Insert unique names into hash table. This hash table then provides a
440 quick index to the first opcode with a particular name in the opcode
442 for (opcode
= avr_opcodes
; opcode
->name
; opcode
++)
443 hash_insert (avr_hash
, opcode
->name
, (char *) opcode
);
445 avr_mod_hash
= hash_new ();
447 for (i
= 0; i
< ARRAY_SIZE (exp_mod
); ++i
)
452 hash_insert (avr_mod_hash
, EXP_MOD_NAME (i
), m
.ptr
);
455 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, avr_mcu
->mach
);
458 /* Resolve STR as a constant expression and return the result.
459 If result greater than MAX then error. */
462 avr_get_constant (char *str
, int max
)
466 str
= skip_space (str
);
467 input_line_pointer
= str
;
470 if (ex
.X_op
!= O_constant
)
471 as_bad (_("constant value required"));
473 if (ex
.X_add_number
> max
|| ex
.X_add_number
< 0)
474 as_bad (_("number must be positive and less than %d"), max
+ 1);
476 return ex
.X_add_number
;
479 /* Parse for ldd/std offset. */
482 avr_offset_expression (expressionS
*exp
)
484 char *str
= input_line_pointer
;
489 str
= extract_word (str
, op
, sizeof (op
));
491 input_line_pointer
= tmp
;
494 /* Warn about expressions that fail to use lo8 (). */
495 if (exp
->X_op
== O_constant
)
497 int x
= exp
->X_add_number
;
499 if (x
< -255 || x
> 255)
500 as_warn (_("constant out of 8-bit range: %d"), x
);
504 /* Parse ordinary expression. */
507 parse_exp (char *s
, expressionS
*op
)
509 input_line_pointer
= s
;
511 if (op
->X_op
== O_absent
)
512 as_bad (_("missing operand"));
513 return input_line_pointer
;
516 /* Parse special expressions (needed for LDI command):
521 where xx is: hh, hi, lo. */
523 static bfd_reloc_code_real_type
524 avr_ldi_expression (expressionS
*exp
)
526 char *str
= input_line_pointer
;
530 int linker_stubs_should_be_generated
= 0;
534 str
= extract_word (str
, op
, sizeof (op
));
540 m
.ptr
= hash_find (avr_mod_hash
, op
);
548 str
= skip_space (str
);
552 bfd_reloc_code_real_type reloc_to_return
;
557 if (strncmp ("pm(", str
, 3) == 0
558 || strncmp ("gs(",str
,3) == 0
559 || strncmp ("-(gs(",str
,5) == 0
560 || strncmp ("-(pm(", str
, 5) == 0)
568 as_bad (_("illegal expression"));
570 if (str
[0] == 'g' || str
[2] == 'g')
571 linker_stubs_should_be_generated
= 1;
583 if (*str
== '-' && *(str
+ 1) == '(')
590 input_line_pointer
= str
;
595 if (*input_line_pointer
!= ')')
597 as_bad (_("`)' required"));
600 input_line_pointer
++;
605 neg_p
? EXP_MOD_NEG_RELOC (mod
) : EXP_MOD_RELOC (mod
);
606 if (linker_stubs_should_be_generated
)
608 switch (reloc_to_return
)
610 case BFD_RELOC_AVR_LO8_LDI_PM
:
611 reloc_to_return
= BFD_RELOC_AVR_LO8_LDI_GS
;
613 case BFD_RELOC_AVR_HI8_LDI_PM
:
614 reloc_to_return
= BFD_RELOC_AVR_HI8_LDI_GS
;
618 as_warn (_("expression dangerous with linker stubs"));
621 return reloc_to_return
;
626 input_line_pointer
= tmp
;
629 /* Warn about expressions that fail to use lo8 (). */
630 if (exp
->X_op
== O_constant
)
632 int x
= exp
->X_add_number
;
634 if (x
< -255 || x
> 255)
635 as_warn (_("constant out of 8-bit range: %d"), x
);
638 return BFD_RELOC_AVR_LDI
;
641 /* Parse one instruction operand.
642 Return operand bitmask. Also fixups can be generated. */
645 avr_operand (struct avr_opcodes_s
*opcode
,
651 unsigned int op_mask
= 0;
652 char *str
= skip_space (*line
);
656 /* Any register operand. */
662 if (*str
== 'r' || *str
== 'R')
666 str
= extract_word (str
, r_name
, sizeof (r_name
));
668 if (ISDIGIT (r_name
[1]))
670 if (r_name
[2] == '\0')
671 op_mask
= r_name
[1] - '0';
672 else if (r_name
[1] != '0'
673 && ISDIGIT (r_name
[2])
674 && r_name
[3] == '\0')
675 op_mask
= (r_name
[1] - '0') * 10 + r_name
[2] - '0';
680 op_mask
= avr_get_constant (str
, 31);
681 str
= input_line_pointer
;
689 if (op_mask
< 16 || op_mask
> 23)
690 as_bad (_("register r16-r23 required"));
696 as_bad (_("register number above 15 required"));
702 as_bad (_("even register number required"));
707 if ((op_mask
& 1) || op_mask
< 24)
708 as_bad (_("register r24, r26, r28 or r30 required"));
709 op_mask
= (op_mask
- 24) >> 1;
714 as_bad (_("register name or number from 0 to 31 required"));
723 str
= skip_space (str
+ 1);
732 as_bad (_("pointer register (X, Y or Z) required"));
734 str
= skip_space (str
+ 1);
739 as_bad (_("cannot both predecrement and postincrement"));
743 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
744 registers, no predecrement, no postincrement. */
745 if (!avr_opt
.all_opcodes
&& (op_mask
& 0x100F)
746 && !(avr_mcu
->isa
& AVR_ISA_SRAM
))
747 as_bad (_("addressing mode not supported"));
753 as_bad (_("can't predecrement"));
755 if (! (*str
== 'z' || *str
== 'Z'))
756 as_bad (_("pointer register Z required"));
758 str
= skip_space (str
+ 1);
769 char c
= TOLOWER (*str
++);
774 as_bad (_("pointer register (Y or Z) required"));
775 str
= skip_space (str
);
778 input_line_pointer
= str
;
779 avr_offset_expression (& op_expr
);
780 str
= input_line_pointer
;
781 fix_new_exp (frag_now
, where
, 3,
782 &op_expr
, FALSE
, BFD_RELOC_AVR_6
);
788 str
= parse_exp (str
, &op_expr
);
789 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
790 &op_expr
, FALSE
, BFD_RELOC_AVR_CALL
);
794 str
= parse_exp (str
, &op_expr
);
795 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
796 &op_expr
, TRUE
, BFD_RELOC_AVR_13_PCREL
);
800 str
= parse_exp (str
, &op_expr
);
801 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
802 &op_expr
, TRUE
, BFD_RELOC_AVR_7_PCREL
);
806 str
= parse_exp (str
, &op_expr
);
807 fix_new_exp (frag_now
, where
+ 2, opcode
->insn_size
* 2,
808 &op_expr
, FALSE
, BFD_RELOC_16
);
813 bfd_reloc_code_real_type r_type
;
815 input_line_pointer
= str
;
816 r_type
= avr_ldi_expression (&op_expr
);
817 str
= input_line_pointer
;
818 fix_new_exp (frag_now
, where
, 3,
819 &op_expr
, FALSE
, r_type
);
827 x
= ~avr_get_constant (str
, 255);
828 str
= input_line_pointer
;
829 op_mask
|= (x
& 0xf) | ((x
<< 4) & 0xf00);
834 input_line_pointer
= str
;
835 avr_offset_expression (& op_expr
);
836 str
= input_line_pointer
;
837 fix_new_exp (frag_now
, where
, 3,
838 & op_expr
, FALSE
, BFD_RELOC_AVR_6_ADIW
);
846 x
= avr_get_constant (str
, 7);
847 str
= input_line_pointer
;
858 x
= avr_get_constant (str
, 63);
859 str
= input_line_pointer
;
860 op_mask
|= (x
& 0xf) | ((x
& 0x30) << 5);
868 x
= avr_get_constant (str
, 31);
869 str
= input_line_pointer
;
878 as_bad (_("unknown constraint `%c'"), *op
);
885 /* Parse instruction operands.
886 Return binary opcode. */
889 avr_operands (struct avr_opcodes_s
*opcode
, char **line
)
891 char *op
= opcode
->constraints
;
892 unsigned int bin
= opcode
->bin_opcode
;
893 char *frag
= frag_more (opcode
->insn_size
* 2);
895 int where
= frag
- frag_now
->fr_literal
;
896 static unsigned int prev
= 0; /* Previous opcode. */
898 /* Opcode have operands. */
901 unsigned int reg1
= 0;
902 unsigned int reg2
= 0;
903 int reg1_present
= 0;
904 int reg2_present
= 0;
906 /* Parse first operand. */
907 if (REGISTER_P (*op
))
909 reg1
= avr_operand (opcode
, where
, op
, &str
);
912 /* Parse second operand. */
925 if (REGISTER_P (*op
))
928 str
= skip_space (str
);
930 as_bad (_("`,' required"));
931 str
= skip_space (str
);
933 reg2
= avr_operand (opcode
, where
, op
, &str
);
936 if (reg1_present
&& reg2_present
)
937 reg2
= (reg2
& 0xf) | ((reg2
<< 5) & 0x200);
938 else if (reg2_present
)
946 /* Detect undefined combinations (like ld r31,Z+). */
947 if (!avr_opt
.all_opcodes
&& AVR_UNDEF_P (bin
))
948 as_warn (_("undefined combination of operands"));
950 if (opcode
->insn_size
== 2)
952 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
953 (AVR core bug, fixed in the newer devices). */
954 if (!(avr_opt
.no_skip_bug
||
955 (avr_mcu
->isa
& (AVR_ISA_MUL
| AVR_ISA_MOVW
)))
956 && AVR_SKIP_P (prev
))
957 as_warn (_("skipping two-word instruction"));
959 bfd_putl32 ((bfd_vma
) bin
, frag
);
962 bfd_putl16 ((bfd_vma
) bin
, frag
);
969 /* GAS will call this function for each section at the end of the assembly,
970 to permit the CPU backend to adjust the alignment of a section. */
973 md_section_align (asection
*seg
, valueT addr
)
975 int align
= bfd_get_section_alignment (stdoutput
, seg
);
976 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
979 /* If you define this macro, it should return the offset between the
980 address of a PC relative fixup and the position from which the PC
981 relative adjustment should be made. On many processors, the base
982 of a PC relative instruction is the next instruction, so this
983 macro would return the length of an instruction. */
986 md_pcrel_from_section (fixS
*fixp
, segT sec
)
988 if (fixp
->fx_addsy
!= (symbolS
*) NULL
989 && (!S_IS_DEFINED (fixp
->fx_addsy
)
990 || (S_GET_SEGMENT (fixp
->fx_addsy
) != sec
)))
993 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
996 /* GAS will call this for each fixup. It should store the correct
997 value in the object file. */
1000 md_apply_fix (fixS
*fixP
, valueT
* valP
, segT seg
)
1002 unsigned char *where
;
1006 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
1009 else if (fixP
->fx_pcrel
)
1011 segT s
= S_GET_SEGMENT (fixP
->fx_addsy
);
1013 if (s
== seg
|| s
== absolute_section
)
1015 value
+= S_GET_VALUE (fixP
->fx_addsy
);
1020 /* We don't actually support subtracting a symbol. */
1021 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
1022 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
1024 switch (fixP
->fx_r_type
)
1027 fixP
->fx_no_overflow
= 1;
1029 case BFD_RELOC_AVR_7_PCREL
:
1030 case BFD_RELOC_AVR_13_PCREL
:
1033 case BFD_RELOC_AVR_CALL
:
1039 /* Fetch the instruction, insert the fully resolved operand
1040 value, and stuff the instruction back again. */
1041 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1042 insn
= bfd_getl16 (where
);
1044 switch (fixP
->fx_r_type
)
1046 case BFD_RELOC_AVR_7_PCREL
:
1048 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1049 _("odd address operand: %ld"), value
);
1051 /* Instruction addresses are always right-shifted by 1. */
1053 --value
; /* Correct PC. */
1055 if (value
< -64 || value
> 63)
1056 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1057 _("operand out of range: %ld"), value
);
1058 value
= (value
<< 3) & 0x3f8;
1059 bfd_putl16 ((bfd_vma
) (value
| insn
), where
);
1062 case BFD_RELOC_AVR_13_PCREL
:
1064 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1065 _("odd address operand: %ld"), value
);
1067 /* Instruction addresses are always right-shifted by 1. */
1069 --value
; /* Correct PC. */
1071 if (value
< -2048 || value
> 2047)
1073 /* No wrap for devices with >8K of program memory. */
1074 if ((avr_mcu
->isa
& AVR_ISA_MEGA
) || avr_opt
.no_wrap
)
1075 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1076 _("operand out of range: %ld"), value
);
1080 bfd_putl16 ((bfd_vma
) (value
| insn
), where
);
1084 bfd_putl16 ((bfd_vma
) value
, where
);
1088 bfd_putl16 ((bfd_vma
) value
, where
);
1091 case BFD_RELOC_AVR_16_PM
:
1092 bfd_putl16 ((bfd_vma
) (value
>> 1), where
);
1095 case BFD_RELOC_AVR_LDI
:
1097 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1098 _("operand out of range: %ld"), value
);
1099 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
), where
);
1102 case BFD_RELOC_AVR_6
:
1103 if ((value
> 63) || (value
< 0))
1104 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1105 _("operand out of range: %ld"), value
);
1106 bfd_putl16 ((bfd_vma
) insn
| ((value
& 7) | ((value
& (3 << 3)) << 7) | ((value
& (1 << 5)) << 8)), where
);
1109 case BFD_RELOC_AVR_6_ADIW
:
1110 if ((value
> 63) || (value
< 0))
1111 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1112 _("operand out of range: %ld"), value
);
1113 bfd_putl16 ((bfd_vma
) insn
| (value
& 0xf) | ((value
& 0x30) << 2), where
);
1116 case BFD_RELOC_AVR_LO8_LDI
:
1117 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
), where
);
1120 case BFD_RELOC_AVR_HI8_LDI
:
1121 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 8), where
);
1124 case BFD_RELOC_AVR_MS8_LDI
:
1125 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 24), where
);
1128 case BFD_RELOC_AVR_HH8_LDI
:
1129 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 16), where
);
1132 case BFD_RELOC_AVR_LO8_LDI_NEG
:
1133 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
), where
);
1136 case BFD_RELOC_AVR_HI8_LDI_NEG
:
1137 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 8), where
);
1140 case BFD_RELOC_AVR_MS8_LDI_NEG
:
1141 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 24), where
);
1144 case BFD_RELOC_AVR_HH8_LDI_NEG
:
1145 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 16), where
);
1148 case BFD_RELOC_AVR_LO8_LDI_PM
:
1149 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 1), where
);
1152 case BFD_RELOC_AVR_HI8_LDI_PM
:
1153 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 9), where
);
1156 case BFD_RELOC_AVR_HH8_LDI_PM
:
1157 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 17), where
);
1160 case BFD_RELOC_AVR_LO8_LDI_PM_NEG
:
1161 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 1), where
);
1164 case BFD_RELOC_AVR_HI8_LDI_PM_NEG
:
1165 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 9), where
);
1168 case BFD_RELOC_AVR_HH8_LDI_PM_NEG
:
1169 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 17), where
);
1172 case BFD_RELOC_AVR_CALL
:
1176 x
= bfd_getl16 (where
);
1178 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1179 _("odd address operand: %ld"), value
);
1181 x
|= ((value
& 0x10000) | ((value
<< 3) & 0x1f00000)) >> 16;
1182 bfd_putl16 ((bfd_vma
) x
, where
);
1183 bfd_putl16 ((bfd_vma
) (value
& 0xffff), where
+ 2);
1188 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1189 fixP
->fx_line
, fixP
->fx_r_type
);
1195 switch (fixP
->fx_r_type
)
1197 case -BFD_RELOC_AVR_HI8_LDI_NEG
:
1198 case -BFD_RELOC_AVR_HI8_LDI
:
1199 case -BFD_RELOC_AVR_LO8_LDI_NEG
:
1200 case -BFD_RELOC_AVR_LO8_LDI
:
1201 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1202 _("only constant expression allowed"));
1211 /* GAS will call this to generate a reloc, passing the resulting reloc
1212 to `bfd_install_relocation'. This currently works poorly, as
1213 `bfd_install_relocation' often does the wrong thing, and instances of
1214 `tc_gen_reloc' have been written to work around the problems, which
1215 in turns makes it difficult to fix `bfd_install_relocation'. */
1217 /* If while processing a fixup, a reloc really needs to be created
1218 then it is done here. */
1221 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
,
1226 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
1230 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
1231 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
1233 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1234 "Difference of symbols in different sections is not supported");
1238 /* We are dealing with two symbols defined in the same section.
1239 Let us fix-up them here. */
1240 value
+= S_GET_VALUE (fixp
->fx_addsy
);
1241 value
-= S_GET_VALUE (fixp
->fx_subsy
);
1243 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1244 only takes it's second operands for the fixup value. */
1245 fixp
->fx_addsy
= NULL
;
1246 fixp
->fx_subsy
= NULL
;
1247 md_apply_fix (fixp
, (valueT
*) &value
, NULL
);
1252 reloc
= xmalloc (sizeof (arelent
));
1254 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
1255 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1257 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1258 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1259 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
1261 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1262 _("reloc %d not supported by object file format"),
1263 (int) fixp
->fx_r_type
);
1267 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1268 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
1269 reloc
->address
= fixp
->fx_offset
;
1271 reloc
->addend
= fixp
->fx_offset
;
1277 md_assemble (char *str
)
1279 struct avr_opcodes_s
*opcode
;
1282 str
= skip_space (extract_word (str
, op
, sizeof (op
)));
1285 as_bad (_("can't find opcode "));
1287 opcode
= (struct avr_opcodes_s
*) hash_find (avr_hash
, op
);
1291 as_bad (_("unknown opcode `%s'"), op
);
1295 /* Special case for opcodes with optional operands (lpm, elpm) -
1296 version with operands exists in avr_opcodes[] in the next entry. */
1298 if (*str
&& *opcode
->constraints
== '?')
1301 if (!avr_opt
.all_opcodes
&& (opcode
->isa
& avr_mcu
->isa
) != opcode
->isa
)
1302 as_bad (_("illegal opcode %s for mcu %s"), opcode
->name
, avr_mcu
->name
);
1304 /* We used to set input_line_pointer to the result of get_operands,
1305 but that is wrong. Our caller assumes we don't change it. */
1307 char *t
= input_line_pointer
;
1309 avr_operands (opcode
, &str
);
1310 if (*skip_space (str
))
1311 as_bad (_("garbage at end of line"));
1312 input_line_pointer
= t
;
1316 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1317 `avr_cons_fix_new'. */
1318 static int exp_mod_pm
= 0;
1320 /* Parse special CONS expression: pm (expression)
1321 or alternatively: gs (expression).
1322 These are used for addressing program memory.
1323 Relocation: BFD_RELOC_AVR_16_PM. */
1326 avr_parse_cons_expression (expressionS
*exp
, int nbytes
)
1332 tmp
= input_line_pointer
= skip_space (input_line_pointer
);
1336 char *pm_name1
= "pm";
1337 char *pm_name2
= "gs";
1338 int len
= strlen (pm_name1
);
1339 /* len must be the same for both pm identifiers. */
1341 if (strncasecmp (input_line_pointer
, pm_name1
, len
) == 0
1342 || strncasecmp (input_line_pointer
, pm_name2
, len
) == 0)
1344 input_line_pointer
= skip_space (input_line_pointer
+ len
);
1346 if (*input_line_pointer
== '(')
1348 input_line_pointer
= skip_space (input_line_pointer
+ 1);
1352 if (*input_line_pointer
== ')')
1353 ++input_line_pointer
;
1356 as_bad (_("`)' required"));
1363 input_line_pointer
= tmp
;
1371 avr_cons_fix_new (fragS
*frag
,
1376 if (exp_mod_pm
== 0)
1379 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_16
);
1380 else if (nbytes
== 4)
1381 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_32
);
1383 as_bad (_("illegal %srelocation size: %d"), "", nbytes
);
1388 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_AVR_16_PM
);
1390 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes
);