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[deliverable/binutils-gdb.git] / gas / config / tc-avr.c
1 /* tc-avr.c -- Assembler code for the ATMEL AVR
2
3 Copyright (C) 1999-2014 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
22
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "dwarf2dbg.h"
27 #include "dw2gencfi.h"
28
29
30 struct avr_opcodes_s
31 {
32 char * name;
33 char * constraints;
34 char * opcode;
35 int insn_size; /* In words. */
36 int isa;
37 unsigned int bin_opcode;
38 };
39
40 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
41 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
42
43 struct avr_opcodes_s avr_opcodes[] =
44 {
45 #include "opcode/avr.h"
46 {NULL, NULL, NULL, 0, 0, 0}
47 };
48
49 const char comment_chars[] = ";";
50 const char line_comment_chars[] = "#";
51 const char line_separator_chars[] = "$";
52
53 const char *md_shortopts = "m:";
54 struct mcu_type_s
55 {
56 char *name;
57 int isa;
58 int mach;
59 };
60
61 /* XXX - devices that don't seem to exist (renamed, replaced with larger
62 ones, or planned but never produced), left here for compatibility. */
63
64 static struct mcu_type_s mcu_types[] =
65 {
66 {"avr1", AVR_ISA_AVR1, bfd_mach_avr1},
67 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
68 but set to AVR_ISA_AVR25 for some following version
69 of GCC (from 4.3) for backward compatibility. */
70 {"avr2", AVR_ISA_AVR25, bfd_mach_avr2},
71 {"avr25", AVR_ISA_AVR25, bfd_mach_avr25},
72 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
73 but set to AVR_ISA_AVR3_ALL for some following version
74 of GCC (from 4.3) for backward compatibility. */
75 {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3},
76 {"avr31", AVR_ISA_AVR31, bfd_mach_avr31},
77 {"avr35", AVR_ISA_AVR35, bfd_mach_avr35},
78 {"avr4", AVR_ISA_AVR4, bfd_mach_avr4},
79 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
80 but set to AVR_ISA_AVR51 for some following version
81 of GCC (from 4.3) for backward compatibility. */
82 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
83 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
84 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
85 {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1},
86 {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
87 {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3},
88 {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
89 {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
90 {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
91 {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
92 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
93 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
94 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
95 {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1},
96 {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1},
97 {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2},
98 {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2},
99 {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */
100 {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2},
101 {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */
102 {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2},
103 {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */
104 {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2},
105 {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */
106 {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2},
107 {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2},
108 {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2},
109 {"ata5272", AVR_ISA_AVR25, bfd_mach_avr25},
110 {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25},
111 {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25},
112 {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25},
113 {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25},
114 {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25},
115 {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25},
116 {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25},
117 {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25},
118 {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25},
119 {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25},
120 {"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25},
121 {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25},
122 {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25},
123 {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25},
124 {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25},
125 {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25},
126 {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25},
127 {"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25},
128 {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25},
129 {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25},
130 {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25},
131 {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25},
132 {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25},
133 {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25},
134 {"attiny828", AVR_ISA_AVR25, bfd_mach_avr25},
135 {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25},
136 {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3},
137 {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3},
138 {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31},
139 {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31},
140 {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35},
141 {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35},
142 {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35},
143 {"ata5505", AVR_ISA_AVR35, bfd_mach_avr35},
144 {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35},
145 {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35},
146 {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35},
147 {"attiny1634", AVR_ISA_AVR35, bfd_mach_avr35},
148 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
149 {"ata6289", AVR_ISA_AVR4, bfd_mach_avr4},
150 {"atmega8a", AVR_ISA_M8, bfd_mach_avr4},
151 {"ata6285", AVR_ISA_AVR4, bfd_mach_avr4},
152 {"ata6286", AVR_ISA_AVR4, bfd_mach_avr4},
153 {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4},
154 {"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4},
155 {"atmega48pa", AVR_ISA_AVR4, bfd_mach_avr4},
156 {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4},
157 {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4},
158 {"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4},
159 {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4},
160 {"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4},
161 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
162 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
163 {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4},
164 {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4},
165 {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4},
166 {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4},
167 {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4},
168 {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4},
169 {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4},
170 {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5},
171 {"ata5790", AVR_ISA_AVR5, bfd_mach_avr5},
172 {"ata5795", AVR_ISA_AVR5, bfd_mach_avr5},
173 {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5},
174 {"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5},
175 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
176 {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5},
177 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
178 {"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5},
179 {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5},
180 {"atmega164pa",AVR_ISA_AVR5, bfd_mach_avr5},
181 {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5},
182 {"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5},
183 {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5},
184 {"atmega165pa",AVR_ISA_AVR5, bfd_mach_avr5},
185 {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5},
186 {"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5},
187 {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5},
188 {"atmega168pa",AVR_ISA_AVR5, bfd_mach_avr5},
189 {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5},
190 {"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5},
191 {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5},
192 {"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5},
193 {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5},
194 {"atmega32a", AVR_ISA_AVR5, bfd_mach_avr5},
195 {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5},
196 {"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5},
197 {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5},
198 {"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5},
199 {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5},
200 {"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5},
201 {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5},
202 {"atmega325pa",AVR_ISA_AVR5, bfd_mach_avr5},
203 {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5},
204 {"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5},
205 {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5},
206 {"atmega3250pa",AVR_ISA_AVR5, bfd_mach_avr5},
207 {"atmega328", AVR_ISA_AVR5, bfd_mach_avr5},
208 {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5},
209 {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5},
210 {"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5},
211 {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5},
212 {"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5},
213 {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5},
214 {"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5},
215 {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5},
216 {"atmega3290pa",AVR_ISA_AVR5, bfd_mach_avr5},
217 {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5},
218 {"atmega64rfr2", AVR_ISA_AVR5, bfd_mach_avr5},
219 {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5},
220 {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5},
221 {"atmega64a", AVR_ISA_AVR5, bfd_mach_avr5},
222 {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5},
223 {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5},
224 {"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5},
225 {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5},
226 {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5},
227 {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5},
228 {"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5},
229 {"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5},
230 {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5},
231 {"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5},
232 {"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5},
233 {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5},
234 {"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5},
235 {"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5},
236 {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5},
237 {"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5},
238 {"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5},
239 {"atmega64rfr2",AVR_ISA_AVR5, bfd_mach_avr5},
240 {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5},
241 {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5},
242 {"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5},
243 {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5},
244 {"atmega16hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5},
245 {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5},
246 {"atmega32hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5},
247 {"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5},
248 {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5},
249 {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5},
250 {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5},
251 {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5},
252 {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5},
253 {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5},
254 {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5},
255 {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5},
256 {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5},
257 {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5},
258 {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5},
259 {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5},
260 {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5},
261 {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5},
262 {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5},
263 {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5},
264 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
265 {"m3000", AVR_ISA_AVR5, bfd_mach_avr5},
266 {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51},
267 {"atmega128a", AVR_ISA_AVR51, bfd_mach_avr51},
268 {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51},
269 {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51},
270 {"atmega1284", AVR_ISA_AVR51, bfd_mach_avr51},
271 {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51},
272 {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51},
273 {"atmega128rfr2",AVR_ISA_AVR51, bfd_mach_avr51},
274 {"atmega1284rfr2",AVR_ISA_AVR51, bfd_mach_avr51},
275 {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51},
276 {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51},
277 {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51},
278 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
279 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
280 {"atmega256rfr2", AVR_ISA_AVR6, bfd_mach_avr6},
281 {"atmega2564rfr2", AVR_ISA_AVR6, bfd_mach_avr6},
282 {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
283 {"atxmega16a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega2},
284 {"atxmega16c4", AVR_ISA_XMEGAU, bfd_mach_avrxmega2},
285 {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
286 {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
287 {"atxmega32a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega2},
288 {"atxmega32c4", AVR_ISA_XMEGAU, bfd_mach_avrxmega2},
289 {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
290 {"atxmega32e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
291 {"atxmega16e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
292 {"atxmega8e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
293 {"atxmega32x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
294 {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
295 {"atxmega64a3u",AVR_ISA_XMEGAU, bfd_mach_avrxmega4},
296 {"atxmega64a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega4},
297 {"atxmega64b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega4},
298 {"atxmega64b3", AVR_ISA_XMEGAU, bfd_mach_avrxmega4},
299 {"atxmega64c3", AVR_ISA_XMEGAU, bfd_mach_avrxmega4},
300 {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
301 {"atxmega64d4", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
302 {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
303 {"atxmega64a1u",AVR_ISA_XMEGAU, bfd_mach_avrxmega5},
304 {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
305 {"atxmega128a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
306 {"atxmega128b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
307 {"atxmega128b3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
308 {"atxmega128c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
309 {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
310 {"atxmega128d4", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
311 {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
312 {"atxmega192a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
313 {"atxmega192c3", AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
314 {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
315 {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
316 {"atxmega256a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
317 {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
318 {"atxmega256a3bu",AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
319 {"atxmega256c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
320 {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
321 {"atxmega384c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
322 {"atxmega384d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
323 {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
324 {"atxmega128a1u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7},
325 {"atxmega128a4u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7},
326 {NULL, 0, 0}
327 };
328
329
330 /* Current MCU type. */
331 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
332 static struct mcu_type_s specified_mcu;
333 static struct mcu_type_s * avr_mcu = & default_mcu;
334
335 /* AVR target-specific switches. */
336 struct avr_opt_s
337 {
338 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
339 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
340 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
341 int link_relax; /* -mlink-relax: generate relocations for linker
342 relaxation. */
343 };
344
345 static struct avr_opt_s avr_opt = { 0, 0, 0, 0 };
346
347 const char EXP_CHARS[] = "eE";
348 const char FLT_CHARS[] = "dD";
349
350 static void avr_set_arch (int);
351
352 /* The target specific pseudo-ops which we support. */
353 const pseudo_typeS md_pseudo_table[] =
354 {
355 {"arch", avr_set_arch, 0},
356 { NULL, NULL, 0}
357 };
358
359 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
360
361 #define EXP_MOD_NAME(i) exp_mod[i].name
362 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
363 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
364 #define HAVE_PM_P(i) exp_mod[i].have_pm
365
366 struct exp_mod_s
367 {
368 char * name;
369 bfd_reloc_code_real_type reloc;
370 bfd_reloc_code_real_type neg_reloc;
371 int have_pm;
372 };
373
374 static struct exp_mod_s exp_mod[] =
375 {
376 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
377 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
378 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
379 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
380 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
381 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
382 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
383 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
384 };
385
386 /* A union used to store indicies into the exp_mod[] array
387 in a hash table which expects void * data types. */
388 typedef union
389 {
390 void * ptr;
391 int index;
392 } mod_index;
393
394 /* Opcode hash table. */
395 static struct hash_control *avr_hash;
396
397 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
398 static struct hash_control *avr_mod_hash;
399
400 #define OPTION_MMCU 'm'
401 enum options
402 {
403 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
404 OPTION_NO_SKIP_BUG,
405 OPTION_NO_WRAP,
406 OPTION_ISA_RMW,
407 OPTION_LINK_RELAX
408 };
409
410 struct option md_longopts[] =
411 {
412 { "mmcu", required_argument, NULL, OPTION_MMCU },
413 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
414 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
415 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
416 { "mrmw", no_argument, NULL, OPTION_ISA_RMW },
417 { "mlink-relax", no_argument, NULL, OPTION_LINK_RELAX },
418 { NULL, no_argument, NULL, 0 }
419 };
420
421 size_t md_longopts_size = sizeof (md_longopts);
422
423 /* Display nicely formatted list of known MCU names. */
424
425 static void
426 show_mcu_list (FILE *stream)
427 {
428 int i, x;
429
430 fprintf (stream, _("Known MCU names:"));
431 x = 1000;
432
433 for (i = 0; mcu_types[i].name; i++)
434 {
435 int len = strlen (mcu_types[i].name);
436
437 x += len + 1;
438
439 if (x < 75)
440 fprintf (stream, " %s", mcu_types[i].name);
441 else
442 {
443 fprintf (stream, "\n %s", mcu_types[i].name);
444 x = len + 2;
445 }
446 }
447
448 fprintf (stream, "\n");
449 }
450
451 static inline char *
452 skip_space (char *s)
453 {
454 while (*s == ' ' || *s == '\t')
455 ++s;
456 return s;
457 }
458
459 /* Extract one word from FROM and copy it to TO. */
460
461 static char *
462 extract_word (char *from, char *to, int limit)
463 {
464 char *op_end;
465 int size = 0;
466
467 /* Drop leading whitespace. */
468 from = skip_space (from);
469 *to = 0;
470
471 /* Find the op code end. */
472 for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
473 {
474 to[size++] = *op_end++;
475 if (size + 1 >= limit)
476 break;
477 }
478
479 to[size] = 0;
480 return op_end;
481 }
482
483 int
484 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
485 asection *seg ATTRIBUTE_UNUSED)
486 {
487 abort ();
488 return 0;
489 }
490
491 void
492 md_show_usage (FILE *stream)
493 {
494 fprintf (stream,
495 _("AVR Assembler options:\n"
496 " -mmcu=[avr-name] select microcontroller variant\n"
497 " [avr-name] can be:\n"
498 " avr1 - classic AVR core without data RAM\n"
499 " avr2 - classic AVR core with up to 8K program memory\n"
500 " avr25 - classic AVR core with up to 8K program memory\n"
501 " plus the MOVW instruction\n"
502 " avr3 - classic AVR core with up to 64K program memory\n"
503 " avr31 - classic AVR core with up to 128K program memory\n"
504 " avr35 - classic AVR core with up to 64K program memory\n"
505 " plus the MOVW instruction\n"
506 " avr4 - enhanced AVR core with up to 8K program memory\n"
507 " avr5 - enhanced AVR core with up to 64K program memory\n"
508 " avr51 - enhanced AVR core with up to 128K program memory\n"
509 " avr6 - enhanced AVR core with up to 256K program memory\n"
510 " avrxmega2 - XMEGA, > 8K, < 64K FLASH, < 64K RAM\n"
511 " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
512 " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
513 " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
514 " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
515 " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
516 " or immediate microcontroller name.\n"));
517 fprintf (stream,
518 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
519 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
520 " (default for avr4, avr5)\n"
521 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
522 " (default for avr3, avr5)\n"
523 " -mrmw accept Read-Modify-Write instructions\n"
524 " -mlink-relax generate relocations for linker relaxation\n"
525 ));
526 show_mcu_list (stream);
527 }
528
529 static void
530 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
531 {
532 char str[20];
533
534 input_line_pointer = extract_word (input_line_pointer, str, 20);
535 md_parse_option (OPTION_MMCU, str);
536 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
537 }
538
539 int
540 md_parse_option (int c, char *arg)
541 {
542 switch (c)
543 {
544 case OPTION_MMCU:
545 {
546 int i;
547 char *s = alloca (strlen (arg) + 1);
548
549 {
550 char *t = s;
551 char *arg1 = arg;
552
553 do
554 *t = TOLOWER (*arg1++);
555 while (*t++);
556 }
557
558 for (i = 0; mcu_types[i].name; ++i)
559 if (strcmp (mcu_types[i].name, s) == 0)
560 break;
561
562 if (!mcu_types[i].name)
563 {
564 show_mcu_list (stderr);
565 as_fatal (_("unknown MCU: %s\n"), arg);
566 }
567
568 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
569 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
570 as .arch ... in the asm output at the same time. */
571 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
572 {
573 specified_mcu.name = mcu_types[i].name;
574 specified_mcu.isa |= mcu_types[i].isa;
575 specified_mcu.mach = mcu_types[i].mach;
576 avr_mcu = &specified_mcu;
577 }
578 else
579 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
580 avr_mcu->name, mcu_types[i].name);
581 return 1;
582 }
583 case OPTION_ALL_OPCODES:
584 avr_opt.all_opcodes = 1;
585 return 1;
586 case OPTION_NO_SKIP_BUG:
587 avr_opt.no_skip_bug = 1;
588 return 1;
589 case OPTION_NO_WRAP:
590 avr_opt.no_wrap = 1;
591 return 1;
592 case OPTION_ISA_RMW:
593 specified_mcu.isa |= AVR_ISA_RMW;
594 return 1;
595 case OPTION_LINK_RELAX:
596 avr_opt.link_relax = 1;
597 return 1;
598 }
599
600 return 0;
601 }
602
603 symbolS *
604 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
605 {
606 return NULL;
607 }
608
609 char *
610 md_atof (int type, char *litP, int *sizeP)
611 {
612 return ieee_md_atof (type, litP, sizeP, FALSE);
613 }
614
615 void
616 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
617 asection *sec ATTRIBUTE_UNUSED,
618 fragS *fragP ATTRIBUTE_UNUSED)
619 {
620 abort ();
621 }
622
623 void
624 md_begin (void)
625 {
626 unsigned int i;
627 struct avr_opcodes_s *opcode;
628
629 avr_hash = hash_new ();
630
631 /* Insert unique names into hash table. This hash table then provides a
632 quick index to the first opcode with a particular name in the opcode
633 table. */
634 for (opcode = avr_opcodes; opcode->name; opcode++)
635 hash_insert (avr_hash, opcode->name, (char *) opcode);
636
637 avr_mod_hash = hash_new ();
638
639 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
640 {
641 mod_index m;
642
643 m.index = i + 10;
644 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
645 }
646
647 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
648 linkrelax = avr_opt.link_relax;
649 }
650
651 /* Resolve STR as a constant expression and return the result.
652 If result greater than MAX then error. */
653
654 static unsigned int
655 avr_get_constant (char *str, int max)
656 {
657 expressionS ex;
658
659 str = skip_space (str);
660 input_line_pointer = str;
661 expression (& ex);
662
663 if (ex.X_op != O_constant)
664 as_bad (_("constant value required"));
665
666 if (ex.X_add_number > max || ex.X_add_number < 0)
667 as_bad (_("number must be positive and less than %d"), max + 1);
668
669 return ex.X_add_number;
670 }
671
672 /* Parse for ldd/std offset. */
673
674 static void
675 avr_offset_expression (expressionS *exp)
676 {
677 char *str = input_line_pointer;
678 char *tmp;
679 char op[8];
680
681 tmp = str;
682 str = extract_word (str, op, sizeof (op));
683
684 input_line_pointer = tmp;
685 expression (exp);
686
687 /* Warn about expressions that fail to use lo8 (). */
688 if (exp->X_op == O_constant)
689 {
690 int x = exp->X_add_number;
691
692 if (x < -255 || x > 255)
693 as_warn (_("constant out of 8-bit range: %d"), x);
694 }
695 }
696
697 /* Parse ordinary expression. */
698
699 static char *
700 parse_exp (char *s, expressionS *op)
701 {
702 input_line_pointer = s;
703 expression (op);
704 if (op->X_op == O_absent)
705 as_bad (_("missing operand"));
706 return input_line_pointer;
707 }
708
709 /* Parse special expressions (needed for LDI command):
710 xx8 (address)
711 xx8 (-address)
712 pm_xx8 (address)
713 pm_xx8 (-address)
714 where xx is: hh, hi, lo. */
715
716 static bfd_reloc_code_real_type
717 avr_ldi_expression (expressionS *exp)
718 {
719 char *str = input_line_pointer;
720 char *tmp;
721 char op[8];
722 int mod;
723 int linker_stubs_should_be_generated = 0;
724
725 tmp = str;
726
727 str = extract_word (str, op, sizeof (op));
728
729 if (op[0])
730 {
731 mod_index m;
732
733 m.ptr = hash_find (avr_mod_hash, op);
734 mod = m.index;
735
736 if (mod)
737 {
738 int closes = 0;
739
740 mod -= 10;
741 str = skip_space (str);
742
743 if (*str == '(')
744 {
745 bfd_reloc_code_real_type reloc_to_return;
746 int neg_p = 0;
747
748 ++str;
749
750 if (strncmp ("pm(", str, 3) == 0
751 || strncmp ("gs(",str,3) == 0
752 || strncmp ("-(gs(",str,5) == 0
753 || strncmp ("-(pm(", str, 5) == 0)
754 {
755 if (HAVE_PM_P (mod))
756 {
757 ++mod;
758 ++closes;
759 }
760 else
761 as_bad (_("illegal expression"));
762
763 if (str[0] == 'g' || str[2] == 'g')
764 linker_stubs_should_be_generated = 1;
765
766 if (*str == '-')
767 {
768 neg_p = 1;
769 ++closes;
770 str += 5;
771 }
772 else
773 str += 3;
774 }
775
776 if (*str == '-' && *(str + 1) == '(')
777 {
778 neg_p ^= 1;
779 ++closes;
780 str += 2;
781 }
782
783 input_line_pointer = str;
784 expression (exp);
785
786 do
787 {
788 if (*input_line_pointer != ')')
789 {
790 as_bad (_("`)' required"));
791 break;
792 }
793 input_line_pointer++;
794 }
795 while (closes--);
796
797 reloc_to_return =
798 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
799 if (linker_stubs_should_be_generated)
800 {
801 switch (reloc_to_return)
802 {
803 case BFD_RELOC_AVR_LO8_LDI_PM:
804 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
805 break;
806 case BFD_RELOC_AVR_HI8_LDI_PM:
807 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
808 break;
809
810 default:
811 /* PR 5523: Do not generate a warning here,
812 legitimate code can trigger this case. */
813 break;
814 }
815 }
816 return reloc_to_return;
817 }
818 }
819 }
820
821 input_line_pointer = tmp;
822 expression (exp);
823
824 /* Warn about expressions that fail to use lo8 (). */
825 if (exp->X_op == O_constant)
826 {
827 int x = exp->X_add_number;
828
829 if (x < -255 || x > 255)
830 as_warn (_("constant out of 8-bit range: %d"), x);
831 }
832
833 return BFD_RELOC_AVR_LDI;
834 }
835
836 /* Parse one instruction operand.
837 Return operand bitmask. Also fixups can be generated. */
838
839 static unsigned int
840 avr_operand (struct avr_opcodes_s *opcode,
841 int where,
842 char *op,
843 char **line)
844 {
845 expressionS op_expr;
846 unsigned int op_mask = 0;
847 char *str = skip_space (*line);
848
849 switch (*op)
850 {
851 /* Any register operand. */
852 case 'w':
853 case 'd':
854 case 'r':
855 case 'a':
856 case 'v':
857 if (*str == 'r' || *str == 'R')
858 {
859 char r_name[20];
860
861 str = extract_word (str, r_name, sizeof (r_name));
862 op_mask = 0xff;
863 if (ISDIGIT (r_name[1]))
864 {
865 if (r_name[2] == '\0')
866 op_mask = r_name[1] - '0';
867 else if (r_name[1] != '0'
868 && ISDIGIT (r_name[2])
869 && r_name[3] == '\0')
870 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
871 }
872 }
873 else
874 {
875 op_mask = avr_get_constant (str, 31);
876 str = input_line_pointer;
877 }
878
879 if (op_mask <= 31)
880 {
881 switch (*op)
882 {
883 case 'a':
884 if (op_mask < 16 || op_mask > 23)
885 as_bad (_("register r16-r23 required"));
886 op_mask -= 16;
887 break;
888
889 case 'd':
890 if (op_mask < 16)
891 as_bad (_("register number above 15 required"));
892 op_mask -= 16;
893 break;
894
895 case 'v':
896 if (op_mask & 1)
897 as_bad (_("even register number required"));
898 op_mask >>= 1;
899 break;
900
901 case 'w':
902 if ((op_mask & 1) || op_mask < 24)
903 as_bad (_("register r24, r26, r28 or r30 required"));
904 op_mask = (op_mask - 24) >> 1;
905 break;
906 }
907 break;
908 }
909 as_bad (_("register name or number from 0 to 31 required"));
910 break;
911
912 case 'e':
913 {
914 char c;
915
916 if (*str == '-')
917 {
918 str = skip_space (str + 1);
919 op_mask = 0x1002;
920 }
921 c = TOLOWER (*str);
922 if (c == 'x')
923 op_mask |= 0x100c;
924 else if (c == 'y')
925 op_mask |= 0x8;
926 else if (c != 'z')
927 as_bad (_("pointer register (X, Y or Z) required"));
928
929 str = skip_space (str + 1);
930 if (*str == '+')
931 {
932 ++str;
933 if (op_mask & 2)
934 as_bad (_("cannot both predecrement and postincrement"));
935 op_mask |= 0x1001;
936 }
937
938 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
939 registers, no predecrement, no postincrement. */
940 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
941 && !(avr_mcu->isa & AVR_ISA_SRAM))
942 as_bad (_("addressing mode not supported"));
943 }
944 break;
945
946 case 'z':
947 if (*str == '-')
948 as_bad (_("can't predecrement"));
949
950 if (! (*str == 'z' || *str == 'Z'))
951 as_bad (_("pointer register Z required"));
952
953 str = skip_space (str + 1);
954
955 if (*str == '+')
956 {
957 ++str;
958 char *s;
959 for (s = opcode->opcode; *s; ++s)
960 {
961 if (*s == '+')
962 op_mask |= (1 << (15 - (s - opcode->opcode)));
963 }
964 }
965
966 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
967 if (!avr_opt.all_opcodes
968 && (op_mask & 0x0001)
969 && !(avr_mcu->isa & AVR_ISA_MOVW))
970 as_bad (_("postincrement not supported"));
971 break;
972
973 case 'b':
974 {
975 char c = TOLOWER (*str++);
976
977 if (c == 'y')
978 op_mask |= 0x8;
979 else if (c != 'z')
980 as_bad (_("pointer register (Y or Z) required"));
981 str = skip_space (str);
982 if (*str++ == '+')
983 {
984 input_line_pointer = str;
985 avr_offset_expression (& op_expr);
986 str = input_line_pointer;
987 fix_new_exp (frag_now, where, 3,
988 &op_expr, FALSE, BFD_RELOC_AVR_6);
989 }
990 }
991 break;
992
993 case 'h':
994 str = parse_exp (str, &op_expr);
995 fix_new_exp (frag_now, where, opcode->insn_size * 2,
996 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
997 break;
998
999 case 'L':
1000 str = parse_exp (str, &op_expr);
1001 fix_new_exp (frag_now, where, opcode->insn_size * 2,
1002 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
1003 break;
1004
1005 case 'l':
1006 str = parse_exp (str, &op_expr);
1007 fix_new_exp (frag_now, where, opcode->insn_size * 2,
1008 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
1009 break;
1010
1011 case 'i':
1012 str = parse_exp (str, &op_expr);
1013 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
1014 &op_expr, FALSE, BFD_RELOC_16);
1015 break;
1016
1017 case 'M':
1018 {
1019 bfd_reloc_code_real_type r_type;
1020
1021 input_line_pointer = str;
1022 r_type = avr_ldi_expression (&op_expr);
1023 str = input_line_pointer;
1024 fix_new_exp (frag_now, where, 3,
1025 &op_expr, FALSE, r_type);
1026 }
1027 break;
1028
1029 case 'n':
1030 {
1031 unsigned int x;
1032
1033 x = ~avr_get_constant (str, 255);
1034 str = input_line_pointer;
1035 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
1036 }
1037 break;
1038
1039 case 'K':
1040 input_line_pointer = str;
1041 avr_offset_expression (& op_expr);
1042 str = input_line_pointer;
1043 fix_new_exp (frag_now, where, 3,
1044 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
1045 break;
1046
1047 case 'S':
1048 case 's':
1049 {
1050 unsigned int x;
1051
1052 x = avr_get_constant (str, 7);
1053 str = input_line_pointer;
1054 if (*op == 'S')
1055 x <<= 4;
1056 op_mask |= x;
1057 }
1058 break;
1059
1060 case 'P':
1061 {
1062 unsigned int x;
1063
1064 x = avr_get_constant (str, 63);
1065 str = input_line_pointer;
1066 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
1067 }
1068 break;
1069
1070 case 'p':
1071 {
1072 unsigned int x;
1073
1074 x = avr_get_constant (str, 31);
1075 str = input_line_pointer;
1076 op_mask |= x << 3;
1077 }
1078 break;
1079
1080 case 'E':
1081 {
1082 unsigned int x;
1083
1084 x = avr_get_constant (str, 15);
1085 str = input_line_pointer;
1086 op_mask |= (x << 4);
1087 }
1088 break;
1089
1090 case '?':
1091 break;
1092
1093 default:
1094 as_bad (_("unknown constraint `%c'"), *op);
1095 }
1096
1097 *line = str;
1098 return op_mask;
1099 }
1100
1101 /* Parse instruction operands.
1102 Return binary opcode. */
1103
1104 static unsigned int
1105 avr_operands (struct avr_opcodes_s *opcode, char **line)
1106 {
1107 char *op = opcode->constraints;
1108 unsigned int bin = opcode->bin_opcode;
1109 char *frag = frag_more (opcode->insn_size * 2);
1110 char *str = *line;
1111 int where = frag - frag_now->fr_literal;
1112 static unsigned int prev = 0; /* Previous opcode. */
1113
1114 /* Opcode have operands. */
1115 if (*op)
1116 {
1117 unsigned int reg1 = 0;
1118 unsigned int reg2 = 0;
1119 int reg1_present = 0;
1120 int reg2_present = 0;
1121
1122 /* Parse first operand. */
1123 if (REGISTER_P (*op))
1124 reg1_present = 1;
1125 reg1 = avr_operand (opcode, where, op, &str);
1126 ++op;
1127
1128 /* Parse second operand. */
1129 if (*op)
1130 {
1131 if (*op == ',')
1132 ++op;
1133
1134 if (*op == '=')
1135 {
1136 reg2 = reg1;
1137 reg2_present = 1;
1138 }
1139 else
1140 {
1141 if (REGISTER_P (*op))
1142 reg2_present = 1;
1143
1144 str = skip_space (str);
1145 if (*str++ != ',')
1146 as_bad (_("`,' required"));
1147 str = skip_space (str);
1148
1149 reg2 = avr_operand (opcode, where, op, &str);
1150 }
1151
1152 if (reg1_present && reg2_present)
1153 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
1154 else if (reg2_present)
1155 reg2 <<= 4;
1156 }
1157 if (reg1_present)
1158 reg1 <<= 4;
1159 bin |= reg1 | reg2;
1160 }
1161
1162 /* Detect undefined combinations (like ld r31,Z+). */
1163 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
1164 as_warn (_("undefined combination of operands"));
1165
1166 if (opcode->insn_size == 2)
1167 {
1168 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1169 (AVR core bug, fixed in the newer devices). */
1170 if (!(avr_opt.no_skip_bug ||
1171 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
1172 && AVR_SKIP_P (prev))
1173 as_warn (_("skipping two-word instruction"));
1174
1175 bfd_putl32 ((bfd_vma) bin, frag);
1176 }
1177 else
1178 bfd_putl16 ((bfd_vma) bin, frag);
1179
1180 prev = bin;
1181 *line = str;
1182 return bin;
1183 }
1184
1185 /* GAS will call this function for each section at the end of the assembly,
1186 to permit the CPU backend to adjust the alignment of a section. */
1187
1188 valueT
1189 md_section_align (asection *seg, valueT addr)
1190 {
1191 int align = bfd_get_section_alignment (stdoutput, seg);
1192 return ((addr + (1 << align) - 1) & (-1 << align));
1193 }
1194
1195 /* If you define this macro, it should return the offset between the
1196 address of a PC relative fixup and the position from which the PC
1197 relative adjustment should be made. On many processors, the base
1198 of a PC relative instruction is the next instruction, so this
1199 macro would return the length of an instruction. */
1200
1201 long
1202 md_pcrel_from_section (fixS *fixp, segT sec)
1203 {
1204 if (fixp->fx_addsy != (symbolS *) NULL
1205 && (!S_IS_DEFINED (fixp->fx_addsy)
1206 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1207 return 0;
1208
1209 return fixp->fx_frag->fr_address + fixp->fx_where;
1210 }
1211
1212 static bfd_boolean
1213 relaxable_section (asection *sec)
1214 {
1215 return (sec->flags & SEC_DEBUGGING) == 0;
1216 }
1217
1218 /* Does whatever the xtensa port does. */
1219 int
1220 avr_validate_fix_sub (fixS *fix)
1221 {
1222 segT add_symbol_segment, sub_symbol_segment;
1223
1224 /* The difference of two symbols should be resolved by the assembler when
1225 linkrelax is not set. If the linker may relax the section containing
1226 the symbols, then an Xtensa DIFF relocation must be generated so that
1227 the linker knows to adjust the difference value. */
1228 if (!linkrelax || fix->fx_addsy == NULL)
1229 return 0;
1230
1231 /* Make sure both symbols are in the same segment, and that segment is
1232 "normal" and relaxable. If the segment is not "normal", then the
1233 fix is not valid. If the segment is not "relaxable", then the fix
1234 should have been handled earlier. */
1235 add_symbol_segment = S_GET_SEGMENT (fix->fx_addsy);
1236 if (! SEG_NORMAL (add_symbol_segment) ||
1237 ! relaxable_section (add_symbol_segment))
1238 return 0;
1239
1240 sub_symbol_segment = S_GET_SEGMENT (fix->fx_subsy);
1241 return (sub_symbol_segment == add_symbol_segment);
1242 }
1243
1244 /* TC_FORCE_RELOCATION hook */
1245
1246 /* If linkrelax is turned on, and the symbol to relocate
1247 against is in a relaxable segment, don't compute the value -
1248 generate a relocation instead. */
1249 int
1250 avr_force_relocation (fixS *fix)
1251 {
1252 if (linkrelax && fix->fx_addsy
1253 && relaxable_section (S_GET_SEGMENT (fix->fx_addsy)))
1254 return 1;
1255
1256 return generic_force_reloc (fix);
1257 }
1258
1259 /* GAS will call this for each fixup. It should store the correct
1260 value in the object file. */
1261
1262 void
1263 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1264 {
1265 unsigned char *where;
1266 unsigned long insn;
1267 long value = *valP;
1268
1269 if (fixP->fx_addsy == (symbolS *) NULL)
1270 fixP->fx_done = 1;
1271
1272 else if (fixP->fx_pcrel)
1273 {
1274 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1275
1276 if (s == seg || s == absolute_section)
1277 {
1278 value += S_GET_VALUE (fixP->fx_addsy);
1279 fixP->fx_done = 1;
1280 }
1281 }
1282 else if (linkrelax && fixP->fx_subsy)
1283 {
1284 /* For a subtraction relocation expression, generate one
1285 of the DIFF relocs, with the value being the difference.
1286 Note that a sym1 - sym2 expression is adjusted into a
1287 section_start_sym + sym4_offset_from_section_start - sym1
1288 expression. fixP->fx_addsy holds the section start symbol,
1289 fixP->fx_offset holds sym2's offset, and fixP->fx_subsy
1290 holds sym1. Calculate the current difference and write value,
1291 but leave fx_offset as is - during relaxation,
1292 fx_offset - value gives sym1's value */
1293
1294 switch (fixP->fx_r_type)
1295 {
1296 case BFD_RELOC_8:
1297 fixP->fx_r_type = BFD_RELOC_AVR_DIFF8;
1298 break;
1299 case BFD_RELOC_16:
1300 fixP->fx_r_type = BFD_RELOC_AVR_DIFF16;
1301 break;
1302 case BFD_RELOC_32:
1303 fixP->fx_r_type = BFD_RELOC_AVR_DIFF32;
1304 break;
1305 default:
1306 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1307 break;
1308 }
1309
1310 value = S_GET_VALUE (fixP->fx_addsy) +
1311 fixP->fx_offset - S_GET_VALUE (fixP->fx_subsy);
1312
1313 fixP->fx_subsy = NULL;
1314 }
1315 /* We don't actually support subtracting a symbol. */
1316 if (fixP->fx_subsy != (symbolS *) NULL)
1317 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1318
1319 /* For the DIFF relocs, write the value into the object file while still
1320 keeping fx_done FALSE, as both the difference (recorded in the object file)
1321 and the sym offset (part of fixP) are needed at link relax time */
1322 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1323 switch (fixP->fx_r_type)
1324 {
1325 default:
1326 fixP->fx_no_overflow = 1;
1327 break;
1328 case BFD_RELOC_AVR_7_PCREL:
1329 case BFD_RELOC_AVR_13_PCREL:
1330 case BFD_RELOC_32:
1331 case BFD_RELOC_16:
1332 break;
1333 case BFD_RELOC_AVR_DIFF8:
1334 *where = value;
1335 break;
1336 case BFD_RELOC_AVR_DIFF16:
1337 bfd_putl16 ((bfd_vma) value, where);
1338 break;
1339 case BFD_RELOC_AVR_DIFF32:
1340 bfd_putl32 ((bfd_vma) value, where);
1341 break;
1342 case BFD_RELOC_AVR_CALL:
1343 break;
1344 }
1345
1346 if (fixP->fx_done)
1347 {
1348 /* Fetch the instruction, insert the fully resolved operand
1349 value, and stuff the instruction back again. */
1350 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1351 insn = bfd_getl16 (where);
1352
1353 switch (fixP->fx_r_type)
1354 {
1355 case BFD_RELOC_AVR_7_PCREL:
1356 if (value & 1)
1357 as_bad_where (fixP->fx_file, fixP->fx_line,
1358 _("odd address operand: %ld"), value);
1359
1360 /* Instruction addresses are always right-shifted by 1. */
1361 value >>= 1;
1362 --value; /* Correct PC. */
1363
1364 if (value < -64 || value > 63)
1365 as_bad_where (fixP->fx_file, fixP->fx_line,
1366 _("operand out of range: %ld"), value);
1367 value = (value << 3) & 0x3f8;
1368 bfd_putl16 ((bfd_vma) (value | insn), where);
1369 break;
1370
1371 case BFD_RELOC_AVR_13_PCREL:
1372 if (value & 1)
1373 as_bad_where (fixP->fx_file, fixP->fx_line,
1374 _("odd address operand: %ld"), value);
1375
1376 /* Instruction addresses are always right-shifted by 1. */
1377 value >>= 1;
1378 --value; /* Correct PC. */
1379
1380 if (value < -2048 || value > 2047)
1381 {
1382 /* No wrap for devices with >8K of program memory. */
1383 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1384 as_bad_where (fixP->fx_file, fixP->fx_line,
1385 _("operand out of range: %ld"), value);
1386 }
1387
1388 value &= 0xfff;
1389 bfd_putl16 ((bfd_vma) (value | insn), where);
1390 break;
1391
1392 case BFD_RELOC_32:
1393 bfd_putl32 ((bfd_vma) value, where);
1394 break;
1395
1396 case BFD_RELOC_16:
1397 bfd_putl16 ((bfd_vma) value, where);
1398 break;
1399
1400 case BFD_RELOC_8:
1401 if (value > 255 || value < -128)
1402 as_warn_where (fixP->fx_file, fixP->fx_line,
1403 _("operand out of range: %ld"), value);
1404 *where = value;
1405 break;
1406
1407 case BFD_RELOC_AVR_16_PM:
1408 bfd_putl16 ((bfd_vma) (value >> 1), where);
1409 break;
1410
1411 case BFD_RELOC_AVR_LDI:
1412 if (value > 255)
1413 as_bad_where (fixP->fx_file, fixP->fx_line,
1414 _("operand out of range: %ld"), value);
1415 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1416 break;
1417
1418 case BFD_RELOC_AVR_6:
1419 if ((value > 63) || (value < 0))
1420 as_bad_where (fixP->fx_file, fixP->fx_line,
1421 _("operand out of range: %ld"), value);
1422 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1423 break;
1424
1425 case BFD_RELOC_AVR_6_ADIW:
1426 if ((value > 63) || (value < 0))
1427 as_bad_where (fixP->fx_file, fixP->fx_line,
1428 _("operand out of range: %ld"), value);
1429 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1430 break;
1431
1432 case BFD_RELOC_AVR_LO8_LDI:
1433 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1434 break;
1435
1436 case BFD_RELOC_AVR_HI8_LDI:
1437 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1438 break;
1439
1440 case BFD_RELOC_AVR_MS8_LDI:
1441 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1442 break;
1443
1444 case BFD_RELOC_AVR_HH8_LDI:
1445 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1446 break;
1447
1448 case BFD_RELOC_AVR_LO8_LDI_NEG:
1449 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1450 break;
1451
1452 case BFD_RELOC_AVR_HI8_LDI_NEG:
1453 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1454 break;
1455
1456 case BFD_RELOC_AVR_MS8_LDI_NEG:
1457 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1458 break;
1459
1460 case BFD_RELOC_AVR_HH8_LDI_NEG:
1461 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1462 break;
1463
1464 case BFD_RELOC_AVR_LO8_LDI_PM:
1465 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1466 break;
1467
1468 case BFD_RELOC_AVR_HI8_LDI_PM:
1469 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1470 break;
1471
1472 case BFD_RELOC_AVR_HH8_LDI_PM:
1473 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1474 break;
1475
1476 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1477 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1478 break;
1479
1480 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1481 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1482 break;
1483
1484 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1485 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1486 break;
1487
1488 case BFD_RELOC_AVR_CALL:
1489 {
1490 unsigned long x;
1491
1492 x = bfd_getl16 (where);
1493 if (value & 1)
1494 as_bad_where (fixP->fx_file, fixP->fx_line,
1495 _("odd address operand: %ld"), value);
1496 value >>= 1;
1497 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1498 bfd_putl16 ((bfd_vma) x, where);
1499 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1500 }
1501 break;
1502
1503 case BFD_RELOC_AVR_8_LO:
1504 *where = 0xff & value;
1505 break;
1506
1507 case BFD_RELOC_AVR_8_HI:
1508 *where = 0xff & (value >> 8);
1509 break;
1510
1511 case BFD_RELOC_AVR_8_HLO:
1512 *where = 0xff & (value >> 16);
1513 break;
1514
1515 default:
1516 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1517 fixP->fx_line, fixP->fx_r_type);
1518 break;
1519 }
1520 }
1521 else
1522 {
1523 switch ((int) fixP->fx_r_type)
1524 {
1525 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1526 case -BFD_RELOC_AVR_HI8_LDI:
1527 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1528 case -BFD_RELOC_AVR_LO8_LDI:
1529 as_bad_where (fixP->fx_file, fixP->fx_line,
1530 _("only constant expression allowed"));
1531 fixP->fx_done = 1;
1532 break;
1533 default:
1534 break;
1535 }
1536 }
1537 }
1538
1539 /* GAS will call this to generate a reloc, passing the resulting reloc
1540 to `bfd_install_relocation'. This currently works poorly, as
1541 `bfd_install_relocation' often does the wrong thing, and instances of
1542 `tc_gen_reloc' have been written to work around the problems, which
1543 in turns makes it difficult to fix `bfd_install_relocation'. */
1544
1545 /* If while processing a fixup, a reloc really needs to be created
1546 then it is done here. */
1547
1548 arelent *
1549 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1550 fixS *fixp)
1551 {
1552 arelent *reloc;
1553
1554 if (fixp->fx_subsy != NULL)
1555 {
1556 as_bad_where (fixp->fx_file, fixp->fx_line, _("expression too complex"));
1557 return NULL;
1558 }
1559
1560 reloc = xmalloc (sizeof (arelent));
1561
1562 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1563 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1564
1565 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1566 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1567 if (reloc->howto == (reloc_howto_type *) NULL)
1568 {
1569 as_bad_where (fixp->fx_file, fixp->fx_line,
1570 _("reloc %d not supported by object file format"),
1571 (int) fixp->fx_r_type);
1572 return NULL;
1573 }
1574
1575 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1576 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1577 reloc->address = fixp->fx_offset;
1578
1579 reloc->addend = fixp->fx_offset;
1580
1581 return reloc;
1582 }
1583
1584 void
1585 md_assemble (char *str)
1586 {
1587 struct avr_opcodes_s *opcode;
1588 char op[11];
1589
1590 str = skip_space (extract_word (str, op, sizeof (op)));
1591
1592 if (!op[0])
1593 as_bad (_("can't find opcode "));
1594
1595 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1596
1597 if (opcode == NULL)
1598 {
1599 as_bad (_("unknown opcode `%s'"), op);
1600 return;
1601 }
1602
1603 /* Special case for opcodes with optional operands (lpm, elpm) -
1604 version with operands exists in avr_opcodes[] in the next entry. */
1605
1606 if (*str && *opcode->constraints == '?')
1607 ++opcode;
1608
1609 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1610 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1611
1612 dwarf2_emit_insn (0);
1613
1614 /* We used to set input_line_pointer to the result of get_operands,
1615 but that is wrong. Our caller assumes we don't change it. */
1616 {
1617 char *t = input_line_pointer;
1618
1619 avr_operands (opcode, &str);
1620 if (*skip_space (str))
1621 as_bad (_("garbage at end of line"));
1622 input_line_pointer = t;
1623 }
1624 }
1625
1626 const exp_mod_data_t exp_mod_data[] =
1627 {
1628 /* Default, must be first. */
1629 { "", 0, BFD_RELOC_16, "" },
1630 /* Divides by 2 to get word address. Generate Stub. */
1631 { "gs", 2, BFD_RELOC_AVR_16_PM, "`gs' " },
1632 { "pm", 2, BFD_RELOC_AVR_16_PM, "`pm' " },
1633 /* The following are used together with avr-gcc's __memx address space
1634 in order to initialize a 24-bit pointer variable with a 24-bit address.
1635 For address in flash, hlo8 will contain the flash segment if the
1636 symbol is located in flash. If the symbol is located in RAM; hlo8
1637 will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash
1638 addresses linearize address space. */
1639 { "lo8", 1, BFD_RELOC_AVR_8_LO, "`lo8' " },
1640 { "hi8", 1, BFD_RELOC_AVR_8_HI, "`hi8' " },
1641 { "hlo8", 1, BFD_RELOC_AVR_8_HLO, "`hlo8' " },
1642 { "hh8", 1, BFD_RELOC_AVR_8_HLO, "`hh8' " },
1643 /* End of list. */
1644 { NULL, 0, 0, NULL }
1645 };
1646
1647 /* Parse special CONS expression: pm (expression) or alternatively
1648 gs (expression). These are used for addressing program memory. Moreover,
1649 define lo8 (expression), hi8 (expression) and hlo8 (expression). */
1650
1651 const exp_mod_data_t *
1652 avr_parse_cons_expression (expressionS *exp, int nbytes)
1653 {
1654 const exp_mod_data_t *pexp = &exp_mod_data[0];
1655 char *tmp;
1656
1657 tmp = input_line_pointer = skip_space (input_line_pointer);
1658
1659 /* The first entry of exp_mod_data[] contains an entry if no
1660 expression modifier is present. Skip it. */
1661
1662 for (pexp++; pexp->name; pexp++)
1663 {
1664 int len = strlen (pexp->name);
1665
1666 if (nbytes == pexp->nbytes
1667 && strncasecmp (input_line_pointer, pexp->name, len) == 0)
1668 {
1669 input_line_pointer = skip_space (input_line_pointer + len);
1670
1671 if (*input_line_pointer == '(')
1672 {
1673 input_line_pointer = skip_space (input_line_pointer + 1);
1674 expression (exp);
1675
1676 if (*input_line_pointer == ')')
1677 {
1678 ++input_line_pointer;
1679 return pexp;
1680 }
1681 else
1682 {
1683 as_bad (_("`)' required"));
1684 return &exp_mod_data[0];
1685 }
1686 }
1687
1688 input_line_pointer = tmp;
1689
1690 break;
1691 }
1692 }
1693
1694 expression (exp);
1695 return &exp_mod_data[0];
1696 }
1697
1698 void
1699 avr_cons_fix_new (fragS *frag,
1700 int where,
1701 int nbytes,
1702 expressionS *exp,
1703 const exp_mod_data_t *pexp_mod_data)
1704 {
1705 int bad = 0;
1706
1707 switch (pexp_mod_data->reloc)
1708 {
1709 default:
1710 if (nbytes == 1)
1711 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8);
1712 else if (nbytes == 2)
1713 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1714 else if (nbytes == 4)
1715 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1716 else
1717 bad = 1;
1718 break;
1719
1720 case BFD_RELOC_AVR_16_PM:
1721 case BFD_RELOC_AVR_8_LO:
1722 case BFD_RELOC_AVR_8_HI:
1723 case BFD_RELOC_AVR_8_HLO:
1724 if (nbytes == pexp_mod_data->nbytes)
1725 fix_new_exp (frag, where, nbytes, exp, FALSE, pexp_mod_data->reloc);
1726 else
1727 bad = 1;
1728 break;
1729 }
1730
1731 if (bad)
1732 as_bad (_("illegal %srelocation size: %d"), pexp_mod_data->error, nbytes);
1733 }
1734
1735 static bfd_boolean
1736 mcu_has_3_byte_pc (void)
1737 {
1738 int mach = avr_mcu->mach;
1739
1740 return mach == bfd_mach_avr6
1741 || mach == bfd_mach_avrxmega6
1742 || mach == bfd_mach_avrxmega7;
1743 }
1744
1745 void
1746 tc_cfi_frame_initial_instructions (void)
1747 {
1748 /* AVR6 pushes 3 bytes for calls. */
1749 int return_size = (mcu_has_3_byte_pc () ? 3 : 2);
1750
1751 /* The CFA is the caller's stack location before the call insn. */
1752 /* Note that the stack pointer is dwarf register number 32. */
1753 cfi_add_CFA_def_cfa (32, return_size);
1754
1755 /* Note that AVR consistently uses post-decrement, which means that things
1756 do not line up the same way as for targers that use pre-decrement. */
1757 cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN, 1-return_size);
1758 }
1759
1760 bfd_boolean
1761 avr_allow_local_subtract (expressionS * left,
1762 expressionS * right,
1763 segT section)
1764 {
1765 /* If we are not in relaxation mode, subtraction is OK. */
1766 if (!linkrelax)
1767 return TRUE;
1768
1769 /* If the symbols are not in a code section then they are OK. */
1770 if ((section->flags & SEC_CODE) == 0)
1771 return TRUE;
1772
1773 if (left->X_add_symbol == right->X_add_symbol)
1774 return TRUE;
1775
1776 /* We have to assume that there may be instructions between the
1777 two symbols and that relaxation may increase the distance between
1778 them. */
1779 return FALSE;
1780 }
GDB Binutils - Deliverables
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