1 /* tc-avr.c -- Assembler code for the ATMEL AVR
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009,
4 2010, 2012, 2013 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "safe-ctype.h"
27 #include "dwarf2dbg.h"
28 #include "dw2gencfi.h"
36 int insn_size
; /* In words. */
38 unsigned int bin_opcode
;
41 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
42 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
44 struct avr_opcodes_s avr_opcodes
[] =
46 #include "opcode/avr.h"
47 {NULL
, NULL
, NULL
, 0, 0, 0}
50 const char comment_chars
[] = ";";
51 const char line_comment_chars
[] = "#";
52 const char line_separator_chars
[] = "$";
54 const char *md_shortopts
= "m:";
62 /* XXX - devices that don't seem to exist (renamed, replaced with larger
63 ones, or planned but never produced), left here for compatibility. */
65 static struct mcu_type_s mcu_types
[] =
67 {"avr1", AVR_ISA_AVR1
, bfd_mach_avr1
},
68 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
69 but set to AVR_ISA_AVR25 for some following version
70 of GCC (from 4.3) for backward compatibility. */
71 {"avr2", AVR_ISA_AVR25
, bfd_mach_avr2
},
72 {"avr25", AVR_ISA_AVR25
, bfd_mach_avr25
},
73 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
74 but set to AVR_ISA_AVR3_ALL for some following version
75 of GCC (from 4.3) for backward compatibility. */
76 {"avr3", AVR_ISA_AVR3_ALL
, bfd_mach_avr3
},
77 {"avr31", AVR_ISA_AVR31
, bfd_mach_avr31
},
78 {"avr35", AVR_ISA_AVR35
, bfd_mach_avr35
},
79 {"avr4", AVR_ISA_AVR4
, bfd_mach_avr4
},
80 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
81 but set to AVR_ISA_AVR51 for some following version
82 of GCC (from 4.3) for backward compatibility. */
83 {"avr5", AVR_ISA_AVR51
, bfd_mach_avr5
},
84 {"avr51", AVR_ISA_AVR51
, bfd_mach_avr51
},
85 {"avr6", AVR_ISA_AVR6
, bfd_mach_avr6
},
86 {"avrxmega1", AVR_ISA_XMEGA
, bfd_mach_avrxmega1
},
87 {"avrxmega2", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
88 {"avrxmega3", AVR_ISA_XMEGA
, bfd_mach_avrxmega3
},
89 {"avrxmega4", AVR_ISA_XMEGA
, bfd_mach_avrxmega4
},
90 {"avrxmega5", AVR_ISA_XMEGA
, bfd_mach_avrxmega5
},
91 {"avrxmega6", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
92 {"avrxmega7", AVR_ISA_XMEGA
, bfd_mach_avrxmega7
},
93 {"at90s1200", AVR_ISA_1200
, bfd_mach_avr1
},
94 {"attiny11", AVR_ISA_AVR1
, bfd_mach_avr1
},
95 {"attiny12", AVR_ISA_AVR1
, bfd_mach_avr1
},
96 {"attiny15", AVR_ISA_AVR1
, bfd_mach_avr1
},
97 {"attiny28", AVR_ISA_AVR1
, bfd_mach_avr1
},
98 {"at90s2313", AVR_ISA_AVR2
, bfd_mach_avr2
},
99 {"at90s2323", AVR_ISA_AVR2
, bfd_mach_avr2
},
100 {"at90s2333", AVR_ISA_AVR2
, bfd_mach_avr2
}, /* XXX -> 4433 */
101 {"at90s2343", AVR_ISA_AVR2
, bfd_mach_avr2
},
102 {"attiny22", AVR_ISA_AVR2
, bfd_mach_avr2
}, /* XXX -> 2343 */
103 {"attiny26", AVR_ISA_2xxe
, bfd_mach_avr2
},
104 {"at90s4414", AVR_ISA_AVR2
, bfd_mach_avr2
}, /* XXX -> 8515 */
105 {"at90s4433", AVR_ISA_AVR2
, bfd_mach_avr2
},
106 {"at90s4434", AVR_ISA_AVR2
, bfd_mach_avr2
}, /* XXX -> 8535 */
107 {"at90s8515", AVR_ISA_AVR2
, bfd_mach_avr2
},
108 {"at90c8534", AVR_ISA_AVR2
, bfd_mach_avr2
},
109 {"at90s8535", AVR_ISA_AVR2
, bfd_mach_avr2
},
110 {"attiny13", AVR_ISA_AVR25
, bfd_mach_avr25
},
111 {"attiny13a", AVR_ISA_AVR25
, bfd_mach_avr25
},
112 {"attiny2313", AVR_ISA_AVR25
, bfd_mach_avr25
},
113 {"attiny2313a",AVR_ISA_AVR25
, bfd_mach_avr25
},
114 {"attiny24", AVR_ISA_AVR25
, bfd_mach_avr25
},
115 {"attiny24a", AVR_ISA_AVR25
, bfd_mach_avr25
},
116 {"attiny4313", AVR_ISA_AVR25
, bfd_mach_avr25
},
117 {"attiny44", AVR_ISA_AVR25
, bfd_mach_avr25
},
118 {"attiny44a", AVR_ISA_AVR25
, bfd_mach_avr25
},
119 {"attiny84", AVR_ISA_AVR25
, bfd_mach_avr25
},
120 {"attiny84a", AVR_ISA_AVR25
, bfd_mach_avr25
},
121 {"attiny25", AVR_ISA_AVR25
, bfd_mach_avr25
},
122 {"attiny45", AVR_ISA_AVR25
, bfd_mach_avr25
},
123 {"attiny85", AVR_ISA_AVR25
, bfd_mach_avr25
},
124 {"attiny261", AVR_ISA_AVR25
, bfd_mach_avr25
},
125 {"attiny261a", AVR_ISA_AVR25
, bfd_mach_avr25
},
126 {"attiny461", AVR_ISA_AVR25
, bfd_mach_avr25
},
127 {"attiny461a", AVR_ISA_AVR25
, bfd_mach_avr25
},
128 {"attiny861", AVR_ISA_AVR25
, bfd_mach_avr25
},
129 {"attiny861a", AVR_ISA_AVR25
, bfd_mach_avr25
},
130 {"attiny87", AVR_ISA_AVR25
, bfd_mach_avr25
},
131 {"attiny43u", AVR_ISA_AVR25
, bfd_mach_avr25
},
132 {"attiny48", AVR_ISA_AVR25
, bfd_mach_avr25
},
133 {"attiny88", AVR_ISA_AVR25
, bfd_mach_avr25
},
134 {"at86rf401", AVR_ISA_RF401
, bfd_mach_avr25
},
135 {"ata6289", AVR_ISA_AVR25
, bfd_mach_avr25
},
136 {"at43usb355", AVR_ISA_AVR3
, bfd_mach_avr3
},
137 {"at76c711", AVR_ISA_AVR3
, bfd_mach_avr3
},
138 {"atmega103", AVR_ISA_AVR31
, bfd_mach_avr31
},
139 {"at43usb320", AVR_ISA_AVR31
, bfd_mach_avr31
},
140 {"attiny167", AVR_ISA_AVR35
, bfd_mach_avr35
},
141 {"at90usb82", AVR_ISA_AVR35
, bfd_mach_avr35
},
142 {"at90usb162", AVR_ISA_AVR35
, bfd_mach_avr35
},
143 {"atmega8u2", AVR_ISA_AVR35
, bfd_mach_avr35
},
144 {"atmega16u2", AVR_ISA_AVR35
, bfd_mach_avr35
},
145 {"atmega32u2", AVR_ISA_AVR35
, bfd_mach_avr35
},
146 {"atmega8", AVR_ISA_M8
, bfd_mach_avr4
},
147 {"atmega48", AVR_ISA_AVR4
, bfd_mach_avr4
},
148 {"atmega48a", AVR_ISA_AVR4
, bfd_mach_avr4
},
149 {"atmega48p", AVR_ISA_AVR4
, bfd_mach_avr4
},
150 {"atmega88", AVR_ISA_AVR4
, bfd_mach_avr4
},
151 {"atmega88a", AVR_ISA_AVR4
, bfd_mach_avr4
},
152 {"atmega88p", AVR_ISA_AVR4
, bfd_mach_avr4
},
153 {"atmega88pa", AVR_ISA_AVR4
, bfd_mach_avr4
},
154 {"atmega8515", AVR_ISA_M8
, bfd_mach_avr4
},
155 {"atmega8535", AVR_ISA_M8
, bfd_mach_avr4
},
156 {"atmega8hva", AVR_ISA_AVR4
, bfd_mach_avr4
},
157 {"at90pwm1", AVR_ISA_AVR4
, bfd_mach_avr4
},
158 {"at90pwm2", AVR_ISA_AVR4
, bfd_mach_avr4
},
159 {"at90pwm2b", AVR_ISA_AVR4
, bfd_mach_avr4
},
160 {"at90pwm3", AVR_ISA_AVR4
, bfd_mach_avr4
},
161 {"at90pwm3b", AVR_ISA_AVR4
, bfd_mach_avr4
},
162 {"at90pwm81", AVR_ISA_AVR4
, bfd_mach_avr4
},
163 {"atmega16", AVR_ISA_AVR5
, bfd_mach_avr5
},
164 {"atmega16a", AVR_ISA_AVR5
, bfd_mach_avr5
},
165 {"atmega161", AVR_ISA_M161
, bfd_mach_avr5
},
166 {"atmega162", AVR_ISA_AVR5
, bfd_mach_avr5
},
167 {"atmega163", AVR_ISA_M161
, bfd_mach_avr5
},
168 {"atmega164a", AVR_ISA_AVR5
, bfd_mach_avr5
},
169 {"atmega164p", AVR_ISA_AVR5
, bfd_mach_avr5
},
170 {"atmega165", AVR_ISA_AVR5
, bfd_mach_avr5
},
171 {"atmega165a", AVR_ISA_AVR5
, bfd_mach_avr5
},
172 {"atmega165p", AVR_ISA_AVR5
, bfd_mach_avr5
},
173 {"atmega168", AVR_ISA_AVR5
, bfd_mach_avr5
},
174 {"atmega168a", AVR_ISA_AVR5
, bfd_mach_avr5
},
175 {"atmega168p", AVR_ISA_AVR5
, bfd_mach_avr5
},
176 {"atmega169", AVR_ISA_AVR5
, bfd_mach_avr5
},
177 {"atmega169a", AVR_ISA_AVR5
, bfd_mach_avr5
},
178 {"atmega169p", AVR_ISA_AVR5
, bfd_mach_avr5
},
179 {"atmega169pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
180 {"atmega32", AVR_ISA_AVR5
, bfd_mach_avr5
},
181 {"atmega323", AVR_ISA_AVR5
, bfd_mach_avr5
},
182 {"atmega324a", AVR_ISA_AVR5
, bfd_mach_avr5
},
183 {"atmega324p", AVR_ISA_AVR5
, bfd_mach_avr5
},
184 {"atmega324pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
185 {"atmega325", AVR_ISA_AVR5
, bfd_mach_avr5
},
186 {"atmega325a", AVR_ISA_AVR5
, bfd_mach_avr5
},
187 {"atmega325p", AVR_ISA_AVR5
, bfd_mach_avr5
},
188 {"atmega325pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
189 {"atmega3250", AVR_ISA_AVR5
, bfd_mach_avr5
},
190 {"atmega3250a",AVR_ISA_AVR5
, bfd_mach_avr5
},
191 {"atmega3250p",AVR_ISA_AVR5
, bfd_mach_avr5
},
192 {"atmega3250pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
193 {"atmega328", AVR_ISA_AVR5
, bfd_mach_avr5
},
194 {"atmega328p", AVR_ISA_AVR5
, bfd_mach_avr5
},
195 {"atmega329", AVR_ISA_AVR5
, bfd_mach_avr5
},
196 {"atmega329a", AVR_ISA_AVR5
, bfd_mach_avr5
},
197 {"atmega329p", AVR_ISA_AVR5
, bfd_mach_avr5
},
198 {"atmega329pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
199 {"atmega3290", AVR_ISA_AVR5
, bfd_mach_avr5
},
200 {"atmega3290a",AVR_ISA_AVR5
, bfd_mach_avr5
},
201 {"atmega3290p",AVR_ISA_AVR5
, bfd_mach_avr5
},
202 {"atmega3290pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
203 {"atmega406", AVR_ISA_AVR5
, bfd_mach_avr5
},
204 {"atmega64", AVR_ISA_AVR5
, bfd_mach_avr5
},
205 {"atmega640", AVR_ISA_AVR5
, bfd_mach_avr5
},
206 {"atmega644", AVR_ISA_AVR5
, bfd_mach_avr5
},
207 {"atmega644a", AVR_ISA_AVR5
, bfd_mach_avr5
},
208 {"atmega644p", AVR_ISA_AVR5
, bfd_mach_avr5
},
209 {"atmega644pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
210 {"atmega645", AVR_ISA_AVR5
, bfd_mach_avr5
},
211 {"atmega645a", AVR_ISA_AVR5
, bfd_mach_avr5
},
212 {"atmega645p", AVR_ISA_AVR5
, bfd_mach_avr5
},
213 {"atmega649", AVR_ISA_AVR5
, bfd_mach_avr5
},
214 {"atmega649a", AVR_ISA_AVR5
, bfd_mach_avr5
},
215 {"atmega649p", AVR_ISA_AVR5
, bfd_mach_avr5
},
216 {"atmega6450", AVR_ISA_AVR5
, bfd_mach_avr5
},
217 {"atmega6450a",AVR_ISA_AVR5
, bfd_mach_avr5
},
218 {"atmega6450p",AVR_ISA_AVR5
, bfd_mach_avr5
},
219 {"atmega6490", AVR_ISA_AVR5
, bfd_mach_avr5
},
220 {"atmega6490a",AVR_ISA_AVR5
, bfd_mach_avr5
},
221 {"atmega6490p",AVR_ISA_AVR5
, bfd_mach_avr5
},
222 {"atmega16hva",AVR_ISA_AVR5
, bfd_mach_avr5
},
223 {"atmega16hva2",AVR_ISA_AVR5
, bfd_mach_avr5
},
224 {"atmega16hvb",AVR_ISA_AVR5
, bfd_mach_avr5
},
225 {"atmega16hvbrevb",AVR_ISA_AVR5
,bfd_mach_avr5
},
226 {"atmega32hvb",AVR_ISA_AVR5
, bfd_mach_avr5
},
227 {"atmega32hvbrevb",AVR_ISA_AVR5
,bfd_mach_avr5
},
228 {"atmega64hve",AVR_ISA_AVR5
, bfd_mach_avr5
},
229 {"at90can32" , AVR_ISA_AVR5
, bfd_mach_avr5
},
230 {"at90can64" , AVR_ISA_AVR5
, bfd_mach_avr5
},
231 {"at90pwm161", AVR_ISA_AVR5
, bfd_mach_avr5
},
232 {"at90pwm216", AVR_ISA_AVR5
, bfd_mach_avr5
},
233 {"at90pwm316", AVR_ISA_AVR5
, bfd_mach_avr5
},
234 {"atmega32c1", AVR_ISA_AVR5
, bfd_mach_avr5
},
235 {"atmega64c1", AVR_ISA_AVR5
, bfd_mach_avr5
},
236 {"atmega16m1", AVR_ISA_AVR5
, bfd_mach_avr5
},
237 {"atmega32m1", AVR_ISA_AVR5
, bfd_mach_avr5
},
238 {"atmega64m1", AVR_ISA_AVR5
, bfd_mach_avr5
},
239 {"atmega16u4", AVR_ISA_AVR5
, bfd_mach_avr5
},
240 {"atmega32u4", AVR_ISA_AVR5
, bfd_mach_avr5
},
241 {"atmega32u6", AVR_ISA_AVR5
, bfd_mach_avr5
},
242 {"at90usb646", AVR_ISA_AVR5
, bfd_mach_avr5
},
243 {"at90usb647", AVR_ISA_AVR5
, bfd_mach_avr5
},
244 {"at90scr100", AVR_ISA_AVR5
, bfd_mach_avr5
},
245 {"at94k", AVR_ISA_94K
, bfd_mach_avr5
},
246 {"m3000", AVR_ISA_AVR5
, bfd_mach_avr5
},
247 {"atmega128", AVR_ISA_AVR51
, bfd_mach_avr51
},
248 {"atmega1280", AVR_ISA_AVR51
, bfd_mach_avr51
},
249 {"atmega1281", AVR_ISA_AVR51
, bfd_mach_avr51
},
250 {"atmega1284p",AVR_ISA_AVR51
, bfd_mach_avr51
},
251 {"atmega128rfa1",AVR_ISA_AVR51
, bfd_mach_avr51
},
252 {"at90can128", AVR_ISA_AVR51
, bfd_mach_avr51
},
253 {"at90usb1286",AVR_ISA_AVR51
, bfd_mach_avr51
},
254 {"at90usb1287",AVR_ISA_AVR51
, bfd_mach_avr51
},
255 {"atmega2560", AVR_ISA_AVR6
, bfd_mach_avr6
},
256 {"atmega2561", AVR_ISA_AVR6
, bfd_mach_avr6
},
257 {"atxmega16a4", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
258 {"atxmega16d4", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
259 {"atxmega16x1", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
260 {"atxmega32a4", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
261 {"atxmega32d4", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
262 {"atxmega32x1", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
263 {"atxmega64a3", AVR_ISA_XMEGA
, bfd_mach_avrxmega4
},
264 {"atxmega64d3", AVR_ISA_XMEGA
, bfd_mach_avrxmega4
},
265 {"atxmega64a1", AVR_ISA_XMEGA
, bfd_mach_avrxmega5
},
266 {"atxmega64a1u",AVR_ISA_XMEGA
, bfd_mach_avrxmega5
},
267 {"atxmega128a3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
268 {"atxmega128b1", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
269 {"atxmega128d3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
270 {"atxmega192a3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
271 {"atxmega192d3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
272 {"atxmega256a3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
273 {"atxmega256a3b",AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
274 {"atxmega256a3bu",AVR_ISA_XMEGA
,bfd_mach_avrxmega6
},
275 {"atxmega256d3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
276 {"atxmega128a1", AVR_ISA_XMEGA
, bfd_mach_avrxmega7
},
277 {"atxmega128a1u", AVR_ISA_XMEGA
, bfd_mach_avrxmega7
},
281 /* Current MCU type. */
282 static struct mcu_type_s default_mcu
= {"avr2", AVR_ISA_AVR2
, bfd_mach_avr2
};
283 static struct mcu_type_s
* avr_mcu
= & default_mcu
;
285 /* AVR target-specific switches. */
288 int all_opcodes
; /* -mall-opcodes: accept all known AVR opcodes. */
289 int no_skip_bug
; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
290 int no_wrap
; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
293 static struct avr_opt_s avr_opt
= { 0, 0, 0 };
295 const char EXP_CHARS
[] = "eE";
296 const char FLT_CHARS
[] = "dD";
298 static void avr_set_arch (int);
300 /* The target specific pseudo-ops which we support. */
301 const pseudo_typeS md_pseudo_table
[] =
303 {"arch", avr_set_arch
, 0},
307 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
309 #define EXP_MOD_NAME(i) exp_mod[i].name
310 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
311 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
312 #define HAVE_PM_P(i) exp_mod[i].have_pm
317 bfd_reloc_code_real_type reloc
;
318 bfd_reloc_code_real_type neg_reloc
;
322 static struct exp_mod_s exp_mod
[] =
324 {"hh8", BFD_RELOC_AVR_HH8_LDI
, BFD_RELOC_AVR_HH8_LDI_NEG
, 1},
325 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM
, BFD_RELOC_AVR_HH8_LDI_PM_NEG
, 0},
326 {"hi8", BFD_RELOC_AVR_HI8_LDI
, BFD_RELOC_AVR_HI8_LDI_NEG
, 1},
327 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM
, BFD_RELOC_AVR_HI8_LDI_PM_NEG
, 0},
328 {"lo8", BFD_RELOC_AVR_LO8_LDI
, BFD_RELOC_AVR_LO8_LDI_NEG
, 1},
329 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM
, BFD_RELOC_AVR_LO8_LDI_PM_NEG
, 0},
330 {"hlo8", BFD_RELOC_AVR_HH8_LDI
, BFD_RELOC_AVR_HH8_LDI_NEG
, 0},
331 {"hhi8", BFD_RELOC_AVR_MS8_LDI
, BFD_RELOC_AVR_MS8_LDI_NEG
, 0},
334 /* A union used to store indicies into the exp_mod[] array
335 in a hash table which expects void * data types. */
342 /* Opcode hash table. */
343 static struct hash_control
*avr_hash
;
345 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
346 static struct hash_control
*avr_mod_hash
;
348 #define OPTION_MMCU 'm'
351 OPTION_ALL_OPCODES
= OPTION_MD_BASE
+ 1,
356 struct option md_longopts
[] =
358 { "mmcu", required_argument
, NULL
, OPTION_MMCU
},
359 { "mall-opcodes", no_argument
, NULL
, OPTION_ALL_OPCODES
},
360 { "mno-skip-bug", no_argument
, NULL
, OPTION_NO_SKIP_BUG
},
361 { "mno-wrap", no_argument
, NULL
, OPTION_NO_WRAP
},
362 { NULL
, no_argument
, NULL
, 0 }
365 size_t md_longopts_size
= sizeof (md_longopts
);
367 /* Display nicely formatted list of known MCU names. */
370 show_mcu_list (FILE *stream
)
374 fprintf (stream
, _("Known MCU names:"));
377 for (i
= 0; mcu_types
[i
].name
; i
++)
379 int len
= strlen (mcu_types
[i
].name
);
384 fprintf (stream
, " %s", mcu_types
[i
].name
);
387 fprintf (stream
, "\n %s", mcu_types
[i
].name
);
392 fprintf (stream
, "\n");
398 while (*s
== ' ' || *s
== '\t')
403 /* Extract one word from FROM and copy it to TO. */
406 extract_word (char *from
, char *to
, int limit
)
411 /* Drop leading whitespace. */
412 from
= skip_space (from
);
415 /* Find the op code end. */
416 for (op_end
= from
; *op_end
!= 0 && is_part_of_name (*op_end
);)
418 to
[size
++] = *op_end
++;
419 if (size
+ 1 >= limit
)
428 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
429 asection
*seg ATTRIBUTE_UNUSED
)
436 md_show_usage (FILE *stream
)
439 _("AVR Assembler options:\n"
440 " -mmcu=[avr-name] select microcontroller variant\n"
441 " [avr-name] can be:\n"
442 " avr1 - classic AVR core without data RAM\n"
443 " avr2 - classic AVR core with up to 8K program memory\n"
444 " avr25 - classic AVR core with up to 8K program memory\n"
445 " plus the MOVW instruction\n"
446 " avr3 - classic AVR core with up to 64K program memory\n"
447 " avr31 - classic AVR core with up to 128K program memory\n"
448 " avr35 - classic AVR core with up to 64K program memory\n"
449 " plus the MOVW instruction\n"
450 " avr4 - enhanced AVR core with up to 8K program memory\n"
451 " avr5 - enhanced AVR core with up to 64K program memory\n"
452 " avr51 - enhanced AVR core with up to 128K program memory\n"
453 " avr6 - enhanced AVR core with up to 256K program memory\n"
454 " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
455 " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
456 " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
457 " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
458 " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
459 " or immediate microcontroller name.\n"));
461 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
462 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
463 " (default for avr4, avr5)\n"
464 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
465 " (default for avr3, avr5)\n"));
466 show_mcu_list (stream
);
470 avr_set_arch (int dummy ATTRIBUTE_UNUSED
)
474 input_line_pointer
= extract_word (input_line_pointer
, str
, 20);
475 md_parse_option (OPTION_MMCU
, str
);
476 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, avr_mcu
->mach
);
480 md_parse_option (int c
, char *arg
)
487 char *s
= alloca (strlen (arg
) + 1);
494 *t
= TOLOWER (*arg1
++);
498 for (i
= 0; mcu_types
[i
].name
; ++i
)
499 if (strcmp (mcu_types
[i
].name
, s
) == 0)
502 if (!mcu_types
[i
].name
)
504 show_mcu_list (stderr
);
505 as_fatal (_("unknown MCU: %s\n"), arg
);
508 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
509 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
510 as .arch ... in the asm output at the same time. */
511 if (avr_mcu
== &default_mcu
|| avr_mcu
->mach
== mcu_types
[i
].mach
)
512 avr_mcu
= &mcu_types
[i
];
514 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
515 avr_mcu
->name
, mcu_types
[i
].name
);
518 case OPTION_ALL_OPCODES
:
519 avr_opt
.all_opcodes
= 1;
521 case OPTION_NO_SKIP_BUG
:
522 avr_opt
.no_skip_bug
= 1;
533 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
539 md_atof (int type
, char *litP
, int *sizeP
)
541 return ieee_md_atof (type
, litP
, sizeP
, FALSE
);
545 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
546 asection
*sec ATTRIBUTE_UNUSED
,
547 fragS
*fragP ATTRIBUTE_UNUSED
)
556 struct avr_opcodes_s
*opcode
;
558 avr_hash
= hash_new ();
560 /* Insert unique names into hash table. This hash table then provides a
561 quick index to the first opcode with a particular name in the opcode
563 for (opcode
= avr_opcodes
; opcode
->name
; opcode
++)
564 hash_insert (avr_hash
, opcode
->name
, (char *) opcode
);
566 avr_mod_hash
= hash_new ();
568 for (i
= 0; i
< ARRAY_SIZE (exp_mod
); ++i
)
573 hash_insert (avr_mod_hash
, EXP_MOD_NAME (i
), m
.ptr
);
576 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, avr_mcu
->mach
);
579 /* Resolve STR as a constant expression and return the result.
580 If result greater than MAX then error. */
583 avr_get_constant (char *str
, int max
)
587 str
= skip_space (str
);
588 input_line_pointer
= str
;
591 if (ex
.X_op
!= O_constant
)
592 as_bad (_("constant value required"));
594 if (ex
.X_add_number
> max
|| ex
.X_add_number
< 0)
595 as_bad (_("number must be positive and less than %d"), max
+ 1);
597 return ex
.X_add_number
;
600 /* Parse for ldd/std offset. */
603 avr_offset_expression (expressionS
*exp
)
605 char *str
= input_line_pointer
;
610 str
= extract_word (str
, op
, sizeof (op
));
612 input_line_pointer
= tmp
;
615 /* Warn about expressions that fail to use lo8 (). */
616 if (exp
->X_op
== O_constant
)
618 int x
= exp
->X_add_number
;
620 if (x
< -255 || x
> 255)
621 as_warn (_("constant out of 8-bit range: %d"), x
);
625 /* Parse ordinary expression. */
628 parse_exp (char *s
, expressionS
*op
)
630 input_line_pointer
= s
;
632 if (op
->X_op
== O_absent
)
633 as_bad (_("missing operand"));
634 return input_line_pointer
;
637 /* Parse special expressions (needed for LDI command):
642 where xx is: hh, hi, lo. */
644 static bfd_reloc_code_real_type
645 avr_ldi_expression (expressionS
*exp
)
647 char *str
= input_line_pointer
;
651 int linker_stubs_should_be_generated
= 0;
655 str
= extract_word (str
, op
, sizeof (op
));
661 m
.ptr
= hash_find (avr_mod_hash
, op
);
669 str
= skip_space (str
);
673 bfd_reloc_code_real_type reloc_to_return
;
678 if (strncmp ("pm(", str
, 3) == 0
679 || strncmp ("gs(",str
,3) == 0
680 || strncmp ("-(gs(",str
,5) == 0
681 || strncmp ("-(pm(", str
, 5) == 0)
689 as_bad (_("illegal expression"));
691 if (str
[0] == 'g' || str
[2] == 'g')
692 linker_stubs_should_be_generated
= 1;
704 if (*str
== '-' && *(str
+ 1) == '(')
711 input_line_pointer
= str
;
716 if (*input_line_pointer
!= ')')
718 as_bad (_("`)' required"));
721 input_line_pointer
++;
726 neg_p
? EXP_MOD_NEG_RELOC (mod
) : EXP_MOD_RELOC (mod
);
727 if (linker_stubs_should_be_generated
)
729 switch (reloc_to_return
)
731 case BFD_RELOC_AVR_LO8_LDI_PM
:
732 reloc_to_return
= BFD_RELOC_AVR_LO8_LDI_GS
;
734 case BFD_RELOC_AVR_HI8_LDI_PM
:
735 reloc_to_return
= BFD_RELOC_AVR_HI8_LDI_GS
;
739 /* PR 5523: Do not generate a warning here,
740 legitimate code can trigger this case. */
744 return reloc_to_return
;
749 input_line_pointer
= tmp
;
752 /* Warn about expressions that fail to use lo8 (). */
753 if (exp
->X_op
== O_constant
)
755 int x
= exp
->X_add_number
;
757 if (x
< -255 || x
> 255)
758 as_warn (_("constant out of 8-bit range: %d"), x
);
761 return BFD_RELOC_AVR_LDI
;
764 /* Parse one instruction operand.
765 Return operand bitmask. Also fixups can be generated. */
768 avr_operand (struct avr_opcodes_s
*opcode
,
774 unsigned int op_mask
= 0;
775 char *str
= skip_space (*line
);
779 /* Any register operand. */
785 if (*str
== 'r' || *str
== 'R')
789 str
= extract_word (str
, r_name
, sizeof (r_name
));
791 if (ISDIGIT (r_name
[1]))
793 if (r_name
[2] == '\0')
794 op_mask
= r_name
[1] - '0';
795 else if (r_name
[1] != '0'
796 && ISDIGIT (r_name
[2])
797 && r_name
[3] == '\0')
798 op_mask
= (r_name
[1] - '0') * 10 + r_name
[2] - '0';
803 op_mask
= avr_get_constant (str
, 31);
804 str
= input_line_pointer
;
812 if (op_mask
< 16 || op_mask
> 23)
813 as_bad (_("register r16-r23 required"));
819 as_bad (_("register number above 15 required"));
825 as_bad (_("even register number required"));
830 if ((op_mask
& 1) || op_mask
< 24)
831 as_bad (_("register r24, r26, r28 or r30 required"));
832 op_mask
= (op_mask
- 24) >> 1;
837 as_bad (_("register name or number from 0 to 31 required"));
846 str
= skip_space (str
+ 1);
855 as_bad (_("pointer register (X, Y or Z) required"));
857 str
= skip_space (str
+ 1);
862 as_bad (_("cannot both predecrement and postincrement"));
866 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
867 registers, no predecrement, no postincrement. */
868 if (!avr_opt
.all_opcodes
&& (op_mask
& 0x100F)
869 && !(avr_mcu
->isa
& AVR_ISA_SRAM
))
870 as_bad (_("addressing mode not supported"));
876 as_bad (_("can't predecrement"));
878 if (! (*str
== 'z' || *str
== 'Z'))
879 as_bad (_("pointer register Z required"));
881 str
= skip_space (str
+ 1);
887 for (s
= opcode
->opcode
; *s
; ++s
)
890 op_mask
|= (1 << (15 - (s
- opcode
->opcode
)));
894 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
895 if (!avr_opt
.all_opcodes
896 && (op_mask
& 0x0001)
897 && !(avr_mcu
->isa
& AVR_ISA_MOVW
))
898 as_bad (_("postincrement not supported"));
903 char c
= TOLOWER (*str
++);
908 as_bad (_("pointer register (Y or Z) required"));
909 str
= skip_space (str
);
912 input_line_pointer
= str
;
913 avr_offset_expression (& op_expr
);
914 str
= input_line_pointer
;
915 fix_new_exp (frag_now
, where
, 3,
916 &op_expr
, FALSE
, BFD_RELOC_AVR_6
);
922 str
= parse_exp (str
, &op_expr
);
923 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
924 &op_expr
, FALSE
, BFD_RELOC_AVR_CALL
);
928 str
= parse_exp (str
, &op_expr
);
929 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
930 &op_expr
, TRUE
, BFD_RELOC_AVR_13_PCREL
);
934 str
= parse_exp (str
, &op_expr
);
935 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
936 &op_expr
, TRUE
, BFD_RELOC_AVR_7_PCREL
);
940 str
= parse_exp (str
, &op_expr
);
941 fix_new_exp (frag_now
, where
+ 2, opcode
->insn_size
* 2,
942 &op_expr
, FALSE
, BFD_RELOC_16
);
947 bfd_reloc_code_real_type r_type
;
949 input_line_pointer
= str
;
950 r_type
= avr_ldi_expression (&op_expr
);
951 str
= input_line_pointer
;
952 fix_new_exp (frag_now
, where
, 3,
953 &op_expr
, FALSE
, r_type
);
961 x
= ~avr_get_constant (str
, 255);
962 str
= input_line_pointer
;
963 op_mask
|= (x
& 0xf) | ((x
<< 4) & 0xf00);
968 input_line_pointer
= str
;
969 avr_offset_expression (& op_expr
);
970 str
= input_line_pointer
;
971 fix_new_exp (frag_now
, where
, 3,
972 & op_expr
, FALSE
, BFD_RELOC_AVR_6_ADIW
);
980 x
= avr_get_constant (str
, 7);
981 str
= input_line_pointer
;
992 x
= avr_get_constant (str
, 63);
993 str
= input_line_pointer
;
994 op_mask
|= (x
& 0xf) | ((x
& 0x30) << 5);
1002 x
= avr_get_constant (str
, 31);
1003 str
= input_line_pointer
;
1012 x
= avr_get_constant (str
, 15);
1013 str
= input_line_pointer
;
1014 op_mask
|= (x
<< 4);
1022 as_bad (_("unknown constraint `%c'"), *op
);
1029 /* Parse instruction operands.
1030 Return binary opcode. */
1033 avr_operands (struct avr_opcodes_s
*opcode
, char **line
)
1035 char *op
= opcode
->constraints
;
1036 unsigned int bin
= opcode
->bin_opcode
;
1037 char *frag
= frag_more (opcode
->insn_size
* 2);
1039 int where
= frag
- frag_now
->fr_literal
;
1040 static unsigned int prev
= 0; /* Previous opcode. */
1042 /* Opcode have operands. */
1045 unsigned int reg1
= 0;
1046 unsigned int reg2
= 0;
1047 int reg1_present
= 0;
1048 int reg2_present
= 0;
1050 /* Parse first operand. */
1051 if (REGISTER_P (*op
))
1053 reg1
= avr_operand (opcode
, where
, op
, &str
);
1056 /* Parse second operand. */
1069 if (REGISTER_P (*op
))
1072 str
= skip_space (str
);
1074 as_bad (_("`,' required"));
1075 str
= skip_space (str
);
1077 reg2
= avr_operand (opcode
, where
, op
, &str
);
1080 if (reg1_present
&& reg2_present
)
1081 reg2
= (reg2
& 0xf) | ((reg2
<< 5) & 0x200);
1082 else if (reg2_present
)
1090 /* Detect undefined combinations (like ld r31,Z+). */
1091 if (!avr_opt
.all_opcodes
&& AVR_UNDEF_P (bin
))
1092 as_warn (_("undefined combination of operands"));
1094 if (opcode
->insn_size
== 2)
1096 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1097 (AVR core bug, fixed in the newer devices). */
1098 if (!(avr_opt
.no_skip_bug
||
1099 (avr_mcu
->isa
& (AVR_ISA_MUL
| AVR_ISA_MOVW
)))
1100 && AVR_SKIP_P (prev
))
1101 as_warn (_("skipping two-word instruction"));
1103 bfd_putl32 ((bfd_vma
) bin
, frag
);
1106 bfd_putl16 ((bfd_vma
) bin
, frag
);
1113 /* GAS will call this function for each section at the end of the assembly,
1114 to permit the CPU backend to adjust the alignment of a section. */
1117 md_section_align (asection
*seg
, valueT addr
)
1119 int align
= bfd_get_section_alignment (stdoutput
, seg
);
1120 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
1123 /* If you define this macro, it should return the offset between the
1124 address of a PC relative fixup and the position from which the PC
1125 relative adjustment should be made. On many processors, the base
1126 of a PC relative instruction is the next instruction, so this
1127 macro would return the length of an instruction. */
1130 md_pcrel_from_section (fixS
*fixp
, segT sec
)
1132 if (fixp
->fx_addsy
!= (symbolS
*) NULL
1133 && (!S_IS_DEFINED (fixp
->fx_addsy
)
1134 || (S_GET_SEGMENT (fixp
->fx_addsy
) != sec
)))
1137 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1140 /* GAS will call this for each fixup. It should store the correct
1141 value in the object file. */
1144 md_apply_fix (fixS
*fixP
, valueT
* valP
, segT seg
)
1146 unsigned char *where
;
1150 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
1153 else if (fixP
->fx_pcrel
)
1155 segT s
= S_GET_SEGMENT (fixP
->fx_addsy
);
1157 if (s
== seg
|| s
== absolute_section
)
1159 value
+= S_GET_VALUE (fixP
->fx_addsy
);
1164 /* We don't actually support subtracting a symbol. */
1165 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
1166 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
1168 switch (fixP
->fx_r_type
)
1171 fixP
->fx_no_overflow
= 1;
1173 case BFD_RELOC_AVR_7_PCREL
:
1174 case BFD_RELOC_AVR_13_PCREL
:
1177 case BFD_RELOC_AVR_CALL
:
1183 /* Fetch the instruction, insert the fully resolved operand
1184 value, and stuff the instruction back again. */
1185 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1186 insn
= bfd_getl16 (where
);
1188 switch (fixP
->fx_r_type
)
1190 case BFD_RELOC_AVR_7_PCREL
:
1192 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1193 _("odd address operand: %ld"), value
);
1195 /* Instruction addresses are always right-shifted by 1. */
1197 --value
; /* Correct PC. */
1199 if (value
< -64 || value
> 63)
1200 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1201 _("operand out of range: %ld"), value
);
1202 value
= (value
<< 3) & 0x3f8;
1203 bfd_putl16 ((bfd_vma
) (value
| insn
), where
);
1206 case BFD_RELOC_AVR_13_PCREL
:
1208 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1209 _("odd address operand: %ld"), value
);
1211 /* Instruction addresses are always right-shifted by 1. */
1213 --value
; /* Correct PC. */
1215 if (value
< -2048 || value
> 2047)
1217 /* No wrap for devices with >8K of program memory. */
1218 if ((avr_mcu
->isa
& AVR_ISA_MEGA
) || avr_opt
.no_wrap
)
1219 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1220 _("operand out of range: %ld"), value
);
1224 bfd_putl16 ((bfd_vma
) (value
| insn
), where
);
1228 bfd_putl32 ((bfd_vma
) value
, where
);
1232 bfd_putl16 ((bfd_vma
) value
, where
);
1236 if (value
> 255 || value
< -128)
1237 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
1238 _("operand out of range: %ld"), value
);
1242 case BFD_RELOC_AVR_16_PM
:
1243 bfd_putl16 ((bfd_vma
) (value
>> 1), where
);
1246 case BFD_RELOC_AVR_LDI
:
1248 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1249 _("operand out of range: %ld"), value
);
1250 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
), where
);
1253 case BFD_RELOC_AVR_6
:
1254 if ((value
> 63) || (value
< 0))
1255 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1256 _("operand out of range: %ld"), value
);
1257 bfd_putl16 ((bfd_vma
) insn
| ((value
& 7) | ((value
& (3 << 3)) << 7) | ((value
& (1 << 5)) << 8)), where
);
1260 case BFD_RELOC_AVR_6_ADIW
:
1261 if ((value
> 63) || (value
< 0))
1262 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1263 _("operand out of range: %ld"), value
);
1264 bfd_putl16 ((bfd_vma
) insn
| (value
& 0xf) | ((value
& 0x30) << 2), where
);
1267 case BFD_RELOC_AVR_LO8_LDI
:
1268 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
), where
);
1271 case BFD_RELOC_AVR_HI8_LDI
:
1272 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 8), where
);
1275 case BFD_RELOC_AVR_MS8_LDI
:
1276 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 24), where
);
1279 case BFD_RELOC_AVR_HH8_LDI
:
1280 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 16), where
);
1283 case BFD_RELOC_AVR_LO8_LDI_NEG
:
1284 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
), where
);
1287 case BFD_RELOC_AVR_HI8_LDI_NEG
:
1288 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 8), where
);
1291 case BFD_RELOC_AVR_MS8_LDI_NEG
:
1292 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 24), where
);
1295 case BFD_RELOC_AVR_HH8_LDI_NEG
:
1296 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 16), where
);
1299 case BFD_RELOC_AVR_LO8_LDI_PM
:
1300 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 1), where
);
1303 case BFD_RELOC_AVR_HI8_LDI_PM
:
1304 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 9), where
);
1307 case BFD_RELOC_AVR_HH8_LDI_PM
:
1308 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 17), where
);
1311 case BFD_RELOC_AVR_LO8_LDI_PM_NEG
:
1312 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 1), where
);
1315 case BFD_RELOC_AVR_HI8_LDI_PM_NEG
:
1316 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 9), where
);
1319 case BFD_RELOC_AVR_HH8_LDI_PM_NEG
:
1320 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 17), where
);
1323 case BFD_RELOC_AVR_CALL
:
1327 x
= bfd_getl16 (where
);
1329 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1330 _("odd address operand: %ld"), value
);
1332 x
|= ((value
& 0x10000) | ((value
<< 3) & 0x1f00000)) >> 16;
1333 bfd_putl16 ((bfd_vma
) x
, where
);
1334 bfd_putl16 ((bfd_vma
) (value
& 0xffff), where
+ 2);
1338 case BFD_RELOC_AVR_8_LO
:
1339 *where
= 0xff & value
;
1342 case BFD_RELOC_AVR_8_HI
:
1343 *where
= 0xff & (value
>> 8);
1346 case BFD_RELOC_AVR_8_HLO
:
1347 *where
= 0xff & (value
>> 16);
1351 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1352 fixP
->fx_line
, fixP
->fx_r_type
);
1358 switch ((int) fixP
->fx_r_type
)
1360 case -BFD_RELOC_AVR_HI8_LDI_NEG
:
1361 case -BFD_RELOC_AVR_HI8_LDI
:
1362 case -BFD_RELOC_AVR_LO8_LDI_NEG
:
1363 case -BFD_RELOC_AVR_LO8_LDI
:
1364 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1365 _("only constant expression allowed"));
1374 /* GAS will call this to generate a reloc, passing the resulting reloc
1375 to `bfd_install_relocation'. This currently works poorly, as
1376 `bfd_install_relocation' often does the wrong thing, and instances of
1377 `tc_gen_reloc' have been written to work around the problems, which
1378 in turns makes it difficult to fix `bfd_install_relocation'. */
1380 /* If while processing a fixup, a reloc really needs to be created
1381 then it is done here. */
1384 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
,
1389 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
1393 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
1394 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
1396 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1397 "Difference of symbols in different sections is not supported");
1401 /* We are dealing with two symbols defined in the same section.
1402 Let us fix-up them here. */
1403 value
+= S_GET_VALUE (fixp
->fx_addsy
);
1404 value
-= S_GET_VALUE (fixp
->fx_subsy
);
1406 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1407 only takes it's second operands for the fixup value. */
1408 fixp
->fx_addsy
= NULL
;
1409 fixp
->fx_subsy
= NULL
;
1410 md_apply_fix (fixp
, (valueT
*) &value
, NULL
);
1415 reloc
= xmalloc (sizeof (arelent
));
1417 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
1418 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1420 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1421 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1422 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
1424 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1425 _("reloc %d not supported by object file format"),
1426 (int) fixp
->fx_r_type
);
1430 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1431 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
1432 reloc
->address
= fixp
->fx_offset
;
1434 reloc
->addend
= fixp
->fx_offset
;
1440 md_assemble (char *str
)
1442 struct avr_opcodes_s
*opcode
;
1445 str
= skip_space (extract_word (str
, op
, sizeof (op
)));
1448 as_bad (_("can't find opcode "));
1450 opcode
= (struct avr_opcodes_s
*) hash_find (avr_hash
, op
);
1454 as_bad (_("unknown opcode `%s'"), op
);
1458 /* Special case for opcodes with optional operands (lpm, elpm) -
1459 version with operands exists in avr_opcodes[] in the next entry. */
1461 if (*str
&& *opcode
->constraints
== '?')
1464 if (!avr_opt
.all_opcodes
&& (opcode
->isa
& avr_mcu
->isa
) != opcode
->isa
)
1465 as_bad (_("illegal opcode %s for mcu %s"), opcode
->name
, avr_mcu
->name
);
1467 dwarf2_emit_insn (0);
1469 /* We used to set input_line_pointer to the result of get_operands,
1470 but that is wrong. Our caller assumes we don't change it. */
1472 char *t
= input_line_pointer
;
1474 avr_operands (opcode
, &str
);
1475 if (*skip_space (str
))
1476 as_bad (_("garbage at end of line"));
1477 input_line_pointer
= t
;
1483 /* Name of the expression modifier allowed with .byte, .word, etc. */
1486 /* Only allowed with n bytes of data. */
1489 /* Associated RELOC. */
1490 bfd_reloc_code_real_type reloc
;
1492 /* Part of the error message. */
1496 static const exp_mod_data_t exp_mod_data
[] =
1498 /* Default, must be first. */
1499 { "", 0, BFD_RELOC_16
, "" },
1500 /* Divides by 2 to get word address. Generate Stub. */
1501 { "gs", 2, BFD_RELOC_AVR_16_PM
, "`gs' " },
1502 { "pm", 2, BFD_RELOC_AVR_16_PM
, "`pm' " },
1503 /* The following are used together with avr-gcc's __memx address space
1504 in order to initialize a 24-bit pointer variable with a 24-bit address.
1505 For address in flash, hlo8 will contain the flash segment if the
1506 symbol is located in flash. If the symbol is located in RAM; hlo8
1507 will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash
1508 addresses linearize address space. */
1509 { "lo8", 1, BFD_RELOC_AVR_8_LO
, "`lo8' " },
1510 { "hi8", 1, BFD_RELOC_AVR_8_HI
, "`hi8' " },
1511 { "hlo8", 1, BFD_RELOC_AVR_8_HLO
, "`hlo8' " },
1512 { "hh8", 1, BFD_RELOC_AVR_8_HLO
, "`hh8' " },
1514 { NULL
, 0, 0, NULL
}
1517 /* Data to pass between `avr_parse_cons_expression' and `avr_cons_fix_new'. */
1518 static const exp_mod_data_t
*pexp_mod_data
= &exp_mod_data
[0];
1520 /* Parse special CONS expression: pm (expression) or alternatively
1521 gs (expression). These are used for addressing program memory. Moreover,
1522 define lo8 (expression), hi8 (expression) and hlo8 (expression). */
1525 avr_parse_cons_expression (expressionS
*exp
, int nbytes
)
1527 const exp_mod_data_t
*pexp
= &exp_mod_data
[0];
1530 pexp_mod_data
= pexp
;
1532 tmp
= input_line_pointer
= skip_space (input_line_pointer
);
1534 /* The first entry of exp_mod_data[] contains an entry if no
1535 expression modifier is present. Skip it. */
1537 for (pexp
++; pexp
->name
; pexp
++)
1539 int len
= strlen (pexp
->name
);
1541 if (nbytes
== pexp
->nbytes
1542 && strncasecmp (input_line_pointer
, pexp
->name
, len
) == 0)
1544 input_line_pointer
= skip_space (input_line_pointer
+ len
);
1546 if (*input_line_pointer
== '(')
1548 input_line_pointer
= skip_space (input_line_pointer
+ 1);
1549 pexp_mod_data
= pexp
;
1552 if (*input_line_pointer
== ')')
1553 ++input_line_pointer
;
1556 as_bad (_("`)' required"));
1557 pexp_mod_data
= &exp_mod_data
[0];
1563 input_line_pointer
= tmp
;
1573 avr_cons_fix_new (fragS
*frag
,
1580 switch (pexp_mod_data
->reloc
)
1584 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_8
);
1585 else if (nbytes
== 2)
1586 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_16
);
1587 else if (nbytes
== 4)
1588 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_32
);
1593 case BFD_RELOC_AVR_16_PM
:
1594 case BFD_RELOC_AVR_8_LO
:
1595 case BFD_RELOC_AVR_8_HI
:
1596 case BFD_RELOC_AVR_8_HLO
:
1597 if (nbytes
== pexp_mod_data
->nbytes
)
1598 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, pexp_mod_data
->reloc
);
1605 as_bad (_("illegal %srelocation size: %d"), pexp_mod_data
->error
, nbytes
);
1607 pexp_mod_data
= &exp_mod_data
[0];
1611 tc_cfi_frame_initial_instructions (void)
1613 /* AVR6 pushes 3 bytes for calls. */
1614 int return_size
= (avr_mcu
->mach
== bfd_mach_avr6
? 3 : 2);
1616 /* The CFA is the caller's stack location before the call insn. */
1617 /* Note that the stack pointer is dwarf register number 32. */
1618 cfi_add_CFA_def_cfa (32, return_size
);
1620 /* Note that AVR consistently uses post-decrement, which means that things
1621 do not line up the same way as for targers that use pre-decrement. */
1622 cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN
, 1-return_size
);