1 /* tc-cris.c -- Assembler code for the CRIS CPU core.
2 Copyright 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4 Contributed by Axis Communications AB, Lund, Sweden.
5 Originally written for GAS 1.38.1 by Mikael Asker.
6 Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson.
8 This file is part of GAS, the GNU Assembler.
10 GAS is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GAS is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GAS; see the file COPYING. If not, write to the
22 Free Software Foundation, 59 Temple Place - Suite 330, Boston,
23 MA 02111-1307, USA. */
27 #include "safe-ctype.h"
29 #include "opcode/cris.h"
30 #include "dwarf2dbg.h"
32 /* Conventions used here:
33 Generally speaking, pointers to binutils types such as "fragS" and
34 "expressionS" get parameter and variable names ending in "P", such as
35 "fragP", to harmonize with the rest of the binutils code. Other
36 pointers get a "p" suffix, such as "bufp". Any function or type-name
37 that could clash with a current or future binutils or GAS function get
40 #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix"
41 #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix"
42 #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore"
43 #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore"
44 #define REGISTER_PREFIX_CHAR '$'
46 /* True for expressions where getting X_add_symbol and X_add_number is
47 enough to get the "base" and "offset"; no need to make_expr_symbol.
48 It's not enough to check if X_op_symbol is NULL; that misses unary
49 operations like O_uminus. */
50 #define SIMPLE_EXPR(EXP) \
51 ((EXP)->X_op == O_constant || (EXP)->X_op == O_symbol)
53 /* Like in ":GOT", ":GOTOFF" etc. Other ports use '@', but that's in
54 line_separator_chars for CRIS, so we avoid it. */
55 #define PIC_SUFFIX_CHAR ':'
57 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
58 Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */
61 CRIS_INSN_NORMAL
, CRIS_INSN_NONE
, CRIS_INSN_BRANCH
, CRIS_INSN_MUL
64 /* An instruction will have one of these prefixes.
65 Although the same bit-pattern, we handle BDAP with an immediate
66 expression (eventually quick or [pc+]) different from when we only have
67 register expressions. */
70 PREFIX_NONE
, PREFIX_BDAP_IMM
, PREFIX_BDAP
, PREFIX_BIAP
, PREFIX_DIP
,
74 /* The prefix for an instruction. */
77 enum prefix_kind kind
;
81 /* There might be an expression to be evaluated, like I in [rN+I]. */
84 /* If there's an expression, we might need a relocation. Here's the
85 type of what relocation to start relaxaton with.
86 The relocation is assumed to start immediately after the prefix insn,
87 so we don't provide an offset. */
88 enum bfd_reloc_code_real reloc
;
91 /* The description of the instruction being assembled. */
92 struct cris_instruction
94 /* If CRIS_INSN_NONE, then this insn is of zero length. */
95 enum cris_insn_kind insn_type
;
97 /* If a special register was mentioned, this is its description, else
99 const struct cris_spec_reg
*spec_reg
;
103 /* An insn may have at most one expression; theoretically there could be
104 another in its prefix (but I don't see how that could happen). */
107 /* The expression might need a relocation. Here's one to start
109 enum bfd_reloc_code_real reloc
;
111 /* The size in bytes of an immediate expression, or zero if
119 arch_crisv0
, arch_crisv3
, arch_crisv8
, arch_crisv10
,
120 arch_cris_any_v0_v10
, arch_crisv32
, arch_cris_common_v10_v32
123 static enum cris_archs cris_arch_from_string
PARAMS ((char **));
124 static int cris_insn_ver_valid_for_arch
PARAMS ((enum cris_insn_version_usage
,
127 static void cris_process_instruction
PARAMS ((char *,
128 struct cris_instruction
*,
129 struct cris_prefix
*));
130 static int get_bwd_size_modifier
PARAMS ((char **, int *));
131 static int get_bw_size_modifier
PARAMS ((char **, int *));
132 static int get_gen_reg
PARAMS ((char **, int *));
133 static int get_spec_reg
PARAMS ((char **,
134 const struct cris_spec_reg
**));
135 static int get_sup_reg
PARAMS ((char **, int *));
136 static int get_autoinc_prefix_or_indir_op
PARAMS ((char **,
137 struct cris_prefix
*,
140 static int get_3op_or_dip_prefix_op
PARAMS ((char **,
141 struct cris_prefix
*));
142 static int cris_get_expression
PARAMS ((char **, expressionS
*));
143 static int get_flags
PARAMS ((char **, int *));
144 static void gen_bdap
PARAMS ((int, expressionS
*));
145 static int branch_disp
PARAMS ((int));
146 static void gen_cond_branch_32
PARAMS ((char *, char *, fragS
*,
147 symbolS
*, symbolS
*, long int));
148 static void cris_number_to_imm
PARAMS ((char *, long, int, fixS
*, segT
));
149 static void cris_create_short_jump
PARAMS ((char *, addressT
, addressT
,
150 fragS
*, symbolS
*));
151 static void s_syntax
PARAMS ((int));
152 static void s_cris_file
PARAMS ((int));
153 static void s_cris_loc
PARAMS ((int));
154 static void s_cris_arch
PARAMS ((int));
156 /* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes. */
157 static void cris_get_pic_suffix
PARAMS ((char **,
158 bfd_reloc_code_real_type
*,
160 static unsigned int cris_get_pic_reloc_size
161 PARAMS ((bfd_reloc_code_real_type
));
163 /* All the .syntax functions. */
164 static void cris_force_reg_prefix
PARAMS ((void));
165 static void cris_relax_reg_prefix
PARAMS ((void));
166 static void cris_sym_leading_underscore
PARAMS ((void));
167 static void cris_sym_no_leading_underscore
PARAMS ((void));
168 static char *cris_insn_first_word_frag
PARAMS ((void));
170 /* Handle to the opcode hash table. */
171 static struct hash_control
*op_hash
= NULL
;
173 /* If we target cris-axis-linux-gnu (as opposed to generic cris-axis-elf),
174 we default to no underscore and required register-prefixes. The
175 difference is in the default values. */
177 #define DEFAULT_CRIS_AXIS_LINUX_GNU TRUE
179 #define DEFAULT_CRIS_AXIS_LINUX_GNU FALSE
182 /* Whether we demand that registers have a `$' prefix. Default here. */
183 static bfd_boolean demand_register_prefix
= DEFAULT_CRIS_AXIS_LINUX_GNU
;
185 /* Whether global user symbols have a leading underscore. Default here. */
186 static bfd_boolean symbols_have_leading_underscore
187 = !DEFAULT_CRIS_AXIS_LINUX_GNU
;
189 /* Whether or not we allow PIC, and expand to PIC-friendly constructs. */
190 static bfd_boolean pic
= FALSE
;
192 /* If we're configured for "cris", default to allow all v0..v10
193 instructions and register names. */
194 #ifndef DEFAULT_CRIS_ARCH
195 #define DEFAULT_CRIS_ARCH cris_any_v0_v10
198 /* No whitespace in the CONCAT2 parameter list. */
199 static enum cris_archs cris_arch
= XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
);
201 const pseudo_typeS md_pseudo_table
[] =
204 {"syntax", s_syntax
, 0},
205 {"file", s_cris_file
, 0},
206 {"loc", s_cris_loc
, 0},
207 {"arch", s_cris_arch
, 0},
211 static int warn_for_branch_expansion
= 0;
213 /* Whether to emit error when a MULS/MULU could be located last on a
215 static int err_for_dangerous_mul_placement
216 = (XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
) != arch_crisv32
);
218 const char cris_comment_chars
[] = ";";
220 /* This array holds the chars that only start a comment at the beginning of
221 a line. If the line seems to have the form '# 123 filename'
222 .line and .file directives will appear in the pre-processed output. */
223 /* Note that input_file.c hand-checks for '#' at the beginning of the
224 first line of the input file. This is because the compiler outputs
225 #NO_APP at the beginning of its output. */
226 /* Also note that slash-star will always start a comment. */
227 const char line_comment_chars
[] = "#";
228 const char line_separator_chars
[] = "@";
230 /* Now all floating point support is shut off. See md_atof. */
231 const char EXP_CHARS
[] = "";
232 const char FLT_CHARS
[] = "";
234 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
236 ---/ /--+-----------------+-----------------+-----------------+
237 | what state ? | how long ? |
238 ---/ /--+-----------------+-----------------+-----------------+
240 The "how long" bits are 00 = byte, 01 = word, 10 = dword (long).
241 Not all lengths are legit for a given value of (what state).
243 Groups for CRIS address relaxing:
246 length: byte, word, 10-byte expansion
249 length: byte, word, dword
252 Not really a relaxation (no infrastructure to get delay-slots
253 right), just an alignment and placement checker for the v10
256 4. Bcc (V32 and later)
257 length: byte, word, 14-byte expansion
260 length: byte, word, error
263 length: byte, word, dword
269 #define STATE_COND_BRANCH (1)
270 #define STATE_BASE_PLUS_DISP_PREFIX (2)
271 #define STATE_MUL (3)
272 #define STATE_COND_BRANCH_V32 (4)
273 #define STATE_COND_BRANCH_COMMON (5)
274 #define STATE_ABS_BRANCH_V32 (6)
275 #define STATE_LAPC (7)
277 #define STATE_LENGTH_MASK (3)
278 #define STATE_BYTE (0)
279 #define STATE_WORD (1)
280 #define STATE_DWORD (2)
281 /* Symbol undefined. */
282 #define STATE_UNDF (3)
283 #define STATE_MAX_LENGTH (3)
285 /* These displacements are relative to the address following the opcode
286 word of the instruction. The first letter is Byte, Word. The 2nd
287 letter is Forward, Backward. */
289 #define BRANCH_BF ( 254)
290 #define BRANCH_BB (-256)
291 #define BRANCH_BF_V32 ( 252)
292 #define BRANCH_BB_V32 (-258)
293 #define BRANCH_WF (2 + 32767)
294 #define BRANCH_WB (2 + -32768)
295 #define BRANCH_WF_V32 (-2 + 32767)
296 #define BRANCH_WB_V32 (-2 + -32768)
298 #define BDAP_BF ( 127)
299 #define BDAP_BB (-128)
300 #define BDAP_WF ( 32767)
301 #define BDAP_WB (-32768)
303 #define ENCODE_RELAX(what, length) (((what) << 2) + (length))
305 const relax_typeS md_cris_relax_table
[] =
307 /* Error sentinel (0, 0). */
320 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (1, 1)},
322 /* Bcc [PC+] (1, 1). */
323 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (1, 2)},
325 /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
333 {BDAP_BF
, BDAP_BB
, 0, ENCODE_RELAX (2, 1)},
335 /* BDAP.[bw] [PC+] (2, 1). */
336 {BDAP_WF
, BDAP_WB
, 2, ENCODE_RELAX (2, 2)},
338 /* BDAP.d [PC+] (2, 2). */
344 /* MULS/MULU (3, 0). Positions (3, 1..3) are unused. */
345 {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0},
347 /* V32: Bcc o (4, 0). */
348 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (4, 1)},
350 /* V32: Bcc [PC+] (4, 1). */
351 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (4, 2)},
353 /* V32: BA .+12; NOP; BA32 target; NOP; Bcc .-6 (4, 2). */
359 /* COMMON: Bcc o (5, 0). The offsets are calculated as for v32. Code
360 should contain two nop insns (or four if offset size is large or
361 unknown) after every label. */
362 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (5, 1)},
364 /* COMMON: Bcc [PC+] (5, 1). */
365 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (5, 2)},
367 /* COMMON: FIXME: ???. Treat as error currently. */
373 /* V32: BA o (6, 0). */
374 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (6, 1)},
376 /* V32: BA.W (6, 1). */
377 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (6, 2)},
379 /* V32: BA.D (6, 2). */
385 /* LAPC: LAPCQ .+0..15*2,Rn (7, 0). */
386 {14*2, -1*2, 0, ENCODE_RELAX (7, 2)},
389 While there's a shorter sequence, e.g. LAPCQ + an ADDQ or SUBQ,
390 that would affect flags, so we can't do that as it wouldn't be a
391 proper insn expansion of LAPCQ. This row is associated with a
392 2-byte expansion, so it's unused rather than the next. */
395 /* LAPC: LAPC.D (7, 2). */
407 /* Target-specific multicharacter options, not const-declared. */
408 struct option md_longopts
[] =
410 #define OPTION_NO_US (OPTION_MD_BASE + 0)
411 {"no-underscore", no_argument
, NULL
, OPTION_NO_US
},
412 #define OPTION_US (OPTION_MD_BASE + 1)
413 {"underscore", no_argument
, NULL
, OPTION_US
},
414 #define OPTION_PIC (OPTION_US + 1)
415 {"pic", no_argument
, NULL
, OPTION_PIC
},
416 #define OPTION_MULBUG_ABORT_ON (OPTION_PIC + 1)
417 {"mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_ON
},
418 #define OPTION_MULBUG_ABORT_OFF (OPTION_MULBUG_ABORT_ON + 1)
419 {"no-mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_OFF
},
420 #define OPTION_ARCH (OPTION_MULBUG_ABORT_OFF + 1)
421 {"march", required_argument
, NULL
, OPTION_ARCH
},
422 {NULL
, no_argument
, NULL
, 0}
425 /* Not const-declared. */
426 size_t md_longopts_size
= sizeof (md_longopts
);
427 const char *md_shortopts
= "hHN";
429 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
430 since a short_jump must skip a *number* of long jumps, it must also be
431 a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
432 for the delay slot and hope that the jump table at most needs
433 32767/4=8191 long-jumps. A branch is better than a jump, since it is
434 relative; we will not have a reloc to fix up somewhere.
436 Note that we can't add relocs, because relaxation uses these fixed
437 numbers, and md_create_short_jump is called after relaxation. */
439 int md_short_jump_size
= 6;
441 /* The v32 version has a delay-slot, hence two bytes longer. */
442 #define cris_any_v0_v10_long_jump_size 6
443 #define crisv32_long_jump_size 8
445 int md_long_jump_size
= XCONCAT2 (DEFAULT_CRIS_ARCH
,_long_jump_size
);
447 /* Report output format. Small changes in output format (like elf
448 variants below) can happen until all options are parsed, but after
449 that, the output format must remain fixed. */
452 cris_target_format ()
454 switch (OUTPUT_FLAVOR
)
456 case bfd_target_aout_flavour
:
459 case bfd_target_elf_flavour
:
460 if (symbols_have_leading_underscore
)
461 return "elf32-us-cris";
470 /* Return a bfd_mach_cris... value corresponding to the value of
476 unsigned int retval
= 0;
480 case arch_cris_common_v10_v32
:
481 retval
= bfd_mach_cris_v10_v32
;
485 retval
= bfd_mach_cris_v32
;
489 case arch_cris_any_v0_v10
:
490 retval
= bfd_mach_cris_v0_v10
;
494 BAD_CASE (cris_arch
);
500 /* We need a port-specific relaxation function to cope with sym2 - sym1
501 relative expressions with both symbols in the same segment (but not
502 necessarily in the same frag as this insn), for example:
503 move.d [pc+sym2-(sym1-2)],r10
505 The offset can be 8, 16 or 32 bits long. */
508 cris_relax_frag (seg
, fragP
, stretch
)
509 segT seg ATTRIBUTE_UNUSED
;
511 long stretch ATTRIBUTE_UNUSED
;
516 const relax_typeS
*this_type
;
517 const relax_typeS
*start_type
;
518 relax_substateT next_state
;
519 relax_substateT this_state
;
520 const relax_typeS
*table
= TC_GENERIC_RELAX_TABLE
;
522 /* We only have to cope with frags as prepared by
523 md_estimate_size_before_relax. The dword cases may get here
524 because of the different reasons that they aren't relaxable. */
525 switch (fragP
->fr_subtype
)
527 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
528 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
529 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
530 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
531 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
532 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
533 /* When we get to these states, the frag won't grow any more. */
536 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
537 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
538 if (fragP
->fr_symbol
== NULL
539 || S_GET_SEGMENT (fragP
->fr_symbol
) != absolute_section
)
540 as_fatal (_("internal inconsistency problem in %s: fr_symbol %lx"),
541 __FUNCTION__
, (long) fragP
->fr_symbol
);
542 symbolP
= fragP
->fr_symbol
;
543 if (symbol_resolved_p (symbolP
))
544 as_fatal (_("internal inconsistency problem in %s: resolved symbol"),
546 aim
= S_GET_VALUE (symbolP
);
549 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
550 /* Nothing to do here. */
554 as_fatal (_("internal inconsistency problem in %s: fr_subtype %d"),
555 __FUNCTION__
, fragP
->fr_subtype
);
558 /* The rest is stolen from relax_frag. There's no obvious way to
559 share the code, but fortunately no requirement to keep in sync as
560 long as fragP->fr_symbol does not have its segment changed. */
562 this_state
= fragP
->fr_subtype
;
563 start_type
= this_type
= table
+ this_state
;
567 /* Look backwards. */
568 for (next_state
= this_type
->rlx_more
; next_state
;)
569 if (aim
>= this_type
->rlx_backward
)
573 /* Grow to next state. */
574 this_state
= next_state
;
575 this_type
= table
+ this_state
;
576 next_state
= this_type
->rlx_more
;
582 for (next_state
= this_type
->rlx_more
; next_state
;)
583 if (aim
<= this_type
->rlx_forward
)
587 /* Grow to next state. */
588 this_state
= next_state
;
589 this_type
= table
+ this_state
;
590 next_state
= this_type
->rlx_more
;
594 growth
= this_type
->rlx_length
- start_type
->rlx_length
;
596 fragP
->fr_subtype
= this_state
;
600 /* Prepare machine-dependent frags for relaxation.
602 Called just before relaxation starts. Any symbol that is now undefined
603 will not become defined.
605 Return the correct fr_subtype in the frag.
607 Return the initial "guess for fr_var" to caller. The guess for fr_var
608 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
609 or fr_var contributes to our returned value.
611 Although it may not be explicit in the frag, pretend
612 fr_var starts with a value. */
615 md_estimate_size_before_relax (fragP
, segment_type
)
617 /* The segment is either N_DATA or N_TEXT. */
621 symbolS
*symbolP
= fragP
->fr_symbol
;
623 #define HANDLE_RELAXABLE(state) \
624 case ENCODE_RELAX (state, STATE_UNDF): \
625 if (symbolP != NULL \
626 && S_GET_SEGMENT (symbolP) == segment_type \
627 && !S_IS_WEAK (symbolP)) \
628 /* The symbol lies in the same segment - a relaxable \
631 = ENCODE_RELAX (state, STATE_BYTE); \
633 /* Unknown or not the same segment, so not relaxable. */ \
635 = ENCODE_RELAX (state, STATE_DWORD); \
637 = md_cris_relax_table[fragP->fr_subtype].rlx_length; \
640 old_fr_fix
= fragP
->fr_fix
;
642 switch (fragP
->fr_subtype
)
644 HANDLE_RELAXABLE (STATE_COND_BRANCH
);
645 HANDLE_RELAXABLE (STATE_COND_BRANCH_V32
);
646 HANDLE_RELAXABLE (STATE_COND_BRANCH_COMMON
);
647 HANDLE_RELAXABLE (STATE_ABS_BRANCH_V32
);
649 case ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
):
651 && S_GET_SEGMENT (symbolP
) == segment_type
652 && !S_IS_WEAK (symbolP
))
654 /* The symbol lies in the same segment - a relaxable case.
655 Check if we currently have an odd offset; we can't code
656 that into the instruction. Relaxing presumably only cause
657 multiple-of-two changes, so we should only need to adjust
659 bfd_vma target_address
661 ? S_GET_VALUE (symbolP
)
662 : 0) + fragP
->fr_offset
;
663 bfd_vma var_part_offset
= fragP
->fr_fix
;
664 bfd_vma address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
665 long offset
= target_address
- (address_of_var_part
- 2);
669 ? ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
)
670 : ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
);
673 /* Unknown or not the same segment, so not relaxable. */
675 = ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
);
677 = md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
680 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
):
681 /* Note that we can not do anything sane with relaxing
682 [rX + a_known_symbol_in_text], it will have to be a 32-bit
685 We could play tricks with managing a constant pool and make
686 a_known_symbol_in_text a "bdap [pc + offset]" pointing there
687 (like the GOT for ELF shared libraries), but that's no use, it
688 would in general be no shorter or faster code, only more
691 if (S_GET_SEGMENT (symbolP
) != absolute_section
)
693 /* Go for dword if not absolute or same segment. */
695 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
);
696 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
698 else if (!symbol_resolved_p (fragP
->fr_symbol
))
700 /* The symbol will eventually be completely resolved as an
701 absolute expression, but right now it depends on the result
702 of relaxation and we don't know anything else about the
703 value. We start relaxation with the assumption that it'll
706 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
);
707 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
711 /* Absolute expression. */
713 value
= (symbolP
!= NULL
714 ? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
716 if (value
>= -128 && value
<= 127)
718 /* Byte displacement. */
719 (fragP
->fr_opcode
)[0] = value
;
723 /* Word or dword displacement. */
724 int pow2_of_size
= 1;
727 if (value
< -32768 || value
> 32767)
729 /* Outside word range, make it a dword. */
733 /* Modify the byte-offset BDAP into a word or dword offset
734 BDAP. Or really, a BDAP rX,8bit into a
735 BDAP.[wd] rX,[PC+] followed by a word or dword. */
736 (fragP
->fr_opcode
)[0] = BDAP_PC_LOW
+ pow2_of_size
* 16;
738 /* Keep the register number in the highest four bits. */
739 (fragP
->fr_opcode
)[1] &= 0xF0;
740 (fragP
->fr_opcode
)[1] |= BDAP_INCR_HIGH
;
742 /* It grew by two or four bytes. */
743 fragP
->fr_fix
+= 1 << pow2_of_size
;
744 writep
= fragP
->fr_literal
+ old_fr_fix
;
745 md_number_to_chars (writep
, value
, 1 << pow2_of_size
);
751 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
752 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
753 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
754 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
755 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
756 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
757 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
758 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
759 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
760 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
761 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
762 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
763 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
764 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
765 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
766 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
767 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
768 /* When relaxing a section for the second time, we don't need to
769 do anything except making sure that fr_var is set right. */
770 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
773 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
774 /* Nothing to do here. */
778 BAD_CASE (fragP
->fr_subtype
);
781 return fragP
->fr_var
+ (fragP
->fr_fix
- old_fr_fix
);
784 /* Perform post-processing of machine-dependent frags after relaxation.
785 Called after relaxation is finished.
787 fr_type == rs_machine_dependent.
788 fr_subtype is what the address relaxed to.
790 Out: Any fixS:s and constants are set up.
792 The caller will turn the frag into a ".space 0". */
795 md_convert_frag (abfd
, sec
, fragP
)
796 bfd
*abfd ATTRIBUTE_UNUSED
;
797 segT sec ATTRIBUTE_UNUSED
;
800 /* Pointer to first byte in variable-sized part of the frag. */
803 /* Pointer to first opcode byte in frag. */
806 /* Used to check integrity of the relaxation.
807 One of 2 = long, 1 = word, or 0 = byte. */
810 /* Size in bytes of variable-sized part of frag. */
811 int var_part_size
= 0;
813 /* This is part of *fragP. It contains all information about addresses
814 and offsets to varying parts. */
816 unsigned long var_part_offset
;
818 /* Where, in file space, is _var of *fragP? */
819 unsigned long address_of_var_part
= 0;
821 /* Where, in file space, does addr point? */
822 unsigned long target_address
;
824 know (fragP
->fr_type
== rs_machine_dependent
);
826 length_code
= fragP
->fr_subtype
& STATE_LENGTH_MASK
;
827 know (length_code
>= 0 && length_code
< STATE_MAX_LENGTH
);
829 var_part_offset
= fragP
->fr_fix
;
830 var_partp
= fragP
->fr_literal
+ var_part_offset
;
831 opcodep
= fragP
->fr_opcode
;
833 symbolP
= fragP
->fr_symbol
;
834 target_address
= (symbolP
? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
835 address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
837 switch (fragP
->fr_subtype
)
839 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
840 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
841 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
842 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
843 opcodep
[0] = branch_disp ((target_address
- address_of_var_part
));
847 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
848 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
849 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
850 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
851 /* We had a quick immediate branch, now turn it into a word one i.e. a
853 opcodep
[0] = BRANCH_PC_LOW
;
855 opcodep
[1] |= BRANCH_INCR_HIGH
;
856 md_number_to_chars (var_partp
,
859 - (address_of_var_part
860 + (cris_arch
== arch_crisv32
861 || cris_arch
== arch_cris_common_v10_v32
867 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
868 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
869 fragP
->fr_symbol
, (symbolS
*) NULL
,
871 /* Ten bytes added: a branch, nop and a jump. */
872 var_part_size
= 2 + 2 + 4 + 2;
875 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
876 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
877 fragP
->fr_symbol
, (symbolS
*) NULL
,
879 /* Twelve bytes added: a branch, nop and another branch and nop. */
880 var_part_size
= 2 + 2 + 2 + 4 + 2;
883 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
884 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
885 _("Relaxation to long branches for .arch common_v10_v32\
887 /* Pretend we have twelve bytes for sake of quelling further
889 var_part_size
= 2 + 2 + 2 + 4 + 2;
892 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
893 /* We had a quick immediate branch or a word immediate ba. Now
894 turn it into a dword one. */
895 opcodep
[0] = BA_DWORD_OPCODE
& 255;
896 opcodep
[1] = (BA_DWORD_OPCODE
>> 8) & 255;
897 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, symbolP
,
898 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
902 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
904 long offset
= target_address
- (address_of_var_part
- 2);
906 /* This is mostly a sanity check; useful occurrences (if there
907 really are any) should have been caught in
908 md_estimate_size_before_relax. We can (at least
909 theoretically) stumble over invalid code with odd sizes and
910 .p2aligns within the code, so emit an error if that happens.
911 (The generic relaxation machinery is not fit to check this.) */
914 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
915 _("Complicated LAPC target operand is not\
916 a multiple of two. Use LAPC.D"));
918 /* FIXME: This *is* a sanity check. Remove when done with. */
919 if (offset
> 15*2 || offset
< 0)
920 as_fatal (_("Internal error found in md_convert_frag: offset %ld.\
921 Please report this."),
924 opcodep
[0] |= (offset
/ 2) & 0xf;
929 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
931 md_number_to_chars (opcodep
,
932 LAPC_DWORD_OPCODE
+ (opcodep
[1] & 0xf0) * 256,
934 /* Remember that the reloc is against the position *after* the
935 relocated contents, so we need to adjust to the start of
937 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
938 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
943 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
945 as_fatal (_("internal inconsistency in %s: bdapq no symbol"),
947 opcodep
[0] = S_GET_VALUE (symbolP
);
951 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
952 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
953 one that uses PC autoincrement. */
954 opcodep
[0] = BDAP_PC_LOW
+ (1 << 4);
956 opcodep
[1] |= BDAP_INCR_HIGH
;
958 as_fatal (_("internal inconsistency in %s: bdap.w with no symbol"),
960 md_number_to_chars (var_partp
, S_GET_VALUE (symbolP
), 2);
964 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
965 /* We had a BDAP 16-bit "word", change the offset to a dword. */
966 opcodep
[0] = BDAP_PC_LOW
+ (2 << 4);
968 opcodep
[1] |= BDAP_INCR_HIGH
;
969 if (fragP
->fr_symbol
== NULL
)
970 md_number_to_chars (var_partp
, fragP
->fr_offset
, 4);
972 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
973 fragP
->fr_offset
, 0, BFD_RELOC_32
);
977 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
978 /* This is the only time we check position and aligmnent of the
979 placement-tracking frag. */
980 if (sec
->alignment_power
< 2)
981 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
982 _("section alignment must be >= 4 bytes to check MULS/MULU safeness"));
985 /* If the address after the MULS/MULU has alignment which is
986 that of the section and may be that of a cache-size of the
987 buggy versions, then the MULS/MULU can be placed badly. */
988 if ((address_of_var_part
989 & ((1 << sec
->alignment_power
) - 1) & 31) == 0)
990 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
991 _("dangerous MULS/MULU location; give it higher alignment"));
996 BAD_CASE (fragP
->fr_subtype
);
1000 fragP
->fr_fix
+= var_part_size
;
1003 /* Generate a short jump around a secondary jump table.
1004 Used by md_create_long_jump.
1006 This used to be md_create_short_jump, but is now called from
1007 md_create_long_jump instead, when sufficient, since the sizes of the
1008 jumps are the same for pre-v32. */
1011 cris_create_short_jump (storep
, from_addr
, to_addr
, fragP
, to_symbol
)
1015 fragS
*fragP ATTRIBUTE_UNUSED
;
1016 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
1020 /* See md_create_long_jump about the comment on the "+ 2". */
1021 long int max_minimal_minus_distance
;
1022 long int max_minimal_plus_distance
;
1025 if (cris_arch
== arch_crisv32
)
1027 max_minimal_minus_distance
= BRANCH_BB_V32
+ 2;
1028 max_minimal_plus_distance
= BRANCH_BF_V32
+ 2;
1029 nop_opcode
= NOP_OPCODE_V32
;
1033 max_minimal_minus_distance
= BRANCH_BB
+ 2;
1034 max_minimal_plus_distance
= BRANCH_BF
+ 2;
1035 nop_opcode
= NOP_OPCODE
;
1038 distance
= to_addr
- from_addr
;
1040 if (max_minimal_minus_distance
<= distance
1041 && distance
<= max_minimal_plus_distance
)
1043 /* Create a "short" short jump: "BA distance - 2". */
1044 storep
[0] = branch_disp (distance
- 2);
1045 storep
[1] = BA_QUICK_HIGH
;
1047 /* A nop for the delay slot. */
1048 md_number_to_chars (storep
+ 2, nop_opcode
, 2);
1050 /* The extra word should be filled with something sane too. Make it
1051 a nop to keep disassembly sane. */
1052 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1056 /* Make it a "long" short jump: "BA (PC+)". */
1057 md_number_to_chars (storep
, BA_PC_INCR_OPCODE
, 2);
1059 /* ".WORD distance - 4". */
1060 md_number_to_chars (storep
+ 2,
1061 (long) (distance
- 4
1062 - (cris_arch
== arch_crisv32
1066 /* A nop for the delay slot. */
1067 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1071 /* Generate a long jump in a secondary jump table.
1073 storep Where to store the jump instruction.
1074 from_addr Address of the jump instruction.
1075 to_addr Destination address of the jump.
1076 fragP Which frag the destination address operand
1078 to_symbol Destination symbol. */
1081 md_create_long_jump (storep
, from_addr
, to_addr
, fragP
, to_symbol
)
1090 /* FIXME: What's that "+ 3"? It comes from the magic numbers that
1091 used to be here, it's just translated to the limit macros used in
1092 the relax table. But why + 3? */
1093 long int max_short_minus_distance
1094 = cris_arch
!= arch_crisv32
? BRANCH_WB
+ 3 : BRANCH_WB_V32
+ 3;
1096 long int max_short_plus_distance
1097 = cris_arch
!= arch_crisv32
? BRANCH_WF
+ 3 : BRANCH_WF_V32
+ 3;
1099 /* Bail out for compatibility mode. (It seems it can be implemented,
1100 perhaps with a 10-byte sequence: "move.d NNNN,$pc/$acr", "jump
1101 $acr", "nop"; but doesn't seem worth it at the moment.) */
1102 if (cris_arch
== arch_cris_common_v10_v32
)
1103 as_fatal (_("Out-of-range .word offset handling\
1104 is not implemented for .arch common_v10_v32"));
1106 distance
= to_addr
- from_addr
;
1108 if (max_short_minus_distance
<= distance
1109 && distance
<= max_short_plus_distance
)
1110 /* Then make it a "short" long jump. */
1111 cris_create_short_jump (storep
, from_addr
, to_addr
, fragP
,
1115 /* We have a "long" long jump: "JUMP [PC+]". If CRISv32, always
1116 make it a BA. Else make it an "ADD [PC+],PC" if we're supposed
1117 to emit PIC code. */
1118 md_number_to_chars (storep
,
1119 cris_arch
== arch_crisv32
1121 : (pic
? ADD_PC_INCR_OPCODE
: JUMP_PC_INCR_OPCODE
),
1124 /* Follow with a ".DWORD to_addr", PC-relative for PIC. */
1125 fix_new (fragP
, storep
+ 2 - fragP
->fr_literal
, 4, to_symbol
,
1126 cris_arch
== arch_crisv32
? 6 : 0,
1127 cris_arch
== arch_crisv32
|| pic
? 1 : 0,
1128 cris_arch
== arch_crisv32
|| pic
1129 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
1131 /* Follow it with a "NOP" for CRISv32. */
1132 if (cris_arch
== arch_crisv32
)
1133 md_number_to_chars (storep
+ 6, NOP_OPCODE_V32
, 2);
1137 /* Allocate space for the first piece of an insn, and mark it as the
1138 start of the insn for debug-format use. */
1141 cris_insn_first_word_frag ()
1143 char *insnp
= frag_more (2);
1145 /* We need to mark the start of the insn by passing dwarf2_emit_insn
1146 the offset from the current fragment position. This must be done
1147 after the first fragment is created but before any other fragments
1148 (fixed or varying) are created. Note that the offset only
1149 corresponds to the "size" of the insn for a fixed-size,
1150 non-expanded insn. */
1151 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
1152 dwarf2_emit_insn (2);
1157 /* Port-specific assembler initialization. */
1162 const char *hashret
= NULL
;
1165 /* Set up a hash table for the instructions. */
1166 op_hash
= hash_new ();
1167 if (op_hash
== NULL
)
1168 as_fatal (_("Virtual memory exhausted"));
1170 /* Enable use of ".if ..asm.arch.cris.v32"
1171 and ".if ..asm.arch.cris.common_v10_v32" and a few others. */
1172 symbol_table_insert (symbol_new ("..asm.arch.cris.v32", absolute_section
,
1173 (cris_arch
== arch_crisv32
),
1174 &zero_address_frag
));
1175 symbol_table_insert (symbol_new ("..asm.arch.cris.v10", absolute_section
,
1176 (cris_arch
== arch_crisv10
),
1177 &zero_address_frag
));
1178 symbol_table_insert (symbol_new ("..asm.arch.cris.common_v10_v32",
1180 (cris_arch
== arch_cris_common_v10_v32
),
1181 &zero_address_frag
));
1182 symbol_table_insert (symbol_new ("..asm.arch.cris.any_v0_v10",
1184 (cris_arch
== arch_cris_any_v0_v10
),
1185 &zero_address_frag
));
1187 while (cris_opcodes
[i
].name
!= NULL
)
1189 const char *name
= cris_opcodes
[i
].name
;
1191 if (! cris_insn_ver_valid_for_arch (cris_opcodes
[i
].applicable_version
,
1198 hashret
= hash_insert (op_hash
, name
, (PTR
) &cris_opcodes
[i
]);
1200 if (hashret
!= NULL
&& *hashret
!= '\0')
1201 as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes
[i
].name
,
1202 *hashret
== 0 ? _("(unknown reason)") : hashret
);
1205 if (cris_opcodes
[i
].match
& cris_opcodes
[i
].lose
)
1206 as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes
[i
].name
,
1207 cris_opcodes
[i
].args
);
1211 while (cris_opcodes
[i
].name
!= NULL
1212 && strcmp (cris_opcodes
[i
].name
, name
) == 0);
1216 /* Assemble a source line. */
1222 struct cris_instruction output_instruction
;
1223 struct cris_prefix prefix
;
1229 /* Do the low-level grunt - assemble to bits and split up into a prefix
1230 and ordinary insn. */
1231 cris_process_instruction (str
, &output_instruction
, &prefix
);
1233 /* Handle any prefixes to the instruction. */
1234 switch (prefix
.kind
)
1239 /* When the expression is unknown for a BDAP, it can need 0, 2 or 4
1240 extra bytes, so we handle it separately. */
1241 case PREFIX_BDAP_IMM
:
1242 /* We only do it if the relocation is unspecified, i.e. not a PIC
1244 if (prefix
.reloc
== BFD_RELOC_NONE
)
1246 gen_bdap (prefix
.base_reg_number
, &prefix
.expr
);
1253 opcodep
= cris_insn_first_word_frag ();
1255 /* Output the prefix opcode. */
1256 md_number_to_chars (opcodep
, (long) prefix
.opcode
, 2);
1258 /* Having a specified reloc only happens for DIP and for BDAP with
1259 PIC operands, but it is ok to drop through here for the other
1260 prefixes as they can have no relocs specified. */
1261 if (prefix
.reloc
!= BFD_RELOC_NONE
)
1263 unsigned int relocsize
1264 = (prefix
.kind
== PREFIX_DIP
1265 ? 4 : cris_get_pic_reloc_size (prefix
.reloc
));
1267 p
= frag_more (relocsize
);
1268 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
), relocsize
,
1269 &prefix
.expr
, 0, prefix
.reloc
);
1274 opcodep
= cris_insn_first_word_frag ();
1276 /* Output the prefix opcode. Being a "push", we add the negative
1277 size of the register to "sp". */
1278 if (output_instruction
.spec_reg
!= NULL
)
1280 /* Special register. */
1281 opcodep
[0] = -output_instruction
.spec_reg
->reg_size
;
1285 /* General register. */
1288 opcodep
[1] = (REG_SP
<< 4) + (BDAP_QUICK_OPCODE
>> 8);
1292 BAD_CASE (prefix
.kind
);
1295 /* If we only had a prefix insn, we're done. */
1296 if (output_instruction
.insn_type
== CRIS_INSN_NONE
)
1299 /* Done with the prefix. Continue with the main instruction. */
1300 if (prefix
.kind
== PREFIX_NONE
)
1301 opcodep
= cris_insn_first_word_frag ();
1303 opcodep
= frag_more (2);
1305 /* Output the instruction opcode. */
1306 md_number_to_chars (opcodep
, (long) (output_instruction
.opcode
), 2);
1308 /* Output the symbol-dependent instruction stuff. */
1309 if (output_instruction
.insn_type
== CRIS_INSN_BRANCH
)
1311 segT to_seg
= absolute_section
;
1312 int is_undefined
= 0;
1315 if (output_instruction
.expr
.X_op
!= O_constant
)
1317 to_seg
= S_GET_SEGMENT (output_instruction
.expr
.X_add_symbol
);
1319 if (to_seg
== undefined_section
)
1323 if (to_seg
== now_seg
|| is_undefined
1324 /* In CRISv32, there *is* a 32-bit absolute branch, so don't
1325 emit the 12-byte sequence for known symbols in other
1327 || (cris_arch
== arch_crisv32
1328 && output_instruction
.opcode
== BA_QUICK_OPCODE
))
1330 /* Handle complex expressions. */
1332 = (SIMPLE_EXPR (&output_instruction
.expr
)
1333 ? output_instruction
.expr
.X_add_number
1336 = (SIMPLE_EXPR (&output_instruction
.expr
)
1337 ? output_instruction
.expr
.X_add_symbol
1338 : make_expr_symbol (&output_instruction
.expr
));
1340 /* If is_undefined, the expression may still become now_seg.
1341 That case is handled by md_estimate_size_before_relax. */
1342 length_code
= to_seg
== now_seg
? STATE_BYTE
: STATE_UNDF
;
1344 /* Make room for max twelve bytes of variable length for v32 mode,
1345 ten for v10 and older. */
1346 frag_var (rs_machine_dependent
,
1347 (cris_arch
== arch_crisv32
1348 || cris_arch
== arch_cris_common_v10_v32
) ? 12 : 10, 0,
1349 ENCODE_RELAX (cris_arch
== arch_crisv32
1350 ? (output_instruction
.opcode
1352 ? STATE_ABS_BRANCH_V32
1353 : STATE_COND_BRANCH_V32
)
1354 : (cris_arch
== arch_cris_common_v10_v32
1355 ? STATE_COND_BRANCH_COMMON
1356 : STATE_COND_BRANCH
),
1358 sym
, addvalue
, opcodep
);
1362 /* We have: to_seg != now_seg && to_seg != undefined_section.
1363 This means it is a branch to a known symbol in another
1364 section, perhaps an absolute address. Emit a 32-bit branch. */
1366 = frag_more ((cris_arch
== arch_crisv32
1367 || cris_arch
== arch_cris_common_v10_v32
)
1370 gen_cond_branch_32 (opcodep
, cond_jump
, frag_now
,
1371 output_instruction
.expr
.X_add_symbol
,
1373 output_instruction
.expr
.X_add_number
);
1376 else if (output_instruction
.insn_type
== CRIS_INSN_MUL
1377 && err_for_dangerous_mul_placement
)
1378 /* Create a frag which which we track the location of the mul insn
1379 (in the last two bytes before the mul-frag). */
1380 frag_variant (rs_machine_dependent
, 0, 0,
1381 ENCODE_RELAX (STATE_MUL
, STATE_BYTE
),
1385 if (output_instruction
.imm_oprnd_size
> 0)
1387 /* The instruction has an immediate operand. */
1388 enum bfd_reloc_code_real reloc
= BFD_RELOC_NONE
;
1390 switch (output_instruction
.imm_oprnd_size
)
1392 /* Any byte-size immediate constants are treated as
1393 word-size. FIXME: Thus overflow check does not work
1397 /* Note that size-check for the explicit reloc has already
1398 been done when we get here. */
1399 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1400 reloc
= output_instruction
.reloc
;
1402 reloc
= BFD_RELOC_16
;
1406 /* Allow a relocation specified in the operand. */
1407 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1408 reloc
= output_instruction
.reloc
;
1410 reloc
= BFD_RELOC_32
;
1414 BAD_CASE (output_instruction
.imm_oprnd_size
);
1417 p
= frag_more (output_instruction
.imm_oprnd_size
);
1418 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
),
1419 output_instruction
.imm_oprnd_size
,
1420 &output_instruction
.expr
,
1421 reloc
== BFD_RELOC_32_PCREL
1422 || reloc
== BFD_RELOC_16_PCREL
1423 || reloc
== BFD_RELOC_8_PCREL
, reloc
);
1425 else if (output_instruction
.reloc
== BFD_RELOC_CRIS_LAPCQ_OFFSET
1426 && output_instruction
.expr
.X_md
!= 0)
1428 /* Handle complex expressions. */
1430 = (output_instruction
.expr
.X_op_symbol
!= NULL
1431 ? 0 : output_instruction
.expr
.X_add_number
);
1433 = (output_instruction
.expr
.X_op_symbol
!= NULL
1434 ? make_expr_symbol (&output_instruction
.expr
)
1435 : output_instruction
.expr
.X_add_symbol
);
1437 /* This is a relaxing construct, so we need a frag_var rather
1438 than the fix_new_exp call below. */
1439 frag_var (rs_machine_dependent
,
1441 ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
),
1442 sym
, addvalue
, opcodep
);
1444 else if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1446 /* An immediate operand that has a relocation and needs to be
1447 processed further. */
1449 /* It is important to use fix_new_exp here and everywhere else
1450 (and not fix_new), as fix_new_exp can handle "difference
1451 expressions" - where the expression contains a difference of
1452 two symbols in the same segment. */
1453 fix_new_exp (frag_now
, (opcodep
- frag_now
->fr_literal
), 2,
1454 &output_instruction
.expr
,
1455 output_instruction
.reloc
== BFD_RELOC_32_PCREL
1456 || output_instruction
.reloc
== BFD_RELOC_16_PCREL
1457 || output_instruction
.reloc
== BFD_RELOC_8_PCREL
1458 || (output_instruction
.reloc
1459 == BFD_RELOC_CRIS_LAPCQ_OFFSET
),
1460 output_instruction
.reloc
);
1465 /* Low level text-to-bits assembly. */
1468 cris_process_instruction (insn_text
, out_insnp
, prefixp
)
1470 struct cris_instruction
*out_insnp
;
1471 struct cris_prefix
*prefixp
;
1474 char modified_char
= 0;
1476 struct cris_opcode
*instruction
;
1483 /* Reset these fields to a harmless state in case we need to return in
1485 prefixp
->kind
= PREFIX_NONE
;
1486 prefixp
->reloc
= BFD_RELOC_NONE
;
1487 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1488 out_insnp
->imm_oprnd_size
= 0;
1490 /* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
1491 that the caller has translated the opcode to lower-case, up to the
1492 first non-letter. */
1493 for (operands
= insn_text
; ISLOWER (*operands
); ++operands
)
1496 /* Terminate the opcode after letters, but save the character there if
1497 it was of significance. */
1504 /* Put back the modified character later. */
1505 modified_char
= *operands
;
1509 /* Consume the character after the mnemonic
1510 and replace it with '\0'. */
1515 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1519 /* Find the instruction. */
1520 instruction
= (struct cris_opcode
*) hash_find (op_hash
, insn_text
);
1521 if (instruction
== NULL
)
1523 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1527 /* Put back the modified character. */
1528 switch (modified_char
)
1534 *--operands
= modified_char
;
1537 /* Try to match an opcode table slot. */
1538 for (s
= operands
;;)
1542 /* Initialize *prefixp, perhaps after being modified for a
1544 prefixp
->kind
= PREFIX_NONE
;
1545 prefixp
->reloc
= BFD_RELOC_NONE
;
1547 /* Initialize *out_insnp. */
1548 memset (out_insnp
, 0, sizeof (*out_insnp
));
1549 out_insnp
->opcode
= instruction
->match
;
1550 out_insnp
->reloc
= BFD_RELOC_NONE
;
1551 out_insnp
->insn_type
= CRIS_INSN_NORMAL
;
1552 out_insnp
->imm_oprnd_size
= 0;
1556 /* Build the opcode, checking as we go to make sure that the
1558 for (args
= instruction
->args
;; ++args
)
1563 /* If we've come to the end of arguments, we're done. */
1569 /* Non-matcher character for disassembly.
1577 /* These must match exactly. */
1583 /* "ACR", case-insensitive.
1584 Handle a sometimes-mandatory dollar sign as register
1586 if (*s
== REGISTER_PREFIX_CHAR
)
1588 else if (demand_register_prefix
)
1591 if ((*s
++ != 'a' && s
[-1] != 'A')
1592 || (*s
++ != 'c' && s
[-1] != 'C')
1593 || (*s
++ != 'r' && s
[-1] != 'R'))
1598 /* This is not really an operand, but causes a "BDAP
1599 -size,SP" prefix to be output, for PUSH instructions. */
1600 prefixp
->kind
= PREFIX_PUSH
;
1604 /* This letter marks an operand that should not be matched
1605 in the assembler. It is a branch with 16-bit
1606 displacement. The assembler will create them from the
1607 8-bit flavor when necessary. The assembler does not
1608 support the [rN+] operand, as the [r15+] that is
1609 generated for 16-bit displacements. */
1613 /* A 5-bit unsigned immediate in bits <4:0>. */
1614 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1618 if (out_insnp
->expr
.X_op
== O_constant
1619 && (out_insnp
->expr
.X_add_number
< 0
1620 || out_insnp
->expr
.X_add_number
> 31))
1621 as_bad (_("Immediate value not in 5 bit unsigned range: %ld"),
1622 out_insnp
->expr
.X_add_number
);
1624 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_5
;
1629 /* A 4-bit unsigned immediate in bits <3:0>. */
1630 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1634 if (out_insnp
->expr
.X_op
== O_constant
1635 && (out_insnp
->expr
.X_add_number
< 0
1636 || out_insnp
->expr
.X_add_number
> 15))
1637 as_bad (_("Immediate value not in 4 bit unsigned range: %ld"),
1638 out_insnp
->expr
.X_add_number
);
1640 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_4
;
1644 /* For 'd', check for an optional ".d" or ".D" at the
1645 start of the operands, followed by a space character. */
1647 if (modified_char
== '.' && *s
== '.')
1649 if ((s
[1] != 'd' && s
[1] == 'D')
1650 || ! ISSPACE (s
[2]))
1658 /* General register in bits <15:12> and <3:0>. */
1659 if (! get_gen_reg (&s
, ®no
))
1663 out_insnp
->opcode
|= regno
/* << 0 */;
1664 out_insnp
->opcode
|= regno
<< 12;
1669 /* Flags from the condition code register. */
1673 if (! get_flags (&s
, &flags
))
1676 out_insnp
->opcode
|= ((flags
& 0xf0) << 8) | (flags
& 0xf);
1681 /* A 6-bit signed immediate in bits <5:0>. */
1682 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1686 if (out_insnp
->expr
.X_op
== O_constant
1687 && (out_insnp
->expr
.X_add_number
< -32
1688 || out_insnp
->expr
.X_add_number
> 31))
1689 as_bad (_("Immediate value not in 6 bit range: %ld"),
1690 out_insnp
->expr
.X_add_number
);
1691 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_6
;
1696 /* A 6-bit unsigned immediate in bits <5:0>. */
1697 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1701 if (out_insnp
->expr
.X_op
== O_constant
1702 && (out_insnp
->expr
.X_add_number
< 0
1703 || out_insnp
->expr
.X_add_number
> 63))
1704 as_bad (_("Immediate value not in 6 bit unsigned range: %ld"),
1705 out_insnp
->expr
.X_add_number
);
1706 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_6
;
1711 /* A size modifier, B, W or D, to be put in a bit position
1712 suitable for CLEAR instructions (i.e. reflecting a zero
1714 if (! get_bwd_size_modifier (&s
, &size_bits
))
1721 out_insnp
->opcode
|= 0 << 12;
1725 out_insnp
->opcode
|= 4 << 12;
1729 out_insnp
->opcode
|= 8 << 12;
1736 /* A size modifier, B, W or D, to be put in bits <5:4>. */
1737 if (modified_char
!= '.'
1738 || ! get_bwd_size_modifier (&s
, &size_bits
))
1742 out_insnp
->opcode
|= size_bits
<< 4;
1747 /* A branch expression. */
1748 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1752 out_insnp
->insn_type
= CRIS_INSN_BRANCH
;
1757 /* A 8-bit quick BDAP expression, "expr,R". */
1758 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1766 if (!get_gen_reg (&s
, ®no
))
1769 out_insnp
->opcode
|= regno
<< 12;
1770 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_8
;
1774 /* A BDAP expression for any size, "expr,R". */
1775 if (! cris_get_expression (&s
, &prefixp
->expr
))
1784 if (!get_gen_reg (&s
, &prefixp
->base_reg_number
))
1787 /* Since 'O' is used with an explicit bdap, we have no
1788 "real" instruction. */
1789 prefixp
->kind
= PREFIX_BDAP_IMM
;
1791 = BDAP_QUICK_OPCODE
| (prefixp
->base_reg_number
<< 12);
1793 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1798 /* Special register in bits <15:12>. */
1799 if (! get_spec_reg (&s
, &out_insnp
->spec_reg
))
1803 /* Use of some special register names come with a
1804 specific warning. Note that we have no ".cpu type"
1805 pseudo yet, so some of this is just unused
1807 if (out_insnp
->spec_reg
->warning
)
1808 as_warn (out_insnp
->spec_reg
->warning
);
1809 else if (out_insnp
->spec_reg
->applicable_version
1810 == cris_ver_warning
)
1811 /* Others have a generic warning. */
1812 as_warn (_("Unimplemented register `%s' specified"),
1813 out_insnp
->spec_reg
->name
);
1816 |= out_insnp
->spec_reg
->number
<< 12;
1821 /* This character is used in the disassembler to
1822 recognize a prefix instruction to fold into the
1823 addressing mode for the next instruction. It is
1828 /* General register in bits <15:12>. */
1829 if (! get_gen_reg (&s
, ®no
))
1833 out_insnp
->opcode
|= regno
<< 12;
1838 /* General register in bits <3:0>. */
1839 if (! get_gen_reg (&s
, ®no
))
1843 out_insnp
->opcode
|= regno
/* << 0 */;
1848 /* Source operand in bit <10> and a prefix; a 3-operand
1850 if (! get_3op_or_dip_prefix_op (&s
, prefixp
))
1856 /* Source operand in bits <10>, <3:0> and optionally a
1857 prefix; i.e. an indirect operand or an side-effect
1858 prefix (where valid). */
1859 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
, &mode
,
1866 if (prefixp
->kind
!= PREFIX_NONE
)
1868 /* A prefix, so it has the autoincrement bit
1870 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
1874 /* No prefix. The "mode" variable contains bits like
1875 whether or not this is autoincrement mode. */
1876 out_insnp
->opcode
|= (mode
<< 10);
1878 /* If there was a PIC reloc specifier, then it was
1879 attached to the prefix. Note that we can't check
1880 that the reloc size matches, since we don't have
1881 all the operands yet in all cases. */
1882 if (prefixp
->reloc
!= BFD_RELOC_NONE
)
1883 out_insnp
->reloc
= prefixp
->reloc
;
1886 out_insnp
->opcode
|= regno
/* << 0 */ ;
1892 /* Like 's', but immediate operand only. Also does not
1893 modify insn. There are no insns where a PIC reloc
1894 specifier makes sense. */
1895 if (cris_get_expression (&s
, &out_insnp
->expr
))
1903 /* Like 'N', but PC-relative to the start of the insn.
1904 There might be a :PLT to request a PLT entry. */
1905 if (cris_get_expression (&s
, &out_insnp
->expr
))
1908 out_insnp
->reloc
= BFD_RELOC_32_PCREL
;
1910 /* We have to adjust the expression, because that
1911 relocation is to the location *after* the
1912 relocation. So add 2 for the insn and 4 for the
1914 out_insnp
->expr
.X_add_number
+= 6;
1916 if (pic
&& *s
== PIC_SUFFIX_CHAR
)
1917 cris_get_pic_suffix (&s
, &out_insnp
->reloc
,
1925 /* Maybe 'u', maybe 'n'. Only for LAPC/LAPCQ. */
1926 if (cris_get_expression (&s
, &out_insnp
->expr
))
1928 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1930 /* Define 1 as relaxing. */
1931 out_insnp
->expr
.X_md
= 1;
1937 /* Four PC-relative bits in <3:0> representing <4:1>:0 of
1938 an offset relative to the beginning of the current
1940 if (cris_get_expression (&s
, &out_insnp
->expr
))
1942 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1944 /* Define 0 as non-relaxing. */
1945 out_insnp
->expr
.X_md
= 0;
1947 /* We have to adjust the expression, because that
1948 relocation is to the location *after* the
1949 insn. So add 2 for the insn. */
1950 out_insnp
->expr
.X_add_number
+= 2;
1956 /* Rs.m in bits <15:12> and <5:4>. */
1957 if (! get_gen_reg (&s
, ®no
)
1958 || ! get_bwd_size_modifier (&s
, &size_bits
))
1962 out_insnp
->opcode
|= (regno
<< 12) | (size_bits
<< 4);
1967 /* Source operand in bits <10>, <3:0> and optionally a
1968 prefix; i.e. an indirect operand or an side-effect
1971 The difference to 's' is that this does not allow an
1972 "immediate" expression. */
1973 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
,
1981 if (prefixp
->kind
!= PREFIX_NONE
)
1983 /* A prefix, and those matched here always have
1984 side-effects (see 's' case). */
1985 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
1989 /* No prefix. The "mode" variable contains bits
1990 like whether or not this is autoincrement
1992 out_insnp
->opcode
|= (mode
<< 10);
1995 out_insnp
->opcode
|= regno
/* << 0 */;
2000 /* Size modifier (B or W) in bit <4>. */
2001 if (! get_bw_size_modifier (&s
, &size_bits
))
2005 out_insnp
->opcode
|= size_bits
<< 4;
2010 if (cris_arch
== arch_crisv32
2011 && get_sup_reg (&s
, ®no
))
2013 out_insnp
->opcode
|= regno
<< 12;
2022 /* We get here when we fail a match above or we found a
2023 complete match. Break out of this loop. */
2027 /* Was it a match or a miss? */
2030 /* If it's just that the args don't match, maybe the next
2031 item in the table is the same opcode but with
2032 matching operands. First skip any invalid ones. */
2033 while (instruction
[1].name
!= NULL
2034 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2035 && ! cris_insn_ver_valid_for_arch (instruction
[1]
2036 .applicable_version
,
2040 if (instruction
[1].name
!= NULL
2041 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2042 && cris_insn_ver_valid_for_arch (instruction
[1]
2043 .applicable_version
,
2046 /* Yep. Restart and try that one instead. */
2053 /* We've come to the end of instructions with this
2054 opcode, so it must be an error. */
2055 as_bad (_("Illegal operands"));
2057 /* As discard_rest_of_line, but without continuing to the
2059 while (!is_end_of_line
[(unsigned char) *input_line_pointer
])
2060 input_line_pointer
++;
2066 /* We have a match. Check if there's anything more to do. */
2069 /* There was an immediate mode operand, so we must check
2070 that it has an appropriate size. */
2071 switch (instruction
->imm_oprnd_size
)
2075 /* Shouldn't happen; this one does not have immediate
2076 operands with different sizes. */
2077 BAD_CASE (instruction
->imm_oprnd_size
);
2081 out_insnp
->imm_oprnd_size
= 4;
2085 if (cris_arch
== arch_crisv32
)
2086 /* All immediate loads of special registers are
2087 32-bit on CRISv32. */
2088 out_insnp
->imm_oprnd_size
= 4;
2090 switch (out_insnp
->spec_reg
->reg_size
)
2093 if (out_insnp
->expr
.X_op
== O_constant
2094 && (out_insnp
->expr
.X_add_number
< -128
2095 || out_insnp
->expr
.X_add_number
> 255))
2096 as_bad (_("Immediate value not in 8 bit range: %ld"),
2097 out_insnp
->expr
.X_add_number
);
2100 /* FIXME: We need an indicator in the instruction
2101 table to pass on, to indicate if we need to check
2102 overflow for a signed or unsigned number. */
2103 if (out_insnp
->expr
.X_op
== O_constant
2104 && (out_insnp
->expr
.X_add_number
< -32768
2105 || out_insnp
->expr
.X_add_number
> 65535))
2106 as_bad (_("Immediate value not in 16 bit range: %ld"),
2107 out_insnp
->expr
.X_add_number
);
2108 out_insnp
->imm_oprnd_size
= 2;
2112 out_insnp
->imm_oprnd_size
= 4;
2116 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2121 case SIZE_FIELD_SIGNED
:
2122 case SIZE_FIELD_UNSIGNED
:
2125 /* FIXME: Find way to pass un/signedness to
2126 caller, and set reloc type instead, postponing
2127 this check until cris_number_to_imm. That
2128 necessarily corrects the reloc type for the
2129 byte case, maybe requiring further changes. */
2131 if (out_insnp
->expr
.X_op
== O_constant
)
2133 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2134 && (out_insnp
->expr
.X_add_number
< -128
2135 || out_insnp
->expr
.X_add_number
> 255))
2136 as_bad (_("Immediate value not in 8 bit range: %ld"),
2137 out_insnp
->expr
.X_add_number
);
2138 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2139 && (out_insnp
->expr
.X_add_number
< -128
2140 || out_insnp
->expr
.X_add_number
> 127))
2141 as_bad (_("Immediate value not in 8 bit signed range: %ld"),
2142 out_insnp
->expr
.X_add_number
);
2143 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2144 && (out_insnp
->expr
.X_add_number
< 0
2145 || out_insnp
->expr
.X_add_number
> 255))
2146 as_bad (_("Immediate value not in 8 bit unsigned range: %ld"),
2147 out_insnp
->expr
.X_add_number
);
2152 if (out_insnp
->expr
.X_op
== O_constant
)
2154 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2155 && (out_insnp
->expr
.X_add_number
< -32768
2156 || out_insnp
->expr
.X_add_number
> 65535))
2157 as_bad (_("Immediate value not in 16 bit range: %ld"),
2158 out_insnp
->expr
.X_add_number
);
2159 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2160 && (out_insnp
->expr
.X_add_number
< -32768
2161 || out_insnp
->expr
.X_add_number
> 32767))
2162 as_bad (_("Immediate value not in 16 bit signed range: %ld"),
2163 out_insnp
->expr
.X_add_number
);
2164 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2165 && (out_insnp
->expr
.X_add_number
< 0
2166 || out_insnp
->expr
.X_add_number
> 65535))
2167 as_bad (_("Immediate value not in 16 bit unsigned range: %ld"),
2168 out_insnp
->expr
.X_add_number
);
2170 out_insnp
->imm_oprnd_size
= 2;
2174 out_insnp
->imm_oprnd_size
= 4;
2178 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2182 /* If there was a relocation specified for the immediate
2183 expression (i.e. it had a PIC modifier) check that the
2184 size of the PIC relocation matches the size specified by
2186 if (out_insnp
->reloc
!= BFD_RELOC_NONE
2187 && (cris_get_pic_reloc_size (out_insnp
->reloc
)
2188 != (unsigned int) out_insnp
->imm_oprnd_size
))
2189 as_bad (_("PIC relocation size does not match operand size"));
2191 else if (instruction
->op
== cris_muls_op
2192 || instruction
->op
== cris_mulu_op
)
2193 out_insnp
->insn_type
= CRIS_INSN_MUL
;
2199 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
2200 which must point to a '.' in front of the modifier. On successful
2201 return, *cPP is advanced to the character following the size
2202 modifier, and is undefined otherwise.
2204 cPP Pointer to pointer to string starting
2205 with the size modifier.
2207 size_bitsp Pointer to variable to contain the size bits on
2210 Return 1 iff a correct size modifier is found, else 0. */
2213 get_bwd_size_modifier (cPP
, size_bitsp
)
2221 /* Consume the '.'. */
2245 /* Consume the size letter. */
2251 /* Get a B or W size modifier from the string pointed out by *cPP,
2252 which must point to a '.' in front of the modifier. On successful
2253 return, *cPP is advanced to the character following the size
2254 modifier, and is undefined otherwise.
2256 cPP Pointer to pointer to string starting
2257 with the size modifier.
2259 size_bitsp Pointer to variable to contain the size bits on
2262 Return 1 iff a correct size modifier is found, else 0. */
2265 get_bw_size_modifier (cPP
, size_bitsp
)
2273 /* Consume the '.'. */
2292 /* Consume the size letter. */
2298 /* Get a general register from the string pointed out by *cPP. The
2299 variable *cPP is advanced to the character following the general
2300 register name on a successful return, and has its initial position
2303 cPP Pointer to pointer to string, beginning with a general
2306 regnop Pointer to int containing the register number.
2308 Return 1 iff a correct general register designator is found,
2312 get_gen_reg (cPP
, regnop
)
2319 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2320 if (**cPP
== REGISTER_PREFIX_CHAR
)
2322 else if (demand_register_prefix
)
2329 /* "P" as in "PC"? Consume the "P". */
2332 if ((**cPP
== 'C' || **cPP
== 'c')
2333 && ! ISALNUM ((*cPP
)[1])
2334 /* Here's a little twist: For v32 and the compatibility mode,
2335 we only recognize PC as a register number if there's '+]'
2336 after. We don't consume that, but the presence can only be
2337 valid after a register in a post-increment context, which
2338 is also the only valid context for PC as a register for
2339 v32. Not that it's used very often, but saying "MOVE.D
2340 [PC+],R5" should remain valid. It's not supported for
2341 jump-type insns or other insns with no [Rn+] mode, though. */
2342 && ((cris_arch
!= arch_crisv32
2343 && cris_arch
!= arch_cris_common_v10_v32
)
2344 || ((*cPP
)[1] == '+' && (*cPP
)[2] == ']')))
2346 /* It's "PC": consume the "c" and we're done. */
2353 /* Like with PC, we recognize ACR, but only if it's *not* followed
2354 by '+', and only for v32. */
2357 if (cris_arch
!= arch_crisv32
2358 || ((*cPP
)[1] != 'c' && (*cPP
)[1] != 'C')
2359 || ((*cPP
)[2] != 'r' && (*cPP
)[2] != 'R')
2360 || ISALNUM ((*cPP
)[3])
2361 || (*cPP
)[3] == '+')
2369 /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */
2372 if (ISDIGIT (**cPP
))
2374 /* It's r[0-9]. Consume and check the next digit. */
2375 *regnop
= **cPP
- '0';
2378 if (! ISALNUM (**cPP
))
2380 /* No more digits, we're done. */
2385 /* One more digit. Consume and add. */
2386 *regnop
= *regnop
* 10 + (**cPP
- '0');
2388 /* We need to check for a valid register number; Rn,
2389 0 <= n <= MAX_REG. */
2390 if (*regnop
<= MAX_REG
)
2392 /* Consume second digit. */
2402 /* "S" as in "SP"? Consume the "S". */
2404 if (**cPP
== 'P' || **cPP
== 'p')
2406 /* It's "SP": consume the "p" and we're done. */
2414 /* Just here to silence compilation warnings. */
2418 /* We get here if we fail. Restore the pointer. */
2423 /* Get a special register from the string pointed out by *cPP. The
2424 variable *cPP is advanced to the character following the special
2425 register name if one is found, and retains its original position
2428 cPP Pointer to pointer to string starting with a special register
2431 sregpp Pointer to Pointer to struct spec_reg, where a pointer to the
2432 register description will be stored.
2434 Return 1 iff a correct special register name is found. */
2437 get_spec_reg (cPP
, sregpp
)
2439 const struct cris_spec_reg
**sregpp
;
2443 char *name_begin
= *cPP
;
2445 const struct cris_spec_reg
*sregp
;
2447 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2448 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2450 else if (demand_register_prefix
)
2453 /* Loop over all special registers. */
2454 for (sregp
= cris_spec_regs
; sregp
->name
!= NULL
; sregp
++)
2456 /* Start over from beginning of the supposed name. */
2460 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2466 /* For a match, we must have consumed the name in the table, and we
2467 must be outside what could be part of a name. Assume here that a
2468 test for alphanumerics is sufficient for a name test. */
2469 if (*s2
== 0 && ! ISALNUM (*s1
)
2470 && cris_insn_ver_valid_for_arch (sregp
->applicable_version
,
2473 /* We have a match. Update the pointer and be done. */
2480 /* If we got here, we did not find any name. */
2484 /* Get a support register from the string pointed out by *cPP. The
2485 variable *cPP is advanced to the character following the support-
2486 register name if one is found, and retains its original position
2489 cPP Pointer to pointer to string starting with a support-register
2492 sregpp Pointer to int containing the register number.
2494 Return 1 iff a correct support-register name is found. */
2497 get_sup_reg (cPP
, regnop
)
2503 char *name_begin
= *cPP
;
2505 const struct cris_support_reg
*sregp
;
2507 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2508 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2510 else if (demand_register_prefix
)
2513 /* Loop over all support-registers. */
2514 for (sregp
= cris_support_regs
; sregp
->name
!= NULL
; sregp
++)
2516 /* Start over from beginning of the supposed name. */
2520 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2526 /* For a match, we must have consumed the name in the table, and we
2527 must be outside what could be part of a name. Assume here that a
2528 test for alphanumerics is sufficient for a name test. */
2529 if (*s2
== 0 && ! ISALNUM (*s1
))
2531 /* We have a match. Update the pointer and be done. */
2533 *regnop
= sregp
->number
;
2538 /* If we got here, we did not find any name. */
2542 /* Get an unprefixed or side-effect-prefix operand from the string pointed
2543 out by *cPP. The pointer *cPP is advanced to the character following
2544 the indirect operand if we have success, else it contains an undefined
2547 cPP Pointer to pointer to string beginning with the first
2548 character of the supposed operand.
2550 prefixp Pointer to structure containing an optional instruction
2553 is_autoincp Pointer to int indicating the indirect or autoincrement
2556 src_regnop Pointer to int containing the source register number in
2559 imm_foundp Pointer to an int indicating if an immediate expression
2562 imm_exprP Pointer to a structure containing an immediate
2563 expression, if success and if *imm_foundp is nonzero.
2565 Return 1 iff a correct indirect operand is found. */
2568 get_autoinc_prefix_or_indir_op (cPP
, prefixp
, is_autoincp
, src_regnop
,
2569 imm_foundp
, imm_exprP
)
2571 struct cris_prefix
*prefixp
;
2575 expressionS
*imm_exprP
;
2577 /* Assume there was no immediate mode expression. */
2582 /* So this operand is one of:
2584 Autoincrement: [rN+]
2585 Indexed with assign: [rN=rM+rO.S]
2586 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s]
2588 Either way, consume the '['. */
2591 /* Get the rN register. */
2592 if (! get_gen_reg (cPP
, src_regnop
))
2593 /* If there was no register, then this cannot match. */
2597 /* We got the register, now check the next character. */
2601 /* Indirect mode. We're done here. */
2602 prefixp
->kind
= PREFIX_NONE
;
2607 /* This must be an auto-increment mode, if there's a
2609 prefixp
->kind
= PREFIX_NONE
;
2612 /* We consume this character and break out to check the
2618 /* This must be indexed with assign, or offset with assign
2619 to match. Not supported for crisv32 or in
2620 compatibility mode. */
2621 if (cris_arch
== arch_crisv32
2622 || cris_arch
== arch_cris_common_v10_v32
)
2627 /* Either way, the next thing must be a register. */
2628 if (! get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2629 /* No register, no match. */
2633 /* We've consumed "[rN=rM", so we must be looking at
2634 "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or
2638 int index_reg_number
;
2644 /* This must be [rx=ry+[rz].s] or
2645 [rx=ry+[rz+].s] or no match. We must be
2646 looking at rz after consuming the '['. */
2649 if (!get_gen_reg (cPP
, &index_reg_number
))
2652 prefixp
->kind
= PREFIX_BDAP
;
2654 = (BDAP_INDIR_OPCODE
2655 + (prefixp
->base_reg_number
<< 12)
2656 + index_reg_number
);
2660 /* We've seen "[rx=ry+[rz+" here, so now we
2661 know that there must be "].s]" left to
2664 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2667 /* If it wasn't autoincrement, we don't need to
2670 /* Check the next-to-last ']'. */
2676 /* Check the ".s" modifier. */
2677 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2680 prefixp
->opcode
|= size_bits
<< 4;
2682 /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s.
2683 We break out to check the final ']'. */
2686 /* It wasn't an indirection. Check if it's a
2688 else if (get_gen_reg (cPP
, &index_reg_number
))
2692 /* Indexed with assign mode: "[rN+rM.S]". */
2693 prefixp
->kind
= PREFIX_BIAP
;
2695 = (BIAP_OPCODE
+ (index_reg_number
<< 12)
2696 + prefixp
->base_reg_number
/* << 0 */);
2698 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2699 /* Size missing, this isn't a match. */
2703 /* Size found, break out to check the
2705 prefixp
->opcode
|= size_bits
<< 4;
2709 /* Not a register. Then this must be "[rN+I]". */
2710 else if (cris_get_expression (cPP
, &prefixp
->expr
))
2712 /* We've got offset with assign mode. Fill
2713 in the blanks and break out to match the
2715 prefixp
->kind
= PREFIX_BDAP_IMM
;
2717 /* We tentatively put an opcode corresponding to
2718 a 32-bit operand here, although it may be
2719 relaxed when there's no PIC specifier for the
2722 = (BDAP_INDIR_OPCODE
2723 | (prefixp
->base_reg_number
<< 12)
2724 | (AUTOINCR_BIT
<< 8)
2726 | REG_PC
/* << 0 */);
2728 /* This can have a PIC suffix, specifying reloc
2730 if (pic
&& **cPP
== PIC_SUFFIX_CHAR
)
2732 unsigned int relocsize
;
2734 cris_get_pic_suffix (cPP
, &prefixp
->reloc
,
2737 /* Tweak the size of the immediate operand
2738 in the prefix opcode if it isn't what we
2741 = cris_get_pic_reloc_size (prefixp
->reloc
);
2744 = ((prefixp
->opcode
& ~(3 << 4))
2745 | ((relocsize
>> 1) << 4));
2750 /* Neither register nor expression found, so
2751 this can't be a match. */
2754 /* Not "[rN+" but perhaps "[rN-"? */
2755 else if (**cPP
== '-')
2757 /* We must have an offset with assign mode. */
2758 if (! cris_get_expression (cPP
, &prefixp
->expr
))
2759 /* No expression, no match. */
2763 /* We've got offset with assign mode. Fill
2764 in the blanks and break out to match the
2767 Note that we don't allow a PIC suffix for an
2768 operand with a minus sign. */
2769 prefixp
->kind
= PREFIX_BDAP_IMM
;
2774 /* Neither '+' nor '-' after "[rN=rM". Lose. */
2778 /* Neither ']' nor '+' nor '=' after "[rN". Lose. */
2783 /* When we get here, we have a match and will just check the closing
2784 ']'. We can still fail though. */
2789 /* Don't forget to consume the final ']'.
2790 Then return in glory. */
2795 /* No indirection. Perhaps a constant? */
2796 else if (cris_get_expression (cPP
, imm_exprP
))
2798 /* Expression found, this is immediate mode. */
2799 prefixp
->kind
= PREFIX_NONE
;
2801 *src_regnop
= REG_PC
;
2804 /* This can have a PIC suffix, specifying reloc type to use. The
2805 caller must check that the reloc size matches the operand size. */
2806 if (pic
&& **cPP
== PIC_SUFFIX_CHAR
)
2807 cris_get_pic_suffix (cPP
, &prefixp
->reloc
, imm_exprP
);
2812 /* No luck today. */
2816 /* This function gets an indirect operand in a three-address operand
2817 combination from the string pointed out by *cPP. The pointer *cPP is
2818 advanced to the character following the indirect operand on success, or
2819 has an unspecified value on failure.
2821 cPP Pointer to pointer to string beginning
2824 prefixp Pointer to structure containing an
2827 Returns 1 iff a correct indirect operand is found. */
2830 get_3op_or_dip_prefix_op (cPP
, prefixp
)
2832 struct cris_prefix
*prefixp
;
2837 /* We must have a '[' or it's a clean failure. */
2840 /* Eat the first '['. */
2845 /* A second '[', so this must be double-indirect mode. */
2847 prefixp
->kind
= PREFIX_DIP
;
2848 prefixp
->opcode
= DIP_OPCODE
;
2850 /* Get the register or fail entirely. */
2851 if (! get_gen_reg (cPP
, ®_number
))
2855 prefixp
->opcode
|= reg_number
/* << 0 */ ;
2858 /* Since we found a '+', this must be double-indirect
2859 autoincrement mode. */
2861 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2864 /* There's nothing particular to do, if this was a
2865 double-indirect *without* autoincrement. */
2868 /* Check the first ']'. The second one is checked at the end. */
2872 /* Eat the first ']', so we'll be looking at a second ']'. */
2875 /* No second '['. Then we should have a register here, making
2877 else if (get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2879 /* This must be indexed or offset mode: "[rN+I]" or
2880 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
2883 int index_reg_number
;
2889 /* This is "[rx+["... Expect a register next. */
2893 if (!get_gen_reg (cPP
, &index_reg_number
))
2896 prefixp
->kind
= PREFIX_BDAP
;
2898 = (BDAP_INDIR_OPCODE
2899 + (prefixp
->base_reg_number
<< 12)
2900 + index_reg_number
);
2902 /* We've seen "[rx+[ry", so check if this is
2906 /* Yep, now at "[rx+[ry+". */
2908 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2910 /* If it wasn't autoincrement, we don't need to
2913 /* Check a first closing ']': "[rx+[ry]" or
2919 /* Now expect a size modifier ".S". */
2920 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2923 prefixp
->opcode
|= size_bits
<< 4;
2925 /* Ok, all interesting stuff has been seen:
2926 "[rx+[ry+].S" or "[rx+[ry].S". We only need to
2927 expect a final ']', which we'll do in a common
2930 /* Seen "[rN+", but not a '[', so check if we have a
2932 else if (get_gen_reg (cPP
, &index_reg_number
))
2934 /* This is indexed mode: "[rN+rM.S]" or
2937 prefixp
->kind
= PREFIX_BIAP
;
2940 | prefixp
->base_reg_number
/* << 0 */
2941 | (index_reg_number
<< 12));
2943 /* Consume the ".S". */
2944 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2945 /* Missing size, so fail. */
2948 /* Size found. Add that piece and drop down to
2949 the common checking of the closing ']'. */
2950 prefixp
->opcode
|= size_bits
<< 4;
2952 /* Seen "[rN+", but not a '[' or a register, so then
2953 it must be a constant "I".
2955 As a quality of implementation improvement, we check for a
2956 closing ']', like in an erroneous "[rN+]". If we don't,
2957 the expression parser will emit a confusing "bad
2958 expression" when it sees the ']', probably because it
2959 doesn't like seeing no expression. */
2960 else if (**cPP
!= ']' && cris_get_expression (cPP
, &prefixp
->expr
))
2962 /* Expression found, so fill in the bits of offset
2963 mode and drop down to check the closing ']'. */
2964 prefixp
->kind
= PREFIX_BDAP_IMM
;
2966 /* We tentatively put an opcode corresponding to a 32-bit
2967 operand here, although it may be relaxed when there's no
2968 PIC specifier for the operand. */
2970 = (BDAP_INDIR_OPCODE
2971 | (prefixp
->base_reg_number
<< 12)
2972 | (AUTOINCR_BIT
<< 8)
2974 | REG_PC
/* << 0 */);
2976 /* This can have a PIC suffix, specifying reloc type to use. */
2977 if (pic
&& **cPP
== PIC_SUFFIX_CHAR
)
2979 unsigned int relocsize
;
2981 cris_get_pic_suffix (cPP
, &prefixp
->reloc
, &prefixp
->expr
);
2983 /* Tweak the size of the immediate operand in the prefix
2984 opcode if it isn't what we set. */
2985 relocsize
= cris_get_pic_reloc_size (prefixp
->reloc
);
2988 = ((prefixp
->opcode
& ~(3 << 4))
2989 | ((relocsize
>> 1) << 4));
2993 /* Nothing valid here: lose. */
2996 /* Seen "[rN" but no '+', so check if it's a '-'. */
2997 else if (**cPP
== '-')
2999 /* Yep, we must have offset mode. */
3000 if (! cris_get_expression (cPP
, &prefixp
->expr
))
3001 /* No expression, so we lose. */
3005 /* Expression found to make this offset mode, so
3006 fill those bits and drop down to check the
3009 Note that we don't allow a PIC suffix for
3010 an operand with a minus sign like this. */
3011 prefixp
->kind
= PREFIX_BDAP_IMM
;
3016 /* We've seen "[rN", but not '+' or '-'; rather a ']'.
3017 Hmm. Normally this is a simple indirect mode that we
3018 shouldn't match, but if we expect ']', then we have a
3019 zero offset, so it can be a three-address-operand,
3020 like "[rN],rO,rP", thus offset mode.
3022 Don't eat the ']', that will be done in the closing
3024 prefixp
->expr
.X_op
= O_constant
;
3025 prefixp
->expr
.X_add_number
= 0;
3026 prefixp
->expr
.X_add_symbol
= NULL
;
3027 prefixp
->expr
.X_op_symbol
= NULL
;
3028 prefixp
->kind
= PREFIX_BDAP_IMM
;
3031 /* A '[', but no second '[', and no register. Check if we
3032 have an expression, making this "[I]" for a double-indirect
3034 else if (cris_get_expression (cPP
, &prefixp
->expr
))
3036 /* Expression found, the so called absolute mode for a
3037 double-indirect prefix on PC. */
3038 prefixp
->kind
= PREFIX_DIP
;
3039 prefixp
->opcode
= DIP_OPCODE
| (AUTOINCR_BIT
<< 8) | REG_PC
;
3040 prefixp
->reloc
= BFD_RELOC_32
;
3043 /* Neither '[' nor register nor expression. We lose. */
3046 /* We get here as a closing ceremony to a successful match. We just
3047 need to check the closing ']'. */
3049 /* Oops. Close but no air-polluter. */
3052 /* Don't forget to consume that ']', before returning in glory. */
3057 /* Get an expression from the string pointed out by *cPP.
3058 The pointer *cPP is advanced to the character following the expression
3059 on a success, or retains its original value otherwise.
3061 cPP Pointer to pointer to string beginning with the expression.
3063 exprP Pointer to structure containing the expression.
3065 Return 1 iff a correct expression is found. */
3068 cris_get_expression (cPP
, exprP
)
3072 char *saved_input_line_pointer
;
3075 /* The "expression" function expects to find an expression at the
3076 global variable input_line_pointer, so we have to save it to give
3077 the impression that we don't fiddle with global variables. */
3078 saved_input_line_pointer
= input_line_pointer
;
3079 input_line_pointer
= *cPP
;
3081 /* Avoid a common error, confusing addressing modes. Beware that the
3082 call to expression below does not signal that error; it treats []
3083 as parentheses, unless #define NEED_INDEX_OPERATOR in which case it
3084 gives them other confusing semantics rather than plain outlawing
3085 them, which is what we want. */
3086 if (*input_line_pointer
== '[')
3088 input_line_pointer
= saved_input_line_pointer
;
3092 exp
= expression (exprP
);
3093 if (exprP
->X_op
== O_illegal
|| exprP
->X_op
== O_absent
)
3095 input_line_pointer
= saved_input_line_pointer
;
3099 /* Everything seems to be fine, just restore the global
3100 input_line_pointer and say we're successful. */
3101 *cPP
= input_line_pointer
;
3102 input_line_pointer
= saved_input_line_pointer
;
3106 /* Get a sequence of flag characters from *spp. The pointer *cPP is
3107 advanced to the character following the expression. The flag
3108 characters are consecutive, no commas or spaces.
3110 cPP Pointer to pointer to string beginning with the expression.
3112 flagp Pointer to int to return the flags expression.
3114 Return 1 iff a correct flags expression is found. */
3117 get_flags (cPP
, flagsp
)
3127 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3135 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3143 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3151 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3159 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3167 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3204 /* We consider this successful if we stop at a comma or
3205 whitespace. Anything else, and we consider it a failure. */
3208 && ! ISSPACE (**cPP
))
3214 /* Don't forget to consume each flag character. */
3219 /* Generate code and fixes for a BDAP prefix.
3220 For v32, this handles ADDOQ because thankfully the opcodes are the
3223 base_regno Int containing the base register number.
3225 exprP Pointer to structure containing the offset expression. */
3228 gen_bdap (base_regno
, exprP
)
3232 unsigned int opcode
;
3235 /* Put out the prefix opcode; assume quick immediate mode at first. */
3236 opcode
= BDAP_QUICK_OPCODE
| (base_regno
<< 12);
3237 opcodep
= cris_insn_first_word_frag ();
3238 md_number_to_chars (opcodep
, opcode
, 2);
3240 if (exprP
->X_op
== O_constant
)
3242 /* We have an absolute expression that we know the size of right
3247 value
= exprP
->X_add_number
;
3248 if (value
< -32768 || value
> 32767)
3249 /* Outside range for a "word", make it a dword. */
3252 /* Assume "word" size. */
3255 /* If this is a signed-byte value, we can fit it into the prefix
3257 if (value
>= -128 && value
<= 127)
3261 /* This is a word or dword displacement, which will be put in a
3262 word or dword after the prefix. */
3265 opcodep
[0] = BDAP_PC_LOW
+ (size
<< 4);
3267 opcodep
[1] |= BDAP_INCR_HIGH
;
3268 p
= frag_more (1 << size
);
3269 md_number_to_chars (p
, value
, 1 << size
);
3274 /* Handle complex expressions. */
3276 = SIMPLE_EXPR (exprP
) ? exprP
->X_add_number
: 0;
3278 = (SIMPLE_EXPR (exprP
)
3279 ? exprP
->X_add_symbol
: make_expr_symbol (exprP
));
3281 /* The expression is not defined yet but may become absolute. We
3282 make it a relocation to be relaxed. */
3283 frag_var (rs_machine_dependent
, 4, 0,
3284 ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
),
3285 sym
, addvalue
, opcodep
);
3289 /* Encode a branch displacement in the range -256..254 into the form used
3290 by CRIS conditional branch instructions.
3292 offset The displacement value in bytes. */
3295 branch_disp (offset
)
3300 /* Adjust all short branch offsets here. */
3301 if (cris_arch
== arch_crisv32
|| cris_arch
== arch_cris_common_v10_v32
)
3304 disp
= offset
& 0xFE;
3312 /* Generate code and fixes for a 32-bit conditional branch instruction
3313 created by "extending" an existing 8-bit branch instruction.
3315 opcodep Pointer to the word containing the original 8-bit branch
3318 writep Pointer to "extension area" following the first instruction
3321 fragP Pointer to the frag containing the instruction.
3323 add_symP, Parts of the destination address expression.
3328 gen_cond_branch_32 (opcodep
, writep
, fragP
, add_symP
, sub_symP
, add_num
)
3340 if (cris_arch
== arch_crisv32
)
3342 nop_opcode
= NOP_OPCODE_V32
;
3344 branch_offset
= -2 - 8;
3348 nop_opcode
= NOP_OPCODE
;
3350 branch_offset
= -2 - 6;
3353 /* We should never get here for compatibility mode. */
3354 if (cris_arch
== arch_cris_common_v10_v32
)
3355 as_fatal (_("Calling gen_cond_branch_32 for .arch common_v10_v32\n"));
3357 if (warn_for_branch_expansion
)
3358 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3359 _("32-bit conditional branch generated"));
3361 /* Here, writep points to what will be opcodep + 2. First, we change
3362 the actual branch in opcodep[0] and opcodep[1], so that in the
3363 final insn, it will look like:
3366 This means we don't have to worry about changing the opcode or
3367 messing with the delay-slot instruction. So, we move it to last in
3368 the "extended" branch, and just change the displacement. Admittedly,
3369 it's not the optimal extended construct, but we should get this
3370 rarely enough that it shouldn't matter. */
3372 writep
[opc_offset
] = branch_disp (branch_offset
);
3373 writep
[opc_offset
+ 1] = opcodep
[1];
3375 /* Then, we change the branch to an unconditional branch over the
3376 extended part, to the new location of the Bcc:
3380 Note that these two writes are to currently different locations,
3383 md_number_to_chars (opcodep
, BA_QUICK_OPCODE
3384 + (cris_arch
== arch_crisv32
? 12 : 8), 2);
3385 md_number_to_chars (writep
, nop_opcode
, 2);
3387 /* Then the extended thing, the 32-bit jump insn.
3388 opcodep+4: JUMP [PC+]
3389 or, in the PIC case,
3390 opcodep+4: ADD [PC+],PC. */
3392 md_number_to_chars (writep
+ 2,
3393 cris_arch
== arch_crisv32
3395 : (pic
? ADD_PC_INCR_OPCODE
: JUMP_PC_INCR_OPCODE
), 2);
3397 /* We have to fill in the actual value too.
3399 This is most probably an expression, but we can cope with an absolute
3400 value too. FIXME: Testcase needed with and without pic. */
3402 if (add_symP
== NULL
&& sub_symP
== NULL
)
3404 /* An absolute address. */
3405 if (pic
|| cris_arch
== arch_crisv32
)
3406 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4,
3407 section_symbol (absolute_section
),
3409 + (cris_arch
== arch_crisv32
? 6 : 0),
3410 1, BFD_RELOC_32_PCREL
);
3412 md_number_to_chars (writep
+ 4, add_num
, 4);
3416 if (sub_symP
!= NULL
)
3417 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3418 _("Complex expression not supported"));
3420 /* Not absolute, we have to make it a frag for later evaluation. */
3421 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4, add_symP
,
3422 add_num
+ (cris_arch
== arch_crisv32
? 6 : 0),
3423 pic
|| cris_arch
== arch_crisv32
? 1 : 0,
3424 pic
|| cris_arch
== arch_crisv32
3425 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
3428 if (cris_arch
== arch_crisv32
)
3429 /* Follow it with a "NOP" for CRISv32. */
3430 md_number_to_chars (writep
+ 8, NOP_OPCODE_V32
, 2);
3433 /* Get the size of an immediate-reloc in bytes. Only valid for PIC
3437 cris_get_pic_reloc_size (reloc
)
3438 bfd_reloc_code_real_type reloc
;
3440 return reloc
== BFD_RELOC_CRIS_16_GOTPLT
|| reloc
== BFD_RELOC_CRIS_16_GOT
3444 /* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP.
3445 Adjust *EXPRP with any addend found after the PIC suffix. */
3448 cris_get_pic_suffix (cPP
, relocp
, exprP
)
3450 bfd_reloc_code_real_type
*relocp
;
3455 expressionS const_expr
;
3457 const struct pic_suffixes_struct
3459 const char *const suffix
;
3461 bfd_reloc_code_real_type reloc
;
3465 #define PICMAP(s, r) {s, sizeof (s) - 1, r}
3466 /* Keep this in order with longest unambiguous prefix first. */
3467 PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT
),
3468 PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT
),
3469 PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL
),
3470 PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL
),
3471 PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL
),
3472 PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT
),
3473 PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT
)
3476 /* We've already seen the ':', so consume it. */
3479 for (i
= 0; i
< sizeof (pic_suffixes
)/sizeof (pic_suffixes
[0]); i
++)
3481 if (strncmp (s
, pic_suffixes
[i
].suffix
, pic_suffixes
[i
].len
) == 0
3482 && ! is_part_of_name (s
[pic_suffixes
[i
].len
]))
3484 /* We have a match. Consume the suffix and set the relocation
3486 s
+= pic_suffixes
[i
].len
;
3488 /* There can be a constant term appended. If so, we will add it
3490 if (*s
== '+' || *s
== '-')
3492 if (! cris_get_expression (&s
, &const_expr
))
3493 /* There was some kind of syntax error. Bail out. */
3496 /* Allow complex expressions as the constant part. It still
3497 has to be an assembly-time constant or there will be an
3498 error emitting the reloc. This makes the PIC qualifiers
3499 idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we
3500 recognize here; the latter is parsed in the incoming
3502 exprP
->X_add_symbol
= make_expr_symbol (exprP
);
3503 exprP
->X_op
= O_add
;
3504 exprP
->X_add_number
= 0;
3505 exprP
->X_op_symbol
= make_expr_symbol (&const_expr
);
3508 *relocp
= pic_suffixes
[i
].reloc
;
3514 /* No match. Don't consume anything; fall back and there will be a
3518 /* This *could* have been:
3520 Turn a string in input_line_pointer into a floating point constant
3521 of type TYPE, and store the appropriate bytes in *LITP. The number
3522 of LITTLENUMS emitted is stored in *SIZEP.
3524 type A character from FLTCHARS that describes what kind of
3525 floating-point number is wanted.
3527 litp A pointer to an array that the result should be stored in.
3529 sizep A pointer to an integer where the size of the result is stored.
3531 But we don't support floating point constants in assembly code *at all*,
3532 since it's suboptimal and just opens up bug opportunities. GCC emits
3533 the bit patterns as hex. All we could do here is to emit what GCC
3534 would have done in the first place. *Nobody* writes floating-point
3535 code as assembly code, but if they do, they should be able enough to
3536 find out the correct bit patterns and use them. */
3539 md_atof (type
, litp
, sizep
)
3540 char type ATTRIBUTE_UNUSED
;
3541 char *litp ATTRIBUTE_UNUSED
;
3542 int *sizep ATTRIBUTE_UNUSED
;
3544 /* FIXME: Is this function mentioned in the internals.texi manual? If
3546 return _("Bad call to md_atof () - floating point formats are not supported");
3549 /* Turn a number as a fixS * into a series of bytes that represents the
3550 number on the target machine. The purpose of this procedure is the
3551 same as that of md_number_to_chars but this procedure is supposed to
3552 handle general bit field fixes and machine-dependent fixups.
3554 bufp Pointer to an array where the result should be stored.
3556 val The value to store.
3558 n The number of bytes in "val" that should be stored.
3560 fixP The fix to be applied to the bit field starting at bufp.
3562 seg The segment containing this number. */
3565 cris_number_to_imm (bufp
, val
, n
, fixP
, seg
)
3577 /* We put the relative "vma" for the other segment for inter-segment
3578 relocations in the object data to stay binary "compatible" (with an
3579 uninteresting old version) for the relocation.
3580 Maybe delete some day. */
3582 && (sym_seg
= S_GET_SEGMENT (fixP
->fx_addsy
)) != seg
)
3583 val
+= sym_seg
->vma
;
3585 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3586 switch (fixP
->fx_r_type
)
3588 /* These must be fully resolved when getting here. */
3589 case BFD_RELOC_16_PCREL
:
3590 case BFD_RELOC_8_PCREL
:
3591 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3592 _("PC-relative relocation must be trivially resolved"));
3597 /* Only do this for old-arch binaries. */
3598 if (cris_arch
!= arch_cris_any_v0_v10
3599 && (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
))
3602 switch (fixP
->fx_r_type
)
3604 /* Ditto here, we put the addend into the object code as
3605 well as the reloc addend. Keep it that way for now, to simplify
3606 regression tests on the object file contents. FIXME: Seems
3607 uninteresting now that we have a test suite. */
3609 case BFD_RELOC_CRIS_16_GOT
:
3610 case BFD_RELOC_CRIS_32_GOT
:
3611 case BFD_RELOC_CRIS_32_GOTREL
:
3612 case BFD_RELOC_CRIS_16_GOTPLT
:
3613 case BFD_RELOC_CRIS_32_GOTPLT
:
3614 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3615 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3616 /* We don't want to put in any kind of non-zero bits in the data
3617 being relocated for these. */
3620 case BFD_RELOC_32_PCREL
:
3621 /* If this one isn't fully resolved, we don't want to put anything
3623 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3628 /* No use having warnings here, since most hosts have a 32-bit type
3629 for "long" (which will probably change soon, now that I wrote
3631 bufp
[3] = (val
>> 24) & 0xFF;
3632 bufp
[2] = (val
>> 16) & 0xFF;
3633 bufp
[1] = (val
>> 8) & 0xFF;
3634 bufp
[0] = val
& 0xFF;
3637 /* FIXME: The 16 and 8-bit cases should have a way to check
3638 whether a signed or unsigned (or any signedness) number is
3642 case BFD_RELOC_16_PCREL
:
3643 if (val
> 0xffff || val
< -32768)
3644 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3645 _("Value not in 16 bit range: %ld"), val
);
3646 if (! fixP
->fx_addsy
)
3648 bufp
[1] = (val
>> 8) & 0xFF;
3649 bufp
[0] = val
& 0xFF;
3653 case BFD_RELOC_CRIS_SIGNED_16
:
3654 if (val
> 32767 || val
< -32768)
3655 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3656 _("Value not in 16 bit signed range: %ld"), val
);
3657 if (! fixP
->fx_addsy
)
3659 bufp
[1] = (val
>> 8) & 0xFF;
3660 bufp
[0] = val
& 0xFF;
3665 case BFD_RELOC_8_PCREL
:
3666 if (val
> 255 || val
< -128)
3667 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Value not in 8 bit range: %ld"), val
);
3668 if (! fixP
->fx_addsy
)
3669 bufp
[0] = val
& 0xFF;
3672 case BFD_RELOC_CRIS_SIGNED_8
:
3673 if (val
> 127 || val
< -128)
3674 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3675 _("Value not in 8 bit signed range: %ld"), val
);
3676 if (! fixP
->fx_addsy
)
3677 bufp
[0] = val
& 0xFF;
3680 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3681 /* FIXME: Test-cases for out-of-range values. Probably also need
3682 to use as_bad_where. */
3683 case BFD_RELOC_CRIS_UNSIGNED_4
:
3684 if (val
> 15 || val
< 0)
3685 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3686 _("Value not in 4 bit unsigned range: %ld"), val
);
3687 if (! fixP
->fx_addsy
)
3688 bufp
[0] |= val
& 0x0F;
3691 case BFD_RELOC_CRIS_UNSIGNED_5
:
3692 if (val
> 31 || val
< 0)
3693 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3694 _("Value not in 5 bit unsigned range: %ld"), val
);
3695 if (! fixP
->fx_addsy
)
3696 bufp
[0] |= val
& 0x1F;
3699 case BFD_RELOC_CRIS_SIGNED_6
:
3700 if (val
> 31 || val
< -32)
3701 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3702 _("Value not in 6 bit range: %ld"), val
);
3703 if (! fixP
->fx_addsy
)
3704 bufp
[0] |= val
& 0x3F;
3707 case BFD_RELOC_CRIS_UNSIGNED_6
:
3708 if (val
> 63 || val
< 0)
3709 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3710 _("Value not in 6 bit unsigned range: %ld"), val
);
3711 if (! fixP
->fx_addsy
)
3712 bufp
[0] |= val
& 0x3F;
3715 case BFD_RELOC_CRIS_BDISP8
:
3716 if (! fixP
->fx_addsy
)
3717 bufp
[0] = branch_disp (val
);
3720 case BFD_RELOC_NONE
:
3721 /* May actually happen automatically. For example at broken
3722 words, if the word turns out not to be broken.
3723 FIXME: When? Which testcase? */
3724 if (! fixP
->fx_addsy
)
3725 md_number_to_chars (bufp
, val
, n
);
3728 case BFD_RELOC_VTABLE_INHERIT
:
3729 /* This borrowed from tc-ppc.c on a whim. */
3731 && !S_IS_DEFINED (fixP
->fx_addsy
)
3732 && !S_IS_WEAK (fixP
->fx_addsy
))
3733 S_SET_WEAK (fixP
->fx_addsy
);
3736 case BFD_RELOC_VTABLE_ENTRY
:
3741 BAD_CASE (fixP
->fx_r_type
);
3745 /* Processes machine-dependent command line options. Called once for
3746 each option on the command line that the machine-independent part of
3747 GAS does not understand. */
3750 md_parse_option (arg
, argp
)
3752 char *argp ATTRIBUTE_UNUSED
;
3758 printf (_("Please use --help to see usage and options for this assembler.\n"));
3759 md_show_usage (stdout
);
3760 exit (EXIT_SUCCESS
);
3763 warn_for_branch_expansion
= 1;
3767 demand_register_prefix
= TRUE
;
3769 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3770 as_bad (_("--no-underscore is invalid with a.out format"));
3772 symbols_have_leading_underscore
= FALSE
;
3776 demand_register_prefix
= FALSE
;
3777 symbols_have_leading_underscore
= TRUE
;
3787 enum cris_archs argarch
= cris_arch_from_string (&str
);
3789 if (argarch
== arch_cris_unknown
)
3790 as_bad (_("invalid <arch> in --march=<arch>: %s"), argp
);
3792 cris_arch
= argarch
;
3794 if (argarch
== arch_crisv32
)
3796 err_for_dangerous_mul_placement
= 0;
3797 md_long_jump_size
= crisv32_long_jump_size
;
3800 md_long_jump_size
= cris_any_v0_v10_long_jump_size
;
3804 case OPTION_MULBUG_ABORT_OFF
:
3805 err_for_dangerous_mul_placement
= 0;
3808 case OPTION_MULBUG_ABORT_ON
:
3809 err_for_dangerous_mul_placement
= 1;
3819 /* Round up a section size to the appropriate boundary. */
3821 md_section_align (segment
, size
)
3825 /* Round all sects to multiple of 4, except the bss section, which
3826 we'll round to word-size.
3828 FIXME: Check if this really matters. All sections should be
3829 rounded up, and all sections should (optionally) be assumed to be
3830 dword-aligned, it's just that there is actual usage of linking to a
3832 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3834 if (segment
== bss_section
)
3835 return (size
+ 1) & ~1;
3836 return (size
+ 3) & ~3;
3840 /* FIXME: Is this wanted? It matches the testsuite, but that's not
3841 really a valid reason. */
3842 if (segment
== text_section
)
3843 return (size
+ 3) & ~3;
3849 /* Generate a machine-dependent relocation. */
3851 tc_gen_reloc (section
, fixP
)
3852 asection
*section ATTRIBUTE_UNUSED
;
3856 bfd_reloc_code_real_type code
;
3858 switch (fixP
->fx_r_type
)
3860 case BFD_RELOC_CRIS_SIGNED_8
:
3864 case BFD_RELOC_CRIS_SIGNED_16
:
3865 code
= BFD_RELOC_16
;
3868 case BFD_RELOC_CRIS_16_GOT
:
3869 case BFD_RELOC_CRIS_32_GOT
:
3870 case BFD_RELOC_CRIS_16_GOTPLT
:
3871 case BFD_RELOC_CRIS_32_GOTPLT
:
3872 case BFD_RELOC_CRIS_32_GOTREL
:
3873 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3874 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3876 case BFD_RELOC_32_PCREL
:
3879 case BFD_RELOC_VTABLE_INHERIT
:
3880 case BFD_RELOC_VTABLE_ENTRY
:
3881 case BFD_RELOC_CRIS_UNSIGNED_8
:
3882 case BFD_RELOC_CRIS_UNSIGNED_16
:
3883 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3884 code
= fixP
->fx_r_type
;
3887 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3888 _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant"));
3892 relP
= (arelent
*) xmalloc (sizeof (arelent
));
3894 relP
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3895 *relP
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
3896 relP
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
3898 relP
->addend
= fixP
->fx_offset
;
3900 /* This is the standard place for KLUDGEs to work around bugs in
3901 bfd_install_relocation (first such note in the documentation
3902 appears with binutils-2.8).
3904 That function bfd_install_relocation does the wrong thing with
3905 putting stuff into the addend of a reloc (it should stay out) for a
3906 weak symbol. The really bad thing is that it adds the
3907 "segment-relative offset" of the symbol into the reloc. In this
3908 case, the reloc should instead be relative to the symbol with no
3909 other offset than the assembly code shows; and since the symbol is
3910 weak, any local definition should be ignored until link time (or
3912 To wit: weaksym+42 should be weaksym+42 in the reloc,
3913 not weaksym+(offset_from_segment_of_local_weaksym_definition)
3915 To "work around" this, we subtract the segment-relative offset of
3916 "known" weak symbols. This evens out the extra offset.
3918 That happens for a.out but not for ELF, since for ELF,
3919 bfd_install_relocation uses the "special function" field of the
3920 howto, and does not execute the code that needs to be undone. */
3922 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
3923 && fixP
->fx_addsy
&& S_IS_WEAK (fixP
->fx_addsy
)
3924 && ! bfd_is_und_section (S_GET_SEGMENT (fixP
->fx_addsy
)))
3926 relP
->addend
-= S_GET_VALUE (fixP
->fx_addsy
);
3929 relP
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3934 name
= S_GET_NAME (fixP
->fx_addsy
);
3936 name
= _("<unknown>");
3937 as_fatal (_("Cannot generate relocation type for symbol %s, code %s"),
3938 name
, bfd_get_reloc_code_name (code
));
3944 /* Machine-dependent usage-output. */
3947 md_show_usage (stream
)
3950 /* The messages are formatted to line up with the generic options. */
3951 fprintf (stream
, _("CRIS-specific options:\n"));
3952 fprintf (stream
, "%s",
3953 _(" -h, -H Don't execute, print this help text. Deprecated.\n"));
3954 fprintf (stream
, "%s",
3955 _(" -N Warn when branches are expanded to jumps.\n"));
3956 fprintf (stream
, "%s",
3957 _(" --underscore User symbols are normally prepended with underscore.\n"));
3958 fprintf (stream
, "%s",
3959 _(" Registers will not need any prefix.\n"));
3960 fprintf (stream
, "%s",
3961 _(" --no-underscore User symbols do not have any prefix.\n"));
3962 fprintf (stream
, "%s",
3963 _(" Registers will require a `$'-prefix.\n"));
3964 fprintf (stream
, "%s",
3965 _(" --pic Enable generation of position-independent code.\n"));
3966 fprintf (stream
, "%s",
3967 _(" --march=<arch> Generate code for <arch>. Valid choices for <arch>\n\
3968 are v0_v10, v10, v32 and common_v10_v32.\n"));
3971 /* Apply a fixS (fixup of an instruction or data that we didn't have
3972 enough info to complete immediately) to the data in a frag. */
3975 md_apply_fix3 (fixP
, valP
, seg
)
3980 /* This assignment truncates upper bits if valueT is 64 bits (as with
3981 --enable-64-bit-bfd), which is fine here, though we cast to avoid
3982 any compiler warnings. */
3983 long val
= (long) *valP
;
3984 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3986 if (fixP
->fx_addsy
== 0 && !fixP
->fx_pcrel
)
3989 if (fixP
->fx_bit_fixP
|| fixP
->fx_im_disp
!= 0)
3991 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Invalid relocation"));
3996 /* We can't actually support subtracting a symbol. */
3997 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
3998 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3999 _("expression too complex"));
4001 /* This operand-type is scaled. */
4002 if (fixP
->fx_r_type
== BFD_RELOC_CRIS_LAPCQ_OFFSET
)
4004 cris_number_to_imm (buf
, val
, fixP
->fx_size
, fixP
, seg
);
4008 /* All relocations are relative to the location just after the fixup;
4009 the address of the fixup plus its size. */
4012 md_pcrel_from (fixP
)
4015 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4017 /* FIXME: We get here only at the end of assembly, when X in ".-X" is
4018 still unknown. Since we don't have pc-relative relocations in a.out,
4019 this is invalid. What to do if anything for a.out, is to add
4020 pc-relative relocations everywhere including the elinux program
4021 loader. For ELF, allow straight-forward PC-relative relocations,
4022 which are always relative to the location after the relocation. */
4023 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
4024 || (fixP
->fx_r_type
!= BFD_RELOC_8_PCREL
4025 && fixP
->fx_r_type
!= BFD_RELOC_16_PCREL
4026 && fixP
->fx_r_type
!= BFD_RELOC_32_PCREL
4027 && fixP
->fx_r_type
!= BFD_RELOC_CRIS_LAPCQ_OFFSET
))
4028 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4029 _("Invalid pc-relative relocation"));
4030 return fixP
->fx_size
+ addr
;
4033 /* We have no need to give defaults for symbol-values. */
4035 md_undefined_symbol (name
)
4036 char *name ATTRIBUTE_UNUSED
;
4041 /* If this function returns non-zero, it prevents the relocation
4042 against symbol(s) in the FIXP from being replaced with relocations
4043 against section symbols, and guarantees that a relocation will be
4044 emitted even when the value can be resolved locally. */
4046 md_cris_force_relocation (fixp
)
4049 switch (fixp
->fx_r_type
)
4051 case BFD_RELOC_CRIS_16_GOT
:
4052 case BFD_RELOC_CRIS_32_GOT
:
4053 case BFD_RELOC_CRIS_16_GOTPLT
:
4054 case BFD_RELOC_CRIS_32_GOTPLT
:
4055 case BFD_RELOC_CRIS_32_GOTREL
:
4056 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
4057 case BFD_RELOC_CRIS_32_PLT_PCREL
:
4063 return generic_force_reloc (fixp
);
4066 /* Check and emit error if broken-word handling has failed to fix up a
4067 case-table. This is called from write.c, after doing everything it
4068 knows about how to handle broken words. */
4071 tc_cris_check_adjusted_broken_word (new_offset
, brokwP
)
4073 struct broken_word
*brokwP
;
4075 if (new_offset
> 32767 || new_offset
< -32768)
4076 /* We really want a genuine error, not a warning, so make it one. */
4077 as_bad_where (brokwP
->frag
->fr_file
, brokwP
->frag
->fr_line
,
4078 _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
4082 /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */
4084 static void cris_force_reg_prefix ()
4086 demand_register_prefix
= TRUE
;
4089 /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */
4091 static void cris_relax_reg_prefix ()
4093 demand_register_prefix
= FALSE
;
4096 /* Adjust for having a leading '_' on all user symbols. */
4098 static void cris_sym_leading_underscore ()
4100 /* We can't really do anything more than assert that what the program
4101 thinks symbol starts with agrees with the command-line options, since
4102 the bfd is already created. */
4104 if (!symbols_have_leading_underscore
)
4105 as_bad (_(".syntax %s requires command-line option `--underscore'"),
4106 SYNTAX_USER_SYM_LEADING_UNDERSCORE
);
4109 /* Adjust for not having any particular prefix on user symbols. */
4111 static void cris_sym_no_leading_underscore ()
4113 if (symbols_have_leading_underscore
)
4114 as_bad (_(".syntax %s requires command-line option `--no-underscore'"),
4115 SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
);
4118 /* Handle the .syntax pseudo, which takes an argument that decides what
4119 syntax the assembly code has. */
4123 int ignore ATTRIBUTE_UNUSED
;
4125 static const struct syntaxes
4127 const char *const operand
;
4128 void (*fn
) PARAMS ((void));
4130 {{SYNTAX_ENFORCE_REG_PREFIX
, cris_force_reg_prefix
},
4131 {SYNTAX_RELAX_REG_PREFIX
, cris_relax_reg_prefix
},
4132 {SYNTAX_USER_SYM_LEADING_UNDERSCORE
, cris_sym_leading_underscore
},
4133 {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
, cris_sym_no_leading_underscore
}};
4135 const struct syntaxes
*sp
;
4137 for (sp
= syntax_table
;
4138 sp
< syntax_table
+ sizeof (syntax_table
) / sizeof (syntax_table
[0]);
4141 if (strncmp (input_line_pointer
, sp
->operand
,
4142 strlen (sp
->operand
)) == 0)
4146 input_line_pointer
+= strlen (sp
->operand
);
4147 demand_empty_rest_of_line ();
4152 as_bad (_("Unknown .syntax operand"));
4155 /* Wrapper for dwarf2_directive_file to emit error if this is seen when
4156 not emitting ELF. */
4162 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4163 as_bad (_("Pseudodirective .file is only valid when generating ELF"));
4165 dwarf2_directive_file (dummy
);
4168 /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not
4175 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4176 as_bad (_("Pseudodirective .loc is only valid when generating ELF"));
4178 dwarf2_directive_loc (dummy
);
4181 /* Translate a <arch> string (as common to --march=<arch> and .arch <arch>)
4182 into an enum. If the string *STR is recognized, *STR is updated to point
4183 to the end of the string. If the string is not recognized,
4184 arch_cris_unknown is returned. */
4186 static enum cris_archs
4187 cris_arch_from_string (str
)
4190 static const struct cris_arch_struct
4192 const char *const name
;
4193 enum cris_archs arch
;
4195 /* Keep in order longest-first for choices where one is a prefix
4197 {{"v0_v10", arch_cris_any_v0_v10
},
4198 {"v10", arch_crisv10
},
4199 {"v32", arch_crisv32
},
4200 {"common_v10_v32", arch_cris_common_v10_v32
}};
4202 const struct cris_arch_struct
*ap
;
4204 for (ap
= arch_table
;
4205 ap
< arch_table
+ sizeof (arch_table
) / sizeof (arch_table
[0]);
4208 int len
= strlen (ap
->name
);
4210 if (strncmp (*str
, ap
->name
, len
) == 0
4211 && (str
[0][len
] == 0 || ISSPACE (str
[0][len
])))
4213 *str
+= strlen (ap
->name
);
4218 return arch_cris_unknown
;
4221 /* Return nonzero if architecture version ARCH matches version range in
4225 cris_insn_ver_valid_for_arch (iver
, arch
)
4226 enum cris_insn_version_usage iver
;
4227 enum cris_archs arch
;
4231 case arch_cris_any_v0_v10
:
4233 (iver
== cris_ver_version_all
4234 || iver
== cris_ver_warning
4235 || iver
== cris_ver_v0_3
4236 || iver
== cris_ver_v3p
4237 || iver
== cris_ver_v0_10
4238 || iver
== cris_ver_sim_v0_10
4239 || iver
== cris_ver_v3_10
4240 || iver
== cris_ver_v8
4241 || iver
== cris_ver_v8p
4242 || iver
== cris_ver_v8_10
4243 || iver
== cris_ver_v10
4244 || iver
== cris_ver_v10p
);
4248 (iver
== cris_ver_version_all
4249 || iver
== cris_ver_v3p
4250 || iver
== cris_ver_v8p
4251 || iver
== cris_ver_v10p
4252 || iver
== cris_ver_v32p
);
4254 case arch_cris_common_v10_v32
:
4256 (iver
== cris_ver_version_all
4257 || iver
== cris_ver_v3p
4258 || iver
== cris_ver_v8p
4259 || iver
== cris_ver_v10p
);
4263 (iver
== cris_ver_version_all
4264 || iver
== cris_ver_v0_3
4265 || iver
== cris_ver_v0_10
4266 || iver
== cris_ver_sim_v0_10
);
4270 (iver
== cris_ver_version_all
4271 || iver
== cris_ver_v0_3
4272 || iver
== cris_ver_v3p
4273 || iver
== cris_ver_v0_10
4274 || iver
== cris_ver_sim_v0_10
4275 || iver
== cris_ver_v3_10
);
4279 (iver
== cris_ver_version_all
4280 || iver
== cris_ver_v3p
4281 || iver
== cris_ver_v0_10
4282 || iver
== cris_ver_sim_v0_10
4283 || iver
== cris_ver_v3_10
4284 || iver
== cris_ver_v8
4285 || iver
== cris_ver_v8p
4286 || iver
== cris_ver_v8_10
);
4290 (iver
== cris_ver_version_all
4291 || iver
== cris_ver_v3p
4292 || iver
== cris_ver_v0_10
4293 || iver
== cris_ver_sim_v0_10
4294 || iver
== cris_ver_v3_10
4295 || iver
== cris_ver_v8p
4296 || iver
== cris_ver_v8_10
4297 || iver
== cris_ver_v10
4298 || iver
== cris_ver_v10p
);
4305 /* Assert that the .arch ARCHCHOICE1 is compatible with the specified or
4306 default --march=<ARCHCHOICE2> option. */
4310 int dummy ATTRIBUTE_UNUSED
;
4312 /* Right now we take the easy route and check for sameness. It's not
4313 obvious that allowing e.g. --march=v32 and .arch common_v0_v32
4314 would be more useful than confusing, implementation-wise and
4317 char *str
= input_line_pointer
;
4318 enum cris_archs arch
= cris_arch_from_string (&str
);
4320 if (arch
== arch_cris_unknown
)
4322 as_bad (_("unknown operand to .arch"));
4324 /* For this one, str does not reflect the end of the operand,
4325 since there was no matching arch. Skip it manually; skip
4326 things that can be part of a word (a name). */
4327 while (is_part_of_name (*str
))
4330 else if (arch
!= cris_arch
)
4331 as_bad (_(".arch <arch> requires a matching --march=... option"));
4333 input_line_pointer
= str
;
4334 demand_empty_rest_of_line ();
4340 * eval: (c-set-style "gnu")
4341 * indent-tabs-mode: t