037a84ca2a47bcbe2bbd034250bc7cd0faf60782
[deliverable/binutils-gdb.git] / gas / config / tc-h8300.c
1 /* tc-h8300.c -- Assemble code for the Renesas H8/300
2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 /* Written By Steve Chamberlain <sac@cygnus.com>. */
23
24 #include <stdio.h>
25 #include "as.h"
26 #include "subsegs.h"
27 #include "bfd.h"
28 #define DEFINE_TABLE
29 #define h8_opcodes ops
30 #include "opcode/h8300.h"
31 #include "safe-ctype.h"
32
33 #ifdef OBJ_ELF
34 #include "elf/h8.h"
35 #endif
36
37 const char comment_chars[] = ";";
38 const char line_comment_chars[] = "#";
39 const char line_separator_chars[] = "";
40
41 void cons PARAMS ((int));
42 void sbranch PARAMS ((int));
43 void h8300hmode PARAMS ((int));
44 void h8300smode PARAMS ((int));
45 void h8300hnmode PARAMS ((int));
46 void h8300snmode PARAMS ((int));
47 static void pint PARAMS ((int));
48
49 int Hmode;
50 int Smode;
51 int Nmode;
52
53 #define PSIZE (Hmode ? L_32 : L_16)
54 #define DMODE (L_16)
55 #define DSYMMODE (Hmode ? L_24 : L_16)
56
57 int bsize = L_8; /* Default branch displacement. */
58
59 struct h8_instruction
60 {
61 int length;
62 int noperands;
63 int idx;
64 int size;
65 const struct h8_opcode *opcode;
66 };
67
68 struct h8_instruction *h8_instructions;
69
70 void
71 h8300hmode (arg)
72 int arg ATTRIBUTE_UNUSED;
73 {
74 Hmode = 1;
75 Smode = 0;
76 #ifdef BFD_ASSEMBLER
77 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300h))
78 as_warn (_("could not set architecture and machine"));
79 #endif
80 }
81
82 void
83 h8300smode (arg)
84 int arg ATTRIBUTE_UNUSED;
85 {
86 Smode = 1;
87 Hmode = 1;
88 #ifdef BFD_ASSEMBLER
89 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300s))
90 as_warn (_("could not set architecture and machine"));
91 #endif
92 }
93
94 void
95 h8300hnmode (arg)
96 int arg ATTRIBUTE_UNUSED;
97 {
98 Hmode = 1;
99 Smode = 0;
100 Nmode = 1;
101 #ifdef BFD_ASSEMBLER
102 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300hn))
103 as_warn (_("could not set architecture and machine"));
104 #endif
105 }
106
107 void
108 h8300snmode (arg)
109 int arg ATTRIBUTE_UNUSED;
110 {
111 Smode = 1;
112 Hmode = 1;
113 Nmode = 1;
114 #ifdef BFD_ASSEMBLER
115 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300sn))
116 as_warn (_("could not set architecture and machine"));
117 #endif
118 }
119
120 void
121 sbranch (size)
122 int size;
123 {
124 bsize = size;
125 }
126
127 static void
128 pint (arg)
129 int arg ATTRIBUTE_UNUSED;
130 {
131 cons (Hmode ? 4 : 2);
132 }
133
134 /* This table describes all the machine specific pseudo-ops the assembler
135 has to support. The fields are:
136 pseudo-op name without dot
137 function to call to execute this pseudo-op
138 Integer arg to pass to the function. */
139
140 const pseudo_typeS md_pseudo_table[] =
141 {
142 {"h8300h", h8300hmode, 0},
143 {"h8300hn", h8300hnmode, 0},
144 {"h8300s", h8300smode, 0},
145 {"h8300sn", h8300snmode, 0},
146 {"sbranch", sbranch, L_8},
147 {"lbranch", sbranch, L_16},
148
149 {"int", pint, 0},
150 {"data.b", cons, 1},
151 {"data.w", cons, 2},
152 {"data.l", cons, 4},
153 {"form", listing_psize, 0},
154 {"heading", listing_title, 0},
155 {"import", s_ignore, 0},
156 {"page", listing_eject, 0},
157 {"program", s_ignore, 0},
158 {0, 0, 0}
159 };
160
161 const int md_reloc_size;
162
163 const char EXP_CHARS[] = "eE";
164
165 /* Chars that mean this number is a floating point constant
166 As in 0f12.456
167 or 0d1.2345e12. */
168 const char FLT_CHARS[] = "rRsSfFdDxXpP";
169
170 static struct hash_control *opcode_hash_control; /* Opcode mnemonics. */
171
172 /* This function is called once, at assembler startup time. This
173 should set up all the tables, etc. that the MD part of the assembler
174 needs. */
175
176 void
177 md_begin ()
178 {
179 unsigned int nopcodes;
180 const struct h8_opcode *p;
181 struct h8_instruction *pi;
182 char prev_buffer[100];
183 int idx = 0;
184
185 #ifdef BFD_ASSEMBLER
186 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300))
187 as_warn (_("could not set architecture and machine"));
188 #endif
189
190 opcode_hash_control = hash_new ();
191 prev_buffer[0] = 0;
192
193 nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
194
195 h8_instructions = (struct h8_instruction *)
196 xmalloc (nopcodes * sizeof (struct h8_instruction));
197
198 for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
199 {
200 /* Strip off any . part when inserting the opcode and only enter
201 unique codes into the hash table. */
202 char *src = p->name;
203 unsigned int len = strlen (src);
204 char *dst = malloc (len + 1);
205 char *buffer = dst;
206
207 pi->size = 0;
208 while (*src)
209 {
210 if (*src == '.')
211 {
212 src++;
213 pi->size = *src;
214 break;
215 }
216 *dst++ = *src++;
217 }
218 *dst++ = 0;
219 if (strcmp (buffer, prev_buffer))
220 {
221 hash_insert (opcode_hash_control, buffer, (char *) pi);
222 strcpy (prev_buffer, buffer);
223 idx++;
224 }
225 pi->idx = idx;
226
227 /* Find the number of operands. */
228 pi->noperands = 0;
229 while (p->args.nib[pi->noperands] != E)
230 pi->noperands++;
231
232 /* Find the length of the opcode in bytes. */
233 pi->length = 0;
234 while (p->data.nib[pi->length * 2] != E)
235 pi->length++;
236
237 pi->opcode = p;
238 }
239
240 /* Add entry for the NULL vector terminator. */
241 pi->length = 0;
242 pi->noperands = 0;
243 pi->idx = 0;
244 pi->size = 0;
245 pi->opcode = p;
246
247 linkrelax = 1;
248 }
249
250 struct h8_exp
251 {
252 char *e_beg;
253 char *e_end;
254 expressionS e_exp;
255 };
256
257 int dispreg;
258 int opsize; /* Set when a register size is seen. */
259
260 struct h8_op
261 {
262 op_type mode;
263 unsigned reg;
264 expressionS exp;
265 };
266
267 static void clever_message PARAMS ((const struct h8_instruction *, struct h8_op *));
268 static void build_bytes PARAMS ((const struct h8_instruction *, struct h8_op *));
269 static void do_a_fix_imm PARAMS ((int, struct h8_op *, int));
270 static void check_operand PARAMS ((struct h8_op *, unsigned int, char *));
271 static const struct h8_instruction * get_specific PARAMS ((const struct h8_instruction *, struct h8_op *, int));
272 static char * get_operands PARAMS ((unsigned, char *, struct h8_op *));
273 static void get_operand PARAMS ((char **, struct h8_op *, unsigned, int));
274 static char * skip_colonthing PARAMS ((char *, expressionS *, int *));
275 static char * parse_exp PARAMS ((char *, expressionS *));
276 static int parse_reg PARAMS ((char *, op_type *, unsigned *, int));
277 char * colonmod24 PARAMS ((struct h8_op *, char *));
278
279 /*
280 parse operands
281 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
282 r0l,r0h,..r7l,r7h
283 @WREG
284 @WREG+
285 @-WREG
286 #const
287 ccr
288 */
289
290 /* Try to parse a reg name. Return the number of chars consumed. */
291
292 static int
293 parse_reg (src, mode, reg, direction)
294 char *src;
295 op_type *mode;
296 unsigned int *reg;
297 int direction;
298 {
299 char *end;
300 int len;
301
302 /* Cribbed from get_symbol_end. */
303 if (!is_name_beginner (*src) || *src == '\001')
304 return 0;
305 end = src + 1;
306 while (is_part_of_name (*end) || *end == '\001')
307 end++;
308 len = end - src;
309
310 if (len == 2 && src[0] == 's' && src[1] == 'p')
311 {
312 *mode = PSIZE | REG | direction;
313 *reg = 7;
314 return len;
315 }
316 if (len == 3 && src[0] == 'c' && src[1] == 'c' && src[2] == 'r')
317 {
318 *mode = CCR;
319 *reg = 0;
320 return len;
321 }
322 if (len == 3 && src[0] == 'e' && src[1] == 'x' && src[2] == 'r')
323 {
324 *mode = EXR;
325 *reg = 0;
326 return len;
327 }
328 if (len == 2 && src[0] == 'f' && src[1] == 'p')
329 {
330 *mode = PSIZE | REG | direction;
331 *reg = 6;
332 return len;
333 }
334 if (len == 3 && src[0] == 'e' && src[1] == 'r'
335 && src[2] >= '0' && src[2] <= '7')
336 {
337 *mode = L_32 | REG | direction;
338 *reg = src[2] - '0';
339 if (!Hmode)
340 as_warn (_("Reg not valid for H8/300"));
341 return len;
342 }
343 if (len == 2 && src[0] == 'e' && src[1] >= '0' && src[1] <= '7')
344 {
345 *mode = L_16 | REG | direction;
346 *reg = src[1] - '0' + 8;
347 if (!Hmode)
348 as_warn (_("Reg not valid for H8/300"));
349 return len;
350 }
351
352 if (src[0] == 'r')
353 {
354 if (src[1] >= '0' && src[1] <= '7')
355 {
356 if (len == 3 && src[2] == 'l')
357 {
358 *mode = L_8 | REG | direction;
359 *reg = (src[1] - '0') + 8;
360 return len;
361 }
362 if (len == 3 && src[2] == 'h')
363 {
364 *mode = L_8 | REG | direction;
365 *reg = (src[1] - '0');
366 return len;
367 }
368 if (len == 2)
369 {
370 *mode = L_16 | REG | direction;
371 *reg = (src[1] - '0');
372 return len;
373 }
374 }
375 }
376
377 return 0;
378 }
379
380 static char *
381 parse_exp (s, op)
382 char *s;
383 expressionS *op;
384 {
385 char *save = input_line_pointer;
386 char *new;
387
388 input_line_pointer = s;
389 expression (op);
390 if (op->X_op == O_absent)
391 as_bad (_("missing operand"));
392 new = input_line_pointer;
393 input_line_pointer = save;
394 return new;
395 }
396
397 static char *
398 skip_colonthing (ptr, exp, mode)
399 char *ptr;
400 expressionS *exp ATTRIBUTE_UNUSED;
401 int *mode;
402 {
403 if (*ptr == ':')
404 {
405 ptr++;
406 *mode &= ~SIZE;
407 if (*ptr == '8')
408 {
409 ptr++;
410 /* ff fill any 8 bit quantity. */
411 /* exp->X_add_number -= 0x100; */
412 *mode |= L_8;
413 }
414 else
415 {
416 if (*ptr == '2')
417 {
418 *mode |= L_24;
419 }
420 else if (*ptr == '3')
421 {
422 *mode |= L_32;
423 }
424 else if (*ptr == '1')
425 {
426 *mode |= L_16;
427 }
428 while (ISDIGIT (*ptr))
429 ptr++;
430 }
431 }
432 return ptr;
433 }
434
435 /* The many forms of operand:
436
437 Rn Register direct
438 @Rn Register indirect
439 @(exp[:16], Rn) Register indirect with displacement
440 @Rn+
441 @-Rn
442 @aa:8 absolute 8 bit
443 @aa:16 absolute 16 bit
444 @aa absolute 16 bit
445
446 #xx[:size] immediate data
447 @(exp:[8], pc) pc rel
448 @@aa[:8] memory indirect. */
449
450 char *
451 colonmod24 (op, src)
452 struct h8_op *op;
453 char *src;
454 {
455 int mode = 0;
456 src = skip_colonthing (src, &op->exp, &mode);
457
458 if (!mode)
459 {
460 /* Choose a default mode. */
461 if (op->exp.X_add_number < -32768
462 || op->exp.X_add_number > 32767)
463 {
464 if (Hmode)
465 mode = L_24;
466 else
467 mode = L_16;
468 }
469 else if (op->exp.X_add_symbol
470 || op->exp.X_op_symbol)
471 mode = DSYMMODE;
472 else
473 mode = DMODE;
474 }
475
476 op->mode |= mode;
477 return src;
478 }
479
480 static void
481 get_operand (ptr, op, dst, direction)
482 char **ptr;
483 struct h8_op *op;
484 unsigned int dst ATTRIBUTE_UNUSED;
485 int direction;
486 {
487 char *src = *ptr;
488 op_type mode;
489 unsigned int num;
490 unsigned int len;
491
492 op->mode = E;
493
494 /* Check for '(' and ')' for instructions ldm and stm. */
495 if (src[0] == '(' && src[8] == ')')
496 ++ src;
497
498 /* Gross. Gross. ldm and stm have a format not easily handled
499 by get_operand. We deal with it explicitly here. */
500 if (src[0] == 'e' && src[1] == 'r' && ISDIGIT (src[2])
501 && src[3] == '-' && src[4] == 'e' && src[5] == 'r' && ISDIGIT (src[6]))
502 {
503 int low, high;
504
505 low = src[2] - '0';
506 high = src[6] - '0';
507
508 if (high < low)
509 as_bad (_("Invalid register list for ldm/stm\n"));
510
511 if (low % 2)
512 as_bad (_("Invalid register list for ldm/stm\n"));
513
514 if (high - low > 3)
515 as_bad (_("Invalid register list for ldm/stm\n"));
516
517 if (high - low != 1
518 && low % 4)
519 as_bad (_("Invalid register list for ldm/stm\n"));
520
521 /* Even sicker. We encode two registers into op->reg. One
522 for the low register to save, the other for the high
523 register to save; we also set the high bit in op->reg
524 so we know this is "very special". */
525 op->reg = 0x80000000 | (high << 8) | low;
526 op->mode = REG;
527 if (src[7] == ')')
528 *ptr = src + 8;
529 else
530 *ptr = src + 7;
531 return;
532 }
533
534 len = parse_reg (src, &op->mode, &op->reg, direction);
535 if (len)
536 {
537 *ptr = src + len;
538 return;
539 }
540
541 if (*src == '@')
542 {
543 src++;
544 if (*src == '@')
545 {
546 src++;
547 src = parse_exp (src, &op->exp);
548
549 src = skip_colonthing (src, &op->exp, &op->mode);
550
551 *ptr = src;
552
553 op->mode = MEMIND;
554 return;
555 }
556
557 if (*src == '-')
558 {
559 src++;
560 len = parse_reg (src, &mode, &num, direction);
561 if (len == 0)
562 {
563 /* Oops, not a reg after all, must be ordinary exp. */
564 src--;
565 /* Must be a symbol. */
566 op->mode = ABS | PSIZE | direction;
567 *ptr = skip_colonthing (parse_exp (src, &op->exp),
568 &op->exp, &op->mode);
569
570 return;
571 }
572
573 if ((mode & SIZE) != PSIZE)
574 as_bad (_("Wrong size pointer register for architecture."));
575 op->mode = RDDEC;
576 op->reg = num;
577 *ptr = src + len;
578 return;
579 }
580 if (*src == '(')
581 {
582 /* Disp. */
583 src++;
584
585 /* Start off assuming a 16 bit offset. */
586
587 src = parse_exp (src, &op->exp);
588
589 src = colonmod24 (op, src);
590
591 if (*src == ')')
592 {
593 src++;
594 op->mode |= ABS | direction;
595 *ptr = src;
596 return;
597 }
598
599 if (*src != ',')
600 {
601 as_bad (_("expected @(exp, reg16)"));
602 return;
603
604 }
605 src++;
606
607 len = parse_reg (src, &mode, &op->reg, direction);
608 if (len == 0 || !(mode & REG))
609 {
610 as_bad (_("expected @(exp, reg16)"));
611 return;
612 }
613 op->mode |= DISP | direction;
614 dispreg = op->reg;
615 src += len;
616 src = skip_colonthing (src, &op->exp, &op->mode);
617
618 if (*src != ')' && '(')
619 {
620 as_bad (_("expected @(exp, reg16)"));
621 return;
622 }
623 *ptr = src + 1;
624
625 return;
626 }
627 len = parse_reg (src, &mode, &num, direction);
628
629 if (len)
630 {
631 src += len;
632 if (*src == '+')
633 {
634 src++;
635 if ((mode & SIZE) != PSIZE)
636 as_bad (_("Wrong size pointer register for architecture."));
637 op->mode = RSINC;
638 op->reg = num;
639 *ptr = src;
640 return;
641 }
642 if ((mode & SIZE) != PSIZE)
643 as_bad (_("Wrong size pointer register for architecture."));
644
645 op->mode = direction | IND | PSIZE;
646 op->reg = num;
647 *ptr = src;
648
649 return;
650 }
651 else
652 {
653 /* must be a symbol */
654
655 op->mode = ABS | direction;
656 src = parse_exp (src, &op->exp);
657
658 *ptr = colonmod24 (op, src);
659
660 return;
661 }
662 }
663
664 if (*src == '#')
665 {
666 src++;
667 op->mode = IMM;
668 src = parse_exp (src, &op->exp);
669 *ptr = skip_colonthing (src, &op->exp, &op->mode);
670
671 return;
672 }
673 else if (strncmp (src, "mach", 4) == 0
674 || strncmp (src, "macl", 4) == 0)
675 {
676 op->reg = src[3] == 'l';
677 op->mode = MACREG;
678 *ptr = src + 4;
679 return;
680 }
681 else
682 {
683 src = parse_exp (src, &op->exp);
684 /* Trailing ':' size ? */
685 if (*src == ':')
686 {
687 if (src[1] == '1' && src[2] == '6')
688 {
689 op->mode = PCREL | L_16;
690 src += 3;
691 }
692 else if (src[1] == '8')
693 {
694 op->mode = PCREL | L_8;
695 src += 2;
696 }
697 else
698 as_bad (_("expect :8 or :16 here"));
699 }
700 else
701 op->mode = PCREL | bsize;
702
703 *ptr = src;
704 }
705 }
706
707 static char *
708 get_operands (noperands, op_end, operand)
709 unsigned int noperands;
710 char *op_end;
711 struct h8_op *operand;
712 {
713 char *ptr = op_end;
714
715 switch (noperands)
716 {
717 case 0:
718 operand[0].mode = 0;
719 operand[1].mode = 0;
720 break;
721
722 case 1:
723 ptr++;
724 get_operand (&ptr, operand + 0, 0, SRC);
725 if (*ptr == ',')
726 {
727 ptr++;
728 get_operand (&ptr, operand + 1, 1, DST);
729 }
730 else
731 {
732 operand[1].mode = 0;
733 }
734 break;
735
736 case 2:
737 ptr++;
738 get_operand (&ptr, operand + 0, 0, SRC);
739 if (*ptr == ',')
740 ptr++;
741 get_operand (&ptr, operand + 1, 1, DST);
742 break;
743
744 default:
745 abort ();
746 }
747
748 return ptr;
749 }
750
751 /* Passed a pointer to a list of opcodes which use different
752 addressing modes, return the opcode which matches the opcodes
753 provided. */
754
755 static const struct h8_instruction *
756 get_specific (instruction, operands, size)
757 const struct h8_instruction *instruction;
758 struct h8_op *operands;
759 int size;
760 {
761 const struct h8_instruction *this_try = instruction;
762 int found = 0;
763 int this_index = instruction->idx;
764
765 /* There's only one ldm/stm and it's easier to just
766 get out quick for them. */
767 if (strcmp (instruction->opcode->name, "stm.l") == 0
768 || strcmp (instruction->opcode->name, "ldm.l") == 0)
769 return this_try;
770
771 while (this_index == instruction->idx && !found)
772 {
773 found = 1;
774
775 this_try = instruction++;
776 if (this_try->noperands == 0)
777 {
778 int this_size;
779
780 this_size = this_try->opcode->how & SN;
781 if (this_size != size && (this_size != SB || size != SN))
782 found = 0;
783 }
784 else
785 {
786 int i;
787
788 for (i = 0; i < this_try->noperands && found; i++)
789 {
790 op_type op = this_try->opcode->args.nib[i];
791 int x = operands[i].mode;
792
793 if ((op & (DISP | REG)) == (DISP | REG)
794 && ((x & (DISP | REG)) == (DISP | REG)))
795 {
796 dispreg = operands[i].reg;
797 }
798 else if (op & REG)
799 {
800 if (!(x & REG))
801 found = 0;
802
803 if (x & L_P)
804 x = (x & ~L_P) | (Hmode ? L_32 : L_16);
805 if (op & L_P)
806 op = (op & ~L_P) | (Hmode ? L_32 : L_16);
807
808 opsize = op & SIZE;
809
810 /* The size of the reg is v important. */
811 if ((op & SIZE) != (x & SIZE))
812 found = 0;
813 }
814 else if ((op & ABSJMP) && (x & ABS))
815 {
816 operands[i].mode &= ~ABS;
817 operands[i].mode |= ABSJMP;
818 /* But it may not be 24 bits long. */
819 if (!Hmode)
820 {
821 operands[i].mode &= ~SIZE;
822 operands[i].mode |= L_16;
823 }
824 }
825 else if ((op & (KBIT | DBIT)) && (x & IMM))
826 {
827 /* This is ok if the immediate value is sensible. */
828 }
829 else if (op & PCREL)
830 {
831 /* The size of the displacement is important. */
832 if ((op & SIZE) != (x & SIZE))
833 found = 0;
834 }
835 else if ((op & (DISP | IMM | ABS))
836 && (op & (DISP | IMM | ABS)) == (x & (DISP | IMM | ABS)))
837 {
838 /* Promote a L_24 to L_32 if it makes us match. */
839 if ((x & L_24) && (op & L_32))
840 {
841 x &= ~L_24;
842 x |= L_32;
843 }
844 /* Promote an L8 to L_16 if it makes us match. */
845 if (op & ABS && op & L_8 && op & DISP)
846 {
847 if (x & L_16)
848 found = 1;
849 }
850 else if ((x & SIZE) != 0
851 && ((op & SIZE) != (x & SIZE)))
852 found = 0;
853 }
854 else if ((op & MACREG) != (x & MACREG))
855 {
856 found = 0;
857 }
858 else if ((op & MODE) != (x & MODE))
859 {
860 found = 0;
861 }
862 }
863 }
864 }
865 if (found)
866 return this_try;
867 else
868 return 0;
869 }
870
871 static void
872 check_operand (operand, width, string)
873 struct h8_op *operand;
874 unsigned int width;
875 char *string;
876 {
877 if (operand->exp.X_add_symbol == 0
878 && operand->exp.X_op_symbol == 0)
879 {
880 /* No symbol involved, let's look at offset, it's dangerous if
881 any of the high bits are not 0 or ff's, find out by oring or
882 anding with the width and seeing if the answer is 0 or all
883 fs. */
884
885 if ((operand->exp.X_add_number & ~width) != 0 &&
886 (operand->exp.X_add_number | width) != (unsigned)(~0))
887 {
888 if (width == 255
889 && (operand->exp.X_add_number & 0xff00) == 0xff00)
890 {
891 /* Just ignore this one - which happens when trying to
892 fit a 16 bit address truncated into an 8 bit address
893 of something like bset. */
894 }
895 else if (strcmp (string, "@") == 0
896 && width == 0xffff
897 && (operand->exp.X_add_number & 0xff8000) == 0xff8000)
898 {
899 /* Just ignore this one - which happens when trying to
900 fit a 24 bit address truncated into a 16 bit address
901 of something like mov.w. */
902 }
903 else
904 {
905 as_warn (_("operand %s0x%lx out of range."), string,
906 (unsigned long) operand->exp.X_add_number);
907 }
908 }
909 }
910 }
911
912 /* RELAXMODE has one of 3 values:
913
914 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
915
916 1 Output a relaxable 24bit absolute mov.w address relocation
917 (may relax into a 16bit absolute address).
918
919 2 Output a relaxable 16/24 absolute mov.b address relocation
920 (may relax into an 8bit absolute address). */
921
922 static void
923 do_a_fix_imm (offset, operand, relaxmode)
924 int offset;
925 struct h8_op *operand;
926 int relaxmode;
927 {
928 int idx;
929 int size;
930 int where;
931
932 char *t = operand->mode & IMM ? "#" : "@";
933
934 if (operand->exp.X_add_symbol == 0)
935 {
936 char *bytes = frag_now->fr_literal + offset;
937 switch (operand->mode & SIZE)
938 {
939 case L_2:
940 check_operand (operand, 0x3, t);
941 bytes[0] |= (operand->exp.X_add_number) << 4;
942 break;
943 case L_3:
944 check_operand (operand, 0x7, t);
945 bytes[0] |= (operand->exp.X_add_number) << 4;
946 break;
947 case L_8:
948 check_operand (operand, 0xff, t);
949 bytes[0] = operand->exp.X_add_number;
950 break;
951 case L_16:
952 check_operand (operand, 0xffff, t);
953 bytes[0] = operand->exp.X_add_number >> 8;
954 bytes[1] = operand->exp.X_add_number >> 0;
955 break;
956 case L_24:
957 check_operand (operand, 0xffffff, t);
958 bytes[0] = operand->exp.X_add_number >> 16;
959 bytes[1] = operand->exp.X_add_number >> 8;
960 bytes[2] = operand->exp.X_add_number >> 0;
961 break;
962
963 case L_32:
964 /* This should be done with bfd. */
965 bytes[0] = operand->exp.X_add_number >> 24;
966 bytes[1] = operand->exp.X_add_number >> 16;
967 bytes[2] = operand->exp.X_add_number >> 8;
968 bytes[3] = operand->exp.X_add_number >> 0;
969 if (relaxmode != 0)
970 {
971 idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1;
972 fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
973 }
974 break;
975 }
976 }
977 else
978 {
979 switch (operand->mode & SIZE)
980 {
981 case L_24:
982 case L_32:
983 size = 4;
984 where = (operand->mode & SIZE) == L_24 ? -1 : 0;
985 if (relaxmode == 2)
986 idx = R_MOV24B1;
987 else if (relaxmode == 1)
988 idx = R_MOVL1;
989 else
990 idx = R_RELLONG;
991 break;
992 default:
993 as_bad (_("Can't work out size of operand.\n"));
994 case L_16:
995 size = 2;
996 where = 0;
997 if (relaxmode == 2)
998 idx = R_MOV16B1;
999 else
1000 idx = R_RELWORD;
1001 operand->exp.X_add_number =
1002 ((operand->exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1003 break;
1004 case L_8:
1005 size = 1;
1006 where = 0;
1007 idx = R_RELBYTE;
1008 operand->exp.X_add_number =
1009 ((operand->exp.X_add_number & 0xff) ^ 0x80) - 0x80;
1010 }
1011
1012 fix_new_exp (frag_now,
1013 offset + where,
1014 size,
1015 &operand->exp,
1016 0,
1017 idx);
1018 }
1019 }
1020
1021 /* Now we know what sort of opcodes it is, let's build the bytes. */
1022
1023 static void
1024 build_bytes (this_try, operand)
1025 const struct h8_instruction *this_try;
1026 struct h8_op *operand;
1027 {
1028 int i;
1029 char *output = frag_more (this_try->length);
1030 op_type *nibble_ptr = this_try->opcode->data.nib;
1031 op_type c;
1032 unsigned int nibble_count = 0;
1033 int absat = 0;
1034 int immat = 0;
1035 int nib = 0;
1036 int movb = 0;
1037 char asnibbles[30];
1038 char *p = asnibbles;
1039
1040 if (!(this_try->opcode->inbase || Hmode))
1041 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1042 this_try->opcode->name);
1043
1044 while (*nibble_ptr != E)
1045 {
1046 int d;
1047 c = *nibble_ptr++;
1048
1049 d = (c & (DST | SRC_IN_DST)) != 0;
1050
1051 if (c < 16)
1052 nib = c;
1053 else
1054 {
1055 if (c & (REG | IND | INC | DEC))
1056 nib = operand[d].reg;
1057
1058 else if ((c & DISPREG) == (DISPREG))
1059 nib = dispreg;
1060
1061 else if (c & ABS)
1062 {
1063 operand[d].mode = c;
1064 absat = nibble_count / 2;
1065 nib = 0;
1066 }
1067 else if (c & (IMM | PCREL | ABS | ABSJMP | DISP))
1068 {
1069 operand[d].mode = c;
1070 immat = nibble_count / 2;
1071 nib = 0;
1072 }
1073 else if (c & IGNORE)
1074 nib = 0;
1075
1076 else if (c & DBIT)
1077 {
1078 switch (operand[0].exp.X_add_number)
1079 {
1080 case 1:
1081 nib = c;
1082 break;
1083 case 2:
1084 nib = 0x8 | c;
1085 break;
1086 default:
1087 as_bad (_("Need #1 or #2 here"));
1088 }
1089 }
1090 else if (c & KBIT)
1091 {
1092 switch (operand[0].exp.X_add_number)
1093 {
1094 case 1:
1095 nib = 0;
1096 break;
1097 case 2:
1098 nib = 8;
1099 break;
1100 case 4:
1101 if (!Hmode)
1102 as_warn (_("#4 not valid on H8/300."));
1103 nib = 9;
1104 break;
1105
1106 default:
1107 as_bad (_("Need #1 or #2 here"));
1108 break;
1109 }
1110 /* Stop it making a fix. */
1111 operand[0].mode = 0;
1112 }
1113
1114 if (c & MEMRELAX)
1115 operand[d].mode |= MEMRELAX;
1116
1117 if (c & B31)
1118 nib |= 0x8;
1119
1120 if (c & MACREG)
1121 {
1122 if (operand[0].mode == MACREG)
1123 /* stmac has mac[hl] as the first operand. */
1124 nib = 2 + operand[0].reg;
1125 else
1126 /* ldmac has mac[hl] as the second operand. */
1127 nib = 2 + operand[1].reg;
1128 }
1129 }
1130 nibble_count++;
1131
1132 *p++ = nib;
1133 }
1134
1135 /* Disgusting. Why, oh why didn't someone ask us for advice
1136 on the assembler format. */
1137 if (strcmp (this_try->opcode->name, "stm.l") == 0
1138 || strcmp (this_try->opcode->name, "ldm.l") == 0)
1139 {
1140 int high, low;
1141 high = (operand[this_try->opcode->name[0] == 'l' ? 1 : 0].reg >> 8) & 0xf;
1142 low = operand[this_try->opcode->name[0] == 'l' ? 1 : 0].reg & 0xf;
1143
1144 asnibbles[2] = high - low;
1145 asnibbles[7] = (this_try->opcode->name[0] == 'l') ? high : low;
1146 }
1147
1148 for (i = 0; i < this_try->length; i++)
1149 output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1];
1150
1151 /* Note if this is a movb instruction -- there's a special relaxation
1152 which only applies to them. */
1153 if (strcmp (this_try->opcode->name, "mov.b") == 0)
1154 movb = 1;
1155
1156 /* Output any fixes. */
1157 for (i = 0; i < 2; i++)
1158 {
1159 int x = operand[i].mode;
1160
1161 if (x & (IMM | DISP))
1162 do_a_fix_imm (output - frag_now->fr_literal + immat,
1163 operand + i, (x & MEMRELAX) != 0);
1164
1165 else if (x & ABS)
1166 do_a_fix_imm (output - frag_now->fr_literal + absat,
1167 operand + i, (x & MEMRELAX) ? movb + 1 : 0);
1168
1169 else if (x & PCREL)
1170 {
1171 int size16 = x & (L_16);
1172 int where = size16 ? 2 : 1;
1173 int size = size16 ? 2 : 1;
1174 int type = size16 ? R_PCRWORD : R_PCRBYTE;
1175 fixS *fixP;
1176
1177 check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@");
1178
1179 if (operand[i].exp.X_add_number & 1)
1180 as_warn (_("branch operand has odd offset (%lx)\n"),
1181 (unsigned long) operand->exp.X_add_number);
1182 #ifndef OBJ_ELF
1183 /* The COFF port has always been off by one, changing it
1184 now would be an incompatible change, so we leave it as-is.
1185
1186 We don't want to do this for ELF as we want to be
1187 compatible with the proposed ELF format from Hitachi. */
1188 operand[i].exp.X_add_number -= 1;
1189 #endif
1190 operand[i].exp.X_add_number =
1191 ((operand[i].exp.X_add_number & 0xff) ^ 0x80) - 0x80;
1192
1193 fixP = fix_new_exp (frag_now,
1194 output - frag_now->fr_literal + where,
1195 size,
1196 &operand[i].exp,
1197 1,
1198 type);
1199 fixP->fx_signed = 1;
1200 }
1201 else if (x & MEMIND)
1202 {
1203 check_operand (operand + i, 0xff, "@@");
1204 fix_new_exp (frag_now,
1205 output - frag_now->fr_literal + 1,
1206 1,
1207 &operand[i].exp,
1208 0,
1209 R_MEM_INDIRECT);
1210 }
1211 else if (x & ABSJMP)
1212 {
1213 int where = 0;
1214
1215 #ifdef OBJ_ELF
1216 /* To be compatible with the proposed H8 ELF format, we
1217 want the relocation's offset to point to the first byte
1218 that will be modified, not to the start of the instruction. */
1219 where += 1;
1220 #endif
1221
1222 /* This jmp may be a jump or a branch. */
1223
1224 check_operand (operand + i, Hmode ? 0xffffff : 0xffff, "@");
1225
1226 if (operand[i].exp.X_add_number & 1)
1227 as_warn (_("branch operand has odd offset (%lx)\n"),
1228 (unsigned long) operand->exp.X_add_number);
1229
1230 if (!Hmode)
1231 operand[i].exp.X_add_number =
1232 ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1233 fix_new_exp (frag_now,
1234 output - frag_now->fr_literal + where,
1235 4,
1236 &operand[i].exp,
1237 0,
1238 R_JMPL1);
1239 }
1240 }
1241 }
1242
1243 /* Try to give an intelligent error message for common and simple to
1244 detect errors. */
1245
1246 static void
1247 clever_message (instruction, operand)
1248 const struct h8_instruction *instruction;
1249 struct h8_op *operand;
1250 {
1251 /* Find out if there was more than one possible opcode. */
1252
1253 if ((instruction + 1)->idx != instruction->idx)
1254 {
1255 int argn;
1256
1257 /* Only one opcode of this flavour, try to guess which operand
1258 didn't match. */
1259 for (argn = 0; argn < instruction->noperands; argn++)
1260 {
1261 switch (instruction->opcode->args.nib[argn])
1262 {
1263 case RD16:
1264 if (operand[argn].mode != RD16)
1265 {
1266 as_bad (_("destination operand must be 16 bit register"));
1267 return;
1268
1269 }
1270 break;
1271
1272 case RS8:
1273 if (operand[argn].mode != RS8)
1274 {
1275 as_bad (_("source operand must be 8 bit register"));
1276 return;
1277 }
1278 break;
1279
1280 case ABS16DST:
1281 if (operand[argn].mode != ABS16DST)
1282 {
1283 as_bad (_("destination operand must be 16bit absolute address"));
1284 return;
1285 }
1286 break;
1287 case RD8:
1288 if (operand[argn].mode != RD8)
1289 {
1290 as_bad (_("destination operand must be 8 bit register"));
1291 return;
1292 }
1293 break;
1294
1295 case ABS16SRC:
1296 if (operand[argn].mode != ABS16SRC)
1297 {
1298 as_bad (_("source operand must be 16bit absolute address"));
1299 return;
1300 }
1301 break;
1302
1303 }
1304 }
1305 }
1306 as_bad (_("invalid operands"));
1307 }
1308
1309 /* This is the guts of the machine-dependent assembler. STR points to
1310 a machine dependent instruction. This function is supposed to emit
1311 the frags/bytes it assembles. */
1312
1313 void
1314 md_assemble (str)
1315 char *str;
1316 {
1317 char *op_start;
1318 char *op_end;
1319 struct h8_op operand[2];
1320 const struct h8_instruction *instruction;
1321 const struct h8_instruction *prev_instruction;
1322
1323 char *dot = 0;
1324 char c;
1325 int size;
1326
1327 /* Drop leading whitespace. */
1328 while (*str == ' ')
1329 str++;
1330
1331 /* Find the op code end. */
1332 for (op_start = op_end = str;
1333 *op_end != 0 && *op_end != ' ';
1334 op_end++)
1335 {
1336 if (*op_end == '.')
1337 {
1338 dot = op_end + 1;
1339 *op_end = 0;
1340 op_end += 2;
1341 break;
1342 }
1343 }
1344
1345 if (op_end == op_start)
1346 {
1347 as_bad (_("can't find opcode "));
1348 }
1349 c = *op_end;
1350
1351 *op_end = 0;
1352
1353 instruction = (const struct h8_instruction *)
1354 hash_find (opcode_hash_control, op_start);
1355
1356 if (instruction == NULL)
1357 {
1358 as_bad (_("unknown opcode"));
1359 return;
1360 }
1361
1362 /* We used to set input_line_pointer to the result of get_operands,
1363 but that is wrong. Our caller assumes we don't change it. */
1364
1365 (void) get_operands (instruction->noperands, op_end, operand);
1366 *op_end = c;
1367 prev_instruction = instruction;
1368
1369 size = SN;
1370 if (dot)
1371 {
1372 switch (*dot)
1373 {
1374 case 'b':
1375 size = SB;
1376 break;
1377
1378 case 'w':
1379 size = SW;
1380 break;
1381
1382 case 'l':
1383 size = SL;
1384 break;
1385 }
1386 }
1387 instruction = get_specific (instruction, operand, size);
1388
1389 if (instruction == 0)
1390 {
1391 /* Couldn't find an opcode which matched the operands. */
1392 char *where = frag_more (2);
1393
1394 where[0] = 0x0;
1395 where[1] = 0x0;
1396 clever_message (prev_instruction, operand);
1397
1398 return;
1399 }
1400 if (instruction->size && dot)
1401 {
1402 if (instruction->size != *dot)
1403 {
1404 as_warn (_("mismatch between opcode size and operand size"));
1405 }
1406 }
1407
1408 build_bytes (instruction, operand);
1409 }
1410
1411 #ifndef BFD_ASSEMBLER
1412 void
1413 tc_crawl_symbol_chain (headers)
1414 object_headers *headers ATTRIBUTE_UNUSED;
1415 {
1416 printf (_("call to tc_crawl_symbol_chain \n"));
1417 }
1418 #endif
1419
1420 symbolS *
1421 md_undefined_symbol (name)
1422 char *name ATTRIBUTE_UNUSED;
1423 {
1424 return 0;
1425 }
1426
1427 #ifndef BFD_ASSEMBLER
1428 void
1429 tc_headers_hook (headers)
1430 object_headers *headers ATTRIBUTE_UNUSED;
1431 {
1432 printf (_("call to tc_headers_hook \n"));
1433 }
1434 #endif
1435
1436 /* Various routines to kill one day */
1437 /* Equal to MAX_PRECISION in atof-ieee.c */
1438 #define MAX_LITTLENUMS 6
1439
1440 /* Turn a string in input_line_pointer into a floating point constant
1441 of type TYPE, and store the appropriate bytes in *LITP. The number
1442 of LITTLENUMS emitted is stored in *SIZEP. An error message is
1443 returned, or NULL on OK. */
1444
1445 char *
1446 md_atof (type, litP, sizeP)
1447 char type;
1448 char *litP;
1449 int *sizeP;
1450 {
1451 int prec;
1452 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1453 LITTLENUM_TYPE *wordP;
1454 char *t;
1455
1456 switch (type)
1457 {
1458 case 'f':
1459 case 'F':
1460 case 's':
1461 case 'S':
1462 prec = 2;
1463 break;
1464
1465 case 'd':
1466 case 'D':
1467 case 'r':
1468 case 'R':
1469 prec = 4;
1470 break;
1471
1472 case 'x':
1473 case 'X':
1474 prec = 6;
1475 break;
1476
1477 case 'p':
1478 case 'P':
1479 prec = 6;
1480 break;
1481
1482 default:
1483 *sizeP = 0;
1484 return _("Bad call to MD_ATOF()");
1485 }
1486 t = atof_ieee (input_line_pointer, type, words);
1487 if (t)
1488 input_line_pointer = t;
1489
1490 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1491 for (wordP = words; prec--;)
1492 {
1493 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
1494 litP += sizeof (LITTLENUM_TYPE);
1495 }
1496 return 0;
1497 }
1498 \f
1499 const char *md_shortopts = "";
1500 struct option md_longopts[] = {
1501 {NULL, no_argument, NULL, 0}
1502 };
1503
1504 size_t md_longopts_size = sizeof (md_longopts);
1505
1506 int
1507 md_parse_option (c, arg)
1508 int c ATTRIBUTE_UNUSED;
1509 char *arg ATTRIBUTE_UNUSED;
1510 {
1511 return 0;
1512 }
1513
1514 void
1515 md_show_usage (stream)
1516 FILE *stream ATTRIBUTE_UNUSED;
1517 {
1518 }
1519 \f
1520 void tc_aout_fix_to_chars PARAMS ((void));
1521
1522 void
1523 tc_aout_fix_to_chars ()
1524 {
1525 printf (_("call to tc_aout_fix_to_chars \n"));
1526 abort ();
1527 }
1528
1529 void
1530 md_convert_frag (headers, seg, fragP)
1531 #ifdef BFD_ASSEMBLER
1532 bfd *headers ATTRIBUTE_UNUSED;
1533 #else
1534 object_headers *headers ATTRIBUTE_UNUSED;
1535 #endif
1536 segT seg ATTRIBUTE_UNUSED;
1537 fragS *fragP ATTRIBUTE_UNUSED;
1538 {
1539 printf (_("call to md_convert_frag \n"));
1540 abort ();
1541 }
1542
1543 #ifdef BFD_ASSEMBLER
1544 valueT
1545 md_section_align (segment, size)
1546 segT segment;
1547 valueT size;
1548 {
1549 int align = bfd_get_section_alignment (stdoutput, segment);
1550 return ((size + (1 << align) - 1) & (-1 << align));
1551 }
1552 #else
1553 valueT
1554 md_section_align (seg, size)
1555 segT seg;
1556 valueT size;
1557 {
1558 return ((size + (1 << section_alignment[(int) seg]) - 1)
1559 & (-1 << section_alignment[(int) seg]));
1560 }
1561 #endif
1562
1563
1564 void
1565 md_apply_fix3 (fixP, valP, seg)
1566 fixS *fixP;
1567 valueT *valP;
1568 segT seg ATTRIBUTE_UNUSED;
1569 {
1570 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
1571 long val = *valP;
1572
1573 switch (fixP->fx_size)
1574 {
1575 case 1:
1576 *buf++ = val;
1577 break;
1578 case 2:
1579 *buf++ = (val >> 8);
1580 *buf++ = val;
1581 break;
1582 case 4:
1583 *buf++ = (val >> 24);
1584 *buf++ = (val >> 16);
1585 *buf++ = (val >> 8);
1586 *buf++ = val;
1587 break;
1588 default:
1589 abort ();
1590 }
1591
1592 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
1593 fixP->fx_done = 1;
1594 }
1595
1596 int
1597 md_estimate_size_before_relax (fragP, segment_type)
1598 register fragS *fragP ATTRIBUTE_UNUSED;
1599 register segT segment_type ATTRIBUTE_UNUSED;
1600 {
1601 printf (_("call tomd_estimate_size_before_relax \n"));
1602 abort ();
1603 }
1604
1605 /* Put number into target byte order. */
1606 void
1607 md_number_to_chars (ptr, use, nbytes)
1608 char *ptr;
1609 valueT use;
1610 int nbytes;
1611 {
1612 number_to_chars_bigendian (ptr, use, nbytes);
1613 }
1614
1615 long
1616 md_pcrel_from (fixP)
1617 fixS *fixP ATTRIBUTE_UNUSED;
1618 {
1619 abort ();
1620 }
1621
1622 #ifndef BFD_ASSEMBLER
1623 void
1624 tc_reloc_mangle (fix_ptr, intr, base)
1625 fixS *fix_ptr;
1626 struct internal_reloc *intr;
1627 bfd_vma base;
1628
1629 {
1630 symbolS *symbol_ptr;
1631
1632 symbol_ptr = fix_ptr->fx_addsy;
1633
1634 /* If this relocation is attached to a symbol then it's ok
1635 to output it. */
1636 if (fix_ptr->fx_r_type == TC_CONS_RELOC)
1637 {
1638 /* cons likes to create reloc32's whatever the size of the reloc..
1639 */
1640 switch (fix_ptr->fx_size)
1641 {
1642 case 4:
1643 intr->r_type = R_RELLONG;
1644 break;
1645 case 2:
1646 intr->r_type = R_RELWORD;
1647 break;
1648 case 1:
1649 intr->r_type = R_RELBYTE;
1650 break;
1651 default:
1652 abort ();
1653 }
1654 }
1655 else
1656 {
1657 intr->r_type = fix_ptr->fx_r_type;
1658 }
1659
1660 intr->r_vaddr = fix_ptr->fx_frag->fr_address + fix_ptr->fx_where + base;
1661 intr->r_offset = fix_ptr->fx_offset;
1662
1663 if (symbol_ptr)
1664 {
1665 if (symbol_ptr->sy_number != -1)
1666 intr->r_symndx = symbol_ptr->sy_number;
1667 else
1668 {
1669 symbolS *segsym;
1670
1671 /* This case arises when a reference is made to `.'. */
1672 segsym = seg_info (S_GET_SEGMENT (symbol_ptr))->dot;
1673 if (segsym == NULL)
1674 intr->r_symndx = -1;
1675 else
1676 {
1677 intr->r_symndx = segsym->sy_number;
1678 intr->r_offset += S_GET_VALUE (symbol_ptr);
1679 }
1680 }
1681 }
1682 else
1683 intr->r_symndx = -1;
1684 }
1685 #else /* BFD_ASSEMBLER */
1686 arelent *
1687 tc_gen_reloc (section, fixp)
1688 asection *section ATTRIBUTE_UNUSED;
1689 fixS *fixp;
1690 {
1691 arelent *rel;
1692 bfd_reloc_code_real_type r_type;
1693
1694 if (fixp->fx_addsy && fixp->fx_subsy)
1695 {
1696 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1697 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1698 {
1699 as_bad_where (fixp->fx_file, fixp->fx_line,
1700 "Difference of symbols in different sections is not supported");
1701 return NULL;
1702 }
1703 }
1704
1705 rel = (arelent *) xmalloc (sizeof (arelent));
1706 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1707 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1708 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
1709 rel->addend = fixp->fx_offset;
1710
1711 r_type = fixp->fx_r_type;
1712
1713 #define DEBUG 0
1714 #if DEBUG
1715 fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
1716 fflush(stderr);
1717 #endif
1718 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
1719 if (rel->howto == NULL)
1720 {
1721 as_bad_where (fixp->fx_file, fixp->fx_line,
1722 _("Cannot represent relocation type %s"),
1723 bfd_get_reloc_code_name (r_type));
1724 return NULL;
1725 }
1726
1727 return rel;
1728 }
1729 #endif
This page took 0.066004 seconds and 4 git commands to generate.