Move .file and .loc pseudo ops into obj-elf.c
[deliverable/binutils-gdb.git] / gas / config / tc-h8300.c
1 /* tc-h8300.c -- Assemble code for the Renesas H8/300
2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 /* Written By Steve Chamberlain <sac@cygnus.com>. */
23
24 #include <stdio.h>
25 #include "as.h"
26 #include "subsegs.h"
27 #include "bfd.h"
28
29 #ifdef BFD_ASSEMBLER
30 #include "dwarf2dbg.h"
31 #endif
32
33 #define DEFINE_TABLE
34 #define h8_opcodes ops
35 #include "opcode/h8300.h"
36 #include "safe-ctype.h"
37
38 #ifdef OBJ_ELF
39 #include "elf/h8.h"
40 #endif
41
42 const char comment_chars[] = ";";
43 const char line_comment_chars[] = "#";
44 const char line_separator_chars[] = "";
45
46 void cons PARAMS ((int));
47 void sbranch PARAMS ((int));
48 void h8300hmode PARAMS ((int));
49 void h8300smode PARAMS ((int));
50 void h8300hnmode PARAMS ((int));
51 void h8300snmode PARAMS ((int));
52 static void pint PARAMS ((int));
53
54 int Hmode;
55 int Smode;
56 int Nmode;
57
58 #define PSIZE (Hmode ? L_32 : L_16)
59 #define DMODE (L_16)
60 #define DSYMMODE (Hmode ? L_24 : L_16)
61
62 int bsize = L_8; /* Default branch displacement. */
63
64 struct h8_instruction
65 {
66 int length;
67 int noperands;
68 int idx;
69 int size;
70 const struct h8_opcode *opcode;
71 };
72
73 struct h8_instruction *h8_instructions;
74
75 void
76 h8300hmode (arg)
77 int arg ATTRIBUTE_UNUSED;
78 {
79 Hmode = 1;
80 Smode = 0;
81 #ifdef BFD_ASSEMBLER
82 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300h))
83 as_warn (_("could not set architecture and machine"));
84 #endif
85 }
86
87 void
88 h8300smode (arg)
89 int arg ATTRIBUTE_UNUSED;
90 {
91 Smode = 1;
92 Hmode = 1;
93 #ifdef BFD_ASSEMBLER
94 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300s))
95 as_warn (_("could not set architecture and machine"));
96 #endif
97 }
98
99 void
100 h8300hnmode (arg)
101 int arg ATTRIBUTE_UNUSED;
102 {
103 Hmode = 1;
104 Smode = 0;
105 Nmode = 1;
106 #ifdef BFD_ASSEMBLER
107 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300hn))
108 as_warn (_("could not set architecture and machine"));
109 #endif
110 }
111
112 void
113 h8300snmode (arg)
114 int arg ATTRIBUTE_UNUSED;
115 {
116 Smode = 1;
117 Hmode = 1;
118 Nmode = 1;
119 #ifdef BFD_ASSEMBLER
120 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300sn))
121 as_warn (_("could not set architecture and machine"));
122 #endif
123 }
124
125 void
126 sbranch (size)
127 int size;
128 {
129 bsize = size;
130 }
131
132 static void
133 pint (arg)
134 int arg ATTRIBUTE_UNUSED;
135 {
136 cons (Hmode ? 4 : 2);
137 }
138
139 /* This table describes all the machine specific pseudo-ops the assembler
140 has to support. The fields are:
141 pseudo-op name without dot
142 function to call to execute this pseudo-op
143 Integer arg to pass to the function. */
144
145 const pseudo_typeS md_pseudo_table[] =
146 {
147 {"h8300h", h8300hmode, 0},
148 {"h8300hn", h8300hnmode, 0},
149 {"h8300s", h8300smode, 0},
150 {"h8300sn", h8300snmode, 0},
151 {"sbranch", sbranch, L_8},
152 {"lbranch", sbranch, L_16},
153
154 {"int", pint, 0},
155 {"data.b", cons, 1},
156 {"data.w", cons, 2},
157 {"data.l", cons, 4},
158 {"form", listing_psize, 0},
159 {"heading", listing_title, 0},
160 {"import", s_ignore, 0},
161 {"page", listing_eject, 0},
162 {"program", s_ignore, 0},
163 {0, 0, 0}
164 };
165
166 const int md_reloc_size;
167
168 const char EXP_CHARS[] = "eE";
169
170 /* Chars that mean this number is a floating point constant
171 As in 0f12.456
172 or 0d1.2345e12. */
173 const char FLT_CHARS[] = "rRsSfFdDxXpP";
174
175 static struct hash_control *opcode_hash_control; /* Opcode mnemonics. */
176
177 /* This function is called once, at assembler startup time. This
178 should set up all the tables, etc. that the MD part of the assembler
179 needs. */
180
181 void
182 md_begin ()
183 {
184 unsigned int nopcodes;
185 const struct h8_opcode *p;
186 struct h8_instruction *pi;
187 char prev_buffer[100];
188 int idx = 0;
189
190 #ifdef BFD_ASSEMBLER
191 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300))
192 as_warn (_("could not set architecture and machine"));
193 #endif
194
195 opcode_hash_control = hash_new ();
196 prev_buffer[0] = 0;
197
198 nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
199
200 h8_instructions = (struct h8_instruction *)
201 xmalloc (nopcodes * sizeof (struct h8_instruction));
202
203 for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
204 {
205 /* Strip off any . part when inserting the opcode and only enter
206 unique codes into the hash table. */
207 char *src = p->name;
208 unsigned int len = strlen (src);
209 char *dst = malloc (len + 1);
210 char *buffer = dst;
211
212 pi->size = 0;
213 while (*src)
214 {
215 if (*src == '.')
216 {
217 src++;
218 pi->size = *src;
219 break;
220 }
221 *dst++ = *src++;
222 }
223 *dst++ = 0;
224 if (strcmp (buffer, prev_buffer))
225 {
226 hash_insert (opcode_hash_control, buffer, (char *) pi);
227 strcpy (prev_buffer, buffer);
228 idx++;
229 }
230 pi->idx = idx;
231
232 /* Find the number of operands. */
233 pi->noperands = 0;
234 while (p->args.nib[pi->noperands] != E)
235 pi->noperands++;
236
237 /* Find the length of the opcode in bytes. */
238 pi->length = 0;
239 while (p->data.nib[pi->length * 2] != E)
240 pi->length++;
241
242 pi->opcode = p;
243 }
244
245 /* Add entry for the NULL vector terminator. */
246 pi->length = 0;
247 pi->noperands = 0;
248 pi->idx = 0;
249 pi->size = 0;
250 pi->opcode = p;
251
252 linkrelax = 1;
253 }
254
255 struct h8_exp
256 {
257 char *e_beg;
258 char *e_end;
259 expressionS e_exp;
260 };
261
262 int dispreg;
263 int opsize; /* Set when a register size is seen. */
264
265 struct h8_op
266 {
267 op_type mode;
268 unsigned reg;
269 expressionS exp;
270 };
271
272 static void clever_message PARAMS ((const struct h8_instruction *, struct h8_op *));
273 static void build_bytes PARAMS ((const struct h8_instruction *, struct h8_op *));
274 static void do_a_fix_imm PARAMS ((int, struct h8_op *, int));
275 static void check_operand PARAMS ((struct h8_op *, unsigned int, char *));
276 static const struct h8_instruction * get_specific PARAMS ((const struct h8_instruction *, struct h8_op *, int));
277 static char * get_operands PARAMS ((unsigned, char *, struct h8_op *));
278 static void get_operand PARAMS ((char **, struct h8_op *, unsigned, int));
279 static char * skip_colonthing PARAMS ((char *, expressionS *, int *));
280 static char * parse_exp PARAMS ((char *, expressionS *));
281 static int parse_reg PARAMS ((char *, op_type *, unsigned *, int));
282 char * colonmod24 PARAMS ((struct h8_op *, char *));
283
284 /*
285 parse operands
286 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
287 r0l,r0h,..r7l,r7h
288 @WREG
289 @WREG+
290 @-WREG
291 #const
292 ccr
293 */
294
295 /* Try to parse a reg name. Return the number of chars consumed. */
296
297 static int
298 parse_reg (src, mode, reg, direction)
299 char *src;
300 op_type *mode;
301 unsigned int *reg;
302 int direction;
303 {
304 char *end;
305 int len;
306
307 /* Cribbed from get_symbol_end. */
308 if (!is_name_beginner (*src) || *src == '\001')
309 return 0;
310 end = src + 1;
311 while (is_part_of_name (*end) || *end == '\001')
312 end++;
313 len = end - src;
314
315 if (len == 2 && src[0] == 's' && src[1] == 'p')
316 {
317 *mode = PSIZE | REG | direction;
318 *reg = 7;
319 return len;
320 }
321 if (len == 3 && src[0] == 'c' && src[1] == 'c' && src[2] == 'r')
322 {
323 *mode = CCR;
324 *reg = 0;
325 return len;
326 }
327 if (len == 3 && src[0] == 'e' && src[1] == 'x' && src[2] == 'r')
328 {
329 *mode = EXR;
330 *reg = 0;
331 return len;
332 }
333 if (len == 2 && src[0] == 'f' && src[1] == 'p')
334 {
335 *mode = PSIZE | REG | direction;
336 *reg = 6;
337 return len;
338 }
339 if (len == 3 && src[0] == 'e' && src[1] == 'r'
340 && src[2] >= '0' && src[2] <= '7')
341 {
342 *mode = L_32 | REG | direction;
343 *reg = src[2] - '0';
344 if (!Hmode)
345 as_warn (_("Reg not valid for H8/300"));
346 return len;
347 }
348 if (len == 2 && src[0] == 'e' && src[1] >= '0' && src[1] <= '7')
349 {
350 *mode = L_16 | REG | direction;
351 *reg = src[1] - '0' + 8;
352 if (!Hmode)
353 as_warn (_("Reg not valid for H8/300"));
354 return len;
355 }
356
357 if (src[0] == 'r')
358 {
359 if (src[1] >= '0' && src[1] <= '7')
360 {
361 if (len == 3 && src[2] == 'l')
362 {
363 *mode = L_8 | REG | direction;
364 *reg = (src[1] - '0') + 8;
365 return len;
366 }
367 if (len == 3 && src[2] == 'h')
368 {
369 *mode = L_8 | REG | direction;
370 *reg = (src[1] - '0');
371 return len;
372 }
373 if (len == 2)
374 {
375 *mode = L_16 | REG | direction;
376 *reg = (src[1] - '0');
377 return len;
378 }
379 }
380 }
381
382 return 0;
383 }
384
385 static char *
386 parse_exp (s, op)
387 char *s;
388 expressionS *op;
389 {
390 char *save = input_line_pointer;
391 char *new;
392
393 input_line_pointer = s;
394 expression (op);
395 if (op->X_op == O_absent)
396 as_bad (_("missing operand"));
397 new = input_line_pointer;
398 input_line_pointer = save;
399 return new;
400 }
401
402 static char *
403 skip_colonthing (ptr, exp, mode)
404 char *ptr;
405 expressionS *exp ATTRIBUTE_UNUSED;
406 int *mode;
407 {
408 if (*ptr == ':')
409 {
410 ptr++;
411 *mode &= ~SIZE;
412 if (*ptr == '8')
413 {
414 ptr++;
415 /* ff fill any 8 bit quantity. */
416 /* exp->X_add_number -= 0x100; */
417 *mode |= L_8;
418 }
419 else
420 {
421 if (*ptr == '2')
422 {
423 *mode |= L_24;
424 }
425 else if (*ptr == '3')
426 {
427 *mode |= L_32;
428 }
429 else if (*ptr == '1')
430 {
431 *mode |= L_16;
432 }
433 while (ISDIGIT (*ptr))
434 ptr++;
435 }
436 }
437 return ptr;
438 }
439
440 /* The many forms of operand:
441
442 Rn Register direct
443 @Rn Register indirect
444 @(exp[:16], Rn) Register indirect with displacement
445 @Rn+
446 @-Rn
447 @aa:8 absolute 8 bit
448 @aa:16 absolute 16 bit
449 @aa absolute 16 bit
450
451 #xx[:size] immediate data
452 @(exp:[8], pc) pc rel
453 @@aa[:8] memory indirect. */
454
455 char *
456 colonmod24 (op, src)
457 struct h8_op *op;
458 char *src;
459 {
460 int mode = 0;
461 src = skip_colonthing (src, &op->exp, &mode);
462
463 if (!mode)
464 {
465 /* Choose a default mode. */
466 if (op->exp.X_add_number < -32768
467 || op->exp.X_add_number > 32767)
468 {
469 if (Hmode)
470 mode = L_24;
471 else
472 mode = L_16;
473 }
474 else if (op->exp.X_add_symbol
475 || op->exp.X_op_symbol)
476 mode = DSYMMODE;
477 else
478 mode = DMODE;
479 }
480
481 op->mode |= mode;
482 return src;
483 }
484
485 static void
486 get_operand (ptr, op, dst, direction)
487 char **ptr;
488 struct h8_op *op;
489 unsigned int dst ATTRIBUTE_UNUSED;
490 int direction;
491 {
492 char *src = *ptr;
493 op_type mode;
494 unsigned int num;
495 unsigned int len;
496
497 op->mode = E;
498
499 /* Check for '(' and ')' for instructions ldm and stm. */
500 if (src[0] == '(' && src[8] == ')')
501 ++ src;
502
503 /* Gross. Gross. ldm and stm have a format not easily handled
504 by get_operand. We deal with it explicitly here. */
505 if (src[0] == 'e' && src[1] == 'r' && ISDIGIT (src[2])
506 && src[3] == '-' && src[4] == 'e' && src[5] == 'r' && ISDIGIT (src[6]))
507 {
508 int low, high;
509
510 low = src[2] - '0';
511 high = src[6] - '0';
512
513 if (high < low)
514 as_bad (_("Invalid register list for ldm/stm\n"));
515
516 if (low % 2)
517 as_bad (_("Invalid register list for ldm/stm\n"));
518
519 if (high - low > 3)
520 as_bad (_("Invalid register list for ldm/stm\n"));
521
522 if (high - low != 1
523 && low % 4)
524 as_bad (_("Invalid register list for ldm/stm\n"));
525
526 /* Even sicker. We encode two registers into op->reg. One
527 for the low register to save, the other for the high
528 register to save; we also set the high bit in op->reg
529 so we know this is "very special". */
530 op->reg = 0x80000000 | (high << 8) | low;
531 op->mode = REG;
532 if (src[7] == ')')
533 *ptr = src + 8;
534 else
535 *ptr = src + 7;
536 return;
537 }
538
539 len = parse_reg (src, &op->mode, &op->reg, direction);
540 if (len)
541 {
542 *ptr = src + len;
543 return;
544 }
545
546 if (*src == '@')
547 {
548 src++;
549 if (*src == '@')
550 {
551 src++;
552 src = parse_exp (src, &op->exp);
553
554 src = skip_colonthing (src, &op->exp, &op->mode);
555
556 *ptr = src;
557
558 op->mode = MEMIND;
559 return;
560 }
561
562 if (*src == '-')
563 {
564 src++;
565 len = parse_reg (src, &mode, &num, direction);
566 if (len == 0)
567 {
568 /* Oops, not a reg after all, must be ordinary exp. */
569 src--;
570 /* Must be a symbol. */
571 op->mode = ABS | PSIZE | direction;
572 *ptr = skip_colonthing (parse_exp (src, &op->exp),
573 &op->exp, &op->mode);
574
575 return;
576 }
577
578 if ((mode & SIZE) != PSIZE)
579 as_bad (_("Wrong size pointer register for architecture."));
580 op->mode = RDDEC;
581 op->reg = num;
582 *ptr = src + len;
583 return;
584 }
585 if (*src == '(')
586 {
587 /* Disp. */
588 src++;
589
590 /* Start off assuming a 16 bit offset. */
591
592 src = parse_exp (src, &op->exp);
593
594 src = colonmod24 (op, src);
595
596 if (*src == ')')
597 {
598 src++;
599 op->mode |= ABS | direction;
600 *ptr = src;
601 return;
602 }
603
604 if (*src != ',')
605 {
606 as_bad (_("expected @(exp, reg16)"));
607 return;
608
609 }
610 src++;
611
612 len = parse_reg (src, &mode, &op->reg, direction);
613 if (len == 0 || !(mode & REG))
614 {
615 as_bad (_("expected @(exp, reg16)"));
616 return;
617 }
618 op->mode |= DISP | direction;
619 dispreg = op->reg;
620 src += len;
621 src = skip_colonthing (src, &op->exp, &op->mode);
622
623 if (*src != ')' && '(')
624 {
625 as_bad (_("expected @(exp, reg16)"));
626 return;
627 }
628 *ptr = src + 1;
629
630 return;
631 }
632 len = parse_reg (src, &mode, &num, direction);
633
634 if (len)
635 {
636 src += len;
637 if (*src == '+')
638 {
639 src++;
640 if ((mode & SIZE) != PSIZE)
641 as_bad (_("Wrong size pointer register for architecture."));
642 op->mode = RSINC;
643 op->reg = num;
644 *ptr = src;
645 return;
646 }
647 if ((mode & SIZE) != PSIZE)
648 as_bad (_("Wrong size pointer register for architecture."));
649
650 op->mode = direction | IND | PSIZE;
651 op->reg = num;
652 *ptr = src;
653
654 return;
655 }
656 else
657 {
658 /* must be a symbol */
659
660 op->mode = ABS | direction;
661 src = parse_exp (src, &op->exp);
662
663 *ptr = colonmod24 (op, src);
664
665 return;
666 }
667 }
668
669 if (*src == '#')
670 {
671 src++;
672 op->mode = IMM;
673 src = parse_exp (src, &op->exp);
674 *ptr = skip_colonthing (src, &op->exp, &op->mode);
675
676 return;
677 }
678 else if (strncmp (src, "mach", 4) == 0
679 || strncmp (src, "macl", 4) == 0)
680 {
681 op->reg = src[3] == 'l';
682 op->mode = MACREG;
683 *ptr = src + 4;
684 return;
685 }
686 else
687 {
688 src = parse_exp (src, &op->exp);
689 /* Trailing ':' size ? */
690 if (*src == ':')
691 {
692 if (src[1] == '1' && src[2] == '6')
693 {
694 op->mode = PCREL | L_16;
695 src += 3;
696 }
697 else if (src[1] == '8')
698 {
699 op->mode = PCREL | L_8;
700 src += 2;
701 }
702 else
703 as_bad (_("expect :8 or :16 here"));
704 }
705 else
706 op->mode = PCREL | bsize;
707
708 *ptr = src;
709 }
710 }
711
712 static char *
713 get_operands (noperands, op_end, operand)
714 unsigned int noperands;
715 char *op_end;
716 struct h8_op *operand;
717 {
718 char *ptr = op_end;
719
720 switch (noperands)
721 {
722 case 0:
723 operand[0].mode = 0;
724 operand[1].mode = 0;
725 break;
726
727 case 1:
728 ptr++;
729 get_operand (&ptr, operand + 0, 0, SRC);
730 if (*ptr == ',')
731 {
732 ptr++;
733 get_operand (&ptr, operand + 1, 1, DST);
734 }
735 else
736 {
737 operand[1].mode = 0;
738 }
739 break;
740
741 case 2:
742 ptr++;
743 get_operand (&ptr, operand + 0, 0, SRC);
744 if (*ptr == ',')
745 ptr++;
746 get_operand (&ptr, operand + 1, 1, DST);
747 break;
748
749 default:
750 abort ();
751 }
752
753 return ptr;
754 }
755
756 /* Passed a pointer to a list of opcodes which use different
757 addressing modes, return the opcode which matches the opcodes
758 provided. */
759
760 static const struct h8_instruction *
761 get_specific (instruction, operands, size)
762 const struct h8_instruction *instruction;
763 struct h8_op *operands;
764 int size;
765 {
766 const struct h8_instruction *this_try = instruction;
767 int found = 0;
768 int this_index = instruction->idx;
769
770 /* There's only one ldm/stm and it's easier to just
771 get out quick for them. */
772 if (strcmp (instruction->opcode->name, "stm.l") == 0
773 || strcmp (instruction->opcode->name, "ldm.l") == 0)
774 return this_try;
775
776 while (this_index == instruction->idx && !found)
777 {
778 found = 1;
779
780 this_try = instruction++;
781 if (this_try->noperands == 0)
782 {
783 int this_size;
784
785 this_size = this_try->opcode->how & SN;
786 if (this_size != size && (this_size != SB || size != SN))
787 found = 0;
788 }
789 else
790 {
791 int i;
792
793 for (i = 0; i < this_try->noperands && found; i++)
794 {
795 op_type op = this_try->opcode->args.nib[i];
796 int x = operands[i].mode;
797
798 if ((op & (DISP | REG)) == (DISP | REG)
799 && ((x & (DISP | REG)) == (DISP | REG)))
800 {
801 dispreg = operands[i].reg;
802 }
803 else if (op & REG)
804 {
805 if (!(x & REG))
806 found = 0;
807
808 if (x & L_P)
809 x = (x & ~L_P) | (Hmode ? L_32 : L_16);
810 if (op & L_P)
811 op = (op & ~L_P) | (Hmode ? L_32 : L_16);
812
813 opsize = op & SIZE;
814
815 /* The size of the reg is v important. */
816 if ((op & SIZE) != (x & SIZE))
817 found = 0;
818 }
819 else if ((op & ABSJMP) && (x & ABS))
820 {
821 operands[i].mode &= ~ABS;
822 operands[i].mode |= ABSJMP;
823 /* But it may not be 24 bits long. */
824 if (!Hmode)
825 {
826 operands[i].mode &= ~SIZE;
827 operands[i].mode |= L_16;
828 }
829 }
830 else if ((op & (KBIT | DBIT)) && (x & IMM))
831 {
832 /* This is ok if the immediate value is sensible. */
833 }
834 else if (op & PCREL)
835 {
836 /* The size of the displacement is important. */
837 if ((op & SIZE) != (x & SIZE))
838 found = 0;
839 }
840 else if ((op & (DISP | IMM | ABS))
841 && (op & (DISP | IMM | ABS)) == (x & (DISP | IMM | ABS)))
842 {
843 /* Promote a L_24 to L_32 if it makes us match. */
844 if ((x & L_24) && (op & L_32))
845 {
846 x &= ~L_24;
847 x |= L_32;
848 }
849 /* Promote an L8 to L_16 if it makes us match. */
850 if (op & ABS && op & L_8 && op & DISP)
851 {
852 if (x & L_16)
853 found = 1;
854 }
855 else if ((x & SIZE) != 0
856 && ((op & SIZE) != (x & SIZE)))
857 found = 0;
858 }
859 else if ((op & MACREG) != (x & MACREG))
860 {
861 found = 0;
862 }
863 else if ((op & MODE) != (x & MODE))
864 {
865 found = 0;
866 }
867 }
868 }
869 }
870 if (found)
871 return this_try;
872 else
873 return 0;
874 }
875
876 static void
877 check_operand (operand, width, string)
878 struct h8_op *operand;
879 unsigned int width;
880 char *string;
881 {
882 if (operand->exp.X_add_symbol == 0
883 && operand->exp.X_op_symbol == 0)
884 {
885 /* No symbol involved, let's look at offset, it's dangerous if
886 any of the high bits are not 0 or ff's, find out by oring or
887 anding with the width and seeing if the answer is 0 or all
888 fs. */
889
890 if ((operand->exp.X_add_number & ~width) != 0 &&
891 (operand->exp.X_add_number | width) != (unsigned)(~0))
892 {
893 if (width == 255
894 && (operand->exp.X_add_number & 0xff00) == 0xff00)
895 {
896 /* Just ignore this one - which happens when trying to
897 fit a 16 bit address truncated into an 8 bit address
898 of something like bset. */
899 }
900 else if (strcmp (string, "@") == 0
901 && width == 0xffff
902 && (operand->exp.X_add_number & 0xff8000) == 0xff8000)
903 {
904 /* Just ignore this one - which happens when trying to
905 fit a 24 bit address truncated into a 16 bit address
906 of something like mov.w. */
907 }
908 else
909 {
910 as_warn (_("operand %s0x%lx out of range."), string,
911 (unsigned long) operand->exp.X_add_number);
912 }
913 }
914 }
915 }
916
917 /* RELAXMODE has one of 3 values:
918
919 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
920
921 1 Output a relaxable 24bit absolute mov.w address relocation
922 (may relax into a 16bit absolute address).
923
924 2 Output a relaxable 16/24 absolute mov.b address relocation
925 (may relax into an 8bit absolute address). */
926
927 static void
928 do_a_fix_imm (offset, operand, relaxmode)
929 int offset;
930 struct h8_op *operand;
931 int relaxmode;
932 {
933 int idx;
934 int size;
935 int where;
936
937 char *t = operand->mode & IMM ? "#" : "@";
938
939 if (operand->exp.X_add_symbol == 0)
940 {
941 char *bytes = frag_now->fr_literal + offset;
942 switch (operand->mode & SIZE)
943 {
944 case L_2:
945 check_operand (operand, 0x3, t);
946 bytes[0] |= (operand->exp.X_add_number) << 4;
947 break;
948 case L_3:
949 check_operand (operand, 0x7, t);
950 bytes[0] |= (operand->exp.X_add_number) << 4;
951 break;
952 case L_8:
953 check_operand (operand, 0xff, t);
954 bytes[0] = operand->exp.X_add_number;
955 break;
956 case L_16:
957 check_operand (operand, 0xffff, t);
958 bytes[0] = operand->exp.X_add_number >> 8;
959 bytes[1] = operand->exp.X_add_number >> 0;
960 break;
961 case L_24:
962 check_operand (operand, 0xffffff, t);
963 bytes[0] = operand->exp.X_add_number >> 16;
964 bytes[1] = operand->exp.X_add_number >> 8;
965 bytes[2] = operand->exp.X_add_number >> 0;
966 break;
967
968 case L_32:
969 /* This should be done with bfd. */
970 bytes[0] = operand->exp.X_add_number >> 24;
971 bytes[1] = operand->exp.X_add_number >> 16;
972 bytes[2] = operand->exp.X_add_number >> 8;
973 bytes[3] = operand->exp.X_add_number >> 0;
974 if (relaxmode != 0)
975 {
976 idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1;
977 fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
978 }
979 break;
980 }
981 }
982 else
983 {
984 switch (operand->mode & SIZE)
985 {
986 case L_24:
987 case L_32:
988 size = 4;
989 where = (operand->mode & SIZE) == L_24 ? -1 : 0;
990 if (relaxmode == 2)
991 idx = R_MOV24B1;
992 else if (relaxmode == 1)
993 idx = R_MOVL1;
994 else
995 idx = R_RELLONG;
996 break;
997 default:
998 as_bad (_("Can't work out size of operand.\n"));
999 case L_16:
1000 size = 2;
1001 where = 0;
1002 if (relaxmode == 2)
1003 idx = R_MOV16B1;
1004 else
1005 idx = R_RELWORD;
1006 operand->exp.X_add_number =
1007 ((operand->exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1008 break;
1009 case L_8:
1010 size = 1;
1011 where = 0;
1012 idx = R_RELBYTE;
1013 operand->exp.X_add_number =
1014 ((operand->exp.X_add_number & 0xff) ^ 0x80) - 0x80;
1015 }
1016
1017 fix_new_exp (frag_now,
1018 offset + where,
1019 size,
1020 &operand->exp,
1021 0,
1022 idx);
1023 }
1024 }
1025
1026 /* Now we know what sort of opcodes it is, let's build the bytes. */
1027
1028 static void
1029 build_bytes (this_try, operand)
1030 const struct h8_instruction *this_try;
1031 struct h8_op *operand;
1032 {
1033 int i;
1034 char *output = frag_more (this_try->length);
1035 op_type *nibble_ptr = this_try->opcode->data.nib;
1036 op_type c;
1037 unsigned int nibble_count = 0;
1038 int absat = 0;
1039 int immat = 0;
1040 int nib = 0;
1041 int movb = 0;
1042 char asnibbles[30];
1043 char *p = asnibbles;
1044
1045 if (!(this_try->opcode->inbase || Hmode))
1046 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1047 this_try->opcode->name);
1048
1049 while (*nibble_ptr != E)
1050 {
1051 int d;
1052 c = *nibble_ptr++;
1053
1054 d = (c & (DST | SRC_IN_DST)) != 0;
1055
1056 if (c < 16)
1057 nib = c;
1058 else
1059 {
1060 if (c & (REG | IND | INC | DEC))
1061 nib = operand[d].reg;
1062
1063 else if ((c & DISPREG) == (DISPREG))
1064 nib = dispreg;
1065
1066 else if (c & ABS)
1067 {
1068 operand[d].mode = c;
1069 absat = nibble_count / 2;
1070 nib = 0;
1071 }
1072 else if (c & (IMM | PCREL | ABS | ABSJMP | DISP))
1073 {
1074 operand[d].mode = c;
1075 immat = nibble_count / 2;
1076 nib = 0;
1077 }
1078 else if (c & IGNORE)
1079 nib = 0;
1080
1081 else if (c & DBIT)
1082 {
1083 switch (operand[0].exp.X_add_number)
1084 {
1085 case 1:
1086 nib = c;
1087 break;
1088 case 2:
1089 nib = 0x8 | c;
1090 break;
1091 default:
1092 as_bad (_("Need #1 or #2 here"));
1093 }
1094 }
1095 else if (c & KBIT)
1096 {
1097 switch (operand[0].exp.X_add_number)
1098 {
1099 case 1:
1100 nib = 0;
1101 break;
1102 case 2:
1103 nib = 8;
1104 break;
1105 case 4:
1106 if (!Hmode)
1107 as_warn (_("#4 not valid on H8/300."));
1108 nib = 9;
1109 break;
1110
1111 default:
1112 as_bad (_("Need #1 or #2 here"));
1113 break;
1114 }
1115 /* Stop it making a fix. */
1116 operand[0].mode = 0;
1117 }
1118
1119 if (c & MEMRELAX)
1120 operand[d].mode |= MEMRELAX;
1121
1122 if (c & B31)
1123 nib |= 0x8;
1124
1125 if (c & MACREG)
1126 {
1127 if (operand[0].mode == MACREG)
1128 /* stmac has mac[hl] as the first operand. */
1129 nib = 2 + operand[0].reg;
1130 else
1131 /* ldmac has mac[hl] as the second operand. */
1132 nib = 2 + operand[1].reg;
1133 }
1134 }
1135 nibble_count++;
1136
1137 *p++ = nib;
1138 }
1139
1140 /* Disgusting. Why, oh why didn't someone ask us for advice
1141 on the assembler format. */
1142 if (strcmp (this_try->opcode->name, "stm.l") == 0
1143 || strcmp (this_try->opcode->name, "ldm.l") == 0)
1144 {
1145 int high, low;
1146 high = (operand[this_try->opcode->name[0] == 'l' ? 1 : 0].reg >> 8) & 0xf;
1147 low = operand[this_try->opcode->name[0] == 'l' ? 1 : 0].reg & 0xf;
1148
1149 asnibbles[2] = high - low;
1150 asnibbles[7] = (this_try->opcode->name[0] == 'l') ? high : low;
1151 }
1152
1153 for (i = 0; i < this_try->length; i++)
1154 output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1];
1155
1156 /* Note if this is a movb instruction -- there's a special relaxation
1157 which only applies to them. */
1158 if (strcmp (this_try->opcode->name, "mov.b") == 0)
1159 movb = 1;
1160
1161 /* Output any fixes. */
1162 for (i = 0; i < 2; i++)
1163 {
1164 int x = operand[i].mode;
1165
1166 if (x & (IMM | DISP))
1167 do_a_fix_imm (output - frag_now->fr_literal + immat,
1168 operand + i, (x & MEMRELAX) != 0);
1169
1170 else if (x & ABS)
1171 do_a_fix_imm (output - frag_now->fr_literal + absat,
1172 operand + i, (x & MEMRELAX) ? movb + 1 : 0);
1173
1174 else if (x & PCREL)
1175 {
1176 int size16 = x & (L_16);
1177 int where = size16 ? 2 : 1;
1178 int size = size16 ? 2 : 1;
1179 int type = size16 ? R_PCRWORD : R_PCRBYTE;
1180 fixS *fixP;
1181
1182 check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@");
1183
1184 if (operand[i].exp.X_add_number & 1)
1185 as_warn (_("branch operand has odd offset (%lx)\n"),
1186 (unsigned long) operand->exp.X_add_number);
1187 #ifndef OBJ_ELF
1188 /* The COFF port has always been off by one, changing it
1189 now would be an incompatible change, so we leave it as-is.
1190
1191 We don't want to do this for ELF as we want to be
1192 compatible with the proposed ELF format from Hitachi. */
1193 operand[i].exp.X_add_number -= 1;
1194 #endif
1195 operand[i].exp.X_add_number =
1196 ((operand[i].exp.X_add_number & 0xff) ^ 0x80) - 0x80;
1197
1198 fixP = fix_new_exp (frag_now,
1199 output - frag_now->fr_literal + where,
1200 size,
1201 &operand[i].exp,
1202 1,
1203 type);
1204 fixP->fx_signed = 1;
1205 }
1206 else if (x & MEMIND)
1207 {
1208 check_operand (operand + i, 0xff, "@@");
1209 fix_new_exp (frag_now,
1210 output - frag_now->fr_literal + 1,
1211 1,
1212 &operand[i].exp,
1213 0,
1214 R_MEM_INDIRECT);
1215 }
1216 else if (x & ABSJMP)
1217 {
1218 int where = 0;
1219
1220 #ifdef OBJ_ELF
1221 /* To be compatible with the proposed H8 ELF format, we
1222 want the relocation's offset to point to the first byte
1223 that will be modified, not to the start of the instruction. */
1224 where += 1;
1225 #endif
1226
1227 /* This jmp may be a jump or a branch. */
1228
1229 check_operand (operand + i, Hmode ? 0xffffff : 0xffff, "@");
1230
1231 if (operand[i].exp.X_add_number & 1)
1232 as_warn (_("branch operand has odd offset (%lx)\n"),
1233 (unsigned long) operand->exp.X_add_number);
1234
1235 if (!Hmode)
1236 operand[i].exp.X_add_number =
1237 ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1238 fix_new_exp (frag_now,
1239 output - frag_now->fr_literal + where,
1240 4,
1241 &operand[i].exp,
1242 0,
1243 R_JMPL1);
1244 }
1245 }
1246 }
1247
1248 /* Try to give an intelligent error message for common and simple to
1249 detect errors. */
1250
1251 static void
1252 clever_message (instruction, operand)
1253 const struct h8_instruction *instruction;
1254 struct h8_op *operand;
1255 {
1256 /* Find out if there was more than one possible opcode. */
1257
1258 if ((instruction + 1)->idx != instruction->idx)
1259 {
1260 int argn;
1261
1262 /* Only one opcode of this flavour, try to guess which operand
1263 didn't match. */
1264 for (argn = 0; argn < instruction->noperands; argn++)
1265 {
1266 switch (instruction->opcode->args.nib[argn])
1267 {
1268 case RD16:
1269 if (operand[argn].mode != RD16)
1270 {
1271 as_bad (_("destination operand must be 16 bit register"));
1272 return;
1273
1274 }
1275 break;
1276
1277 case RS8:
1278 if (operand[argn].mode != RS8)
1279 {
1280 as_bad (_("source operand must be 8 bit register"));
1281 return;
1282 }
1283 break;
1284
1285 case ABS16DST:
1286 if (operand[argn].mode != ABS16DST)
1287 {
1288 as_bad (_("destination operand must be 16bit absolute address"));
1289 return;
1290 }
1291 break;
1292 case RD8:
1293 if (operand[argn].mode != RD8)
1294 {
1295 as_bad (_("destination operand must be 8 bit register"));
1296 return;
1297 }
1298 break;
1299
1300 case ABS16SRC:
1301 if (operand[argn].mode != ABS16SRC)
1302 {
1303 as_bad (_("source operand must be 16bit absolute address"));
1304 return;
1305 }
1306 break;
1307
1308 }
1309 }
1310 }
1311 as_bad (_("invalid operands"));
1312 }
1313
1314 /* This is the guts of the machine-dependent assembler. STR points to
1315 a machine dependent instruction. This function is supposed to emit
1316 the frags/bytes it assembles. */
1317
1318 void
1319 md_assemble (str)
1320 char *str;
1321 {
1322 char *op_start;
1323 char *op_end;
1324 struct h8_op operand[2];
1325 const struct h8_instruction *instruction;
1326 const struct h8_instruction *prev_instruction;
1327
1328 char *dot = 0;
1329 char c;
1330 int size;
1331
1332 /* Drop leading whitespace. */
1333 while (*str == ' ')
1334 str++;
1335
1336 /* Find the op code end. */
1337 for (op_start = op_end = str;
1338 *op_end != 0 && *op_end != ' ';
1339 op_end++)
1340 {
1341 if (*op_end == '.')
1342 {
1343 dot = op_end + 1;
1344 *op_end = 0;
1345 op_end += 2;
1346 break;
1347 }
1348 }
1349
1350 if (op_end == op_start)
1351 {
1352 as_bad (_("can't find opcode "));
1353 }
1354 c = *op_end;
1355
1356 *op_end = 0;
1357
1358 instruction = (const struct h8_instruction *)
1359 hash_find (opcode_hash_control, op_start);
1360
1361 if (instruction == NULL)
1362 {
1363 as_bad (_("unknown opcode"));
1364 return;
1365 }
1366
1367 /* We used to set input_line_pointer to the result of get_operands,
1368 but that is wrong. Our caller assumes we don't change it. */
1369
1370 (void) get_operands (instruction->noperands, op_end, operand);
1371 *op_end = c;
1372 prev_instruction = instruction;
1373
1374 size = SN;
1375 if (dot)
1376 {
1377 switch (*dot)
1378 {
1379 case 'b':
1380 size = SB;
1381 break;
1382
1383 case 'w':
1384 size = SW;
1385 break;
1386
1387 case 'l':
1388 size = SL;
1389 break;
1390 }
1391 }
1392 instruction = get_specific (instruction, operand, size);
1393
1394 if (instruction == 0)
1395 {
1396 /* Couldn't find an opcode which matched the operands. */
1397 char *where = frag_more (2);
1398
1399 where[0] = 0x0;
1400 where[1] = 0x0;
1401 clever_message (prev_instruction, operand);
1402
1403 return;
1404 }
1405 if (instruction->size && dot)
1406 {
1407 if (instruction->size != *dot)
1408 {
1409 as_warn (_("mismatch between opcode size and operand size"));
1410 }
1411 }
1412
1413 build_bytes (instruction, operand);
1414
1415 #ifdef BFD_ASSEMBLER
1416 dwarf2_emit_insn (instruction->length);
1417 #endif
1418 }
1419
1420 #ifndef BFD_ASSEMBLER
1421 void
1422 tc_crawl_symbol_chain (headers)
1423 object_headers *headers ATTRIBUTE_UNUSED;
1424 {
1425 printf (_("call to tc_crawl_symbol_chain \n"));
1426 }
1427 #endif
1428
1429 symbolS *
1430 md_undefined_symbol (name)
1431 char *name ATTRIBUTE_UNUSED;
1432 {
1433 return 0;
1434 }
1435
1436 #ifndef BFD_ASSEMBLER
1437 void
1438 tc_headers_hook (headers)
1439 object_headers *headers ATTRIBUTE_UNUSED;
1440 {
1441 printf (_("call to tc_headers_hook \n"));
1442 }
1443 #endif
1444
1445 /* Various routines to kill one day */
1446 /* Equal to MAX_PRECISION in atof-ieee.c */
1447 #define MAX_LITTLENUMS 6
1448
1449 /* Turn a string in input_line_pointer into a floating point constant
1450 of type TYPE, and store the appropriate bytes in *LITP. The number
1451 of LITTLENUMS emitted is stored in *SIZEP. An error message is
1452 returned, or NULL on OK. */
1453
1454 char *
1455 md_atof (type, litP, sizeP)
1456 char type;
1457 char *litP;
1458 int *sizeP;
1459 {
1460 int prec;
1461 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1462 LITTLENUM_TYPE *wordP;
1463 char *t;
1464
1465 switch (type)
1466 {
1467 case 'f':
1468 case 'F':
1469 case 's':
1470 case 'S':
1471 prec = 2;
1472 break;
1473
1474 case 'd':
1475 case 'D':
1476 case 'r':
1477 case 'R':
1478 prec = 4;
1479 break;
1480
1481 case 'x':
1482 case 'X':
1483 prec = 6;
1484 break;
1485
1486 case 'p':
1487 case 'P':
1488 prec = 6;
1489 break;
1490
1491 default:
1492 *sizeP = 0;
1493 return _("Bad call to MD_ATOF()");
1494 }
1495 t = atof_ieee (input_line_pointer, type, words);
1496 if (t)
1497 input_line_pointer = t;
1498
1499 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1500 for (wordP = words; prec--;)
1501 {
1502 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
1503 litP += sizeof (LITTLENUM_TYPE);
1504 }
1505 return 0;
1506 }
1507 \f
1508 const char *md_shortopts = "";
1509 struct option md_longopts[] = {
1510 {NULL, no_argument, NULL, 0}
1511 };
1512
1513 size_t md_longopts_size = sizeof (md_longopts);
1514
1515 int
1516 md_parse_option (c, arg)
1517 int c ATTRIBUTE_UNUSED;
1518 char *arg ATTRIBUTE_UNUSED;
1519 {
1520 return 0;
1521 }
1522
1523 void
1524 md_show_usage (stream)
1525 FILE *stream ATTRIBUTE_UNUSED;
1526 {
1527 }
1528 \f
1529 void tc_aout_fix_to_chars PARAMS ((void));
1530
1531 void
1532 tc_aout_fix_to_chars ()
1533 {
1534 printf (_("call to tc_aout_fix_to_chars \n"));
1535 abort ();
1536 }
1537
1538 void
1539 md_convert_frag (headers, seg, fragP)
1540 #ifdef BFD_ASSEMBLER
1541 bfd *headers ATTRIBUTE_UNUSED;
1542 #else
1543 object_headers *headers ATTRIBUTE_UNUSED;
1544 #endif
1545 segT seg ATTRIBUTE_UNUSED;
1546 fragS *fragP ATTRIBUTE_UNUSED;
1547 {
1548 printf (_("call to md_convert_frag \n"));
1549 abort ();
1550 }
1551
1552 #ifdef BFD_ASSEMBLER
1553 valueT
1554 md_section_align (segment, size)
1555 segT segment;
1556 valueT size;
1557 {
1558 int align = bfd_get_section_alignment (stdoutput, segment);
1559 return ((size + (1 << align) - 1) & (-1 << align));
1560 }
1561 #else
1562 valueT
1563 md_section_align (seg, size)
1564 segT seg;
1565 valueT size;
1566 {
1567 return ((size + (1 << section_alignment[(int) seg]) - 1)
1568 & (-1 << section_alignment[(int) seg]));
1569 }
1570 #endif
1571
1572
1573 void
1574 md_apply_fix3 (fixP, valP, seg)
1575 fixS *fixP;
1576 valueT *valP;
1577 segT seg ATTRIBUTE_UNUSED;
1578 {
1579 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
1580 long val = *valP;
1581
1582 switch (fixP->fx_size)
1583 {
1584 case 1:
1585 *buf++ = val;
1586 break;
1587 case 2:
1588 *buf++ = (val >> 8);
1589 *buf++ = val;
1590 break;
1591 case 4:
1592 *buf++ = (val >> 24);
1593 *buf++ = (val >> 16);
1594 *buf++ = (val >> 8);
1595 *buf++ = val;
1596 break;
1597 default:
1598 abort ();
1599 }
1600
1601 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
1602 fixP->fx_done = 1;
1603 }
1604
1605 int
1606 md_estimate_size_before_relax (fragP, segment_type)
1607 register fragS *fragP ATTRIBUTE_UNUSED;
1608 register segT segment_type ATTRIBUTE_UNUSED;
1609 {
1610 printf (_("call tomd_estimate_size_before_relax \n"));
1611 abort ();
1612 }
1613
1614 /* Put number into target byte order. */
1615 void
1616 md_number_to_chars (ptr, use, nbytes)
1617 char *ptr;
1618 valueT use;
1619 int nbytes;
1620 {
1621 number_to_chars_bigendian (ptr, use, nbytes);
1622 }
1623
1624 long
1625 md_pcrel_from (fixP)
1626 fixS *fixP ATTRIBUTE_UNUSED;
1627 {
1628 abort ();
1629 }
1630
1631 #ifndef BFD_ASSEMBLER
1632 void
1633 tc_reloc_mangle (fix_ptr, intr, base)
1634 fixS *fix_ptr;
1635 struct internal_reloc *intr;
1636 bfd_vma base;
1637
1638 {
1639 symbolS *symbol_ptr;
1640
1641 symbol_ptr = fix_ptr->fx_addsy;
1642
1643 /* If this relocation is attached to a symbol then it's ok
1644 to output it. */
1645 if (fix_ptr->fx_r_type == TC_CONS_RELOC)
1646 {
1647 /* cons likes to create reloc32's whatever the size of the reloc..
1648 */
1649 switch (fix_ptr->fx_size)
1650 {
1651 case 4:
1652 intr->r_type = R_RELLONG;
1653 break;
1654 case 2:
1655 intr->r_type = R_RELWORD;
1656 break;
1657 case 1:
1658 intr->r_type = R_RELBYTE;
1659 break;
1660 default:
1661 abort ();
1662 }
1663 }
1664 else
1665 {
1666 intr->r_type = fix_ptr->fx_r_type;
1667 }
1668
1669 intr->r_vaddr = fix_ptr->fx_frag->fr_address + fix_ptr->fx_where + base;
1670 intr->r_offset = fix_ptr->fx_offset;
1671
1672 if (symbol_ptr)
1673 {
1674 if (symbol_ptr->sy_number != -1)
1675 intr->r_symndx = symbol_ptr->sy_number;
1676 else
1677 {
1678 symbolS *segsym;
1679
1680 /* This case arises when a reference is made to `.'. */
1681 segsym = seg_info (S_GET_SEGMENT (symbol_ptr))->dot;
1682 if (segsym == NULL)
1683 intr->r_symndx = -1;
1684 else
1685 {
1686 intr->r_symndx = segsym->sy_number;
1687 intr->r_offset += S_GET_VALUE (symbol_ptr);
1688 }
1689 }
1690 }
1691 else
1692 intr->r_symndx = -1;
1693 }
1694 #else /* BFD_ASSEMBLER */
1695 arelent *
1696 tc_gen_reloc (section, fixp)
1697 asection *section ATTRIBUTE_UNUSED;
1698 fixS *fixp;
1699 {
1700 arelent *rel;
1701 bfd_reloc_code_real_type r_type;
1702
1703 if (fixp->fx_addsy && fixp->fx_subsy)
1704 {
1705 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1706 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1707 {
1708 as_bad_where (fixp->fx_file, fixp->fx_line,
1709 "Difference of symbols in different sections is not supported");
1710 return NULL;
1711 }
1712 }
1713
1714 rel = (arelent *) xmalloc (sizeof (arelent));
1715 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1716 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1717 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
1718 rel->addend = fixp->fx_offset;
1719
1720 r_type = fixp->fx_r_type;
1721
1722 #define DEBUG 0
1723 #if DEBUG
1724 fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
1725 fflush(stderr);
1726 #endif
1727 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
1728 if (rel->howto == NULL)
1729 {
1730 as_bad_where (fixp->fx_file, fixp->fx_line,
1731 _("Cannot represent relocation type %s"),
1732 bfd_get_reloc_code_name (r_type));
1733 return NULL;
1734 }
1735
1736 return rel;
1737 }
1738 #endif
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