1 /* tc-h8300.c -- Assemble code for the Renesas H8/300
2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* Written By Steve Chamberlain <sac@cygnus.com>. */
30 #include "dwarf2dbg.h"
34 #define h8_opcodes ops
35 #include "opcode/h8300.h"
36 #include "safe-ctype.h"
42 const char comment_chars
[] = ";";
43 const char line_comment_chars
[] = "#";
44 const char line_separator_chars
[] = "";
48 void h8300hmode (int);
49 void h8300smode (int);
50 void h8300hnmode (int);
51 void h8300snmode (int);
52 void h8300sxmode (int);
53 void h8300sxnmode (int);
54 static void pint (int);
61 #define PSIZE (Hmode && !Nmode ? L_32 : L_16)
63 int bsize
= L_8
; /* Default branch displacement. */
71 const struct h8_opcode
*opcode
;
74 struct h8_instruction
*h8_instructions
;
77 h8300hmode (int arg ATTRIBUTE_UNUSED
)
82 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300h
))
83 as_warn (_("could not set architecture and machine"));
88 h8300smode (int arg ATTRIBUTE_UNUSED
)
93 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300s
))
94 as_warn (_("could not set architecture and machine"));
99 h8300hnmode (int arg ATTRIBUTE_UNUSED
)
105 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300hn
))
106 as_warn (_("could not set architecture and machine"));
111 h8300snmode (int arg ATTRIBUTE_UNUSED
)
117 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sn
))
118 as_warn (_("could not set architecture and machine"));
123 h8300sxmode (int arg ATTRIBUTE_UNUSED
)
129 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sx
))
130 as_warn (_("could not set architecture and machine"));
135 h8300sxnmode (int arg ATTRIBUTE_UNUSED
)
142 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sxn
))
143 as_warn (_("could not set architecture and machine"));
154 pint (int arg ATTRIBUTE_UNUSED
)
156 cons (Hmode
? 4 : 2);
159 /* This table describes all the machine specific pseudo-ops the assembler
160 has to support. The fields are:
161 pseudo-op name without dot
162 function to call to execute this pseudo-op
163 Integer arg to pass to the function. */
165 const pseudo_typeS md_pseudo_table
[] =
167 {"h8300h", h8300hmode
, 0},
168 {"h8300hn", h8300hnmode
, 0},
169 {"h8300s", h8300smode
, 0},
170 {"h8300sn", h8300snmode
, 0},
171 {"h8300sx", h8300sxmode
, 0},
172 {"h8300sxn", h8300sxnmode
, 0},
173 {"sbranch", sbranch
, L_8
},
174 {"lbranch", sbranch
, L_16
},
180 {"form", listing_psize
, 0},
181 {"heading", listing_title
, 0},
182 {"import", s_ignore
, 0},
183 {"page", listing_eject
, 0},
184 {"program", s_ignore
, 0},
188 const int md_reloc_size
;
190 const char EXP_CHARS
[] = "eE";
192 /* Chars that mean this number is a floating point constant
195 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
197 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics. */
199 /* This function is called once, at assembler startup time. This
200 should set up all the tables, etc. that the MD part of the assembler
206 unsigned int nopcodes
;
207 struct h8_opcode
*p
, *p1
;
208 struct h8_instruction
*pi
;
209 char prev_buffer
[100];
213 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300
))
214 as_warn (_("could not set architecture and machine"));
217 opcode_hash_control
= hash_new ();
220 nopcodes
= sizeof (h8_opcodes
) / sizeof (struct h8_opcode
);
222 h8_instructions
= (struct h8_instruction
*)
223 xmalloc (nopcodes
* sizeof (struct h8_instruction
));
225 pi
= h8_instructions
;
227 /* We do a minimum amount of sorting on the opcode table; this is to
228 make it easy to describe the mova instructions without unnecessary
230 Sorting only takes place inside blocks of instructions of the form
231 X/Y, so for example mova/b, mova/w and mova/l can be intermixed. */
234 struct h8_opcode
*first_skipped
= 0;
236 char *src
= p1
->name
;
241 /* Strip off any . part when inserting the opcode and only enter
242 unique codes into the hash table. */
243 dst
= buffer
= malloc (strlen (src
) + 1);
252 cmplen
= src
- p1
->name
+ 1;
259 hash_insert (opcode_hash_control
, buffer
, (char *) pi
);
260 strcpy (prev_buffer
, buffer
);
263 for (p
= p1
; p
->name
; p
++)
265 /* A negative TIME is used to indicate that we've added this opcode
269 if (strncmp (p
->name
, buffer
, cmplen
) != 0
270 || (p
->name
[cmplen
] != '\0' && p
->name
[cmplen
] != '.'
271 && p
->name
[cmplen
- 1] != '/'))
273 if (first_skipped
== 0)
277 if (strncmp (p
->name
, buffer
, len
) != 0)
279 if (first_skipped
== 0)
285 pi
->size
= p
->name
[len
] == '.' ? p
->name
[len
+ 1] : 0;
288 /* Find the number of operands. */
290 while (pi
->noperands
< 3 && p
->args
.nib
[pi
->noperands
] != (op_type
) E
)
293 /* Find the length of the opcode in bytes. */
295 while (p
->data
.nib
[pi
->length
* 2] != (op_type
) E
)
304 /* Add entry for the NULL vector terminator. */
328 static void clever_message (const struct h8_instruction
*, struct h8_op
*);
329 static void fix_operand_size (struct h8_op
*, int);
330 static void build_bytes (const struct h8_instruction
*, struct h8_op
*);
331 static void do_a_fix_imm (int, int, struct h8_op
*, int);
332 static void check_operand (struct h8_op
*, unsigned int, char *);
333 static const struct h8_instruction
* get_specific (const struct h8_instruction
*, struct h8_op
*, int) ;
334 static char *get_operands (unsigned, char *, struct h8_op
*);
335 static void get_operand (char **, struct h8_op
*, int);
336 static int parse_reg (char *, op_type
*, unsigned *, int);
337 static char *skip_colonthing (char *, int *);
338 static char *parse_exp (char *, struct h8_op
*);
340 static int constant_fits_width_p (struct h8_op
*, unsigned int);
341 static int constant_fits_size_p (struct h8_op
*, int, int);
345 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
354 /* Try to parse a reg name. Return the number of chars consumed. */
357 parse_reg (char *src
, op_type
*mode
, unsigned int *reg
, int direction
)
362 /* Cribbed from get_symbol_end. */
363 if (!is_name_beginner (*src
) || *src
== '\001')
366 while ((is_part_of_name (*end
) && *end
!= '.') || *end
== '\001')
370 if (len
== 2 && TOLOWER (src
[0]) == 's' && TOLOWER (src
[1]) == 'p')
372 *mode
= PSIZE
| REG
| direction
;
377 TOLOWER (src
[0]) == 'c' &&
378 TOLOWER (src
[1]) == 'c' &&
379 TOLOWER (src
[2]) == 'r')
386 TOLOWER (src
[0]) == 'e' &&
387 TOLOWER (src
[1]) == 'x' &&
388 TOLOWER (src
[2]) == 'r')
395 TOLOWER (src
[0]) == 'v' &&
396 TOLOWER (src
[1]) == 'b' &&
397 TOLOWER (src
[2]) == 'r')
404 TOLOWER (src
[0]) == 's' &&
405 TOLOWER (src
[1]) == 'b' &&
406 TOLOWER (src
[2]) == 'r')
412 if (len
== 2 && TOLOWER (src
[0]) == 'f' && TOLOWER (src
[1]) == 'p')
414 *mode
= PSIZE
| REG
| direction
;
418 if (len
== 3 && TOLOWER (src
[0]) == 'e' && TOLOWER (src
[1]) == 'r' &&
419 src
[2] >= '0' && src
[2] <= '7')
421 *mode
= L_32
| REG
| direction
;
424 as_warn (_("Reg not valid for H8/300"));
427 if (len
== 2 && TOLOWER (src
[0]) == 'e' && src
[1] >= '0' && src
[1] <= '7')
429 *mode
= L_16
| REG
| direction
;
430 *reg
= src
[1] - '0' + 8;
432 as_warn (_("Reg not valid for H8/300"));
436 if (TOLOWER (src
[0]) == 'r')
438 if (src
[1] >= '0' && src
[1] <= '7')
440 if (len
== 3 && TOLOWER (src
[2]) == 'l')
442 *mode
= L_8
| REG
| direction
;
443 *reg
= (src
[1] - '0') + 8;
446 if (len
== 3 && TOLOWER (src
[2]) == 'h')
448 *mode
= L_8
| REG
| direction
;
449 *reg
= (src
[1] - '0');
454 *mode
= L_16
| REG
| direction
;
455 *reg
= (src
[1] - '0');
465 /* Parse an immediate or address-related constant and store it in OP.
466 If the user also specifies the operand's size, store that size
467 in OP->MODE, otherwise leave it for later code to decide. */
470 parse_exp (char *src
, struct h8_op
*op
)
474 save
= input_line_pointer
;
475 input_line_pointer
= src
;
476 expression (&op
->exp
);
477 if (op
->exp
.X_op
== O_absent
)
478 as_bad (_("missing operand"));
479 src
= input_line_pointer
;
480 input_line_pointer
= save
;
482 return skip_colonthing (src
, &op
->mode
);
486 /* If SRC starts with an explicit operand size, skip it and store the size
487 in *MODE. Leave *MODE unchanged otherwise. */
490 skip_colonthing (char *src
, int *mode
)
496 if (src
[0] == '8' && !ISDIGIT (src
[1]))
498 else if (src
[0] == '2' && !ISDIGIT (src
[1]))
500 else if (src
[0] == '3' && !ISDIGIT (src
[1]))
502 else if (src
[0] == '4' && !ISDIGIT (src
[1]))
504 else if (src
[0] == '5' && !ISDIGIT (src
[1]))
506 else if (src
[0] == '2' && src
[1] == '4' && !ISDIGIT (src
[2]))
508 else if (src
[0] == '3' && src
[1] == '2' && !ISDIGIT (src
[2]))
510 else if (src
[0] == '1' && src
[1] == '6' && !ISDIGIT (src
[2]))
513 as_bad (_("invalid operand size requested"));
515 while (ISDIGIT (*src
))
521 /* The many forms of operand:
524 @Rn Register indirect
525 @(exp[:16], Rn) Register indirect with displacement
529 @aa:16 absolute 16 bit
532 #xx[:size] immediate data
533 @(exp:[8], pc) pc rel
534 @@aa[:8] memory indirect. */
537 constant_fits_width_p (struct h8_op
*operand
, unsigned int width
)
539 return ((operand
->exp
.X_add_number
& ~width
) == 0
540 || (operand
->exp
.X_add_number
| width
) == (unsigned)(~0));
544 constant_fits_size_p (struct h8_op
*operand
, int size
, int no_symbols
)
546 offsetT num
= operand
->exp
.X_add_number
;
548 && (operand
->exp
.X_add_symbol
!= 0 || operand
->exp
.X_op_symbol
!= 0))
553 return (num
& ~3) == 0;
555 return (num
& ~7) == 0;
557 return num
>= 1 && num
< 8;
559 return (num
& ~15) == 0;
561 return num
>= 1 && num
< 32;
563 return (num
& ~0xFF) == 0 || ((unsigned)num
| 0x7F) == ~0u;
565 return (num
& ~0xFF) == 0;
567 return (num
& ~0xFFFF) == 0 || ((unsigned)num
| 0x7FFF) == ~0u;
569 return (num
& ~0xFFFF) == 0;
578 get_operand (char **ptr
, struct h8_op
*op
, int direction
)
587 /* Check for '(' and ')' for instructions ldm and stm. */
588 if (src
[0] == '(' && src
[8] == ')')
591 /* Gross. Gross. ldm and stm have a format not easily handled
592 by get_operand. We deal with it explicitly here. */
593 if (TOLOWER (src
[0]) == 'e' && TOLOWER (src
[1]) == 'r' &&
594 ISDIGIT (src
[2]) && src
[3] == '-' &&
595 TOLOWER (src
[4]) == 'e' && TOLOWER (src
[5]) == 'r' && ISDIGIT (src
[6]))
603 as_bad (_("Invalid register list for ldm/stm\n"));
606 as_bad (_("Invalid register list for ldm/stm\n"));
609 as_bad (_("Invalid register list for ldm/stm)\n"));
611 /* Even sicker. We encode two registers into op->reg. One
612 for the low register to save, the other for the high
613 register to save; we also set the high bit in op->reg
614 so we know this is "very special". */
615 op
->reg
= 0x80000000 | (high
<< 8) | low
;
624 len
= parse_reg (src
, &op
->mode
, &op
->reg
, direction
);
630 int size
= op
->mode
& SIZE
;
635 as_warn (_("mismatch between register and suffix"));
636 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
639 if (size
!= L_32
&& size
!= L_16
)
640 as_warn (_("mismatch between register and suffix"));
641 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
642 op
->mode
= (op
->mode
& ~SIZE
) | L_16
;
645 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
646 if (size
!= L_32
&& size
!= L_8
)
647 as_warn (_("mismatch between register and suffix"));
648 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
649 op
->mode
= (op
->mode
& ~SIZE
) | L_8
;
652 as_warn ("invalid suffix after register.");
666 *ptr
= parse_exp (src
+ 1, op
);
667 if (op
->exp
.X_add_number
>= 0x100)
672 /* FIXME : 2? or 4? */
673 if (op
->exp
.X_add_number
>= 0x400)
674 as_bad (_("address too high for vector table jmp/jsr"));
675 else if (op
->exp
.X_add_number
>= 0x200)
680 op
->exp
.X_add_number
= op
->exp
.X_add_number
/ divisor
- 0x80;
687 if (*src
== '-' || *src
== '+')
689 len
= parse_reg (src
+ 1, &mode
, &num
, direction
);
692 /* Oops, not a reg after all, must be ordinary exp. */
693 op
->mode
= ABS
| direction
;
694 *ptr
= parse_exp (src
, op
);
698 if (((mode
& SIZE
) != PSIZE
)
699 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
700 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
701 as_bad (_("Wrong size pointer register for architecture."));
703 op
->mode
= src
[0] == '-' ? RDPREDEC
: RDPREINC
;
705 *ptr
= src
+ 1 + len
;
712 /* See if this is @(ERn.x, PC). */
713 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
714 if (len
!= 0 && (mode
& MODE
) == REG
&& src
[len
] == '.')
716 switch (TOLOWER (src
[len
+ 1]))
719 mode
= PCIDXB
| direction
;
722 mode
= PCIDXW
| direction
;
725 mode
= PCIDXL
| direction
;
732 && src
[len
+ 2] == ','
733 && TOLOWER (src
[len
+ 3]) != 'p'
734 && TOLOWER (src
[len
+ 4]) != 'c'
735 && src
[len
+ 5] != ')')
737 *ptr
= src
+ len
+ 6;
741 /* Fall through into disp case - the grammar is somewhat
742 ambiguous, so we should try whether it's a DISP operand
743 after all ("ER3.L" might be a poorly named label...). */
748 /* Start off assuming a 16 bit offset. */
750 src
= parse_exp (src
, op
);
753 op
->mode
|= ABS
| direction
;
760 as_bad (_("expected @(exp, reg16)"));
765 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
766 if (len
== 0 || (mode
& MODE
) != REG
)
768 as_bad (_("expected @(exp, reg16)"));
774 switch (TOLOWER (src
[1]))
777 op
->mode
|= INDEXB
| direction
;
780 op
->mode
|= INDEXW
| direction
;
783 op
->mode
|= INDEXL
| direction
;
786 as_bad (_("expected .L, .W or .B for register in indexed addressing mode"));
792 op
->mode
|= DISP
| direction
;
793 src
= skip_colonthing (src
, &op
->mode
);
795 if (*src
!= ')' && '(')
797 as_bad (_("expected @(exp, reg16)"));
803 len
= parse_reg (src
, &mode
, &num
, direction
);
808 if (*src
== '+' || *src
== '-')
810 if (((mode
& SIZE
) != PSIZE
)
811 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
812 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
813 as_bad (_("Wrong size pointer register for architecture."));
814 op
->mode
= *src
== '+' ? RSPOSTINC
: RSPOSTDEC
;
820 if (((mode
& SIZE
) != PSIZE
)
821 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
822 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
823 as_bad (_("Wrong size pointer register for architecture."));
825 op
->mode
= direction
| IND
| PSIZE
;
833 /* must be a symbol */
835 op
->mode
= ABS
| direction
;
836 *ptr
= parse_exp (src
, op
);
844 *ptr
= parse_exp (src
+ 1, op
);
847 else if (strncmp (src
, "mach", 4) == 0 ||
848 strncmp (src
, "macl", 4) == 0 ||
849 strncmp (src
, "MACH", 4) == 0 ||
850 strncmp (src
, "MACL", 4) == 0)
852 op
->reg
= TOLOWER (src
[3]) == 'l';
860 *ptr
= parse_exp (src
, op
);
865 get_operands (unsigned int noperands
, char *op_end
, struct h8_op
*operand
)
876 get_operand (&ptr
, operand
+ 0, SRC
);
880 get_operand (&ptr
, operand
+ 1, DST
);
886 get_operand (&ptr
, operand
+ 0, SRC
);
889 get_operand (&ptr
, operand
+ 1, DST
);
894 get_operand (&ptr
, operand
+ 0, SRC
);
897 get_operand (&ptr
, operand
+ 1, DST
);
900 get_operand (&ptr
, operand
+ 2, OP3
);
910 /* MOVA has special requirements. Rather than adding twice the amount of
911 addressing modes, we simply special case it a bit. */
913 get_mova_operands (char *op_end
, struct h8_op
*operand
)
917 if (ptr
[1] != '@' || ptr
[2] != '(')
921 ptr
= parse_exp (ptr
, &operand
[0]);
926 get_operand (&ptr
, operand
+ 1, DST
);
934 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXB
;
937 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXW
;
940 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXL
;
946 else if ((operand
[1].mode
& MODE
) == LOWREG
)
948 switch (operand
[1].mode
& SIZE
)
951 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXB
;
954 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXW
;
957 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXL
;
966 if (*ptr
++ != ')' || *ptr
++ != ',')
968 get_operand (&ptr
, operand
+ 2, OP3
);
969 /* See if we can use the short form of MOVA. */
970 if (((operand
[1].mode
& MODE
) == REG
|| (operand
[1].mode
& MODE
) == LOWREG
)
971 && (operand
[2].mode
& MODE
) == REG
972 && (operand
[1].reg
& 7) == (operand
[2].reg
& 7))
974 operand
[1].mode
= operand
[2].mode
= 0;
975 operand
[0].reg
= operand
[2].reg
& 7;
980 as_bad (_("expected valid addressing mode for mova: \"@(disp, ea.sz),ERn\""));
985 get_rtsl_operands (char *ptr
, struct h8_op
*operand
)
987 int mode
, num
, num2
, len
, type
= 0;
995 len
= parse_reg (ptr
, &mode
, &num
, SRC
);
996 if (len
== 0 || (mode
& MODE
) != REG
)
998 as_bad (_("expected register"));
1004 len
= parse_reg (++ptr
, &mode
, &num2
, SRC
);
1005 if (len
== 0 || (mode
& MODE
) != REG
)
1007 as_bad (_("expected register"));
1011 /* CONST_xxx are used as placeholders in the opcode table. */
1013 if (num
< 0 || num
> 3)
1015 as_bad (_("invalid register list"));
1020 num2
= num
, num
= 0;
1021 if (type
== 1 && *ptr
++ != ')')
1023 as_bad (_("expected closing paren"));
1026 operand
[0].mode
= RS32
;
1027 operand
[1].mode
= RD32
;
1028 operand
[0].reg
= num
;
1029 operand
[1].reg
= num2
;
1032 /* Passed a pointer to a list of opcodes which use different
1033 addressing modes, return the opcode which matches the opcodes
1036 static const struct h8_instruction
*
1037 get_specific (const struct h8_instruction
*instruction
,
1038 struct h8_op
*operands
, int size
)
1040 const struct h8_instruction
*this_try
= instruction
;
1041 const struct h8_instruction
*found_other
= 0, *found_mismatched
= 0;
1043 int this_index
= instruction
->idx
;
1046 /* There's only one ldm/stm and it's easier to just
1047 get out quick for them. */
1048 if (OP_KIND (instruction
->opcode
->how
) == O_LDM
1049 || OP_KIND (instruction
->opcode
->how
) == O_STM
)
1052 while (noperands
< 3 && operands
[noperands
].mode
!= 0)
1055 while (this_index
== instruction
->idx
&& !found
)
1060 this_try
= instruction
++;
1061 this_size
= this_try
->opcode
->how
& SN
;
1063 if (this_try
->noperands
!= noperands
)
1065 else if (this_try
->noperands
> 0)
1069 for (i
= 0; i
< this_try
->noperands
&& found
; i
++)
1071 op_type op
= this_try
->opcode
->args
.nib
[i
];
1072 int op_mode
= op
& MODE
;
1073 int op_size
= op
& SIZE
;
1074 int x
= operands
[i
].mode
;
1075 int x_mode
= x
& MODE
;
1076 int x_size
= x
& SIZE
;
1078 if (op_mode
== LOWREG
&& (x_mode
== REG
|| x_mode
== LOWREG
))
1080 if ((x_size
== L_8
&& (operands
[i
].reg
& 8) == 0)
1081 || (x_size
== L_16
&& (operands
[i
].reg
& 8) == 8))
1082 as_warn (_("can't use high part of register in operand %d"), i
);
1084 if (x_size
!= op_size
)
1087 else if (op_mode
== REG
)
1089 if (x_mode
== LOWREG
)
1095 x_size
= (Hmode
? L_32
: L_16
);
1097 op_size
= (Hmode
? L_32
: L_16
);
1099 /* The size of the reg is v important. */
1100 if (op_size
!= x_size
)
1103 else if (op_mode
& CTRL
) /* control register */
1105 if (!(x_mode
& CTRL
))
1111 if (op_mode
!= CCR
&&
1112 op_mode
!= CCR_EXR
&&
1113 op_mode
!= CC_EX_VB_SB
)
1117 if (op_mode
!= EXR
&&
1118 op_mode
!= CCR_EXR
&&
1119 op_mode
!= CC_EX_VB_SB
)
1123 if (op_mode
!= MACH
&&
1128 if (op_mode
!= MACL
&&
1133 if (op_mode
!= VBR
&&
1134 op_mode
!= VBR_SBR
&&
1135 op_mode
!= CC_EX_VB_SB
)
1139 if (op_mode
!= SBR
&&
1140 op_mode
!= VBR_SBR
&&
1141 op_mode
!= CC_EX_VB_SB
)
1146 else if ((op
& ABSJMP
) && (x_mode
== ABS
|| x_mode
== PCREL
))
1148 operands
[i
].mode
&= ~MODE
;
1149 operands
[i
].mode
|= ABSJMP
;
1150 /* But it may not be 24 bits long. */
1151 if (x_mode
== ABS
&& !Hmode
)
1153 operands
[i
].mode
&= ~SIZE
;
1154 operands
[i
].mode
|= L_16
;
1156 if ((operands
[i
].mode
& SIZE
) == L_32
1157 && (op_mode
& SIZE
) != L_32
)
1160 else if (x_mode
== IMM
&& op_mode
!= IMM
)
1162 offsetT num
= operands
[i
].exp
.X_add_number
;
1163 if (op_mode
== KBIT
|| op_mode
== DBIT
)
1164 /* This is ok if the immediate value is sensible. */;
1165 else if (op_mode
== CONST_2
)
1167 else if (op_mode
== CONST_4
)
1169 else if (op_mode
== CONST_8
)
1171 else if (op_mode
== CONST_16
)
1176 else if (op_mode
== PCREL
&& op_mode
== x_mode
)
1178 /* movsd, bsr/bc and bsr/bs only come in PCREL16 flavour:
1179 If x_size is L_8, promote it. */
1180 if (OP_KIND (this_try
->opcode
->how
) == O_MOVSD
1181 || OP_KIND (this_try
->opcode
->how
) == O_BSRBC
1182 || OP_KIND (this_try
->opcode
->how
) == O_BSRBS
)
1186 /* The size of the displacement is important. */
1187 if (op_size
!= x_size
)
1190 else if ((op_mode
== DISP
|| op_mode
== IMM
|| op_mode
== ABS
1191 || op_mode
== INDEXB
|| op_mode
== INDEXW
1192 || op_mode
== INDEXL
)
1193 && op_mode
== x_mode
)
1195 /* Promote a L_24 to L_32 if it makes us match. */
1196 if (x_size
== L_24
&& op_size
== L_32
)
1203 /* Promote an L8 to L_16 if it makes us match. */
1204 if ((op_mode
== ABS
|| op_mode
== DISP
) && x_size
== L_8
)
1206 if (op_size
== L_16
)
1211 if (((x_size
== L_16
&& op_size
== L_16U
)
1212 || (x_size
== L_8
&& op_size
== L_8U
)
1213 || (x_size
== L_3
&& op_size
== L_3NZ
))
1214 /* We're deliberately more permissive for ABS modes. */
1216 || constant_fits_size_p (operands
+ i
, op_size
,
1220 if (x_size
!= 0 && op_size
!= x_size
)
1222 else if (x_size
== 0
1223 && ! constant_fits_size_p (operands
+ i
, op_size
,
1227 else if (op_mode
!= x_mode
)
1235 if ((this_try
->opcode
->available
== AV_H8SX
&& ! SXmode
)
1236 || (this_try
->opcode
->available
== AV_H8S
&& ! Smode
)
1237 || (this_try
->opcode
->available
== AV_H8H
&& ! Hmode
))
1238 found
= 0, found_other
= this_try
;
1239 else if (this_size
!= size
&& (this_size
!= SN
&& size
!= SN
))
1240 found_mismatched
= this_try
, found
= 0;
1248 as_warn (_("Opcode `%s' with these operand types not available in %s mode"),
1249 found_other
->opcode
->name
,
1250 (! Hmode
&& ! Smode
? "H8/300"
1255 else if (found_mismatched
)
1257 as_warn (_("mismatch between opcode size and operand size"));
1258 return found_mismatched
;
1264 check_operand (struct h8_op
*operand
, unsigned int width
, char *string
)
1266 if (operand
->exp
.X_add_symbol
== 0
1267 && operand
->exp
.X_op_symbol
== 0)
1269 /* No symbol involved, let's look at offset, it's dangerous if
1270 any of the high bits are not 0 or ff's, find out by oring or
1271 anding with the width and seeing if the answer is 0 or all
1274 if (! constant_fits_width_p (operand
, width
))
1277 && (operand
->exp
.X_add_number
& 0xff00) == 0xff00)
1279 /* Just ignore this one - which happens when trying to
1280 fit a 16 bit address truncated into an 8 bit address
1281 of something like bset. */
1283 else if (strcmp (string
, "@") == 0
1285 && (operand
->exp
.X_add_number
& 0xff8000) == 0xff8000)
1287 /* Just ignore this one - which happens when trying to
1288 fit a 24 bit address truncated into a 16 bit address
1289 of something like mov.w. */
1293 as_warn (_("operand %s0x%lx out of range."), string
,
1294 (unsigned long) operand
->exp
.X_add_number
);
1300 /* RELAXMODE has one of 3 values:
1302 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
1304 1 Output a relaxable 24bit absolute mov.w address relocation
1305 (may relax into a 16bit absolute address).
1307 2 Output a relaxable 16/24 absolute mov.b address relocation
1308 (may relax into an 8bit absolute address). */
1311 do_a_fix_imm (int offset
, int nibble
, struct h8_op
*operand
, int relaxmode
)
1316 char *bytes
= frag_now
->fr_literal
+ offset
;
1318 char *t
= ((operand
->mode
& MODE
) == IMM
) ? "#" : "@";
1320 if (operand
->exp
.X_add_symbol
== 0)
1322 switch (operand
->mode
& SIZE
)
1325 check_operand (operand
, 0x3, t
);
1326 bytes
[0] |= (operand
->exp
.X_add_number
& 3) << (nibble
? 0 : 4);
1330 check_operand (operand
, 0x7, t
);
1331 bytes
[0] |= (operand
->exp
.X_add_number
& 7) << (nibble
? 0 : 4);
1334 check_operand (operand
, 0xF, t
);
1335 bytes
[0] |= (operand
->exp
.X_add_number
& 15) << (nibble
? 0 : 4);
1338 check_operand (operand
, 0x1F, t
);
1339 bytes
[0] |= operand
->exp
.X_add_number
& 31;
1343 check_operand (operand
, 0xff, t
);
1344 bytes
[0] |= operand
->exp
.X_add_number
;
1348 check_operand (operand
, 0xffff, t
);
1349 bytes
[0] |= operand
->exp
.X_add_number
>> 8;
1350 bytes
[1] |= operand
->exp
.X_add_number
>> 0;
1353 check_operand (operand
, 0xffffff, t
);
1354 bytes
[0] |= operand
->exp
.X_add_number
>> 16;
1355 bytes
[1] |= operand
->exp
.X_add_number
>> 8;
1356 bytes
[2] |= operand
->exp
.X_add_number
>> 0;
1360 /* This should be done with bfd. */
1361 bytes
[0] |= operand
->exp
.X_add_number
>> 24;
1362 bytes
[1] |= operand
->exp
.X_add_number
>> 16;
1363 bytes
[2] |= operand
->exp
.X_add_number
>> 8;
1364 bytes
[3] |= operand
->exp
.X_add_number
>> 0;
1367 idx
= (relaxmode
== 2) ? R_MOV24B1
: R_MOVL1
;
1368 fix_new_exp (frag_now
, offset
, 4, &operand
->exp
, 0, idx
);
1375 switch (operand
->mode
& SIZE
)
1380 where
= (operand
->mode
& SIZE
) == L_24
? -1 : 0;
1383 else if (relaxmode
== 1)
1389 as_bad (_("Can't work out size of operand.\n"));
1398 operand
->exp
.X_add_number
=
1399 ((operand
->exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1400 operand
->exp
.X_add_number
|= (bytes
[0] << 8) | bytes
[1];
1406 operand
->exp
.X_add_number
=
1407 ((operand
->exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1408 operand
->exp
.X_add_number
|= bytes
[0];
1411 fix_new_exp (frag_now
,
1420 /* Now we know what sort of opcodes it is, let's build the bytes. */
1423 build_bytes (const struct h8_instruction
*this_try
, struct h8_op
*operand
)
1426 char *output
= frag_more (this_try
->length
);
1427 op_type
*nibble_ptr
= this_try
->opcode
->data
.nib
;
1429 unsigned int nibble_count
= 0;
1433 char asnibbles
[100];
1434 char *p
= asnibbles
;
1437 if (!Hmode
&& this_try
->opcode
->available
!= AV_H8
)
1438 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1439 this_try
->opcode
->name
);
1441 && this_try
->opcode
->available
!= AV_H8
1442 && this_try
->opcode
->available
!= AV_H8H
)
1443 as_warn (_("Opcode `%s' with these operand types not available in H8/300H mode"),
1444 this_try
->opcode
->name
);
1446 && this_try
->opcode
->available
!= AV_H8
1447 && this_try
->opcode
->available
!= AV_H8H
1448 && this_try
->opcode
->available
!= AV_H8S
)
1449 as_warn (_("Opcode `%s' with these operand types not available in H8/300S mode"),
1450 this_try
->opcode
->name
);
1452 while (*nibble_ptr
!= (op_type
) E
)
1459 d
= (c
& OP3
) == OP3
? 2 : (c
& DST
) == DST
? 1 : 0;
1467 if (c2
== REG
|| c2
== LOWREG
1468 || c2
== IND
|| c2
== PREINC
|| c2
== PREDEC
1469 || c2
== POSTINC
|| c2
== POSTDEC
)
1471 nib
= operand
[d
].reg
;
1476 else if (c
& CTRL
) /* Control reg operand. */
1477 nib
= operand
[d
].reg
;
1479 else if ((c
& DISPREG
) == (DISPREG
))
1481 nib
= operand
[d
].reg
;
1485 operand
[d
].mode
= c
;
1486 op_at
[d
] = nibble_count
;
1489 else if (c2
== IMM
|| c2
== PCREL
|| c2
== ABS
1490 || (c
& ABSJMP
) || c2
== DISP
)
1492 operand
[d
].mode
= c
;
1493 op_at
[d
] = nibble_count
;
1496 else if ((c
& IGNORE
) || (c
& DATA
))
1499 else if (c2
== DBIT
)
1501 switch (operand
[0].exp
.X_add_number
)
1510 as_bad (_("Need #1 or #2 here"));
1513 else if (c2
== KBIT
)
1515 switch (operand
[0].exp
.X_add_number
)
1525 as_warn (_("#4 not valid on H8/300."));
1530 as_bad (_("Need #1 or #2 here"));
1533 /* Stop it making a fix. */
1534 operand
[0].mode
= 0;
1538 operand
[d
].mode
|= MEMRELAX
;
1554 if (operand
[0].mode
== MACREG
)
1555 /* stmac has mac[hl] as the first operand. */
1556 nib
= 2 + operand
[0].reg
;
1558 /* ldmac has mac[hl] as the second operand. */
1559 nib
= 2 + operand
[1].reg
;
1567 /* Disgusting. Why, oh why didn't someone ask us for advice
1568 on the assembler format. */
1569 if (OP_KIND (this_try
->opcode
->how
) == O_LDM
)
1571 high
= (operand
[1].reg
>> 8) & 0xf;
1572 low
= (operand
[1].reg
) & 0xf;
1573 asnibbles
[2] = high
- low
;
1574 asnibbles
[7] = high
;
1576 else if (OP_KIND (this_try
->opcode
->how
) == O_STM
)
1578 high
= (operand
[0].reg
>> 8) & 0xf;
1579 low
= (operand
[0].reg
) & 0xf;
1580 asnibbles
[2] = high
- low
;
1584 for (i
= 0; i
< this_try
->length
; i
++)
1585 output
[i
] = (asnibbles
[i
* 2] << 4) | asnibbles
[i
* 2 + 1];
1587 /* Note if this is a movb instruction -- there's a special relaxation
1588 which only applies to them. */
1589 if (this_try
->opcode
->how
== O (O_MOV
, SB
))
1592 /* Output any fixes. */
1593 for (i
= 0; i
< this_try
->noperands
; i
++)
1595 int x
= operand
[i
].mode
;
1596 int x_mode
= x
& MODE
;
1598 if (x_mode
== IMM
|| x_mode
== DISP
)
1599 do_a_fix_imm (output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1600 op_at
[i
] & 1, operand
+ i
, (x
& MEMRELAX
) != 0);
1602 else if (x_mode
== ABS
)
1603 do_a_fix_imm (output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1604 op_at
[i
] & 1, operand
+ i
,
1605 (x
& MEMRELAX
) ? movb
+ 1 : 0);
1607 else if (x_mode
== PCREL
)
1609 int size16
= (x
& SIZE
) == L_16
;
1610 int size
= size16
? 2 : 1;
1611 int type
= size16
? R_PCRWORD
: R_PCRBYTE
;
1614 check_operand (operand
+ i
, size16
? 0x7fff : 0x7f, "@");
1616 if (operand
[i
].exp
.X_add_number
& 1)
1617 as_warn (_("branch operand has odd offset (%lx)\n"),
1618 (unsigned long) operand
->exp
.X_add_number
);
1620 /* The COFF port has always been off by one, changing it
1621 now would be an incompatible change, so we leave it as-is.
1623 We don't want to do this for ELF as we want to be
1624 compatible with the proposed ELF format from Hitachi. */
1625 operand
[i
].exp
.X_add_number
-= 1;
1629 operand
[i
].exp
.X_add_number
=
1630 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1634 operand
[i
].exp
.X_add_number
=
1635 ((operand
[i
].exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1640 operand
[i
].exp
.X_add_number
|= output
[op_at
[i
] / 2];
1642 fixP
= fix_new_exp (frag_now
,
1643 output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1648 fixP
->fx_signed
= 1;
1650 else if (x_mode
== MEMIND
)
1652 check_operand (operand
+ i
, 0xff, "@@");
1653 fix_new_exp (frag_now
,
1654 output
- frag_now
->fr_literal
+ 1,
1660 else if (x_mode
== VECIND
)
1662 check_operand (operand
+ i
, 0x7f, "@@");
1663 /* FIXME: approximating the effect of "B31" here...
1664 This is very hackish, and ought to be done a better way. */
1665 operand
[i
].exp
.X_add_number
|= 0x80;
1666 fix_new_exp (frag_now
,
1667 output
- frag_now
->fr_literal
+ 1,
1673 else if (x
& ABSJMP
)
1676 bfd_reloc_code_real_type reloc_type
= R_JMPL1
;
1679 /* To be compatible with the proposed H8 ELF format, we
1680 want the relocation's offset to point to the first byte
1681 that will be modified, not to the start of the instruction. */
1683 if ((operand
->mode
& SIZE
) == L_32
)
1686 reloc_type
= R_RELLONG
;
1692 /* This jmp may be a jump or a branch. */
1694 check_operand (operand
+ i
,
1695 SXmode
? 0xffffffff : Hmode
? 0xffffff : 0xffff,
1698 if (operand
[i
].exp
.X_add_number
& 1)
1699 as_warn (_("branch operand has odd offset (%lx)\n"),
1700 (unsigned long) operand
->exp
.X_add_number
);
1703 operand
[i
].exp
.X_add_number
=
1704 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1705 fix_new_exp (frag_now
,
1706 output
- frag_now
->fr_literal
+ where
,
1715 /* Try to give an intelligent error message for common and simple to
1719 clever_message (const struct h8_instruction
*instruction
,
1720 struct h8_op
*operand
)
1722 /* Find out if there was more than one possible opcode. */
1724 if ((instruction
+ 1)->idx
!= instruction
->idx
)
1728 /* Only one opcode of this flavour, try to guess which operand
1730 for (argn
= 0; argn
< instruction
->noperands
; argn
++)
1732 switch (instruction
->opcode
->args
.nib
[argn
])
1735 if (operand
[argn
].mode
!= RD16
)
1737 as_bad (_("destination operand must be 16 bit register"));
1744 if (operand
[argn
].mode
!= RS8
)
1746 as_bad (_("source operand must be 8 bit register"));
1752 if (operand
[argn
].mode
!= ABS16DST
)
1754 as_bad (_("destination operand must be 16bit absolute address"));
1759 if (operand
[argn
].mode
!= RD8
)
1761 as_bad (_("destination operand must be 8 bit register"));
1767 if (operand
[argn
].mode
!= ABS16SRC
)
1769 as_bad (_("source operand must be 16bit absolute address"));
1777 as_bad (_("invalid operands"));
1781 /* If OPERAND is part of an address, adjust its size and value given
1782 that it addresses SIZE bytes.
1784 This function decides how big non-immediate constants are when no
1785 size was explicitly given. It also scales down the assembly-level
1786 displacement in an @(d:2,ERn) operand. */
1789 fix_operand_size (struct h8_op
*operand
, int size
)
1791 if (SXmode
&& (operand
->mode
& MODE
) == DISP
)
1793 /* If the user didn't specify an operand width, see if we
1794 can use @(d:2,ERn). */
1795 if ((operand
->mode
& SIZE
) == 0
1796 && operand
->exp
.X_add_symbol
== 0
1797 && operand
->exp
.X_op_symbol
== 0
1798 && (operand
->exp
.X_add_number
== size
1799 || operand
->exp
.X_add_number
== size
* 2
1800 || operand
->exp
.X_add_number
== size
* 3))
1801 operand
->mode
|= L_2
;
1803 /* Scale down the displacement in an @(d:2,ERn) operand.
1804 X_add_number then contains the desired field value. */
1805 if ((operand
->mode
& SIZE
) == L_2
)
1807 if (operand
->exp
.X_add_number
% size
!= 0)
1808 as_warn (_("operand/size mis-match"));
1809 operand
->exp
.X_add_number
/= size
;
1813 if ((operand
->mode
& SIZE
) == 0)
1814 switch (operand
->mode
& MODE
)
1821 /* Pick a 24-bit address unless we know that a 16-bit address
1822 is safe. get_specific() will relax L_24 into L_32 where
1826 && (operand
->exp
.X_add_number
< -32768
1827 || operand
->exp
.X_add_number
> 32767
1828 || operand
->exp
.X_add_symbol
!= 0
1829 || operand
->exp
.X_op_symbol
!= 0))
1830 operand
->mode
|= L_24
;
1832 operand
->mode
|= L_16
;
1836 /* This condition is long standing, though somewhat suspect. */
1837 if (operand
->exp
.X_add_number
> -128
1838 && operand
->exp
.X_add_number
< 127)
1839 operand
->mode
|= L_8
;
1841 operand
->mode
|= L_16
;
1847 /* This is the guts of the machine-dependent assembler. STR points to
1848 a machine dependent instruction. This function is supposed to emit
1849 the frags/bytes it assembles. */
1852 md_assemble (char *str
)
1856 struct h8_op operand
[3];
1857 const struct h8_instruction
*instruction
;
1858 const struct h8_instruction
*prev_instruction
;
1865 /* Drop leading whitespace. */
1869 /* Find the op code end. */
1870 for (op_start
= op_end
= str
;
1871 *op_end
!= 0 && *op_end
!= ' ';
1881 else if (*op_end
== '/' && ! slash
)
1885 if (op_end
== op_start
)
1887 as_bad (_("can't find opcode "));
1893 /* The assembler stops scanning the opcode at slashes, so it fails
1894 to make characters following them lower case. Fix them. */
1897 *slash
= TOLOWER (*slash
);
1899 instruction
= (const struct h8_instruction
*)
1900 hash_find (opcode_hash_control
, op_start
);
1902 if (instruction
== NULL
)
1904 as_bad (_("unknown opcode"));
1908 /* We used to set input_line_pointer to the result of get_operands,
1909 but that is wrong. Our caller assumes we don't change it. */
1911 operand
[0].mode
= 0;
1912 operand
[1].mode
= 0;
1913 operand
[2].mode
= 0;
1915 if (OP_KIND (instruction
->opcode
->how
) == O_MOVAB
1916 || OP_KIND (instruction
->opcode
->how
) == O_MOVAW
1917 || OP_KIND (instruction
->opcode
->how
) == O_MOVAL
)
1918 get_mova_operands (op_end
, operand
);
1919 else if (OP_KIND (instruction
->opcode
->how
) == O_RTEL
1920 || OP_KIND (instruction
->opcode
->how
) == O_RTSL
)
1921 get_rtsl_operands (op_end
, operand
);
1923 get_operands (instruction
->noperands
, op_end
, operand
);
1926 prev_instruction
= instruction
;
1931 switch (TOLOWER (*dot
))
1946 if (OP_KIND (instruction
->opcode
->how
) == O_MOVAB
||
1947 OP_KIND (instruction
->opcode
->how
) == O_MOVAW
||
1948 OP_KIND (instruction
->opcode
->how
) == O_MOVAL
)
1950 switch (operand
[0].mode
& MODE
)
1954 fix_operand_size (&operand
[1], 1);
1957 fix_operand_size (&operand
[1], 2);
1960 fix_operand_size (&operand
[1], 4);
1966 for (i
= 0; i
< 3 && operand
[i
].mode
!= 0; i
++)
1972 fix_operand_size (&operand
[i
], 1);
1975 fix_operand_size (&operand
[i
], 2);
1978 fix_operand_size (&operand
[i
], 4);
1983 instruction
= get_specific (instruction
, operand
, size
);
1985 if (instruction
== 0)
1987 /* Couldn't find an opcode which matched the operands. */
1988 char *where
= frag_more (2);
1992 clever_message (prev_instruction
, operand
);
1997 build_bytes (instruction
, operand
);
1999 #ifdef BFD_ASSEMBLER
2000 dwarf2_emit_insn (instruction
->length
);
2004 #ifndef BFD_ASSEMBLER
2006 tc_crawl_symbol_chain (object_headers
*headers ATTRIBUTE_UNUSED
)
2008 printf (_("call to tc_crawl_symbol_chain \n"));
2013 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2018 #ifndef BFD_ASSEMBLER
2020 tc_headers_hook (object_headers
*headers ATTRIBUTE_UNUSED
)
2022 printf (_("call to tc_headers_hook \n"));
2026 /* Various routines to kill one day */
2027 /* Equal to MAX_PRECISION in atof-ieee.c */
2028 #define MAX_LITTLENUMS 6
2030 /* Turn a string in input_line_pointer into a floating point constant
2031 of type TYPE, and store the appropriate bytes in *LITP. The number
2032 of LITTLENUMS emitted is stored in *SIZEP. An error message is
2033 returned, or NULL on OK. */
2036 md_atof (int type
, char *litP
, int *sizeP
)
2039 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2040 LITTLENUM_TYPE
*wordP
;
2071 return _("Bad call to MD_ATOF()");
2073 t
= atof_ieee (input_line_pointer
, type
, words
);
2075 input_line_pointer
= t
;
2077 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2078 for (wordP
= words
; prec
--;)
2080 md_number_to_chars (litP
, (long) (*wordP
++), sizeof (LITTLENUM_TYPE
));
2081 litP
+= sizeof (LITTLENUM_TYPE
);
2086 const char *md_shortopts
= "";
2087 struct option md_longopts
[] = {
2088 {NULL
, no_argument
, NULL
, 0}
2091 size_t md_longopts_size
= sizeof (md_longopts
);
2094 md_parse_option (int c ATTRIBUTE_UNUSED
, char *arg ATTRIBUTE_UNUSED
)
2100 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
2104 void tc_aout_fix_to_chars (void);
2107 tc_aout_fix_to_chars (void)
2109 printf (_("call to tc_aout_fix_to_chars \n"));
2115 #ifdef BFD_ASSEMBLER
2116 bfd
*headers ATTRIBUTE_UNUSED
,
2118 object_headers
*headers ATTRIBUTE_UNUSED
,
2120 segT seg ATTRIBUTE_UNUSED
,
2121 fragS
*fragP ATTRIBUTE_UNUSED
)
2123 printf (_("call to md_convert_frag \n"));
2127 #ifdef BFD_ASSEMBLER
2129 md_section_align (segT segment
, valueT size
)
2131 int align
= bfd_get_section_alignment (stdoutput
, segment
);
2132 return ((size
+ (1 << align
) - 1) & (-1 << align
));
2136 md_section_align (segT seg
, valueT size
)
2138 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2139 & (-1 << section_alignment
[(int) seg
]));
2145 md_apply_fix3 (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
2147 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2150 switch (fixP
->fx_size
)
2156 *buf
++ = (val
>> 8);
2160 *buf
++ = (val
>> 24);
2161 *buf
++ = (val
>> 16);
2162 *buf
++ = (val
>> 8);
2169 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
2174 md_estimate_size_before_relax (register fragS
*fragP ATTRIBUTE_UNUSED
,
2175 register segT segment_type ATTRIBUTE_UNUSED
)
2177 printf (_("call tomd_estimate_size_before_relax \n"));
2181 /* Put number into target byte order. */
2183 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
2185 number_to_chars_bigendian (ptr
, use
, nbytes
);
2189 md_pcrel_from (fixS
*fixP ATTRIBUTE_UNUSED
)
2194 #ifndef BFD_ASSEMBLER
2196 tc_reloc_mangle (fixS
*fix_ptr
, struct internal_reloc
*intr
, bfd_vma base
)
2198 symbolS
*symbol_ptr
;
2200 symbol_ptr
= fix_ptr
->fx_addsy
;
2202 /* If this relocation is attached to a symbol then it's ok
2204 if (fix_ptr
->fx_r_type
== TC_CONS_RELOC
)
2206 /* cons likes to create reloc32's whatever the size of the reloc..
2208 switch (fix_ptr
->fx_size
)
2211 intr
->r_type
= R_RELLONG
;
2214 intr
->r_type
= R_RELWORD
;
2217 intr
->r_type
= R_RELBYTE
;
2225 intr
->r_type
= fix_ptr
->fx_r_type
;
2228 intr
->r_vaddr
= fix_ptr
->fx_frag
->fr_address
+ fix_ptr
->fx_where
+ base
;
2229 intr
->r_offset
= fix_ptr
->fx_offset
;
2233 if (symbol_ptr
->sy_number
!= -1)
2234 intr
->r_symndx
= symbol_ptr
->sy_number
;
2239 /* This case arises when a reference is made to `.'. */
2240 segsym
= seg_info (S_GET_SEGMENT (symbol_ptr
))->dot
;
2242 intr
->r_symndx
= -1;
2245 intr
->r_symndx
= segsym
->sy_number
;
2246 intr
->r_offset
+= S_GET_VALUE (symbol_ptr
);
2251 intr
->r_symndx
= -1;
2253 #else /* BFD_ASSEMBLER */
2255 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
2258 bfd_reloc_code_real_type r_type
;
2260 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
2262 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
2263 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
2265 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2266 "Difference of symbols in different sections is not supported");
2271 rel
= (arelent
*) xmalloc (sizeof (arelent
));
2272 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
2273 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2274 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2275 rel
->addend
= fixp
->fx_offset
;
2277 r_type
= fixp
->fx_r_type
;
2281 fprintf (stderr
, "%s\n", bfd_get_reloc_code_name (r_type
));
2284 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
2285 if (rel
->howto
== NULL
)
2287 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2288 _("Cannot represent relocation type %s"),
2289 bfd_get_reloc_code_name (r_type
));