1 /* tc-h8300.c -- Assemble code for the Renesas H8/300
2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* Written By Steve Chamberlain <sac@cygnus.com>. */
30 #include "dwarf2dbg.h"
34 #define h8_opcodes ops
35 #include "opcode/h8300.h"
36 #include "safe-ctype.h"
42 const char comment_chars
[] = ";";
43 const char line_comment_chars
[] = "#";
44 const char line_separator_chars
[] = "";
46 void cons
PARAMS ((int));
47 void sbranch
PARAMS ((int));
48 void h8300hmode
PARAMS ((int));
49 void h8300smode
PARAMS ((int));
50 void h8300hnmode
PARAMS ((int));
51 void h8300snmode
PARAMS ((int));
52 void h8300sxmode
PARAMS ((int));
53 void h8300sxnmode
PARAMS ((int));
54 static void pint
PARAMS ((int));
61 #define PSIZE (Hmode ? L_32 : L_16)
63 int bsize
= L_8
; /* Default branch displacement. */
71 const struct h8_opcode
*opcode
;
74 struct h8_instruction
*h8_instructions
;
78 int arg ATTRIBUTE_UNUSED
;
83 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300h
))
84 as_warn (_("could not set architecture and machine"));
90 int arg ATTRIBUTE_UNUSED
;
95 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300s
))
96 as_warn (_("could not set architecture and machine"));
102 int arg ATTRIBUTE_UNUSED
;
108 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300hn
))
109 as_warn (_("could not set architecture and machine"));
115 int arg ATTRIBUTE_UNUSED
;
121 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sn
))
122 as_warn (_("could not set architecture and machine"));
128 int arg ATTRIBUTE_UNUSED
;
134 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sx
))
135 as_warn (_("could not set architecture and machine"));
141 int arg ATTRIBUTE_UNUSED
;
148 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sxn
))
149 as_warn (_("could not set architecture and machine"));
162 int arg ATTRIBUTE_UNUSED
;
164 cons (Hmode
? 4 : 2);
167 /* This table describes all the machine specific pseudo-ops the assembler
168 has to support. The fields are:
169 pseudo-op name without dot
170 function to call to execute this pseudo-op
171 Integer arg to pass to the function. */
173 const pseudo_typeS md_pseudo_table
[] =
175 {"h8300h", h8300hmode
, 0},
176 {"h8300hn", h8300hnmode
, 0},
177 {"h8300s", h8300smode
, 0},
178 {"h8300sn", h8300snmode
, 0},
179 {"h8300sx", h8300sxmode
, 0},
180 {"h8300sxn", h8300sxnmode
, 0},
181 {"sbranch", sbranch
, L_8
},
182 {"lbranch", sbranch
, L_16
},
188 {"form", listing_psize
, 0},
189 {"heading", listing_title
, 0},
190 {"import", s_ignore
, 0},
191 {"page", listing_eject
, 0},
192 {"program", s_ignore
, 0},
196 const int md_reloc_size
;
198 const char EXP_CHARS
[] = "eE";
200 /* Chars that mean this number is a floating point constant
203 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
205 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics. */
207 /* This function is called once, at assembler startup time. This
208 should set up all the tables, etc. that the MD part of the assembler
214 unsigned int nopcodes
;
215 struct h8_opcode
*p
, *p1
;
216 struct h8_instruction
*pi
;
217 char prev_buffer
[100];
221 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300
))
222 as_warn (_("could not set architecture and machine"));
225 opcode_hash_control
= hash_new ();
228 nopcodes
= sizeof (h8_opcodes
) / sizeof (struct h8_opcode
);
230 h8_instructions
= (struct h8_instruction
*)
231 xmalloc (nopcodes
* sizeof (struct h8_instruction
));
233 pi
= h8_instructions
;
235 /* We do a minimum amount of sorting on the opcode table; this is to
236 make it easy to describe the mova instructions without unnecessary
238 Sorting only takes place inside blocks of instructions of the form
239 X/Y, so for example mova/b, mova/w and mova/l can be intermixed. */
242 struct h8_opcode
*first_skipped
= 0;
244 char *src
= p1
->name
;
249 /* Strip off any . part when inserting the opcode and only enter
250 unique codes into the hash table. */
251 dst
= buffer
= malloc (strlen (src
) + 1);
260 cmplen
= src
- p1
->name
+ 1;
267 hash_insert (opcode_hash_control
, buffer
, (char *) pi
);
268 strcpy (prev_buffer
, buffer
);
271 for (p
= p1
; p
->name
; p
++)
273 /* A negative TIME is used to indicate that we've added this opcode
277 if (strncmp (p
->name
, buffer
, cmplen
) != 0
278 || (p
->name
[cmplen
] != '\0' && p
->name
[cmplen
] != '.'
279 && p
->name
[cmplen
- 1] != '/'))
281 if (first_skipped
== 0)
285 if (strncmp (p
->name
, buffer
, len
) != 0)
287 if (first_skipped
== 0)
293 pi
->size
= p
->name
[len
] == '.' ? p
->name
[len
+ 1] : 0;
296 /* Find the number of operands. */
298 while (pi
->noperands
< 3 && p
->args
.nib
[pi
->noperands
] != (op_type
) E
)
301 /* Find the length of the opcode in bytes. */
303 while (p
->data
.nib
[pi
->length
* 2] != (op_type
) E
)
312 /* Add entry for the NULL vector terminator. */
336 static void clever_message
PARAMS ((const struct h8_instruction
*, struct h8_op
*));
337 static void fix_operand_size
PARAMS ((struct h8_op
*, int));
338 static void build_bytes
PARAMS ((const struct h8_instruction
*, struct h8_op
*));
339 static void do_a_fix_imm
PARAMS ((int, int, struct h8_op
*, int));
340 static void check_operand
PARAMS ((struct h8_op
*, unsigned int, char *));
341 static const struct h8_instruction
* get_specific
PARAMS ((const struct h8_instruction
*, struct h8_op
*, int));
342 static char *get_operands
PARAMS ((unsigned, char *, struct h8_op
*));
343 static void get_operand
PARAMS ((char **, struct h8_op
*, int));
344 static int parse_reg
PARAMS ((char *, op_type
*, unsigned *, int));
345 static char *skip_colonthing
PARAMS ((char *, int *));
346 static char *parse_exp
PARAMS ((char *, struct h8_op
*));
348 static int constant_fits_width_p
PARAMS ((struct h8_op
*, unsigned int));
349 static int constant_fits_size_p
PARAMS ((struct h8_op
*, int, int));
353 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
362 /* Try to parse a reg name. Return the number of chars consumed. */
365 parse_reg (src
, mode
, reg
, direction
)
374 /* Cribbed from get_symbol_end. */
375 if (!is_name_beginner (*src
) || *src
== '\001')
378 while ((is_part_of_name (*end
) && *end
!= '.') || *end
== '\001')
382 if (len
== 2 && TOLOWER (src
[0]) == 's' && TOLOWER (src
[1]) == 'p')
384 *mode
= PSIZE
| REG
| direction
;
389 TOLOWER (src
[0]) == 'c' &&
390 TOLOWER (src
[1]) == 'c' &&
391 TOLOWER (src
[2]) == 'r')
398 TOLOWER (src
[0]) == 'e' &&
399 TOLOWER (src
[1]) == 'x' &&
400 TOLOWER (src
[2]) == 'r')
407 TOLOWER (src
[0]) == 'v' &&
408 TOLOWER (src
[1]) == 'b' &&
409 TOLOWER (src
[2]) == 'r')
416 TOLOWER (src
[0]) == 's' &&
417 TOLOWER (src
[1]) == 'b' &&
418 TOLOWER (src
[2]) == 'r')
424 if (len
== 2 && TOLOWER (src
[0]) == 'f' && TOLOWER (src
[1]) == 'p')
426 *mode
= PSIZE
| REG
| direction
;
430 if (len
== 3 && TOLOWER (src
[0]) == 'e' && TOLOWER (src
[1]) == 'r' &&
431 src
[2] >= '0' && src
[2] <= '7')
433 *mode
= L_32
| REG
| direction
;
436 as_warn (_("Reg not valid for H8/300"));
439 if (len
== 2 && TOLOWER (src
[0]) == 'e' && src
[1] >= '0' && src
[1] <= '7')
441 *mode
= L_16
| REG
| direction
;
442 *reg
= src
[1] - '0' + 8;
444 as_warn (_("Reg not valid for H8/300"));
448 if (TOLOWER (src
[0]) == 'r')
450 if (src
[1] >= '0' && src
[1] <= '7')
452 if (len
== 3 && TOLOWER (src
[2]) == 'l')
454 *mode
= L_8
| REG
| direction
;
455 *reg
= (src
[1] - '0') + 8;
458 if (len
== 3 && TOLOWER (src
[2]) == 'h')
460 *mode
= L_8
| REG
| direction
;
461 *reg
= (src
[1] - '0');
466 *mode
= L_16
| REG
| direction
;
467 *reg
= (src
[1] - '0');
477 /* Parse an immediate or address-related constant and store it in OP.
478 If the user also specifies the operand's size, store that size
479 in OP->MODE, otherwise leave it for later code to decide. */
488 save
= input_line_pointer
;
489 input_line_pointer
= src
;
490 expression (&op
->exp
);
491 if (op
->exp
.X_op
== O_absent
)
492 as_bad (_("missing operand"));
493 src
= input_line_pointer
;
494 input_line_pointer
= save
;
496 return skip_colonthing (src
, &op
->mode
);
500 /* If SRC starts with an explicit operand size, skip it and store the size
501 in *MODE. Leave *MODE unchanged otherwise. */
504 skip_colonthing (src
, mode
)
512 if (src
[0] == '8' && !ISDIGIT (src
[1]))
514 else if (src
[0] == '2' && !ISDIGIT (src
[1]))
516 else if (src
[0] == '3' && !ISDIGIT (src
[1]))
518 else if (src
[0] == '4' && !ISDIGIT (src
[1]))
520 else if (src
[0] == '5' && !ISDIGIT (src
[1]))
522 else if (src
[0] == '2' && src
[1] == '4' && !ISDIGIT (src
[2]))
524 else if (src
[0] == '3' && src
[1] == '2' && !ISDIGIT (src
[2]))
526 else if (src
[0] == '1' && src
[1] == '6' && !ISDIGIT (src
[2]))
529 as_bad (_("invalid operand size requested"));
531 while (ISDIGIT (*src
))
537 /* The many forms of operand:
540 @Rn Register indirect
541 @(exp[:16], Rn) Register indirect with displacement
545 @aa:16 absolute 16 bit
548 #xx[:size] immediate data
549 @(exp:[8], pc) pc rel
550 @@aa[:8] memory indirect. */
553 constant_fits_width_p (operand
, width
)
554 struct h8_op
*operand
;
557 return ((operand
->exp
.X_add_number
& ~width
) == 0
558 || (operand
->exp
.X_add_number
| width
) == (unsigned)(~0));
562 constant_fits_size_p (operand
, size
, no_symbols
)
563 struct h8_op
*operand
;
564 int size
, no_symbols
;
566 offsetT num
= operand
->exp
.X_add_number
;
568 && (operand
->exp
.X_add_symbol
!= 0 || operand
->exp
.X_op_symbol
!= 0))
573 return (num
& ~3) == 0;
575 return (num
& ~7) == 0;
577 return num
>= 1 && num
< 8;
579 return (num
& ~15) == 0;
581 return num
>= 1 && num
< 32;
583 return (num
& ~0xFF) == 0 || ((unsigned)num
| 0x7F) == ~0u;
585 return (num
& ~0xFF) == 0;
587 return (num
& ~0xFFFF) == 0 || ((unsigned)num
| 0x7FFF) == ~0u;
589 return (num
& ~0xFFFF) == 0;
598 get_operand (ptr
, op
, direction
)
610 /* Check for '(' and ')' for instructions ldm and stm. */
611 if (src
[0] == '(' && src
[8] == ')')
614 /* Gross. Gross. ldm and stm have a format not easily handled
615 by get_operand. We deal with it explicitly here. */
616 if (TOLOWER (src
[0]) == 'e' && TOLOWER (src
[1]) == 'r' &&
617 ISDIGIT (src
[2]) && src
[3] == '-' &&
618 TOLOWER (src
[4]) == 'e' && TOLOWER (src
[5]) == 'r' && ISDIGIT (src
[6]))
626 as_bad (_("Invalid register list for ldm/stm\n"));
629 as_bad (_("Invalid register list for ldm/stm\n"));
632 as_bad (_("Invalid register list for ldm/stm)\n"));
634 /* Even sicker. We encode two registers into op->reg. One
635 for the low register to save, the other for the high
636 register to save; we also set the high bit in op->reg
637 so we know this is "very special". */
638 op
->reg
= 0x80000000 | (high
<< 8) | low
;
647 len
= parse_reg (src
, &op
->mode
, &op
->reg
, direction
);
653 int size
= op
->mode
& SIZE
;
658 as_warn (_("mismatch between register and suffix"));
659 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
662 if (size
!= L_32
&& size
!= L_16
)
663 as_warn (_("mismatch between register and suffix"));
664 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
665 op
->mode
= (op
->mode
& ~SIZE
) | L_16
;
668 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
669 if (size
!= L_32
&& size
!= L_8
)
670 as_warn (_("mismatch between register and suffix"));
671 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
672 op
->mode
= (op
->mode
& ~SIZE
) | L_8
;
675 as_warn ("invalid suffix after register.");
689 *ptr
= parse_exp (src
+ 1, op
);
690 if (op
->exp
.X_add_number
>= 0x100)
695 /* FIXME : 2? or 4? */
696 if (op
->exp
.X_add_number
>= 0x400)
697 as_bad (_("address too high for vector table jmp/jsr"));
698 else if (op
->exp
.X_add_number
>= 0x200)
703 op
->exp
.X_add_number
= op
->exp
.X_add_number
/ divisor
- 0x80;
710 if (*src
== '-' || *src
== '+')
712 len
= parse_reg (src
+ 1, &mode
, &num
, direction
);
715 /* Oops, not a reg after all, must be ordinary exp. */
716 op
->mode
= ABS
| direction
;
717 *ptr
= parse_exp (src
, op
);
721 if ((mode
& SIZE
) != PSIZE
)
722 as_bad (_("Wrong size pointer register for architecture."));
724 op
->mode
= src
[0] == '-' ? RDPREDEC
: RDPREINC
;
726 *ptr
= src
+ 1 + len
;
733 /* See if this is @(ERn.x, PC). */
734 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
735 if (len
!= 0 && (mode
& MODE
) == REG
&& src
[len
] == '.')
737 switch (TOLOWER (src
[len
+ 1]))
740 mode
= PCIDXB
| direction
;
743 mode
= PCIDXW
| direction
;
746 mode
= PCIDXL
| direction
;
753 && src
[len
+ 2] == ','
754 && TOLOWER (src
[len
+ 3]) != 'p'
755 && TOLOWER (src
[len
+ 4]) != 'c'
756 && src
[len
+ 5] != ')')
758 *ptr
= src
+ len
+ 6;
762 /* Fall through into disp case - the grammar is somewhat
763 ambiguous, so we should try whether it's a DISP operand
764 after all ("ER3.L" might be a poorly named label...). */
769 /* Start off assuming a 16 bit offset. */
771 src
= parse_exp (src
, op
);
774 op
->mode
|= ABS
| direction
;
781 as_bad (_("expected @(exp, reg16)"));
786 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
787 if (len
== 0 || (mode
& MODE
) != REG
)
789 as_bad (_("expected @(exp, reg16)"));
795 switch (TOLOWER (src
[1]))
798 op
->mode
|= INDEXB
| direction
;
801 op
->mode
|= INDEXW
| direction
;
804 op
->mode
|= INDEXL
| direction
;
807 as_bad (_("expected .L, .W or .B for register in indexed addressing mode"));
813 op
->mode
|= DISP
| direction
;
814 src
= skip_colonthing (src
, &op
->mode
);
816 if (*src
!= ')' && '(')
818 as_bad (_("expected @(exp, reg16)"));
824 len
= parse_reg (src
, &mode
, &num
, direction
);
829 if (*src
== '+' || *src
== '-')
831 if ((mode
& SIZE
) != PSIZE
)
832 as_bad (_("Wrong size pointer register for architecture."));
833 op
->mode
= *src
== '+' ? RSPOSTINC
: RSPOSTDEC
;
839 if ((mode
& SIZE
) != PSIZE
)
840 as_bad (_("Wrong size pointer register for architecture."));
842 op
->mode
= direction
| IND
| PSIZE
;
850 /* must be a symbol */
852 op
->mode
= ABS
| direction
;
853 *ptr
= parse_exp (src
, op
);
861 *ptr
= parse_exp (src
+ 1, op
);
864 else if (strncmp (src
, "mach", 4) == 0 ||
865 strncmp (src
, "macl", 4) == 0 ||
866 strncmp (src
, "MACH", 4) == 0 ||
867 strncmp (src
, "MACL", 4) == 0)
869 op
->reg
= TOLOWER (src
[3]) == 'l';
877 *ptr
= parse_exp (src
, op
);
882 get_operands (noperands
, op_end
, operand
)
883 unsigned int noperands
;
885 struct h8_op
*operand
;
896 get_operand (&ptr
, operand
+ 0, SRC
);
900 get_operand (&ptr
, operand
+ 1, DST
);
906 get_operand (&ptr
, operand
+ 0, SRC
);
909 get_operand (&ptr
, operand
+ 1, DST
);
914 get_operand (&ptr
, operand
+ 0, SRC
);
917 get_operand (&ptr
, operand
+ 1, DST
);
920 get_operand (&ptr
, operand
+ 2, OP3
);
930 /* MOVA has special requirements. Rather than adding twice the amount of
931 addressing modes, we simply special case it a bit. */
933 get_mova_operands (char *op_end
, struct h8_op
*operand
)
937 if (ptr
[1] != '@' || ptr
[2] != '(')
941 ptr
= parse_exp (ptr
, &operand
[0]);
946 get_operand (&ptr
, operand
+ 1, DST
);
954 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXB
;
957 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXW
;
960 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXL
;
966 else if ((operand
[1].mode
& MODE
) == LOWREG
)
968 switch (operand
[1].mode
& SIZE
)
971 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXB
;
974 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXW
;
977 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXL
;
986 if (*ptr
++ != ')' || *ptr
++ != ',')
988 get_operand (&ptr
, operand
+ 2, OP3
);
989 /* See if we can use the short form of MOVA. */
990 if (((operand
[1].mode
& MODE
) == REG
|| (operand
[1].mode
& MODE
) == LOWREG
)
991 && (operand
[2].mode
& MODE
) == REG
992 && (operand
[1].reg
& 7) == (operand
[2].reg
& 7))
994 operand
[1].mode
= operand
[2].mode
= 0;
995 operand
[0].reg
= operand
[2].reg
& 7;
1000 as_bad (_("expected valid addressing mode for mova: \"@(disp, ea.sz),ERn\""));
1005 get_rtsl_operands (char *ptr
, struct h8_op
*operand
)
1007 int mode
, num
, num2
, len
, type
= 0;
1015 len
= parse_reg (ptr
, &mode
, &num
, SRC
);
1016 if (len
== 0 || (mode
& MODE
) != REG
)
1018 as_bad (_("expected register"));
1024 len
= parse_reg (++ptr
, &mode
, &num2
, SRC
);
1025 if (len
== 0 || (mode
& MODE
) != REG
)
1027 as_bad (_("expected register"));
1031 /* CONST_xxx are used as placeholders in the opcode table. */
1033 if (num
< 0 || num
> 3)
1035 as_bad (_("invalid register list"));
1040 num2
= num
, num
= 0;
1041 if (type
== 1 && *ptr
++ != ')')
1043 as_bad (_("expected closing paren"));
1046 operand
[0].mode
= RS32
;
1047 operand
[1].mode
= RD32
;
1048 operand
[0].reg
= num
;
1049 operand
[1].reg
= num2
;
1052 /* Passed a pointer to a list of opcodes which use different
1053 addressing modes, return the opcode which matches the opcodes
1056 static const struct h8_instruction
*
1057 get_specific (instruction
, operands
, size
)
1058 const struct h8_instruction
*instruction
;
1059 struct h8_op
*operands
;
1062 const struct h8_instruction
*this_try
= instruction
;
1063 const struct h8_instruction
*found_other
= 0, *found_mismatched
= 0;
1065 int this_index
= instruction
->idx
;
1068 /* There's only one ldm/stm and it's easier to just
1069 get out quick for them. */
1070 if (OP_KIND (instruction
->opcode
->how
) == O_LDM
1071 || OP_KIND (instruction
->opcode
->how
) == O_STM
)
1074 while (noperands
< 3 && operands
[noperands
].mode
!= 0)
1077 while (this_index
== instruction
->idx
&& !found
)
1082 this_try
= instruction
++;
1083 this_size
= this_try
->opcode
->how
& SN
;
1085 if (this_try
->noperands
!= noperands
)
1087 else if (this_try
->noperands
> 0)
1091 for (i
= 0; i
< this_try
->noperands
&& found
; i
++)
1093 op_type op
= this_try
->opcode
->args
.nib
[i
];
1094 int op_mode
= op
& MODE
;
1095 int op_size
= op
& SIZE
;
1096 int x
= operands
[i
].mode
;
1097 int x_mode
= x
& MODE
;
1098 int x_size
= x
& SIZE
;
1100 if (op_mode
== LOWREG
&& (x_mode
== REG
|| x_mode
== LOWREG
))
1102 if ((x_size
== L_8
&& (operands
[i
].reg
& 8) == 0)
1103 || (x_size
== L_16
&& (operands
[i
].reg
& 8) == 8))
1104 as_warn (_("can't use high part of register in operand %d"), i
);
1106 if (x_size
!= op_size
)
1109 else if (op_mode
== REG
)
1111 if (x_mode
== LOWREG
)
1117 x_size
= (Hmode
? L_32
: L_16
);
1119 op_size
= (Hmode
? L_32
: L_16
);
1121 /* The size of the reg is v important. */
1122 if (op_size
!= x_size
)
1125 else if (op_mode
& CTRL
) /* control register */
1127 if (!(x_mode
& CTRL
))
1133 if (op_mode
!= CCR
&&
1134 op_mode
!= CCR_EXR
&&
1135 op_mode
!= CC_EX_VB_SB
)
1139 if (op_mode
!= EXR
&&
1140 op_mode
!= CCR_EXR
&&
1141 op_mode
!= CC_EX_VB_SB
)
1145 if (op_mode
!= MACH
&&
1150 if (op_mode
!= MACL
&&
1155 if (op_mode
!= VBR
&&
1156 op_mode
!= VBR_SBR
&&
1157 op_mode
!= CC_EX_VB_SB
)
1161 if (op_mode
!= SBR
&&
1162 op_mode
!= VBR_SBR
&&
1163 op_mode
!= CC_EX_VB_SB
)
1168 else if ((op
& ABSJMP
) && (x_mode
== ABS
|| x_mode
== PCREL
))
1170 operands
[i
].mode
&= ~MODE
;
1171 operands
[i
].mode
|= ABSJMP
;
1172 /* But it may not be 24 bits long. */
1173 if (x_mode
== ABS
&& !Hmode
)
1175 operands
[i
].mode
&= ~SIZE
;
1176 operands
[i
].mode
|= L_16
;
1178 if ((operands
[i
].mode
& SIZE
) == L_32
1179 && (op_mode
& SIZE
) != L_32
)
1182 else if (x_mode
== IMM
&& op_mode
!= IMM
)
1184 offsetT num
= operands
[i
].exp
.X_add_number
;
1185 if (op_mode
== KBIT
|| op_mode
== DBIT
)
1186 /* This is ok if the immediate value is sensible. */;
1187 else if (op_mode
== CONST_2
)
1189 else if (op_mode
== CONST_4
)
1191 else if (op_mode
== CONST_8
)
1193 else if (op_mode
== CONST_16
)
1198 else if (op_mode
== PCREL
&& op_mode
== x_mode
)
1200 /* movsd, bsr/bc and bsr/bs only come in PCREL16 flavour:
1201 If x_size is L_8, promote it. */
1202 if (OP_KIND (this_try
->opcode
->how
) == O_MOVSD
1203 || OP_KIND (this_try
->opcode
->how
) == O_BSRBC
1204 || OP_KIND (this_try
->opcode
->how
) == O_BSRBS
)
1208 /* The size of the displacement is important. */
1209 if (op_size
!= x_size
)
1212 else if ((op_mode
== DISP
|| op_mode
== IMM
|| op_mode
== ABS
1213 || op_mode
== INDEXB
|| op_mode
== INDEXW
1214 || op_mode
== INDEXL
)
1215 && op_mode
== x_mode
)
1217 /* Promote a L_24 to L_32 if it makes us match. */
1218 if (x_size
== L_24
&& op_size
== L_32
)
1225 /* Promote an L8 to L_16 if it makes us match. */
1226 if ((op_mode
== ABS
|| op_mode
== DISP
) && x_size
== L_8
)
1228 if (op_size
== L_16
)
1233 if (((x_size
== L_16
&& op_size
== L_16U
)
1234 || (x_size
== L_8
&& op_size
== L_8U
)
1235 || (x_size
== L_3
&& op_size
== L_3NZ
))
1236 /* We're deliberately more permissive for ABS modes. */
1238 || constant_fits_size_p (operands
+ i
, op_size
,
1242 if (x_size
!= 0 && op_size
!= x_size
)
1244 else if (x_size
== 0
1245 && ! constant_fits_size_p (operands
+ i
, op_size
,
1249 else if (op_mode
!= x_mode
)
1257 if ((this_try
->opcode
->available
== AV_H8SX
&& ! SXmode
)
1258 || (this_try
->opcode
->available
== AV_H8S
&& ! Smode
)
1259 || (this_try
->opcode
->available
== AV_H8H
&& ! Hmode
))
1260 found
= 0, found_other
= this_try
;
1261 else if (this_size
!= size
&& (this_size
!= SN
&& size
!= SN
))
1262 found_mismatched
= this_try
, found
= 0;
1270 as_warn (_("Opcode `%s' with these operand types not available in %s mode"),
1271 found_other
->opcode
->name
,
1272 (! Hmode
&& ! Smode
? "H8/300"
1277 else if (found_mismatched
)
1279 as_warn (_("mismatch between opcode size and operand size"));
1280 return found_mismatched
;
1286 check_operand (operand
, width
, string
)
1287 struct h8_op
*operand
;
1291 if (operand
->exp
.X_add_symbol
== 0
1292 && operand
->exp
.X_op_symbol
== 0)
1294 /* No symbol involved, let's look at offset, it's dangerous if
1295 any of the high bits are not 0 or ff's, find out by oring or
1296 anding with the width and seeing if the answer is 0 or all
1299 if (! constant_fits_width_p (operand
, width
))
1302 && (operand
->exp
.X_add_number
& 0xff00) == 0xff00)
1304 /* Just ignore this one - which happens when trying to
1305 fit a 16 bit address truncated into an 8 bit address
1306 of something like bset. */
1308 else if (strcmp (string
, "@") == 0
1310 && (operand
->exp
.X_add_number
& 0xff8000) == 0xff8000)
1312 /* Just ignore this one - which happens when trying to
1313 fit a 24 bit address truncated into a 16 bit address
1314 of something like mov.w. */
1318 as_warn (_("operand %s0x%lx out of range."), string
,
1319 (unsigned long) operand
->exp
.X_add_number
);
1325 /* RELAXMODE has one of 3 values:
1327 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
1329 1 Output a relaxable 24bit absolute mov.w address relocation
1330 (may relax into a 16bit absolute address).
1332 2 Output a relaxable 16/24 absolute mov.b address relocation
1333 (may relax into an 8bit absolute address). */
1336 do_a_fix_imm (offset
, nibble
, operand
, relaxmode
)
1338 struct h8_op
*operand
;
1344 char *bytes
= frag_now
->fr_literal
+ offset
;
1346 char *t
= ((operand
->mode
& MODE
) == IMM
) ? "#" : "@";
1348 if (operand
->exp
.X_add_symbol
== 0)
1350 switch (operand
->mode
& SIZE
)
1353 check_operand (operand
, 0x3, t
);
1354 bytes
[0] |= (operand
->exp
.X_add_number
& 3) << (nibble
? 0 : 4);
1358 check_operand (operand
, 0x7, t
);
1359 bytes
[0] |= (operand
->exp
.X_add_number
& 7) << (nibble
? 0 : 4);
1362 check_operand (operand
, 0xF, t
);
1363 bytes
[0] |= (operand
->exp
.X_add_number
& 15) << (nibble
? 0 : 4);
1366 check_operand (operand
, 0x1F, t
);
1367 bytes
[0] |= operand
->exp
.X_add_number
& 31;
1371 check_operand (operand
, 0xff, t
);
1372 bytes
[0] |= operand
->exp
.X_add_number
;
1376 check_operand (operand
, 0xffff, t
);
1377 bytes
[0] |= operand
->exp
.X_add_number
>> 8;
1378 bytes
[1] |= operand
->exp
.X_add_number
>> 0;
1381 check_operand (operand
, 0xffffff, t
);
1382 bytes
[0] |= operand
->exp
.X_add_number
>> 16;
1383 bytes
[1] |= operand
->exp
.X_add_number
>> 8;
1384 bytes
[2] |= operand
->exp
.X_add_number
>> 0;
1388 /* This should be done with bfd. */
1389 bytes
[0] |= operand
->exp
.X_add_number
>> 24;
1390 bytes
[1] |= operand
->exp
.X_add_number
>> 16;
1391 bytes
[2] |= operand
->exp
.X_add_number
>> 8;
1392 bytes
[3] |= operand
->exp
.X_add_number
>> 0;
1395 idx
= (relaxmode
== 2) ? R_MOV24B1
: R_MOVL1
;
1396 fix_new_exp (frag_now
, offset
, 4, &operand
->exp
, 0, idx
);
1403 switch (operand
->mode
& SIZE
)
1408 where
= (operand
->mode
& SIZE
) == L_24
? -1 : 0;
1411 else if (relaxmode
== 1)
1417 as_bad (_("Can't work out size of operand.\n"));
1426 operand
->exp
.X_add_number
=
1427 ((operand
->exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1428 operand
->exp
.X_add_number
|= (bytes
[0] << 8) | bytes
[1];
1434 operand
->exp
.X_add_number
=
1435 ((operand
->exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1436 operand
->exp
.X_add_number
|= bytes
[0];
1439 fix_new_exp (frag_now
,
1448 /* Now we know what sort of opcodes it is, let's build the bytes. */
1451 build_bytes (this_try
, operand
)
1452 const struct h8_instruction
*this_try
;
1453 struct h8_op
*operand
;
1456 char *output
= frag_more (this_try
->length
);
1457 op_type
*nibble_ptr
= this_try
->opcode
->data
.nib
;
1459 unsigned int nibble_count
= 0;
1463 char asnibbles
[100];
1464 char *p
= asnibbles
;
1467 if (!Hmode
&& this_try
->opcode
->available
!= AV_H8
)
1468 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1469 this_try
->opcode
->name
);
1471 && this_try
->opcode
->available
!= AV_H8
1472 && this_try
->opcode
->available
!= AV_H8H
)
1473 as_warn (_("Opcode `%s' with these operand types not available in H8/300H mode"),
1474 this_try
->opcode
->name
);
1476 && this_try
->opcode
->available
!= AV_H8
1477 && this_try
->opcode
->available
!= AV_H8H
1478 && this_try
->opcode
->available
!= AV_H8S
)
1479 as_warn (_("Opcode `%s' with these operand types not available in H8/300S mode"),
1480 this_try
->opcode
->name
);
1482 while (*nibble_ptr
!= (op_type
) E
)
1489 d
= (c
& OP3
) == OP3
? 2 : (c
& DST
) == DST
? 1 : 0;
1497 if (c2
== REG
|| c2
== LOWREG
1498 || c2
== IND
|| c2
== PREINC
|| c2
== PREDEC
1499 || c2
== POSTINC
|| c2
== POSTDEC
)
1501 nib
= operand
[d
].reg
;
1506 else if (c
& CTRL
) /* Control reg operand. */
1507 nib
= operand
[d
].reg
;
1509 else if ((c
& DISPREG
) == (DISPREG
))
1511 nib
= operand
[d
].reg
;
1515 operand
[d
].mode
= c
;
1516 op_at
[d
] = nibble_count
;
1519 else if (c2
== IMM
|| c2
== PCREL
|| c2
== ABS
1520 || (c
& ABSJMP
) || c2
== DISP
)
1522 operand
[d
].mode
= c
;
1523 op_at
[d
] = nibble_count
;
1526 else if ((c
& IGNORE
) || (c
& DATA
))
1529 else if (c2
== DBIT
)
1531 switch (operand
[0].exp
.X_add_number
)
1540 as_bad (_("Need #1 or #2 here"));
1543 else if (c2
== KBIT
)
1545 switch (operand
[0].exp
.X_add_number
)
1555 as_warn (_("#4 not valid on H8/300."));
1560 as_bad (_("Need #1 or #2 here"));
1563 /* Stop it making a fix. */
1564 operand
[0].mode
= 0;
1568 operand
[d
].mode
|= MEMRELAX
;
1584 if (operand
[0].mode
== MACREG
)
1585 /* stmac has mac[hl] as the first operand. */
1586 nib
= 2 + operand
[0].reg
;
1588 /* ldmac has mac[hl] as the second operand. */
1589 nib
= 2 + operand
[1].reg
;
1597 /* Disgusting. Why, oh why didn't someone ask us for advice
1598 on the assembler format. */
1599 if (OP_KIND (this_try
->opcode
->how
) == O_LDM
)
1601 high
= (operand
[1].reg
>> 8) & 0xf;
1602 low
= (operand
[1].reg
) & 0xf;
1603 asnibbles
[2] = high
- low
;
1604 asnibbles
[7] = high
;
1606 else if (OP_KIND (this_try
->opcode
->how
) == O_STM
)
1608 high
= (operand
[0].reg
>> 8) & 0xf;
1609 low
= (operand
[0].reg
) & 0xf;
1610 asnibbles
[2] = high
- low
;
1614 for (i
= 0; i
< this_try
->length
; i
++)
1615 output
[i
] = (asnibbles
[i
* 2] << 4) | asnibbles
[i
* 2 + 1];
1617 /* Note if this is a movb instruction -- there's a special relaxation
1618 which only applies to them. */
1619 if (this_try
->opcode
->how
== O (O_MOV
, SB
))
1622 /* Output any fixes. */
1623 for (i
= 0; i
< this_try
->noperands
; i
++)
1625 int x
= operand
[i
].mode
;
1626 int x_mode
= x
& MODE
;
1628 if (x_mode
== IMM
|| x_mode
== DISP
)
1629 do_a_fix_imm (output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1630 op_at
[i
] & 1, operand
+ i
, (x
& MEMRELAX
) != 0);
1632 else if (x_mode
== ABS
)
1633 do_a_fix_imm (output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1634 op_at
[i
] & 1, operand
+ i
,
1635 (x
& MEMRELAX
) ? movb
+ 1 : 0);
1637 else if (x_mode
== PCREL
)
1639 int size16
= (x
& SIZE
) == L_16
;
1640 int size
= size16
? 2 : 1;
1641 int type
= size16
? R_PCRWORD
: R_PCRBYTE
;
1644 check_operand (operand
+ i
, size16
? 0x7fff : 0x7f, "@");
1646 if (operand
[i
].exp
.X_add_number
& 1)
1647 as_warn (_("branch operand has odd offset (%lx)\n"),
1648 (unsigned long) operand
->exp
.X_add_number
);
1650 /* The COFF port has always been off by one, changing it
1651 now would be an incompatible change, so we leave it as-is.
1653 We don't want to do this for ELF as we want to be
1654 compatible with the proposed ELF format from Hitachi. */
1655 operand
[i
].exp
.X_add_number
-= 1;
1659 operand
[i
].exp
.X_add_number
=
1660 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1664 operand
[i
].exp
.X_add_number
=
1665 ((operand
[i
].exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1670 operand
[i
].exp
.X_add_number
|= output
[op_at
[i
] / 2];
1672 fixP
= fix_new_exp (frag_now
,
1673 output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1678 fixP
->fx_signed
= 1;
1680 else if (x_mode
== MEMIND
)
1682 check_operand (operand
+ i
, 0xff, "@@");
1683 fix_new_exp (frag_now
,
1684 output
- frag_now
->fr_literal
+ 1,
1690 else if (x_mode
== VECIND
)
1692 check_operand (operand
+ i
, 0x7f, "@@");
1693 /* FIXME: approximating the effect of "B31" here...
1694 This is very hackish, and ought to be done a better way. */
1695 operand
[i
].exp
.X_add_number
|= 0x80;
1696 fix_new_exp (frag_now
,
1697 output
- frag_now
->fr_literal
+ 1,
1703 else if (x
& ABSJMP
)
1706 bfd_reloc_code_real_type reloc_type
= R_JMPL1
;
1709 /* To be compatible with the proposed H8 ELF format, we
1710 want the relocation's offset to point to the first byte
1711 that will be modified, not to the start of the instruction. */
1713 if ((operand
->mode
& SIZE
) == L_32
)
1716 reloc_type
= R_RELLONG
;
1722 /* This jmp may be a jump or a branch. */
1724 check_operand (operand
+ i
,
1725 SXmode
? 0xffffffff : Hmode
? 0xffffff : 0xffff,
1728 if (operand
[i
].exp
.X_add_number
& 1)
1729 as_warn (_("branch operand has odd offset (%lx)\n"),
1730 (unsigned long) operand
->exp
.X_add_number
);
1733 operand
[i
].exp
.X_add_number
=
1734 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1735 fix_new_exp (frag_now
,
1736 output
- frag_now
->fr_literal
+ where
,
1745 /* Try to give an intelligent error message for common and simple to
1749 clever_message (instruction
, operand
)
1750 const struct h8_instruction
*instruction
;
1751 struct h8_op
*operand
;
1753 /* Find out if there was more than one possible opcode. */
1755 if ((instruction
+ 1)->idx
!= instruction
->idx
)
1759 /* Only one opcode of this flavour, try to guess which operand
1761 for (argn
= 0; argn
< instruction
->noperands
; argn
++)
1763 switch (instruction
->opcode
->args
.nib
[argn
])
1766 if (operand
[argn
].mode
!= RD16
)
1768 as_bad (_("destination operand must be 16 bit register"));
1775 if (operand
[argn
].mode
!= RS8
)
1777 as_bad (_("source operand must be 8 bit register"));
1783 if (operand
[argn
].mode
!= ABS16DST
)
1785 as_bad (_("destination operand must be 16bit absolute address"));
1790 if (operand
[argn
].mode
!= RD8
)
1792 as_bad (_("destination operand must be 8 bit register"));
1798 if (operand
[argn
].mode
!= ABS16SRC
)
1800 as_bad (_("source operand must be 16bit absolute address"));
1808 as_bad (_("invalid operands"));
1812 /* If OPERAND is part of an address, adjust its size and value given
1813 that it addresses SIZE bytes.
1815 This function decides how big non-immediate constants are when no
1816 size was explicitly given. It also scales down the assembly-level
1817 displacement in an @(d:2,ERn) operand. */
1820 fix_operand_size (operand
, size
)
1821 struct h8_op
*operand
;
1824 if (SXmode
&& (operand
->mode
& MODE
) == DISP
)
1826 /* If the user didn't specify an operand width, see if we
1827 can use @(d:2,ERn). */
1828 if ((operand
->mode
& SIZE
) == 0
1829 && operand
->exp
.X_add_symbol
== 0
1830 && operand
->exp
.X_op_symbol
== 0
1831 && (operand
->exp
.X_add_number
== size
1832 || operand
->exp
.X_add_number
== size
* 2
1833 || operand
->exp
.X_add_number
== size
* 3))
1834 operand
->mode
|= L_2
;
1836 /* Scale down the displacement in an @(d:2,ERn) operand.
1837 X_add_number then contains the desired field value. */
1838 if ((operand
->mode
& SIZE
) == L_2
)
1840 if (operand
->exp
.X_add_number
% size
!= 0)
1841 as_warn (_("operand/size mis-match"));
1842 operand
->exp
.X_add_number
/= size
;
1846 if ((operand
->mode
& SIZE
) == 0)
1847 switch (operand
->mode
& MODE
)
1854 /* Pick a 24-bit address unless we know that a 16-bit address
1855 is safe. get_specific() will relax L_24 into L_32 where
1858 && (operand
->exp
.X_add_number
< -32768
1859 || operand
->exp
.X_add_number
> 32767
1860 || operand
->exp
.X_add_symbol
!= 0
1861 || operand
->exp
.X_op_symbol
!= 0))
1862 operand
->mode
|= L_24
;
1864 operand
->mode
|= L_16
;
1868 /* This condition is long standing, though somewhat suspect. */
1869 if (operand
->exp
.X_add_number
> -128
1870 && operand
->exp
.X_add_number
< 127)
1871 operand
->mode
|= L_8
;
1873 operand
->mode
|= L_16
;
1879 /* This is the guts of the machine-dependent assembler. STR points to
1880 a machine dependent instruction. This function is supposed to emit
1881 the frags/bytes it assembles. */
1889 struct h8_op operand
[3];
1890 const struct h8_instruction
*instruction
;
1891 const struct h8_instruction
*prev_instruction
;
1898 /* Drop leading whitespace. */
1902 /* Find the op code end. */
1903 for (op_start
= op_end
= str
;
1904 *op_end
!= 0 && *op_end
!= ' ';
1914 else if (*op_end
== '/' && ! slash
)
1918 if (op_end
== op_start
)
1920 as_bad (_("can't find opcode "));
1926 /* The assembler stops scanning the opcode at slashes, so it fails
1927 to make characters following them lower case. Fix them. */
1930 *slash
= TOLOWER (*slash
);
1932 instruction
= (const struct h8_instruction
*)
1933 hash_find (opcode_hash_control
, op_start
);
1935 if (instruction
== NULL
)
1937 as_bad (_("unknown opcode"));
1941 /* We used to set input_line_pointer to the result of get_operands,
1942 but that is wrong. Our caller assumes we don't change it. */
1944 operand
[0].mode
= 0;
1945 operand
[1].mode
= 0;
1946 operand
[2].mode
= 0;
1948 if (OP_KIND (instruction
->opcode
->how
) == O_MOVAB
1949 || OP_KIND (instruction
->opcode
->how
) == O_MOVAW
1950 || OP_KIND (instruction
->opcode
->how
) == O_MOVAL
)
1951 get_mova_operands (op_end
, operand
);
1952 else if (OP_KIND (instruction
->opcode
->how
) == O_RTEL
1953 || OP_KIND (instruction
->opcode
->how
) == O_RTSL
)
1954 get_rtsl_operands (op_end
, operand
);
1956 get_operands (instruction
->noperands
, op_end
, operand
);
1959 prev_instruction
= instruction
;
1964 switch (TOLOWER (*dot
))
1979 if (OP_KIND (instruction
->opcode
->how
) == O_MOVAB
||
1980 OP_KIND (instruction
->opcode
->how
) == O_MOVAW
||
1981 OP_KIND (instruction
->opcode
->how
) == O_MOVAL
)
1983 switch (operand
[0].mode
& MODE
)
1987 fix_operand_size (&operand
[1], 1);
1990 fix_operand_size (&operand
[1], 2);
1993 fix_operand_size (&operand
[1], 4);
1999 for (i
= 0; i
< 3 && operand
[i
].mode
!= 0; i
++)
2005 fix_operand_size (&operand
[i
], 1);
2008 fix_operand_size (&operand
[i
], 2);
2011 fix_operand_size (&operand
[i
], 4);
2016 instruction
= get_specific (instruction
, operand
, size
);
2018 if (instruction
== 0)
2020 /* Couldn't find an opcode which matched the operands. */
2021 char *where
= frag_more (2);
2025 clever_message (prev_instruction
, operand
);
2030 build_bytes (instruction
, operand
);
2032 #ifdef BFD_ASSEMBLER
2033 dwarf2_emit_insn (instruction
->length
);
2037 #ifndef BFD_ASSEMBLER
2039 tc_crawl_symbol_chain (headers
)
2040 object_headers
*headers ATTRIBUTE_UNUSED
;
2042 printf (_("call to tc_crawl_symbol_chain \n"));
2047 md_undefined_symbol (name
)
2048 char *name ATTRIBUTE_UNUSED
;
2053 #ifndef BFD_ASSEMBLER
2055 tc_headers_hook (headers
)
2056 object_headers
*headers ATTRIBUTE_UNUSED
;
2058 printf (_("call to tc_headers_hook \n"));
2062 /* Various routines to kill one day */
2063 /* Equal to MAX_PRECISION in atof-ieee.c */
2064 #define MAX_LITTLENUMS 6
2066 /* Turn a string in input_line_pointer into a floating point constant
2067 of type TYPE, and store the appropriate bytes in *LITP. The number
2068 of LITTLENUMS emitted is stored in *SIZEP. An error message is
2069 returned, or NULL on OK. */
2072 md_atof (type
, litP
, sizeP
)
2078 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2079 LITTLENUM_TYPE
*wordP
;
2110 return _("Bad call to MD_ATOF()");
2112 t
= atof_ieee (input_line_pointer
, type
, words
);
2114 input_line_pointer
= t
;
2116 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2117 for (wordP
= words
; prec
--;)
2119 md_number_to_chars (litP
, (long) (*wordP
++), sizeof (LITTLENUM_TYPE
));
2120 litP
+= sizeof (LITTLENUM_TYPE
);
2125 const char *md_shortopts
= "";
2126 struct option md_longopts
[] = {
2127 {NULL
, no_argument
, NULL
, 0}
2130 size_t md_longopts_size
= sizeof (md_longopts
);
2133 md_parse_option (c
, arg
)
2134 int c ATTRIBUTE_UNUSED
;
2135 char *arg ATTRIBUTE_UNUSED
;
2141 md_show_usage (stream
)
2142 FILE *stream ATTRIBUTE_UNUSED
;
2146 void tc_aout_fix_to_chars
PARAMS ((void));
2149 tc_aout_fix_to_chars ()
2151 printf (_("call to tc_aout_fix_to_chars \n"));
2156 md_convert_frag (headers
, seg
, fragP
)
2157 #ifdef BFD_ASSEMBLER
2158 bfd
*headers ATTRIBUTE_UNUSED
;
2160 object_headers
*headers ATTRIBUTE_UNUSED
;
2162 segT seg ATTRIBUTE_UNUSED
;
2163 fragS
*fragP ATTRIBUTE_UNUSED
;
2165 printf (_("call to md_convert_frag \n"));
2169 #ifdef BFD_ASSEMBLER
2171 md_section_align (segment
, size
)
2175 int align
= bfd_get_section_alignment (stdoutput
, segment
);
2176 return ((size
+ (1 << align
) - 1) & (-1 << align
));
2180 md_section_align (seg
, size
)
2184 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2185 & (-1 << section_alignment
[(int) seg
]));
2191 md_apply_fix3 (fixP
, valP
, seg
)
2194 segT seg ATTRIBUTE_UNUSED
;
2196 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2199 switch (fixP
->fx_size
)
2205 *buf
++ = (val
>> 8);
2209 *buf
++ = (val
>> 24);
2210 *buf
++ = (val
>> 16);
2211 *buf
++ = (val
>> 8);
2218 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
2223 md_estimate_size_before_relax (fragP
, segment_type
)
2224 register fragS
*fragP ATTRIBUTE_UNUSED
;
2225 register segT segment_type ATTRIBUTE_UNUSED
;
2227 printf (_("call tomd_estimate_size_before_relax \n"));
2231 /* Put number into target byte order. */
2233 md_number_to_chars (ptr
, use
, nbytes
)
2238 number_to_chars_bigendian (ptr
, use
, nbytes
);
2242 md_pcrel_from (fixP
)
2243 fixS
*fixP ATTRIBUTE_UNUSED
;
2248 #ifndef BFD_ASSEMBLER
2250 tc_reloc_mangle (fix_ptr
, intr
, base
)
2252 struct internal_reloc
*intr
;
2256 symbolS
*symbol_ptr
;
2258 symbol_ptr
= fix_ptr
->fx_addsy
;
2260 /* If this relocation is attached to a symbol then it's ok
2262 if (fix_ptr
->fx_r_type
== TC_CONS_RELOC
)
2264 /* cons likes to create reloc32's whatever the size of the reloc..
2266 switch (fix_ptr
->fx_size
)
2269 intr
->r_type
= R_RELLONG
;
2272 intr
->r_type
= R_RELWORD
;
2275 intr
->r_type
= R_RELBYTE
;
2283 intr
->r_type
= fix_ptr
->fx_r_type
;
2286 intr
->r_vaddr
= fix_ptr
->fx_frag
->fr_address
+ fix_ptr
->fx_where
+ base
;
2287 intr
->r_offset
= fix_ptr
->fx_offset
;
2291 if (symbol_ptr
->sy_number
!= -1)
2292 intr
->r_symndx
= symbol_ptr
->sy_number
;
2297 /* This case arises when a reference is made to `.'. */
2298 segsym
= seg_info (S_GET_SEGMENT (symbol_ptr
))->dot
;
2300 intr
->r_symndx
= -1;
2303 intr
->r_symndx
= segsym
->sy_number
;
2304 intr
->r_offset
+= S_GET_VALUE (symbol_ptr
);
2309 intr
->r_symndx
= -1;
2311 #else /* BFD_ASSEMBLER */
2313 tc_gen_reloc (section
, fixp
)
2314 asection
*section ATTRIBUTE_UNUSED
;
2318 bfd_reloc_code_real_type r_type
;
2320 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
2322 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
2323 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
2325 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2326 "Difference of symbols in different sections is not supported");
2331 rel
= (arelent
*) xmalloc (sizeof (arelent
));
2332 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
2333 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2334 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2335 rel
->addend
= fixp
->fx_offset
;
2337 r_type
= fixp
->fx_r_type
;
2341 fprintf (stderr
, "%s\n", bfd_get_reloc_code_name (r_type
));
2344 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
2345 if (rel
->howto
== NULL
)
2347 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2348 _("Cannot represent relocation type %s"),
2349 bfd_get_reloc_code_name (r_type
));