1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef INFER_ADDR_PREFIX
44 #define INFER_ADDR_PREFIX 1
47 #ifndef SCALE1_WHEN_NO_INDEX
48 /* Specifying a scale factor besides 1 when there is no index is
49 futile. eg. `mov (%ebx,2),%al' does exactly the same as
50 `mov (%ebx),%al'. To slavishly follow what the programmer
51 specified, set SCALE1_WHEN_NO_INDEX to 0. */
52 #define SCALE1_WHEN_NO_INDEX 1
58 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
59 static int fits_in_signed_byte
PARAMS ((long));
60 static int fits_in_unsigned_byte
PARAMS ((long));
61 static int fits_in_unsigned_word
PARAMS ((long));
62 static int fits_in_signed_word
PARAMS ((long));
63 static int smallest_imm_type
PARAMS ((long));
64 static int add_prefix
PARAMS ((unsigned int));
65 static void set_16bit_code_flag
PARAMS ((int));
66 static void set_16bit_gcc_code_flag
PARAMS((int));
67 static void set_intel_syntax
PARAMS ((int));
70 static bfd_reloc_code_real_type reloc
71 PARAMS ((int, int, bfd_reloc_code_real_type
));
74 /* 'md_assemble ()' gathers together information and puts it into a
79 /* TM holds the template for the insn were currently assembling. */
82 /* SUFFIX holds the instruction mnemonic suffix if given.
83 (e.g. 'l' for 'movl') */
86 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
88 /* OPERANDS gives the number of given operands. */
89 unsigned int operands
;
91 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
92 of given register, displacement, memory operands and immediate
94 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
96 /* TYPES [i] is the type (see above #defines) which tells us how to
97 search through DISPS [i] & IMMS [i] & REGS [i] for the required
99 unsigned int types
[MAX_OPERANDS
];
101 /* Displacements (if given) for each operand. */
102 expressionS
*disps
[MAX_OPERANDS
];
104 /* Relocation type for operand */
106 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
108 int disp_reloc
[MAX_OPERANDS
];
111 /* Immediate operands (if given) for each operand. */
112 expressionS
*imms
[MAX_OPERANDS
];
114 /* Register operands (if given) for each operand. */
115 const reg_entry
*regs
[MAX_OPERANDS
];
117 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
118 the base index byte below. */
119 const reg_entry
*base_reg
;
120 const reg_entry
*index_reg
;
121 unsigned int log2_scale_factor
;
123 /* SEG gives the seg_entries of this insn. They are zero unless
124 explicit segment overrides are given. */
125 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
127 /* PREFIX holds all the given prefix opcodes (usually null).
128 PREFIXES is the number of prefix opcodes. */
129 unsigned int prefixes
;
130 unsigned char prefix
[MAX_PREFIXES
];
132 /* RM and SIB are the modrm byte and the sib byte where the
133 addressing modes of this insn are encoded. */
139 typedef struct _i386_insn i386_insn
;
141 /* List of chars besides those in app.c:symbol_chars that can start an
142 operand. Used to prevent the scrubber eating vital white-space. */
144 const char extra_symbol_chars
[] = "*%-(@";
146 const char extra_symbol_chars
[] = "*%-(";
149 /* This array holds the chars that always start a comment. If the
150 pre-processor is disabled, these aren't very useful */
151 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
152 /* Putting '/' here makes it impossible to use the divide operator.
153 However, we need it for compatibility with SVR4 systems. */
154 const char comment_chars
[] = "#/";
155 #define PREFIX_SEPARATOR '\\'
157 const char comment_chars
[] = "#";
158 #define PREFIX_SEPARATOR '/'
161 /* This array holds the chars that only start a comment at the beginning of
162 a line. If the line seems to have the form '# 123 filename'
163 .line and .file directives will appear in the pre-processed output */
164 /* Note that input_file.c hand checks for '#' at the beginning of the
165 first line of the input file. This is because the compiler outputs
166 #NO_APP at the beginning of its output. */
167 /* Also note that comments started like this one will always work if
168 '/' isn't otherwise defined. */
169 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
170 const char line_comment_chars
[] = "";
172 const char line_comment_chars
[] = "/";
175 const char line_separator_chars
[] = "";
177 /* Chars that can be used to separate mant from exp in floating point nums */
178 const char EXP_CHARS
[] = "eE";
180 /* Chars that mean this number is a floating point constant */
183 const char FLT_CHARS
[] = "fFdDxX";
185 /* tables for lexical analysis */
186 static char mnemonic_chars
[256];
187 static char register_chars
[256];
188 static char operand_chars
[256];
189 static char identifier_chars
[256];
190 static char digit_chars
[256];
193 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
194 #define is_operand_char(x) (operand_chars[(unsigned char) x])
195 #define is_register_char(x) (register_chars[(unsigned char) x])
196 #define is_space_char(x) ((x) == ' ')
197 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
198 #define is_digit_char(x) (digit_chars[(unsigned char) x])
200 /* put here all non-digit non-letter charcters that may occur in an operand */
201 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
203 /* md_assemble() always leaves the strings it's passed unaltered. To
204 effect this we maintain a stack of saved characters that we've smashed
205 with '\0's (indicating end of strings for various sub-fields of the
206 assembler instruction). */
207 static char save_stack
[32];
208 static char *save_stack_p
; /* stack pointer */
209 #define END_STRING_AND_SAVE(s) \
210 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
211 #define RESTORE_END_STRING(s) \
212 do { *(s) = *--save_stack_p; } while (0)
214 /* The instruction we're assembling. */
217 /* Possible templates for current insn. */
218 static const templates
*current_templates
;
220 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
221 static expressionS disp_expressions
[2], im_expressions
[2];
223 static int this_operand
; /* current operand we are working on */
225 static int flag_do_long_jump
; /* FIXME what does this do? */
227 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
229 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
231 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
233 static char stackop_size
= '\0'; /* Used in 16 bit gcc mode to add an l
234 suffix to call, ret, enter, leave, push,
235 and pop instructions. */
237 /* Interface to relax_segment.
238 There are 2 relax states for 386 jump insns: one for conditional &
239 one for unconditional jumps. This is because the these two types
240 of jumps add different sizes to frags when we're figuring out what
241 sort of jump to choose to reach a given label. */
244 #define COND_JUMP 1 /* conditional jump */
245 #define UNCOND_JUMP 2 /* unconditional jump */
249 #define SMALL16 (SMALL|CODE16)
251 #define BIG16 (BIG|CODE16)
255 #define INLINE __inline__
261 #define ENCODE_RELAX_STATE(type,size) \
262 ((relax_substateT)((type<<2) | (size)))
263 #define SIZE_FROM_RELAX_STATE(s) \
264 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
266 /* This table is used by relax_frag to promote short jumps to long
267 ones where necessary. SMALL (short) jumps may be promoted to BIG
268 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
269 don't allow a short jump in a 32 bit code segment to be promoted to
270 a 16 bit offset jump because it's slower (requires data size
271 prefix), and doesn't work, unless the destination is in the bottom
272 64k of the code segment (The top 16 bits of eip are zeroed). */
274 const relax_typeS md_relax_table
[] =
277 1) most positive reach of this state,
278 2) most negative reach of this state,
279 3) how many bytes this mode will add to the size of the current frag
280 4) which index into the table to try if we can't fit into this one.
287 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
288 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
289 /* dword conditionals adds 4 bytes to frag:
290 1 extra opcode byte, 3 extra displacement bytes. */
292 /* word conditionals add 2 bytes to frag:
293 1 extra opcode byte, 1 extra displacement byte. */
296 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
297 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
298 /* dword jmp adds 3 bytes to frag:
299 0 extra opcode bytes, 3 extra displacement bytes. */
301 /* word jmp adds 1 byte to frag:
302 0 extra opcode bytes, 1 extra displacement byte. */
309 i386_align_code (fragP
, count
)
313 /* Various efficient no-op patterns for aligning code labels. */
314 /* Note: Don't try to assemble the instructions in the comments. */
315 /* 0L and 0w are not legal */
316 static const char f32_1
[] =
318 static const char f32_2
[] =
319 {0x89,0xf6}; /* movl %esi,%esi */
320 static const char f32_3
[] =
321 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
322 static const char f32_4
[] =
323 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
324 static const char f32_5
[] =
326 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
327 static const char f32_6
[] =
328 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
329 static const char f32_7
[] =
330 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
331 static const char f32_8
[] =
333 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
334 static const char f32_9
[] =
335 {0x89,0xf6, /* movl %esi,%esi */
336 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
337 static const char f32_10
[] =
338 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
339 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
340 static const char f32_11
[] =
341 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
342 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
343 static const char f32_12
[] =
344 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
345 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
346 static const char f32_13
[] =
347 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
348 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
349 static const char f32_14
[] =
350 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
351 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
352 static const char f32_15
[] =
353 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
354 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
355 static const char f16_3
[] =
356 {0x8d,0x74,0x00}; /* lea 0(%esi),%esi */
357 static const char f16_4
[] =
358 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
359 static const char f16_5
[] =
361 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
362 static const char f16_6
[] =
363 {0x89,0xf6, /* mov %si,%si */
364 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
365 static const char f16_7
[] =
366 {0x8d,0x74,0x00, /* lea 0(%si),%si */
367 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
368 static const char f16_8
[] =
369 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
370 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
371 static const char *const f32_patt
[] = {
372 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
373 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
375 static const char *const f16_patt
[] = {
376 f32_1
, f32_2
, f16_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
377 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
380 if (count
> 0 && count
<= 15)
384 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
385 f16_patt
[count
- 1], count
);
386 if (count
> 8) /* adjust jump offset */
387 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
390 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
391 f32_patt
[count
- 1], count
);
392 fragP
->fr_var
= count
;
396 static char *output_invalid
PARAMS ((int c
));
397 static int i386_operand
PARAMS ((char *operand_string
));
398 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
399 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
403 static void s_bss
PARAMS ((int));
406 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
408 static INLINE
unsigned int
409 mode_from_disp_size (t
)
412 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
416 fits_in_signed_byte (num
)
419 return (num
>= -128) && (num
<= 127);
420 } /* fits_in_signed_byte() */
423 fits_in_unsigned_byte (num
)
426 return (num
& 0xff) == num
;
427 } /* fits_in_unsigned_byte() */
430 fits_in_unsigned_word (num
)
433 return (num
& 0xffff) == num
;
434 } /* fits_in_unsigned_word() */
437 fits_in_signed_word (num
)
440 return (-32768 <= num
) && (num
<= 32767);
441 } /* fits_in_signed_word() */
444 smallest_imm_type (num
)
448 /* This code is disabled because all the Imm1 forms in the opcode table
449 are slower on the i486, and they're the versions with the implicitly
450 specified single-position displacement, which has another syntax if
451 you really want to use that form. If you really prefer to have the
452 one-byte-shorter Imm1 form despite these problems, re-enable this
455 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
457 return (fits_in_signed_byte (num
)
458 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
459 : fits_in_unsigned_byte (num
)
460 ? (Imm8
| Imm16
| Imm32
)
461 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
464 } /* smallest_imm_type() */
466 /* Returns 0 if attempting to add a prefix where one from the same
467 class already exists, 1 if non rep/repne added, 2 if rep/repne
481 case CS_PREFIX_OPCODE
:
482 case DS_PREFIX_OPCODE
:
483 case ES_PREFIX_OPCODE
:
484 case FS_PREFIX_OPCODE
:
485 case GS_PREFIX_OPCODE
:
486 case SS_PREFIX_OPCODE
:
490 case REPNE_PREFIX_OPCODE
:
491 case REPE_PREFIX_OPCODE
:
494 case LOCK_PREFIX_OPCODE
:
502 case ADDR_PREFIX_OPCODE
:
506 case DATA_PREFIX_OPCODE
:
513 as_bad (_("same type of prefix used twice"));
518 i
.prefix
[q
] = prefix
;
523 set_16bit_code_flag (new_16bit_code_flag
)
524 int new_16bit_code_flag
;
526 flag_16bit_code
= new_16bit_code_flag
;
531 set_16bit_gcc_code_flag (new_16bit_code_flag
)
532 int new_16bit_code_flag
;
534 flag_16bit_code
= new_16bit_code_flag
;
535 stackop_size
= new_16bit_code_flag
? 'l' : '\0';
539 set_intel_syntax (syntax_flag
)
542 /* Find out if register prefixing is specified. */
543 int ask_naked_reg
= 0;
546 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
548 char *string
= input_line_pointer
;
549 int e
= get_symbol_end ();
551 if (strcmp(string
, "prefix") == 0)
553 else if (strcmp(string
, "noprefix") == 0)
556 as_bad (_("Bad argument to syntax directive."));
557 *input_line_pointer
= e
;
559 demand_empty_rest_of_line ();
561 intel_syntax
= syntax_flag
;
563 if (ask_naked_reg
== 0)
566 allow_naked_reg
= (intel_syntax
567 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
569 allow_naked_reg
= 0; /* conservative default */
573 allow_naked_reg
= (ask_naked_reg
< 0);
576 const pseudo_typeS md_pseudo_table
[] =
581 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
582 {"align", s_align_bytes
, 0},
584 {"align", s_align_ptwo
, 0},
586 {"ffloat", float_cons
, 'f'},
587 {"dfloat", float_cons
, 'd'},
588 {"tfloat", float_cons
, 'x'},
590 {"noopt", s_ignore
, 0},
591 {"optim", s_ignore
, 0},
592 {"code16gcc", set_16bit_gcc_code_flag
, 1},
593 {"code16", set_16bit_code_flag
, 1},
594 {"code32", set_16bit_code_flag
, 0},
595 {"intel_syntax", set_intel_syntax
, 1},
596 {"att_syntax", set_intel_syntax
, 0},
600 /* for interface with expression () */
601 extern char *input_line_pointer
;
603 /* hash table for instruction mnemonic lookup */
604 static struct hash_control
*op_hash
;
605 /* hash table for register lookup */
606 static struct hash_control
*reg_hash
;
612 const char *hash_err
;
614 /* initialize op_hash hash table */
615 op_hash
= hash_new ();
618 register const template *optab
;
619 register templates
*core_optab
;
621 optab
= i386_optab
; /* setup for loop */
622 core_optab
= (templates
*) xmalloc (sizeof (templates
));
623 core_optab
->start
= optab
;
628 if (optab
->name
== NULL
629 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
631 /* different name --> ship out current template list;
632 add to hash table; & begin anew */
633 core_optab
->end
= optab
;
634 hash_err
= hash_insert (op_hash
,
640 as_fatal (_("Internal Error: Can't hash %s: %s"),
644 if (optab
->name
== NULL
)
646 core_optab
= (templates
*) xmalloc (sizeof (templates
));
647 core_optab
->start
= optab
;
652 /* initialize reg_hash hash table */
653 reg_hash
= hash_new ();
655 register const reg_entry
*regtab
;
657 for (regtab
= i386_regtab
;
658 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
661 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
667 /* fill in lexical tables: mnemonic_chars, operand_chars. */
672 for (c
= 0; c
< 256; c
++)
677 mnemonic_chars
[c
] = c
;
678 register_chars
[c
] = c
;
679 operand_chars
[c
] = c
;
681 else if (islower (c
))
683 mnemonic_chars
[c
] = c
;
684 register_chars
[c
] = c
;
685 operand_chars
[c
] = c
;
687 else if (isupper (c
))
689 mnemonic_chars
[c
] = tolower (c
);
690 register_chars
[c
] = mnemonic_chars
[c
];
691 operand_chars
[c
] = c
;
694 if (isalpha (c
) || isdigit (c
))
695 identifier_chars
[c
] = c
;
698 identifier_chars
[c
] = c
;
699 operand_chars
[c
] = c
;
704 identifier_chars
['@'] = '@';
706 digit_chars
['-'] = '-';
707 identifier_chars
['_'] = '_';
708 identifier_chars
['.'] = '.';
710 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
711 operand_chars
[(unsigned char) *p
] = *p
;
714 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
715 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
717 record_alignment (text_section
, 2);
718 record_alignment (data_section
, 2);
719 record_alignment (bss_section
, 2);
725 i386_print_statistics (file
)
728 hash_print_statistics (file
, "i386 opcode", op_hash
);
729 hash_print_statistics (file
, "i386 register", reg_hash
);
735 /* debugging routines for md_assemble */
736 static void pi
PARAMS ((char *, i386_insn
*));
737 static void pte
PARAMS ((template *));
738 static void pt
PARAMS ((unsigned int));
739 static void pe
PARAMS ((expressionS
*));
740 static void ps
PARAMS ((symbolS
*));
747 register template *p
;
750 fprintf (stdout
, "%s: template ", line
);
752 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
753 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
754 fprintf (stdout
, " base %x index %x scale %x\n",
755 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
756 for (i
= 0; i
< x
->operands
; i
++)
758 fprintf (stdout
, " #%d: ", i
+ 1);
760 fprintf (stdout
, "\n");
762 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
| RegXMM
))
763 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
764 if (x
->types
[i
] & Imm
)
766 if (x
->types
[i
] & Disp
)
776 fprintf (stdout
, " %d operands ", t
->operands
);
777 fprintf (stdout
, "opcode %x ",
779 if (t
->extension_opcode
!= None
)
780 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
781 if (t
->opcode_modifier
& D
)
782 fprintf (stdout
, "D");
783 if (t
->opcode_modifier
& W
)
784 fprintf (stdout
, "W");
785 fprintf (stdout
, "\n");
786 for (i
= 0; i
< t
->operands
; i
++)
788 fprintf (stdout
, " #%d type ", i
+ 1);
789 pt (t
->operand_types
[i
]);
790 fprintf (stdout
, "\n");
798 fprintf (stdout
, " operation %d\n", e
->X_op
);
799 fprintf (stdout
, " add_number %ld (%lx)\n",
800 (long) e
->X_add_number
, (long) e
->X_add_number
);
803 fprintf (stdout
, " add_symbol ");
804 ps (e
->X_add_symbol
);
805 fprintf (stdout
, "\n");
809 fprintf (stdout
, " op_symbol ");
811 fprintf (stdout
, "\n");
819 fprintf (stdout
, "%s type %s%s",
821 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
822 segment_name (S_GET_SEGMENT (s
)));
841 { BaseIndex
, "BaseIndex" },
845 { InOutPortReg
, "InOutPortReg" },
846 { ShiftCount
, "ShiftCount" },
847 { Control
, "control reg" },
848 { Test
, "test reg" },
849 { Debug
, "debug reg" },
850 { FloatReg
, "FReg" },
851 { FloatAcc
, "FAcc" },
855 { JumpAbsolute
, "Jump Absolute" },
866 register struct type_name
*ty
;
870 fprintf (stdout
, _("Unknown"));
874 for (ty
= type_names
; ty
->mask
; ty
++)
876 fprintf (stdout
, "%s, ", ty
->tname
);
881 #endif /* DEBUG386 */
884 tc_i386_force_relocation (fixp
)
888 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
889 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
894 return fixp
->fx_r_type
==7;
899 static bfd_reloc_code_real_type reloc
900 PARAMS ((int, int, bfd_reloc_code_real_type
));
902 static bfd_reloc_code_real_type
903 reloc (size
, pcrel
, other
)
906 bfd_reloc_code_real_type other
;
908 if (other
!= NO_RELOC
) return other
;
914 case 1: return BFD_RELOC_8_PCREL
;
915 case 2: return BFD_RELOC_16_PCREL
;
916 case 4: return BFD_RELOC_32_PCREL
;
918 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
924 case 1: return BFD_RELOC_8
;
925 case 2: return BFD_RELOC_16
;
926 case 4: return BFD_RELOC_32
;
928 as_bad (_("Can not do %d byte relocation"), size
);
931 return BFD_RELOC_NONE
;
935 * Here we decide which fixups can be adjusted to make them relative to
936 * the beginning of the section instead of the symbol. Basically we need
937 * to make sure that the dynamic relocations are done correctly, so in
938 * some cases we force the original symbol to be used.
941 tc_i386_fix_adjustable(fixP
)
945 /* Prevent all adjustments to global symbols. */
946 if (S_IS_EXTERN (fixP
->fx_addsy
))
948 if (S_IS_WEAK (fixP
->fx_addsy
))
951 /* adjust_reloc_syms doesn't know about the GOT */
952 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
953 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
954 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
955 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
956 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
961 #define reloc(SIZE,PCREL,OTHER) 0
962 #define BFD_RELOC_16 0
963 #define BFD_RELOC_32 0
964 #define BFD_RELOC_16_PCREL 0
965 #define BFD_RELOC_32_PCREL 0
966 #define BFD_RELOC_386_PLT32 0
967 #define BFD_RELOC_386_GOT32 0
968 #define BFD_RELOC_386_GOTOFF 0
972 intel_float_operand
PARAMS ((char *mnemonic
));
975 intel_float_operand (mnemonic
)
978 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
981 if (mnemonic
[0] == 'f')
987 /* This is the guts of the machine-dependent assembler. LINE points to a
988 machine dependent instruction. This function is supposed to emit
989 the frags/bytes it assembles to. */
995 /* Points to template once we've found it. */
998 /* Count the size of the instruction generated. */
1003 char mnemonic
[MAX_MNEM_SIZE
];
1005 /* Initialize globals. */
1006 memset (&i
, '\0', sizeof (i
));
1007 for (j
= 0; j
< MAX_OPERANDS
; j
++)
1008 i
.disp_reloc
[j
] = NO_RELOC
;
1009 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
1010 memset (im_expressions
, '\0', sizeof (im_expressions
));
1011 save_stack_p
= save_stack
; /* reset stack pointer */
1013 /* First parse an instruction mnemonic & call i386_operand for the operands.
1014 We assume that the scrubber has arranged it so that line[0] is the valid
1015 start of a (possibly prefixed) mnemonic. */
1018 char *token_start
= l
;
1021 /* Non-zero if we found a prefix only acceptable with string insns. */
1022 const char *expecting_string_instruction
= NULL
;
1027 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1030 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1032 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1037 if (!is_space_char (*l
)
1038 && *l
!= END_OF_INSN
1039 && *l
!= PREFIX_SEPARATOR
)
1041 as_bad (_("invalid character %s in mnemonic"),
1042 output_invalid (*l
));
1045 if (token_start
== l
)
1047 if (*l
== PREFIX_SEPARATOR
)
1048 as_bad (_("expecting prefix; got nothing"));
1050 as_bad (_("expecting mnemonic; got nothing"));
1054 /* Look up instruction (or prefix) via hash table. */
1055 current_templates
= hash_find (op_hash
, mnemonic
);
1057 if (*l
!= END_OF_INSN
1058 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1059 && current_templates
1060 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1062 /* If we are in 16-bit mode, do not allow addr16 or data16.
1063 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1064 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1065 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1068 as_bad (_("redundant %s prefix"),
1069 current_templates
->start
->name
);
1072 /* Add prefix, checking for repeated prefixes. */
1073 switch (add_prefix (current_templates
->start
->base_opcode
))
1078 expecting_string_instruction
=
1079 current_templates
->start
->name
;
1082 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1089 if (!current_templates
)
1091 /* See if we can get a match by trimming off a suffix. */
1094 case DWORD_MNEM_SUFFIX
:
1095 case WORD_MNEM_SUFFIX
:
1096 case BYTE_MNEM_SUFFIX
:
1097 case SHORT_MNEM_SUFFIX
:
1098 #if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
1099 case LONG_MNEM_SUFFIX
:
1101 i
.suffix
= mnem_p
[-1];
1103 current_templates
= hash_find (op_hash
, mnemonic
);
1107 case INTEL_DWORD_MNEM_SUFFIX
:
1110 i
.suffix
= mnem_p
[-1];
1112 current_templates
= hash_find (op_hash
, mnemonic
);
1116 if (!current_templates
)
1118 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1123 /* check for rep/repne without a string instruction */
1124 if (expecting_string_instruction
1125 && !(current_templates
->start
->opcode_modifier
& IsString
))
1127 as_bad (_("expecting string instruction after `%s'"),
1128 expecting_string_instruction
);
1132 /* There may be operands to parse. */
1133 if (*l
!= END_OF_INSN
)
1135 /* parse operands */
1137 /* 1 if operand is pending after ','. */
1138 unsigned int expecting_operand
= 0;
1140 /* Non-zero if operand parens not balanced. */
1141 unsigned int paren_not_balanced
;
1145 /* skip optional white space before operand */
1146 if (is_space_char (*l
))
1148 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1150 as_bad (_("invalid character %s before operand %d"),
1151 output_invalid (*l
),
1155 token_start
= l
; /* after white space */
1156 paren_not_balanced
= 0;
1157 while (paren_not_balanced
|| *l
!= ',')
1159 if (*l
== END_OF_INSN
)
1161 if (paren_not_balanced
)
1164 as_bad (_("unbalanced parenthesis in operand %d."),
1167 as_bad (_("unbalanced brackets in operand %d."),
1172 break; /* we are done */
1174 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1176 as_bad (_("invalid character %s in operand %d"),
1177 output_invalid (*l
),
1184 ++paren_not_balanced
;
1186 --paren_not_balanced
;
1191 ++paren_not_balanced
;
1193 --paren_not_balanced
;
1197 if (l
!= token_start
)
1198 { /* yes, we've read in another operand */
1199 unsigned int operand_ok
;
1200 this_operand
= i
.operands
++;
1201 if (i
.operands
> MAX_OPERANDS
)
1203 as_bad (_("spurious operands; (%d operands/instruction max)"),
1207 /* now parse operand adding info to 'i' as we go along */
1208 END_STRING_AND_SAVE (l
);
1211 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1213 operand_ok
= i386_operand (token_start
);
1215 RESTORE_END_STRING (l
); /* restore old contents */
1221 if (expecting_operand
)
1223 expecting_operand_after_comma
:
1224 as_bad (_("expecting operand after ','; got nothing"));
1229 as_bad (_("expecting operand before ','; got nothing"));
1234 /* now *l must be either ',' or END_OF_INSN */
1237 if (*++l
== END_OF_INSN
)
1238 { /* just skip it, if it's \n complain */
1239 goto expecting_operand_after_comma
;
1241 expecting_operand
= 1;
1244 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1248 /* Now we've parsed the mnemonic into a set of templates, and have the
1251 Next, we find a template that matches the given insn,
1252 making sure the overlap of the given operands types is consistent
1253 with the template operand types. */
1255 #define MATCH(overlap, given, template) \
1257 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1258 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1260 /* If given types r0 and r1 are registers they must be of the same type
1261 unless the expected operand type register overlap is null.
1262 Note that Acc in a template matches every size of reg. */
1263 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1264 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1265 ((g0) & Reg) == ((g1) & Reg) || \
1266 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1269 register unsigned int overlap0
, overlap1
;
1270 unsigned int overlap2
;
1271 unsigned int found_reverse_match
;
1274 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1276 && (strcmp (mnemonic
, "enter") != 0)
1277 && (strcmp (mnemonic
, "bound") != 0)
1278 && (strncmp (mnemonic
, "fsub", 4) !=0)
1279 && (strncmp (mnemonic
, "fdiv", 4) !=0))
1281 const reg_entry
*temp_reg
= NULL
;
1282 expressionS
*temp_disp
= NULL
;
1283 expressionS
*temp_imm
= NULL
;
1284 unsigned int temp_type
;
1288 if (i
.operands
== 2)
1293 else if (i
.operands
== 3)
1301 temp_type
= i
.types
[xchg2
];
1302 if (temp_type
& (Reg
| FloatReg
))
1303 temp_reg
= i
.regs
[xchg2
];
1304 else if (temp_type
& Imm
)
1305 temp_imm
= i
.imms
[xchg2
];
1306 else if (temp_type
& Disp
)
1307 temp_disp
= i
.disps
[xchg2
];
1309 i
.types
[xchg2
] = i
.types
[xchg1
];
1311 if (i
.types
[xchg1
] & (Reg
| FloatReg
))
1313 i
.regs
[xchg2
] = i
.regs
[xchg1
];
1314 i
.regs
[xchg1
] = NULL
;
1316 else if (i
.types
[xchg2
] & Imm
)
1318 i
.imms
[xchg2
] = i
.imms
[xchg1
];
1319 i
.imms
[xchg1
] = NULL
;
1321 else if (i
.types
[xchg2
] & Disp
)
1323 i
.disps
[xchg2
] = i
.disps
[xchg1
];
1324 i
.disps
[xchg1
] = NULL
;
1327 if (temp_type
& (Reg
| FloatReg
))
1329 i
.regs
[xchg1
] = temp_reg
;
1330 if (! (i
.types
[xchg1
] & (Reg
| FloatReg
)))
1331 i
.regs
[xchg2
] = NULL
;
1333 else if (temp_type
& Imm
)
1335 i
.imms
[xchg1
] = temp_imm
;
1336 if (! (i
.types
[xchg1
] & Imm
))
1337 i
.imms
[xchg2
] = NULL
;
1339 else if (temp_type
& Disp
)
1341 i
.disps
[xchg1
] = temp_disp
;
1342 if (! (i
.types
[xchg1
] & Disp
))
1343 i
.disps
[xchg2
] = NULL
;
1346 i
.types
[xchg1
] = temp_type
;
1348 if (!strcmp(mnemonic
,"jmp")
1349 || !strcmp (mnemonic
, "call"))
1350 if ((i
.types
[0] & Reg
) || i
.types
[0] & BaseIndex
)
1351 i
.types
[0] |= JumpAbsolute
;
1357 found_reverse_match
= 0;
1358 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1360 : (i
.suffix
== WORD_MNEM_SUFFIX
1362 : (i
.suffix
== SHORT_MNEM_SUFFIX
1364 : (i
.suffix
== LONG_MNEM_SUFFIX
1366 : (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
1368 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1370 for (t
= current_templates
->start
;
1371 t
< current_templates
->end
;
1374 /* Must have right number of operands. */
1375 if (i
.operands
!= t
->operands
)
1378 /* For some opcodes, don't check the suffix */
1381 if (strcmp (t
->name
, "fnstcw")
1382 && strcmp (t
->name
, "fldcw")
1383 && (t
->opcode_modifier
& suffix_check
))
1386 /* Must not have disallowed suffix. */
1387 else if ((t
->opcode_modifier
& suffix_check
))
1390 else if (!t
->operands
)
1391 break; /* 0 operands always matches */
1393 overlap0
= i
.types
[0] & t
->operand_types
[0];
1394 switch (t
->operands
)
1397 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1402 overlap1
= i
.types
[1] & t
->operand_types
[1];
1403 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1404 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1405 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1406 t
->operand_types
[0],
1407 overlap1
, i
.types
[1],
1408 t
->operand_types
[1]))
1411 /* check if other direction is valid ... */
1412 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1415 /* try reversing direction of operands */
1416 overlap0
= i
.types
[0] & t
->operand_types
[1];
1417 overlap1
= i
.types
[1] & t
->operand_types
[0];
1418 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1419 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1420 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1421 t
->operand_types
[1],
1422 overlap1
, i
.types
[1],
1423 t
->operand_types
[0]))
1425 /* does not match either direction */
1428 /* found_reverse_match holds which of D or FloatDR
1430 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1433 /* found a forward 2 operand match here */
1434 if (t
->operands
== 3)
1436 /* Here we make use of the fact that there are no
1437 reverse match 3 operand instructions, and all 3
1438 operand instructions only need to be checked for
1439 register consistency between operands 2 and 3. */
1440 overlap2
= i
.types
[2] & t
->operand_types
[2];
1441 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1442 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1443 t
->operand_types
[1],
1444 overlap2
, i
.types
[2],
1445 t
->operand_types
[2]))
1449 /* found either forward/reverse 2 or 3 operand match here:
1450 slip through to break */
1452 break; /* we've found a match; break out of loop */
1453 } /* for (t = ... */
1454 if (t
== current_templates
->end
)
1455 { /* we found no match */
1456 as_bad (_("suffix or operands invalid for `%s'"),
1457 current_templates
->start
->name
);
1461 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1463 /* Warn them that a data or address size prefix doesn't affect
1464 assembly of the next line of code. */
1465 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1468 /* Copy the template we found. */
1470 if (found_reverse_match
)
1472 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1473 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1477 if (i
.tm
.opcode_modifier
& FWait
)
1478 if (! add_prefix (FWAIT_OPCODE
))
1481 /* Check string instruction segment overrides */
1482 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1484 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1485 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1487 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1489 as_bad (_("`%s' operand %d must use `%%es' segment"),
1494 /* There's only ever one segment override allowed per instruction.
1495 This instruction possibly has a legal segment override on the
1496 second operand, so copy the segment to where non-string
1497 instructions store it, allowing common code. */
1498 i
.seg
[0] = i
.seg
[1];
1500 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1502 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1504 as_bad (_("`%s' operand %d must use `%%es' segment"),
1512 /* If matched instruction specifies an explicit instruction mnemonic
1514 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1516 if (i
.tm
.opcode_modifier
& Size16
)
1517 i
.suffix
= WORD_MNEM_SUFFIX
;
1519 i
.suffix
= DWORD_MNEM_SUFFIX
;
1521 else if (i
.reg_operands
)
1523 /* If there's no instruction mnemonic suffix we try to invent one
1524 based on register operands. */
1527 /* We take i.suffix from the last register operand specified,
1528 Destination register type is more significant than source
1531 for (op
= i
.operands
; --op
>= 0; )
1532 if (i
.types
[op
] & Reg
)
1534 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1535 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1540 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1543 for (op
= i
.operands
; --op
>= 0; )
1545 /* If this is an eight bit register, it's OK. If it's
1546 the 16 or 32 bit version of an eight bit register,
1547 we will just use the low portion, and that's OK too. */
1548 if (i
.types
[op
] & Reg8
)
1551 /* movzx and movsx should not generate this warning. */
1553 && (i
.tm
.base_opcode
== 0xfb7
1554 || i
.tm
.base_opcode
== 0xfb6
1555 || i
.tm
.base_opcode
== 0xfbe
1556 || i
.tm
.base_opcode
== 0xfbf))
1559 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1561 /* Check that the template allows eight bit regs
1562 This kills insns such as `orb $1,%edx', which
1563 maybe should be allowed. */
1564 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1568 #if REGISTER_WARNINGS
1569 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1570 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1571 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1572 i
.regs
[op
]->reg_name
,
1577 /* Any other register is bad */
1578 if (i
.types
[op
] & (Reg
| RegMMX
| RegXMM
1580 | Control
| Debug
| Test
1581 | FloatReg
| FloatAcc
))
1583 as_bad (_("`%%%s' not allowed with `%s%c'"),
1584 i
.regs
[op
]->reg_name
,
1591 else if (i
.suffix
== DWORD_MNEM_SUFFIX
)
1594 for (op
= i
.operands
; --op
>= 0; )
1595 /* Reject eight bit registers, except where the template
1596 requires them. (eg. movzb) */
1597 if ((i
.types
[op
] & Reg8
) != 0
1598 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1600 as_bad (_("`%%%s' not allowed with `%s%c'"),
1601 i
.regs
[op
]->reg_name
,
1606 #if REGISTER_WARNINGS
1607 /* Warn if the e prefix on a general reg is missing. */
1608 else if ((i
.types
[op
] & Reg16
) != 0
1609 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1611 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1612 (i
.regs
[op
] + 8)->reg_name
,
1613 i
.regs
[op
]->reg_name
,
1618 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1621 for (op
= i
.operands
; --op
>= 0; )
1622 /* Reject eight bit registers, except where the template
1623 requires them. (eg. movzb) */
1624 if ((i
.types
[op
] & Reg8
) != 0
1625 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1627 as_bad (_("`%%%s' not allowed with `%s%c'"),
1628 i
.regs
[op
]->reg_name
,
1633 #if REGISTER_WARNINGS
1634 /* Warn if the e prefix on a general reg is present. */
1635 else if ((i
.types
[op
] & Reg32
) != 0
1636 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1638 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1639 (i
.regs
[op
] - 8)->reg_name
,
1640 i
.regs
[op
]->reg_name
,
1648 else if ((i
.tm
.opcode_modifier
& DefaultSize
) && !i
.suffix
)
1650 i
.suffix
= stackop_size
;
1653 /* Make still unresolved immediate matches conform to size of immediate
1654 given in i.suffix. Note: overlap2 cannot be an immediate! */
1655 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1656 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1657 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1661 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1662 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1664 else if (overlap0
== (Imm16
| Imm32
))
1667 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1671 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1675 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1676 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1677 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1681 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1682 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1684 else if (overlap1
== (Imm16
| Imm32
))
1687 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1691 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1695 assert ((overlap2
& Imm
) == 0);
1697 i
.types
[0] = overlap0
;
1698 if (overlap0
& ImplicitRegister
)
1700 if (overlap0
& Imm1
)
1701 i
.imm_operands
= 0; /* kludge for shift insns */
1703 i
.types
[1] = overlap1
;
1704 if (overlap1
& ImplicitRegister
)
1707 i
.types
[2] = overlap2
;
1708 if (overlap2
& ImplicitRegister
)
1711 /* Finalize opcode. First, we change the opcode based on the operand
1712 size given by i.suffix: We need not change things for byte insns. */
1714 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1716 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1720 /* For movzx and movsx, need to check the register type */
1722 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1723 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1725 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1727 if ((i
.regs
[1]->reg_type
& Reg16
) != 0)
1728 if (!add_prefix (prefix
))
1732 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1734 /* It's not a byte, select word/dword operation. */
1735 if (i
.tm
.opcode_modifier
& W
)
1737 if (i
.tm
.opcode_modifier
& ShortForm
)
1738 i
.tm
.base_opcode
|= 8;
1740 i
.tm
.base_opcode
|= 1;
1742 /* Now select between word & dword operations via the operand
1743 size prefix, except for instructions that will ignore this
1745 if (((intel_syntax
&& (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1746 || i
.suffix
== DWORD_MNEM_SUFFIX
1747 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1748 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1750 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1751 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1752 prefix
= ADDR_PREFIX_OPCODE
;
1754 if (! add_prefix (prefix
))
1757 /* Size floating point instruction. */
1758 if (i
.suffix
== LONG_MNEM_SUFFIX
1759 || (intel_syntax
&& i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1761 if (i
.tm
.opcode_modifier
& FloatMF
)
1762 i
.tm
.base_opcode
^= 4;
1766 if (i
.tm
.opcode_modifier
& ImmExt
)
1768 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1769 opcode suffix which is coded in the same place as an 8-bit
1770 immediate field would be. Here we fake an 8-bit immediate
1771 operand from the opcode suffix stored in tm.extension_opcode. */
1775 assert(i
.imm_operands
== 0 && i
.operands
<= 2);
1777 exp
= &im_expressions
[i
.imm_operands
++];
1778 i
.imms
[i
.operands
] = exp
;
1779 i
.types
[i
.operands
++] = Imm8
;
1780 exp
->X_op
= O_constant
;
1781 exp
->X_add_number
= i
.tm
.extension_opcode
;
1782 i
.tm
.extension_opcode
= None
;
1785 /* For insns with operands there are more diddles to do to the opcode. */
1788 /* Default segment register this instruction will use
1789 for memory accesses. 0 means unknown.
1790 This is only for optimizing out unnecessary segment overrides. */
1791 const seg_entry
*default_seg
= 0;
1793 /* If we found a reverse match we must alter the opcode
1794 direction bit. found_reverse_match holds bits to change
1795 (different for int & float insns). */
1797 i
.tm
.base_opcode
^= found_reverse_match
;
1799 /* The imul $imm, %reg instruction is converted into
1800 imul $imm, %reg, %reg, and the clr %reg instruction
1801 is converted into xor %reg, %reg. */
1802 if (i
.tm
.opcode_modifier
& regKludge
)
1804 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1805 /* Pretend we saw the extra register operand. */
1806 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1810 if (i
.tm
.opcode_modifier
& ShortForm
)
1812 /* The register or float register operand is in operand 0 or 1. */
1813 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1814 /* Register goes in low 3 bits of opcode. */
1815 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1816 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1818 /* Warn about some common errors, but press on regardless.
1819 The first case can be generated by gcc (<= 2.8.1). */
1820 if (i
.operands
== 2)
1822 /* reversed arguments on faddp, fsubp, etc. */
1823 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1824 i
.regs
[1]->reg_name
,
1825 i
.regs
[0]->reg_name
);
1829 /* extraneous `l' suffix on fp insn */
1830 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1831 i
.regs
[0]->reg_name
);
1835 else if (i
.tm
.opcode_modifier
& Modrm
)
1837 /* The opcode is completed (modulo i.tm.extension_opcode which
1838 must be put into the modrm byte).
1839 Now, we make the modrm & index base bytes based on all the
1840 info we've collected. */
1842 /* i.reg_operands MUST be the number of real register operands;
1843 implicit registers do not count. */
1844 if (i
.reg_operands
== 2)
1846 unsigned int source
, dest
;
1847 source
= ((i
.types
[0]
1848 & (Reg
| RegMMX
| RegXMM
1850 | Control
| Debug
| Test
))
1855 /* One of the register operands will be encoded in the
1856 i.tm.reg field, the other in the combined i.tm.mode
1857 and i.tm.regmem fields. If no form of this
1858 instruction supports a memory destination operand,
1859 then we assume the source operand may sometimes be
1860 a memory operand and so we need to store the
1861 destination in the i.rm.reg field. */
1862 if ((i
.tm
.operand_types
[dest
] & AnyMem
) == 0)
1864 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1865 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1869 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1870 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1874 { /* if it's not 2 reg operands... */
1877 unsigned int fake_zero_displacement
= 0;
1878 unsigned int op
= ((i
.types
[0] & AnyMem
)
1880 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1887 if (! i
.disp_operands
)
1888 fake_zero_displacement
= 1;
1891 /* Operand is just <disp> */
1892 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1894 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1895 i
.types
[op
] &= ~Disp
;
1896 i
.types
[op
] |= Disp16
;
1900 i
.rm
.regmem
= NO_BASE_REGISTER
;
1901 i
.types
[op
] &= ~Disp
;
1902 i
.types
[op
] |= Disp32
;
1905 else /* ! i.base_reg && i.index_reg */
1907 i
.sib
.index
= i
.index_reg
->reg_num
;
1908 i
.sib
.base
= NO_BASE_REGISTER
;
1909 i
.sib
.scale
= i
.log2_scale_factor
;
1910 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1911 i
.types
[op
] &= ~Disp
;
1912 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1915 else if (i
.base_reg
->reg_type
& Reg16
)
1917 switch (i
.base_reg
->reg_num
)
1922 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1923 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1930 if ((i
.types
[op
] & Disp
) == 0)
1932 /* fake (%bp) into 0(%bp) */
1933 i
.types
[op
] |= Disp8
;
1934 fake_zero_displacement
= 1;
1937 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1938 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1940 default: /* (%si) -> 4 or (%di) -> 5 */
1941 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1943 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1945 else /* i.base_reg and 32 bit mode */
1947 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1948 i
.sib
.base
= i
.base_reg
->reg_num
;
1949 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1952 if (i
.disp_operands
== 0)
1954 fake_zero_displacement
= 1;
1955 i
.types
[op
] |= Disp8
;
1958 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1962 i
.sib
.scale
= i
.log2_scale_factor
;
1965 /* <disp>(%esp) becomes two byte modrm
1966 with no index register. We've already
1967 stored the code for esp in i.rm.regmem
1968 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1969 base register besides %esp will not use
1970 the extra modrm byte. */
1971 i
.sib
.index
= NO_INDEX_REGISTER
;
1972 #if ! SCALE1_WHEN_NO_INDEX
1973 /* Another case where we force the second
1975 if (i
.log2_scale_factor
)
1976 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1981 i
.sib
.index
= i
.index_reg
->reg_num
;
1982 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1984 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1987 if (fake_zero_displacement
)
1989 /* Fakes a zero displacement assuming that i.types[op]
1990 holds the correct displacement size. */
1993 exp
= &disp_expressions
[i
.disp_operands
++];
1995 exp
->X_op
= O_constant
;
1996 exp
->X_add_number
= 0;
1997 exp
->X_add_symbol
= (symbolS
*) 0;
1998 exp
->X_op_symbol
= (symbolS
*) 0;
2002 /* Fill in i.rm.reg or i.rm.regmem field with register
2003 operand (if any) based on i.tm.extension_opcode.
2004 Again, we must be careful to make sure that
2005 segment/control/debug/test/MMX registers are coded
2006 into the i.rm.reg field. */
2011 & (Reg
| RegMMX
| RegXMM
2013 | Control
| Debug
| Test
))
2016 & (Reg
| RegMMX
| RegXMM
2018 | Control
| Debug
| Test
))
2021 /* If there is an extension opcode to put here, the
2022 register number must be put into the regmem field. */
2023 if (i
.tm
.extension_opcode
!= None
)
2024 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
2026 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
2028 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
2029 we must set it to 3 to indicate this is a register
2030 operand in the regmem field. */
2031 if (!i
.mem_operands
)
2035 /* Fill in i.rm.reg field with extension opcode (if any). */
2036 if (i
.tm
.extension_opcode
!= None
)
2037 i
.rm
.reg
= i
.tm
.extension_opcode
;
2040 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
2042 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
2044 as_bad (_("you can't `pop %%cs'"));
2047 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
2049 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2053 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2055 /* For the string instructions that allow a segment override
2056 on one of their operands, the default segment is ds. */
2060 /* If a segment was explicitly specified,
2061 and the specified segment is not the default,
2062 use an opcode prefix to select it.
2063 If we never figured out what the default segment is,
2064 then default_seg will be zero at this point,
2065 and the specified segment prefix will always be used. */
2066 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2068 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2072 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2074 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */
2075 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2079 /* Handle conversion of 'int $3' --> special int3 insn. */
2080 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
2082 i
.tm
.base_opcode
= INT3_OPCODE
;
2086 /* We are ready to output the insn. */
2091 if (i
.tm
.opcode_modifier
& Jump
)
2093 long n
= (long) i
.disps
[0]->X_add_number
;
2094 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
2102 if (flag_16bit_code
)
2105 if (!intel_syntax
&& (i
.prefixes
!= 0))
2106 as_warn (_("skipping prefixes on this instruction"));
2108 if (i
.disps
[0]->X_op
== O_constant
)
2110 if (fits_in_signed_byte (n
))
2114 p
[0] = i
.tm
.base_opcode
;
2119 /* Use 16-bit jumps only for 16-bit code,
2120 because text segments are limited to 64K anyway;
2121 Use 32-bit jumps for 32-bit code, because they're faster,
2122 and a 16-bit jump will clear the top 16 bits of %eip. */
2123 int jmp_size
= code16
? 2 : 4;
2124 if (code16
&& !fits_in_signed_word (n
))
2126 as_bad (_("16-bit jump out of range"));
2130 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
2132 /* unconditional jump */
2133 insn_size
+= prefix
+ 1 + jmp_size
;
2134 p
= frag_more (prefix
+ 1 + jmp_size
);
2136 *p
++ = DATA_PREFIX_OPCODE
;
2138 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2142 /* conditional jump */
2143 insn_size
+= prefix
+ 2 + jmp_size
;
2144 p
= frag_more (prefix
+ 2 + jmp_size
);
2146 *p
++ = DATA_PREFIX_OPCODE
;
2147 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
2148 *p
++ = i
.tm
.base_opcode
+ 0x10;
2149 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2155 int size
= code16
? 2 : 4;
2157 /* It's a symbol; end frag & setup for relax.
2158 Make sure there are more than 6 chars left in the current frag;
2159 if not we'll have to start a new one. */
2160 frag_grow (prefix
+ 1 + 2 + size
);
2161 insn_size
+= 1 + prefix
;
2162 p
= frag_more (1 + prefix
);
2164 *p
++ = DATA_PREFIX_OPCODE
;
2165 *p
= i
.tm
.base_opcode
;
2166 frag_var (rs_machine_dependent
,
2167 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
2169 ((unsigned char) *p
== JUMP_PC_RELATIVE
2170 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2171 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2172 i
.disps
[0]->X_add_symbol
,
2176 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2178 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
2179 long n
= (long) i
.disps
[0]->X_add_number
;
2181 if (size
== 1) /* then this is a loop or jecxz type instruction */
2183 if (i
.prefix
[ADDR_PREFIX
])
2186 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2194 if (i
.prefix
[DATA_PREFIX
])
2197 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2201 if (flag_16bit_code
)
2208 if (!intel_syntax
&& (i
.prefixes
!= 0))
2209 as_warn (_("skipping prefixes on this instruction"));
2211 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2213 insn_size
+= 1 + size
;
2214 p
= frag_more (1 + size
);
2218 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
2219 p
= frag_more (2 + size
);
2220 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2222 *p
++ = i
.tm
.base_opcode
& 0xff;
2224 if (i
.disps
[0]->X_op
== O_constant
)
2226 if (size
== 1 && !fits_in_signed_byte (n
))
2228 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
2231 else if (size
== 2 && !fits_in_signed_word (n
))
2233 as_bad (_("16-bit jump out of range"));
2236 md_number_to_chars (p
, (valueT
) n
, size
);
2240 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2241 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
2245 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2249 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
2257 if (flag_16bit_code
)
2261 reloc_type
= BFD_RELOC_32
;
2265 reloc_type
= BFD_RELOC_16
;
2268 if (!intel_syntax
&& (i
.prefixes
!= 0))
2269 as_warn (_("skipping prefixes on this instruction"));
2271 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2272 p
= frag_more (prefix
+ 1 + 2 + size
);
2274 *p
++ = DATA_PREFIX_OPCODE
;
2275 *p
++ = i
.tm
.base_opcode
;
2276 if (i
.imms
[1]->X_op
== O_constant
)
2278 long n
= (long) i
.imms
[1]->X_add_number
;
2280 if (size
== 2 && !fits_in_unsigned_word (n
))
2282 as_bad (_("16-bit jump out of range"));
2285 md_number_to_chars (p
, (valueT
) n
, size
);
2288 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2289 i
.imms
[1], 0, reloc_type
);
2290 if (i
.imms
[0]->X_op
!= O_constant
)
2291 as_bad (_("can't handle non absolute segment in `%s'"),
2293 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2297 /* Output normal instructions here. */
2300 /* The prefix bytes. */
2302 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2309 md_number_to_chars (p
, (valueT
) *q
, 1);
2313 /* Now the opcode; be careful about word order here! */
2314 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2317 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2319 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2323 /* put out high byte first: can't use md_number_to_chars! */
2324 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2325 *p
= i
.tm
.base_opcode
& 0xff;
2328 { /* opcode is either 3 or 4 bytes */
2329 if (i
.tm
.base_opcode
& 0xff000000)
2333 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2340 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2341 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2342 *p
= (i
.tm
.base_opcode
) & 0xff;
2345 /* Now the modrm byte and sib byte (if present). */
2346 if (i
.tm
.opcode_modifier
& Modrm
)
2350 md_number_to_chars (p
,
2351 (valueT
) (i
.rm
.regmem
<< 0
2355 /* If i.rm.regmem == ESP (4)
2356 && i.rm.mode != (Register mode)
2358 ==> need second modrm byte. */
2359 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2361 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2365 md_number_to_chars (p
,
2366 (valueT
) (i
.sib
.base
<< 0
2368 | i
.sib
.scale
<< 6),
2373 if (i
.disp_operands
)
2375 register unsigned int n
;
2377 for (n
= 0; n
< i
.operands
; n
++)
2381 if (i
.disps
[n
]->X_op
== O_constant
)
2384 long val
= (long) i
.disps
[n
]->X_add_number
;
2386 if (i
.types
[n
] & (Disp8
| Disp16
))
2391 mask
= ~ (long) 0xffff;
2392 if (i
.types
[n
] & Disp8
)
2395 mask
= ~ (long) 0xff;
2398 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2399 as_warn (_("%ld shortened to %ld"),
2403 p
= frag_more (size
);
2404 md_number_to_chars (p
, (valueT
) val
, size
);
2406 else if (i
.types
[n
] & Disp32
)
2410 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2412 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2415 { /* must be Disp16 */
2418 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2420 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2424 } /* end displacement output */
2426 /* output immediate */
2429 register unsigned int n
;
2431 for (n
= 0; n
< i
.operands
; n
++)
2435 if (i
.imms
[n
]->X_op
== O_constant
)
2438 long val
= (long) i
.imms
[n
]->X_add_number
;
2440 if (i
.types
[n
] & (Imm8
| Imm8S
| Imm16
))
2445 mask
= ~ (long) 0xffff;
2446 if (i
.types
[n
] & (Imm8
| Imm8S
))
2449 mask
= ~ (long) 0xff;
2451 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2452 as_warn (_("%ld shortened to %ld"),
2456 p
= frag_more (size
);
2457 md_number_to_chars (p
, (valueT
) val
, size
);
2460 { /* not absolute_section */
2461 /* Need a 32-bit fixup (don't support 8bit
2462 non-absolute ims). Try to support other
2468 if (i
.types
[n
] & (Imm8
| Imm8S
))
2470 else if (i
.types
[n
] & Imm16
)
2475 p
= frag_more (size
);
2476 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2477 #ifdef BFD_ASSEMBLER
2478 if (r_type
== BFD_RELOC_32
2480 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2481 && (i
.imms
[n
]->X_op
== O_symbol
2482 || (i
.imms
[n
]->X_op
== O_add
2483 && ((symbol_get_value_expression
2484 (i
.imms
[n
]->X_op_symbol
)->X_op
)
2487 r_type
= BFD_RELOC_386_GOTPC
;
2488 i
.imms
[n
]->X_add_number
+= 3;
2491 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2492 i
.imms
[n
], pcrel
, r_type
);
2496 } /* end immediate output */
2504 #endif /* DEBUG386 */
2508 static int i386_is_reg
PARAMS ((char *));
2511 i386_is_reg (reg_string
)
2514 register char *s
= reg_string
;
2516 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
2518 if (is_space_char (*s
))
2522 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
2523 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2526 if (!hash_find (reg_hash
, reg_name_given
))
2532 static int i386_immediate
PARAMS ((char *));
2535 i386_immediate (imm_start
)
2538 char *save_input_line_pointer
;
2542 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2544 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2548 exp
= &im_expressions
[i
.imm_operands
++];
2549 i
.imms
[this_operand
] = exp
;
2551 if (is_space_char (*imm_start
))
2554 save_input_line_pointer
= input_line_pointer
;
2555 input_line_pointer
= imm_start
;
2560 * We can have operands of the form
2561 * <symbol>@GOTOFF+<nnn>
2562 * Take the easy way out here and copy everything
2563 * into a temporary buffer...
2567 cp
= strchr (input_line_pointer
, '@');
2574 /* GOT relocations are not supported in 16 bit mode */
2575 if (flag_16bit_code
)
2576 as_bad (_("GOT relocations not supported in 16 bit mode"));
2578 if (GOT_symbol
== NULL
)
2579 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2581 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2583 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2586 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2588 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2591 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2593 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2597 as_bad (_("Bad reloc specifier in expression"));
2599 /* Replace the relocation token with ' ', so that errors like
2600 foo@GOTOFF1 will be detected. */
2601 first
= cp
- input_line_pointer
;
2602 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2603 memcpy (tmpbuf
, input_line_pointer
, first
);
2604 tmpbuf
[first
] = ' ';
2605 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2606 input_line_pointer
= tmpbuf
;
2611 exp_seg
= expression (exp
);
2614 if (*input_line_pointer
)
2615 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2617 input_line_pointer
= save_input_line_pointer
;
2619 if (exp
->X_op
== O_absent
)
2621 /* missing or bad expr becomes absolute 0 */
2622 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2624 exp
->X_op
= O_constant
;
2625 exp
->X_add_number
= 0;
2626 exp
->X_add_symbol
= (symbolS
*) 0;
2627 exp
->X_op_symbol
= (symbolS
*) 0;
2628 i
.types
[this_operand
] |= Imm
;
2630 else if (exp
->X_op
== O_constant
)
2633 if (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0))
2636 i
.types
[this_operand
] |=
2637 (bigimm
| smallest_imm_type ((long) exp
->X_add_number
));
2639 /* If a suffix is given, this operand may be shortended. */
2642 case WORD_MNEM_SUFFIX
:
2643 i
.types
[this_operand
] |= Imm16
;
2645 case BYTE_MNEM_SUFFIX
:
2646 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2651 else if (exp_seg
!= text_section
2652 && exp_seg
!= data_section
2653 && exp_seg
!= bss_section
2654 && exp_seg
!= undefined_section
2655 #ifdef BFD_ASSEMBLER
2656 && !bfd_is_com_section (exp_seg
)
2660 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2666 /* This is an address. The size of the address will be
2667 determined later, depending on destination register,
2668 suffix, or the default for the section. We exclude
2669 Imm8S here so that `push $foo' and other instructions
2670 with an Imm8S form will use Imm16 or Imm32. */
2671 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2677 static int i386_scale
PARAMS ((char *));
2683 if (!isdigit (*scale
))
2690 i
.log2_scale_factor
= 0;
2693 i
.log2_scale_factor
= 1;
2696 i
.log2_scale_factor
= 2;
2699 i
.log2_scale_factor
= 3;
2703 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2707 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2709 as_warn (_("scale factor of %d without an index register"),
2710 1 << i
.log2_scale_factor
);
2711 #if SCALE1_WHEN_NO_INDEX
2712 i
.log2_scale_factor
= 0;
2718 static int i386_displacement
PARAMS ((char *, char *));
2721 i386_displacement (disp_start
, disp_end
)
2725 register expressionS
*exp
;
2727 char *save_input_line_pointer
;
2728 int bigdisp
= Disp32
;
2730 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2732 i
.types
[this_operand
] |= bigdisp
;
2734 exp
= &disp_expressions
[i
.disp_operands
];
2735 i
.disps
[this_operand
] = exp
;
2736 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2738 save_input_line_pointer
= input_line_pointer
;
2739 input_line_pointer
= disp_start
;
2740 END_STRING_AND_SAVE (disp_end
);
2742 #ifndef GCC_ASM_O_HACK
2743 #define GCC_ASM_O_HACK 0
2746 END_STRING_AND_SAVE (disp_end
+ 1);
2747 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2748 && displacement_string_end
[-1] == '+')
2750 /* This hack is to avoid a warning when using the "o"
2751 constraint within gcc asm statements.
2754 #define _set_tssldt_desc(n,addr,limit,type) \
2755 __asm__ __volatile__ ( \
2757 "movw %w1,2+%0\n\t" \
2759 "movb %b1,4+%0\n\t" \
2760 "movb %4,5+%0\n\t" \
2761 "movb $0,6+%0\n\t" \
2762 "movb %h1,7+%0\n\t" \
2764 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2766 This works great except that the output assembler ends
2767 up looking a bit weird if it turns out that there is
2768 no offset. You end up producing code that looks like:
2781 So here we provide the missing zero.
2784 *displacement_string_end
= '0';
2790 * We can have operands of the form
2791 * <symbol>@GOTOFF+<nnn>
2792 * Take the easy way out here and copy everything
2793 * into a temporary buffer...
2797 cp
= strchr (input_line_pointer
, '@');
2804 /* GOT relocations are not supported in 16 bit mode */
2805 if (flag_16bit_code
)
2806 as_bad (_("GOT relocations not supported in 16 bit mode"));
2808 if (GOT_symbol
== NULL
)
2809 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2811 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2813 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2816 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2818 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2821 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2823 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2827 as_bad (_("Bad reloc specifier in expression"));
2829 /* Replace the relocation token with ' ', so that errors like
2830 foo@GOTOFF1 will be detected. */
2831 first
= cp
- input_line_pointer
;
2832 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2833 memcpy (tmpbuf
, input_line_pointer
, first
);
2834 tmpbuf
[first
] = ' ';
2835 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2836 input_line_pointer
= tmpbuf
;
2841 exp_seg
= expression (exp
);
2843 #ifdef BFD_ASSEMBLER
2844 /* We do this to make sure that the section symbol is in
2845 the symbol table. We will ultimately change the relocation
2846 to be relative to the beginning of the section */
2847 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2849 if (S_IS_LOCAL(exp
->X_add_symbol
)
2850 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2851 section_symbol (S_GET_SEGMENT (exp
->X_add_symbol
));
2852 assert (exp
->X_op
== O_symbol
);
2853 exp
->X_op
= O_subtract
;
2854 exp
->X_op_symbol
= GOT_symbol
;
2855 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2860 if (*input_line_pointer
)
2861 as_bad (_("Ignoring junk `%s' after expression"),
2862 input_line_pointer
);
2864 RESTORE_END_STRING (disp_end
+ 1);
2866 RESTORE_END_STRING (disp_end
);
2867 input_line_pointer
= save_input_line_pointer
;
2869 if (exp
->X_op
== O_constant
)
2871 if (fits_in_signed_byte (exp
->X_add_number
))
2872 i
.types
[this_operand
] |= Disp8
;
2875 else if (exp_seg
!= text_section
2876 && exp_seg
!= data_section
2877 && exp_seg
!= bss_section
2878 && exp_seg
!= undefined_section
)
2880 as_bad (_ ("Unimplemented segment type %d in operand"), exp_seg
);
2887 static int i386_operand_modifier
PARAMS ((char **, int));
2890 i386_operand_modifier (op_string
, got_a_float
)
2894 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2896 i
.suffix
= BYTE_MNEM_SUFFIX
;
2901 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2903 i
.suffix
= WORD_MNEM_SUFFIX
;
2908 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2911 i
.suffix
= SHORT_MNEM_SUFFIX
;
2913 i
.suffix
= DWORD_MNEM_SUFFIX
;
2918 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2920 i
.suffix
= INTEL_DWORD_MNEM_SUFFIX
;
2925 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2927 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2932 else if (!strncasecmp (*op_string
, "SHORT", 5))
2938 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2944 else if (!strncasecmp (*op_string
, "FLAT", 4))
2950 else return NONE_FOUND
;
2953 static char * build_displacement_string
PARAMS ((int, char *));
2956 build_displacement_string (initial_disp
, op_string
)
2960 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2961 char *end_of_operand_string
;
2965 temp_string
[0] = '\0';
2966 tc
= end_of_operand_string
= strchr (op_string
, '[');
2967 if ( initial_disp
&& !end_of_operand_string
)
2969 strcpy (temp_string
, op_string
);
2970 return (temp_string
);
2973 /* Build the whole displacement string */
2976 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2977 temp_string
[end_of_operand_string
- op_string
] = '\0';
2981 temp_disp
= op_string
;
2983 while (*temp_disp
!= '\0')
2985 int add_minus
= (*temp_disp
== '-');
2987 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2990 if (is_space_char (*temp_disp
))
2993 /* Don't consider registers */
2994 if (*temp_disp
!= REGISTER_PREFIX
2995 && !(allow_naked_reg
&& i386_is_reg (temp_disp
)))
2997 char *string_start
= temp_disp
;
2999 while (*temp_disp
!= ']'
3000 && *temp_disp
!= '+'
3001 && *temp_disp
!= '-'
3002 && *temp_disp
!= '*')
3006 strcat (temp_string
, "-");
3008 strcat (temp_string
, "+");
3010 strncat (temp_string
, string_start
, temp_disp
- string_start
);
3011 if (*temp_disp
== '+' || *temp_disp
== '-')
3015 while (*temp_disp
!= '\0'
3016 && *temp_disp
!= '+'
3017 && *temp_disp
!= '-')
3024 static int i386_parse_seg
PARAMS ((char *));
3027 i386_parse_seg (op_string
)
3030 if (is_space_char (*op_string
))
3033 /* Should be one of es, cs, ss, ds fs or gs */
3034 switch (*op_string
++)
3037 i
.seg
[i
.mem_operands
] = &es
;
3040 i
.seg
[i
.mem_operands
] = &cs
;
3043 i
.seg
[i
.mem_operands
] = &ss
;
3046 i
.seg
[i
.mem_operands
] = &ds
;
3049 i
.seg
[i
.mem_operands
] = &fs
;
3052 i
.seg
[i
.mem_operands
] = &gs
;
3055 as_bad (_("bad segment name `%s'"), op_string
);
3059 if (*op_string
++ != 's')
3061 as_bad (_("bad segment name `%s'"), op_string
);
3065 if (is_space_char (*op_string
))
3068 if (*op_string
!= ':')
3070 as_bad (_("bad segment name `%s'"), op_string
);
3078 static int i386_index_check
PARAMS((const char *));
3080 /* Make sure the memory operand we've been dealt is valid.
3081 Returns 1 on success, 0 on a failure.
3084 i386_index_check (operand_string
)
3085 const char *operand_string
;
3087 #if INFER_ADDR_PREFIX
3092 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ?
3093 /* 16 bit mode checks */
3095 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3096 != (Reg16
|BaseIndex
)))
3098 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3099 != (Reg16
|BaseIndex
))
3101 && i
.base_reg
->reg_num
< 6
3102 && i
.index_reg
->reg_num
>= 6
3103 && i
.log2_scale_factor
== 0)))) :
3104 /* 32 bit mode checks */
3106 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3108 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3109 != (Reg32
|BaseIndex
)))))
3111 #if INFER_ADDR_PREFIX
3112 if (i
.prefix
[ADDR_PREFIX
] == 0 && stackop_size
!= '\0')
3114 i
.prefix
[ADDR_PREFIX
] = ADDR_PREFIX_OPCODE
;
3116 /* Change the size of any displacement too. At most one of
3117 Disp16 or Disp32 is set.
3118 FIXME. There doesn't seem to be any real need for separate
3119 Disp16 and Disp32 flags. The same goes for Imm16 and Imm32.
3120 Removing them would probably clean up the code quite a lot.
3122 if (i
.types
[this_operand
] & (Disp16
|Disp32
))
3123 i
.types
[this_operand
] ^= (Disp16
|Disp32
);
3129 as_bad (_("`%s' is not a valid base/index expression"),
3132 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3134 flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ? "16" : "32");
3140 static int i386_intel_memory_operand
PARAMS ((char *));
3143 i386_intel_memory_operand (operand_string
)
3144 char *operand_string
;
3146 char *op_string
= operand_string
;
3147 char *end_of_operand_string
;
3149 if ((i
.mem_operands
== 1
3150 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3151 || i
.mem_operands
== 2)
3153 as_bad (_("too many memory references for `%s'"),
3154 current_templates
->start
->name
);
3158 /* Look for displacement preceding open bracket */
3159 if (*op_string
!= '[')
3164 end_seg
= strchr (op_string
, ':');
3167 if (!i386_parse_seg (op_string
))
3169 op_string
= end_seg
+ 1;
3172 temp_string
= build_displacement_string (true, op_string
);
3174 if (i
.disp_operands
== 0 &&
3175 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3178 end_of_operand_string
= strchr (op_string
, '[');
3179 if (!end_of_operand_string
)
3180 end_of_operand_string
= op_string
+ strlen (op_string
);
3182 if (is_space_char (*end_of_operand_string
))
3183 --end_of_operand_string
;
3185 op_string
= end_of_operand_string
;
3188 if (*op_string
== '[')
3192 /* Pick off each component and figure out where it belongs */
3194 end_of_operand_string
= op_string
;
3196 while (*op_string
!= ']')
3199 while (*end_of_operand_string
!= '+'
3200 && *end_of_operand_string
!= '-'
3201 && *end_of_operand_string
!= '*'
3202 && *end_of_operand_string
!= ']')
3203 end_of_operand_string
++;
3205 if (*op_string
== '+')
3207 char *temp_string
= op_string
+ 1;
3208 if (is_space_char (*temp_string
))
3210 if (*temp_string
== REGISTER_PREFIX
3211 || (allow_naked_reg
&& i386_is_reg (temp_string
)))
3215 if (*op_string
== REGISTER_PREFIX
3216 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3218 const reg_entry
*temp_reg
;
3221 END_STRING_AND_SAVE (end_of_operand_string
);
3222 temp_reg
= parse_register (op_string
, &end_op
);
3223 RESTORE_END_STRING (end_of_operand_string
);
3225 if (temp_reg
== NULL
)
3228 if (i
.base_reg
== NULL
)
3229 i
.base_reg
= temp_reg
;
3231 i
.index_reg
= temp_reg
;
3233 i
.types
[this_operand
] |= BaseIndex
;
3236 else if (is_digit_char (*op_string
) || *op_string
== '+' || *op_string
== '-')
3239 char *temp_string
= build_displacement_string (false, op_string
);
3241 if (*temp_string
== '+')
3244 if (i
.disp_operands
== 0 &&
3245 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3249 end_of_operand_string
= op_string
;
3250 while (*end_of_operand_string
!= ']'
3251 && *end_of_operand_string
!= '+'
3252 && *end_of_operand_string
!= '-'
3253 && *end_of_operand_string
!= '*')
3254 ++end_of_operand_string
;
3256 else if (*op_string
== '*')
3260 if (i
.base_reg
&& !i
.index_reg
)
3262 i
.index_reg
= i
.base_reg
;
3266 if (!i386_scale (op_string
))
3269 op_string
= end_of_operand_string
;
3270 ++end_of_operand_string
;
3274 if (i386_index_check (operand_string
) == 0)
3282 i386_intel_operand (operand_string
, got_a_float
)
3283 char *operand_string
;
3286 char *op_string
= operand_string
;
3288 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3289 if (is_space_char (*op_string
))
3292 switch (operand_modifier
)
3299 if (!i386_intel_memory_operand (op_string
))
3305 if (!i386_immediate (op_string
))
3311 /* Should be register or immediate */
3312 if (is_digit_char (*op_string
)
3313 && strchr (op_string
, '[') == 0)
3315 if (!i386_immediate (op_string
))
3318 else if (*op_string
== REGISTER_PREFIX
3320 && i386_is_reg (op_string
)))
3322 register const reg_entry
* r
;
3325 r
= parse_register (op_string
, &end_op
);
3329 /* Check for a segment override by searching for ':' after a
3330 segment register. */
3332 if (is_space_char (*op_string
))
3334 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3339 i
.seg
[i
.mem_operands
] = &es
;
3342 i
.seg
[i
.mem_operands
] = &cs
;
3345 i
.seg
[i
.mem_operands
] = &ss
;
3348 i
.seg
[i
.mem_operands
] = &ds
;
3351 i
.seg
[i
.mem_operands
] = &fs
;
3354 i
.seg
[i
.mem_operands
] = &gs
;
3359 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3360 i
.regs
[this_operand
] = r
;
3365 if (!i386_intel_memory_operand (op_string
))
3374 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3378 i386_operand (operand_string
)
3379 char *operand_string
;
3381 char *op_string
= operand_string
;
3383 if (is_space_char (*op_string
))
3386 /* We check for an absolute prefix (differentiating,
3387 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3388 if (*op_string
== ABSOLUTE_PREFIX
)
3391 if (is_space_char (*op_string
))
3393 i
.types
[this_operand
] |= JumpAbsolute
;
3396 /* Check if operand is a register. */
3397 if (*op_string
== REGISTER_PREFIX
3398 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3400 register const reg_entry
*r
;
3403 r
= parse_register (op_string
, &end_op
);
3407 /* Check for a segment override by searching for ':' after a
3408 segment register. */
3410 if (is_space_char (*op_string
))
3412 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3417 i
.seg
[i
.mem_operands
] = &es
;
3420 i
.seg
[i
.mem_operands
] = &cs
;
3423 i
.seg
[i
.mem_operands
] = &ss
;
3426 i
.seg
[i
.mem_operands
] = &ds
;
3429 i
.seg
[i
.mem_operands
] = &fs
;
3432 i
.seg
[i
.mem_operands
] = &gs
;
3436 /* Skip the ':' and whitespace. */
3438 if (is_space_char (*op_string
))
3441 if (!is_digit_char (*op_string
)
3442 && !is_identifier_char (*op_string
)
3443 && *op_string
!= '('
3444 && *op_string
!= ABSOLUTE_PREFIX
)
3446 as_bad (_("bad memory operand `%s'"), op_string
);
3449 /* Handle case of %es:*foo. */
3450 if (*op_string
== ABSOLUTE_PREFIX
)
3453 if (is_space_char (*op_string
))
3455 i
.types
[this_operand
] |= JumpAbsolute
;
3457 goto do_memory_reference
;
3461 as_bad (_("Junk `%s' after register"), op_string
);
3464 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3465 i
.regs
[this_operand
] = r
;
3468 else if (*op_string
== IMMEDIATE_PREFIX
)
3469 { /* ... or an immediate */
3471 if (i
.types
[this_operand
] & JumpAbsolute
)
3473 as_bad (_("Immediate operand illegal with absolute jump"));
3476 if (!i386_immediate (op_string
))
3479 else if (is_digit_char (*op_string
)
3480 || is_identifier_char (*op_string
)
3481 || *op_string
== '(' )
3483 /* This is a memory reference of some sort. */
3484 char *end_of_operand_string
;
3485 register char *base_string
;
3486 int found_base_index_form
;
3488 /* Start and end of displacement string expression (if found). */
3489 char *displacement_string_start
;
3490 char *displacement_string_end
;
3492 do_memory_reference
:
3493 displacement_string_start
= NULL
;
3494 displacement_string_end
= NULL
;
3496 if ((i
.mem_operands
== 1
3497 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3498 || i
.mem_operands
== 2)
3500 as_bad (_("too many memory references for `%s'"),
3501 current_templates
->start
->name
);
3505 /* Check for base index form. We detect the base index form by
3506 looking for an ')' at the end of the operand, searching
3507 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3509 found_base_index_form
= 0;
3510 end_of_operand_string
= op_string
+ strlen (op_string
);
3512 --end_of_operand_string
;
3513 if (is_space_char (*end_of_operand_string
))
3514 --end_of_operand_string
;
3516 base_string
= end_of_operand_string
;
3518 if (*base_string
== ')')
3520 unsigned int parens_balanced
= 1;
3521 /* We've already checked that the number of left & right ()'s are
3522 equal, so this loop will not be infinite. */
3526 if (*base_string
== ')')
3528 if (*base_string
== '(')
3531 while (parens_balanced
);
3533 /* If there is a displacement set-up for it to be parsed later. */
3534 displacement_string_start
= op_string
;
3535 displacement_string_end
= base_string
;
3537 /* Skip past '(' and whitespace. */
3539 if (is_space_char (*base_string
))
3542 if (*base_string
== REGISTER_PREFIX
3543 || (allow_naked_reg
&& i386_is_reg (base_string
))
3544 || *base_string
== ',')
3545 found_base_index_form
= 1;
3548 /* If we can't parse a base index register expression, we've found
3549 a pure displacement expression. We set up displacement_string_start
3550 and displacement_string_end for the code below. */
3551 if (!found_base_index_form
)
3553 displacement_string_start
= op_string
;
3554 displacement_string_end
= end_of_operand_string
+ 1;
3558 i
.types
[this_operand
] |= BaseIndex
;
3560 /* Find base register (if any). */
3561 if (*base_string
!= ',')
3565 /* Trim off the closing ')' so that parse_register won't
3567 END_STRING_AND_SAVE (end_of_operand_string
);
3568 i
.base_reg
= parse_register (base_string
, &end_op
);
3569 RESTORE_END_STRING (end_of_operand_string
);
3571 if (i
.base_reg
== NULL
)
3574 base_string
= end_op
;
3575 if (is_space_char (*base_string
))
3579 /* There may be an index reg or scale factor here. */
3580 if (*base_string
== ',')
3583 if (is_space_char (*base_string
))
3586 if (*base_string
== REGISTER_PREFIX
3587 || (allow_naked_reg
&& i386_is_reg (base_string
)))
3591 END_STRING_AND_SAVE (end_of_operand_string
);
3592 i
.index_reg
= parse_register (base_string
, &end_op
);
3593 RESTORE_END_STRING (end_of_operand_string
);
3595 if (i
.index_reg
== NULL
)
3598 base_string
= end_op
;
3599 if (is_space_char (*base_string
))
3601 if (*base_string
== ',')
3604 if (is_space_char (*base_string
))
3607 else if (*base_string
!= ')' )
3609 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3615 /* Check for scale factor. */
3616 if (isdigit ((unsigned char) *base_string
))
3618 if (!i386_scale (base_string
))
3622 if (is_space_char (*base_string
))
3624 if (*base_string
!= ')')
3626 as_bad (_("expecting `)' after scale factor in `%s'"),
3631 else if (!i
.index_reg
)
3633 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3638 else if (*base_string
!= ')')
3640 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3646 /* If there's an expression beginning the operand, parse it,
3647 assuming displacement_string_start and
3648 displacement_string_end are meaningful. */
3649 if (displacement_string_start
!= displacement_string_end
)
3651 if (!i386_displacement (displacement_string_start
,
3652 displacement_string_end
))
3656 /* Special case for (%dx) while doing input/output op. */
3658 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3660 && i
.log2_scale_factor
== 0
3661 && i
.seg
[i
.mem_operands
] == 0
3662 && (i
.types
[this_operand
] & Disp
) == 0)
3664 i
.types
[this_operand
] = InOutPortReg
;
3668 if (i386_index_check (operand_string
) == 0)
3673 { /* it's not a memory operand; argh! */
3674 as_bad (_("invalid char %s beginning operand %d `%s'"),
3675 output_invalid (*op_string
),
3680 return 1; /* normal return */
3684 * md_estimate_size_before_relax()
3686 * Called just before relax().
3687 * Any symbol that is now undefined will not become defined.
3688 * Return the correct fr_subtype in the frag.
3689 * Return the initial "guess for fr_var" to caller.
3690 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3691 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3692 * Although it may not be explicit in the frag, pretend fr_var starts with a
3696 md_estimate_size_before_relax (fragP
, segment
)
3697 register fragS
*fragP
;
3698 register segT segment
;
3700 register unsigned char *opcode
;
3701 register int old_fr_fix
;
3703 old_fr_fix
= fragP
->fr_fix
;
3704 opcode
= (unsigned char *) fragP
->fr_opcode
;
3705 /* We've already got fragP->fr_subtype right; all we have to do is
3706 check for un-relaxable symbols. */
3707 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3709 /* symbol is undefined in this segment */
3710 int code16
= fragP
->fr_subtype
& CODE16
;
3711 int size
= code16
? 2 : 4;
3712 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
3716 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3717 opcode
[0] = 0xe9; /* dword disp jmp */
3718 fragP
->fr_fix
+= size
;
3719 fix_new (fragP
, old_fr_fix
, size
,
3721 fragP
->fr_offset
, 1,
3722 (GOT_symbol
&& /* Not quite right - we should switch on
3723 presence of @PLT, but I cannot see how
3724 to get to that from here. We should have
3725 done this in md_assemble to really
3726 get it right all of the time, but I
3727 think it does not matter that much, as
3728 this will be right most of the time. ERY*/
3729 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3730 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3734 /* This changes the byte-displacement jump 0x7N
3735 to the dword-displacement jump 0x0f8N. */
3736 opcode
[1] = opcode
[0] + 0x10;
3737 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
3738 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3739 fix_new (fragP
, old_fr_fix
+ 1, size
,
3741 fragP
->fr_offset
, 1,
3742 (GOT_symbol
&& /* Not quite right - we should switch on
3743 presence of @PLT, but I cannot see how
3744 to get to that from here. ERY */
3745 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3746 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3751 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3752 } /* md_estimate_size_before_relax() */
3755 * md_convert_frag();
3757 * Called after relax() is finished.
3758 * In: Address of frag.
3759 * fr_type == rs_machine_dependent.
3760 * fr_subtype is what the address relaxed to.
3762 * Out: Any fixSs and constants are set up.
3763 * Caller will turn frag into a ".space 0".
3765 #ifndef BFD_ASSEMBLER
3767 md_convert_frag (headers
, sec
, fragP
)
3768 object_headers
*headers ATTRIBUTE_UNUSED
;
3769 segT sec ATTRIBUTE_UNUSED
;
3770 register fragS
*fragP
;
3773 md_convert_frag (abfd
, sec
, fragP
)
3774 bfd
*abfd ATTRIBUTE_UNUSED
;
3775 segT sec ATTRIBUTE_UNUSED
;
3776 register fragS
*fragP
;
3779 register unsigned char *opcode
;
3780 unsigned char *where_to_put_displacement
= NULL
;
3781 unsigned int target_address
;
3782 unsigned int opcode_address
;
3783 unsigned int extension
= 0;
3784 int displacement_from_opcode_start
;
3786 opcode
= (unsigned char *) fragP
->fr_opcode
;
3788 /* Address we want to reach in file space. */
3789 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3790 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3791 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
3794 /* Address opcode resides at in file space. */
3795 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3797 /* Displacement from opcode start to fill into instruction. */
3798 displacement_from_opcode_start
= target_address
- opcode_address
;
3800 switch (fragP
->fr_subtype
)
3802 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3803 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3804 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3805 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3806 /* don't have to change opcode */
3807 extension
= 1; /* 1 opcode + 1 displacement */
3808 where_to_put_displacement
= &opcode
[1];
3811 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3812 extension
= 5; /* 2 opcode + 4 displacement */
3813 opcode
[1] = opcode
[0] + 0x10;
3814 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3815 where_to_put_displacement
= &opcode
[2];
3818 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3819 extension
= 4; /* 1 opcode + 4 displacement */
3821 where_to_put_displacement
= &opcode
[1];
3824 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3825 extension
= 3; /* 2 opcode + 2 displacement */
3826 opcode
[1] = opcode
[0] + 0x10;
3827 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3828 where_to_put_displacement
= &opcode
[2];
3831 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3832 extension
= 2; /* 1 opcode + 2 displacement */
3834 where_to_put_displacement
= &opcode
[1];
3838 BAD_CASE (fragP
->fr_subtype
);
3841 /* now put displacement after opcode */
3842 md_number_to_chars ((char *) where_to_put_displacement
,
3843 (valueT
) (displacement_from_opcode_start
- extension
),
3844 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3845 fragP
->fr_fix
+= extension
;
3849 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3850 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3851 const int md_reloc_size
= 8; /* Size of relocation record */
3854 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3856 addressT from_addr
, to_addr
;
3857 fragS
*frag ATTRIBUTE_UNUSED
;
3858 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
3862 offset
= to_addr
- (from_addr
+ 2);
3863 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3864 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3868 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3870 addressT from_addr
, to_addr
;
3876 if (flag_do_long_jump
)
3878 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3879 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3880 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3881 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3882 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3886 offset
= to_addr
- (from_addr
+ 5);
3887 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3888 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3892 /* Apply a fixup (fixS) to segment data, once it has been determined
3893 by our caller that we have all the info we need to fix it up.
3895 On the 386, immediates, displacements, and data pointers are all in
3896 the same (little-endian) format, so we don't need to care about which
3900 md_apply_fix3 (fixP
, valp
, seg
)
3901 fixS
*fixP
; /* The fix we're to put in. */
3902 valueT
*valp
; /* Pointer to the value of the bits. */
3903 segT seg ATTRIBUTE_UNUSED
; /* Segment fix is from. */
3905 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3906 valueT value
= *valp
;
3908 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3911 switch (fixP
->fx_r_type
)
3917 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3920 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
3923 fixP
->fx_r_type
= BFD_RELOC_8_PCREL
;
3929 * This is a hack. There should be a better way to
3932 if ((fixP
->fx_r_type
== BFD_RELOC_32_PCREL
3933 || fixP
->fx_r_type
== BFD_RELOC_16_PCREL
3934 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
)
3938 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3940 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3943 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3945 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3946 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3947 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3948 || symbol_section_p (fixP
->fx_addsy
))
3949 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3950 && ! S_IS_WEAK (fixP
->fx_addsy
)
3951 && S_IS_DEFINED (fixP
->fx_addsy
)
3952 && ! S_IS_COMMON (fixP
->fx_addsy
))
3954 /* Yes, we add the values in twice. This is because
3955 bfd_perform_relocation subtracts them out again. I think
3956 bfd_perform_relocation is broken, but I don't dare change
3958 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3961 #if defined (OBJ_COFF) && defined (TE_PE)
3962 /* For some reason, the PE format does not store a section
3963 address offset for a PC relative symbol. */
3964 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3965 value
+= md_pcrel_from (fixP
);
3969 /* Fix a few things - the dynamic linker expects certain values here,
3970 and we must not dissappoint it. */
3971 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3972 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3974 switch (fixP
->fx_r_type
) {
3975 case BFD_RELOC_386_PLT32
:
3976 /* Make the jump instruction point to the address of the operand. At
3977 runtime we merely add the offset to the actual PLT entry. */
3980 case BFD_RELOC_386_GOTPC
:
3982 * This is tough to explain. We end up with this one if we have
3983 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3984 * here is to obtain the absolute address of the GOT, and it is strongly
3985 * preferable from a performance point of view to avoid using a runtime
3986 * relocation for this. The actual sequence of instructions often look
3992 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3994 * The call and pop essentially return the absolute address of
3995 * the label .L66 and store it in %ebx. The linker itself will
3996 * ultimately change the first operand of the addl so that %ebx points to
3997 * the GOT, but to keep things simple, the .o file must have this operand
3998 * set so that it generates not the absolute address of .L66, but the
3999 * absolute address of itself. This allows the linker itself simply
4000 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
4001 * added in, and the addend of the relocation is stored in the operand
4002 * field for the instruction itself.
4004 * Our job here is to fix the operand so that it would add the correct
4005 * offset so that %ebx would point to itself. The thing that is tricky is
4006 * that .-.L66 will point to the beginning of the instruction, so we need
4007 * to further modify the operand so that it will point to itself.
4008 * There are other cases where you have something like:
4010 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
4012 * and here no correction would be required. Internally in the assembler
4013 * we treat operands of this form as not being pcrel since the '.' is
4014 * explicitly mentioned, and I wonder whether it would simplify matters
4015 * to do it this way. Who knows. In earlier versions of the PIC patches,
4016 * the pcrel_adjust field was used to store the correction, but since the
4017 * expression is not pcrel, I felt it would be confusing to do it this way.
4021 case BFD_RELOC_386_GOT32
:
4022 value
= 0; /* Fully resolved at runtime. No addend. */
4024 case BFD_RELOC_386_GOTOFF
:
4027 case BFD_RELOC_VTABLE_INHERIT
:
4028 case BFD_RELOC_VTABLE_ENTRY
:
4035 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
4037 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
4038 md_number_to_chars (p
, value
, fixP
->fx_size
);
4044 /* This is never used. */
4045 long /* Knows about the byte order in a word. */
4046 md_chars_to_number (con
, nbytes
)
4047 unsigned char con
[]; /* Low order byte 1st. */
4048 int nbytes
; /* Number of bytes in the input. */
4051 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
4053 retval
<<= BITS_PER_CHAR
;
4061 #define MAX_LITTLENUMS 6
4063 /* Turn the string pointed to by litP into a floating point constant of type
4064 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4065 is stored in *sizeP . An error message is returned, or NULL on OK. */
4067 md_atof (type
, litP
, sizeP
)
4073 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4074 LITTLENUM_TYPE
*wordP
;
4096 return _("Bad call to md_atof ()");
4098 t
= atof_ieee (input_line_pointer
, type
, words
);
4100 input_line_pointer
= t
;
4102 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4103 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4104 the bigendian 386. */
4105 for (wordP
= words
+ prec
- 1; prec
--;)
4107 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4108 litP
+= sizeof (LITTLENUM_TYPE
);
4113 char output_invalid_buf
[8];
4115 static char * output_invalid
PARAMS ((int));
4122 sprintf (output_invalid_buf
, "'%c'", c
);
4124 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4125 return output_invalid_buf
;
4128 /* REG_STRING starts *before* REGISTER_PREFIX. */
4130 static const reg_entry
* parse_register
PARAMS ((char *, char **));
4132 static const reg_entry
*
4133 parse_register (reg_string
, end_op
)
4137 register char *s
= reg_string
;
4139 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4142 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4143 if (*s
== REGISTER_PREFIX
)
4146 if (is_space_char (*s
))
4150 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
4152 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4154 if (!allow_naked_reg
)
4157 as_bad (_("bad register name `%s'"), reg_name_given
);
4159 return (const reg_entry
*) NULL
;
4165 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4167 /* Handle floating point regs, allowing spaces in the (i) part. */
4168 if (r
== i386_regtab
/* %st is first entry of table */)
4171 if (is_space_char (*s
))
4176 if (is_space_char (*s
))
4178 if (*s
>= '0' && *s
<= '7')
4180 r
= &i386_float_regtab
[*s
- '0'];
4182 if (is_space_char (*s
))
4191 if (!allow_naked_reg
)
4194 as_bad (_("bad register name `%s'"), reg_name_given
);
4196 return (const reg_entry
*) NULL
;
4202 if (!allow_naked_reg
)
4203 as_bad (_("bad register name `%s'"), reg_name_given
);
4204 return (const reg_entry
*) NULL
;
4211 CONST
char *md_shortopts
= "kmVQ:";
4213 CONST
char *md_shortopts
= "m";
4215 struct option md_longopts
[] = {
4216 {NULL
, no_argument
, NULL
, 0}
4218 size_t md_longopts_size
= sizeof (md_longopts
);
4221 md_parse_option (c
, arg
)
4223 char *arg ATTRIBUTE_UNUSED
;
4228 flag_do_long_jump
= 1;
4231 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4232 /* -k: Ignore for FreeBSD compatibility. */
4236 /* -V: SVR4 argument to print version ID. */
4238 print_version_id ();
4241 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4242 should be emitted or not. FIXME: Not implemented. */
4254 md_show_usage (stream
)
4257 fprintf (stream
, _("\
4258 -m do long jump\n"));
4261 #ifdef BFD_ASSEMBLER
4262 #ifdef OBJ_MAYBE_ELF
4263 #ifdef OBJ_MAYBE_COFF
4265 /* Pick the target format to use. */
4268 i386_target_format ()
4270 switch (OUTPUT_FLAVOR
)
4272 case bfd_target_coff_flavour
:
4274 case bfd_target_elf_flavour
:
4275 return "elf32-i386";
4282 #endif /* OBJ_MAYBE_COFF */
4283 #endif /* OBJ_MAYBE_ELF */
4284 #endif /* BFD_ASSEMBLER */
4288 md_undefined_symbol (name
)
4291 if (*name
== '_' && *(name
+1) == 'G'
4292 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4296 if (symbol_find (name
))
4297 as_bad (_("GOT already in symbol table"));
4298 GOT_symbol
= symbol_new (name
, undefined_section
,
4299 (valueT
) 0, &zero_address_frag
);
4306 /* Round up a section size to the appropriate boundary. */
4308 md_section_align (segment
, size
)
4309 segT segment ATTRIBUTE_UNUSED
;
4313 #ifdef BFD_ASSEMBLER
4314 /* For a.out, force the section size to be aligned. If we don't do
4315 this, BFD will align it for us, but it will not write out the
4316 final bytes of the section. This may be a bug in BFD, but it is
4317 easier to fix it here since that is how the other a.out targets
4321 align
= bfd_get_section_alignment (stdoutput
, segment
);
4322 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4329 /* On the i386, PC-relative offsets are relative to the start of the
4330 next instruction. That is, the address of the offset, plus its
4331 size, since the offset is always the last part of the insn. */
4334 md_pcrel_from (fixP
)
4337 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4344 int ignore ATTRIBUTE_UNUSED
;
4348 temp
= get_absolute_expression ();
4349 subseg_set (bss_section
, (subsegT
) temp
);
4350 demand_empty_rest_of_line ();
4356 #ifdef BFD_ASSEMBLER
4359 i386_validate_fix (fixp
)
4362 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4364 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4370 tc_gen_reloc (section
, fixp
)
4371 asection
*section ATTRIBUTE_UNUSED
;
4375 bfd_reloc_code_real_type code
;
4377 switch (fixp
->fx_r_type
)
4379 case BFD_RELOC_386_PLT32
:
4380 case BFD_RELOC_386_GOT32
:
4381 case BFD_RELOC_386_GOTOFF
:
4382 case BFD_RELOC_386_GOTPC
:
4384 case BFD_RELOC_VTABLE_ENTRY
:
4385 case BFD_RELOC_VTABLE_INHERIT
:
4386 code
= fixp
->fx_r_type
;
4391 switch (fixp
->fx_size
)
4394 as_bad (_("Can not do %d byte pc-relative relocation"),
4396 code
= BFD_RELOC_32_PCREL
;
4398 case 1: code
= BFD_RELOC_8_PCREL
; break;
4399 case 2: code
= BFD_RELOC_16_PCREL
; break;
4400 case 4: code
= BFD_RELOC_32_PCREL
; break;
4405 switch (fixp
->fx_size
)
4408 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4409 code
= BFD_RELOC_32
;
4411 case 1: code
= BFD_RELOC_8
; break;
4412 case 2: code
= BFD_RELOC_16
; break;
4413 case 4: code
= BFD_RELOC_32
; break;
4419 if (code
== BFD_RELOC_32
4421 && fixp
->fx_addsy
== GOT_symbol
)
4422 code
= BFD_RELOC_386_GOTPC
;
4424 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4425 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4426 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4428 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4429 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4430 vtable entry to be used in the relocation's section offset. */
4431 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4432 rel
->address
= fixp
->fx_offset
;
4435 rel
->addend
= fixp
->fx_addnumber
;
4439 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4440 if (rel
->howto
== NULL
)
4442 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4443 _("Cannot represent relocation type %s"),
4444 bfd_get_reloc_code_name (code
));
4445 /* Set howto to a garbage value so that we can keep going. */
4446 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4447 assert (rel
->howto
!= NULL
);
4453 #else /* ! BFD_ASSEMBLER */
4455 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4457 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4460 relax_addressT segment_address_in_file
;
4463 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4464 * Out: GNU LD relocation length code: 0, 1, or 2.
4467 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4470 know (fixP
->fx_addsy
!= NULL
);
4472 md_number_to_chars (where
,
4473 (valueT
) (fixP
->fx_frag
->fr_address
4474 + fixP
->fx_where
- segment_address_in_file
),
4477 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4478 ? S_GET_TYPE (fixP
->fx_addsy
)
4479 : fixP
->fx_addsy
->sy_number
);
4481 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4482 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4483 where
[4] = r_symbolnum
& 0x0ff;
4484 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4485 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4486 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4489 #endif /* OBJ_AOUT or OBJ_BOUT */
4491 #if defined (I386COFF)
4494 tc_coff_fix2rtype (fixP
)
4497 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4500 return (fixP
->fx_pcrel
?
4501 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4502 fixP
->fx_size
== 2 ? R_PCRWORD
:
4504 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4505 fixP
->fx_size
== 2 ? R_RELWORD
:
4510 tc_coff_sizemachdep (frag
)
4514 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4519 #endif /* I386COFF */
4521 #endif /* ! BFD_ASSEMBLER */
4523 /* end of tc-i386.c */