1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 1991, 1992, 1993 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 Intel 80386 machine specific gas.
22 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
23 Bugs & suggestions are completely welcome. This is free software.
24 Please help us make it better.
32 #include "opcode/i386.h"
34 /* 'md_assemble ()' gathers together information and puts it into a
39 /* TM holds the template for the insn were currently assembling. */
41 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
43 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
45 /* OPERANDS gives the number of given operands. */
46 unsigned int operands
;
48 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
49 of given register, displacement, memory operands and immediate
51 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
53 /* TYPES [i] is the type (see above #defines) which tells us how to
54 search through DISPS [i] & IMMS [i] & REGS [i] for the required
56 unsigned int types
[MAX_OPERANDS
];
58 /* Displacements (if given) for each operand. */
59 expressionS
*disps
[MAX_OPERANDS
];
61 /* Immediate operands (if given) for each operand. */
62 expressionS
*imms
[MAX_OPERANDS
];
64 /* Register operands (if given) for each operand. */
65 reg_entry
*regs
[MAX_OPERANDS
];
67 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
68 the base index byte below. */
71 unsigned int log2_scale_factor
;
73 /* SEG gives the seg_entry of this insn. It is equal to zero unless
74 an explicit segment override is given. */
75 const seg_entry
*seg
; /* segment for memory operands (if given) */
77 /* PREFIX holds all the given prefix opcodes (usually null).
78 PREFIXES is the size of PREFIX. */
79 /* richfix: really unsigned? */
80 unsigned char prefix
[MAX_PREFIXES
];
81 unsigned int prefixes
;
83 /* RM and IB are the modrm byte and the base index byte where the
84 addressing modes of this insn are encoded. */
90 typedef struct _i386_insn i386_insn
;
92 /* This array holds the chars that always start a comment. If the
93 pre-processor is disabled, these aren't very useful */
94 #if defined (TE_I386AIX) || defined (OBJ_ELF)
95 const char comment_chars
[] = "#/";
97 const char comment_chars
[] = "#";
100 /* This array holds the chars that only start a comment at the beginning of
101 a line. If the line seems to have the form '# 123 filename'
102 .line and .file directives will appear in the pre-processed output */
103 /* Note that input_file.c hand checks for '#' at the beginning of the
104 first line of the input file. This is because the compiler outputs
105 #NO_APP at the beginning of its output. */
106 /* Also note that comments started like this one will always work if
107 '/' isn't otherwise defined. */
108 #if defined (TE_I386AIX) || defined (OBJ_ELF)
109 const char line_comment_chars
[] = "";
111 const char line_comment_chars
[] = "/";
113 const char line_separator_chars
[] = "";
115 /* Chars that can be used to separate mant from exp in floating point nums */
116 const char EXP_CHARS
[] = "eE";
118 /* Chars that mean this number is a floating point constant */
121 const char FLT_CHARS
[] = "fFdDxX";
123 /* tables for lexical analysis */
124 static char opcode_chars
[256];
125 static char register_chars
[256];
126 static char operand_chars
[256];
127 static char space_chars
[256];
128 static char identifier_chars
[256];
129 static char digit_chars
[256];
132 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
133 #define is_operand_char(x) (operand_chars[(unsigned char) x])
134 #define is_register_char(x) (register_chars[(unsigned char) x])
135 #define is_space_char(x) (space_chars[(unsigned char) x])
136 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
137 #define is_digit_char(x) (digit_chars[(unsigned char) x])
139 /* put here all non-digit non-letter charcters that may occur in an operand */
140 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:";
142 static char *ordinal_names
[] = {"first", "second", "third"}; /* for printfs */
144 /* md_assemble() always leaves the strings it's passed unaltered. To
145 effect this we maintain a stack of saved characters that we've smashed
146 with '\0's (indicating end of strings for various sub-fields of the
147 assembler instruction). */
148 static char save_stack
[32];
149 static char *save_stack_p
; /* stack pointer */
150 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
151 #define RESTORE_END_STRING(s) *s = *--save_stack_p
153 /* The instruction we're assembling. */
156 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
157 static expressionS disp_expressions
[2], im_expressions
[2];
159 /* pointers to ebp & esp entries in reg_hash hash table */
160 static reg_entry
*ebp
, *esp
;
162 static int this_operand
; /* current operand we are working on */
164 /* Interface to relax_segment.
165 There are 2 relax states for 386 jump insns: one for conditional &
166 one for unconditional jumps. This is because the these two types
167 of jumps add different sizes to frags when we're figuring out what
168 sort of jump to choose to reach a given label. */
171 #define COND_JUMP 1 /* conditional jump */
172 #define UNCOND_JUMP 2 /* unconditional jump */
177 #define UNKNOWN_SIZE 3
181 #define INLINE __inline__
187 #define ENCODE_RELAX_STATE(type,size) \
188 ((relax_substateT)((type<<2) | (size)))
189 #define SIZE_FROM_RELAX_STATE(s) \
190 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
192 const relax_typeS md_relax_table
[] =
195 1) most positive reach of this state,
196 2) most negative reach of this state,
197 3) how many bytes this mode will add to the size of the current frag
198 4) which index into the table to try if we can't fit into this one.
205 /* For now we don't use word displacement jumps; they may be
207 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
208 /* word conditionals add 3 bytes to frag:
209 2 opcode prefix; 1 displacement bytes */
210 {32767 + 2, -32768 + 2, 3, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
211 /* dword conditionals adds 4 bytes to frag:
212 1 opcode prefix; 3 displacement bytes */
216 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
217 /* word jmp adds 2 bytes to frag:
218 1 opcode prefix; 1 displacement bytes */
219 {32767 + 2, -32768 + 2, 2, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
220 /* dword jmp adds 3 bytes to frag:
221 0 opcode prefix; 3 displacement bytes */
227 static char *output_invalid
PARAMS ((int c
));
228 static int i386_operand
PARAMS ((char *operand_string
));
229 static reg_entry
*parse_register
PARAMS ((char *reg_string
));
231 static void s_bss
PARAMS ((int));
234 static INLINE
unsigned long
235 mode_from_disp_size (t
)
238 return (t
& Disp8
) ? 1 : (t
& Disp32
) ? 2 : 0;
243 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifier */
245 static INLINE
unsigned long
246 opcode_suffix_to_type (s
)
249 return (s
== BYTE_OPCODE_SUFFIX
250 ? Byte
: (s
== WORD_OPCODE_SUFFIX
252 } /* opcode_suffix_to_type() */
256 fits_in_signed_byte (num
)
259 return (num
>= -128) && (num
<= 127);
260 } /* fits_in_signed_byte() */
263 fits_in_unsigned_byte (num
)
266 return (num
& 0xff) == num
;
267 } /* fits_in_unsigned_byte() */
270 fits_in_unsigned_word (num
)
273 return (num
& 0xffff) == num
;
274 } /* fits_in_unsigned_word() */
277 fits_in_signed_word (num
)
280 return (-32768 <= num
) && (num
<= 32767);
281 } /* fits_in_signed_word() */
284 smallest_imm_type (num
)
288 ? (Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
)
289 : fits_in_signed_byte (num
)
290 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
291 : fits_in_unsigned_byte (num
)
292 ? (Imm8
| Imm16
| Imm32
)
293 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
296 } /* smallest_imm_type() */
298 const pseudo_typeS md_pseudo_table
[] =
304 {"align", s_align_bytes
, 0},
306 {"align", s_align_ptwo
, 0},
308 {"ffloat", float_cons
, 'f'},
309 {"dfloat", float_cons
, 'd'},
310 {"tfloat", float_cons
, 'x'},
312 {"noopt", s_ignore
, 0},
313 {"optim", s_ignore
, 0},
315 {"zero", s_space
, 0},
320 /* for interface with expression () */
321 extern char *input_line_pointer
;
323 /* obstack for constructing various things in md_begin */
326 /* hash table for opcode lookup */
327 static struct hash_control
*op_hash
= (struct hash_control
*) 0;
328 /* hash table for register lookup */
329 static struct hash_control
*reg_hash
= (struct hash_control
*) 0;
330 /* hash table for prefix lookup */
331 static struct hash_control
*prefix_hash
= (struct hash_control
*) 0;
337 const char *hash_err
;
339 obstack_begin (&o
, 4096);
341 /* initialize op_hash hash table */
342 op_hash
= hash_new (); /* xmalloc handles error */
345 register const template *optab
;
346 register templates
*core_optab
;
349 optab
= i386_optab
; /* setup for loop */
350 prev_name
= optab
->name
;
351 obstack_grow (&o
, optab
, sizeof (template));
352 core_optab
= (templates
*) xmalloc (sizeof (templates
));
354 for (optab
++; optab
< i386_optab_end
; optab
++)
356 if (!strcmp (optab
->name
, prev_name
))
358 /* same name as before --> append to current template list */
359 obstack_grow (&o
, optab
, sizeof (template));
363 /* different name --> ship out current template list;
364 add to hash table; & begin anew */
365 /* Note: end must be set before start! since obstack_next_free
366 changes upon opstack_finish */
367 core_optab
->end
= (template *) obstack_next_free (&o
);
368 core_optab
->start
= (template *) obstack_finish (&o
);
369 hash_err
= hash_insert (op_hash
, prev_name
, (char *) core_optab
);
373 as_fatal ("Internal Error: Can't hash %s: %s", prev_name
,
376 prev_name
= optab
->name
;
377 core_optab
= (templates
*) xmalloc (sizeof (templates
));
378 obstack_grow (&o
, optab
, sizeof (template));
383 /* initialize reg_hash hash table */
384 reg_hash
= hash_new ();
386 register const reg_entry
*regtab
;
388 for (regtab
= i386_regtab
; regtab
< i386_regtab_end
; regtab
++)
390 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
396 esp
= (reg_entry
*) hash_find (reg_hash
, "esp");
397 ebp
= (reg_entry
*) hash_find (reg_hash
, "ebp");
399 /* initialize reg_hash hash table */
400 prefix_hash
= hash_new ();
402 register const prefix_entry
*prefixtab
;
404 for (prefixtab
= i386_prefixtab
;
405 prefixtab
< i386_prefixtab_end
; prefixtab
++)
407 hash_err
= hash_insert (prefix_hash
, prefixtab
->prefix_name
,
414 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
419 for (c
= 0; c
< 256; c
++)
421 if (islower (c
) || isdigit (c
))
424 register_chars
[c
] = c
;
426 else if (isupper (c
))
428 opcode_chars
[c
] = tolower (c
);
429 register_chars
[c
] = opcode_chars
[c
];
431 else if (c
== PREFIX_SEPERATOR
)
435 else if (c
== ')' || c
== '(')
437 register_chars
[c
] = c
;
440 if (isupper (c
) || islower (c
) || isdigit (c
))
441 operand_chars
[c
] = c
;
443 if (isdigit (c
) || c
== '-')
446 if (isalpha (c
) || c
== '_' || c
== '.' || isdigit (c
))
447 identifier_chars
[c
] = c
;
449 if (c
== ' ' || c
== '\t')
453 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
454 operand_chars
[(unsigned char) *p
] = *p
;
458 record_alignment (text_section
, 2);
459 record_alignment (data_section
, 2);
460 record_alignment (bss_section
, 2);
467 } /* not much to do here. */
472 /* debugging routines for md_assemble */
473 static void pi
PARAMS ((char *, i386_insn
*));
474 static void pte
PARAMS ((template *));
475 static void pt
PARAMS ((unsigned int));
476 static void pe
PARAMS ((expressionS
*));
477 static void ps
PARAMS ((symbolS
*));
484 register template *p
;
487 fprintf (stdout
, "%s: template ", line
);
489 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
490 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
491 fprintf (stdout
, " base %x index %x scale %x\n",
492 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
493 for (i
= 0; i
< x
->operands
; i
++)
495 fprintf (stdout
, " #%d: ", i
+ 1);
497 fprintf (stdout
, "\n");
498 if (x
->types
[i
] & Reg
)
499 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
500 if (x
->types
[i
] & Imm
)
502 if (x
->types
[i
] & (Disp
| Abs
))
512 fprintf (stdout
, " %d operands ", t
->operands
);
513 fprintf (stdout
, "opcode %x ",
515 if (t
->extension_opcode
!= None
)
516 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
517 if (t
->opcode_modifier
& D
)
518 fprintf (stdout
, "D");
519 if (t
->opcode_modifier
& W
)
520 fprintf (stdout
, "W");
521 fprintf (stdout
, "\n");
522 for (i
= 0; i
< t
->operands
; i
++)
524 fprintf (stdout
, " #%d type ", i
+ 1);
525 pt (t
->operand_types
[i
]);
526 fprintf (stdout
, "\n");
534 fprintf (stdout
, " operation %d\n", e
->X_op
);
535 fprintf (stdout
, " add_number %d (%x)\n",
536 e
->X_add_number
, e
->X_add_number
);
539 fprintf (stdout
, " add_symbol ");
540 ps (e
->X_add_symbol
);
541 fprintf (stdout
, "\n");
545 fprintf (stdout
, " op_symbol ");
547 fprintf (stdout
, "\n");
555 fprintf (stdout
, "%s type %s%s",
557 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
558 segment_name (S_GET_SEGMENT (s
)));
579 { BaseIndex
, "BaseIndex" },
589 { InOutPortReg
, "InOutPortReg" },
590 { ShiftCount
, "ShiftCount" },
592 { Control
, "control reg" },
593 { Test
, "test reg" },
594 { FloatReg
, "FReg" },
595 { FloatAcc
, "FAcc" },
596 { JumpAbsolute
, "Jump Absolute" },
604 register struct type_name
*ty
;
608 fprintf (stdout
, "Unknown");
612 for (ty
= type_names
; ty
->mask
; ty
++)
614 fprintf (stdout
, "%s, ", ty
->tname
);
619 #endif /* DEBUG386 */
622 static bfd_reloc_code_real_type
631 case 1: return BFD_RELOC_8_PCREL
;
632 case 2: return BFD_RELOC_16_PCREL
;
634 case 4: return BFD_RELOC_32_PCREL
;
640 case 1: return BFD_RELOC_8
;
641 case 2: return BFD_RELOC_16
;
643 case 4: return BFD_RELOC_32
;
646 as_bad ("Can not do %d byte %srelocation", size
,
647 pcrel
? "pc-relative" : "");
648 return BFD_RELOC_NONE
;
651 #define reloc(SIZE,PCREL) 0
652 #define BFD_RELOC_32 0
653 #define BFD_RELOC_32_PCREL 0
656 /* This is the guts of the machine-dependent assembler. LINE points to a
657 machine dependent instruction. This function is supposed to emit
658 the frags/bytes it assembles to. */
663 /* Holds template once we've found it. */
664 register template *t
;
666 /* Count the size of the instruction generated. */
669 /* Possible templates for current insn */
670 templates
*current_templates
= (templates
*) 0;
672 /* Initialize globals. */
673 memset (&i
, '\0', sizeof (i
));
674 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
675 memset (im_expressions
, '\0', sizeof (im_expressions
));
676 save_stack_p
= save_stack
; /* reset stack pointer */
678 /* Fist parse an opcode & call i386_operand for the operands.
679 We assume that the scrubber has arranged it so that line[0] is the valid
680 start of a (possibly prefixed) opcode. */
682 register char *l
= line
; /* Fast place to put LINE. */
684 /* 1 if operand is pending after ','. */
685 unsigned int expecting_operand
= 0;
686 /* 1 if we found a prefix only acceptable with string insns. */
687 unsigned int expecting_string_instruction
= 0;
688 /* Non-zero if operand parens not balenced. */
689 unsigned int paren_not_balenced
;
690 char *token_start
= l
;
692 while (!is_space_char (*l
) && *l
!= END_OF_INSN
)
694 if (!is_opcode_char (*l
))
696 as_bad ("invalid character %s in opcode", output_invalid (*l
));
699 else if (*l
!= PREFIX_SEPERATOR
)
701 *l
= opcode_chars
[(unsigned char) *l
]; /* fold case of opcodes */
705 { /* this opcode's got a prefix */
706 register unsigned int q
;
707 register prefix_entry
*prefix
;
709 if (l
== token_start
)
711 as_bad ("expecting prefix; got nothing");
714 END_STRING_AND_SAVE (l
);
715 prefix
= (prefix_entry
*) hash_find (prefix_hash
, token_start
);
718 as_bad ("no such opcode prefix ('%s')", token_start
);
721 RESTORE_END_STRING (l
);
722 /* check for repeated prefix */
723 for (q
= 0; q
< i
.prefixes
; q
++)
724 if (i
.prefix
[q
] == prefix
->prefix_code
)
726 as_bad ("same prefix used twice; you don't really want this!");
729 if (i
.prefixes
== MAX_PREFIXES
)
731 as_bad ("too many opcode prefixes");
734 i
.prefix
[i
.prefixes
++] = prefix
->prefix_code
;
735 if (prefix
->prefix_code
== REPE
|| prefix
->prefix_code
== REPNE
)
736 expecting_string_instruction
= 1;
737 /* skip past PREFIX_SEPERATOR and reset token_start */
741 END_STRING_AND_SAVE (l
);
742 if (token_start
== l
)
744 as_bad ("expecting opcode; got nothing");
748 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
749 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
750 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
751 if (!current_templates
)
753 int last_index
= strlen (token_start
) - 1;
754 char last_char
= token_start
[last_index
];
757 case DWORD_OPCODE_SUFFIX
:
758 case WORD_OPCODE_SUFFIX
:
759 case BYTE_OPCODE_SUFFIX
:
760 token_start
[last_index
] = '\0';
761 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
762 token_start
[last_index
] = last_char
;
763 i
.suffix
= last_char
;
765 if (!current_templates
)
767 as_bad ("no such 386 instruction: `%s'", token_start
);
771 RESTORE_END_STRING (l
);
773 /* check for rep/repne without a string instruction */
774 if (expecting_string_instruction
&&
775 !IS_STRING_INSTRUCTION (current_templates
->
778 as_bad ("expecting string instruction after rep/repne");
782 /* There may be operands to parse. */
783 if (*l
!= END_OF_INSN
&&
784 /* For string instructions, we ignore any operands if given. This
785 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
786 the operands are always going to be the same, and are not really
787 encoded in machine code. */
788 !IS_STRING_INSTRUCTION (current_templates
->
794 /* skip optional white space before operand */
795 while (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
797 if (!is_space_char (*l
))
799 as_bad ("invalid character %s before %s operand",
801 ordinal_names
[i
.operands
]);
806 token_start
= l
; /* after white space */
807 paren_not_balenced
= 0;
808 while (paren_not_balenced
|| *l
!= ',')
810 if (*l
== END_OF_INSN
)
812 if (paren_not_balenced
)
814 as_bad ("unbalenced parenthesis in %s operand.",
815 ordinal_names
[i
.operands
]);
819 break; /* we are done */
821 else if (!is_operand_char (*l
) && !is_space_char (*l
))
823 as_bad ("invalid character %s in %s operand",
825 ordinal_names
[i
.operands
]);
829 ++paren_not_balenced
;
831 --paren_not_balenced
;
834 if (l
!= token_start
)
835 { /* yes, we've read in another operand */
836 unsigned int operand_ok
;
837 this_operand
= i
.operands
++;
838 if (i
.operands
> MAX_OPERANDS
)
840 as_bad ("spurious operands; (%d operands/instruction max)",
844 /* now parse operand adding info to 'i' as we go along */
845 END_STRING_AND_SAVE (l
);
846 operand_ok
= i386_operand (token_start
);
847 RESTORE_END_STRING (l
); /* restore old contents */
853 if (expecting_operand
)
855 expecting_operand_after_comma
:
856 as_bad ("expecting operand after ','; got nothing");
861 as_bad ("expecting operand before ','; got nothing");
866 /* now *l must be either ',' or END_OF_INSN */
869 if (*++l
== END_OF_INSN
)
870 { /* just skip it, if it's \n complain */
871 goto expecting_operand_after_comma
;
873 expecting_operand
= 1;
876 while (*l
!= END_OF_INSN
); /* until we get end of insn */
880 /* Now we've parsed the opcode into a set of templates, and have the
883 Next, we find a template that matches the given insn,
884 making sure the overlap of the given operands types is consistent
885 with the template operand types. */
887 #define MATCH(overlap,given_type) \
889 (((overlap & (JumpAbsolute|BaseIndex|Mem8)) \
890 == (given_type & (JumpAbsolute|BaseIndex|Mem8))) \
891 || (overlap == InOutPortReg)))
894 /* If m0 and m1 are register matches they must be consistent
895 with the expected operand types t0 and t1.
896 That is, if both m0 & m1 are register matches
897 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
898 then, either 1. or 2. must be true:
899 1. the expected operand type register overlap is null:
902 the given register overlap is null:
904 2. the expected operand type register overlap == the given
905 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
907 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
908 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
909 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
910 ((t0 & t1) & (m0 & m1) & (Reg)) \
913 register unsigned int overlap0
, overlap1
;
915 unsigned int overlap2
;
916 unsigned int found_reverse_match
;
918 overlap0
= overlap1
= overlap2
= found_reverse_match
= 0;
919 for (t
= current_templates
->start
;
920 t
< current_templates
->end
;
924 /* must have right number of operands */
925 if (i
.operands
!= t
->operands
)
927 else if (!t
->operands
)
928 break; /* 0 operands always matches */
930 overlap0
= i
.types
[0] & t
->operand_types
[0];
934 if (!MATCH (overlap0
, i
.types
[0]))
939 overlap1
= i
.types
[1] & t
->operand_types
[1];
940 if (!MATCH (overlap0
, i
.types
[0]) ||
941 !MATCH (overlap1
, i
.types
[1]) ||
942 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
944 t
->operand_types
[1]))
947 /* check if other direction is valid ... */
948 if (!(t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
))
951 /* try reversing direction of operands */
952 overlap0
= i
.types
[0] & t
->operand_types
[1];
953 overlap1
= i
.types
[1] & t
->operand_types
[0];
954 if (!MATCH (overlap0
, i
.types
[0]) ||
955 !MATCH (overlap1
, i
.types
[1]) ||
956 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
958 t
->operand_types
[1]))
960 /* does not match either direction */
963 /* found a reverse match here -- slip through */
964 /* found_reverse_match holds which of D or FloatD we've found */
965 found_reverse_match
= t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
;
966 } /* endif: not forward match */
967 /* found either forward/reverse 2 operand match here */
968 if (t
->operands
== 3)
970 overlap2
= i
.types
[2] & t
->operand_types
[2];
971 if (!MATCH (overlap2
, i
.types
[2]) ||
972 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap2
,
974 t
->operand_types
[2]) ||
975 !CONSISTENT_REGISTER_MATCH (overlap1
, overlap2
,
977 t
->operand_types
[2]))
980 /* found either forward/reverse 2 or 3 operand match here:
981 slip through to break */
983 break; /* we've found a match; break out of loop */
985 if (t
== current_templates
->end
)
986 { /* we found no match */
987 as_bad ("operands given don't match any known 386 instruction");
991 /* Copy the template we found (we may change it!). */
992 memcpy (&i
.tm
, t
, sizeof (template));
993 t
= &i
.tm
; /* alter new copy of template */
995 /* If there's no opcode suffix we try to invent one based on register
997 if (!i
.suffix
&& i
.reg_operands
)
999 /* We take i.suffix from the LAST register operand specified. This
1000 assumes that the last register operands is the destination register
1003 for (op
= 0; op
< MAX_OPERANDS
; op
++)
1004 if (i
.types
[op
] & Reg
)
1006 i
.suffix
= ((i
.types
[op
] == Reg8
) ? BYTE_OPCODE_SUFFIX
:
1007 (i
.types
[op
] == Reg16
) ? WORD_OPCODE_SUFFIX
:
1008 DWORD_OPCODE_SUFFIX
);
1012 /* Make still unresolved immediate matches conform to size of immediate
1013 given in i.suffix. Note: overlap2 cannot be an immediate!
1015 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1016 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1017 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1021 as_bad ("no opcode suffix given; can't determine immediate size");
1024 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1025 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1027 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1028 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1029 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1033 as_bad ("no opcode suffix given; can't determine immediate size");
1036 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1037 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1040 i
.types
[0] = overlap0
;
1041 i
.types
[1] = overlap1
;
1042 i
.types
[2] = overlap2
;
1044 if (overlap0
& ImplicitRegister
)
1046 if (overlap1
& ImplicitRegister
)
1048 if (overlap2
& ImplicitRegister
)
1050 if (overlap0
& Imm1
)
1051 i
.imm_operands
= 0; /* kludge for shift insns */
1053 if (found_reverse_match
)
1056 save
= t
->operand_types
[0];
1057 t
->operand_types
[0] = t
->operand_types
[1];
1058 t
->operand_types
[1] = save
;
1061 /* Finalize opcode. First, we change the opcode based on the operand
1062 size given by i.suffix: we never have to change things for byte insns,
1063 or when no opcode suffix is need to size the operands. */
1065 if (!i
.suffix
&& (t
->opcode_modifier
& W
))
1067 as_bad ("no opcode suffix given and no register operands; can't size instruction");
1071 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1073 /* Select between byte and word/dword operations. */
1074 if (t
->opcode_modifier
& W
)
1075 t
->base_opcode
|= W
;
1076 /* Now select between word & dword operations via the
1077 operand size prefix. */
1078 if (i
.suffix
== WORD_OPCODE_SUFFIX
)
1080 if (i
.prefixes
== MAX_PREFIXES
)
1082 as_bad ("%d prefixes given and 'w' opcode suffix gives too many prefixes",
1086 i
.prefix
[i
.prefixes
++] = WORD_PREFIX_OPCODE
;
1090 /* For insns with operands there are more diddles to do to the opcode. */
1093 /* If we found a reverse match we must alter the opcode direction bit
1094 found_reverse_match holds bit to set (different for int &
1097 if (found_reverse_match
)
1099 t
->base_opcode
|= found_reverse_match
;
1102 /* The imul $imm, %reg instruction is converted into
1103 imul $imm, %reg, %reg. */
1104 if (t
->opcode_modifier
& imulKludge
)
1106 /* Pretend we saw the 3 operand case. */
1107 i
.regs
[2] = i
.regs
[1];
1111 /* Certain instructions expect the destination to be in the i.rm.reg
1112 field. This is by far the exceptional case. For these
1113 instructions, if the source operand is a register, we must reverse
1114 the i.rm.reg and i.rm.regmem fields. We accomplish this by faking
1115 that the two register operands were given in the reverse order. */
1116 if ((t
->opcode_modifier
& ReverseRegRegmem
) && i
.reg_operands
== 2)
1118 unsigned int first_reg_operand
= (i
.types
[0] & Reg
) ? 0 : 1;
1119 unsigned int second_reg_operand
= first_reg_operand
+ 1;
1120 reg_entry
*tmp
= i
.regs
[first_reg_operand
];
1121 i
.regs
[first_reg_operand
] = i
.regs
[second_reg_operand
];
1122 i
.regs
[second_reg_operand
] = tmp
;
1125 if (t
->opcode_modifier
& ShortForm
)
1127 /* The register or float register operand is in operand 0 or 1. */
1128 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1129 /* Register goes in low 3 bits of opcode. */
1130 t
->base_opcode
|= i
.regs
[op
]->reg_num
;
1132 else if (t
->opcode_modifier
& ShortFormW
)
1134 /* Short form with 0x8 width bit. Register is always dest. operand */
1135 t
->base_opcode
|= i
.regs
[1]->reg_num
;
1136 if (i
.suffix
== WORD_OPCODE_SUFFIX
||
1137 i
.suffix
== DWORD_OPCODE_SUFFIX
)
1138 t
->base_opcode
|= 0x8;
1140 else if (t
->opcode_modifier
& Seg2ShortForm
)
1142 if (t
->base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1144 as_bad ("you can't 'pop cs' on the 386.");
1147 t
->base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1149 else if (t
->opcode_modifier
& Seg3ShortForm
)
1151 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
1152 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
1153 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
1154 to change the opcode. */
1155 if (i
.regs
[0]->reg_num
== 5)
1156 t
->base_opcode
|= 0x08;
1158 else if (t
->opcode_modifier
& Modrm
)
1160 /* The opcode is completed (modulo t->extension_opcode which must
1161 be put into the modrm byte.
1162 Now, we make the modrm & index base bytes based on all the info
1165 /* i.reg_operands MUST be the number of real register operands;
1166 implicit registers do not count. */
1167 if (i
.reg_operands
== 2)
1169 unsigned int source
, dest
;
1170 source
= (i
.types
[0] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 0 : 1;
1173 /* We must be careful to make sure that all
1174 segment/control/test/debug registers go into the i.rm.reg
1175 field (despite the whether they are source or destination
1177 if (i
.regs
[dest
]->reg_type
& (SReg2
| SReg3
| Control
| Debug
| Test
))
1179 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1180 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1184 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1185 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1189 { /* if it's not 2 reg operands... */
1192 unsigned int fake_zero_displacement
= 0;
1193 unsigned int op
= (i
.types
[0] & Mem
) ? 0 : ((i
.types
[1] & Mem
) ? 1 : 2);
1195 /* Encode memory operand into modrm byte and base index
1198 if (i
.base_reg
== esp
&& !i
.index_reg
)
1200 /* <disp>(%esp) becomes two byte modrm with no index
1202 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1203 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1204 i
.bi
.base
= ESP_REG_NUM
;
1205 i
.bi
.index
= NO_INDEX_REGISTER
;
1206 i
.bi
.scale
= 0; /* Must be zero! */
1208 else if (i
.base_reg
== ebp
&& !i
.index_reg
)
1210 if (!(i
.types
[op
] & Disp
))
1212 /* Must fake a zero byte displacement. There is
1213 no direct way to code '(%ebp)' directly. */
1214 fake_zero_displacement
= 1;
1215 /* fake_zero_displacement code does not set this. */
1216 i
.types
[op
] |= Disp8
;
1218 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1219 i
.rm
.regmem
= EBP_REG_NUM
;
1221 else if (!i
.base_reg
&& (i
.types
[op
] & BaseIndex
))
1223 /* There are three cases here.
1224 Case 1: '<32bit disp>(,1)' -- indirect absolute.
1225 (Same as cases 2 & 3 with NO index register)
1226 Case 2: <32bit disp> (,<index>) -- no base register with disp
1227 Case 3: (, <index>) --- no base register;
1228 no disp (must add 32bit 0 disp). */
1229 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1230 i
.rm
.mode
= 0; /* 32bit mode */
1231 i
.bi
.base
= NO_BASE_REGISTER
;
1232 i
.types
[op
] &= ~Disp
;
1233 i
.types
[op
] |= Disp32
; /* Must be 32bit! */
1235 { /* case 2 or case 3 */
1236 i
.bi
.index
= i
.index_reg
->reg_num
;
1237 i
.bi
.scale
= i
.log2_scale_factor
;
1238 if (i
.disp_operands
== 0)
1239 fake_zero_displacement
= 1; /* case 3 */
1243 i
.bi
.index
= NO_INDEX_REGISTER
;
1247 else if (i
.disp_operands
&& !i
.base_reg
&& !i
.index_reg
)
1249 /* Operand is just <32bit disp> */
1250 i
.rm
.regmem
= EBP_REG_NUM
;
1252 i
.types
[op
] &= ~Disp
;
1253 i
.types
[op
] |= Disp32
;
1257 /* It's not a special case; rev'em up. */
1258 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1259 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1262 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1263 i
.bi
.base
= i
.base_reg
->reg_num
;
1264 i
.bi
.index
= i
.index_reg
->reg_num
;
1265 i
.bi
.scale
= i
.log2_scale_factor
;
1266 if (i
.base_reg
== ebp
&& i
.disp_operands
== 0)
1268 fake_zero_displacement
= 1;
1269 i
.types
[op
] |= Disp8
;
1270 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1274 if (fake_zero_displacement
)
1276 /* Fakes a zero displacement assuming that i.types[op]
1277 holds the correct displacement size. */
1278 exp
= &disp_expressions
[i
.disp_operands
++];
1280 exp
->X_op
= O_constant
;
1281 exp
->X_add_number
= 0;
1282 exp
->X_add_symbol
= (symbolS
*) 0;
1283 exp
->X_op_symbol
= (symbolS
*) 0;
1286 /* Select the correct segment for the memory operand. */
1289 unsigned int seg_index
;
1290 const seg_entry
*default_seg
;
1292 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
)
1294 seg_index
= (i
.rm
.mode
<< 3) | i
.bi
.base
;
1295 default_seg
= two_byte_segment_defaults
[seg_index
];
1299 seg_index
= (i
.rm
.mode
<< 3) | i
.rm
.regmem
;
1300 default_seg
= one_byte_segment_defaults
[seg_index
];
1302 /* If the specified segment is not the default, use an
1303 opcode prefix to select it */
1304 if (i
.seg
!= default_seg
)
1306 if (i
.prefixes
== MAX_PREFIXES
)
1308 as_bad ("%d prefixes given and %s segment override gives too many prefixes",
1309 MAX_PREFIXES
, i
.seg
->seg_name
);
1312 i
.prefix
[i
.prefixes
++] = i
.seg
->seg_prefix
;
1317 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1318 (if any) based on t->extension_opcode. Again, we must be
1319 careful to make sure that segment/control/debug/test
1320 registers are coded into the i.rm.reg field. */
1324 (i
.types
[0] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 0 :
1325 (i
.types
[1] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 1 : 2;
1326 /* If there is an extension opcode to put here, the
1327 register number must be put into the regmem field. */
1328 if (t
->extension_opcode
!= None
)
1329 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
1331 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
1333 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1334 we must set it to 3 to indicate this is a register
1335 operand int the regmem field */
1336 if (!i
.mem_operands
)
1340 /* Fill in i.rm.reg field with extension opcode (if any). */
1341 if (t
->extension_opcode
!= None
)
1342 i
.rm
.reg
= t
->extension_opcode
;
1348 /* Handle conversion of 'int $3' --> special int3 insn. */
1349 if (t
->base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1351 t
->base_opcode
= INT3_OPCODE
;
1355 /* We are ready to output the insn. */
1360 if (t
->opcode_modifier
& Jump
)
1362 unsigned long n
= i
.disps
[0]->X_add_number
;
1364 if (i
.disps
[0]->X_op
== O_constant
)
1366 if (fits_in_signed_byte (n
))
1370 p
[0] = t
->base_opcode
;
1373 #if 0 /* leave out 16 bit jumps - pace */
1374 else if (fits_in_signed_word (n
))
1378 p
[0] = WORD_PREFIX_OPCODE
;
1379 p
[1] = t
->base_opcode
;
1380 md_number_to_chars (&p
[2], (valueT
) n
, 2);
1384 { /* It's an absolute dword displacement. */
1385 if (t
->base_opcode
== JUMP_PC_RELATIVE
)
1387 /* unconditional jump */
1391 md_number_to_chars (&p
[1], (valueT
) n
, 4);
1395 /* conditional jump */
1398 p
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1399 p
[1] = t
->base_opcode
+ 0x10;
1400 md_number_to_chars (&p
[2], (valueT
) n
, 4);
1406 /* It's a symbol; end frag & setup for relax.
1407 Make sure there are more than 6 chars left in the current frag;
1408 if not we'll have to start a new one. */
1409 if (obstack_room (&frags
) <= 6)
1411 frag_wane (frag_now
);
1416 p
[0] = t
->base_opcode
;
1417 frag_var (rs_machine_dependent
,
1418 6, /* 2 opcode/prefix + 4 displacement */
1420 ((unsigned char) *p
== JUMP_PC_RELATIVE
1421 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
)
1422 : ENCODE_RELAX_STATE (COND_JUMP
, BYTE
)),
1423 i
.disps
[0]->X_add_symbol
,
1427 else if (t
->opcode_modifier
& (JumpByte
| JumpDword
))
1429 int size
= (t
->opcode_modifier
& JumpByte
) ? 1 : 4;
1430 unsigned long n
= i
.disps
[0]->X_add_number
;
1432 if (fits_in_unsigned_byte (t
->base_opcode
))
1434 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1439 p
= frag_more (2); /* opcode can be at most two bytes */
1441 /* put out high byte first: can't use md_number_to_chars! */
1442 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1443 *p
= t
->base_opcode
& 0xff;
1446 p
= frag_more (size
);
1448 if (i
.disps
[0]->X_op
== O_constant
)
1450 md_number_to_chars (p
, (valueT
) n
, size
);
1451 if (size
== 1 && !fits_in_signed_byte (n
))
1453 as_bad ("loop/jecx only takes byte displacement; %lu shortened to %d",
1459 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1460 i
.disps
[0], 1, reloc (size
, 1));
1463 else if (t
->opcode_modifier
& JumpInterSegment
)
1465 p
= frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1466 insn_size
+= 1 + 2 + 4;
1467 p
[0] = t
->base_opcode
;
1468 if (i
.imms
[1]->X_op
== O_constant
)
1469 md_number_to_chars (p
+ 1, (valueT
) i
.imms
[1]->X_add_number
, 4);
1471 fix_new_exp (frag_now
, p
+ 1 - frag_now
->fr_literal
, 4,
1472 i
.imms
[1], 0, BFD_RELOC_32
);
1473 if (i
.imms
[0]->X_op
!= O_constant
)
1474 as_bad ("can't handle non absolute segment in long call/jmp");
1475 md_number_to_chars (p
+ 5, (valueT
) i
.imms
[0]->X_add_number
, 2);
1479 /* Output normal instructions here. */
1482 /* First the prefix bytes. */
1483 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1487 md_number_to_chars (p
, (valueT
) *q
, 1);
1490 /* Now the opcode; be careful about word order here! */
1491 if (fits_in_unsigned_byte (t
->base_opcode
))
1493 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1496 else if (fits_in_unsigned_word (t
->base_opcode
))
1500 /* put out high byte first: can't use md_number_to_chars! */
1501 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1502 *p
= t
->base_opcode
& 0xff;
1505 { /* opcode is either 3 or 4 bytes */
1506 if (t
->base_opcode
& 0xff000000)
1510 *p
++ = (t
->base_opcode
>> 24) & 0xff;
1517 *p
++ = (t
->base_opcode
>> 16) & 0xff;
1518 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1519 *p
= (t
->base_opcode
) & 0xff;
1522 /* Now the modrm byte and base index byte (if present). */
1523 if (t
->opcode_modifier
& Modrm
)
1527 /* md_number_to_chars (p, i.rm, 1); */
1528 md_number_to_chars (p
,
1529 (valueT
) (i
.rm
.regmem
<< 0
1533 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1534 ==> need second modrm byte. */
1535 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
&& i
.rm
.mode
!= 3)
1539 /* md_number_to_chars (p, i.bi, 1); */
1540 md_number_to_chars (p
, (valueT
) (i
.bi
.base
<< 0
1547 if (i
.disp_operands
)
1549 register unsigned int n
;
1551 for (n
= 0; n
< i
.operands
; n
++)
1555 if (i
.disps
[n
]->X_op
== O_constant
)
1557 if (i
.types
[n
] & (Disp8
| Abs8
))
1561 md_number_to_chars (p
,
1562 (valueT
) i
.disps
[n
]->X_add_number
,
1565 else if (i
.types
[n
] & (Disp16
| Abs16
))
1569 md_number_to_chars (p
,
1570 (valueT
) i
.disps
[n
]->X_add_number
,
1574 { /* Disp32|Abs32 */
1577 md_number_to_chars (p
,
1578 (valueT
) i
.disps
[n
]->X_add_number
,
1583 { /* not absolute_section */
1584 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1587 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
1588 i
.disps
[n
], 0, BFD_RELOC_32
);
1592 } /* end displacement output */
1594 /* output immediate */
1597 register unsigned int n
;
1599 for (n
= 0; n
< i
.operands
; n
++)
1603 if (i
.imms
[n
]->X_op
== O_constant
)
1605 if (i
.types
[n
] & (Imm8
| Imm8S
))
1609 md_number_to_chars (p
,
1610 (valueT
) i
.imms
[n
]->X_add_number
,
1613 else if (i
.types
[n
] & Imm16
)
1617 md_number_to_chars (p
,
1618 (valueT
) i
.imms
[n
]->X_add_number
,
1625 md_number_to_chars (p
,
1626 (valueT
) i
.imms
[n
]->X_add_number
,
1631 { /* not absolute_section */
1632 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
1633 /* try to support other sizes ... */
1635 if (i
.types
[n
] & (Imm8
| Imm8S
))
1637 else if (i
.types
[n
] & Imm16
)
1641 p
= frag_more (size
);
1643 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1644 i
.imms
[n
], 0, reloc (size
, 0));
1648 } /* end immediate output */
1656 #endif /* DEBUG386 */
1662 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1666 i386_operand (operand_string
)
1667 char *operand_string
;
1669 register char *op_string
= operand_string
;
1671 /* Address of '\0' at end of operand_string. */
1672 char *end_of_operand_string
= operand_string
+ strlen (operand_string
);
1674 /* Start and end of displacement string expression (if found). */
1675 char *displacement_string_start
= NULL
;
1676 char *displacement_string_end
= NULL
;
1678 /* We check for an absolute prefix (differentiating,
1679 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1680 if (*op_string
== ABSOLUTE_PREFIX
)
1683 i
.types
[this_operand
] |= JumpAbsolute
;
1686 /* Check if operand is a register. */
1687 if (*op_string
== REGISTER_PREFIX
)
1689 register reg_entry
*r
;
1690 if (!(r
= parse_register (op_string
)))
1692 as_bad ("bad register name ('%s')", op_string
);
1695 /* Check for segment override, rather than segment register by
1696 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1697 if ((r
->reg_type
& (SReg2
| SReg3
)) && op_string
[3] == ':')
1702 i
.seg
= (seg_entry
*) & es
;
1705 i
.seg
= (seg_entry
*) & cs
;
1708 i
.seg
= (seg_entry
*) & ss
;
1711 i
.seg
= (seg_entry
*) & ds
;
1714 i
.seg
= (seg_entry
*) & fs
;
1717 i
.seg
= (seg_entry
*) & gs
;
1720 op_string
+= 4; /* skip % <x> s : */
1721 operand_string
= op_string
; /* Pretend given string starts here. */
1722 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
1723 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
1725 as_bad ("bad memory operand after segment override");
1728 /* Handle case of %es:*foo. */
1729 if (*op_string
== ABSOLUTE_PREFIX
)
1732 i
.types
[this_operand
] |= JumpAbsolute
;
1734 goto do_memory_reference
;
1736 i
.types
[this_operand
] |= r
->reg_type
;
1737 i
.regs
[this_operand
] = r
;
1740 else if (*op_string
== IMMEDIATE_PREFIX
)
1741 { /* ... or an immediate */
1742 char *save_input_line_pointer
;
1746 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
1748 as_bad ("only 1 or 2 immediate operands are allowed");
1752 exp
= &im_expressions
[i
.imm_operands
++];
1753 i
.imms
[this_operand
] = exp
;
1754 save_input_line_pointer
= input_line_pointer
;
1755 input_line_pointer
= ++op_string
; /* must advance op_string! */
1757 exp_seg
= expression (exp
);
1758 input_line_pointer
= save_input_line_pointer
;
1760 if (exp
->X_op
== O_absent
)
1762 /* missing or bad expr becomes absolute 0 */
1763 as_bad ("missing or invalid immediate expression '%s' taken as 0",
1765 exp
->X_op
= O_constant
;
1766 exp
->X_add_number
= 0;
1767 exp
->X_add_symbol
= (symbolS
*) 0;
1768 exp
->X_op_symbol
= (symbolS
*) 0;
1769 i
.types
[this_operand
] |= Imm
;
1771 else if (exp
->X_op
== O_constant
)
1773 i
.types
[this_operand
] |=
1774 smallest_imm_type ((unsigned long) exp
->X_add_number
);
1777 else if (exp_seg
!= text_section
1778 && exp_seg
!= data_section
1779 && exp_seg
!= bss_section
1780 && exp_seg
!= undefined_section
1781 #ifdef BFD_ASSEMBLER
1782 && ! bfd_is_com_section (exp_seg
)
1787 as_bad ("Unimplemented segment type %d in parse_operand", exp_seg
);
1793 /* this is an address ==> 32bit */
1794 i
.types
[this_operand
] |= Imm32
;
1796 /* shorten this type of this operand if the instruction wants
1797 * fewer bits than are present in the immediate. The bit field
1798 * code can put out 'andb $0xffffff, %al', for example. pace
1799 * also 'movw $foo,(%eax)'
1803 case WORD_OPCODE_SUFFIX
:
1804 i
.types
[this_operand
] |= Imm16
;
1806 case BYTE_OPCODE_SUFFIX
:
1807 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
1811 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
1812 || *op_string
== '(')
1814 /* This is a memory reference of some sort. */
1815 register char *base_string
;
1816 unsigned int found_base_index_form
;
1818 do_memory_reference
:
1819 if (i
.mem_operands
== MAX_MEMORY_OPERANDS
)
1821 as_bad ("more than 1 memory reference in instruction");
1826 /* Determine type of memory operand from opcode_suffix;
1827 no opcode suffix implies general memory references. */
1830 case BYTE_OPCODE_SUFFIX
:
1831 i
.types
[this_operand
] |= Mem8
;
1833 case WORD_OPCODE_SUFFIX
:
1834 i
.types
[this_operand
] |= Mem16
;
1836 case DWORD_OPCODE_SUFFIX
:
1838 i
.types
[this_operand
] |= Mem32
;
1841 /* Check for base index form. We detect the base index form by
1842 looking for an ')' at the end of the operand, searching
1843 for the '(' matching it, and finding a REGISTER_PREFIX or ','
1845 base_string
= end_of_operand_string
- 1;
1846 found_base_index_form
= 0;
1847 if (*base_string
== ')')
1849 unsigned int parens_balenced
= 1;
1850 /* We've already checked that the number of left & right ()'s are
1851 equal, so this loop will not be infinite. */
1855 if (*base_string
== ')')
1857 if (*base_string
== '(')
1860 while (parens_balenced
);
1861 base_string
++; /* Skip past '('. */
1862 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
1863 found_base_index_form
= 1;
1866 /* If we can't parse a base index register expression, we've found
1867 a pure displacement expression. We set up displacement_string_start
1868 and displacement_string_end for the code below. */
1869 if (!found_base_index_form
)
1871 displacement_string_start
= op_string
;
1872 displacement_string_end
= end_of_operand_string
;
1876 char *base_reg_name
, *index_reg_name
, *num_string
;
1879 i
.types
[this_operand
] |= BaseIndex
;
1881 /* If there is a displacement set-up for it to be parsed later. */
1882 if (base_string
!= op_string
+ 1)
1884 displacement_string_start
= op_string
;
1885 displacement_string_end
= base_string
- 1;
1888 /* Find base register (if any). */
1889 if (*base_string
!= ',')
1891 base_reg_name
= base_string
++;
1892 /* skip past register name & parse it */
1893 while (isalpha (*base_string
))
1895 if (base_string
== base_reg_name
+ 1)
1897 as_bad ("can't find base register name after '(%c'",
1901 END_STRING_AND_SAVE (base_string
);
1902 if (!(i
.base_reg
= parse_register (base_reg_name
)))
1904 as_bad ("bad base register name ('%s')", base_reg_name
);
1907 RESTORE_END_STRING (base_string
);
1910 /* Now check seperator; must be ',' ==> index reg
1911 OR num ==> no index reg. just scale factor
1912 OR ')' ==> end. (scale factor = 1) */
1913 if (*base_string
!= ',' && *base_string
!= ')')
1915 as_bad ("expecting ',' or ')' after base register in `%s'",
1920 /* There may index reg here; and there may be a scale factor. */
1921 if (*base_string
== ',' && *(base_string
+ 1) == REGISTER_PREFIX
)
1923 index_reg_name
= ++base_string
;
1924 while (isalpha (*++base_string
));
1925 END_STRING_AND_SAVE (base_string
);
1926 if (!(i
.index_reg
= parse_register (index_reg_name
)))
1928 as_bad ("bad index register name ('%s')", index_reg_name
);
1931 RESTORE_END_STRING (base_string
);
1934 /* Check for scale factor. */
1935 if (*base_string
== ',' && isdigit (*(base_string
+ 1)))
1937 num_string
= ++base_string
;
1938 while (is_digit_char (*base_string
))
1940 if (base_string
== num_string
)
1942 as_bad ("can't find a scale factor after ','");
1945 END_STRING_AND_SAVE (base_string
);
1946 /* We've got a scale factor. */
1947 if (!sscanf (num_string
, "%d", &num
))
1949 as_bad ("can't parse scale factor from '%s'", num_string
);
1952 RESTORE_END_STRING (base_string
);
1954 { /* must be 1 digit scale */
1956 i
.log2_scale_factor
= 0;
1959 i
.log2_scale_factor
= 1;
1962 i
.log2_scale_factor
= 2;
1965 i
.log2_scale_factor
= 3;
1968 as_bad ("expecting scale factor of 1, 2, 4, 8; got %d", num
);
1974 if (!i
.index_reg
&& *base_string
== ',')
1976 as_bad ("expecting index register or scale factor after ','; got '%c'",
1977 *(base_string
+ 1));
1983 /* If there's an expression begining the operand, parse it,
1984 assuming displacement_string_start and displacement_string_end
1986 if (displacement_string_start
)
1988 register expressionS
*exp
;
1990 char *save_input_line_pointer
;
1991 exp
= &disp_expressions
[i
.disp_operands
];
1992 i
.disps
[this_operand
] = exp
;
1994 save_input_line_pointer
= input_line_pointer
;
1995 input_line_pointer
= displacement_string_start
;
1996 END_STRING_AND_SAVE (displacement_string_end
);
1997 exp_seg
= expression (exp
);
1998 if (*input_line_pointer
)
1999 as_bad ("Ignoring junk '%s' after expression", input_line_pointer
);
2000 RESTORE_END_STRING (displacement_string_end
);
2001 input_line_pointer
= save_input_line_pointer
;
2002 if (exp
->X_op
== O_absent
)
2004 /* missing expr becomes absolute 0 */
2005 as_bad ("missing or invalid displacement '%s' taken as 0",
2007 i
.types
[this_operand
] |= (Disp
| Abs
);
2008 exp
->X_op
= O_constant
;
2009 exp
->X_add_number
= 0;
2010 exp
->X_add_symbol
= (symbolS
*) 0;
2011 exp
->X_op_symbol
= (symbolS
*) 0;
2013 else if (exp
->X_op
== O_constant
)
2015 i
.types
[this_operand
] |= SMALLEST_DISP_TYPE (exp
->X_add_number
);
2017 else if (exp_seg
== text_section
2018 || exp_seg
== data_section
2019 || exp_seg
== bss_section
2020 || exp_seg
== undefined_section
)
2022 i
.types
[this_operand
] |= Disp32
;
2027 i
.types
[this_operand
] |= Disp32
;
2029 goto seg_unimplemented
;
2034 /* Make sure the memory operand we've been dealt is valid. */
2035 if (i
.base_reg
&& i
.index_reg
&&
2036 !(i
.base_reg
->reg_type
& i
.index_reg
->reg_type
& Reg
))
2038 as_bad ("register size mismatch in (base,index,scale) expression");
2042 * special case for (%dx) while doing input/output op
2045 (i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)) &&
2046 (i
.index_reg
== 0)))
2048 i
.types
[this_operand
] |= InOutPortReg
;
2051 if ((i
.base_reg
&& (i
.base_reg
->reg_type
& Reg32
) == 0) ||
2052 (i
.index_reg
&& (i
.index_reg
->reg_type
& Reg32
) == 0))
2054 as_bad ("base/index register must be 32 bit register");
2057 if (i
.index_reg
&& i
.index_reg
== esp
)
2059 as_bad ("%s may not be used as an index register", esp
->reg_name
);
2064 { /* it's not a memory operand; argh! */
2065 as_bad ("invalid char %s begining %s operand '%s'",
2066 output_invalid (*op_string
), ordinal_names
[this_operand
],
2070 return 1; /* normal return */
2074 * md_estimate_size_before_relax()
2076 * Called just before relax().
2077 * Any symbol that is now undefined will not become defined.
2078 * Return the correct fr_subtype in the frag.
2079 * Return the initial "guess for fr_var" to caller.
2080 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2081 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2082 * Although it may not be explicit in the frag, pretend fr_var starts with a
2086 md_estimate_size_before_relax (fragP
, segment
)
2087 register fragS
*fragP
;
2088 register segT segment
;
2090 register unsigned char *opcode
;
2091 register int old_fr_fix
;
2093 old_fr_fix
= fragP
->fr_fix
;
2094 opcode
= (unsigned char *) fragP
->fr_opcode
;
2095 /* We've already got fragP->fr_subtype right; all we have to do is check
2096 for un-relaxable symbols. */
2097 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2099 /* symbol is undefined in this segment */
2102 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2103 opcode
[0] = 0xe9; /* dword disp jmp */
2105 fix_new (fragP
, old_fr_fix
, 4,
2107 fragP
->fr_offset
, 1, BFD_RELOC_32_PCREL
);
2111 /* This changes the byte-displacement jump 0x7N -->
2112 the dword-displacement jump 0x0f8N */
2113 opcode
[1] = opcode
[0] + 0x10;
2114 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2115 fragP
->fr_fix
+= 1 + 4; /* we've added an opcode byte */
2116 fix_new (fragP
, old_fr_fix
+ 1, 4,
2118 fragP
->fr_offset
, 1, BFD_RELOC_32_PCREL
);
2123 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2124 } /* md_estimate_size_before_relax() */
2127 * md_convert_frag();
2129 * Called after relax() is finished.
2130 * In: Address of frag.
2131 * fr_type == rs_machine_dependent.
2132 * fr_subtype is what the address relaxed to.
2134 * Out: Any fixSs and constants are set up.
2135 * Caller will turn frag into a ".space 0".
2137 #ifndef BFD_ASSEMBLER
2139 md_convert_frag (headers
, fragP
)
2140 object_headers
*headers
;
2141 register fragS
*fragP
;
2144 md_convert_frag (abfd
, sec
, fragP
)
2147 register fragS
*fragP
;
2150 register unsigned char *opcode
;
2151 unsigned char *where_to_put_displacement
= NULL
;
2152 unsigned int target_address
;
2153 unsigned int opcode_address
;
2154 unsigned int extension
= 0;
2155 int displacement_from_opcode_start
;
2157 opcode
= (unsigned char *) fragP
->fr_opcode
;
2159 /* Address we want to reach in file space. */
2160 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2161 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2162 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2165 /* Address opcode resides at in file space. */
2166 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2168 /* Displacement from opcode start to fill into instruction. */
2169 displacement_from_opcode_start
= target_address
- opcode_address
;
2171 switch (fragP
->fr_subtype
)
2173 case ENCODE_RELAX_STATE (COND_JUMP
, BYTE
):
2174 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
):
2175 /* don't have to change opcode */
2176 extension
= 1; /* 1 opcode + 1 displacement */
2177 where_to_put_displacement
= &opcode
[1];
2180 case ENCODE_RELAX_STATE (COND_JUMP
, WORD
):
2181 opcode
[1] = TWO_BYTE_OPCODE_ESCAPE
;
2182 opcode
[2] = opcode
[0] + 0x10;
2183 opcode
[0] = WORD_PREFIX_OPCODE
;
2184 extension
= 4; /* 3 opcode + 2 displacement */
2185 where_to_put_displacement
= &opcode
[3];
2188 case ENCODE_RELAX_STATE (UNCOND_JUMP
, WORD
):
2190 opcode
[0] = WORD_PREFIX_OPCODE
;
2191 extension
= 3; /* 2 opcode + 2 displacement */
2192 where_to_put_displacement
= &opcode
[2];
2195 case ENCODE_RELAX_STATE (COND_JUMP
, DWORD
):
2196 opcode
[1] = opcode
[0] + 0x10;
2197 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2198 extension
= 5; /* 2 opcode + 4 displacement */
2199 where_to_put_displacement
= &opcode
[2];
2202 case ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
):
2204 extension
= 4; /* 1 opcode + 4 displacement */
2205 where_to_put_displacement
= &opcode
[1];
2209 BAD_CASE (fragP
->fr_subtype
);
2212 /* now put displacement after opcode */
2213 md_number_to_chars ((char *) where_to_put_displacement
,
2214 (valueT
) (displacement_from_opcode_start
- extension
),
2215 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2216 fragP
->fr_fix
+= extension
;
2220 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2221 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2222 const int md_reloc_size
= 8; /* Size of relocation record */
2225 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2227 addressT from_addr
, to_addr
;
2233 offset
= to_addr
- (from_addr
+ 2);
2234 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
2235 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
2239 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2241 addressT from_addr
, to_addr
;
2249 offset
= to_addr
- S_GET_VALUE (to_symbol
);
2250 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
2251 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2252 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
2253 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
2257 offset
= to_addr
- (from_addr
+ 5);
2258 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
2259 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2263 void /* Knows about order of bytes in address. */
2264 md_number_to_chars (con
, value
, nbytes
)
2265 char con
[]; /* Return 'nbytes' of chars here. */
2266 valueT value
; /* The value of the bits. */
2267 int nbytes
; /* Number of bytes in the output. */
2269 register char *p
= con
;
2274 p
[0] = value
& 0xff;
2277 p
[0] = value
& 0xff;
2278 p
[1] = (value
>> 8) & 0xff;
2281 p
[0] = value
& 0xff;
2282 p
[1] = (value
>> 8) & 0xff;
2283 p
[2] = (value
>> 16) & 0xff;
2284 p
[3] = (value
>> 24) & 0xff;
2292 /* Apply a fixup (fixS) to segment data, once it has been determined
2293 by our caller that we have all the info we need to fix it up.
2295 On the 386, immediates, displacements, and data pointers are all in
2296 the same (little-endian) format, so we don't need to care about which
2300 md_apply_fix_1 (fixP
, value
)
2301 fixS
*fixP
; /* The fix we're to put in */
2302 long value
; /* The value of the bits. */
2304 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2306 #ifdef BFD_ASSEMBLER
2308 * This is a hack. There should be a better way to
2311 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
2313 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2317 switch (fixP
->fx_size
)
2328 *p
++ = (value
>> 8);
2329 *p
++ = (value
>> 16);
2333 BAD_CASE (fixP
->fx_size
);
2337 #ifdef BFD_ASSEMBLER
2339 md_apply_fix (fixP
, valp
)
2343 md_apply_fix_1 (fixP
, *valp
);
2348 md_apply_fix (fixP
, val
)
2352 md_apply_fix_1 (fixP
, val
);
2357 /* This is never used. */
2358 long /* Knows about the byte order in a word. */
2359 md_chars_to_number (con
, nbytes
)
2360 unsigned char con
[]; /* Low order byte 1st. */
2361 int nbytes
; /* Number of bytes in the input. */
2364 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
2366 retval
<<= BITS_PER_CHAR
;
2374 #define MAX_LITTLENUMS 6
2376 /* Turn the string pointed to by litP into a floating point constant of type
2377 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2378 is stored in *sizeP . An error message is returned, or NULL on OK. */
2380 md_atof (type
, litP
, sizeP
)
2386 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2387 LITTLENUM_TYPE
*wordP
;
2409 return "Bad call to md_atof ()";
2411 t
= atof_ieee (input_line_pointer
, type
, words
);
2413 input_line_pointer
= t
;
2415 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2416 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2417 the bigendian 386. */
2418 for (wordP
= words
+ prec
- 1; prec
--;)
2420 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
2421 litP
+= sizeof (LITTLENUM_TYPE
);
2426 char output_invalid_buf
[8];
2433 sprintf (output_invalid_buf
, "'%c'", c
);
2435 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
2436 return output_invalid_buf
;
2439 /* reg_string starts *before* REGISTER_PREFIX */
2441 parse_register (reg_string
)
2444 register char *s
= reg_string
;
2446 char reg_name_given
[MAX_REG_NAME_SIZE
];
2448 s
++; /* skip REGISTER_PREFIX */
2449 for (p
= reg_name_given
; is_register_char (*s
); p
++, s
++)
2451 *p
= register_chars
[(unsigned char) *s
];
2452 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2453 return (reg_entry
*) 0;
2456 return (reg_entry
*) hash_find (reg_hash
, reg_name_given
);
2460 /* We have no need to default values of symbols. */
2464 md_undefined_symbol (name
)
2470 /* Parse an operand that is machine-specific.
2471 We just return without modifying the expression if we have nothing
2476 md_operand (expressionP
)
2477 expressionS
*expressionP
;
2481 /* Round up a section size to the appropriate boundary. */
2483 md_section_align (segment
, size
)
2487 return size
; /* Byte alignment is fine */
2490 /* Exactly what point is a PC-relative offset relative TO? On the
2491 i386, they're relative to the address of the offset, plus its
2492 size. (??? Is this right? FIXME-SOON!) */
2494 md_pcrel_from (fixP
)
2497 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2508 temp
= get_absolute_expression ();
2509 subseg_set (bss_section
, (subsegT
) temp
);
2510 demand_empty_rest_of_line ();
2516 #ifdef BFD_ASSEMBLER
2519 tc_gen_reloc (section
, fixp
)
2524 bfd_reloc_code_real_type code
;
2526 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
2527 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
2529 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
2531 MAP (1, 0, BFD_RELOC_8
);
2532 MAP (2, 0, BFD_RELOC_16
);
2534 MAP (4, 0, BFD_RELOC_32
);
2536 MAP (1, 1, BFD_RELOC_8_PCREL
);
2537 MAP (2, 1, BFD_RELOC_16_PCREL
);
2539 MAP (4, 1, BFD_RELOC_32_PCREL
);
2541 as_bad ("Can not do %d byte %srelocation", fixp
->fx_size
,
2542 fixp
->fx_pcrel
? "pc-relative" : "");
2547 rel
= (arelent
*) bfd_alloc_by_size_t (stdoutput
, sizeof (arelent
));
2549 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
2550 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2552 rel
->addend
= fixp
->fx_addnumber
;
2556 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
2561 name
= S_GET_NAME (fixp
->fx_addsy
);
2564 as_fatal ("Cannot find relocation type for symbol %s, code %d",
2571 #else /* ! BFD_ASSEMBLER */
2573 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
2575 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
2578 relax_addressT segment_address_in_file
;
2581 * In: length of relocation (or of address) in chars: 1, 2 or 4.
2582 * Out: GNU LD relocation length code: 0, 1, or 2.
2585 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
2588 know (fixP
->fx_addsy
!= NULL
);
2590 md_number_to_chars (where
,
2591 (valueT
) (fixP
->fx_frag
->fr_address
2592 + fixP
->fx_where
- segment_address_in_file
),
2595 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
2596 ? S_GET_TYPE (fixP
->fx_addsy
)
2597 : fixP
->fx_addsy
->sy_number
);
2599 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
2600 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
2601 where
[4] = r_symbolnum
& 0x0ff;
2602 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
2603 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
2604 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
2607 #endif /* OBJ_AOUT or OBJ_BOUT */
2609 #if defined (I386COFF)
2612 tc_coff_fix2rtype (fixP
)
2615 return (fixP
->fx_pcrel
?
2616 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
2617 fixP
->fx_size
== 2 ? R_PCRWORD
:
2619 (fixP
->fx_size
== 1 ? R_RELBYTE
:
2620 fixP
->fx_size
== 2 ? R_RELWORD
:
2625 tc_coff_sizemachdep (frag
)
2629 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
2634 #endif /* I386COFF */
2636 #endif /* BFD_ASSEMBLER? */
2638 /* end of tc-i386.c */