1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 1997 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 Intel 80386 machine specific gas.
23 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
24 Bugs & suggestions are completely welcome. This is free software.
25 Please help us make it better.
34 #include "opcode/i386.h"
37 #define TC_RELOC(X,Y) (Y)
40 static unsigned long mode_from_disp_size
PARAMS ((unsigned long));
41 static int fits_in_signed_byte
PARAMS ((long));
42 static int fits_in_unsigned_byte
PARAMS ((long));
43 static int fits_in_unsigned_word
PARAMS ((long));
44 static int fits_in_signed_word
PARAMS ((long));
45 static int smallest_imm_type
PARAMS ((long));
46 static void set_16bit_code_flag
PARAMS ((int));
48 static bfd_reloc_code_real_type reloc
49 PARAMS ((int, int, bfd_reloc_code_real_type
));
52 /* 'md_assemble ()' gathers together information and puts it into a
57 /* TM holds the template for the insn were currently assembling. */
59 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
61 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
63 /* OPERANDS gives the number of given operands. */
64 unsigned int operands
;
66 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
67 of given register, displacement, memory operands and immediate
69 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
71 /* TYPES [i] is the type (see above #defines) which tells us how to
72 search through DISPS [i] & IMMS [i] & REGS [i] for the required
74 unsigned int types
[MAX_OPERANDS
];
76 /* Displacements (if given) for each operand. */
77 expressionS
*disps
[MAX_OPERANDS
];
79 /* Relocation type for operand */
81 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
83 int disp_reloc
[MAX_OPERANDS
];
86 /* Immediate operands (if given) for each operand. */
87 expressionS
*imms
[MAX_OPERANDS
];
89 /* Register operands (if given) for each operand. */
90 reg_entry
*regs
[MAX_OPERANDS
];
92 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
93 the base index byte below. */
96 unsigned int log2_scale_factor
;
98 /* SEG gives the seg_entry of this insn. It is equal to zero unless
99 an explicit segment override is given. */
100 const seg_entry
*seg
; /* segment for memory operands (if given) */
102 /* PREFIX holds all the given prefix opcodes (usually null).
103 PREFIXES is the size of PREFIX. */
104 /* richfix: really unsigned? */
105 unsigned char prefix
[MAX_PREFIXES
];
106 unsigned int prefixes
;
108 /* RM and IB are the modrm byte and the base index byte where the
109 addressing modes of this insn are encoded. */
115 typedef struct _i386_insn i386_insn
;
117 /* This array holds the chars that always start a comment. If the
118 pre-processor is disabled, these aren't very useful */
119 #if defined (TE_I386AIX) || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
120 const char comment_chars
[] = "#/";
122 const char comment_chars
[] = "#";
125 /* This array holds the chars that only start a comment at the beginning of
126 a line. If the line seems to have the form '# 123 filename'
127 .line and .file directives will appear in the pre-processed output */
128 /* Note that input_file.c hand checks for '#' at the beginning of the
129 first line of the input file. This is because the compiler outputs
130 #NO_APP at the beginning of its output. */
131 /* Also note that comments started like this one will always work if
132 '/' isn't otherwise defined. */
133 #if defined (TE_I386AIX) || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
134 const char line_comment_chars
[] = "";
136 const char line_comment_chars
[] = "/";
138 const char line_separator_chars
[] = "";
140 /* Chars that can be used to separate mant from exp in floating point nums */
141 const char EXP_CHARS
[] = "eE";
143 /* Chars that mean this number is a floating point constant */
146 const char FLT_CHARS
[] = "fFdDxX";
148 /* tables for lexical analysis */
149 static char opcode_chars
[256];
150 static char register_chars
[256];
151 static char operand_chars
[256];
152 static char space_chars
[256];
153 static char identifier_chars
[256];
154 static char digit_chars
[256];
157 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
158 #define is_operand_char(x) (operand_chars[(unsigned char) x])
159 #define is_register_char(x) (register_chars[(unsigned char) x])
160 #define is_space_char(x) (space_chars[(unsigned char) x])
161 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
162 #define is_digit_char(x) (digit_chars[(unsigned char) x])
164 /* put here all non-digit non-letter charcters that may occur in an operand */
165 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
167 static char *ordinal_names
[] = {"first", "second", "third"}; /* for printfs */
169 /* md_assemble() always leaves the strings it's passed unaltered. To
170 effect this we maintain a stack of saved characters that we've smashed
171 with '\0's (indicating end of strings for various sub-fields of the
172 assembler instruction). */
173 static char save_stack
[32];
174 static char *save_stack_p
; /* stack pointer */
175 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
176 #define RESTORE_END_STRING(s) *s = *--save_stack_p
178 /* The instruction we're assembling. */
181 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
182 static expressionS disp_expressions
[2], im_expressions
[2];
184 /* pointers to ebp & esp entries in reg_hash hash table */
185 static reg_entry
*ebp
, *esp
;
187 static int this_operand
; /* current operand we are working on */
189 static int flag_do_long_jump
; /* FIXME what does this do? */
191 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
193 /* Interface to relax_segment.
194 There are 2 relax states for 386 jump insns: one for conditional &
195 one for unconditional jumps. This is because the these two types
196 of jumps add different sizes to frags when we're figuring out what
197 sort of jump to choose to reach a given label. */
200 #define COND_JUMP 1 /* conditional jump */
201 #define UNCOND_JUMP 2 /* unconditional jump */
206 #define UNKNOWN_SIZE 3
210 #define INLINE __inline__
216 #define ENCODE_RELAX_STATE(type,size) \
217 ((relax_substateT)((type<<2) | (size)))
218 #define SIZE_FROM_RELAX_STATE(s) \
219 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
221 const relax_typeS md_relax_table
[] =
224 1) most positive reach of this state,
225 2) most negative reach of this state,
226 3) how many bytes this mode will add to the size of the current frag
227 4) which index into the table to try if we can't fit into this one.
234 /* For now we don't use word displacement jumps; they may be
236 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
237 /* word conditionals add 3 bytes to frag:
238 2 opcode prefix; 1 displacement bytes */
239 {32767 + 2, -32768 + 2, 3, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
240 /* dword conditionals adds 4 bytes to frag:
241 1 opcode prefix; 3 displacement bytes */
245 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
246 /* word jmp adds 2 bytes to frag:
247 1 opcode prefix; 1 displacement bytes */
248 {32767 + 2, -32768 + 2, 2, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
249 /* dword jmp adds 3 bytes to frag:
250 0 opcode prefix; 3 displacement bytes */
258 i386_align_code (fragP
, count
)
262 /* Various efficient no-op patterns for aligning code labels. */
263 /* Note: Don't try to assemble the instructions in the comments. */
264 /* 0L and 0w are not legal */
265 static const char f32_1
[] =
267 static const char f32_2
[] =
268 {0x89,0xf6}; /* movl %esi,%esi */
269 static const char f32_3
[] =
270 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
271 static const char f32_4
[] =
272 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
273 static const char f32_5
[] =
275 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
276 static const char f32_6
[] =
277 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
278 static const char f32_7
[] =
279 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
280 static const char f32_8
[] =
282 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
283 static const char f32_9
[] =
284 {0x89,0xf6, /* movl %esi,%esi */
285 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
286 static const char f32_10
[] =
287 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
288 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
289 static const char f32_11
[] =
290 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
291 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
292 static const char f32_12
[] =
293 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
294 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
295 static const char f32_13
[] =
296 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
297 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
298 static const char f32_14
[] =
299 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
300 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
301 static const char f32_15
[] =
302 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
303 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
304 static const char f16_4
[] =
305 {0x8d,0xb6,0x00,0x00}; /* lea 0w(%si),%si */
306 static const char f16_5
[] =
308 0x8d,0xb6,0x00,0x00}; /* lea 0w(%si),%si */
309 static const char f16_6
[] =
310 {0x89,0xf6, /* mov %si,%si */
311 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
312 static const char f16_7
[] =
313 {0x8d,0x76,0x00, /* lea 0(%si),%si */
314 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
315 static const char f16_8
[] =
316 {0x8d,0xb6,0x00,0x00, /* lea 0w(%si),%si */
317 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
318 static const char *const f32_patt
[] = {
319 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
320 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
322 static const char *const f16_patt
[] = {
323 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
324 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
327 if (count
> 0 && count
<= 15)
331 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
332 f16_patt
[count
- 1], count
);
333 if (count
> 8) /* adjust jump offset */
334 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
337 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
338 f32_patt
[count
- 1], count
);
339 fragP
->fr_var
= count
;
343 static char *output_invalid
PARAMS ((int c
));
344 static int i386_operand
PARAMS ((char *operand_string
));
345 static reg_entry
*parse_register
PARAMS ((char *reg_string
));
347 static void s_bss
PARAMS ((int));
350 symbolS
*GOT_symbol
; /* Pre-defined "__GLOBAL_OFFSET_TABLE" */
352 static INLINE
unsigned long
353 mode_from_disp_size (t
)
356 return (t
& Disp8
) ? 1 : (t
& Disp32
) ? 2 : 0;
361 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifier */
363 static INLINE
unsigned long
364 opcode_suffix_to_type (s
)
367 return (s
== BYTE_OPCODE_SUFFIX
368 ? Byte
: (s
== WORD_OPCODE_SUFFIX
370 } /* opcode_suffix_to_type() */
374 fits_in_signed_byte (num
)
377 return (num
>= -128) && (num
<= 127);
378 } /* fits_in_signed_byte() */
381 fits_in_unsigned_byte (num
)
384 return (num
& 0xff) == num
;
385 } /* fits_in_unsigned_byte() */
388 fits_in_unsigned_word (num
)
391 return (num
& 0xffff) == num
;
392 } /* fits_in_unsigned_word() */
395 fits_in_signed_word (num
)
398 return (-32768 <= num
) && (num
<= 32767);
399 } /* fits_in_signed_word() */
402 smallest_imm_type (num
)
406 /* This code is disabled because all the Imm1 forms in the opcode table
407 are slower on the i486, and they're the versions with the implicitly
408 specified single-position displacement, which has another syntax if
409 you really want to use that form. If you really prefer to have the
410 one-byte-shorter Imm1 form despite these problems, re-enable this
413 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
415 return (fits_in_signed_byte (num
)
416 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
417 : fits_in_unsigned_byte (num
)
418 ? (Imm8
| Imm16
| Imm32
)
419 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
422 } /* smallest_imm_type() */
425 set_16bit_code_flag (new_16bit_code_flag
)
426 int new_16bit_code_flag
;
428 flag_16bit_code
= new_16bit_code_flag
;
431 const pseudo_typeS md_pseudo_table
[] =
437 {"align", s_align_bytes
, 0},
439 {"align", s_align_ptwo
, 0},
441 {"ffloat", float_cons
, 'f'},
442 {"dfloat", float_cons
, 'd'},
443 {"tfloat", float_cons
, 'x'},
445 {"noopt", s_ignore
, 0},
446 {"optim", s_ignore
, 0},
447 {"code16", set_16bit_code_flag
, 1},
448 {"code32", set_16bit_code_flag
, 0},
452 /* for interface with expression () */
453 extern char *input_line_pointer
;
455 /* obstack for constructing various things in md_begin */
458 /* hash table for opcode lookup */
459 static struct hash_control
*op_hash
;
460 /* hash table for register lookup */
461 static struct hash_control
*reg_hash
;
462 /* hash table for prefix lookup */
463 static struct hash_control
*prefix_hash
;
469 const char *hash_err
;
471 obstack_begin (&o
, 4096);
473 /* initialize op_hash hash table */
474 op_hash
= hash_new ();
477 register const template *optab
;
478 register templates
*core_optab
;
481 optab
= i386_optab
; /* setup for loop */
482 prev_name
= optab
->name
;
483 obstack_grow (&o
, optab
, sizeof (template));
484 core_optab
= (templates
*) xmalloc (sizeof (templates
));
486 for (optab
++; optab
< i386_optab_end
; optab
++)
488 if (!strcmp (optab
->name
, prev_name
))
490 /* same name as before --> append to current template list */
491 obstack_grow (&o
, optab
, sizeof (template));
495 /* different name --> ship out current template list;
496 add to hash table; & begin anew */
497 /* Note: end must be set before start! since obstack_next_free
498 changes upon opstack_finish */
499 core_optab
->end
= (template *) obstack_next_free (&o
);
500 core_optab
->start
= (template *) obstack_finish (&o
);
501 hash_err
= hash_insert (op_hash
, prev_name
, (char *) core_optab
);
505 as_fatal ("Internal Error: Can't hash %s: %s", prev_name
,
508 prev_name
= optab
->name
;
509 core_optab
= (templates
*) xmalloc (sizeof (templates
));
510 obstack_grow (&o
, optab
, sizeof (template));
515 /* initialize reg_hash hash table */
516 reg_hash
= hash_new ();
518 register const reg_entry
*regtab
;
520 for (regtab
= i386_regtab
; regtab
< i386_regtab_end
; regtab
++)
522 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
528 esp
= (reg_entry
*) hash_find (reg_hash
, "esp");
529 ebp
= (reg_entry
*) hash_find (reg_hash
, "ebp");
531 /* initialize reg_hash hash table */
532 prefix_hash
= hash_new ();
534 register const prefix_entry
*prefixtab
;
536 for (prefixtab
= i386_prefixtab
;
537 prefixtab
< i386_prefixtab_end
; prefixtab
++)
539 hash_err
= hash_insert (prefix_hash
, prefixtab
->prefix_name
,
546 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
551 for (c
= 0; c
< 256; c
++)
553 if (islower (c
) || isdigit (c
))
556 register_chars
[c
] = c
;
558 else if (isupper (c
))
560 opcode_chars
[c
] = tolower (c
);
561 register_chars
[c
] = opcode_chars
[c
];
563 else if (c
== PREFIX_SEPERATOR
)
567 else if (c
== ')' || c
== '(')
569 register_chars
[c
] = c
;
572 if (isupper (c
) || islower (c
) || isdigit (c
))
573 operand_chars
[c
] = c
;
575 if (isdigit (c
) || c
== '-')
578 if (isalpha (c
) || c
== '_' || c
== '.' || isdigit (c
))
579 identifier_chars
[c
] = c
;
582 identifier_chars
['@'] = '@';
585 if (c
== ' ' || c
== '\t')
589 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
590 operand_chars
[(unsigned char) *p
] = *p
;
593 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
594 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
596 record_alignment (text_section
, 2);
597 record_alignment (data_section
, 2);
598 record_alignment (bss_section
, 2);
604 i386_print_statistics (file
)
607 hash_print_statistics (file
, "i386 opcode", op_hash
);
608 hash_print_statistics (file
, "i386 register", reg_hash
);
609 hash_print_statistics (file
, "i386 prefix", prefix_hash
);
615 /* debugging routines for md_assemble */
616 static void pi
PARAMS ((char *, i386_insn
*));
617 static void pte
PARAMS ((template *));
618 static void pt
PARAMS ((unsigned int));
619 static void pe
PARAMS ((expressionS
*));
620 static void ps
PARAMS ((symbolS
*));
627 register template *p
;
630 fprintf (stdout
, "%s: template ", line
);
632 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
633 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
634 fprintf (stdout
, " base %x index %x scale %x\n",
635 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
636 for (i
= 0; i
< x
->operands
; i
++)
638 fprintf (stdout
, " #%d: ", i
+ 1);
640 fprintf (stdout
, "\n");
641 if (x
->types
[i
] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
))
642 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
643 if (x
->types
[i
] & Imm
)
645 if (x
->types
[i
] & (Disp
| Abs
))
655 fprintf (stdout
, " %d operands ", t
->operands
);
656 fprintf (stdout
, "opcode %x ",
658 if (t
->extension_opcode
!= None
)
659 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
660 if (t
->opcode_modifier
& D
)
661 fprintf (stdout
, "D");
662 if (t
->opcode_modifier
& W
)
663 fprintf (stdout
, "W");
664 fprintf (stdout
, "\n");
665 for (i
= 0; i
< t
->operands
; i
++)
667 fprintf (stdout
, " #%d type ", i
+ 1);
668 pt (t
->operand_types
[i
]);
669 fprintf (stdout
, "\n");
677 fprintf (stdout
, " operation %d\n", e
->X_op
);
678 fprintf (stdout
, " add_number %d (%x)\n",
679 e
->X_add_number
, e
->X_add_number
);
682 fprintf (stdout
, " add_symbol ");
683 ps (e
->X_add_symbol
);
684 fprintf (stdout
, "\n");
688 fprintf (stdout
, " op_symbol ");
690 fprintf (stdout
, "\n");
698 fprintf (stdout
, "%s type %s%s",
700 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
701 segment_name (S_GET_SEGMENT (s
)));
722 { BaseIndex
, "BaseIndex" },
732 { InOutPortReg
, "InOutPortReg" },
733 { ShiftCount
, "ShiftCount" },
735 { Control
, "control reg" },
736 { Test
, "test reg" },
737 { FloatReg
, "FReg" },
738 { FloatAcc
, "FAcc" },
739 { JumpAbsolute
, "Jump Absolute" },
748 register struct type_name
*ty
;
752 fprintf (stdout
, "Unknown");
756 for (ty
= type_names
; ty
->mask
; ty
++)
758 fprintf (stdout
, "%s, ", ty
->tname
);
763 #endif /* DEBUG386 */
766 static bfd_reloc_code_real_type
767 reloc (size
, pcrel
, other
)
770 bfd_reloc_code_real_type other
;
772 if (other
!= NO_RELOC
) return other
;
777 case 1: return BFD_RELOC_8_PCREL
;
778 case 2: return BFD_RELOC_16_PCREL
;
779 case 4: return BFD_RELOC_32_PCREL
;
784 case 1: return BFD_RELOC_8
;
785 case 2: return BFD_RELOC_16
;
786 case 4: return BFD_RELOC_32
;
789 as_bad ("Can not do %d byte %srelocation", size
,
790 pcrel
? "pc-relative " : "");
791 return BFD_RELOC_NONE
;
795 * Here we decide which fixups can be adjusted to make them relative to
796 * the beginning of the section instead of the symbol. Basically we need
797 * to make sure that the dynamic relocations are done correctly, so in
798 * some cases we force the original symbol to be used.
801 tc_i386_fix_adjustable(fixP
)
805 /* Prevent all adjustments to global symbols. */
806 if (S_IS_EXTERN (fixP
->fx_addsy
))
808 if (S_IS_WEAK (fixP
->fx_addsy
))
810 #endif /* ! defined (OBJ_AOUT) */
811 /* adjust_reloc_syms doesn't know about the GOT */
812 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
813 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
814 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
)
819 #define reloc(SIZE,PCREL,OTHER) 0
820 #define BFD_RELOC_32 0
821 #define BFD_RELOC_32_PCREL 0
822 #define BFD_RELOC_386_PLT32 0
823 #define BFD_RELOC_386_GOT32 0
824 #define BFD_RELOC_386_GOTOFF 0
827 /* This is the guts of the machine-dependent assembler. LINE points to a
828 machine dependent instruction. This function is supposed to emit
829 the frags/bytes it assembles to. */
835 /* Holds template once we've found it. */
838 /* Count the size of the instruction generated. */
841 /* Possible templates for current insn */
842 templates
*current_templates
= (templates
*) 0;
846 /* Initialize globals. */
847 memset (&i
, '\0', sizeof (i
));
848 for (j
= 0; j
< MAX_OPERANDS
; j
++)
849 i
.disp_reloc
[j
] = NO_RELOC
;
850 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
851 memset (im_expressions
, '\0', sizeof (im_expressions
));
852 save_stack_p
= save_stack
; /* reset stack pointer */
854 /* Fist parse an opcode & call i386_operand for the operands.
855 We assume that the scrubber has arranged it so that line[0] is the valid
856 start of a (possibly prefixed) opcode. */
860 /* 1 if operand is pending after ','. */
861 unsigned int expecting_operand
= 0;
862 /* 1 if we found a prefix only acceptable with string insns. */
863 unsigned int expecting_string_instruction
= 0;
864 /* Non-zero if operand parens not balanced. */
865 unsigned int paren_not_balanced
;
866 char *token_start
= l
;
868 while (!is_space_char (*l
) && *l
!= END_OF_INSN
)
870 if (!is_opcode_char (*l
))
872 as_bad ("invalid character %s in opcode", output_invalid (*l
));
875 else if (*l
!= PREFIX_SEPERATOR
)
877 *l
= opcode_chars
[(unsigned char) *l
]; /* fold case of opcodes */
882 /* This opcode's got a prefix. */
884 prefix_entry
*prefix
;
886 if (l
== token_start
)
888 as_bad ("expecting prefix; got nothing");
891 END_STRING_AND_SAVE (l
);
892 prefix
= (prefix_entry
*) hash_find (prefix_hash
, token_start
);
895 as_bad ("no such opcode prefix ('%s')", token_start
);
898 RESTORE_END_STRING (l
);
899 /* check for repeated prefix */
900 for (q
= 0; q
< i
.prefixes
; q
++)
901 if (i
.prefix
[q
] == prefix
->prefix_code
)
903 as_bad ("same prefix used twice; you don't really want this!");
906 if (i
.prefixes
== MAX_PREFIXES
)
908 as_bad ("too many opcode prefixes");
911 i
.prefix
[i
.prefixes
++] = prefix
->prefix_code
;
912 if (prefix
->prefix_code
== REPE
|| prefix
->prefix_code
== REPNE
)
913 expecting_string_instruction
= 1;
914 /* skip past PREFIX_SEPERATOR and reset token_start */
918 END_STRING_AND_SAVE (l
);
919 if (token_start
== l
)
921 as_bad ("expecting opcode; got nothing");
925 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
926 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
927 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
928 if (!current_templates
)
930 int last_index
= strlen (token_start
) - 1;
931 char last_char
= token_start
[last_index
];
934 case DWORD_OPCODE_SUFFIX
:
935 case WORD_OPCODE_SUFFIX
:
936 case BYTE_OPCODE_SUFFIX
:
937 token_start
[last_index
] = '\0';
938 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
939 token_start
[last_index
] = last_char
;
940 i
.suffix
= last_char
;
942 if (!current_templates
)
944 as_bad ("no such 386 instruction: `%s'", token_start
);
948 RESTORE_END_STRING (l
);
950 /* check for rep/repne without a string instruction */
951 if (expecting_string_instruction
&&
952 !IS_STRING_INSTRUCTION (current_templates
->
955 as_bad ("expecting string instruction after rep/repne");
959 /* There may be operands to parse. */
960 if (*l
!= END_OF_INSN
&&
961 /* For string instructions, we ignore any operands if given. This
962 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
963 the operands are always going to be the same, and are not really
964 encoded in machine code. */
965 !IS_STRING_INSTRUCTION (current_templates
->
971 /* skip optional white space before operand */
972 while (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
974 if (!is_space_char (*l
))
976 as_bad ("invalid character %s before %s operand",
978 ordinal_names
[i
.operands
]);
983 token_start
= l
; /* after white space */
984 paren_not_balanced
= 0;
985 while (paren_not_balanced
|| *l
!= ',')
987 if (*l
== END_OF_INSN
)
989 if (paren_not_balanced
)
991 as_bad ("unbalanced parenthesis in %s operand.",
992 ordinal_names
[i
.operands
]);
996 break; /* we are done */
998 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1000 as_bad ("invalid character %s in %s operand",
1001 output_invalid (*l
),
1002 ordinal_names
[i
.operands
]);
1006 ++paren_not_balanced
;
1008 --paren_not_balanced
;
1011 if (l
!= token_start
)
1012 { /* yes, we've read in another operand */
1013 unsigned int operand_ok
;
1014 this_operand
= i
.operands
++;
1015 if (i
.operands
> MAX_OPERANDS
)
1017 as_bad ("spurious operands; (%d operands/instruction max)",
1021 /* now parse operand adding info to 'i' as we go along */
1022 END_STRING_AND_SAVE (l
);
1023 operand_ok
= i386_operand (token_start
);
1024 RESTORE_END_STRING (l
); /* restore old contents */
1030 if (expecting_operand
)
1032 expecting_operand_after_comma
:
1033 as_bad ("expecting operand after ','; got nothing");
1038 as_bad ("expecting operand before ','; got nothing");
1043 /* now *l must be either ',' or END_OF_INSN */
1046 if (*++l
== END_OF_INSN
)
1047 { /* just skip it, if it's \n complain */
1048 goto expecting_operand_after_comma
;
1050 expecting_operand
= 1;
1053 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1057 /* Now we've parsed the opcode into a set of templates, and have the
1060 Next, we find a template that matches the given insn,
1061 making sure the overlap of the given operands types is consistent
1062 with the template operand types. */
1064 #define MATCH(overlap,given_type) \
1066 (((overlap & (JumpAbsolute|BaseIndex|Mem8)) \
1067 == (given_type & (JumpAbsolute|BaseIndex|Mem8))) \
1068 || (overlap == InOutPortReg)))
1071 /* If m0 and m1 are register matches they must be consistent
1072 with the expected operand types t0 and t1.
1073 That is, if both m0 & m1 are register matches
1074 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
1075 then, either 1. or 2. must be true:
1076 1. the expected operand type register overlap is null:
1077 (t0 & t1 & Reg) == 0
1079 the given register overlap is null:
1080 (m0 & m1 & Reg) == 0
1081 2. the expected operand type register overlap == the given
1082 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
1084 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
1085 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
1086 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
1087 ((t0 & t1) & (m0 & m1) & (Reg)) \
1090 register unsigned int overlap0
, overlap1
;
1092 unsigned int overlap2
;
1093 unsigned int found_reverse_match
;
1095 overlap0
= overlap1
= overlap2
= found_reverse_match
= 0;
1096 for (t
= current_templates
->start
;
1097 t
< current_templates
->end
;
1100 /* must have right number of operands */
1101 if (i
.operands
!= t
->operands
)
1103 else if (!t
->operands
)
1104 break; /* 0 operands always matches */
1106 overlap0
= i
.types
[0] & t
->operand_types
[0];
1107 switch (t
->operands
)
1110 if (!MATCH (overlap0
, i
.types
[0]))
1115 overlap1
= i
.types
[1] & t
->operand_types
[1];
1116 if (!MATCH (overlap0
, i
.types
[0]) ||
1117 !MATCH (overlap1
, i
.types
[1]) ||
1118 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
1119 t
->operand_types
[0],
1120 t
->operand_types
[1]))
1123 /* check if other direction is valid ... */
1124 if (!(t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
))
1127 /* try reversing direction of operands */
1128 overlap0
= i
.types
[0] & t
->operand_types
[1];
1129 overlap1
= i
.types
[1] & t
->operand_types
[0];
1130 if (!MATCH (overlap0
, i
.types
[0]) ||
1131 !MATCH (overlap1
, i
.types
[1]) ||
1132 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
1133 t
->operand_types
[0],
1134 t
->operand_types
[1]))
1136 /* does not match either direction */
1139 /* found a reverse match here -- slip through */
1140 /* found_reverse_match holds which of D or FloatD we've found */
1141 found_reverse_match
= t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
;
1142 } /* endif: not forward match */
1143 /* found either forward/reverse 2 operand match here */
1144 if (t
->operands
== 3)
1146 overlap2
= i
.types
[2] & t
->operand_types
[2];
1147 if (!MATCH (overlap2
, i
.types
[2]) ||
1148 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap2
,
1149 t
->operand_types
[0],
1150 t
->operand_types
[2]) ||
1151 !CONSISTENT_REGISTER_MATCH (overlap1
, overlap2
,
1152 t
->operand_types
[1],
1153 t
->operand_types
[2]))
1156 /* found either forward/reverse 2 or 3 operand match here:
1157 slip through to break */
1159 break; /* we've found a match; break out of loop */
1160 } /* for (t = ... */
1161 if (t
== current_templates
->end
)
1162 { /* we found no match */
1163 as_bad ("operands given don't match any known 386 instruction");
1167 /* Copy the template we found (we may change it!). */
1169 t
= &i
.tm
; /* alter new copy of template */
1171 /* If the matched instruction specifies an explicit opcode suffix,
1172 use it - and make sure none has already been specified. */
1173 if (t
->opcode_modifier
& (Data16
|Data32
))
1177 as_bad ("extraneous opcode suffix given");
1180 if (t
->opcode_modifier
& Data16
)
1181 i
.suffix
= WORD_OPCODE_SUFFIX
;
1183 i
.suffix
= DWORD_OPCODE_SUFFIX
;
1186 /* If there's no opcode suffix we try to invent one based on register
1188 if (!i
.suffix
&& i
.reg_operands
)
1190 /* We take i.suffix from the LAST register operand specified. This
1191 assumes that the last register operands is the destination register
1194 for (op
= 0; op
< MAX_OPERANDS
; op
++)
1195 if (i
.types
[op
] & Reg
)
1197 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_OPCODE_SUFFIX
:
1198 (i
.types
[op
] & Reg16
) ? WORD_OPCODE_SUFFIX
:
1199 DWORD_OPCODE_SUFFIX
);
1202 else if (i
.suffix
!= 0
1203 && i
.reg_operands
!= 0
1204 && (i
.types
[i
.operands
- 1] & Reg
) != 0)
1208 /* If the last operand is a register, make sure it is
1209 compatible with the suffix. */
1216 case BYTE_OPCODE_SUFFIX
:
1217 /* If this is an eight bit register, it's OK. If it's the
1218 16 or 32 bit version of an eight bit register, we will
1219 just use the low portion, and that's OK too. */
1220 if ((i
.types
[i
.operands
- 1] & Reg8
) == 0
1221 && i
.regs
[i
.operands
- 1]->reg_num
>= 4)
1224 case WORD_OPCODE_SUFFIX
:
1225 case DWORD_OPCODE_SUFFIX
:
1226 /* We don't insist on the presence or absence of the e
1227 prefix on the register, but we reject eight bit
1229 if ((i
.types
[i
.operands
- 1] & Reg8
) != 0)
1233 as_bad ("register does not match opcode suffix");
1236 /* Make still unresolved immediate matches conform to size of immediate
1237 given in i.suffix. Note: overlap2 cannot be an immediate!
1239 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1240 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1241 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1245 as_bad ("no opcode suffix given; can't determine immediate size");
1248 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1249 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1251 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1252 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1253 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1257 as_bad ("no opcode suffix given; can't determine immediate size");
1260 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1261 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1264 i
.types
[0] = overlap0
;
1265 i
.types
[1] = overlap1
;
1266 i
.types
[2] = overlap2
;
1268 if (overlap0
& ImplicitRegister
)
1270 if (overlap1
& ImplicitRegister
)
1272 if (overlap2
& ImplicitRegister
)
1274 if (overlap0
& Imm1
)
1275 i
.imm_operands
= 0; /* kludge for shift insns */
1277 if (found_reverse_match
)
1280 save
= t
->operand_types
[0];
1281 t
->operand_types
[0] = t
->operand_types
[1];
1282 t
->operand_types
[1] = save
;
1285 /* Finalize opcode. First, we change the opcode based on the operand
1286 size given by i.suffix: we never have to change things for byte insns,
1287 or when no opcode suffix is need to size the operands. */
1289 if (!i
.suffix
&& (t
->opcode_modifier
& W
))
1291 as_bad ("no opcode suffix given and no register operands; can't size instruction");
1295 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1297 /* Select between byte and word/dword operations. */
1298 if (t
->opcode_modifier
& W
)
1299 t
->base_opcode
|= W
;
1300 /* Now select between word & dword operations via the
1301 operand size prefix. */
1302 if ((i
.suffix
== WORD_OPCODE_SUFFIX
) ^ flag_16bit_code
)
1304 if (i
.prefixes
== MAX_PREFIXES
)
1306 as_bad ("%d prefixes given and 'w' opcode suffix gives too many prefixes",
1310 i
.prefix
[i
.prefixes
++] = WORD_PREFIX_OPCODE
;
1314 /* For insns with operands there are more diddles to do to the opcode. */
1317 /* Default segment register this instruction will use
1318 for memory accesses. 0 means unknown.
1319 This is only for optimizing out unnecessary segment overrides. */
1320 const seg_entry
*default_seg
= 0;
1322 /* True if this instruction uses a memory addressing mode,
1323 and therefore may need an address-size prefix. */
1324 int uses_mem_addrmode
= 0;
1327 /* If we found a reverse match we must alter the opcode direction bit
1328 found_reverse_match holds bit to set (different for int &
1331 if (found_reverse_match
)
1333 t
->base_opcode
|= found_reverse_match
;
1336 /* The imul $imm, %reg instruction is converted into
1337 imul $imm, %reg, %reg. */
1338 if (t
->opcode_modifier
& imulKludge
)
1340 /* Pretend we saw the 3 operand case. */
1341 i
.regs
[2] = i
.regs
[1];
1345 /* The clr %reg instruction is converted into xor %reg, %reg. */
1346 if (t
->opcode_modifier
& iclrKludge
)
1348 i
.regs
[1] = i
.regs
[0];
1352 /* Certain instructions expect the destination to be in the i.rm.reg
1353 field. This is by far the exceptional case. For these
1354 instructions, if the source operand is a register, we must reverse
1355 the i.rm.reg and i.rm.regmem fields. We accomplish this by faking
1356 that the two register operands were given in the reverse order. */
1357 if ((t
->opcode_modifier
& ReverseRegRegmem
) && i
.reg_operands
== 2)
1359 unsigned int first_reg_operand
= (i
.types
[0] & Reg
) ? 0 : 1;
1360 unsigned int second_reg_operand
= first_reg_operand
+ 1;
1361 reg_entry
*tmp
= i
.regs
[first_reg_operand
];
1362 i
.regs
[first_reg_operand
] = i
.regs
[second_reg_operand
];
1363 i
.regs
[second_reg_operand
] = tmp
;
1366 if (t
->opcode_modifier
& ShortForm
)
1368 /* The register or float register operand is in operand 0 or 1. */
1369 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1370 /* Register goes in low 3 bits of opcode. */
1371 t
->base_opcode
|= i
.regs
[op
]->reg_num
;
1373 else if (t
->opcode_modifier
& ShortFormW
)
1375 /* Short form with 0x8 width bit. Register is always dest. operand */
1376 t
->base_opcode
|= i
.regs
[1]->reg_num
;
1377 if (i
.suffix
== WORD_OPCODE_SUFFIX
||
1378 i
.suffix
== DWORD_OPCODE_SUFFIX
)
1379 t
->base_opcode
|= 0x8;
1381 else if (t
->opcode_modifier
& Seg2ShortForm
)
1383 if (t
->base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1385 as_bad ("you can't 'pop cs' on the 386.");
1388 t
->base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1390 else if (t
->opcode_modifier
& Seg3ShortForm
)
1392 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
1393 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
1394 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
1395 to change the opcode. */
1396 if (i
.regs
[0]->reg_num
== 5)
1397 t
->base_opcode
|= 0x08;
1399 else if ((t
->base_opcode
& ~DW
) == MOV_AX_DISP32
)
1401 /* This is a special non-modrm instruction
1402 that addresses memory with a 32-bit displacement mode anyway,
1403 and thus requires an address-size prefix if in 16-bit mode. */
1404 uses_mem_addrmode
= 1;
1407 else if (t
->opcode_modifier
& Modrm
)
1409 /* The opcode is completed (modulo t->extension_opcode which must
1410 be put into the modrm byte.
1411 Now, we make the modrm & index base bytes based on all the info
1414 /* i.reg_operands MUST be the number of real register operands;
1415 implicit registers do not count. */
1416 if (i
.reg_operands
== 2)
1418 unsigned int source
, dest
;
1419 source
= ((i
.types
[0]
1430 /* We must be careful to make sure that all
1431 segment/control/test/debug/MMX registers go into
1432 the i.rm.reg field (despite the whether they are
1433 source or destination operands). */
1434 if (i
.regs
[dest
]->reg_type
1435 & (SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
1437 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1438 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1442 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1443 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1447 { /* if it's not 2 reg operands... */
1450 unsigned int fake_zero_displacement
= 0;
1451 unsigned int op
= (i
.types
[0] & Mem
) ? 0 : ((i
.types
[1] & Mem
) ? 1 : 2);
1453 /* Encode memory operand into modrm byte and base index
1456 if (i
.base_reg
== esp
&& !i
.index_reg
)
1458 /* <disp>(%esp) becomes two byte modrm with no index
1460 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1461 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1462 i
.bi
.base
= ESP_REG_NUM
;
1463 i
.bi
.index
= NO_INDEX_REGISTER
;
1464 i
.bi
.scale
= 0; /* Must be zero! */
1466 else if (i
.base_reg
== ebp
&& !i
.index_reg
)
1468 if (!(i
.types
[op
] & Disp
))
1470 /* Must fake a zero byte displacement. There is
1471 no direct way to code '(%ebp)' directly. */
1472 fake_zero_displacement
= 1;
1473 /* fake_zero_displacement code does not set this. */
1474 i
.types
[op
] |= Disp8
;
1476 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1477 i
.rm
.regmem
= EBP_REG_NUM
;
1479 else if (!i
.base_reg
&& (i
.types
[op
] & BaseIndex
))
1481 /* There are three cases here.
1482 Case 1: '<32bit disp>(,1)' -- indirect absolute.
1483 (Same as cases 2 & 3 with NO index register)
1484 Case 2: <32bit disp> (,<index>) -- no base register with disp
1485 Case 3: (, <index>) --- no base register;
1486 no disp (must add 32bit 0 disp). */
1487 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1488 i
.rm
.mode
= 0; /* 32bit mode */
1489 i
.bi
.base
= NO_BASE_REGISTER
;
1490 i
.types
[op
] &= ~Disp
;
1491 i
.types
[op
] |= Disp32
; /* Must be 32bit! */
1493 { /* case 2 or case 3 */
1494 i
.bi
.index
= i
.index_reg
->reg_num
;
1495 i
.bi
.scale
= i
.log2_scale_factor
;
1496 if (i
.disp_operands
== 0)
1497 fake_zero_displacement
= 1; /* case 3 */
1501 i
.bi
.index
= NO_INDEX_REGISTER
;
1505 else if (i
.disp_operands
&& !i
.base_reg
&& !i
.index_reg
)
1507 /* Operand is just <32bit disp> */
1508 i
.rm
.regmem
= EBP_REG_NUM
;
1510 i
.types
[op
] &= ~Disp
;
1511 i
.types
[op
] |= Disp32
;
1515 /* It's not a special case; rev'em up. */
1516 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1517 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1520 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1521 i
.bi
.base
= i
.base_reg
->reg_num
;
1522 i
.bi
.index
= i
.index_reg
->reg_num
;
1523 i
.bi
.scale
= i
.log2_scale_factor
;
1524 if (i
.base_reg
== ebp
&& i
.disp_operands
== 0)
1526 fake_zero_displacement
= 1;
1527 i
.types
[op
] |= Disp8
;
1528 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1532 if (fake_zero_displacement
)
1534 /* Fakes a zero displacement assuming that i.types[op]
1535 holds the correct displacement size. */
1536 exp
= &disp_expressions
[i
.disp_operands
++];
1538 exp
->X_op
= O_constant
;
1539 exp
->X_add_number
= 0;
1540 exp
->X_add_symbol
= (symbolS
*) 0;
1541 exp
->X_op_symbol
= (symbolS
*) 0;
1544 /* Find the default segment for the memory operand.
1545 Used to optimize out explicit segment specifications. */
1548 unsigned int seg_index
;
1550 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
)
1552 seg_index
= (i
.rm
.mode
<< 3) | i
.bi
.base
;
1553 default_seg
= two_byte_segment_defaults
[seg_index
];
1557 seg_index
= (i
.rm
.mode
<< 3) | i
.rm
.regmem
;
1558 default_seg
= one_byte_segment_defaults
[seg_index
];
1563 /* Fill in i.rm.reg or i.rm.regmem field with register
1564 operand (if any) based on
1565 t->extension_opcode. Again, we must be careful to
1566 make sure that segment/control/debug/test/MMX
1567 registers are coded into the i.rm.reg field. */
1572 & (Reg
| SReg2
| SReg3
| Control
| Debug
1576 & (Reg
| SReg2
| SReg3
| Control
| Debug
1580 /* If there is an extension opcode to put here, the
1581 register number must be put into the regmem field. */
1582 if (t
->extension_opcode
!= None
)
1583 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
1585 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
1587 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1588 we must set it to 3 to indicate this is a register
1589 operand int the regmem field */
1590 if (!i
.mem_operands
)
1594 /* Fill in i.rm.reg field with extension opcode (if any). */
1595 if (t
->extension_opcode
!= None
)
1596 i
.rm
.reg
= t
->extension_opcode
;
1600 uses_mem_addrmode
= 1;
1603 /* GAS currently doesn't support 16-bit memory addressing modes at all,
1604 so if we're writing 16-bit code and using a memory addressing mode,
1605 always spew out an address size prefix. */
1606 if (uses_mem_addrmode
&& flag_16bit_code
)
1608 if (i
.prefixes
== MAX_PREFIXES
)
1610 as_bad ("%d prefixes given and address size override gives too many prefixes",
1614 i
.prefix
[i
.prefixes
++] = ADDR_PREFIX_OPCODE
;
1617 /* If a segment was explicitly specified,
1618 and the specified segment is not the default,
1619 use an opcode prefix to select it.
1620 If we never figured out what the default segment is,
1621 then default_seg will be zero at this point,
1622 and the specified segment prefix will always be used. */
1623 if ((i
.seg
) && (i
.seg
!= default_seg
))
1625 if (i
.prefixes
== MAX_PREFIXES
)
1627 as_bad ("%d prefixes given and %s segment override gives too many prefixes",
1628 MAX_PREFIXES
, i
.seg
->seg_name
);
1631 i
.prefix
[i
.prefixes
++] = i
.seg
->seg_prefix
;
1636 /* Handle conversion of 'int $3' --> special int3 insn. */
1637 if (t
->base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1639 t
->base_opcode
= INT3_OPCODE
;
1643 /* We are ready to output the insn. */
1648 if (t
->opcode_modifier
& Jump
)
1650 unsigned long n
= i
.disps
[0]->X_add_number
;
1652 if (i
.disps
[0]->X_op
== O_constant
)
1654 if (fits_in_signed_byte (n
))
1658 p
[0] = t
->base_opcode
;
1662 { /* It's an absolute word/dword displacement. */
1664 /* Use only 16-bit jumps for 16-bit code,
1665 because text segments are limited to 64K anyway;
1666 use only 32-bit jumps for 32-bit code,
1667 because they're faster. */
1668 int jmp_size
= flag_16bit_code
? 2 : 4;
1669 if (flag_16bit_code
&& !fits_in_signed_word (n
))
1671 as_bad ("16-bit jump out of range");
1675 if (t
->base_opcode
== JUMP_PC_RELATIVE
)
1677 /* unconditional jump */
1678 p
= frag_more (1 + jmp_size
);
1679 insn_size
+= 1 + jmp_size
;
1681 md_number_to_chars (&p
[1], (valueT
) n
, jmp_size
);
1685 /* conditional jump */
1686 p
= frag_more (2 + jmp_size
);
1687 insn_size
+= 2 + jmp_size
;
1688 p
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1689 p
[1] = t
->base_opcode
+ 0x10;
1690 md_number_to_chars (&p
[2], (valueT
) n
, jmp_size
);
1696 if (flag_16bit_code
)
1698 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1702 /* It's a symbol; end frag & setup for relax.
1703 Make sure there are more than 6 chars left in the current frag;
1704 if not we'll have to start a new one. */
1708 p
[0] = t
->base_opcode
;
1709 frag_var (rs_machine_dependent
,
1710 6, /* 2 opcode/prefix + 4 displacement */
1712 ((unsigned char) *p
== JUMP_PC_RELATIVE
1713 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
)
1714 : ENCODE_RELAX_STATE (COND_JUMP
, BYTE
)),
1715 i
.disps
[0]->X_add_symbol
,
1719 else if (t
->opcode_modifier
& (JumpByte
| JumpDword
))
1721 int size
= (t
->opcode_modifier
& JumpByte
) ? 1 : 4;
1722 unsigned long n
= i
.disps
[0]->X_add_number
;
1725 /* The jcx/jecx instruction might need a data size prefix. */
1726 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1728 if (*q
== WORD_PREFIX_OPCODE
)
1730 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1736 if ((size
== 4) && (flag_16bit_code
))
1738 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1742 if (fits_in_unsigned_byte (t
->base_opcode
))
1744 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1749 p
= frag_more (2); /* opcode can be at most two bytes */
1751 /* put out high byte first: can't use md_number_to_chars! */
1752 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1753 *p
= t
->base_opcode
& 0xff;
1756 p
= frag_more (size
);
1758 if (i
.disps
[0]->X_op
== O_constant
)
1760 md_number_to_chars (p
, (valueT
) n
, size
);
1761 if (size
== 1 && !fits_in_signed_byte (n
))
1763 as_bad ("loop/jecx only takes byte displacement; %lu shortened to %d",
1769 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1770 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
1774 else if (t
->opcode_modifier
& JumpInterSegment
)
1776 if (flag_16bit_code
)
1778 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1782 p
= frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1783 insn_size
+= 1 + 2 + 4;
1784 p
[0] = t
->base_opcode
;
1785 if (i
.imms
[1]->X_op
== O_constant
)
1786 md_number_to_chars (p
+ 1, (valueT
) i
.imms
[1]->X_add_number
, 4);
1788 fix_new_exp (frag_now
, p
+ 1 - frag_now
->fr_literal
, 4,
1789 i
.imms
[1], 0, BFD_RELOC_32
);
1790 if (i
.imms
[0]->X_op
!= O_constant
)
1791 as_bad ("can't handle non absolute segment in long call/jmp");
1792 md_number_to_chars (p
+ 5, (valueT
) i
.imms
[0]->X_add_number
, 2);
1796 /* Output normal instructions here. */
1799 /* First the prefix bytes. */
1800 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1804 md_number_to_chars (p
, (valueT
) *q
, 1);
1807 /* Now the opcode; be careful about word order here! */
1808 if (fits_in_unsigned_byte (t
->base_opcode
))
1810 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1813 else if (fits_in_unsigned_word (t
->base_opcode
))
1817 /* put out high byte first: can't use md_number_to_chars! */
1818 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1819 *p
= t
->base_opcode
& 0xff;
1822 { /* opcode is either 3 or 4 bytes */
1823 if (t
->base_opcode
& 0xff000000)
1827 *p
++ = (t
->base_opcode
>> 24) & 0xff;
1834 *p
++ = (t
->base_opcode
>> 16) & 0xff;
1835 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1836 *p
= (t
->base_opcode
) & 0xff;
1839 /* Now the modrm byte and base index byte (if present). */
1840 if (t
->opcode_modifier
& Modrm
)
1844 /* md_number_to_chars (p, i.rm, 1); */
1845 md_number_to_chars (p
,
1846 (valueT
) (i
.rm
.regmem
<< 0
1850 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1851 ==> need second modrm byte. */
1852 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
&& i
.rm
.mode
!= 3)
1856 /* md_number_to_chars (p, i.bi, 1); */
1857 md_number_to_chars (p
, (valueT
) (i
.bi
.base
<< 0
1864 if (i
.disp_operands
)
1866 register unsigned int n
;
1868 for (n
= 0; n
< i
.operands
; n
++)
1872 if (i
.disps
[n
]->X_op
== O_constant
)
1874 if (i
.types
[n
] & (Disp8
| Abs8
))
1878 md_number_to_chars (p
,
1879 (valueT
) i
.disps
[n
]->X_add_number
,
1882 else if (i
.types
[n
] & (Disp16
| Abs16
))
1886 md_number_to_chars (p
,
1887 (valueT
) i
.disps
[n
]->X_add_number
,
1891 { /* Disp32|Abs32 */
1894 md_number_to_chars (p
,
1895 (valueT
) i
.disps
[n
]->X_add_number
,
1900 { /* not absolute_section */
1901 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1904 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
1906 TC_RELOC(i
.disp_reloc
[n
], BFD_RELOC_32
));
1910 } /* end displacement output */
1912 /* output immediate */
1915 register unsigned int n
;
1917 for (n
= 0; n
< i
.operands
; n
++)
1921 if (i
.imms
[n
]->X_op
== O_constant
)
1923 if (i
.types
[n
] & (Imm8
| Imm8S
))
1927 md_number_to_chars (p
,
1928 (valueT
) i
.imms
[n
]->X_add_number
,
1931 else if (i
.types
[n
] & Imm16
)
1935 md_number_to_chars (p
,
1936 (valueT
) i
.imms
[n
]->X_add_number
,
1943 md_number_to_chars (p
,
1944 (valueT
) i
.imms
[n
]->X_add_number
,
1949 { /* not absolute_section */
1950 /* Need a 32-bit fixup (don't support 8bit
1951 non-absolute ims). Try to support other
1957 if (i
.types
[n
] & (Imm8
| Imm8S
))
1959 else if (i
.types
[n
] & Imm16
)
1963 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
1964 p
= frag_more (size
);
1966 #ifdef BFD_ASSEMBLER
1967 if (r_type
== BFD_RELOC_32
1969 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
1970 && (i
.imms
[n
]->X_op
== O_symbol
1971 || (i
.imms
[n
]->X_op
== O_add
1972 && (i
.imms
[n
]->X_op_symbol
->sy_value
.X_op
1975 r_type
= BFD_RELOC_386_GOTPC
;
1976 i
.imms
[n
]->X_add_number
+= 3;
1979 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1980 i
.imms
[n
], pcrel
, r_type
);
1984 } /* end immediate output */
1992 #endif /* DEBUG386 */
1996 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
2000 i386_operand (operand_string
)
2001 char *operand_string
;
2003 register char *op_string
= operand_string
;
2005 /* Address of '\0' at end of operand_string. */
2006 char *end_of_operand_string
= operand_string
+ strlen (operand_string
);
2008 /* Start and end of displacement string expression (if found). */
2009 char *displacement_string_start
= NULL
;
2010 char *displacement_string_end
= NULL
;
2012 /* We check for an absolute prefix (differentiating,
2013 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
2014 if (*op_string
== ABSOLUTE_PREFIX
)
2017 i
.types
[this_operand
] |= JumpAbsolute
;
2020 /* Check if operand is a register. */
2021 if (*op_string
== REGISTER_PREFIX
)
2023 register reg_entry
*r
;
2024 if (!(r
= parse_register (op_string
)))
2026 as_bad ("bad register name ('%s')", op_string
);
2029 /* Check for segment override, rather than segment register by
2030 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
2031 if ((r
->reg_type
& (SReg2
| SReg3
)) && op_string
[3] == ':')
2036 i
.seg
= (seg_entry
*) & es
;
2039 i
.seg
= (seg_entry
*) & cs
;
2042 i
.seg
= (seg_entry
*) & ss
;
2045 i
.seg
= (seg_entry
*) & ds
;
2048 i
.seg
= (seg_entry
*) & fs
;
2051 i
.seg
= (seg_entry
*) & gs
;
2054 op_string
+= 4; /* skip % <x> s : */
2055 operand_string
= op_string
; /* Pretend given string starts here. */
2056 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
2057 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
2059 as_bad ("bad memory operand after segment override");
2062 /* Handle case of %es:*foo. */
2063 if (*op_string
== ABSOLUTE_PREFIX
)
2066 i
.types
[this_operand
] |= JumpAbsolute
;
2068 goto do_memory_reference
;
2070 i
.types
[this_operand
] |= r
->reg_type
;
2071 i
.regs
[this_operand
] = r
;
2074 else if (*op_string
== IMMEDIATE_PREFIX
)
2075 { /* ... or an immediate */
2076 char *save_input_line_pointer
;
2080 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2082 as_bad ("only 1 or 2 immediate operands are allowed");
2086 exp
= &im_expressions
[i
.imm_operands
++];
2087 i
.imms
[this_operand
] = exp
;
2088 save_input_line_pointer
= input_line_pointer
;
2089 input_line_pointer
= ++op_string
; /* must advance op_string! */
2091 exp_seg
= expression (exp
);
2092 input_line_pointer
= save_input_line_pointer
;
2094 if (exp
->X_op
== O_absent
)
2096 /* missing or bad expr becomes absolute 0 */
2097 as_bad ("missing or invalid immediate expression '%s' taken as 0",
2099 exp
->X_op
= O_constant
;
2100 exp
->X_add_number
= 0;
2101 exp
->X_add_symbol
= (symbolS
*) 0;
2102 exp
->X_op_symbol
= (symbolS
*) 0;
2103 i
.types
[this_operand
] |= Imm
;
2105 else if (exp
->X_op
== O_constant
)
2107 i
.types
[this_operand
] |=
2108 smallest_imm_type ((unsigned long) exp
->X_add_number
);
2111 else if (exp_seg
!= text_section
2112 && exp_seg
!= data_section
2113 && exp_seg
!= bss_section
2114 && exp_seg
!= undefined_section
2115 #ifdef BFD_ASSEMBLER
2116 && ! bfd_is_com_section (exp_seg
)
2121 as_bad ("Unimplemented segment type %d in parse_operand", exp_seg
);
2127 /* this is an address ==> 32bit */
2128 i
.types
[this_operand
] |= Imm32
;
2130 /* shorten this type of this operand if the instruction wants
2131 * fewer bits than are present in the immediate. The bit field
2132 * code can put out 'andb $0xffffff, %al', for example. pace
2133 * also 'movw $foo,(%eax)'
2137 case WORD_OPCODE_SUFFIX
:
2138 i
.types
[this_operand
] |= Imm16
;
2140 case BYTE_OPCODE_SUFFIX
:
2141 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2145 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
2146 || *op_string
== '(')
2148 /* This is a memory reference of some sort. */
2149 register char *base_string
;
2150 unsigned int found_base_index_form
;
2152 do_memory_reference
:
2153 if (i
.mem_operands
== MAX_MEMORY_OPERANDS
)
2155 as_bad ("more than 1 memory reference in instruction");
2160 /* Determine type of memory operand from opcode_suffix;
2161 no opcode suffix implies general memory references. */
2164 case BYTE_OPCODE_SUFFIX
:
2165 i
.types
[this_operand
] |= Mem8
;
2167 case WORD_OPCODE_SUFFIX
:
2168 i
.types
[this_operand
] |= Mem16
;
2170 case DWORD_OPCODE_SUFFIX
:
2172 i
.types
[this_operand
] |= Mem32
;
2175 /* Check for base index form. We detect the base index form by
2176 looking for an ')' at the end of the operand, searching
2177 for the '(' matching it, and finding a REGISTER_PREFIX or ','
2179 base_string
= end_of_operand_string
- 1;
2180 found_base_index_form
= 0;
2181 if (*base_string
== ')')
2183 unsigned int parens_balanced
= 1;
2184 /* We've already checked that the number of left & right ()'s are
2185 equal, so this loop will not be infinite. */
2189 if (*base_string
== ')')
2191 if (*base_string
== '(')
2194 while (parens_balanced
);
2195 base_string
++; /* Skip past '('. */
2196 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
2197 found_base_index_form
= 1;
2200 /* If we can't parse a base index register expression, we've found
2201 a pure displacement expression. We set up displacement_string_start
2202 and displacement_string_end for the code below. */
2203 if (!found_base_index_form
)
2205 displacement_string_start
= op_string
;
2206 displacement_string_end
= end_of_operand_string
;
2210 char *base_reg_name
, *index_reg_name
, *num_string
;
2213 i
.types
[this_operand
] |= BaseIndex
;
2215 /* If there is a displacement set-up for it to be parsed later. */
2216 if (base_string
!= op_string
+ 1)
2218 displacement_string_start
= op_string
;
2219 displacement_string_end
= base_string
- 1;
2222 /* Find base register (if any). */
2223 if (*base_string
!= ',')
2225 base_reg_name
= base_string
++;
2226 /* skip past register name & parse it */
2227 while (isalpha (*base_string
))
2229 if (base_string
== base_reg_name
+ 1)
2231 as_bad ("can't find base register name after '(%c'",
2235 END_STRING_AND_SAVE (base_string
);
2236 if (!(i
.base_reg
= parse_register (base_reg_name
)))
2238 as_bad ("bad base register name ('%s')", base_reg_name
);
2241 RESTORE_END_STRING (base_string
);
2244 /* Now check seperator; must be ',' ==> index reg
2245 OR num ==> no index reg. just scale factor
2246 OR ')' ==> end. (scale factor = 1) */
2247 if (*base_string
!= ',' && *base_string
!= ')')
2249 as_bad ("expecting ',' or ')' after base register in `%s'",
2254 /* There may index reg here; and there may be a scale factor. */
2255 if (*base_string
== ',' && *(base_string
+ 1) == REGISTER_PREFIX
)
2257 index_reg_name
= ++base_string
;
2258 while (isalpha (*++base_string
));
2259 END_STRING_AND_SAVE (base_string
);
2260 if (!(i
.index_reg
= parse_register (index_reg_name
)))
2262 as_bad ("bad index register name ('%s')", index_reg_name
);
2265 RESTORE_END_STRING (base_string
);
2268 /* Check for scale factor. */
2269 if (*base_string
== ',' && isdigit (*(base_string
+ 1)))
2271 num_string
= ++base_string
;
2272 while (is_digit_char (*base_string
))
2274 if (base_string
== num_string
)
2276 as_bad ("can't find a scale factor after ','");
2279 END_STRING_AND_SAVE (base_string
);
2280 /* We've got a scale factor. */
2281 if (!sscanf (num_string
, "%d", &num
))
2283 as_bad ("can't parse scale factor from '%s'", num_string
);
2286 RESTORE_END_STRING (base_string
);
2288 { /* must be 1 digit scale */
2290 i
.log2_scale_factor
= 0;
2293 i
.log2_scale_factor
= 1;
2296 i
.log2_scale_factor
= 2;
2299 i
.log2_scale_factor
= 3;
2302 as_bad ("expecting scale factor of 1, 2, 4, 8; got %d", num
);
2308 if (!i
.index_reg
&& *base_string
== ',')
2310 as_bad ("expecting index register or scale factor after ','; got '%c'",
2311 *(base_string
+ 1));
2317 /* If there's an expression begining the operand, parse it,
2318 assuming displacement_string_start and displacement_string_end
2320 if (displacement_string_start
)
2322 register expressionS
*exp
;
2324 char *save_input_line_pointer
;
2325 exp
= &disp_expressions
[i
.disp_operands
];
2326 i
.disps
[this_operand
] = exp
;
2327 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2329 save_input_line_pointer
= input_line_pointer
;
2330 input_line_pointer
= displacement_string_start
;
2331 END_STRING_AND_SAVE (displacement_string_end
);
2335 * We can have operands of the form
2336 * <symbol>@GOTOFF+<nnn>
2337 * Take the easy way out here and copy everything
2338 * into a temporary buffer...
2341 if ((cp
= strchr (input_line_pointer
,'@')) != NULL
) {
2342 char tmpbuf
[BUFSIZ
];
2345 GOT_symbol
= symbol_find_or_make(GLOBAL_OFFSET_TABLE_NAME
);
2347 if (strncmp(cp
+1, "PLT", 3) == 0) {
2348 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2350 strcpy(tmpbuf
, input_line_pointer
);
2351 strcat(tmpbuf
, cp
+1+3);
2353 } else if (strncmp(cp
+1, "GOTOFF", 6) == 0) {
2354 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2356 strcpy(tmpbuf
, input_line_pointer
);
2357 strcat(tmpbuf
, cp
+1+6);
2359 } else if (strncmp(cp
+1, "GOT", 3) == 0) {
2360 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2362 strcpy(tmpbuf
, input_line_pointer
);
2363 strcat(tmpbuf
, cp
+1+3);
2366 as_bad("Bad reloc specifier '%s' in expression", cp
+1);
2367 input_line_pointer
= tmpbuf
;
2371 exp_seg
= expression (exp
);
2373 #ifdef BFD_ASSEMBLER
2374 /* We do this to make sure that the section symbol is in
2375 the symbol table. We will ultimately change the relocation
2376 to be relative to the beginning of the section */
2377 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2379 if (S_IS_LOCAL(exp
->X_add_symbol
)
2380 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2381 section_symbol(exp
->X_add_symbol
->bsym
->section
);
2382 assert (exp
->X_op
== O_symbol
);
2383 exp
->X_op
= O_subtract
;
2384 exp
->X_op_symbol
= GOT_symbol
;
2385 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2389 if (*input_line_pointer
)
2390 as_bad ("Ignoring junk '%s' after expression", input_line_pointer
);
2391 RESTORE_END_STRING (displacement_string_end
);
2392 input_line_pointer
= save_input_line_pointer
;
2393 if (exp
->X_op
== O_absent
)
2395 /* missing expr becomes absolute 0 */
2396 as_bad ("missing or invalid displacement '%s' taken as 0",
2398 i
.types
[this_operand
] |= (Disp
| Abs
);
2399 exp
->X_op
= O_constant
;
2400 exp
->X_add_number
= 0;
2401 exp
->X_add_symbol
= (symbolS
*) 0;
2402 exp
->X_op_symbol
= (symbolS
*) 0;
2404 else if (exp
->X_op
== O_constant
)
2406 i
.types
[this_operand
] |= SMALLEST_DISP_TYPE (exp
->X_add_number
);
2408 else if (exp_seg
== text_section
2409 || exp_seg
== data_section
2410 || exp_seg
== bss_section
2411 || exp_seg
== undefined_section
)
2413 i
.types
[this_operand
] |= Disp32
;
2418 i
.types
[this_operand
] |= Disp32
;
2420 goto seg_unimplemented
;
2425 /* Make sure the memory operand we've been dealt is valid. */
2426 if (i
.base_reg
&& i
.index_reg
&&
2427 !(i
.base_reg
->reg_type
& i
.index_reg
->reg_type
& Reg
))
2429 as_bad ("register size mismatch in (base,index,scale) expression");
2433 * special case for (%dx) while doing input/output op
2436 (i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)) &&
2437 (i
.index_reg
== 0)))
2439 i
.types
[this_operand
] |= InOutPortReg
;
2442 if ((i
.base_reg
&& (i
.base_reg
->reg_type
& Reg32
) == 0) ||
2443 (i
.index_reg
&& (i
.index_reg
->reg_type
& Reg32
) == 0))
2445 as_bad ("base/index register must be 32 bit register");
2448 if (i
.index_reg
&& i
.index_reg
== esp
)
2450 as_bad ("%s may not be used as an index register", esp
->reg_name
);
2455 { /* it's not a memory operand; argh! */
2456 as_bad ("invalid char %s begining %s operand '%s'",
2457 output_invalid (*op_string
), ordinal_names
[this_operand
],
2461 return 1; /* normal return */
2465 * md_estimate_size_before_relax()
2467 * Called just before relax().
2468 * Any symbol that is now undefined will not become defined.
2469 * Return the correct fr_subtype in the frag.
2470 * Return the initial "guess for fr_var" to caller.
2471 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2472 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2473 * Although it may not be explicit in the frag, pretend fr_var starts with a
2477 md_estimate_size_before_relax (fragP
, segment
)
2478 register fragS
*fragP
;
2479 register segT segment
;
2481 register unsigned char *opcode
;
2482 register int old_fr_fix
;
2484 old_fr_fix
= fragP
->fr_fix
;
2485 opcode
= (unsigned char *) fragP
->fr_opcode
;
2486 /* We've already got fragP->fr_subtype right; all we have to do is check
2487 for un-relaxable symbols. */
2488 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2490 /* symbol is undefined in this segment */
2493 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2494 opcode
[0] = 0xe9; /* dword disp jmp */
2496 fix_new (fragP
, old_fr_fix
, 4,
2498 fragP
->fr_offset
, 1,
2499 (GOT_symbol
&& /* Not quite right - we should switch on
2500 presence of @PLT, but I cannot see how
2501 to get to that from here. We should have
2502 done this in md_assemble to really
2503 get it right all of the time, but I
2504 think it does not matter that much, as
2505 this will be right most of the time. ERY*/
2506 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)?
2507 BFD_RELOC_386_PLT32
: BFD_RELOC_32_PCREL
);
2511 /* This changes the byte-displacement jump 0x7N -->
2512 the dword-displacement jump 0x0f8N */
2513 opcode
[1] = opcode
[0] + 0x10;
2514 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2515 fragP
->fr_fix
+= 1 + 4; /* we've added an opcode byte */
2516 fix_new (fragP
, old_fr_fix
+ 1, 4,
2518 fragP
->fr_offset
, 1,
2519 (GOT_symbol
&& /* Not quite right - we should switch on
2520 presence of @PLT, but I cannot see how
2521 to get to that from here. ERY */
2522 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)?
2523 BFD_RELOC_386_PLT32
: BFD_RELOC_32_PCREL
);
2528 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2529 } /* md_estimate_size_before_relax() */
2532 * md_convert_frag();
2534 * Called after relax() is finished.
2535 * In: Address of frag.
2536 * fr_type == rs_machine_dependent.
2537 * fr_subtype is what the address relaxed to.
2539 * Out: Any fixSs and constants are set up.
2540 * Caller will turn frag into a ".space 0".
2542 #ifndef BFD_ASSEMBLER
2544 md_convert_frag (headers
, sec
, fragP
)
2545 object_headers
*headers
;
2547 register fragS
*fragP
;
2550 md_convert_frag (abfd
, sec
, fragP
)
2553 register fragS
*fragP
;
2556 register unsigned char *opcode
;
2557 unsigned char *where_to_put_displacement
= NULL
;
2558 unsigned int target_address
;
2559 unsigned int opcode_address
;
2560 unsigned int extension
= 0;
2561 int displacement_from_opcode_start
;
2563 opcode
= (unsigned char *) fragP
->fr_opcode
;
2565 /* Address we want to reach in file space. */
2566 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2567 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2568 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2571 /* Address opcode resides at in file space. */
2572 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2574 /* Displacement from opcode start to fill into instruction. */
2575 displacement_from_opcode_start
= target_address
- opcode_address
;
2577 switch (fragP
->fr_subtype
)
2579 case ENCODE_RELAX_STATE (COND_JUMP
, BYTE
):
2580 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
):
2581 /* don't have to change opcode */
2582 extension
= 1; /* 1 opcode + 1 displacement */
2583 where_to_put_displacement
= &opcode
[1];
2586 case ENCODE_RELAX_STATE (COND_JUMP
, WORD
):
2587 opcode
[1] = TWO_BYTE_OPCODE_ESCAPE
;
2588 opcode
[2] = opcode
[0] + 0x10;
2589 opcode
[0] = WORD_PREFIX_OPCODE
;
2590 extension
= 4; /* 3 opcode + 2 displacement */
2591 where_to_put_displacement
= &opcode
[3];
2594 case ENCODE_RELAX_STATE (UNCOND_JUMP
, WORD
):
2596 opcode
[0] = WORD_PREFIX_OPCODE
;
2597 extension
= 3; /* 2 opcode + 2 displacement */
2598 where_to_put_displacement
= &opcode
[2];
2601 case ENCODE_RELAX_STATE (COND_JUMP
, DWORD
):
2602 opcode
[1] = opcode
[0] + 0x10;
2603 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2604 extension
= 5; /* 2 opcode + 4 displacement */
2605 where_to_put_displacement
= &opcode
[2];
2608 case ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
):
2610 extension
= 4; /* 1 opcode + 4 displacement */
2611 where_to_put_displacement
= &opcode
[1];
2615 BAD_CASE (fragP
->fr_subtype
);
2618 /* now put displacement after opcode */
2619 md_number_to_chars ((char *) where_to_put_displacement
,
2620 (valueT
) (displacement_from_opcode_start
- extension
),
2621 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2622 fragP
->fr_fix
+= extension
;
2626 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2627 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2628 const int md_reloc_size
= 8; /* Size of relocation record */
2631 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2633 addressT from_addr
, to_addr
;
2639 offset
= to_addr
- (from_addr
+ 2);
2640 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
2641 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
2645 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2647 addressT from_addr
, to_addr
;
2653 if (flag_do_long_jump
)
2655 offset
= to_addr
- S_GET_VALUE (to_symbol
);
2656 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
2657 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2658 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
2659 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
2663 offset
= to_addr
- (from_addr
+ 5);
2664 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
2665 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2669 /* Apply a fixup (fixS) to segment data, once it has been determined
2670 by our caller that we have all the info we need to fix it up.
2672 On the 386, immediates, displacements, and data pointers are all in
2673 the same (little-endian) format, so we don't need to care about which
2677 md_apply_fix3 (fixP
, valp
, seg
)
2678 fixS
*fixP
; /* The fix we're to put in. */
2679 valueT
*valp
; /* Pointer to the value of the bits. */
2680 segT seg
; /* Segment fix is from. */
2682 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2683 valueT value
= *valp
;
2685 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
2687 * This is a hack. There should be a better way to
2690 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
2693 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
2694 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2696 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
2697 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2698 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
2699 || (fixP
->fx_addsy
->bsym
->flags
& BSF_SECTION_SYM
) != 0))
2701 /* Yes, we add the values in twice. This is because
2702 bfd_perform_relocation subtracts them out again. I think
2703 bfd_perform_relocation is broken, but I don't dare change
2705 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2710 /* Fix a few things - the dynamic linker expects certain values here,
2711 and we must not dissappoint it. */
2712 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
2713 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2715 switch(fixP
->fx_r_type
) {
2716 case BFD_RELOC_386_PLT32
:
2717 /* Make the jump instruction point to the address of the operand. At
2718 runtime we merely add the offset to the actual PLT entry. */
2721 case BFD_RELOC_386_GOTPC
:
2723 * This is tough to explain. We end up with this one if we have
2724 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
2725 * here is to obtain the absolute address of the GOT, and it is strongly
2726 * preferable from a performance point of view to avoid using a runtime
2727 * relocation for this. The actual sequence of instructions often look
2733 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
2735 * The call and pop essentially return the absolute address of
2736 * the label .L66 and store it in %ebx. The linker itself will
2737 * ultimately change the first operand of the addl so that %ebx points to
2738 * the GOT, but to keep things simple, the .o file must have this operand
2739 * set so that it generates not the absolute address of .L66, but the
2740 * absolute address of itself. This allows the linker itself simply
2741 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
2742 * added in, and the addend of the relocation is stored in the operand
2743 * field for the instruction itself.
2745 * Our job here is to fix the operand so that it would add the correct
2746 * offset so that %ebx would point to itself. The thing that is tricky is
2747 * that .-.L66 will point to the beginning of the instruction, so we need
2748 * to further modify the operand so that it will point to itself.
2749 * There are other cases where you have something like:
2751 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
2753 * and here no correction would be required. Internally in the assembler
2754 * we treat operands of this form as not being pcrel since the '.' is
2755 * explicitly mentioned, and I wonder whether it would simplify matters
2756 * to do it this way. Who knows. In earlier versions of the PIC patches,
2757 * the pcrel_adjust field was used to store the correction, but since the
2758 * expression is not pcrel, I felt it would be confusing to do it this way.
2762 case BFD_RELOC_386_GOT32
:
2763 value
= 0; /* Fully resolved at runtime. No addend. */
2765 case BFD_RELOC_386_GOTOFF
:
2774 md_number_to_chars (p
, value
, fixP
->fx_size
);
2780 /* This is never used. */
2781 long /* Knows about the byte order in a word. */
2782 md_chars_to_number (con
, nbytes
)
2783 unsigned char con
[]; /* Low order byte 1st. */
2784 int nbytes
; /* Number of bytes in the input. */
2787 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
2789 retval
<<= BITS_PER_CHAR
;
2797 #define MAX_LITTLENUMS 6
2799 /* Turn the string pointed to by litP into a floating point constant of type
2800 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2801 is stored in *sizeP . An error message is returned, or NULL on OK. */
2803 md_atof (type
, litP
, sizeP
)
2809 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2810 LITTLENUM_TYPE
*wordP
;
2832 return "Bad call to md_atof ()";
2834 t
= atof_ieee (input_line_pointer
, type
, words
);
2836 input_line_pointer
= t
;
2838 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2839 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2840 the bigendian 386. */
2841 for (wordP
= words
+ prec
- 1; prec
--;)
2843 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
2844 litP
+= sizeof (LITTLENUM_TYPE
);
2849 char output_invalid_buf
[8];
2856 sprintf (output_invalid_buf
, "'%c'", c
);
2858 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
2859 return output_invalid_buf
;
2862 /* reg_string starts *before* REGISTER_PREFIX */
2864 parse_register (reg_string
)
2867 register char *s
= reg_string
;
2869 char reg_name_given
[MAX_REG_NAME_SIZE
];
2871 s
++; /* skip REGISTER_PREFIX */
2872 for (p
= reg_name_given
; is_register_char (*s
); p
++, s
++)
2874 *p
= register_chars
[(unsigned char) *s
];
2875 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2876 return (reg_entry
*) 0;
2879 return (reg_entry
*) hash_find (reg_hash
, reg_name_given
);
2883 CONST
char *md_shortopts
= "kmVQ:";
2885 CONST
char *md_shortopts
= "m";
2887 struct option md_longopts
[] = {
2888 {NULL
, no_argument
, NULL
, 0}
2890 size_t md_longopts_size
= sizeof(md_longopts
);
2893 md_parse_option (c
, arg
)
2900 flag_do_long_jump
= 1;
2903 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
2904 /* -k: Ignore for FreeBSD compatibility. */
2908 /* -V: SVR4 argument to print version ID. */
2910 print_version_id ();
2913 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
2914 should be emitted or not. FIXME: Not implemented. */
2926 md_show_usage (stream
)
2930 -m do long jump\n");
2933 #ifdef BFD_ASSEMBLER
2934 #ifdef OBJ_MAYBE_ELF
2935 #ifdef OBJ_MAYBE_COFF
2937 /* Pick the target format to use. */
2940 i386_target_format ()
2942 switch (OUTPUT_FLAVOR
)
2944 case bfd_target_coff_flavour
:
2946 case bfd_target_elf_flavour
:
2947 return "elf32-i386";
2954 #endif /* OBJ_MAYBE_COFF */
2955 #endif /* OBJ_MAYBE_ELF */
2956 #endif /* BFD_ASSEMBLER */
2960 md_undefined_symbol (name
)
2963 if (*name
== '_' && *(name
+1) == 'G'
2964 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
2968 if(symbol_find(name
))
2969 as_bad("GOT already in symbol table");
2970 GOT_symbol
= symbol_new (name
, undefined_section
,
2971 (valueT
) 0, &zero_address_frag
);
2978 /* Round up a section size to the appropriate boundary. */
2980 md_section_align (segment
, size
)
2984 return size
; /* Byte alignment is fine */
2987 /* Exactly what point is a PC-relative offset relative TO? On the
2988 i386, they're relative to the address of the offset, plus its
2989 size. (??? Is this right? FIXME-SOON!) */
2991 md_pcrel_from (fixP
)
2994 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3005 temp
= get_absolute_expression ();
3006 subseg_set (bss_section
, (subsegT
) temp
);
3007 demand_empty_rest_of_line ();
3013 #ifdef BFD_ASSEMBLER
3016 i386_validate_fix (fixp
)
3019 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
3021 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
3026 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
3027 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
3030 tc_gen_reloc (section
, fixp
)
3035 bfd_reloc_code_real_type code
;
3037 switch(fixp
->fx_r_type
)
3039 case BFD_RELOC_386_PLT32
:
3040 case BFD_RELOC_386_GOT32
:
3041 case BFD_RELOC_386_GOTOFF
:
3042 case BFD_RELOC_386_GOTPC
:
3043 code
= fixp
->fx_r_type
;
3046 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
3048 MAP (1, 0, BFD_RELOC_8
);
3049 MAP (2, 0, BFD_RELOC_16
);
3050 MAP (4, 0, BFD_RELOC_32
);
3051 MAP (1, 1, BFD_RELOC_8_PCREL
);
3052 MAP (2, 1, BFD_RELOC_16_PCREL
);
3053 MAP (4, 1, BFD_RELOC_32_PCREL
);
3055 as_bad ("Can not do %d byte %srelocation", fixp
->fx_size
,
3056 fixp
->fx_pcrel
? "pc-relative " : "");
3062 if (code
== BFD_RELOC_32
3064 && fixp
->fx_addsy
== GOT_symbol
)
3065 code
= BFD_RELOC_386_GOTPC
;
3067 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3068 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
3069 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3071 rel
->addend
= fixp
->fx_addnumber
;
3075 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3076 if (rel
->howto
== NULL
)
3078 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3079 "Cannot represent relocation type %s",
3080 bfd_get_reloc_code_name (code
));
3081 /* Set howto to a garbage value so that we can keep going. */
3082 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3083 assert (rel
->howto
!= NULL
);
3089 #else /* ! BFD_ASSEMBLER */
3091 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
3093 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3096 relax_addressT segment_address_in_file
;
3099 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3100 * Out: GNU LD relocation length code: 0, 1, or 2.
3103 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3106 know (fixP
->fx_addsy
!= NULL
);
3108 md_number_to_chars (where
,
3109 (valueT
) (fixP
->fx_frag
->fr_address
3110 + fixP
->fx_where
- segment_address_in_file
),
3113 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3114 ? S_GET_TYPE (fixP
->fx_addsy
)
3115 : fixP
->fx_addsy
->sy_number
);
3117 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
3118 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3119 where
[4] = r_symbolnum
& 0x0ff;
3120 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
3121 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
3122 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
3125 #endif /* OBJ_AOUT or OBJ_BOUT */
3127 #if defined (I386COFF)
3130 tc_coff_fix2rtype (fixP
)
3133 if (fixP
->fx_r_type
== R_IMAGEBASE
)
3136 return (fixP
->fx_pcrel
?
3137 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
3138 fixP
->fx_size
== 2 ? R_PCRWORD
:
3140 (fixP
->fx_size
== 1 ? R_RELBYTE
:
3141 fixP
->fx_size
== 2 ? R_RELWORD
:
3146 tc_coff_sizemachdep (frag
)
3150 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
3155 #endif /* I386COFF */
3157 #endif /* BFD_ASSEMBLER? */
3159 /* end of tc-i386.c */