1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef SCALE1_WHEN_NO_INDEX
44 /* Specifying a scale factor besides 1 when there is no index is
45 futile. eg. `mov (%ebx,2),%al' does exactly the same as
46 `mov (%ebx),%al'. To slavishly follow what the programmer
47 specified, set SCALE1_WHEN_NO_INDEX to 0. */
48 #define SCALE1_WHEN_NO_INDEX 1
54 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
55 static int fits_in_signed_byte
PARAMS ((long));
56 static int fits_in_unsigned_byte
PARAMS ((long));
57 static int fits_in_unsigned_word
PARAMS ((long));
58 static int fits_in_signed_word
PARAMS ((long));
59 static int smallest_imm_type
PARAMS ((long));
60 static int add_prefix
PARAMS ((unsigned int));
61 static void set_16bit_code_flag
PARAMS ((int));
62 static void set_intel_syntax
PARAMS ((int));
65 static bfd_reloc_code_real_type reloc
66 PARAMS ((int, int, bfd_reloc_code_real_type
));
69 /* 'md_assemble ()' gathers together information and puts it into a
74 /* TM holds the template for the insn were currently assembling. */
77 /* SUFFIX holds the instruction mnemonic suffix if given.
78 (e.g. 'l' for 'movl') */
81 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
83 /* OPERANDS gives the number of given operands. */
84 unsigned int operands
;
86 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
87 of given register, displacement, memory operands and immediate
89 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
91 /* TYPES [i] is the type (see above #defines) which tells us how to
92 search through DISPS [i] & IMMS [i] & REGS [i] for the required
94 unsigned int types
[MAX_OPERANDS
];
96 /* Displacements (if given) for each operand. */
97 expressionS
*disps
[MAX_OPERANDS
];
99 /* Relocation type for operand */
101 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
103 int disp_reloc
[MAX_OPERANDS
];
106 /* Immediate operands (if given) for each operand. */
107 expressionS
*imms
[MAX_OPERANDS
];
109 /* Register operands (if given) for each operand. */
110 const reg_entry
*regs
[MAX_OPERANDS
];
112 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
113 the base index byte below. */
114 const reg_entry
*base_reg
;
115 const reg_entry
*index_reg
;
116 unsigned int log2_scale_factor
;
118 /* SEG gives the seg_entries of this insn. They are zero unless
119 explicit segment overrides are given. */
120 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
122 /* PREFIX holds all the given prefix opcodes (usually null).
123 PREFIXES is the number of prefix opcodes. */
124 unsigned int prefixes
;
125 unsigned char prefix
[MAX_PREFIXES
];
127 /* RM and SIB are the modrm byte and the sib byte where the
128 addressing modes of this insn are encoded. */
134 typedef struct _i386_insn i386_insn
;
136 /* List of chars besides those in app.c:symbol_chars that can start an
137 operand. Used to prevent the scrubber eating vital white-space. */
139 const char extra_symbol_chars
[] = "*%-(@";
141 const char extra_symbol_chars
[] = "*%-(";
144 /* This array holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful */
146 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
147 /* Putting '/' here makes it impossible to use the divide operator.
148 However, we need it for compatibility with SVR4 systems. */
149 const char comment_chars
[] = "#/";
150 #define PREFIX_SEPARATOR '\\'
152 const char comment_chars
[] = "#";
153 #define PREFIX_SEPARATOR '/'
156 /* This array holds the chars that only start a comment at the beginning of
157 a line. If the line seems to have the form '# 123 filename'
158 .line and .file directives will appear in the pre-processed output */
159 /* Note that input_file.c hand checks for '#' at the beginning of the
160 first line of the input file. This is because the compiler outputs
161 #NO_APP at the beginning of its output. */
162 /* Also note that comments started like this one will always work if
163 '/' isn't otherwise defined. */
164 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
165 const char line_comment_chars
[] = "";
167 const char line_comment_chars
[] = "/";
170 const char line_separator_chars
[] = "";
172 /* Chars that can be used to separate mant from exp in floating point nums */
173 const char EXP_CHARS
[] = "eE";
175 /* Chars that mean this number is a floating point constant */
178 const char FLT_CHARS
[] = "fFdDxX";
180 /* tables for lexical analysis */
181 static char mnemonic_chars
[256];
182 static char register_chars
[256];
183 static char operand_chars
[256];
184 static char identifier_chars
[256];
185 static char digit_chars
[256];
188 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
189 #define is_operand_char(x) (operand_chars[(unsigned char) x])
190 #define is_register_char(x) (register_chars[(unsigned char) x])
191 #define is_space_char(x) ((x) == ' ')
192 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
193 #define is_digit_char(x) (digit_chars[(unsigned char) x])
195 /* put here all non-digit non-letter charcters that may occur in an operand */
196 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
198 /* md_assemble() always leaves the strings it's passed unaltered. To
199 effect this we maintain a stack of saved characters that we've smashed
200 with '\0's (indicating end of strings for various sub-fields of the
201 assembler instruction). */
202 static char save_stack
[32];
203 static char *save_stack_p
; /* stack pointer */
204 #define END_STRING_AND_SAVE(s) \
205 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
206 #define RESTORE_END_STRING(s) \
207 do { *(s) = *--save_stack_p; } while (0)
209 /* The instruction we're assembling. */
212 /* Possible templates for current insn. */
213 static const templates
*current_templates
;
215 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
216 static expressionS disp_expressions
[2], im_expressions
[2];
218 static int this_operand
; /* current operand we are working on */
220 static int flag_do_long_jump
; /* FIXME what does this do? */
222 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
224 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
226 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
228 /* Interface to relax_segment.
229 There are 2 relax states for 386 jump insns: one for conditional &
230 one for unconditional jumps. This is because the these two types
231 of jumps add different sizes to frags when we're figuring out what
232 sort of jump to choose to reach a given label. */
235 #define COND_JUMP 1 /* conditional jump */
236 #define UNCOND_JUMP 2 /* unconditional jump */
240 #define SMALL16 (SMALL|CODE16)
242 #define BIG16 (BIG|CODE16)
246 #define INLINE __inline__
252 #define ENCODE_RELAX_STATE(type,size) \
253 ((relax_substateT)((type<<2) | (size)))
254 #define SIZE_FROM_RELAX_STATE(s) \
255 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
257 /* This table is used by relax_frag to promote short jumps to long
258 ones where necessary. SMALL (short) jumps may be promoted to BIG
259 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
260 don't allow a short jump in a 32 bit code segment to be promoted to
261 a 16 bit offset jump because it's slower (requires data size
262 prefix), and doesn't work, unless the destination is in the bottom
263 64k of the code segment (The top 16 bits of eip are zeroed). */
265 const relax_typeS md_relax_table
[] =
268 1) most positive reach of this state,
269 2) most negative reach of this state,
270 3) how many bytes this mode will add to the size of the current frag
271 4) which index into the table to try if we can't fit into this one.
278 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
279 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
280 /* dword conditionals adds 4 bytes to frag:
281 1 extra opcode byte, 3 extra displacement bytes. */
283 /* word conditionals add 2 bytes to frag:
284 1 extra opcode byte, 1 extra displacement byte. */
287 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
288 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
289 /* dword jmp adds 3 bytes to frag:
290 0 extra opcode bytes, 3 extra displacement bytes. */
292 /* word jmp adds 1 byte to frag:
293 0 extra opcode bytes, 1 extra displacement byte. */
300 i386_align_code (fragP
, count
)
304 /* Various efficient no-op patterns for aligning code labels. */
305 /* Note: Don't try to assemble the instructions in the comments. */
306 /* 0L and 0w are not legal */
307 static const char f32_1
[] =
309 static const char f32_2
[] =
310 {0x89,0xf6}; /* movl %esi,%esi */
311 static const char f32_3
[] =
312 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
313 static const char f32_4
[] =
314 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
315 static const char f32_5
[] =
317 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
318 static const char f32_6
[] =
319 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
320 static const char f32_7
[] =
321 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
322 static const char f32_8
[] =
324 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
325 static const char f32_9
[] =
326 {0x89,0xf6, /* movl %esi,%esi */
327 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
328 static const char f32_10
[] =
329 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
330 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
331 static const char f32_11
[] =
332 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
333 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
334 static const char f32_12
[] =
335 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
336 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
337 static const char f32_13
[] =
338 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
339 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
340 static const char f32_14
[] =
341 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
342 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
343 static const char f32_15
[] =
344 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
345 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
346 static const char f16_4
[] =
347 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
348 static const char f16_5
[] =
350 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
351 static const char f16_6
[] =
352 {0x89,0xf6, /* mov %si,%si */
353 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
354 static const char f16_7
[] =
355 {0x8d,0x74,0x00, /* lea 0(%si),%si */
356 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
357 static const char f16_8
[] =
358 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
359 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
360 static const char *const f32_patt
[] = {
361 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
362 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
364 static const char *const f16_patt
[] = {
365 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
366 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
369 if (count
> 0 && count
<= 15)
373 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
374 f16_patt
[count
- 1], count
);
375 if (count
> 8) /* adjust jump offset */
376 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
379 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
380 f32_patt
[count
- 1], count
);
381 fragP
->fr_var
= count
;
385 static char *output_invalid
PARAMS ((int c
));
386 static int i386_operand
PARAMS ((char *operand_string
));
387 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
388 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
392 static void s_bss
PARAMS ((int));
395 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
397 static INLINE
unsigned int
398 mode_from_disp_size (t
)
401 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
405 fits_in_signed_byte (num
)
408 return (num
>= -128) && (num
<= 127);
409 } /* fits_in_signed_byte() */
412 fits_in_unsigned_byte (num
)
415 return (num
& 0xff) == num
;
416 } /* fits_in_unsigned_byte() */
419 fits_in_unsigned_word (num
)
422 return (num
& 0xffff) == num
;
423 } /* fits_in_unsigned_word() */
426 fits_in_signed_word (num
)
429 return (-32768 <= num
) && (num
<= 32767);
430 } /* fits_in_signed_word() */
433 smallest_imm_type (num
)
437 /* This code is disabled because all the Imm1 forms in the opcode table
438 are slower on the i486, and they're the versions with the implicitly
439 specified single-position displacement, which has another syntax if
440 you really want to use that form. If you really prefer to have the
441 one-byte-shorter Imm1 form despite these problems, re-enable this
444 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
446 return (fits_in_signed_byte (num
)
447 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
448 : fits_in_unsigned_byte (num
)
449 ? (Imm8
| Imm16
| Imm32
)
450 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
453 } /* smallest_imm_type() */
455 /* Returns 0 if attempting to add a prefix where one from the same
456 class already exists, 1 if non rep/repne added, 2 if rep/repne
470 case CS_PREFIX_OPCODE
:
471 case DS_PREFIX_OPCODE
:
472 case ES_PREFIX_OPCODE
:
473 case FS_PREFIX_OPCODE
:
474 case GS_PREFIX_OPCODE
:
475 case SS_PREFIX_OPCODE
:
479 case REPNE_PREFIX_OPCODE
:
480 case REPE_PREFIX_OPCODE
:
483 case LOCK_PREFIX_OPCODE
:
491 case ADDR_PREFIX_OPCODE
:
495 case DATA_PREFIX_OPCODE
:
502 as_bad (_("same type of prefix used twice"));
507 i
.prefix
[q
] = prefix
;
512 set_16bit_code_flag (new_16bit_code_flag
)
513 int new_16bit_code_flag
;
515 flag_16bit_code
= new_16bit_code_flag
;
519 set_intel_syntax (syntax_flag
)
522 /* Find out if register prefixing is specified. */
523 int ask_naked_reg
= 0;
526 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
528 char *string
= input_line_pointer
;
529 int e
= get_symbol_end ();
531 if (strcmp(string
, "prefix") == 0)
533 else if (strcmp(string
, "noprefix") == 0)
536 as_bad (_("Bad argument to syntax directive."));
537 *input_line_pointer
= e
;
539 demand_empty_rest_of_line ();
541 intel_syntax
= syntax_flag
;
543 if (ask_naked_reg
== 0)
546 allow_naked_reg
= (intel_syntax
547 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
549 allow_naked_reg
= 0; /* conservative default */
553 allow_naked_reg
= (ask_naked_reg
< 0);
556 const pseudo_typeS md_pseudo_table
[] =
561 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
562 {"align", s_align_bytes
, 0},
564 {"align", s_align_ptwo
, 0},
566 {"ffloat", float_cons
, 'f'},
567 {"dfloat", float_cons
, 'd'},
568 {"tfloat", float_cons
, 'x'},
570 {"noopt", s_ignore
, 0},
571 {"optim", s_ignore
, 0},
572 {"code16", set_16bit_code_flag
, 1},
573 {"code32", set_16bit_code_flag
, 0},
574 {"intel_syntax", set_intel_syntax
, 1},
575 {"att_syntax", set_intel_syntax
, 0},
579 /* for interface with expression () */
580 extern char *input_line_pointer
;
582 /* hash table for instruction mnemonic lookup */
583 static struct hash_control
*op_hash
;
584 /* hash table for register lookup */
585 static struct hash_control
*reg_hash
;
591 const char *hash_err
;
593 /* initialize op_hash hash table */
594 op_hash
= hash_new ();
597 register const template *optab
;
598 register templates
*core_optab
;
600 optab
= i386_optab
; /* setup for loop */
601 core_optab
= (templates
*) xmalloc (sizeof (templates
));
602 core_optab
->start
= optab
;
607 if (optab
->name
== NULL
608 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
610 /* different name --> ship out current template list;
611 add to hash table; & begin anew */
612 core_optab
->end
= optab
;
613 hash_err
= hash_insert (op_hash
,
619 as_fatal (_("Internal Error: Can't hash %s: %s"),
623 if (optab
->name
== NULL
)
625 core_optab
= (templates
*) xmalloc (sizeof (templates
));
626 core_optab
->start
= optab
;
631 /* initialize reg_hash hash table */
632 reg_hash
= hash_new ();
634 register const reg_entry
*regtab
;
636 for (regtab
= i386_regtab
;
637 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
640 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
646 /* fill in lexical tables: mnemonic_chars, operand_chars. */
651 for (c
= 0; c
< 256; c
++)
656 mnemonic_chars
[c
] = c
;
657 register_chars
[c
] = c
;
658 operand_chars
[c
] = c
;
660 else if (islower (c
))
662 mnemonic_chars
[c
] = c
;
663 register_chars
[c
] = c
;
664 operand_chars
[c
] = c
;
666 else if (isupper (c
))
668 mnemonic_chars
[c
] = tolower (c
);
669 register_chars
[c
] = mnemonic_chars
[c
];
670 operand_chars
[c
] = c
;
673 if (isalpha (c
) || isdigit (c
))
674 identifier_chars
[c
] = c
;
677 identifier_chars
[c
] = c
;
678 operand_chars
[c
] = c
;
683 identifier_chars
['@'] = '@';
685 register_chars
[')'] = ')';
686 register_chars
['('] = '(';
687 digit_chars
['-'] = '-';
688 identifier_chars
['_'] = '_';
689 identifier_chars
['.'] = '.';
691 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
692 operand_chars
[(unsigned char) *p
] = *p
;
695 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
696 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
698 record_alignment (text_section
, 2);
699 record_alignment (data_section
, 2);
700 record_alignment (bss_section
, 2);
706 i386_print_statistics (file
)
709 hash_print_statistics (file
, "i386 opcode", op_hash
);
710 hash_print_statistics (file
, "i386 register", reg_hash
);
716 /* debugging routines for md_assemble */
717 static void pi
PARAMS ((char *, i386_insn
*));
718 static void pte
PARAMS ((template *));
719 static void pt
PARAMS ((unsigned int));
720 static void pe
PARAMS ((expressionS
*));
721 static void ps
PARAMS ((symbolS
*));
728 register template *p
;
731 fprintf (stdout
, "%s: template ", line
);
733 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
734 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
735 fprintf (stdout
, " base %x index %x scale %x\n",
736 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
737 for (i
= 0; i
< x
->operands
; i
++)
739 fprintf (stdout
, " #%d: ", i
+ 1);
741 fprintf (stdout
, "\n");
743 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
744 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
745 if (x
->types
[i
] & Imm
)
747 if (x
->types
[i
] & Disp
)
757 fprintf (stdout
, " %d operands ", t
->operands
);
758 fprintf (stdout
, "opcode %x ",
760 if (t
->extension_opcode
!= None
)
761 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
762 if (t
->opcode_modifier
& D
)
763 fprintf (stdout
, "D");
764 if (t
->opcode_modifier
& W
)
765 fprintf (stdout
, "W");
766 fprintf (stdout
, "\n");
767 for (i
= 0; i
< t
->operands
; i
++)
769 fprintf (stdout
, " #%d type ", i
+ 1);
770 pt (t
->operand_types
[i
]);
771 fprintf (stdout
, "\n");
779 fprintf (stdout
, " operation %d\n", e
->X_op
);
780 fprintf (stdout
, " add_number %d (%x)\n",
781 e
->X_add_number
, e
->X_add_number
);
784 fprintf (stdout
, " add_symbol ");
785 ps (e
->X_add_symbol
);
786 fprintf (stdout
, "\n");
790 fprintf (stdout
, " op_symbol ");
792 fprintf (stdout
, "\n");
800 fprintf (stdout
, "%s type %s%s",
802 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
803 segment_name (S_GET_SEGMENT (s
)));
822 { BaseIndex
, "BaseIndex" },
826 { InOutPortReg
, "InOutPortReg" },
827 { ShiftCount
, "ShiftCount" },
828 { Control
, "control reg" },
829 { Test
, "test reg" },
830 { Debug
, "debug reg" },
831 { FloatReg
, "FReg" },
832 { FloatAcc
, "FAcc" },
836 { JumpAbsolute
, "Jump Absolute" },
846 register struct type_name
*ty
;
850 fprintf (stdout
, _("Unknown"));
854 for (ty
= type_names
; ty
->mask
; ty
++)
856 fprintf (stdout
, "%s, ", ty
->tname
);
861 #endif /* DEBUG386 */
864 tc_i386_force_relocation (fixp
)
868 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
869 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
874 return fixp
->fx_r_type
==7;
879 static bfd_reloc_code_real_type reloc
880 PARAMS ((int, int, bfd_reloc_code_real_type
));
882 static bfd_reloc_code_real_type
883 reloc (size
, pcrel
, other
)
886 bfd_reloc_code_real_type other
;
888 if (other
!= NO_RELOC
) return other
;
894 case 1: return BFD_RELOC_8_PCREL
;
895 case 2: return BFD_RELOC_16_PCREL
;
896 case 4: return BFD_RELOC_32_PCREL
;
898 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
904 case 1: return BFD_RELOC_8
;
905 case 2: return BFD_RELOC_16
;
906 case 4: return BFD_RELOC_32
;
908 as_bad (_("Can not do %d byte relocation"), size
);
911 return BFD_RELOC_NONE
;
915 * Here we decide which fixups can be adjusted to make them relative to
916 * the beginning of the section instead of the symbol. Basically we need
917 * to make sure that the dynamic relocations are done correctly, so in
918 * some cases we force the original symbol to be used.
921 tc_i386_fix_adjustable(fixP
)
925 /* Prevent all adjustments to global symbols. */
926 if (S_IS_EXTERN (fixP
->fx_addsy
))
928 if (S_IS_WEAK (fixP
->fx_addsy
))
931 /* adjust_reloc_syms doesn't know about the GOT */
932 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
933 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
934 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
935 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
936 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
941 #define reloc(SIZE,PCREL,OTHER) 0
942 #define BFD_RELOC_16 0
943 #define BFD_RELOC_32 0
944 #define BFD_RELOC_16_PCREL 0
945 #define BFD_RELOC_32_PCREL 0
946 #define BFD_RELOC_386_PLT32 0
947 #define BFD_RELOC_386_GOT32 0
948 #define BFD_RELOC_386_GOTOFF 0
952 intel_float_operand (mnemonic
)
955 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
958 if (mnemonic
[0] == 'f')
964 /* This is the guts of the machine-dependent assembler. LINE points to a
965 machine dependent instruction. This function is supposed to emit
966 the frags/bytes it assembles to. */
972 /* Points to template once we've found it. */
975 /* Count the size of the instruction generated. */
980 char mnemonic
[MAX_MNEM_SIZE
];
982 /* Initialize globals. */
983 memset (&i
, '\0', sizeof (i
));
984 for (j
= 0; j
< MAX_OPERANDS
; j
++)
985 i
.disp_reloc
[j
] = NO_RELOC
;
986 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
987 memset (im_expressions
, '\0', sizeof (im_expressions
));
988 save_stack_p
= save_stack
; /* reset stack pointer */
990 /* First parse an instruction mnemonic & call i386_operand for the operands.
991 We assume that the scrubber has arranged it so that line[0] is the valid
992 start of a (possibly prefixed) mnemonic. */
995 char *token_start
= l
;
998 /* Non-zero if we found a prefix only acceptable with string insns. */
999 const char *expecting_string_instruction
= NULL
;
1004 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1007 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1009 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1014 if (!is_space_char (*l
)
1015 && *l
!= END_OF_INSN
1016 && *l
!= PREFIX_SEPARATOR
)
1018 as_bad (_("invalid character %s in mnemonic"),
1019 output_invalid (*l
));
1022 if (token_start
== l
)
1024 if (*l
== PREFIX_SEPARATOR
)
1025 as_bad (_("expecting prefix; got nothing"));
1027 as_bad (_("expecting mnemonic; got nothing"));
1031 /* Look up instruction (or prefix) via hash table. */
1032 current_templates
= hash_find (op_hash
, mnemonic
);
1034 if (*l
!= END_OF_INSN
1035 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1036 && current_templates
1037 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1039 /* If we are in 16-bit mode, do not allow addr16 or data16.
1040 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1041 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1042 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1045 as_bad (_("redundant %s prefix"),
1046 current_templates
->start
->name
);
1049 /* Add prefix, checking for repeated prefixes. */
1050 switch (add_prefix (current_templates
->start
->base_opcode
))
1055 expecting_string_instruction
=
1056 current_templates
->start
->name
;
1059 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1066 if (!current_templates
)
1068 /* See if we can get a match by trimming off a suffix. */
1071 case DWORD_MNEM_SUFFIX
:
1072 case WORD_MNEM_SUFFIX
:
1073 case BYTE_MNEM_SUFFIX
:
1074 case SHORT_MNEM_SUFFIX
:
1075 #if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
1076 case LONG_MNEM_SUFFIX
:
1078 i
.suffix
= mnem_p
[-1];
1080 current_templates
= hash_find (op_hash
, mnemonic
);
1084 case INTEL_DWORD_MNEM_SUFFIX
:
1087 i
.suffix
= mnem_p
[-1];
1089 current_templates
= hash_find (op_hash
, mnemonic
);
1093 if (!current_templates
)
1095 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1100 /* check for rep/repne without a string instruction */
1101 if (expecting_string_instruction
1102 && !(current_templates
->start
->opcode_modifier
& IsString
))
1104 as_bad (_("expecting string instruction after `%s'"),
1105 expecting_string_instruction
);
1109 /* There may be operands to parse. */
1110 if (*l
!= END_OF_INSN
)
1112 /* parse operands */
1114 /* 1 if operand is pending after ','. */
1115 unsigned int expecting_operand
= 0;
1117 /* Non-zero if operand parens not balanced. */
1118 unsigned int paren_not_balanced
;
1122 /* skip optional white space before operand */
1123 if (is_space_char (*l
))
1125 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1127 as_bad (_("invalid character %s before operand %d"),
1128 output_invalid (*l
),
1132 token_start
= l
; /* after white space */
1133 paren_not_balanced
= 0;
1134 while (paren_not_balanced
|| *l
!= ',')
1136 if (*l
== END_OF_INSN
)
1138 if (paren_not_balanced
)
1141 as_bad (_("unbalanced parenthesis in operand %d."),
1144 as_bad (_("unbalanced brackets in operand %d."),
1149 break; /* we are done */
1151 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1153 as_bad (_("invalid character %s in operand %d"),
1154 output_invalid (*l
),
1161 ++paren_not_balanced
;
1163 --paren_not_balanced
;
1168 ++paren_not_balanced
;
1170 --paren_not_balanced
;
1174 if (l
!= token_start
)
1175 { /* yes, we've read in another operand */
1176 unsigned int operand_ok
;
1177 this_operand
= i
.operands
++;
1178 if (i
.operands
> MAX_OPERANDS
)
1180 as_bad (_("spurious operands; (%d operands/instruction max)"),
1184 /* now parse operand adding info to 'i' as we go along */
1185 END_STRING_AND_SAVE (l
);
1188 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1190 operand_ok
= i386_operand (token_start
);
1192 RESTORE_END_STRING (l
); /* restore old contents */
1198 if (expecting_operand
)
1200 expecting_operand_after_comma
:
1201 as_bad (_("expecting operand after ','; got nothing"));
1206 as_bad (_("expecting operand before ','; got nothing"));
1211 /* now *l must be either ',' or END_OF_INSN */
1214 if (*++l
== END_OF_INSN
)
1215 { /* just skip it, if it's \n complain */
1216 goto expecting_operand_after_comma
;
1218 expecting_operand
= 1;
1221 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1225 /* Now we've parsed the mnemonic into a set of templates, and have the
1228 Next, we find a template that matches the given insn,
1229 making sure the overlap of the given operands types is consistent
1230 with the template operand types. */
1232 #define MATCH(overlap, given, template) \
1234 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1235 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1237 /* If given types r0 and r1 are registers they must be of the same type
1238 unless the expected operand type register overlap is null.
1239 Note that Acc in a template matches every size of reg. */
1240 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1241 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1242 ((g0) & Reg) == ((g1) & Reg) || \
1243 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1246 register unsigned int overlap0
, overlap1
;
1248 unsigned int overlap2
;
1249 unsigned int found_reverse_match
;
1252 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1254 && (strcmp (mnemonic
, "enter") != 0)
1255 && (strcmp (mnemonic
, "bound") != 0)
1256 && (strncmp (mnemonic
, "fsub", 4) !=0)
1257 && (strncmp (mnemonic
, "fdiv", 4) !=0))
1259 const reg_entry
*temp_reg
;
1260 expressionS
*temp_disp
;
1261 expressionS
*temp_imm
;
1262 unsigned int temp_type
;
1265 if (i
.operands
== 2)
1270 else if (i
.operands
== 3)
1278 temp_type
= i
.types
[xchg2
];
1279 if (temp_type
& (Reg
| FloatReg
))
1280 temp_reg
= i
.regs
[xchg2
];
1281 else if (temp_type
& Imm
)
1282 temp_imm
= i
.imms
[xchg2
];
1283 else if (temp_type
& Disp
)
1284 temp_disp
= i
.disps
[xchg2
];
1286 i
.types
[xchg2
] = i
.types
[xchg1
];
1288 if (i
.types
[xchg1
] & (Reg
| FloatReg
))
1290 i
.regs
[xchg2
] = i
.regs
[xchg1
];
1291 i
.regs
[xchg1
] = NULL
;
1293 else if (i
.types
[xchg2
] & Imm
)
1295 i
.imms
[xchg2
] = i
.imms
[xchg1
];
1296 i
.imms
[xchg1
] = NULL
;
1298 else if (i
.types
[xchg2
] & Disp
)
1300 i
.disps
[xchg2
] = i
.disps
[xchg1
];
1301 i
.disps
[xchg1
] = NULL
;
1304 if (temp_type
& (Reg
| FloatReg
))
1306 i
.regs
[xchg1
] = temp_reg
;
1307 if (! (i
.types
[xchg1
] & (Reg
| FloatReg
)))
1308 i
.regs
[xchg2
] = NULL
;
1310 else if (temp_type
& Imm
)
1312 i
.imms
[xchg1
] = temp_imm
;
1313 if (! (i
.types
[xchg1
] & Imm
))
1314 i
.imms
[xchg2
] = NULL
;
1316 else if (temp_type
& Disp
)
1318 i
.disps
[xchg1
] = temp_disp
;
1319 if (! (i
.types
[xchg1
] & Disp
))
1320 i
.disps
[xchg2
] = NULL
;
1323 i
.types
[xchg1
] = temp_type
;
1325 if (!strcmp(mnemonic
,"jmp")
1326 || !strcmp (mnemonic
, "call"))
1327 if ((i
.types
[0] & Reg
) || i
.types
[0] & BaseIndex
)
1328 i
.types
[0] |= JumpAbsolute
;
1334 found_reverse_match
= 0;
1335 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1337 : (i
.suffix
== WORD_MNEM_SUFFIX
1339 : (i
.suffix
== SHORT_MNEM_SUFFIX
1341 : (i
.suffix
== LONG_MNEM_SUFFIX
1343 : (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
1345 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1347 for (t
= current_templates
->start
;
1348 t
< current_templates
->end
;
1351 /* Must have right number of operands. */
1352 if (i
.operands
!= t
->operands
)
1355 /* For some opcodes, don't check the suffix */
1358 if (strcmp (t
->name
, "fnstcw")
1359 && strcmp (t
->name
, "fldcw")
1360 && (t
->opcode_modifier
& suffix_check
))
1363 /* Must not have disallowed suffix. */
1364 else if ((t
->opcode_modifier
& suffix_check
))
1367 else if (!t
->operands
)
1368 break; /* 0 operands always matches */
1370 overlap0
= i
.types
[0] & t
->operand_types
[0];
1371 switch (t
->operands
)
1374 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1379 overlap1
= i
.types
[1] & t
->operand_types
[1];
1380 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1381 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1382 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1383 t
->operand_types
[0],
1384 overlap1
, i
.types
[1],
1385 t
->operand_types
[1]))
1388 /* check if other direction is valid ... */
1389 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1392 /* try reversing direction of operands */
1393 overlap0
= i
.types
[0] & t
->operand_types
[1];
1394 overlap1
= i
.types
[1] & t
->operand_types
[0];
1395 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1396 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1397 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1398 t
->operand_types
[1],
1399 overlap1
, i
.types
[1],
1400 t
->operand_types
[0]))
1402 /* does not match either direction */
1405 /* found_reverse_match holds which of D or FloatDR
1407 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1410 /* found a forward 2 operand match here */
1411 if (t
->operands
== 3)
1413 /* Here we make use of the fact that there are no
1414 reverse match 3 operand instructions, and all 3
1415 operand instructions only need to be checked for
1416 register consistency between operands 2 and 3. */
1417 overlap2
= i
.types
[2] & t
->operand_types
[2];
1418 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1419 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1420 t
->operand_types
[1],
1421 overlap2
, i
.types
[2],
1422 t
->operand_types
[2]))
1426 /* found either forward/reverse 2 or 3 operand match here:
1427 slip through to break */
1429 break; /* we've found a match; break out of loop */
1430 } /* for (t = ... */
1431 if (t
== current_templates
->end
)
1432 { /* we found no match */
1433 as_bad (_("suffix or operands invalid for `%s'"),
1434 current_templates
->start
->name
);
1438 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1440 /* Warn them that a data or address size prefix doesn't affect
1441 assembly of the next line of code. */
1442 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1445 /* Copy the template we found. */
1447 if (found_reverse_match
)
1449 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1450 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1454 if (i
.tm
.opcode_modifier
& FWait
)
1455 if (! add_prefix (FWAIT_OPCODE
))
1458 /* Check string instruction segment overrides */
1459 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1461 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1462 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1464 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1466 as_bad (_("`%s' operand %d must use `%%es' segment"),
1471 /* There's only ever one segment override allowed per instruction.
1472 This instruction possibly has a legal segment override on the
1473 second operand, so copy the segment to where non-string
1474 instructions store it, allowing common code. */
1475 i
.seg
[0] = i
.seg
[1];
1477 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1479 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1481 as_bad (_("`%s' operand %d must use `%%es' segment"),
1489 /* If matched instruction specifies an explicit instruction mnemonic
1491 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1493 if (i
.tm
.opcode_modifier
& Size16
)
1494 i
.suffix
= WORD_MNEM_SUFFIX
;
1496 i
.suffix
= DWORD_MNEM_SUFFIX
;
1498 else if (i
.reg_operands
)
1500 /* If there's no instruction mnemonic suffix we try to invent one
1501 based on register operands. */
1504 /* We take i.suffix from the last register operand specified,
1505 Destination register type is more significant than source
1508 for (op
= i
.operands
; --op
>= 0; )
1509 if (i
.types
[op
] & Reg
)
1511 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1512 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1517 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1520 for (op
= i
.operands
; --op
>= 0; )
1522 /* If this is an eight bit register, it's OK. If it's
1523 the 16 or 32 bit version of an eight bit register,
1524 we will just use the low portion, and that's OK too. */
1525 if (i
.types
[op
] & Reg8
)
1528 /* movzx and movsx should not generate this warning. */
1530 && (i
.tm
.base_opcode
== 0xfb7
1531 || i
.tm
.base_opcode
== 0xfb6
1532 || i
.tm
.base_opcode
== 0xfbe
1533 || i
.tm
.base_opcode
== 0xfbf))
1536 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1538 /* Check that the template allows eight bit regs
1539 This kills insns such as `orb $1,%edx', which
1540 maybe should be allowed. */
1541 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1545 #if REGISTER_WARNINGS
1546 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1547 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1548 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1549 i
.regs
[op
]->reg_name
,
1554 /* Any other register is bad */
1555 if (i
.types
[op
] & (Reg
| RegMMX
| Control
| Debug
| Test
1556 | FloatReg
| FloatAcc
| SReg2
| SReg3
))
1558 as_bad (_("`%%%s' not allowed with `%s%c'"),
1559 i
.regs
[op
]->reg_name
,
1566 else if (i
.suffix
== DWORD_MNEM_SUFFIX
)
1569 for (op
= i
.operands
; --op
>= 0; )
1570 /* Reject eight bit registers, except where the template
1571 requires them. (eg. movzb) */
1572 if ((i
.types
[op
] & Reg8
) != 0
1573 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1575 as_bad (_("`%%%s' not allowed with `%s%c'"),
1576 i
.regs
[op
]->reg_name
,
1581 #if REGISTER_WARNINGS
1582 /* Warn if the e prefix on a general reg is missing. */
1583 else if ((i
.types
[op
] & Reg16
) != 0
1584 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1586 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1587 (i
.regs
[op
] + 8)->reg_name
,
1588 i
.regs
[op
]->reg_name
,
1593 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1596 for (op
= i
.operands
; --op
>= 0; )
1597 /* Reject eight bit registers, except where the template
1598 requires them. (eg. movzb) */
1599 if ((i
.types
[op
] & Reg8
) != 0
1600 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1602 as_bad (_("`%%%s' not allowed with `%s%c'"),
1603 i
.regs
[op
]->reg_name
,
1608 #if REGISTER_WARNINGS
1609 /* Warn if the e prefix on a general reg is present. */
1610 else if ((i
.types
[op
] & Reg32
) != 0
1611 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1613 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1614 (i
.regs
[op
] - 8)->reg_name
,
1615 i
.regs
[op
]->reg_name
,
1624 /* Make still unresolved immediate matches conform to size of immediate
1625 given in i.suffix. Note: overlap2 cannot be an immediate! */
1626 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1627 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1628 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1632 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1633 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1635 else if (overlap0
== (Imm16
| Imm32
))
1638 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1642 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1646 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1647 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1648 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1652 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1653 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1655 else if (overlap1
== (Imm16
| Imm32
))
1658 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1662 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1666 assert ((overlap2
& Imm
) == 0);
1668 i
.types
[0] = overlap0
;
1669 if (overlap0
& ImplicitRegister
)
1671 if (overlap0
& Imm1
)
1672 i
.imm_operands
= 0; /* kludge for shift insns */
1674 i
.types
[1] = overlap1
;
1675 if (overlap1
& ImplicitRegister
)
1678 i
.types
[2] = overlap2
;
1679 if (overlap2
& ImplicitRegister
)
1682 /* Finalize opcode. First, we change the opcode based on the operand
1683 size given by i.suffix: We need not change things for byte insns. */
1685 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1687 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1691 /* For movzx and movsx, need to check the register type */
1693 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1694 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1696 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1698 if ((i
.regs
[1]->reg_type
& Reg16
) != 0)
1699 if (!add_prefix (prefix
))
1703 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1705 /* It's not a byte, select word/dword operation. */
1706 if (i
.tm
.opcode_modifier
& W
)
1708 if (i
.tm
.opcode_modifier
& ShortForm
)
1709 i
.tm
.base_opcode
|= 8;
1711 i
.tm
.base_opcode
|= 1;
1713 /* Now select between word & dword operations via the operand
1714 size prefix, except for instructions that will ignore this
1716 if (((intel_syntax
&& (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1717 || i
.suffix
== DWORD_MNEM_SUFFIX
1718 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1719 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1721 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1722 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1723 prefix
= ADDR_PREFIX_OPCODE
;
1725 if (! add_prefix (prefix
))
1728 /* Size floating point instruction. */
1729 if (i
.suffix
== LONG_MNEM_SUFFIX
1730 || (intel_syntax
&& i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1732 if (i
.tm
.opcode_modifier
& FloatMF
)
1733 i
.tm
.base_opcode
^= 4;
1736 if (intel_syntax
&& i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
)
1738 if (i
.tm
.opcode_modifier
& FloatMF
)
1739 i
.tm
.base_opcode
^= 2;
1743 if (i
.tm
.base_opcode
== AMD_3DNOW_OPCODE
)
1745 /* These AMD specific instructions have an opcode suffix which
1746 is coded in the same place as an 8-bit immediate field
1747 would be. Here we fake an 8-bit immediate operand from the
1748 opcode suffix stored in tm.extension_opcode. */
1752 assert(i
.imm_operands
== 0 && i
.operands
<= 2);
1754 exp
= &im_expressions
[i
.imm_operands
++];
1755 i
.imms
[i
.operands
] = exp
;
1756 i
.types
[i
.operands
++] = Imm8
;
1757 exp
->X_op
= O_constant
;
1758 exp
->X_add_number
= i
.tm
.extension_opcode
;
1759 i
.tm
.extension_opcode
= None
;
1762 /* For insns with operands there are more diddles to do to the opcode. */
1765 /* Default segment register this instruction will use
1766 for memory accesses. 0 means unknown.
1767 This is only for optimizing out unnecessary segment overrides. */
1768 const seg_entry
*default_seg
= 0;
1770 /* If we found a reverse match we must alter the opcode
1771 direction bit. found_reverse_match holds bits to change
1772 (different for int & float insns). */
1774 i
.tm
.base_opcode
^= found_reverse_match
;
1776 /* The imul $imm, %reg instruction is converted into
1777 imul $imm, %reg, %reg, and the clr %reg instruction
1778 is converted into xor %reg, %reg. */
1779 if (i
.tm
.opcode_modifier
& regKludge
)
1781 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1782 /* Pretend we saw the extra register operand. */
1783 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1787 if (i
.tm
.opcode_modifier
& ShortForm
)
1789 /* The register or float register operand is in operand 0 or 1. */
1790 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1791 /* Register goes in low 3 bits of opcode. */
1792 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1793 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1795 /* Warn about some common errors, but press on regardless.
1796 The first case can be generated by gcc (<= 2.8.1). */
1797 if (i
.operands
== 2)
1799 /* reversed arguments on faddp, fsubp, etc. */
1800 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1801 i
.regs
[1]->reg_name
,
1802 i
.regs
[0]->reg_name
);
1806 /* extraneous `l' suffix on fp insn */
1807 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1808 i
.regs
[0]->reg_name
);
1812 else if (i
.tm
.opcode_modifier
& Modrm
)
1814 /* The opcode is completed (modulo i.tm.extension_opcode which
1815 must be put into the modrm byte).
1816 Now, we make the modrm & index base bytes based on all the
1817 info we've collected. */
1819 /* i.reg_operands MUST be the number of real register operands;
1820 implicit registers do not count. */
1821 if (i
.reg_operands
== 2)
1823 unsigned int source
, dest
;
1824 source
= ((i
.types
[0]
1835 /* Certain instructions expect the destination to be
1836 in the i.rm.reg field. This is by far the
1837 exceptional case. For these instructions, if the
1838 source operand is a register, we must reverse the
1839 i.rm.reg and i.rm.regmem fields. We accomplish
1840 this by pretending that the two register operands
1841 were given in the reverse order. */
1842 if (i
.tm
.opcode_modifier
& ReverseRegRegmem
)
1844 const reg_entry
*tmp
= i
.regs
[source
];
1845 i
.regs
[source
] = i
.regs
[dest
];
1850 /* We must be careful to make sure that all
1851 segment/control/test/debug/MMX registers go into
1852 the i.rm.reg field (despite whether they are
1853 source or destination operands). */
1854 if (i
.regs
[dest
]->reg_type
1855 & (SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
1857 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1858 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1862 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1863 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1867 { /* if it's not 2 reg operands... */
1870 unsigned int fake_zero_displacement
= 0;
1871 unsigned int op
= ((i
.types
[0] & AnyMem
)
1873 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1880 if (! i
.disp_operands
)
1881 fake_zero_displacement
= 1;
1884 /* Operand is just <disp> */
1885 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1887 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1888 i
.types
[op
] &= ~Disp
;
1889 i
.types
[op
] |= Disp16
;
1893 i
.rm
.regmem
= NO_BASE_REGISTER
;
1894 i
.types
[op
] &= ~Disp
;
1895 i
.types
[op
] |= Disp32
;
1898 else /* ! i.base_reg && i.index_reg */
1900 i
.sib
.index
= i
.index_reg
->reg_num
;
1901 i
.sib
.base
= NO_BASE_REGISTER
;
1902 i
.sib
.scale
= i
.log2_scale_factor
;
1903 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1904 i
.types
[op
] &= ~Disp
;
1905 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1908 else if (i
.base_reg
->reg_type
& Reg16
)
1910 switch (i
.base_reg
->reg_num
)
1915 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1916 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1923 if ((i
.types
[op
] & Disp
) == 0)
1925 /* fake (%bp) into 0(%bp) */
1926 i
.types
[op
] |= Disp8
;
1927 fake_zero_displacement
= 1;
1930 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1931 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1933 default: /* (%si) -> 4 or (%di) -> 5 */
1934 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1936 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1938 else /* i.base_reg and 32 bit mode */
1940 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1941 i
.sib
.base
= i
.base_reg
->reg_num
;
1942 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1945 if (i
.disp_operands
== 0)
1947 fake_zero_displacement
= 1;
1948 i
.types
[op
] |= Disp8
;
1951 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1955 i
.sib
.scale
= i
.log2_scale_factor
;
1958 /* <disp>(%esp) becomes two byte modrm
1959 with no index register. We've already
1960 stored the code for esp in i.rm.regmem
1961 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1962 base register besides %esp will not use
1963 the extra modrm byte. */
1964 i
.sib
.index
= NO_INDEX_REGISTER
;
1965 #if ! SCALE1_WHEN_NO_INDEX
1966 /* Another case where we force the second
1968 if (i
.log2_scale_factor
)
1969 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1974 i
.sib
.index
= i
.index_reg
->reg_num
;
1975 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1977 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1980 if (fake_zero_displacement
)
1982 /* Fakes a zero displacement assuming that i.types[op]
1983 holds the correct displacement size. */
1984 exp
= &disp_expressions
[i
.disp_operands
++];
1986 exp
->X_op
= O_constant
;
1987 exp
->X_add_number
= 0;
1988 exp
->X_add_symbol
= (symbolS
*) 0;
1989 exp
->X_op_symbol
= (symbolS
*) 0;
1993 /* Fill in i.rm.reg or i.rm.regmem field with register
1994 operand (if any) based on i.tm.extension_opcode.
1995 Again, we must be careful to make sure that
1996 segment/control/debug/test/MMX registers are coded
1997 into the i.rm.reg field. */
2002 & (Reg
| SReg2
| SReg3
| Control
| Debug
2006 & (Reg
| SReg2
| SReg3
| Control
| Debug
2010 /* If there is an extension opcode to put here, the
2011 register number must be put into the regmem field. */
2012 if (i
.tm
.extension_opcode
!= None
)
2013 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
2015 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
2017 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
2018 we must set it to 3 to indicate this is a register
2019 operand in the regmem field. */
2020 if (!i
.mem_operands
)
2024 /* Fill in i.rm.reg field with extension opcode (if any). */
2025 if (i
.tm
.extension_opcode
!= None
)
2026 i
.rm
.reg
= i
.tm
.extension_opcode
;
2029 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
2031 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
2033 as_bad (_("you can't `pop %%cs'"));
2036 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
2038 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2042 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2044 /* For the string instructions that allow a segment override
2045 on one of their operands, the default segment is ds. */
2049 /* If a segment was explicitly specified,
2050 and the specified segment is not the default,
2051 use an opcode prefix to select it.
2052 If we never figured out what the default segment is,
2053 then default_seg will be zero at this point,
2054 and the specified segment prefix will always be used. */
2055 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2057 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2061 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2063 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */
2064 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2068 /* Handle conversion of 'int $3' --> special int3 insn. */
2069 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
2071 i
.tm
.base_opcode
= INT3_OPCODE
;
2075 /* We are ready to output the insn. */
2080 if (i
.tm
.opcode_modifier
& Jump
)
2082 long n
= (long) i
.disps
[0]->X_add_number
;
2083 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
2091 if (flag_16bit_code
)
2094 if (!intel_syntax
&& (i
.prefixes
!= 0))
2095 as_warn (_("skipping prefixes on this instruction"));
2097 if (i
.disps
[0]->X_op
== O_constant
)
2099 if (fits_in_signed_byte (n
))
2103 p
[0] = i
.tm
.base_opcode
;
2108 /* Use 16-bit jumps only for 16-bit code,
2109 because text segments are limited to 64K anyway;
2110 Use 32-bit jumps for 32-bit code, because they're faster,
2111 and a 16-bit jump will clear the top 16 bits of %eip. */
2112 int jmp_size
= code16
? 2 : 4;
2113 if (code16
&& !fits_in_signed_word (n
))
2115 as_bad (_("16-bit jump out of range"));
2119 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
2121 /* unconditional jump */
2122 insn_size
+= prefix
+ 1 + jmp_size
;
2123 p
= frag_more (prefix
+ 1 + jmp_size
);
2125 *p
++ = DATA_PREFIX_OPCODE
;
2127 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2131 /* conditional jump */
2132 insn_size
+= prefix
+ 2 + jmp_size
;
2133 p
= frag_more (prefix
+ 2 + jmp_size
);
2135 *p
++ = DATA_PREFIX_OPCODE
;
2136 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
2137 *p
++ = i
.tm
.base_opcode
+ 0x10;
2138 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2144 int size
= code16
? 2 : 4;
2146 /* It's a symbol; end frag & setup for relax.
2147 Make sure there are more than 6 chars left in the current frag;
2148 if not we'll have to start a new one. */
2149 frag_grow (prefix
+ 1 + 2 + size
);
2150 insn_size
+= 1 + prefix
;
2151 p
= frag_more (1 + prefix
);
2153 *p
++ = DATA_PREFIX_OPCODE
;
2154 *p
= i
.tm
.base_opcode
;
2155 frag_var (rs_machine_dependent
,
2156 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
2158 ((unsigned char) *p
== JUMP_PC_RELATIVE
2159 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2160 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2161 i
.disps
[0]->X_add_symbol
,
2165 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2167 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
2168 long n
= (long) i
.disps
[0]->X_add_number
;
2170 if (size
== 1) /* then this is a loop or jecxz type instruction */
2172 if (i
.prefix
[ADDR_PREFIX
])
2175 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2183 if (i
.prefix
[DATA_PREFIX
])
2186 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2190 if (flag_16bit_code
)
2197 if (!intel_syntax
&& (i
.prefixes
!= 0))
2198 as_warn (_("skipping prefixes on this instruction"));
2200 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2202 insn_size
+= 1 + size
;
2203 p
= frag_more (1 + size
);
2207 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
2208 p
= frag_more (2 + size
);
2209 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2211 *p
++ = i
.tm
.base_opcode
& 0xff;
2213 if (i
.disps
[0]->X_op
== O_constant
)
2215 if (size
== 1 && !fits_in_signed_byte (n
))
2217 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
2220 else if (size
== 2 && !fits_in_signed_word (n
))
2222 as_bad (_("16-bit jump out of range"));
2225 md_number_to_chars (p
, (valueT
) n
, size
);
2229 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2230 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
2234 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2238 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
2246 if (flag_16bit_code
)
2250 reloc_type
= BFD_RELOC_32
;
2254 reloc_type
= BFD_RELOC_16
;
2257 if (!intel_syntax
&& (i
.prefixes
!= 0))
2258 as_warn (_("skipping prefixes on this instruction"));
2260 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2261 p
= frag_more (prefix
+ 1 + 2 + size
);
2263 *p
++ = DATA_PREFIX_OPCODE
;
2264 *p
++ = i
.tm
.base_opcode
;
2265 if (i
.imms
[1]->X_op
== O_constant
)
2267 long n
= (long) i
.imms
[1]->X_add_number
;
2269 if (size
== 2 && !fits_in_unsigned_word (n
))
2271 as_bad (_("16-bit jump out of range"));
2274 md_number_to_chars (p
, (valueT
) n
, size
);
2277 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2278 i
.imms
[1], 0, reloc_type
);
2279 if (i
.imms
[0]->X_op
!= O_constant
)
2280 as_bad (_("can't handle non absolute segment in `%s'"),
2282 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2286 /* Output normal instructions here. */
2289 /* The prefix bytes. */
2291 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2298 md_number_to_chars (p
, (valueT
) *q
, 1);
2302 /* Now the opcode; be careful about word order here! */
2303 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2306 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2308 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2312 /* put out high byte first: can't use md_number_to_chars! */
2313 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2314 *p
= i
.tm
.base_opcode
& 0xff;
2317 { /* opcode is either 3 or 4 bytes */
2318 if (i
.tm
.base_opcode
& 0xff000000)
2322 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2329 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2330 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2331 *p
= (i
.tm
.base_opcode
) & 0xff;
2334 /* Now the modrm byte and sib byte (if present). */
2335 if (i
.tm
.opcode_modifier
& Modrm
)
2339 md_number_to_chars (p
,
2340 (valueT
) (i
.rm
.regmem
<< 0
2344 /* If i.rm.regmem == ESP (4)
2345 && i.rm.mode != (Register mode)
2347 ==> need second modrm byte. */
2348 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2350 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2354 md_number_to_chars (p
,
2355 (valueT
) (i
.sib
.base
<< 0
2357 | i
.sib
.scale
<< 6),
2362 if (i
.disp_operands
)
2364 register unsigned int n
;
2366 for (n
= 0; n
< i
.operands
; n
++)
2370 if (i
.disps
[n
]->X_op
== O_constant
)
2372 if (i
.types
[n
] & Disp8
)
2376 md_number_to_chars (p
,
2377 (valueT
) i
.disps
[n
]->X_add_number
,
2380 else if (i
.types
[n
] & Disp16
)
2384 md_number_to_chars (p
,
2385 (valueT
) i
.disps
[n
]->X_add_number
,
2392 md_number_to_chars (p
,
2393 (valueT
) i
.disps
[n
]->X_add_number
,
2397 else if (i
.types
[n
] & Disp32
)
2401 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2403 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2406 { /* must be Disp16 */
2409 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2411 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2415 } /* end displacement output */
2417 /* output immediate */
2420 register unsigned int n
;
2422 for (n
= 0; n
< i
.operands
; n
++)
2426 if (i
.imms
[n
]->X_op
== O_constant
)
2428 if (i
.types
[n
] & (Imm8
| Imm8S
))
2432 md_number_to_chars (p
,
2433 (valueT
) i
.imms
[n
]->X_add_number
,
2436 else if (i
.types
[n
] & Imm16
)
2440 md_number_to_chars (p
,
2441 (valueT
) i
.imms
[n
]->X_add_number
,
2448 md_number_to_chars (p
,
2449 (valueT
) i
.imms
[n
]->X_add_number
,
2454 { /* not absolute_section */
2455 /* Need a 32-bit fixup (don't support 8bit
2456 non-absolute ims). Try to support other
2462 if (i
.types
[n
] & (Imm8
| Imm8S
))
2464 else if (i
.types
[n
] & Imm16
)
2469 p
= frag_more (size
);
2470 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2471 #ifdef BFD_ASSEMBLER
2472 if (r_type
== BFD_RELOC_32
2474 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2475 && (i
.imms
[n
]->X_op
== O_symbol
2476 || (i
.imms
[n
]->X_op
== O_add
2477 && (i
.imms
[n
]->X_op_symbol
->sy_value
.X_op
2480 r_type
= BFD_RELOC_386_GOTPC
;
2481 i
.imms
[n
]->X_add_number
+= 3;
2484 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2485 i
.imms
[n
], pcrel
, r_type
);
2489 } /* end immediate output */
2497 #endif /* DEBUG386 */
2501 static int i386_is_reg
PARAMS ((char *));
2504 i386_is_reg (reg_string
)
2507 register char *s
= reg_string
;
2509 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
2511 if (is_space_char (*s
))
2515 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
2516 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2519 if (!hash_find (reg_hash
, reg_name_given
))
2525 static int i386_immediate
PARAMS ((char *));
2528 i386_immediate (imm_start
)
2531 char *save_input_line_pointer
;
2535 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2537 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2541 exp
= &im_expressions
[i
.imm_operands
++];
2542 i
.imms
[this_operand
] = exp
;
2544 if (is_space_char (*imm_start
))
2547 save_input_line_pointer
= input_line_pointer
;
2548 input_line_pointer
= imm_start
;
2553 * We can have operands of the form
2554 * <symbol>@GOTOFF+<nnn>
2555 * Take the easy way out here and copy everything
2556 * into a temporary buffer...
2560 cp
= strchr (input_line_pointer
, '@');
2566 /* GOT relocations are not supported in 16 bit mode */
2567 if (flag_16bit_code
)
2568 as_bad (_("GOT relocations not supported in 16 bit mode"));
2570 if (GOT_symbol
== NULL
)
2571 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2573 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2575 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2578 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2580 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2583 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2585 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2589 as_bad (_("Bad reloc specifier in expression"));
2591 /* Replace the relocation token with ' ', so that errors like
2592 foo@GOTOFF1 will be detected. */
2593 first
= cp
- input_line_pointer
;
2594 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2595 memcpy (tmpbuf
, input_line_pointer
, first
);
2596 tmpbuf
[first
] = ' ';
2597 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2598 input_line_pointer
= tmpbuf
;
2603 exp_seg
= expression (exp
);
2605 if (*input_line_pointer
)
2606 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2608 input_line_pointer
= save_input_line_pointer
;
2610 if (exp
->X_op
== O_absent
)
2612 /* missing or bad expr becomes absolute 0 */
2613 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2615 exp
->X_op
= O_constant
;
2616 exp
->X_add_number
= 0;
2617 exp
->X_add_symbol
= (symbolS
*) 0;
2618 exp
->X_op_symbol
= (symbolS
*) 0;
2619 i
.types
[this_operand
] |= Imm
;
2621 else if (exp
->X_op
== O_constant
)
2623 i
.types
[this_operand
] |=
2624 smallest_imm_type ((long) exp
->X_add_number
);
2626 /* If a suffix is given, this operand may be shortended. */
2629 case WORD_MNEM_SUFFIX
:
2630 i
.types
[this_operand
] |= Imm16
;
2632 case BYTE_MNEM_SUFFIX
:
2633 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2638 else if (exp_seg
!= text_section
2639 && exp_seg
!= data_section
2640 && exp_seg
!= bss_section
2641 && exp_seg
!= undefined_section
2642 #ifdef BFD_ASSEMBLER
2643 && !bfd_is_com_section (exp_seg
)
2648 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2654 /* This is an address. The size of the address will be
2655 determined later, depending on destination register,
2656 suffix, or the default for the section. We exclude
2657 Imm8S here so that `push $foo' and other instructions
2658 with an Imm8S form will use Imm16 or Imm32. */
2659 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2665 static int i386_scale
PARAMS ((char *));
2671 if (!isdigit (*scale
))
2678 i
.log2_scale_factor
= 0;
2681 i
.log2_scale_factor
= 1;
2684 i
.log2_scale_factor
= 2;
2687 i
.log2_scale_factor
= 3;
2691 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2695 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2697 as_warn (_("scale factor of %d without an index register"),
2698 1 << i
.log2_scale_factor
);
2699 #if SCALE1_WHEN_NO_INDEX
2700 i
.log2_scale_factor
= 0;
2706 static int i386_displacement
PARAMS ((char *, char *));
2709 i386_displacement (disp_start
, disp_end
)
2713 register expressionS
*exp
;
2715 char *save_input_line_pointer
;
2716 int bigdisp
= Disp32
;
2718 /* All of the pieces of the displacement expression are handled together. */
2719 if (intel_syntax
&& i
.disp_operands
!= 0)
2722 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2724 i
.types
[this_operand
] |= bigdisp
;
2726 exp
= &disp_expressions
[i
.disp_operands
];
2727 i
.disps
[this_operand
] = exp
;
2728 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2730 save_input_line_pointer
= input_line_pointer
;
2731 input_line_pointer
= disp_start
;
2732 END_STRING_AND_SAVE (disp_end
);
2734 #ifndef GCC_ASM_O_HACK
2735 #define GCC_ASM_O_HACK 0
2738 END_STRING_AND_SAVE (disp_end
+ 1);
2739 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2740 && displacement_string_end
[-1] == '+')
2742 /* This hack is to avoid a warning when using the "o"
2743 constraint within gcc asm statements.
2746 #define _set_tssldt_desc(n,addr,limit,type) \
2747 __asm__ __volatile__ ( \
2749 "movw %w1,2+%0\n\t" \
2751 "movb %b1,4+%0\n\t" \
2752 "movb %4,5+%0\n\t" \
2753 "movb $0,6+%0\n\t" \
2754 "movb %h1,7+%0\n\t" \
2756 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2758 This works great except that the output assembler ends
2759 up looking a bit weird if it turns out that there is
2760 no offset. You end up producing code that looks like:
2773 So here we provide the missing zero.
2776 *displacement_string_end
= '0';
2782 * We can have operands of the form
2783 * <symbol>@GOTOFF+<nnn>
2784 * Take the easy way out here and copy everything
2785 * into a temporary buffer...
2789 cp
= strchr (input_line_pointer
, '@');
2795 /* GOT relocations are not supported in 16 bit mode */
2796 if (flag_16bit_code
)
2797 as_bad (_("GOT relocations not supported in 16 bit mode"));
2799 if (GOT_symbol
== NULL
)
2800 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2802 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2804 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2807 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2809 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2812 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2814 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2818 as_bad (_("Bad reloc specifier in expression"));
2820 /* Replace the relocation token with ' ', so that errors like
2821 foo@GOTOFF1 will be detected. */
2822 first
= cp
- input_line_pointer
;
2823 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2824 memcpy (tmpbuf
, input_line_pointer
, first
);
2825 tmpbuf
[first
] = ' ';
2826 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2827 input_line_pointer
= tmpbuf
;
2832 exp_seg
= expression (exp
);
2834 #ifdef BFD_ASSEMBLER
2835 /* We do this to make sure that the section symbol is in
2836 the symbol table. We will ultimately change the relocation
2837 to be relative to the beginning of the section */
2838 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2840 if (S_IS_LOCAL(exp
->X_add_symbol
)
2841 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2842 section_symbol(exp
->X_add_symbol
->bsym
->section
);
2843 assert (exp
->X_op
== O_symbol
);
2844 exp
->X_op
= O_subtract
;
2845 exp
->X_op_symbol
= GOT_symbol
;
2846 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2850 if (*input_line_pointer
)
2851 as_bad (_("Ignoring junk `%s' after expression"),
2852 input_line_pointer
);
2854 RESTORE_END_STRING (disp_end
+ 1);
2856 RESTORE_END_STRING (disp_end
);
2857 input_line_pointer
= save_input_line_pointer
;
2859 if (exp
->X_op
== O_constant
)
2861 if (fits_in_signed_byte (exp
->X_add_number
))
2862 i
.types
[this_operand
] |= Disp8
;
2865 else if (exp_seg
!= text_section
2866 && exp_seg
!= data_section
2867 && exp_seg
!= bss_section
2868 && exp_seg
!= undefined_section
)
2870 as_bad (_ ("Unimplemented segment type %d in operand"), exp_seg
);
2877 static int i386_operand_modifier
PARAMS ((char **, int));
2880 i386_operand_modifier (op_string
, got_a_float
)
2884 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2886 i
.suffix
= BYTE_MNEM_SUFFIX
;
2891 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2893 i
.suffix
= WORD_MNEM_SUFFIX
;
2898 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2901 i
.suffix
= SHORT_MNEM_SUFFIX
;
2903 i
.suffix
= DWORD_MNEM_SUFFIX
;
2908 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2910 i
.suffix
= INTEL_DWORD_MNEM_SUFFIX
;
2915 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2917 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2922 else if (!strncasecmp (*op_string
, "SHORT", 5))
2928 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2934 else if (!strncasecmp (*op_string
, "FLAT", 4))
2940 else return NONE_FOUND
;
2943 static char * build_displacement_string
PARAMS ((int, char *));
2946 build_displacement_string (initial_disp
, op_string
)
2950 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2951 char *end_of_operand_string
;
2955 temp_string
[0] = '\0';
2956 tc
= end_of_operand_string
= strchr (op_string
, '[');
2957 if ( initial_disp
&& !end_of_operand_string
)
2959 strcpy (temp_string
, op_string
);
2960 return (temp_string
);
2963 /* Build the whole displacement string */
2966 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2967 temp_string
[end_of_operand_string
- op_string
] = '\0';
2971 temp_disp
= op_string
;
2973 while (*temp_disp
!= '\0')
2975 int add_minus
= (*temp_disp
== '-');
2977 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2980 if (is_space_char (*temp_disp
))
2983 /* Don't consider registers */
2984 if (*temp_disp
!= REGISTER_PREFIX
2985 && !(allow_naked_reg
&& i386_is_reg (temp_disp
)))
2987 char *string_start
= temp_disp
;
2989 while (*temp_disp
!= ']'
2990 && *temp_disp
!= '+'
2991 && *temp_disp
!= '-'
2992 && *temp_disp
!= '*')
2996 strcat (temp_string
, "-");
2998 strcat (temp_string
, "+");
3000 strncat (temp_string
, string_start
, temp_disp
- string_start
);
3001 if (*temp_disp
== '+' || *temp_disp
== '-')
3005 while (*temp_disp
!= '\0'
3006 && *temp_disp
!= '+'
3007 && *temp_disp
!= '-')
3014 static int i386_parse_seg
PARAMS ((char *));
3017 i386_parse_seg (op_string
)
3020 if (is_space_char (*op_string
))
3023 /* Should be one of es, cs, ss, ds fs or gs */
3024 switch (*op_string
++)
3027 i
.seg
[i
.mem_operands
] = &es
;
3030 i
.seg
[i
.mem_operands
] = &cs
;
3033 i
.seg
[i
.mem_operands
] = &ss
;
3036 i
.seg
[i
.mem_operands
] = &ds
;
3039 i
.seg
[i
.mem_operands
] = &fs
;
3042 i
.seg
[i
.mem_operands
] = &gs
;
3045 as_bad (_("bad segment name `%s'"), op_string
);
3049 if (*op_string
++ != 's')
3051 as_bad (_("bad segment name `%s'"), op_string
);
3055 if (is_space_char (*op_string
))
3058 if (*op_string
!= ':')
3060 as_bad (_("bad segment name `%s'"), op_string
);
3068 static int i386_intel_memory_operand
PARAMS ((char *));
3071 i386_intel_memory_operand (op_string
)
3075 char *end_of_operand_string
;
3077 if (is_digit_char (*op_string
)
3078 && strchr (op_string
, '[') == 0)
3080 if (!i386_immediate (op_string
))
3086 /* Look for displacement preceding open bracket */
3087 if (*op_string
!= '[')
3092 end_seg
= strchr (op_string
, ':');
3095 if (!i386_parse_seg (op_string
))
3097 op_string
= end_seg
+ 1;
3100 temp_string
= build_displacement_string (true, op_string
);
3101 if (!i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3104 end_of_operand_string
= strchr (op_string
, '[');
3105 if (!end_of_operand_string
)
3106 end_of_operand_string
= op_string
+ strlen (op_string
);
3108 if (is_space_char (*end_of_operand_string
))
3109 --end_of_operand_string
;
3111 op_string
= end_of_operand_string
;
3114 if (*op_string
== '[')
3118 /* Pick off each component and figure out where it belongs */
3120 end_of_operand_string
= op_string
;
3122 while (*op_string
!= ']')
3125 while (*end_of_operand_string
!= '+'
3126 && *end_of_operand_string
!= '-'
3127 && *end_of_operand_string
!= '*'
3128 && *end_of_operand_string
!= ']')
3129 end_of_operand_string
++;
3131 if (*op_string
== '+')
3133 char *temp_string
= op_string
+ 1;
3134 if (is_space_char (*temp_string
))
3136 if (*temp_string
== REGISTER_PREFIX
3137 || (allow_naked_reg
&& i386_is_reg (temp_string
)))
3141 if (*op_string
== REGISTER_PREFIX
3142 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3144 const reg_entry
*temp_reg
;
3147 END_STRING_AND_SAVE (end_of_operand_string
);
3148 temp_reg
= parse_register (op_string
, &end_op
);
3149 RESTORE_END_STRING (end_of_operand_string
);
3151 if (temp_reg
== NULL
)
3154 if (i
.base_reg
== NULL
)
3155 i
.base_reg
= temp_reg
;
3157 i
.index_reg
= temp_reg
;
3159 i
.types
[this_operand
] |= BaseIndex
;
3162 else if (is_digit_char (*op_string
) || *op_string
== '+' || *op_string
== '-')
3165 char *temp_string
= build_displacement_string (false, op_string
);
3167 if (*temp_string
== '+')
3170 if (!i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3174 end_of_operand_string
= op_string
;
3175 while (*end_of_operand_string
!= ']'
3176 && *end_of_operand_string
!= '+'
3177 && *end_of_operand_string
!= '-'
3178 && *end_of_operand_string
!= '*')
3179 ++end_of_operand_string
;
3181 else if (*op_string
== '*')
3185 if (i
.base_reg
&& !i
.index_reg
)
3187 i
.index_reg
= i
.base_reg
;
3191 if (!i386_scale (op_string
))
3194 op_string
= end_of_operand_string
;
3195 ++end_of_operand_string
;
3202 static int i386_intel_operand
PARAMS ((char *, int));
3205 i386_intel_operand (operand_string
, got_a_float
)
3206 char *operand_string
;
3209 char *op_string
= operand_string
;
3211 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3212 if (is_space_char (*op_string
))
3215 switch (operand_modifier
)
3222 if ((i
.mem_operands
== 1
3223 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3224 || i
.mem_operands
== 2)
3226 as_bad (_("too many memory references for `%s'"),
3227 current_templates
->start
->name
);
3231 if (!i386_intel_memory_operand (op_string
))
3240 if (!i386_immediate (op_string
))
3247 /* Should be register or immediate */
3248 if (is_digit_char (*op_string
)
3249 && strchr (op_string
, '[') == 0)
3251 if (!i386_immediate (op_string
))
3254 else if (*op_string
== REGISTER_PREFIX
3256 && i386_is_reg (op_string
)))
3259 register const reg_entry
* r
;
3262 r
= parse_register (op_string
, &end_op
);
3266 /* Check for a segment override by searching for ':' after a
3267 segment register. */
3269 if (is_space_char (*op_string
))
3271 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3276 i
.seg
[i
.mem_operands
] = &es
;
3279 i
.seg
[i
.mem_operands
] = &cs
;
3282 i
.seg
[i
.mem_operands
] = &ss
;
3285 i
.seg
[i
.mem_operands
] = &ds
;
3288 i
.seg
[i
.mem_operands
] = &fs
;
3291 i
.seg
[i
.mem_operands
] = &gs
;
3296 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3297 i
.regs
[this_operand
] = r
;
3304 if (!i386_intel_memory_operand (op_string
))
3312 /* Special case for (%dx) while doing input/output op. */
3314 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3316 && i
.log2_scale_factor
== 0
3317 && i
.seg
[i
.mem_operands
] == 0
3318 && (i
.types
[this_operand
] & Disp
) == 0)
3320 i
.types
[this_operand
] = InOutPortReg
;
3323 /* Make sure the memory operand we've been dealt is valid. */
3324 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
3327 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3328 != (Reg16
|BaseIndex
)))
3330 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3331 != (Reg16
|BaseIndex
))
3333 && i
.base_reg
->reg_num
< 6
3334 && i
.index_reg
->reg_num
>= 6
3335 && i
.log2_scale_factor
== 0))))
3337 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3338 operand_string
, "16");
3345 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3347 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3348 != (Reg32
|BaseIndex
))))
3350 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3351 operand_string
, "32");
3358 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3361 static int i386_operand
PARAMS ((char *));
3364 i386_operand (operand_string
)
3365 char *operand_string
;
3367 char *op_string
= operand_string
;
3369 if (is_space_char (*op_string
))
3372 /* We check for an absolute prefix (differentiating,
3373 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3374 if (*op_string
== ABSOLUTE_PREFIX
)
3377 if (is_space_char (*op_string
))
3379 i
.types
[this_operand
] |= JumpAbsolute
;
3382 /* Check if operand is a register. */
3383 if (*op_string
== REGISTER_PREFIX
3384 || (allow_naked_reg
&& i386_is_reg (op_string
)))
3386 register const reg_entry
*r
;
3389 r
= parse_register (op_string
, &end_op
);
3393 /* Check for a segment override by searching for ':' after a
3394 segment register. */
3396 if (is_space_char (*op_string
))
3398 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3403 i
.seg
[i
.mem_operands
] = &es
;
3406 i
.seg
[i
.mem_operands
] = &cs
;
3409 i
.seg
[i
.mem_operands
] = &ss
;
3412 i
.seg
[i
.mem_operands
] = &ds
;
3415 i
.seg
[i
.mem_operands
] = &fs
;
3418 i
.seg
[i
.mem_operands
] = &gs
;
3422 /* Skip the ':' and whitespace. */
3424 if (is_space_char (*op_string
))
3427 /* Pretend given string starts here. */
3428 operand_string
= op_string
;
3429 if (!is_digit_char (*op_string
)
3430 && !is_identifier_char (*op_string
)
3431 && *op_string
!= '('
3432 && *op_string
!= ABSOLUTE_PREFIX
)
3434 as_bad (_("bad memory operand `%s'"), op_string
);
3437 /* Handle case of %es:*foo. */
3438 if (*op_string
== ABSOLUTE_PREFIX
)
3441 if (is_space_char (*op_string
))
3443 i
.types
[this_operand
] |= JumpAbsolute
;
3445 goto do_memory_reference
;
3449 as_bad (_("Junk `%s' after register"), op_string
);
3452 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3453 i
.regs
[this_operand
] = r
;
3456 else if (*op_string
== IMMEDIATE_PREFIX
)
3457 { /* ... or an immediate */
3459 if (!i386_immediate (op_string
))
3462 else if (is_digit_char (*op_string
)
3463 || is_identifier_char (*op_string
)
3464 || *op_string
== '(' )
3466 /* This is a memory reference of some sort. */
3467 char *end_of_operand_string
;
3468 register char *base_string
;
3469 int found_base_index_form
;
3471 /* Start and end of displacement string expression (if found). */
3472 char *displacement_string_start
;
3473 char *displacement_string_end
;
3475 do_memory_reference
:
3477 if ((i
.mem_operands
== 1
3478 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3479 || i
.mem_operands
== 2)
3481 as_bad (_("too many memory references for `%s'"),
3482 current_templates
->start
->name
);
3486 /* Check for base index form. We detect the base index form by
3487 looking for an ')' at the end of the operand, searching
3488 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3490 found_base_index_form
= 0;
3491 end_of_operand_string
= op_string
+ strlen (op_string
);
3493 --end_of_operand_string
;
3494 if (is_space_char (*end_of_operand_string
))
3495 --end_of_operand_string
;
3497 base_string
= end_of_operand_string
;
3499 if (*base_string
== ')')
3501 unsigned int parens_balanced
= 1;
3502 /* We've already checked that the number of left & right ()'s are
3503 equal, so this loop will not be infinite. */
3507 if (*base_string
== ')')
3509 if (*base_string
== '(')
3512 while (parens_balanced
);
3514 /* If there is a displacement set-up for it to be parsed later. */
3515 displacement_string_start
= op_string
;
3516 displacement_string_end
= base_string
;
3518 /* Skip past '(' and whitespace. */
3520 if (is_space_char (*base_string
))
3523 if (*base_string
== REGISTER_PREFIX
3524 || (allow_naked_reg
&& i386_is_reg (base_string
))
3525 || *base_string
== ',')
3526 found_base_index_form
= 1;
3529 /* If we can't parse a base index register expression, we've found
3530 a pure displacement expression. We set up displacement_string_start
3531 and displacement_string_end for the code below. */
3532 if (!found_base_index_form
)
3534 displacement_string_start
= op_string
;
3535 displacement_string_end
= end_of_operand_string
+ 1;
3539 i
.types
[this_operand
] |= BaseIndex
;
3541 /* Find base register (if any). */
3542 if (*base_string
!= ',')
3546 /* Trim off the closing ')' so that parse_register won't
3548 END_STRING_AND_SAVE (end_of_operand_string
);
3549 i
.base_reg
= parse_register (base_string
, &end_op
);
3550 RESTORE_END_STRING (end_of_operand_string
);
3552 if (i
.base_reg
== NULL
)
3555 base_string
= end_op
;
3556 if (is_space_char (*base_string
))
3560 /* There may be an index reg or scale factor here. */
3561 if (*base_string
== ',')
3564 if (is_space_char (*base_string
))
3567 if (*base_string
== REGISTER_PREFIX
3568 || (allow_naked_reg
&& i386_is_reg (base_string
)))
3572 END_STRING_AND_SAVE (end_of_operand_string
);
3573 i
.index_reg
= parse_register (base_string
, &end_op
);
3574 RESTORE_END_STRING (end_of_operand_string
);
3576 if (i
.index_reg
== NULL
)
3579 base_string
= end_op
;
3580 if (is_space_char (*base_string
))
3582 if (*base_string
== ',')
3585 if (is_space_char (*base_string
))
3588 else if (*base_string
!= ')' )
3590 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3596 /* Check for scale factor. */
3597 if (isdigit ((unsigned char) *base_string
))
3599 if (!i386_scale (base_string
))
3603 if (is_space_char (*base_string
))
3605 if (*base_string
!= ')')
3607 as_bad (_("expecting `)' after scale factor in `%s'"),
3612 else if (!i
.index_reg
)
3614 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3619 else if (*base_string
!= ')')
3621 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3627 /* If there's an expression beginning the operand, parse it,
3628 assuming displacement_string_start and
3629 displacement_string_end are meaningful. */
3630 if (displacement_string_start
!= displacement_string_end
)
3632 if (!i386_displacement (displacement_string_start
,
3633 displacement_string_end
))
3637 /* Special case for (%dx) while doing input/output op. */
3639 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3641 && i
.log2_scale_factor
== 0
3642 && i
.seg
[i
.mem_operands
] == 0
3643 && (i
.types
[this_operand
] & Disp
) == 0)
3645 i
.types
[this_operand
] = InOutPortReg
;
3648 /* Make sure the memory operand we've been dealt is valid. */
3649 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
3652 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3653 != (Reg16
|BaseIndex
)))
3655 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3656 != (Reg16
|BaseIndex
))
3658 && i
.base_reg
->reg_num
< 6
3659 && i
.index_reg
->reg_num
>= 6
3660 && i
.log2_scale_factor
== 0))))
3662 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3663 operand_string
, "16");
3670 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3672 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3673 != (Reg32
|BaseIndex
))))
3675 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3676 operand_string
, "32");
3683 { /* it's not a memory operand; argh! */
3684 as_bad (_("invalid char %s beginning operand %d `%s'"),
3685 output_invalid (*op_string
),
3690 return 1; /* normal return */
3694 * md_estimate_size_before_relax()
3696 * Called just before relax().
3697 * Any symbol that is now undefined will not become defined.
3698 * Return the correct fr_subtype in the frag.
3699 * Return the initial "guess for fr_var" to caller.
3700 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3701 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3702 * Although it may not be explicit in the frag, pretend fr_var starts with a
3706 md_estimate_size_before_relax (fragP
, segment
)
3707 register fragS
*fragP
;
3708 register segT segment
;
3710 register unsigned char *opcode
;
3711 register int old_fr_fix
;
3713 old_fr_fix
= fragP
->fr_fix
;
3714 opcode
= (unsigned char *) fragP
->fr_opcode
;
3715 /* We've already got fragP->fr_subtype right; all we have to do is
3716 check for un-relaxable symbols. */
3717 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3719 /* symbol is undefined in this segment */
3720 int code16
= fragP
->fr_subtype
& CODE16
;
3721 int size
= code16
? 2 : 4;
3722 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
3726 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3727 opcode
[0] = 0xe9; /* dword disp jmp */
3728 fragP
->fr_fix
+= size
;
3729 fix_new (fragP
, old_fr_fix
, size
,
3731 fragP
->fr_offset
, 1,
3732 (GOT_symbol
&& /* Not quite right - we should switch on
3733 presence of @PLT, but I cannot see how
3734 to get to that from here. We should have
3735 done this in md_assemble to really
3736 get it right all of the time, but I
3737 think it does not matter that much, as
3738 this will be right most of the time. ERY*/
3739 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3740 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3744 /* This changes the byte-displacement jump 0x7N -->
3745 the dword-displacement jump 0x0f8N */
3746 opcode
[1] = opcode
[0] + 0x10;
3747 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
3748 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3749 fix_new (fragP
, old_fr_fix
+ 1, size
,
3751 fragP
->fr_offset
, 1,
3752 (GOT_symbol
&& /* Not quite right - we should switch on
3753 presence of @PLT, but I cannot see how
3754 to get to that from here. ERY */
3755 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3756 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3761 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3762 } /* md_estimate_size_before_relax() */
3765 * md_convert_frag();
3767 * Called after relax() is finished.
3768 * In: Address of frag.
3769 * fr_type == rs_machine_dependent.
3770 * fr_subtype is what the address relaxed to.
3772 * Out: Any fixSs and constants are set up.
3773 * Caller will turn frag into a ".space 0".
3775 #ifndef BFD_ASSEMBLER
3777 md_convert_frag (headers
, sec
, fragP
)
3778 object_headers
*headers
;
3780 register fragS
*fragP
;
3783 md_convert_frag (abfd
, sec
, fragP
)
3786 register fragS
*fragP
;
3789 register unsigned char *opcode
;
3790 unsigned char *where_to_put_displacement
= NULL
;
3791 unsigned int target_address
;
3792 unsigned int opcode_address
;
3793 unsigned int extension
= 0;
3794 int displacement_from_opcode_start
;
3796 opcode
= (unsigned char *) fragP
->fr_opcode
;
3798 /* Address we want to reach in file space. */
3799 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3800 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3801 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
3804 /* Address opcode resides at in file space. */
3805 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3807 /* Displacement from opcode start to fill into instruction. */
3808 displacement_from_opcode_start
= target_address
- opcode_address
;
3810 switch (fragP
->fr_subtype
)
3812 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3813 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3814 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3815 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3816 /* don't have to change opcode */
3817 extension
= 1; /* 1 opcode + 1 displacement */
3818 where_to_put_displacement
= &opcode
[1];
3821 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3822 extension
= 5; /* 2 opcode + 4 displacement */
3823 opcode
[1] = opcode
[0] + 0x10;
3824 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3825 where_to_put_displacement
= &opcode
[2];
3828 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3829 extension
= 4; /* 1 opcode + 4 displacement */
3831 where_to_put_displacement
= &opcode
[1];
3834 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3835 extension
= 3; /* 2 opcode + 2 displacement */
3836 opcode
[1] = opcode
[0] + 0x10;
3837 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3838 where_to_put_displacement
= &opcode
[2];
3841 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3842 extension
= 2; /* 1 opcode + 2 displacement */
3844 where_to_put_displacement
= &opcode
[1];
3848 BAD_CASE (fragP
->fr_subtype
);
3851 /* now put displacement after opcode */
3852 md_number_to_chars ((char *) where_to_put_displacement
,
3853 (valueT
) (displacement_from_opcode_start
- extension
),
3854 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3855 fragP
->fr_fix
+= extension
;
3859 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3860 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3861 const int md_reloc_size
= 8; /* Size of relocation record */
3864 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3866 addressT from_addr
, to_addr
;
3872 offset
= to_addr
- (from_addr
+ 2);
3873 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3874 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3878 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3880 addressT from_addr
, to_addr
;
3886 if (flag_do_long_jump
)
3888 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3889 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3890 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3891 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3892 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3896 offset
= to_addr
- (from_addr
+ 5);
3897 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3898 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3902 /* Apply a fixup (fixS) to segment data, once it has been determined
3903 by our caller that we have all the info we need to fix it up.
3905 On the 386, immediates, displacements, and data pointers are all in
3906 the same (little-endian) format, so we don't need to care about which
3910 md_apply_fix3 (fixP
, valp
, seg
)
3911 fixS
*fixP
; /* The fix we're to put in. */
3912 valueT
*valp
; /* Pointer to the value of the bits. */
3913 segT seg
; /* Segment fix is from. */
3915 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3916 valueT value
= *valp
;
3918 if (fixP
->fx_r_type
== BFD_RELOC_32
&& fixP
->fx_pcrel
)
3919 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3921 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3923 * This is a hack. There should be a better way to
3926 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
3929 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3931 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3934 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3936 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3937 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3938 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3939 || (fixP
->fx_addsy
->bsym
->flags
& BSF_SECTION_SYM
) != 0)
3940 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3941 && ! S_IS_WEAK (fixP
->fx_addsy
)
3942 && S_IS_DEFINED (fixP
->fx_addsy
)
3943 && ! S_IS_COMMON (fixP
->fx_addsy
))
3945 /* Yes, we add the values in twice. This is because
3946 bfd_perform_relocation subtracts them out again. I think
3947 bfd_perform_relocation is broken, but I don't dare change
3949 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3952 #if defined (OBJ_COFF) && defined (TE_PE)
3953 /* For some reason, the PE format does not store a section
3954 address offset for a PC relative symbol. */
3955 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3956 value
+= md_pcrel_from (fixP
);
3960 /* Fix a few things - the dynamic linker expects certain values here,
3961 and we must not dissappoint it. */
3962 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3963 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3965 switch (fixP
->fx_r_type
) {
3966 case BFD_RELOC_386_PLT32
:
3967 /* Make the jump instruction point to the address of the operand. At
3968 runtime we merely add the offset to the actual PLT entry. */
3971 case BFD_RELOC_386_GOTPC
:
3973 * This is tough to explain. We end up with this one if we have
3974 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3975 * here is to obtain the absolute address of the GOT, and it is strongly
3976 * preferable from a performance point of view to avoid using a runtime
3977 * relocation for this. The actual sequence of instructions often look
3983 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3985 * The call and pop essentially return the absolute address of
3986 * the label .L66 and store it in %ebx. The linker itself will
3987 * ultimately change the first operand of the addl so that %ebx points to
3988 * the GOT, but to keep things simple, the .o file must have this operand
3989 * set so that it generates not the absolute address of .L66, but the
3990 * absolute address of itself. This allows the linker itself simply
3991 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
3992 * added in, and the addend of the relocation is stored in the operand
3993 * field for the instruction itself.
3995 * Our job here is to fix the operand so that it would add the correct
3996 * offset so that %ebx would point to itself. The thing that is tricky is
3997 * that .-.L66 will point to the beginning of the instruction, so we need
3998 * to further modify the operand so that it will point to itself.
3999 * There are other cases where you have something like:
4001 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
4003 * and here no correction would be required. Internally in the assembler
4004 * we treat operands of this form as not being pcrel since the '.' is
4005 * explicitly mentioned, and I wonder whether it would simplify matters
4006 * to do it this way. Who knows. In earlier versions of the PIC patches,
4007 * the pcrel_adjust field was used to store the correction, but since the
4008 * expression is not pcrel, I felt it would be confusing to do it this way.
4012 case BFD_RELOC_386_GOT32
:
4013 value
= 0; /* Fully resolved at runtime. No addend. */
4015 case BFD_RELOC_386_GOTOFF
:
4018 case BFD_RELOC_VTABLE_INHERIT
:
4019 case BFD_RELOC_VTABLE_ENTRY
:
4029 md_number_to_chars (p
, value
, fixP
->fx_size
);
4035 /* This is never used. */
4036 long /* Knows about the byte order in a word. */
4037 md_chars_to_number (con
, nbytes
)
4038 unsigned char con
[]; /* Low order byte 1st. */
4039 int nbytes
; /* Number of bytes in the input. */
4042 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
4044 retval
<<= BITS_PER_CHAR
;
4052 #define MAX_LITTLENUMS 6
4054 /* Turn the string pointed to by litP into a floating point constant of type
4055 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4056 is stored in *sizeP . An error message is returned, or NULL on OK. */
4058 md_atof (type
, litP
, sizeP
)
4064 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4065 LITTLENUM_TYPE
*wordP
;
4087 return _("Bad call to md_atof ()");
4089 t
= atof_ieee (input_line_pointer
, type
, words
);
4091 input_line_pointer
= t
;
4093 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4094 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4095 the bigendian 386. */
4096 for (wordP
= words
+ prec
- 1; prec
--;)
4098 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4099 litP
+= sizeof (LITTLENUM_TYPE
);
4104 char output_invalid_buf
[8];
4106 static char * output_invalid
PARAMS ((int));
4113 sprintf (output_invalid_buf
, "'%c'", c
);
4115 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4116 return output_invalid_buf
;
4119 /* REG_STRING starts *before* REGISTER_PREFIX. */
4121 static const reg_entry
* parse_register
PARAMS ((char *, char **));
4123 static const reg_entry
*
4124 parse_register (reg_string
, end_op
)
4128 register char *s
= reg_string
;
4130 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4133 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4134 if (*s
== REGISTER_PREFIX
)
4137 if (is_space_char (*s
))
4141 while ((*p
++ = register_chars
[(unsigned char) *s
++]) != '\0')
4143 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4145 if (!allow_naked_reg
)
4148 as_bad (_("bad register name `%s'"), reg_name_given
);
4150 return (const reg_entry
*) NULL
;
4156 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4160 if (!allow_naked_reg
)
4161 as_bad (_("bad register name `%s'"), reg_name_given
);
4162 return (const reg_entry
*) NULL
;
4169 CONST
char *md_shortopts
= "kmVQ:";
4171 CONST
char *md_shortopts
= "m";
4173 struct option md_longopts
[] = {
4174 {NULL
, no_argument
, NULL
, 0}
4176 size_t md_longopts_size
= sizeof (md_longopts
);
4179 md_parse_option (c
, arg
)
4186 flag_do_long_jump
= 1;
4189 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4190 /* -k: Ignore for FreeBSD compatibility. */
4194 /* -V: SVR4 argument to print version ID. */
4196 print_version_id ();
4199 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4200 should be emitted or not. FIXME: Not implemented. */
4212 md_show_usage (stream
)
4215 fprintf (stream
, _("\
4216 -m do long jump\n"));
4219 #ifdef BFD_ASSEMBLER
4220 #ifdef OBJ_MAYBE_ELF
4221 #ifdef OBJ_MAYBE_COFF
4223 /* Pick the target format to use. */
4226 i386_target_format ()
4228 switch (OUTPUT_FLAVOR
)
4230 case bfd_target_coff_flavour
:
4232 case bfd_target_elf_flavour
:
4233 return "elf32-i386";
4240 #endif /* OBJ_MAYBE_COFF */
4241 #endif /* OBJ_MAYBE_ELF */
4242 #endif /* BFD_ASSEMBLER */
4246 md_undefined_symbol (name
)
4249 if (*name
== '_' && *(name
+1) == 'G'
4250 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4254 if (symbol_find (name
))
4255 as_bad (_("GOT already in symbol table"));
4256 GOT_symbol
= symbol_new (name
, undefined_section
,
4257 (valueT
) 0, &zero_address_frag
);
4264 /* Round up a section size to the appropriate boundary. */
4266 md_section_align (segment
, size
)
4271 #ifdef BFD_ASSEMBLER
4272 /* For a.out, force the section size to be aligned. If we don't do
4273 this, BFD will align it for us, but it will not write out the
4274 final bytes of the section. This may be a bug in BFD, but it is
4275 easier to fix it here since that is how the other a.out targets
4279 align
= bfd_get_section_alignment (stdoutput
, segment
);
4280 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4287 /* On the i386, PC-relative offsets are relative to the start of the
4288 next instruction. That is, the address of the offset, plus its
4289 size, since the offset is always the last part of the insn. */
4292 md_pcrel_from (fixP
)
4295 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4306 temp
= get_absolute_expression ();
4307 subseg_set (bss_section
, (subsegT
) temp
);
4308 demand_empty_rest_of_line ();
4314 #ifdef BFD_ASSEMBLER
4317 i386_validate_fix (fixp
)
4320 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4322 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4327 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
4328 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
4331 tc_gen_reloc (section
, fixp
)
4336 bfd_reloc_code_real_type code
;
4338 switch (fixp
->fx_r_type
)
4340 case BFD_RELOC_386_PLT32
:
4341 case BFD_RELOC_386_GOT32
:
4342 case BFD_RELOC_386_GOTOFF
:
4343 case BFD_RELOC_386_GOTPC
:
4345 case BFD_RELOC_VTABLE_ENTRY
:
4346 case BFD_RELOC_VTABLE_INHERIT
:
4347 code
= fixp
->fx_r_type
;
4350 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
4352 MAP (1, 0, BFD_RELOC_8
);
4353 MAP (2, 0, BFD_RELOC_16
);
4354 MAP (4, 0, BFD_RELOC_32
);
4355 MAP (1, 1, BFD_RELOC_8_PCREL
);
4356 MAP (2, 1, BFD_RELOC_16_PCREL
);
4357 MAP (4, 1, BFD_RELOC_32_PCREL
);
4360 as_bad (_("Can not do %d byte pc-relative relocation"),
4363 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4364 code
= BFD_RELOC_32
;
4372 if (code
== BFD_RELOC_32
4374 && fixp
->fx_addsy
== GOT_symbol
)
4375 code
= BFD_RELOC_386_GOTPC
;
4377 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4378 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
4380 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4381 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4382 vtable entry to be used in the relocation's section offset. */
4383 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4384 rel
->address
= fixp
->fx_offset
;
4387 rel
->addend
= fixp
->fx_addnumber
;
4391 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4392 if (rel
->howto
== NULL
)
4394 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4395 _("Cannot represent relocation type %s"),
4396 bfd_get_reloc_code_name (code
));
4397 /* Set howto to a garbage value so that we can keep going. */
4398 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4399 assert (rel
->howto
!= NULL
);
4405 #else /* ! BFD_ASSEMBLER */
4407 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4409 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4412 relax_addressT segment_address_in_file
;
4415 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4416 * Out: GNU LD relocation length code: 0, 1, or 2.
4419 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4422 know (fixP
->fx_addsy
!= NULL
);
4424 md_number_to_chars (where
,
4425 (valueT
) (fixP
->fx_frag
->fr_address
4426 + fixP
->fx_where
- segment_address_in_file
),
4429 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4430 ? S_GET_TYPE (fixP
->fx_addsy
)
4431 : fixP
->fx_addsy
->sy_number
);
4433 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4434 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4435 where
[4] = r_symbolnum
& 0x0ff;
4436 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4437 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4438 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4441 #endif /* OBJ_AOUT or OBJ_BOUT */
4443 #if defined (I386COFF)
4446 tc_coff_fix2rtype (fixP
)
4449 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4452 return (fixP
->fx_pcrel
?
4453 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4454 fixP
->fx_size
== 2 ? R_PCRWORD
:
4456 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4457 fixP
->fx_size
== 2 ? R_RELWORD
:
4462 tc_coff_sizemachdep (frag
)
4466 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4471 #endif /* I386COFF */
4473 #endif /* BFD_ASSEMBLER? */
4475 /* end of tc-i386.c */