1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 1998
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
35 #include "opcode/i386.h"
38 #define TC_RELOC(X,Y) (Y)
41 static unsigned long mode_from_disp_size
PARAMS ((unsigned long));
42 static int fits_in_signed_byte
PARAMS ((long));
43 static int fits_in_unsigned_byte
PARAMS ((long));
44 static int fits_in_unsigned_word
PARAMS ((long));
45 static int fits_in_signed_word
PARAMS ((long));
46 static int smallest_imm_type
PARAMS ((long));
47 static int check_prefix
PARAMS ((int));
48 static void set_16bit_code_flag
PARAMS ((int));
50 static bfd_reloc_code_real_type reloc
51 PARAMS ((int, int, bfd_reloc_code_real_type
));
54 /* 'md_assemble ()' gathers together information and puts it into a
59 /* TM holds the template for the insn were currently assembling. */
61 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
63 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
65 /* OPERANDS gives the number of given operands. */
66 unsigned int operands
;
68 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
69 of given register, displacement, memory operands and immediate
71 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
73 /* TYPES [i] is the type (see above #defines) which tells us how to
74 search through DISPS [i] & IMMS [i] & REGS [i] for the required
76 unsigned int types
[MAX_OPERANDS
];
78 /* Displacements (if given) for each operand. */
79 expressionS
*disps
[MAX_OPERANDS
];
81 /* Relocation type for operand */
83 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
85 int disp_reloc
[MAX_OPERANDS
];
88 /* Immediate operands (if given) for each operand. */
89 expressionS
*imms
[MAX_OPERANDS
];
91 /* Register operands (if given) for each operand. */
92 reg_entry
*regs
[MAX_OPERANDS
];
94 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
95 the base index byte below. */
98 unsigned int log2_scale_factor
;
100 /* SEG gives the seg_entries of this insn. They are zero unless
101 explicit segment overrides are given. */
102 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
104 /* PREFIX holds all the given prefix opcodes (usually null).
105 PREFIXES is the size of PREFIX. */
106 /* richfix: really unsigned? */
107 unsigned char prefix
[MAX_PREFIXES
];
108 unsigned int prefixes
;
110 /* Wait prefix needs to come before any other prefixes, so handle
111 it specially. wait_prefix will hold the opcode modifier flag
112 FWait if a wait prefix is given. */
115 /* RM and BI are the modrm byte and the base index byte where the
116 addressing modes of this insn are encoded. */
122 typedef struct _i386_insn i386_insn
;
124 /* This array holds the chars that always start a comment. If the
125 pre-processor is disabled, these aren't very useful */
126 #if defined (TE_I386AIX) || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
127 const char comment_chars
[] = "#/";
129 const char comment_chars
[] = "#";
132 /* This array holds the chars that only start a comment at the beginning of
133 a line. If the line seems to have the form '# 123 filename'
134 .line and .file directives will appear in the pre-processed output */
135 /* Note that input_file.c hand checks for '#' at the beginning of the
136 first line of the input file. This is because the compiler outputs
137 #NO_APP at the beginning of its output. */
138 /* Also note that comments started like this one will always work if
139 '/' isn't otherwise defined. */
140 #if defined (TE_I386AIX) || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
141 const char line_comment_chars
[] = "";
143 const char line_comment_chars
[] = "/";
145 const char line_separator_chars
[] = "";
147 /* Chars that can be used to separate mant from exp in floating point nums */
148 const char EXP_CHARS
[] = "eE";
150 /* Chars that mean this number is a floating point constant */
153 const char FLT_CHARS
[] = "fFdDxX";
155 /* tables for lexical analysis */
156 static char opcode_chars
[256];
157 static char register_chars
[256];
158 static char operand_chars
[256];
159 static char space_chars
[256];
160 static char identifier_chars
[256];
161 static char digit_chars
[256];
164 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
165 #define is_operand_char(x) (operand_chars[(unsigned char) x])
166 #define is_register_char(x) (register_chars[(unsigned char) x])
167 #define is_space_char(x) (space_chars[(unsigned char) x])
168 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
169 #define is_digit_char(x) (digit_chars[(unsigned char) x])
171 /* put here all non-digit non-letter charcters that may occur in an operand */
172 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
174 static char *ordinal_names
[] = {"first", "second", "third"}; /* for printfs */
176 /* md_assemble() always leaves the strings it's passed unaltered. To
177 effect this we maintain a stack of saved characters that we've smashed
178 with '\0's (indicating end of strings for various sub-fields of the
179 assembler instruction). */
180 static char save_stack
[32];
181 static char *save_stack_p
; /* stack pointer */
182 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
183 #define RESTORE_END_STRING(s) *s = *--save_stack_p
185 /* The instruction we're assembling. */
188 /* Possible templates for current insn. */
189 static templates
*current_templates
;
191 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
192 static expressionS disp_expressions
[2], im_expressions
[2];
194 /* Pointers to ebp & esp entries in reg_hash hash table. */
195 static reg_entry
*ebp
, *esp
;
197 static int this_operand
; /* current operand we are working on */
199 static int flag_do_long_jump
; /* FIXME what does this do? */
201 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
203 /* Interface to relax_segment.
204 There are 2 relax states for 386 jump insns: one for conditional &
205 one for unconditional jumps. This is because the these two types
206 of jumps add different sizes to frags when we're figuring out what
207 sort of jump to choose to reach a given label. */
210 #define COND_JUMP 1 /* conditional jump */
211 #define UNCOND_JUMP 2 /* unconditional jump */
216 #define UNKNOWN_SIZE 3
220 #define INLINE __inline__
226 #define ENCODE_RELAX_STATE(type,size) \
227 ((relax_substateT)((type<<2) | (size)))
228 #define SIZE_FROM_RELAX_STATE(s) \
229 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
231 const relax_typeS md_relax_table
[] =
234 1) most positive reach of this state,
235 2) most negative reach of this state,
236 3) how many bytes this mode will add to the size of the current frag
237 4) which index into the table to try if we can't fit into this one.
244 /* For now we don't use word displacement jumps; they will not work
245 for destination addresses > 0xFFFF, since they clear the upper 16
247 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
248 /* word conditionals add 3 bytes to frag:
249 2 opcode prefix; 1 displacement bytes */
250 {32767 + 2, -32768 + 2, 3, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
251 /* dword conditionals adds 4 bytes to frag:
252 1 opcode prefix; 3 displacement bytes */
256 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
257 /* word jmp adds 2 bytes to frag:
258 1 opcode prefix; 1 displacement bytes */
259 {32767 + 2, -32768 + 2, 2, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
260 /* dword jmp adds 3 bytes to frag:
261 0 opcode prefix; 3 displacement bytes */
269 i386_align_code (fragP
, count
)
273 /* Various efficient no-op patterns for aligning code labels. */
274 /* Note: Don't try to assemble the instructions in the comments. */
275 /* 0L and 0w are not legal */
276 static const char f32_1
[] =
278 static const char f32_2
[] =
279 {0x89,0xf6}; /* movl %esi,%esi */
280 static const char f32_3
[] =
281 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
282 static const char f32_4
[] =
283 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
284 static const char f32_5
[] =
286 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
287 static const char f32_6
[] =
288 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
289 static const char f32_7
[] =
290 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
291 static const char f32_8
[] =
293 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
294 static const char f32_9
[] =
295 {0x89,0xf6, /* movl %esi,%esi */
296 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
297 static const char f32_10
[] =
298 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
299 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
300 static const char f32_11
[] =
301 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
302 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
303 static const char f32_12
[] =
304 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
305 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
306 static const char f32_13
[] =
307 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
308 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
309 static const char f32_14
[] =
310 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
311 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
312 static const char f32_15
[] =
313 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
314 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
315 static const char f16_4
[] =
316 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
317 static const char f16_5
[] =
319 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
320 static const char f16_6
[] =
321 {0x89,0xf6, /* mov %si,%si */
322 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
323 static const char f16_7
[] =
324 {0x8d,0x74,0x00, /* lea 0(%si),%si */
325 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
326 static const char f16_8
[] =
327 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
328 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
329 static const char *const f32_patt
[] = {
330 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
331 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
333 static const char *const f16_patt
[] = {
334 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
335 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
338 if (count
> 0 && count
<= 15)
342 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
343 f16_patt
[count
- 1], count
);
344 if (count
> 8) /* adjust jump offset */
345 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
348 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
349 f32_patt
[count
- 1], count
);
350 fragP
->fr_var
= count
;
354 static char *output_invalid
PARAMS ((int c
));
355 static int i386_operand
PARAMS ((char *operand_string
));
356 static reg_entry
*parse_register
PARAMS ((char *reg_string
));
358 static void s_bss
PARAMS ((int));
361 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
363 static INLINE
unsigned long
364 mode_from_disp_size (t
)
367 return (t
& Disp8
) ? 1 : (t
& Disp32
) ? 2 : 0;
372 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifier */
374 static INLINE
unsigned long
375 opcode_suffix_to_type (s
)
378 return (s
== BYTE_OPCODE_SUFFIX
379 ? Byte
: (s
== WORD_OPCODE_SUFFIX
381 } /* opcode_suffix_to_type() */
385 fits_in_signed_byte (num
)
388 return (num
>= -128) && (num
<= 127);
389 } /* fits_in_signed_byte() */
392 fits_in_unsigned_byte (num
)
395 return (num
& 0xff) == num
;
396 } /* fits_in_unsigned_byte() */
399 fits_in_unsigned_word (num
)
402 return (num
& 0xffff) == num
;
403 } /* fits_in_unsigned_word() */
406 fits_in_signed_word (num
)
409 return (-32768 <= num
) && (num
<= 32767);
410 } /* fits_in_signed_word() */
413 smallest_imm_type (num
)
417 /* This code is disabled because all the Imm1 forms in the opcode table
418 are slower on the i486, and they're the versions with the implicitly
419 specified single-position displacement, which has another syntax if
420 you really want to use that form. If you really prefer to have the
421 one-byte-shorter Imm1 form despite these problems, re-enable this
424 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
426 return (fits_in_signed_byte (num
)
427 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
428 : fits_in_unsigned_byte (num
)
429 ? (Imm8
| Imm16
| Imm32
)
430 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
433 } /* smallest_imm_type() */
436 check_prefix (prefix
)
441 for (q
= 0; q
< i
.prefixes
; q
++)
445 case CS_PREFIX_OPCODE
:
446 case DS_PREFIX_OPCODE
:
447 case ES_PREFIX_OPCODE
:
448 case FS_PREFIX_OPCODE
:
449 case GS_PREFIX_OPCODE
:
450 case SS_PREFIX_OPCODE
:
453 case CS_PREFIX_OPCODE
:
454 case DS_PREFIX_OPCODE
:
455 case ES_PREFIX_OPCODE
:
456 case FS_PREFIX_OPCODE
:
457 case GS_PREFIX_OPCODE
:
458 case SS_PREFIX_OPCODE
:
459 as_bad ("same type of prefix used twice");
470 as_bad ("same type of prefix used twice");
476 if (i
.wait_prefix
!= 0)
478 as_bad ("same type of prefix used twice");
484 if (i
.prefix
[q
] == prefix
)
486 as_bad ("same type of prefix used twice");
492 if (i
.prefixes
== MAX_PREFIXES
&& prefix
!= FWAIT_OPCODE
)
494 char *p
= "another"; /* paranoia */
497 q
< sizeof (i386_prefixtab
) / sizeof (i386_prefixtab
[0]);
499 if (i386_prefixtab
[q
].prefix_code
== prefix
)
500 p
= i386_prefixtab
[q
].prefix_name
;
502 as_bad ("%d prefixes given and `%%%s' prefix gives too many",
511 set_16bit_code_flag (new_16bit_code_flag
)
512 int new_16bit_code_flag
;
514 flag_16bit_code
= new_16bit_code_flag
;
517 const pseudo_typeS md_pseudo_table
[] =
522 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
523 {"align", s_align_bytes
, 0},
525 {"align", s_align_ptwo
, 0},
527 {"ffloat", float_cons
, 'f'},
528 {"dfloat", float_cons
, 'd'},
529 {"tfloat", float_cons
, 'x'},
531 {"noopt", s_ignore
, 0},
532 {"optim", s_ignore
, 0},
533 {"code16", set_16bit_code_flag
, 1},
534 {"code32", set_16bit_code_flag
, 0},
538 /* for interface with expression () */
539 extern char *input_line_pointer
;
541 /* obstack for constructing various things in md_begin */
544 /* hash table for opcode lookup */
545 static struct hash_control
*op_hash
;
546 /* hash table for register lookup */
547 static struct hash_control
*reg_hash
;
548 /* hash table for prefix lookup */
549 static struct hash_control
*prefix_hash
;
555 const char *hash_err
;
557 obstack_begin (&o
, 4096);
559 /* initialize op_hash hash table */
560 op_hash
= hash_new ();
563 register const template *optab
;
564 register templates
*core_optab
;
567 optab
= i386_optab
; /* setup for loop */
568 prev_name
= optab
->name
;
569 obstack_grow (&o
, optab
, sizeof (template));
570 core_optab
= (templates
*) xmalloc (sizeof (templates
));
572 for (optab
++; optab
< i386_optab_end
; optab
++)
574 if (!strcmp (optab
->name
, prev_name
))
576 /* same name as before --> append to current template list */
577 obstack_grow (&o
, optab
, sizeof (template));
581 /* different name --> ship out current template list;
582 add to hash table; & begin anew */
583 /* Note: end must be set before start! since obstack_next_free
584 changes upon opstack_finish */
585 core_optab
->end
= (template *) obstack_next_free (&o
);
586 core_optab
->start
= (template *) obstack_finish (&o
);
587 hash_err
= hash_insert (op_hash
, prev_name
, (char *) core_optab
);
591 as_fatal ("Internal Error: Can't hash %s: %s", prev_name
,
594 prev_name
= optab
->name
;
595 core_optab
= (templates
*) xmalloc (sizeof (templates
));
596 obstack_grow (&o
, optab
, sizeof (template));
601 /* initialize reg_hash hash table */
602 reg_hash
= hash_new ();
604 register const reg_entry
*regtab
;
606 for (regtab
= i386_regtab
; regtab
< i386_regtab_end
; regtab
++)
608 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
614 esp
= (reg_entry
*) hash_find (reg_hash
, "esp");
615 ebp
= (reg_entry
*) hash_find (reg_hash
, "ebp");
617 /* initialize reg_hash hash table */
618 prefix_hash
= hash_new ();
620 register const prefix_entry
*prefixtab
;
622 for (prefixtab
= i386_prefixtab
;
623 prefixtab
< i386_prefixtab_end
; prefixtab
++)
625 hash_err
= hash_insert (prefix_hash
, prefixtab
->prefix_name
,
632 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
637 for (c
= 0; c
< 256; c
++)
639 if (islower (c
) || isdigit (c
))
642 register_chars
[c
] = c
;
644 else if (isupper (c
))
646 opcode_chars
[c
] = tolower (c
);
647 register_chars
[c
] = opcode_chars
[c
];
649 else if (c
== PREFIX_SEPERATOR
)
653 else if (c
== ')' || c
== '(')
655 register_chars
[c
] = c
;
658 if (isupper (c
) || islower (c
) || isdigit (c
))
659 operand_chars
[c
] = c
;
661 if (isdigit (c
) || c
== '-')
664 if (isalpha (c
) || c
== '_' || c
== '.' || isdigit (c
))
665 identifier_chars
[c
] = c
;
668 identifier_chars
['@'] = '@';
671 if (c
== ' ' || c
== '\t')
675 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
676 operand_chars
[(unsigned char) *p
] = *p
;
679 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
680 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
682 record_alignment (text_section
, 2);
683 record_alignment (data_section
, 2);
684 record_alignment (bss_section
, 2);
690 i386_print_statistics (file
)
693 hash_print_statistics (file
, "i386 opcode", op_hash
);
694 hash_print_statistics (file
, "i386 register", reg_hash
);
695 hash_print_statistics (file
, "i386 prefix", prefix_hash
);
701 /* debugging routines for md_assemble */
702 static void pi
PARAMS ((char *, i386_insn
*));
703 static void pte
PARAMS ((template *));
704 static void pt
PARAMS ((unsigned int));
705 static void pe
PARAMS ((expressionS
*));
706 static void ps
PARAMS ((symbolS
*));
713 register template *p
;
716 fprintf (stdout
, "%s: template ", line
);
718 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
719 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
720 fprintf (stdout
, " base %x index %x scale %x\n",
721 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
722 for (i
= 0; i
< x
->operands
; i
++)
724 fprintf (stdout
, " #%d: ", i
+ 1);
726 fprintf (stdout
, "\n");
728 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
729 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
730 if (x
->types
[i
] & Imm
)
732 if (x
->types
[i
] & (Disp
| Abs
))
742 fprintf (stdout
, " %d operands ", t
->operands
);
743 fprintf (stdout
, "opcode %x ",
745 if (t
->extension_opcode
!= None
)
746 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
747 if (t
->opcode_modifier
& D
)
748 fprintf (stdout
, "D");
749 if (t
->opcode_modifier
& W
)
750 fprintf (stdout
, "W");
751 fprintf (stdout
, "\n");
752 for (i
= 0; i
< t
->operands
; i
++)
754 fprintf (stdout
, " #%d type ", i
+ 1);
755 pt (t
->operand_types
[i
]);
756 fprintf (stdout
, "\n");
764 fprintf (stdout
, " operation %d\n", e
->X_op
);
765 fprintf (stdout
, " add_number %d (%x)\n",
766 e
->X_add_number
, e
->X_add_number
);
769 fprintf (stdout
, " add_symbol ");
770 ps (e
->X_add_symbol
);
771 fprintf (stdout
, "\n");
775 fprintf (stdout
, " op_symbol ");
777 fprintf (stdout
, "\n");
785 fprintf (stdout
, "%s type %s%s",
787 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
788 segment_name (S_GET_SEGMENT (s
)));
809 { BaseIndex
, "BaseIndex" },
819 { InOutPortReg
, "InOutPortReg" },
820 { ShiftCount
, "ShiftCount" },
822 { Control
, "control reg" },
823 { Test
, "test reg" },
824 { Debug
, "debug reg" },
825 { FloatReg
, "FReg" },
826 { FloatAcc
, "FAcc" },
827 { JumpAbsolute
, "Jump Absolute" },
837 register struct type_name
*ty
;
841 fprintf (stdout
, "Unknown");
845 for (ty
= type_names
; ty
->mask
; ty
++)
847 fprintf (stdout
, "%s, ", ty
->tname
);
852 #endif /* DEBUG386 */
855 static bfd_reloc_code_real_type
856 reloc (size
, pcrel
, other
)
859 bfd_reloc_code_real_type other
;
861 if (other
!= NO_RELOC
) return other
;
866 case 1: return BFD_RELOC_8_PCREL
;
867 case 2: return BFD_RELOC_16_PCREL
;
868 case 4: return BFD_RELOC_32_PCREL
;
873 case 1: return BFD_RELOC_8
;
874 case 2: return BFD_RELOC_16
;
875 case 4: return BFD_RELOC_32
;
878 as_bad ("Can not do %d byte %srelocation", size
,
879 pcrel
? "pc-relative " : "");
880 return BFD_RELOC_NONE
;
884 * Here we decide which fixups can be adjusted to make them relative to
885 * the beginning of the section instead of the symbol. Basically we need
886 * to make sure that the dynamic relocations are done correctly, so in
887 * some cases we force the original symbol to be used.
890 tc_i386_fix_adjustable(fixP
)
894 /* Prevent all adjustments to global symbols. */
895 if (S_IS_EXTERN (fixP
->fx_addsy
))
897 if (S_IS_WEAK (fixP
->fx_addsy
))
899 #endif /* ! defined (OBJ_AOUT) */
900 /* adjust_reloc_syms doesn't know about the GOT */
901 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
902 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
903 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
)
908 #define reloc(SIZE,PCREL,OTHER) 0
909 #define BFD_RELOC_32 0
910 #define BFD_RELOC_32_PCREL 0
911 #define BFD_RELOC_386_PLT32 0
912 #define BFD_RELOC_386_GOT32 0
913 #define BFD_RELOC_386_GOTOFF 0
916 /* This is the guts of the machine-dependent assembler. LINE points to a
917 machine dependent instruction. This function is supposed to emit
918 the frags/bytes it assembles to. */
924 /* Points to template once we've found it. */
927 /* Count the size of the instruction generated. */
932 /* Initialize globals. */
933 memset (&i
, '\0', sizeof (i
));
934 for (j
= 0; j
< MAX_OPERANDS
; j
++)
935 i
.disp_reloc
[j
] = NO_RELOC
;
936 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
937 memset (im_expressions
, '\0', sizeof (im_expressions
));
938 save_stack_p
= save_stack
; /* reset stack pointer */
940 /* First parse an opcode & call i386_operand for the operands.
941 We assume that the scrubber has arranged it so that line[0] is the valid
942 start of a (possibly prefixed) opcode. */
946 /* 1 if operand is pending after ','. */
947 unsigned int expecting_operand
= 0;
948 /* Non-zero if we found a prefix only acceptable with string insns. */
949 const char *expecting_string_instruction
= NULL
;
950 /* Non-zero if operand parens not balanced. */
951 unsigned int paren_not_balanced
;
952 char *token_start
= l
;
954 while (!is_space_char (*l
) && *l
!= END_OF_INSN
)
956 if (!is_opcode_char (*l
))
958 as_bad ("invalid character %s in opcode", output_invalid (*l
));
961 else if (*l
!= PREFIX_SEPERATOR
)
963 *l
= opcode_chars
[(unsigned char) *l
]; /* fold case of opcodes */
968 /* This opcode's got a prefix. */
970 prefix_entry
*prefix
;
972 if (l
== token_start
)
974 as_bad ("expecting prefix; got nothing");
977 END_STRING_AND_SAVE (l
);
978 prefix
= (prefix_entry
*) hash_find (prefix_hash
, token_start
);
981 as_bad ("no such opcode prefix `%s'", token_start
);
982 RESTORE_END_STRING (l
);
985 RESTORE_END_STRING (l
);
986 /* check for repeated prefix */
987 if (! check_prefix (prefix
->prefix_code
))
989 if (prefix
->prefix_code
== FWAIT_OPCODE
)
991 i
.wait_prefix
= FWait
;
995 i
.prefix
[i
.prefixes
++] = prefix
->prefix_code
;
996 if (prefix
->prefix_code
== REPE
997 || prefix
->prefix_code
== REPNE
)
998 expecting_string_instruction
= prefix
->prefix_name
;
1000 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1004 END_STRING_AND_SAVE (l
);
1005 if (token_start
== l
)
1007 as_bad ("expecting opcode; got nothing");
1008 RESTORE_END_STRING (l
);
1012 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
1013 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
1014 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
1015 if (!current_templates
)
1017 int last_index
= strlen (token_start
) - 1;
1018 char last_char
= token_start
[last_index
];
1021 case DWORD_OPCODE_SUFFIX
:
1022 case WORD_OPCODE_SUFFIX
:
1023 case BYTE_OPCODE_SUFFIX
:
1024 token_start
[last_index
] = '\0';
1025 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
1026 token_start
[last_index
] = last_char
;
1027 i
.suffix
= last_char
;
1029 if (!current_templates
)
1031 as_bad ("no such 386 instruction: `%s'", token_start
);
1032 RESTORE_END_STRING (l
);
1036 RESTORE_END_STRING (l
);
1038 /* check for rep/repne without a string instruction */
1039 if (expecting_string_instruction
&&
1040 !(current_templates
->start
->opcode_modifier
& IsString
))
1042 as_bad ("expecting string instruction after `%s'",
1043 expecting_string_instruction
);
1047 /* There may be operands to parse. */
1048 if (*l
!= END_OF_INSN
)
1050 /* parse operands */
1053 /* skip optional white space before operand */
1054 while (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1056 if (!is_space_char (*l
))
1058 as_bad ("invalid character %s before %s operand",
1059 output_invalid (*l
),
1060 ordinal_names
[i
.operands
]);
1065 token_start
= l
; /* after white space */
1066 paren_not_balanced
= 0;
1067 while (paren_not_balanced
|| *l
!= ',')
1069 if (*l
== END_OF_INSN
)
1071 if (paren_not_balanced
)
1073 as_bad ("unbalanced parenthesis in %s operand.",
1074 ordinal_names
[i
.operands
]);
1078 break; /* we are done */
1080 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1082 as_bad ("invalid character %s in %s operand",
1083 output_invalid (*l
),
1084 ordinal_names
[i
.operands
]);
1088 ++paren_not_balanced
;
1090 --paren_not_balanced
;
1093 if (l
!= token_start
)
1094 { /* yes, we've read in another operand */
1095 unsigned int operand_ok
;
1096 this_operand
= i
.operands
++;
1097 if (i
.operands
> MAX_OPERANDS
)
1099 as_bad ("spurious operands; (%d operands/instruction max)",
1103 /* now parse operand adding info to 'i' as we go along */
1104 END_STRING_AND_SAVE (l
);
1105 operand_ok
= i386_operand (token_start
);
1106 RESTORE_END_STRING (l
); /* restore old contents */
1112 if (expecting_operand
)
1114 expecting_operand_after_comma
:
1115 as_bad ("expecting operand after ','; got nothing");
1120 as_bad ("expecting operand before ','; got nothing");
1125 /* now *l must be either ',' or END_OF_INSN */
1128 if (*++l
== END_OF_INSN
)
1129 { /* just skip it, if it's \n complain */
1130 goto expecting_operand_after_comma
;
1132 expecting_operand
= 1;
1135 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1139 /* Now we've parsed the opcode into a set of templates, and have the
1142 Next, we find a template that matches the given insn,
1143 making sure the overlap of the given operands types is consistent
1144 with the template operand types. */
1146 #define MATCH(overlap,given_type) \
1148 (((overlap & (JumpAbsolute|BaseIndex|Mem8)) \
1149 == (given_type & (JumpAbsolute|BaseIndex|Mem8))) \
1150 || (overlap == InOutPortReg)))
1153 /* If m0 and m1 are register matches they must be consistent
1154 with the expected operand types t0 and t1.
1155 That is, if both m0 & m1 are register matches
1156 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
1157 then, either 1. or 2. must be true:
1158 1. the expected operand type register overlap is null:
1159 (t0 & t1 & Reg) == 0
1161 the given register overlap is null:
1162 (m0 & m1 & Reg) == 0
1163 2. the expected operand type register overlap == the given
1164 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
1166 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
1167 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
1168 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
1169 ((t0 & t1) & (m0 & m1) & (Reg)) \
1172 register unsigned int overlap0
, overlap1
;
1174 unsigned int overlap2
;
1175 unsigned int found_reverse_match
;
1177 overlap0
= overlap1
= overlap2
= found_reverse_match
= 0;
1178 for (t
= current_templates
->start
;
1179 t
< current_templates
->end
;
1182 /* must have right number of operands */
1183 if (i
.operands
!= t
->operands
)
1185 else if (!t
->operands
)
1186 break; /* 0 operands always matches */
1188 overlap0
= i
.types
[0] & t
->operand_types
[0];
1189 switch (t
->operands
)
1192 if (!MATCH (overlap0
, i
.types
[0]))
1197 overlap1
= i
.types
[1] & t
->operand_types
[1];
1198 if (!MATCH (overlap0
, i
.types
[0]) ||
1199 !MATCH (overlap1
, i
.types
[1]) ||
1200 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
1201 t
->operand_types
[0],
1202 t
->operand_types
[1]))
1205 /* check if other direction is valid ... */
1206 if (!(t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
))
1209 /* try reversing direction of operands */
1210 overlap0
= i
.types
[0] & t
->operand_types
[1];
1211 overlap1
= i
.types
[1] & t
->operand_types
[0];
1212 if (!MATCH (overlap0
, i
.types
[0]) ||
1213 !MATCH (overlap1
, i
.types
[1]) ||
1214 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
1215 t
->operand_types
[1],
1216 t
->operand_types
[0]))
1218 /* does not match either direction */
1221 /* found a reverse match here -- slip through */
1222 /* found_reverse_match holds which of D or FloatD we've found */
1223 found_reverse_match
= t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
;
1224 } /* endif: not forward match */
1225 /* found either forward/reverse 2 operand match here */
1226 if (t
->operands
== 3)
1228 overlap2
= i
.types
[2] & t
->operand_types
[2];
1229 if (!MATCH (overlap2
, i
.types
[2]) ||
1230 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap2
,
1231 t
->operand_types
[0],
1232 t
->operand_types
[2]) ||
1233 !CONSISTENT_REGISTER_MATCH (overlap1
, overlap2
,
1234 t
->operand_types
[1],
1235 t
->operand_types
[2]))
1238 /* found either forward/reverse 2 or 3 operand match here:
1239 slip through to break */
1241 break; /* we've found a match; break out of loop */
1242 } /* for (t = ... */
1243 if (t
== current_templates
->end
)
1244 { /* we found no match */
1245 as_bad ("suffix or operands invalid for `%s'",
1246 current_templates
->start
->name
);
1250 /* Copy the template we found. */
1252 i
.tm
.opcode_modifier
|= i
.wait_prefix
;
1254 if (found_reverse_match
)
1256 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1257 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1260 /* Check string instruction segment overrides */
1261 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1263 int mem_op
= (i
.types
[0] & Mem
) ? 0 : 1;
1264 if ((i
.tm
.operand_types
[mem_op
+0] & EsSeg
) != 0)
1266 if (i
.seg
[0] != (seg_entry
*) 0 && i
.seg
[0] != (seg_entry
*) &es
)
1268 as_bad ("`%s' %s operand must use `%%es' segment",
1270 ordinal_names
[mem_op
+0]);
1273 /* There's only ever one segment override allowed per instruction.
1274 This instruction possibly has a legal segment override on the
1275 second operand, so copy the segment to where non-string
1276 instructions store it, allowing common code. */
1277 i
.seg
[0] = i
.seg
[1];
1279 else if ((i
.tm
.operand_types
[mem_op
+1] & EsSeg
) != 0)
1281 if (i
.seg
[1] != (seg_entry
*) 0 && i
.seg
[1] != (seg_entry
*) &es
)
1283 as_bad ("`%s' %s operand must use `%%es' segment",
1285 ordinal_names
[mem_op
+1]);
1291 /* If the matched instruction specifies an explicit opcode suffix,
1292 use it - and make sure none has already been specified. */
1293 if (i
.tm
.opcode_modifier
& (Data16
|Data32
))
1297 as_bad ("extraneous opcode suffix given");
1300 if (i
.tm
.opcode_modifier
& Data16
)
1301 i
.suffix
= WORD_OPCODE_SUFFIX
;
1303 i
.suffix
= DWORD_OPCODE_SUFFIX
;
1306 /* If there's no opcode suffix we try to invent one based on register
1308 if (!i
.suffix
&& i
.reg_operands
)
1310 /* We take i.suffix from the LAST register operand specified. This
1311 assumes that the last register operands is the destination register
1314 for (op
= 0; op
< MAX_OPERANDS
; op
++)
1315 if (i
.types
[op
] & Reg
)
1317 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_OPCODE_SUFFIX
:
1318 (i
.types
[op
] & Reg16
) ? WORD_OPCODE_SUFFIX
:
1319 DWORD_OPCODE_SUFFIX
);
1322 else if (i
.suffix
!= 0
1323 && i
.reg_operands
!= 0
1324 && (i
.types
[i
.operands
- 1] & Reg
) != 0)
1328 /* If the last operand is a register, make sure it is
1329 compatible with the suffix. */
1336 case BYTE_OPCODE_SUFFIX
:
1337 /* If this is an eight bit register, it's OK. If it's the
1338 16 or 32 bit version of an eight bit register, we will
1339 just use the low portion, and that's OK too. */
1340 if ((i
.types
[i
.operands
- 1] & Reg8
) == 0
1341 && i
.regs
[i
.operands
- 1]->reg_num
>= 4)
1344 case WORD_OPCODE_SUFFIX
:
1345 case DWORD_OPCODE_SUFFIX
:
1346 /* We don't insist on the presence or absence of the e
1347 prefix on the register, but we reject eight bit
1349 if ((i
.types
[i
.operands
- 1] & Reg8
) != 0)
1353 as_bad ("register does not match opcode suffix");
1356 /* Make still unresolved immediate matches conform to size of immediate
1357 given in i.suffix. Note: overlap2 cannot be an immediate!
1359 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1360 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1361 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1365 as_bad ("no opcode suffix given; can't determine immediate size");
1368 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1369 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1371 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1372 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1373 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1377 as_bad ("no opcode suffix given; can't determine immediate size");
1380 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1381 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1384 i
.types
[0] = overlap0
;
1385 i
.types
[1] = overlap1
;
1386 i
.types
[2] = overlap2
;
1388 if (overlap0
& ImplicitRegister
)
1390 if (overlap1
& ImplicitRegister
)
1392 if (overlap2
& ImplicitRegister
)
1394 if (overlap0
& Imm1
)
1395 i
.imm_operands
= 0; /* kludge for shift insns */
1397 /* Finalize opcode. First, we change the opcode based on the operand
1398 size given by i.suffix: we never have to change things for byte insns,
1399 or when no opcode suffix is need to size the operands. */
1401 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1403 as_bad ("no opcode suffix given and no register operands; can't size instruction");
1407 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1409 /* Select between byte and word/dword operations. */
1410 if (i
.tm
.opcode_modifier
& W
)
1411 i
.tm
.base_opcode
|= W
;
1412 /* Now select between word & dword operations via the
1413 operand size prefix. */
1414 if ((i
.suffix
== WORD_OPCODE_SUFFIX
) ^ flag_16bit_code
)
1416 if (! check_prefix (WORD_PREFIX_OPCODE
))
1418 i
.prefix
[i
.prefixes
++] = WORD_PREFIX_OPCODE
;
1422 /* For insns with operands there are more diddles to do to the opcode. */
1425 /* Default segment register this instruction will use
1426 for memory accesses. 0 means unknown.
1427 This is only for optimizing out unnecessary segment overrides. */
1428 const seg_entry
*default_seg
= 0;
1430 /* True if this instruction uses a memory addressing mode,
1431 and therefore may need an address-size prefix. */
1432 int uses_mem_addrmode
= 0;
1435 /* If we found a reverse match we must alter the opcode direction bit
1436 found_reverse_match holds bit to set (different for int &
1439 i
.tm
.base_opcode
^= found_reverse_match
;
1441 /* The imul $imm, %reg instruction is converted into
1442 imul $imm, %reg, %reg, and the clr %reg instruction
1443 is converted into xor %reg, %reg. */
1444 if (i
.tm
.opcode_modifier
& regKludge
)
1446 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1447 /* Pretend we saw the extra register operand. */
1448 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1452 if (i
.tm
.opcode_modifier
& ShortForm
)
1454 /* The register or float register operand is in operand 0 or 1. */
1455 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1456 /* Register goes in low 3 bits of opcode. */
1457 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1459 else if (i
.tm
.opcode_modifier
& ShortFormW
)
1461 /* Short form with 0x8 width bit. Register is always dest. operand */
1462 i
.tm
.base_opcode
|= i
.regs
[1]->reg_num
;
1463 if (i
.suffix
== WORD_OPCODE_SUFFIX
||
1464 i
.suffix
== DWORD_OPCODE_SUFFIX
)
1465 i
.tm
.base_opcode
|= 0x8;
1467 else if (i
.tm
.opcode_modifier
& Modrm
)
1469 /* The opcode is completed (modulo i.tm.extension_opcode which
1470 must be put into the modrm byte).
1471 Now, we make the modrm & index base bytes based on all the
1472 info we've collected. */
1474 /* i.reg_operands MUST be the number of real register operands;
1475 implicit registers do not count. */
1476 if (i
.reg_operands
== 2)
1478 unsigned int source
, dest
;
1479 source
= ((i
.types
[0]
1490 /* Certain instructions expect the destination to be
1491 in the i.rm.reg field. This is by far the
1492 exceptional case. For these instructions, if the
1493 source operand is a register, we must reverse the
1494 i.rm.reg and i.rm.regmem fields. We accomplish
1495 this by pretending that the two register operands
1496 were given in the reverse order. */
1497 if (i
.tm
.opcode_modifier
& ReverseRegRegmem
)
1499 reg_entry
*tmp
= i
.regs
[source
];
1500 i
.regs
[source
] = i
.regs
[dest
];
1505 /* We must be careful to make sure that all
1506 segment/control/test/debug/MMX registers go into
1507 the i.rm.reg field (despite whether they are
1508 source or destination operands). */
1509 if (i
.regs
[dest
]->reg_type
1510 & (SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
1512 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1513 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1517 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1518 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1522 { /* if it's not 2 reg operands... */
1525 unsigned int fake_zero_displacement
= 0;
1526 unsigned int op
= ((i
.types
[0] & Mem
)
1528 : (i
.types
[1] & Mem
) ? 1 : 2);
1530 /* Encode memory operand into modrm byte and base index
1533 if (i
.base_reg
== esp
&& !i
.index_reg
)
1535 /* <disp>(%esp) becomes two byte modrm with no index
1537 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1538 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1539 i
.bi
.base
= ESP_REG_NUM
;
1540 i
.bi
.index
= NO_INDEX_REGISTER
;
1541 i
.bi
.scale
= 0; /* Must be zero! */
1543 else if (i
.base_reg
== ebp
&& !i
.index_reg
)
1545 if (!(i
.types
[op
] & Disp
))
1547 /* Must fake a zero byte displacement. There is
1548 no direct way to code '(%ebp)' directly. */
1549 fake_zero_displacement
= 1;
1550 /* fake_zero_displacement code does not set this. */
1551 i
.types
[op
] |= Disp8
;
1553 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1554 i
.rm
.regmem
= EBP_REG_NUM
;
1556 else if (!i
.base_reg
&& (i
.types
[op
] & BaseIndex
))
1558 /* There are three cases here.
1559 Case 1: '<32bit disp>(,1)' -- indirect absolute.
1560 (Same as cases 2 & 3 with NO index register)
1561 Case 2: <32bit disp> (,<index>) -- no base register with disp
1562 Case 3: (, <index>) --- no base register;
1563 no disp (must add 32bit 0 disp). */
1564 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1565 i
.rm
.mode
= 0; /* 32bit mode */
1566 i
.bi
.base
= NO_BASE_REGISTER
;
1567 i
.types
[op
] &= ~Disp
;
1568 i
.types
[op
] |= Disp32
; /* Must be 32bit! */
1570 { /* case 2 or case 3 */
1571 i
.bi
.index
= i
.index_reg
->reg_num
;
1572 i
.bi
.scale
= i
.log2_scale_factor
;
1573 if (i
.disp_operands
== 0)
1574 fake_zero_displacement
= 1; /* case 3 */
1578 i
.bi
.index
= NO_INDEX_REGISTER
;
1582 else if (i
.disp_operands
&& !i
.base_reg
&& !i
.index_reg
)
1584 /* Operand is just <32bit disp> */
1585 i
.rm
.regmem
= EBP_REG_NUM
;
1587 i
.types
[op
] &= ~Disp
;
1588 i
.types
[op
] |= Disp32
;
1592 /* It's not a special case; rev'em up. */
1593 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1594 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1597 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1598 i
.bi
.base
= i
.base_reg
->reg_num
;
1599 i
.bi
.index
= i
.index_reg
->reg_num
;
1600 i
.bi
.scale
= i
.log2_scale_factor
;
1601 if (i
.base_reg
== ebp
&& i
.disp_operands
== 0)
1603 fake_zero_displacement
= 1;
1604 i
.types
[op
] |= Disp8
;
1605 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1609 if (fake_zero_displacement
)
1611 /* Fakes a zero displacement assuming that i.types[op]
1612 holds the correct displacement size. */
1613 exp
= &disp_expressions
[i
.disp_operands
++];
1615 exp
->X_op
= O_constant
;
1616 exp
->X_add_number
= 0;
1617 exp
->X_add_symbol
= (symbolS
*) 0;
1618 exp
->X_op_symbol
= (symbolS
*) 0;
1621 /* Find the default segment for the memory operand.
1622 Used to optimize out explicit segment specifications. */
1625 unsigned int seg_index
;
1627 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
)
1629 seg_index
= (i
.rm
.mode
<< 3) | i
.bi
.base
;
1630 default_seg
= two_byte_segment_defaults
[seg_index
];
1634 seg_index
= (i
.rm
.mode
<< 3) | i
.rm
.regmem
;
1635 default_seg
= one_byte_segment_defaults
[seg_index
];
1640 /* Fill in i.rm.reg or i.rm.regmem field with register
1641 operand (if any) based on i.tm.extension_opcode.
1642 Again, we must be careful to make sure that
1643 segment/control/debug/test/MMX registers are coded
1644 into the i.rm.reg field. */
1649 & (Reg
| SReg2
| SReg3
| Control
| Debug
1653 & (Reg
| SReg2
| SReg3
| Control
| Debug
1657 /* If there is an extension opcode to put here, the
1658 register number must be put into the regmem field. */
1659 if (i
.tm
.extension_opcode
!= None
)
1660 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
1662 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
1664 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1665 we must set it to 3 to indicate this is a register
1666 operand in the regmem field. */
1667 if (!i
.mem_operands
)
1671 /* Fill in i.rm.reg field with extension opcode (if any). */
1672 if (i
.tm
.extension_opcode
!= None
)
1673 i
.rm
.reg
= i
.tm
.extension_opcode
;
1677 uses_mem_addrmode
= 1;
1679 else if (i
.tm
.opcode_modifier
& Seg2ShortForm
)
1681 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1683 as_bad ("you can't `pop %%cs' on the 386.");
1686 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1688 else if (i
.tm
.opcode_modifier
& Seg3ShortForm
)
1690 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
1691 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
1692 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
1693 to change the opcode. */
1694 if (i
.regs
[0]->reg_num
== 5)
1695 i
.tm
.base_opcode
|= 0x08;
1697 else if ((i
.tm
.base_opcode
& ~DW
) == MOV_AX_DISP32
)
1699 /* This is a special non-modrm instruction
1700 that addresses memory with a 32-bit displacement mode anyway,
1701 and thus requires an address-size prefix if in 16-bit mode. */
1702 uses_mem_addrmode
= 1;
1705 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
1707 /* For the string instructions that allow a segment override
1708 on one of their operands, the default segment is ds. */
1712 /* GAS currently doesn't support 16-bit memory addressing modes at all,
1713 so if we're writing 16-bit code and using a memory addressing mode,
1714 always spew out an address size prefix. */
1715 if (uses_mem_addrmode
&& flag_16bit_code
)
1717 if (! check_prefix (ADDR_PREFIX_OPCODE
))
1719 i
.prefix
[i
.prefixes
++] = ADDR_PREFIX_OPCODE
;
1722 /* If a segment was explicitly specified,
1723 and the specified segment is not the default,
1724 use an opcode prefix to select it.
1725 If we never figured out what the default segment is,
1726 then default_seg will be zero at this point,
1727 and the specified segment prefix will always be used. */
1728 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
1730 if (! check_prefix (i
.seg
[0]->seg_prefix
))
1732 i
.prefix
[i
.prefixes
++] = i
.seg
[0]->seg_prefix
;
1737 /* Handle conversion of 'int $3' --> special int3 insn. */
1738 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1740 i
.tm
.base_opcode
= INT3_OPCODE
;
1744 /* We are ready to output the insn. */
1749 if (i
.tm
.opcode_modifier
& Jump
)
1751 unsigned long n
= i
.disps
[0]->X_add_number
;
1753 if (i
.prefixes
!= 0)
1754 as_warn ("skipping prefixes on this instruction");
1756 if (i
.disps
[0]->X_op
== O_constant
)
1758 if (fits_in_signed_byte (n
))
1762 p
[0] = i
.tm
.base_opcode
;
1766 { /* It's an absolute word/dword displacement. */
1768 /* Use 16-bit jumps only for 16-bit code,
1769 because text segments are limited to 64K anyway;
1770 Use 32-bit jumps for 32-bit code, because they're faster,
1771 and a 16-bit jump will clear the top 16 bits of %eip. */
1772 int jmp_size
= flag_16bit_code
? 2 : 4;
1773 if (flag_16bit_code
&& !fits_in_signed_word (n
))
1775 as_bad ("16-bit jump out of range");
1779 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
1781 /* unconditional jump */
1782 p
= frag_more (1 + jmp_size
);
1783 insn_size
+= 1 + jmp_size
;
1785 md_number_to_chars (&p
[1], (valueT
) n
, jmp_size
);
1789 /* conditional jump */
1790 p
= frag_more (2 + jmp_size
);
1791 insn_size
+= 2 + jmp_size
;
1792 p
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1793 p
[1] = i
.tm
.base_opcode
+ 0x10;
1794 md_number_to_chars (&p
[2], (valueT
) n
, jmp_size
);
1800 if (flag_16bit_code
)
1802 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1806 /* It's a symbol; end frag & setup for relax.
1807 Make sure there are more than 6 chars left in the current frag;
1808 if not we'll have to start a new one. */
1812 p
[0] = i
.tm
.base_opcode
;
1813 frag_var (rs_machine_dependent
,
1814 6, /* 2 opcode/prefix + 4 displacement */
1816 ((unsigned char) *p
== JUMP_PC_RELATIVE
1817 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
)
1818 : ENCODE_RELAX_STATE (COND_JUMP
, BYTE
)),
1819 i
.disps
[0]->X_add_symbol
,
1823 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
1825 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
1826 unsigned long n
= i
.disps
[0]->X_add_number
;
1829 /* The jcx/jecx instruction might need a data size prefix. */
1830 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1832 if (*q
== WORD_PREFIX_OPCODE
)
1834 /* The jcxz/jecxz instructions are marked with Data16
1835 and Data32, which means that they may get
1836 WORD_PREFIX_OPCODE added to the list of prefixes.
1837 However, the are correctly distinguished using
1838 ADDR_PREFIX_OPCODE. Here we look for
1839 WORD_PREFIX_OPCODE, and actually emit
1840 ADDR_PREFIX_OPCODE. This is a hack, but, then, so
1841 is the instruction itself.
1843 If an explicit suffix is used for the loop
1844 instruction, that actually controls whether we use
1845 cx vs. ecx. This is also controlled by
1848 I don't know if there is any valid case in which we
1849 want to emit WORD_PREFIX_OPCODE, but I am keeping
1850 the old behaviour for safety. */
1852 if (IS_JUMP_ON_CX_ZERO (i
.tm
.base_opcode
)
1853 || IS_LOOP_ECX_TIMES (i
.tm
.base_opcode
))
1854 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
1856 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1862 if ((size
== 4) && (flag_16bit_code
))
1864 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1868 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
1870 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
1875 p
= frag_more (2); /* opcode can be at most two bytes */
1877 /* put out high byte first: can't use md_number_to_chars! */
1878 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1879 *p
= i
.tm
.base_opcode
& 0xff;
1882 p
= frag_more (size
);
1884 if (i
.disps
[0]->X_op
== O_constant
)
1886 md_number_to_chars (p
, (valueT
) n
, size
);
1887 if (size
== 1 && !fits_in_signed_byte (n
))
1889 as_bad ("loop/jecx only takes byte displacement; %lu shortened to %d",
1895 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1896 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
1900 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
1902 if (i
.prefixes
!= 0)
1903 as_warn ("skipping prefixes on this instruction");
1905 if (flag_16bit_code
)
1907 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1911 p
= frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1912 insn_size
+= 1 + 2 + 4;
1913 p
[0] = i
.tm
.base_opcode
;
1914 if (i
.imms
[1]->X_op
== O_constant
)
1915 md_number_to_chars (p
+ 1, (valueT
) i
.imms
[1]->X_add_number
, 4);
1917 fix_new_exp (frag_now
, p
+ 1 - frag_now
->fr_literal
, 4,
1918 i
.imms
[1], 0, BFD_RELOC_32
);
1919 if (i
.imms
[0]->X_op
!= O_constant
)
1920 as_bad ("can't handle non absolute segment in long call/jmp");
1921 md_number_to_chars (p
+ 5, (valueT
) i
.imms
[0]->X_add_number
, 2);
1925 /* Output normal instructions here. */
1928 /* Hack for fwait. It must come before any prefixes, as it
1929 really is an instruction rather than a prefix. */
1930 if ((i
.tm
.opcode_modifier
& FWait
) != 0)
1934 md_number_to_chars (p
, (valueT
) FWAIT_OPCODE
, 1);
1937 /* The prefix bytes. */
1938 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1942 md_number_to_chars (p
, (valueT
) *q
, 1);
1945 /* Now the opcode; be careful about word order here! */
1946 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
1948 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
1951 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
1955 /* put out high byte first: can't use md_number_to_chars! */
1956 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1957 *p
= i
.tm
.base_opcode
& 0xff;
1960 { /* opcode is either 3 or 4 bytes */
1961 if (i
.tm
.base_opcode
& 0xff000000)
1965 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
1972 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
1973 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1974 *p
= (i
.tm
.base_opcode
) & 0xff;
1977 /* Now the modrm byte and base index byte (if present). */
1978 if (i
.tm
.opcode_modifier
& Modrm
)
1982 /* md_number_to_chars (p, i.rm, 1); */
1983 md_number_to_chars (p
,
1984 (valueT
) (i
.rm
.regmem
<< 0
1988 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1989 ==> need second modrm byte. */
1990 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
&& i
.rm
.mode
!= 3)
1994 /* md_number_to_chars (p, i.bi, 1); */
1995 md_number_to_chars (p
, (valueT
) (i
.bi
.base
<< 0
2002 if (i
.disp_operands
)
2004 register unsigned int n
;
2006 for (n
= 0; n
< i
.operands
; n
++)
2010 if (i
.disps
[n
]->X_op
== O_constant
)
2012 if (i
.types
[n
] & (Disp8
| Abs8
))
2016 md_number_to_chars (p
,
2017 (valueT
) i
.disps
[n
]->X_add_number
,
2020 else if (i
.types
[n
] & (Disp16
| Abs16
))
2024 md_number_to_chars (p
,
2025 (valueT
) i
.disps
[n
]->X_add_number
,
2029 { /* Disp32|Abs32 */
2032 md_number_to_chars (p
,
2033 (valueT
) i
.disps
[n
]->X_add_number
,
2038 { /* not absolute_section */
2039 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
2042 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2044 TC_RELOC(i
.disp_reloc
[n
], BFD_RELOC_32
));
2048 } /* end displacement output */
2050 /* output immediate */
2053 register unsigned int n
;
2055 for (n
= 0; n
< i
.operands
; n
++)
2059 if (i
.imms
[n
]->X_op
== O_constant
)
2061 if (i
.types
[n
] & (Imm8
| Imm8S
))
2065 md_number_to_chars (p
,
2066 (valueT
) i
.imms
[n
]->X_add_number
,
2069 else if (i
.types
[n
] & Imm16
)
2073 md_number_to_chars (p
,
2074 (valueT
) i
.imms
[n
]->X_add_number
,
2081 md_number_to_chars (p
,
2082 (valueT
) i
.imms
[n
]->X_add_number
,
2087 { /* not absolute_section */
2088 /* Need a 32-bit fixup (don't support 8bit
2089 non-absolute ims). Try to support other
2095 if (i
.types
[n
] & (Imm8
| Imm8S
))
2097 else if (i
.types
[n
] & Imm16
)
2101 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2102 p
= frag_more (size
);
2104 #ifdef BFD_ASSEMBLER
2105 if (r_type
== BFD_RELOC_32
2107 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2108 && (i
.imms
[n
]->X_op
== O_symbol
2109 || (i
.imms
[n
]->X_op
== O_add
2110 && (i
.imms
[n
]->X_op_symbol
->sy_value
.X_op
2113 r_type
= BFD_RELOC_386_GOTPC
;
2114 i
.imms
[n
]->X_add_number
+= 3;
2117 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2118 i
.imms
[n
], pcrel
, r_type
);
2122 } /* end immediate output */
2130 #endif /* DEBUG386 */
2134 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
2138 i386_operand (operand_string
)
2139 char *operand_string
;
2141 register char *op_string
= operand_string
;
2143 /* Address of '\0' at end of operand_string. */
2144 char *end_of_operand_string
= operand_string
+ strlen (operand_string
);
2146 /* Start and end of displacement string expression (if found). */
2147 char *displacement_string_start
= NULL
;
2148 char *displacement_string_end
= NULL
;
2150 /* We check for an absolute prefix (differentiating,
2151 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
2152 if (*op_string
== ABSOLUTE_PREFIX
)
2155 i
.types
[this_operand
] |= JumpAbsolute
;
2158 /* Check if operand is a register. */
2159 if (*op_string
== REGISTER_PREFIX
)
2161 register reg_entry
*r
;
2162 if (!(r
= parse_register (op_string
)))
2164 as_bad ("bad register name `%s'", op_string
);
2167 /* Check for segment override, rather than segment register by
2168 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
2169 if ((r
->reg_type
& (SReg2
| SReg3
)) && op_string
[3] == ':')
2174 i
.seg
[i
.mem_operands
] = (seg_entry
*) & es
;
2177 i
.seg
[i
.mem_operands
] = (seg_entry
*) & cs
;
2180 i
.seg
[i
.mem_operands
] = (seg_entry
*) & ss
;
2183 i
.seg
[i
.mem_operands
] = (seg_entry
*) & ds
;
2186 i
.seg
[i
.mem_operands
] = (seg_entry
*) & fs
;
2189 i
.seg
[i
.mem_operands
] = (seg_entry
*) & gs
;
2192 op_string
+= 4; /* skip % <x> s : */
2193 operand_string
= op_string
; /* Pretend given string starts here. */
2194 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
2195 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
2197 as_bad ("bad memory operand `%s'", op_string
);
2200 /* Handle case of %es:*foo. */
2201 if (*op_string
== ABSOLUTE_PREFIX
)
2204 i
.types
[this_operand
] |= JumpAbsolute
;
2206 goto do_memory_reference
;
2208 i
.types
[this_operand
] |= r
->reg_type
;
2209 i
.regs
[this_operand
] = r
;
2212 else if (*op_string
== IMMEDIATE_PREFIX
)
2213 { /* ... or an immediate */
2214 char *save_input_line_pointer
;
2218 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2220 as_bad ("only 1 or 2 immediate operands are allowed");
2224 exp
= &im_expressions
[i
.imm_operands
++];
2225 i
.imms
[this_operand
] = exp
;
2226 save_input_line_pointer
= input_line_pointer
;
2227 input_line_pointer
= ++op_string
; /* must advance op_string! */
2229 exp_seg
= expression (exp
);
2230 if (*input_line_pointer
!= '\0')
2232 /* This should be as_bad, but some versions of gcc, up to
2233 about 2.8 and egcs 1.01, generate a bogus @GOTOFF(%ebx)
2234 in certain cases. Oddly, the code in question turns out
2235 to work correctly anyhow, so we make this just a warning
2236 until those versions of gcc are obsolete. */
2237 as_warn ("unrecognized characters `%s' in expression",
2238 input_line_pointer
);
2240 input_line_pointer
= save_input_line_pointer
;
2242 if (exp
->X_op
== O_absent
)
2244 /* missing or bad expr becomes absolute 0 */
2245 as_bad ("missing or invalid immediate expression `%s' taken as 0",
2247 exp
->X_op
= O_constant
;
2248 exp
->X_add_number
= 0;
2249 exp
->X_add_symbol
= (symbolS
*) 0;
2250 exp
->X_op_symbol
= (symbolS
*) 0;
2251 i
.types
[this_operand
] |= Imm
;
2253 else if (exp
->X_op
== O_constant
)
2255 i
.types
[this_operand
] |=
2256 smallest_imm_type ((unsigned long) exp
->X_add_number
);
2259 else if (exp_seg
!= text_section
2260 && exp_seg
!= data_section
2261 && exp_seg
!= bss_section
2262 && exp_seg
!= undefined_section
2263 #ifdef BFD_ASSEMBLER
2264 && ! bfd_is_com_section (exp_seg
)
2269 as_bad ("Unimplemented segment type %d in parse_operand", exp_seg
);
2275 /* this is an address ==> 32bit */
2276 i
.types
[this_operand
] |= Imm32
;
2278 /* shorten this type of this operand if the instruction wants
2279 * fewer bits than are present in the immediate. The bit field
2280 * code can put out 'andb $0xffffff, %al', for example. pace
2281 * also 'movw $foo,(%eax)'
2285 case WORD_OPCODE_SUFFIX
:
2286 i
.types
[this_operand
] |= Imm16
;
2288 case BYTE_OPCODE_SUFFIX
:
2289 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2293 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
2294 || *op_string
== '(')
2296 /* This is a memory reference of some sort. */
2297 register char *base_string
;
2298 unsigned int found_base_index_form
;
2300 do_memory_reference
:
2301 if ((i
.mem_operands
== 1
2302 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
2303 || i
.mem_operands
== 2)
2305 as_bad ("too many memory references for `%s'",
2306 current_templates
->start
->name
);
2311 /* Determine type of memory operand from opcode_suffix;
2312 no opcode suffix implies general memory references. */
2315 case BYTE_OPCODE_SUFFIX
:
2316 i
.types
[this_operand
] |= Mem8
;
2318 case WORD_OPCODE_SUFFIX
:
2319 i
.types
[this_operand
] |= Mem16
;
2321 case DWORD_OPCODE_SUFFIX
:
2323 i
.types
[this_operand
] |= Mem32
;
2326 /* Check for base index form. We detect the base index form by
2327 looking for an ')' at the end of the operand, searching
2328 for the '(' matching it, and finding a REGISTER_PREFIX or ','
2330 base_string
= end_of_operand_string
- 1;
2331 found_base_index_form
= 0;
2332 if (*base_string
== ')')
2334 unsigned int parens_balanced
= 1;
2335 /* We've already checked that the number of left & right ()'s are
2336 equal, so this loop will not be infinite. */
2340 if (*base_string
== ')')
2342 if (*base_string
== '(')
2345 while (parens_balanced
);
2346 base_string
++; /* Skip past '('. */
2347 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
2348 found_base_index_form
= 1;
2351 /* If we can't parse a base index register expression, we've found
2352 a pure displacement expression. We set up displacement_string_start
2353 and displacement_string_end for the code below. */
2354 if (!found_base_index_form
)
2356 displacement_string_start
= op_string
;
2357 displacement_string_end
= end_of_operand_string
;
2361 char *base_reg_name
, *index_reg_name
, *num_string
;
2364 i
.types
[this_operand
] |= BaseIndex
;
2366 /* If there is a displacement set-up for it to be parsed later. */
2367 if (base_string
!= op_string
+ 1)
2369 displacement_string_start
= op_string
;
2370 displacement_string_end
= base_string
- 1;
2373 /* Find base register (if any). */
2374 if (*base_string
!= ',')
2376 base_reg_name
= base_string
++;
2377 /* skip past register name & parse it */
2378 while (isalpha (*base_string
))
2380 if (base_string
== base_reg_name
+ 1)
2382 as_bad ("can't find base register name after `(%c'",
2386 END_STRING_AND_SAVE (base_string
);
2387 if (!(i
.base_reg
= parse_register (base_reg_name
)))
2389 as_bad ("bad base register name `%s'", base_reg_name
);
2390 RESTORE_END_STRING (base_string
);
2393 RESTORE_END_STRING (base_string
);
2396 /* Now check seperator; must be ',' ==> index reg
2397 OR num ==> no index reg. just scale factor
2398 OR ')' ==> end. (scale factor = 1) */
2399 if (*base_string
!= ',' && *base_string
!= ')')
2401 as_bad ("expecting `,' or `)' after base register in `%s'",
2406 /* There may index reg here; and there may be a scale factor. */
2407 if (*base_string
== ',' && *(base_string
+ 1) == REGISTER_PREFIX
)
2409 index_reg_name
= ++base_string
;
2410 while (isalpha (*++base_string
));
2411 END_STRING_AND_SAVE (base_string
);
2412 if (!(i
.index_reg
= parse_register (index_reg_name
)))
2414 as_bad ("bad index register name `%s'", index_reg_name
);
2415 RESTORE_END_STRING (base_string
);
2418 RESTORE_END_STRING (base_string
);
2421 /* Check for scale factor. */
2422 if (*base_string
== ',' && isdigit (*(base_string
+ 1)))
2424 num_string
= ++base_string
;
2425 while (is_digit_char (*base_string
))
2427 if (base_string
== num_string
)
2429 as_bad ("can't find a scale factor after `,'");
2432 END_STRING_AND_SAVE (base_string
);
2433 /* We've got a scale factor. */
2434 if (!sscanf (num_string
, "%d", &num
))
2436 as_bad ("can't parse scale factor from `%s'", num_string
);
2437 RESTORE_END_STRING (base_string
);
2440 RESTORE_END_STRING (base_string
);
2442 { /* must be 1 digit scale */
2444 i
.log2_scale_factor
= 0;
2447 i
.log2_scale_factor
= 1;
2450 i
.log2_scale_factor
= 2;
2453 i
.log2_scale_factor
= 3;
2456 as_bad ("expecting scale factor of 1, 2, 4, 8; got %d", num
);
2462 if (!i
.index_reg
&& *base_string
== ',')
2464 as_bad ("expecting index register or scale factor after `,'; got '%c'",
2465 *(base_string
+ 1));
2471 /* If there's an expression begining the operand, parse it,
2472 assuming displacement_string_start and displacement_string_end
2474 if (displacement_string_start
)
2476 register expressionS
*exp
;
2478 char *save_input_line_pointer
;
2479 exp
= &disp_expressions
[i
.disp_operands
];
2480 i
.disps
[this_operand
] = exp
;
2481 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2483 save_input_line_pointer
= input_line_pointer
;
2484 input_line_pointer
= displacement_string_start
;
2485 END_STRING_AND_SAVE (displacement_string_end
);
2490 * We can have operands of the form
2491 * <symbol>@GOTOFF+<nnn>
2492 * Take the easy way out here and copy everything
2493 * into a temporary buffer...
2497 cp
= strchr (input_line_pointer
, '@');
2502 if (GOT_symbol
== NULL
)
2503 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2505 tmpbuf
= (char *) alloca ((cp
- input_line_pointer
) + 20);
2507 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2509 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2511 strcpy (tmpbuf
, input_line_pointer
);
2512 strcat (tmpbuf
, cp
+ 1 + 3);
2515 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2517 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2519 strcpy (tmpbuf
, input_line_pointer
);
2520 strcat (tmpbuf
, cp
+ 1 + 6);
2523 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2525 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2527 strcpy (tmpbuf
, input_line_pointer
);
2528 strcat (tmpbuf
, cp
+ 1 + 3);
2532 as_bad ("Bad reloc specifier `%s' in expression", cp
+ 1);
2534 input_line_pointer
= tmpbuf
;
2539 exp_seg
= expression (exp
);
2541 #ifdef BFD_ASSEMBLER
2542 /* We do this to make sure that the section symbol is in
2543 the symbol table. We will ultimately change the relocation
2544 to be relative to the beginning of the section */
2545 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2547 if (S_IS_LOCAL(exp
->X_add_symbol
)
2548 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2549 section_symbol(exp
->X_add_symbol
->bsym
->section
);
2550 assert (exp
->X_op
== O_symbol
);
2551 exp
->X_op
= O_subtract
;
2552 exp
->X_op_symbol
= GOT_symbol
;
2553 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2557 if (*input_line_pointer
)
2558 as_bad ("Ignoring junk `%s' after expression", input_line_pointer
);
2559 RESTORE_END_STRING (displacement_string_end
);
2560 input_line_pointer
= save_input_line_pointer
;
2561 if (exp
->X_op
== O_absent
)
2563 /* missing expr becomes absolute 0 */
2564 as_bad ("missing or invalid displacement `%s' taken as 0",
2566 i
.types
[this_operand
] |= (Disp
| Abs
);
2567 exp
->X_op
= O_constant
;
2568 exp
->X_add_number
= 0;
2569 exp
->X_add_symbol
= (symbolS
*) 0;
2570 exp
->X_op_symbol
= (symbolS
*) 0;
2572 else if (exp
->X_op
== O_constant
)
2574 i
.types
[this_operand
] |= SMALLEST_DISP_TYPE (exp
->X_add_number
);
2576 else if (exp_seg
== text_section
2577 || exp_seg
== data_section
2578 || exp_seg
== bss_section
2579 || exp_seg
== undefined_section
)
2581 i
.types
[this_operand
] |= Disp32
;
2586 i
.types
[this_operand
] |= Disp32
;
2588 goto seg_unimplemented
;
2593 /* Make sure the memory operand we've been dealt is valid. */
2594 if (i
.base_reg
&& i
.index_reg
&&
2595 !(i
.base_reg
->reg_type
& i
.index_reg
->reg_type
& Reg
))
2597 as_bad ("register size mismatch in (base,index,scale) expression");
2601 * special case for (%dx) while doing input/output op
2604 (i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)) &&
2605 (i
.index_reg
== 0)))
2607 i
.types
[this_operand
] |= InOutPortReg
;
2610 if ((i
.base_reg
&& (i
.base_reg
->reg_type
& Reg32
) == 0) ||
2611 (i
.index_reg
&& (i
.index_reg
->reg_type
& Reg32
) == 0))
2613 as_bad ("base/index register must be 32 bit register");
2616 if (i
.index_reg
&& i
.index_reg
== esp
)
2618 as_bad ("`%%s' may not be used as an index register", esp
->reg_name
);
2623 { /* it's not a memory operand; argh! */
2624 as_bad ("invalid char %s begining %s operand `%s'",
2625 output_invalid (*op_string
), ordinal_names
[this_operand
],
2629 return 1; /* normal return */
2633 * md_estimate_size_before_relax()
2635 * Called just before relax().
2636 * Any symbol that is now undefined will not become defined.
2637 * Return the correct fr_subtype in the frag.
2638 * Return the initial "guess for fr_var" to caller.
2639 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2640 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2641 * Although it may not be explicit in the frag, pretend fr_var starts with a
2645 md_estimate_size_before_relax (fragP
, segment
)
2646 register fragS
*fragP
;
2647 register segT segment
;
2649 register unsigned char *opcode
;
2650 register int old_fr_fix
;
2652 old_fr_fix
= fragP
->fr_fix
;
2653 opcode
= (unsigned char *) fragP
->fr_opcode
;
2654 /* We've already got fragP->fr_subtype right; all we have to do is check
2655 for un-relaxable symbols. */
2656 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2658 /* symbol is undefined in this segment */
2661 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2662 opcode
[0] = 0xe9; /* dword disp jmp */
2664 fix_new (fragP
, old_fr_fix
, 4,
2666 fragP
->fr_offset
, 1,
2667 (GOT_symbol
&& /* Not quite right - we should switch on
2668 presence of @PLT, but I cannot see how
2669 to get to that from here. We should have
2670 done this in md_assemble to really
2671 get it right all of the time, but I
2672 think it does not matter that much, as
2673 this will be right most of the time. ERY*/
2674 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)?
2675 BFD_RELOC_386_PLT32
: BFD_RELOC_32_PCREL
);
2679 /* This changes the byte-displacement jump 0x7N -->
2680 the dword-displacement jump 0x0f8N */
2681 opcode
[1] = opcode
[0] + 0x10;
2682 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2683 fragP
->fr_fix
+= 1 + 4; /* we've added an opcode byte */
2684 fix_new (fragP
, old_fr_fix
+ 1, 4,
2686 fragP
->fr_offset
, 1,
2687 (GOT_symbol
&& /* Not quite right - we should switch on
2688 presence of @PLT, but I cannot see how
2689 to get to that from here. ERY */
2690 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)?
2691 BFD_RELOC_386_PLT32
: BFD_RELOC_32_PCREL
);
2696 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2697 } /* md_estimate_size_before_relax() */
2700 * md_convert_frag();
2702 * Called after relax() is finished.
2703 * In: Address of frag.
2704 * fr_type == rs_machine_dependent.
2705 * fr_subtype is what the address relaxed to.
2707 * Out: Any fixSs and constants are set up.
2708 * Caller will turn frag into a ".space 0".
2710 #ifndef BFD_ASSEMBLER
2712 md_convert_frag (headers
, sec
, fragP
)
2713 object_headers
*headers
;
2715 register fragS
*fragP
;
2718 md_convert_frag (abfd
, sec
, fragP
)
2721 register fragS
*fragP
;
2724 register unsigned char *opcode
;
2725 unsigned char *where_to_put_displacement
= NULL
;
2726 unsigned int target_address
;
2727 unsigned int opcode_address
;
2728 unsigned int extension
= 0;
2729 int displacement_from_opcode_start
;
2731 opcode
= (unsigned char *) fragP
->fr_opcode
;
2733 /* Address we want to reach in file space. */
2734 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2735 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2736 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2739 /* Address opcode resides at in file space. */
2740 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2742 /* Displacement from opcode start to fill into instruction. */
2743 displacement_from_opcode_start
= target_address
- opcode_address
;
2745 switch (fragP
->fr_subtype
)
2747 case ENCODE_RELAX_STATE (COND_JUMP
, BYTE
):
2748 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
):
2749 /* don't have to change opcode */
2750 extension
= 1; /* 1 opcode + 1 displacement */
2751 where_to_put_displacement
= &opcode
[1];
2754 case ENCODE_RELAX_STATE (COND_JUMP
, WORD
):
2755 opcode
[1] = TWO_BYTE_OPCODE_ESCAPE
;
2756 opcode
[2] = opcode
[0] + 0x10;
2757 opcode
[0] = WORD_PREFIX_OPCODE
;
2758 extension
= 4; /* 3 opcode + 2 displacement */
2759 where_to_put_displacement
= &opcode
[3];
2762 case ENCODE_RELAX_STATE (UNCOND_JUMP
, WORD
):
2764 opcode
[0] = WORD_PREFIX_OPCODE
;
2765 extension
= 3; /* 2 opcode + 2 displacement */
2766 where_to_put_displacement
= &opcode
[2];
2769 case ENCODE_RELAX_STATE (COND_JUMP
, DWORD
):
2770 opcode
[1] = opcode
[0] + 0x10;
2771 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2772 extension
= 5; /* 2 opcode + 4 displacement */
2773 where_to_put_displacement
= &opcode
[2];
2776 case ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
):
2778 extension
= 4; /* 1 opcode + 4 displacement */
2779 where_to_put_displacement
= &opcode
[1];
2783 BAD_CASE (fragP
->fr_subtype
);
2786 /* now put displacement after opcode */
2787 md_number_to_chars ((char *) where_to_put_displacement
,
2788 (valueT
) (displacement_from_opcode_start
- extension
),
2789 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2790 fragP
->fr_fix
+= extension
;
2794 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2795 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2796 const int md_reloc_size
= 8; /* Size of relocation record */
2799 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2801 addressT from_addr
, to_addr
;
2807 offset
= to_addr
- (from_addr
+ 2);
2808 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
2809 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
2813 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2815 addressT from_addr
, to_addr
;
2821 if (flag_do_long_jump
)
2823 offset
= to_addr
- S_GET_VALUE (to_symbol
);
2824 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
2825 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2826 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
2827 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
2831 offset
= to_addr
- (from_addr
+ 5);
2832 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
2833 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2837 /* Apply a fixup (fixS) to segment data, once it has been determined
2838 by our caller that we have all the info we need to fix it up.
2840 On the 386, immediates, displacements, and data pointers are all in
2841 the same (little-endian) format, so we don't need to care about which
2845 md_apply_fix3 (fixP
, valp
, seg
)
2846 fixS
*fixP
; /* The fix we're to put in. */
2847 valueT
*valp
; /* Pointer to the value of the bits. */
2848 segT seg
; /* Segment fix is from. */
2850 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2851 valueT value
= *valp
;
2853 if (fixP
->fx_r_type
== BFD_RELOC_32
&& fixP
->fx_pcrel
)
2854 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
2856 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
2858 * This is a hack. There should be a better way to
2861 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
2864 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2865 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
)
2866 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2868 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
2869 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2870 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
2871 || (fixP
->fx_addsy
->bsym
->flags
& BSF_SECTION_SYM
) != 0))
2873 /* Yes, we add the values in twice. This is because
2874 bfd_perform_relocation subtracts them out again. I think
2875 bfd_perform_relocation is broken, but I don't dare change
2877 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2880 #if defined (OBJ_COFF) && defined (TE_PE)
2881 /* For some reason, the PE format does not store a section
2882 address offset for a PC relative symbol. */
2883 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
2884 value
+= md_pcrel_from (fixP
);
2888 /* Fix a few things - the dynamic linker expects certain values here,
2889 and we must not dissappoint it. */
2890 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
2891 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2893 switch(fixP
->fx_r_type
) {
2894 case BFD_RELOC_386_PLT32
:
2895 /* Make the jump instruction point to the address of the operand. At
2896 runtime we merely add the offset to the actual PLT entry. */
2899 case BFD_RELOC_386_GOTPC
:
2901 * This is tough to explain. We end up with this one if we have
2902 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
2903 * here is to obtain the absolute address of the GOT, and it is strongly
2904 * preferable from a performance point of view to avoid using a runtime
2905 * relocation for this. The actual sequence of instructions often look
2911 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
2913 * The call and pop essentially return the absolute address of
2914 * the label .L66 and store it in %ebx. The linker itself will
2915 * ultimately change the first operand of the addl so that %ebx points to
2916 * the GOT, but to keep things simple, the .o file must have this operand
2917 * set so that it generates not the absolute address of .L66, but the
2918 * absolute address of itself. This allows the linker itself simply
2919 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
2920 * added in, and the addend of the relocation is stored in the operand
2921 * field for the instruction itself.
2923 * Our job here is to fix the operand so that it would add the correct
2924 * offset so that %ebx would point to itself. The thing that is tricky is
2925 * that .-.L66 will point to the beginning of the instruction, so we need
2926 * to further modify the operand so that it will point to itself.
2927 * There are other cases where you have something like:
2929 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
2931 * and here no correction would be required. Internally in the assembler
2932 * we treat operands of this form as not being pcrel since the '.' is
2933 * explicitly mentioned, and I wonder whether it would simplify matters
2934 * to do it this way. Who knows. In earlier versions of the PIC patches,
2935 * the pcrel_adjust field was used to store the correction, but since the
2936 * expression is not pcrel, I felt it would be confusing to do it this way.
2940 case BFD_RELOC_386_GOT32
:
2941 value
= 0; /* Fully resolved at runtime. No addend. */
2943 case BFD_RELOC_386_GOTOFF
:
2952 md_number_to_chars (p
, value
, fixP
->fx_size
);
2958 /* This is never used. */
2959 long /* Knows about the byte order in a word. */
2960 md_chars_to_number (con
, nbytes
)
2961 unsigned char con
[]; /* Low order byte 1st. */
2962 int nbytes
; /* Number of bytes in the input. */
2965 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
2967 retval
<<= BITS_PER_CHAR
;
2975 #define MAX_LITTLENUMS 6
2977 /* Turn the string pointed to by litP into a floating point constant of type
2978 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2979 is stored in *sizeP . An error message is returned, or NULL on OK. */
2981 md_atof (type
, litP
, sizeP
)
2987 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2988 LITTLENUM_TYPE
*wordP
;
3010 return "Bad call to md_atof ()";
3012 t
= atof_ieee (input_line_pointer
, type
, words
);
3014 input_line_pointer
= t
;
3016 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
3017 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
3018 the bigendian 386. */
3019 for (wordP
= words
+ prec
- 1; prec
--;)
3021 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
3022 litP
+= sizeof (LITTLENUM_TYPE
);
3027 char output_invalid_buf
[8];
3034 sprintf (output_invalid_buf
, "'%c'", c
);
3036 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
3037 return output_invalid_buf
;
3040 /* reg_string starts *before* REGISTER_PREFIX */
3042 parse_register (reg_string
)
3045 register char *s
= reg_string
;
3047 char reg_name_given
[MAX_REG_NAME_SIZE
];
3049 s
++; /* skip REGISTER_PREFIX */
3050 for (p
= reg_name_given
; is_register_char (*s
); p
++, s
++)
3052 *p
= register_chars
[(unsigned char) *s
];
3053 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
3054 return (reg_entry
*) 0;
3057 return (reg_entry
*) hash_find (reg_hash
, reg_name_given
);
3061 CONST
char *md_shortopts
= "kmVQ:";
3063 CONST
char *md_shortopts
= "m";
3065 struct option md_longopts
[] = {
3066 {NULL
, no_argument
, NULL
, 0}
3068 size_t md_longopts_size
= sizeof(md_longopts
);
3071 md_parse_option (c
, arg
)
3078 flag_do_long_jump
= 1;
3081 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3082 /* -k: Ignore for FreeBSD compatibility. */
3086 /* -V: SVR4 argument to print version ID. */
3088 print_version_id ();
3091 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
3092 should be emitted or not. FIXME: Not implemented. */
3104 md_show_usage (stream
)
3108 -m do long jump\n");
3111 #ifdef BFD_ASSEMBLER
3112 #ifdef OBJ_MAYBE_ELF
3113 #ifdef OBJ_MAYBE_COFF
3115 /* Pick the target format to use. */
3118 i386_target_format ()
3120 switch (OUTPUT_FLAVOR
)
3122 case bfd_target_coff_flavour
:
3124 case bfd_target_elf_flavour
:
3125 return "elf32-i386";
3132 #endif /* OBJ_MAYBE_COFF */
3133 #endif /* OBJ_MAYBE_ELF */
3134 #endif /* BFD_ASSEMBLER */
3138 md_undefined_symbol (name
)
3141 if (*name
== '_' && *(name
+1) == 'G'
3142 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3146 if(symbol_find(name
))
3147 as_bad("GOT already in symbol table");
3148 GOT_symbol
= symbol_new (name
, undefined_section
,
3149 (valueT
) 0, &zero_address_frag
);
3156 /* Round up a section size to the appropriate boundary. */
3158 md_section_align (segment
, size
)
3163 #ifdef BFD_ASSEMBLER
3164 /* For a.out, force the section size to be aligned. If we don't do
3165 this, BFD will align it for us, but it will not write out the
3166 final bytes of the section. This may be a bug in BFD, but it is
3167 easier to fix it here since that is how the other a.out targets
3171 align
= bfd_get_section_alignment (stdoutput
, segment
);
3172 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
3179 /* Exactly what point is a PC-relative offset relative TO? On the
3180 i386, they're relative to the address of the offset, plus its
3181 size. (??? Is this right? FIXME-SOON!) */
3183 md_pcrel_from (fixP
)
3186 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3197 temp
= get_absolute_expression ();
3198 subseg_set (bss_section
, (subsegT
) temp
);
3199 demand_empty_rest_of_line ();
3205 #ifdef BFD_ASSEMBLER
3208 i386_validate_fix (fixp
)
3211 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
3213 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
3218 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
3219 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
3222 tc_gen_reloc (section
, fixp
)
3227 bfd_reloc_code_real_type code
;
3229 switch(fixp
->fx_r_type
)
3231 case BFD_RELOC_386_PLT32
:
3232 case BFD_RELOC_386_GOT32
:
3233 case BFD_RELOC_386_GOTOFF
:
3234 case BFD_RELOC_386_GOTPC
:
3236 code
= fixp
->fx_r_type
;
3239 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
3241 MAP (1, 0, BFD_RELOC_8
);
3242 MAP (2, 0, BFD_RELOC_16
);
3243 MAP (4, 0, BFD_RELOC_32
);
3244 MAP (1, 1, BFD_RELOC_8_PCREL
);
3245 MAP (2, 1, BFD_RELOC_16_PCREL
);
3246 MAP (4, 1, BFD_RELOC_32_PCREL
);
3248 as_bad ("Can not do %d byte %srelocation", fixp
->fx_size
,
3249 fixp
->fx_pcrel
? "pc-relative " : "");
3255 if (code
== BFD_RELOC_32
3257 && fixp
->fx_addsy
== GOT_symbol
)
3258 code
= BFD_RELOC_386_GOTPC
;
3260 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3261 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
3262 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3264 rel
->addend
= fixp
->fx_addnumber
;
3268 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3269 if (rel
->howto
== NULL
)
3271 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3272 "Cannot represent relocation type %s",
3273 bfd_get_reloc_code_name (code
));
3274 /* Set howto to a garbage value so that we can keep going. */
3275 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3276 assert (rel
->howto
!= NULL
);
3282 #else /* ! BFD_ASSEMBLER */
3284 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
3286 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3289 relax_addressT segment_address_in_file
;
3292 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3293 * Out: GNU LD relocation length code: 0, 1, or 2.
3296 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3299 know (fixP
->fx_addsy
!= NULL
);
3301 md_number_to_chars (where
,
3302 (valueT
) (fixP
->fx_frag
->fr_address
3303 + fixP
->fx_where
- segment_address_in_file
),
3306 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3307 ? S_GET_TYPE (fixP
->fx_addsy
)
3308 : fixP
->fx_addsy
->sy_number
);
3310 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
3311 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3312 where
[4] = r_symbolnum
& 0x0ff;
3313 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
3314 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
3315 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
3318 #endif /* OBJ_AOUT or OBJ_BOUT */
3320 #if defined (I386COFF)
3323 tc_coff_fix2rtype (fixP
)
3326 if (fixP
->fx_r_type
== R_IMAGEBASE
)
3329 return (fixP
->fx_pcrel
?
3330 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
3331 fixP
->fx_size
== 2 ? R_PCRWORD
:
3333 (fixP
->fx_size
== 1 ? R_RELBYTE
:
3334 fixP
->fx_size
== 2 ? R_RELWORD
:
3339 tc_coff_sizemachdep (frag
)
3343 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
3348 #endif /* I386COFF */
3350 #endif /* BFD_ASSEMBLER? */
3352 /* end of tc-i386.c */