1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 1991 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 1, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
32 #include "i386-opcode.h"
34 /* 'md_assemble ()' gathers together information and puts it into a
38 /* TM holds the template for the insn were currently assembling. */
40 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
42 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
44 /* OPERANDS gives the number of given operands. */
45 unsigned int operands
;
47 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number of
48 given register, displacement, memory operands and immediate operands. */
49 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
51 /* TYPES [i] is the type (see above #defines) which tells us how to
52 search through DISPS [i] & IMMS [i] & REGS [i] for the required
54 unsigned int types
[MAX_OPERANDS
];
56 /* Displacements (if given) for each operand. */
57 expressionS
* disps
[MAX_OPERANDS
];
59 /* Immediate operands (if given) for each operand. */
60 expressionS
* imms
[MAX_OPERANDS
];
62 /* Register operands (if given) for each operand. */
63 reg_entry
* regs
[MAX_OPERANDS
];
65 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
66 the base index byte below. */
68 reg_entry
* index_reg
;
69 unsigned int log2_scale_factor
;
71 /* SEG gives the seg_entry of this insn. It is equal to zero unless
72 an explicit segment override is given. */
73 seg_entry
* seg
; /* segment for memory operands (if given) */
75 /* PREFIX holds all the given prefix opcodes (usually null).
76 PREFIXES is the size of PREFIX. */
77 char prefix
[MAX_PREFIXES
];
78 unsigned int prefixes
;
80 /* RM and IB are the modrm byte and the base index byte where the addressing
81 modes of this insn are encoded. */
87 char FLT_CHARS
[] = "fFdDxX";
88 char EXP_CHARS
[] = "eE";
89 char line_comment_chars
[] = "#";
90 char comment_chars
[] = "#/";
92 /* tables for lexical analysis */
93 static char opcode_chars
[256];
94 static char register_chars
[256];
95 static char operand_chars
[256];
96 static char space_chars
[256];
97 static char identifier_chars
[256];
98 static char digit_chars
[256];
101 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
102 #define is_operand_char(x) (operand_chars[(unsigned char) x])
103 #define is_register_char(x) (register_chars[(unsigned char) x])
104 #define is_space_char(x) (space_chars[(unsigned char) x])
105 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
106 #define is_digit_char(x) (digit_chars[(unsigned char) x])
108 /* put here all non-digit non-letter charcters that may occur in an operand */
109 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:";
111 static char *ordinal_names
[] = { "first", "second", "third" }; /* for printfs */
113 /* md_assemble() always leaves the strings it's passed unaltered. To
114 effect this we maintain a stack of saved characters that we've smashed
115 with '\0's (indicating end of strings for various sub-fields of the
116 assembler instruction). */
117 static char save_stack
[32];
118 static char *save_stack_p
; /* stack pointer */
119 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
120 #define RESTORE_END_STRING(s) *s = *--save_stack_p
122 /* The instruction we're assembling. */
125 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
126 static expressionS disp_expressions
[2], im_expressions
[2];
128 /* pointers to ebp & esp entries in reg_hash hash table */
129 static reg_entry
*ebp
, *esp
;
131 static int this_operand
; /* current operand we are working on */
134 Interface to relax_segment.
135 There are 2 relax states for 386 jump insns: one for conditional & one
136 for unconditional jumps. This is because the these two types of jumps
137 add different sizes to frags when we're figuring out what sort of jump
138 to choose to reach a given label. */
141 #define COND_JUMP 1 /* conditional jump */
142 #define UNCOND_JUMP 2 /* unconditional jump */
147 #define UNKNOWN_SIZE 3
149 #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size))
150 #define SIZE_FROM_RELAX_STATE(s) \
151 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
153 const relax_typeS md_relax_table
[] = {
156 1) most positive reach of this state,
157 2) most negative reach of this state,
158 3) how many bytes this mode will add to the size of the current frag
159 4) which index into the table to try if we can't fit into this one.
166 /* For now we don't use word displacement jumps: they may be
168 {127+1, -128+1, 0, ENCODE_RELAX_STATE(COND_JUMP
,DWORD
) },
169 /* word conditionals add 3 bytes to frag:
170 2 opcode prefix; 1 displacement bytes */
171 {32767+2, -32768+2, 3, ENCODE_RELAX_STATE(COND_JUMP
,DWORD
) },
172 /* dword conditionals adds 4 bytes to frag:
173 1 opcode prefix; 3 displacement bytes */
177 {127+1, -128+1, 0, ENCODE_RELAX_STATE(UNCOND_JUMP
,DWORD
) },
178 /* word jmp adds 2 bytes to frag:
179 1 opcode prefix; 1 displacement bytes */
180 {32767+2, -32768+2, 2, ENCODE_RELAX_STATE(UNCOND_JUMP
,DWORD
) },
181 /* dword jmp adds 3 bytes to frag:
182 0 opcode prefix; 3 displacement bytes */
190 static char *output_invalid(int c
);
191 static int i386_operand(char *operand_string
);
192 static reg_entry
*parse_register(char *reg_string
);
196 static char *output_invalid();
197 static int i386_operand();
198 static reg_entry
*parse_register();
200 #endif /* __STDC__ */
203 /* Ignore certain directives generated by gcc. This probably should
207 while (*input_line_pointer
&& *input_line_pointer
!= '\n')
208 input_line_pointer
++;
211 const pseudo_typeS md_pseudo_table
[] = {
212 { "ffloat", float_cons
, 'f' },
213 { "dfloat", float_cons
, 'd' },
214 { "tfloat", float_cons
, 'x' },
215 { "value", cons
, 2 },
216 { "ident", dummy
, 0 }, /* ignore these directives */
217 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
219 #endif /* OBJ_AOUT or OBJ_BOUT */
221 { "optim", dummy
, 0 }, /* For sun386i cc */
222 { "version", dummy
, 0 },
223 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
225 #endif /* OBJ_AOUT or OBJ_BOUT */
230 /* for interface with expression () */
231 extern char * input_line_pointer
;
233 /* obstack for constructing various things in md_begin */
236 /* hash table for opcode lookup */
237 static struct hash_control
*op_hash
= (struct hash_control
*) 0;
238 /* hash table for register lookup */
239 static struct hash_control
*reg_hash
= (struct hash_control
*) 0;
240 /* hash table for prefix lookup */
241 static struct hash_control
*prefix_hash
= (struct hash_control
*) 0;
248 obstack_begin (&o
,4096);
250 /* initialize op_hash hash table */
251 op_hash
= hash_new(); /* xmalloc handles error */
254 register const template *optab
;
255 register templates
*core_optab
;
258 optab
= i386_optab
; /* setup for loop */
259 prev_name
= optab
->name
;
260 obstack_grow (&o
, optab
, sizeof(template));
261 core_optab
= (templates
*) xmalloc (sizeof (templates
));
263 for (optab
++; optab
< i386_optab_end
; optab
++) {
264 if (! strcmp (optab
->name
, prev_name
)) {
265 /* same name as before --> append to current template list */
266 obstack_grow (&o
, optab
, sizeof(template));
268 /* different name --> ship out current template list;
269 add to hash table; & begin anew */
270 /* Note: end must be set before start! since obstack_next_free changes
271 upon opstack_finish */
272 core_optab
->end
= (template *) obstack_next_free(&o
);
273 core_optab
->start
= (template *) obstack_finish(&o
);
274 hash_err
= hash_insert (op_hash
, prev_name
, (char *) core_optab
);
275 if (hash_err
&& *hash_err
) {
277 as_fatal("Internal Error: Can't hash %s: %s", prev_name
, hash_err
);
279 prev_name
= optab
->name
;
280 core_optab
= (templates
*) xmalloc (sizeof(templates
));
281 obstack_grow (&o
, optab
, sizeof(template));
286 /* initialize reg_hash hash table */
287 reg_hash
= hash_new();
289 register const reg_entry
*regtab
;
291 for (regtab
= i386_regtab
; regtab
< i386_regtab_end
; regtab
++) {
292 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, regtab
);
293 if (hash_err
&& *hash_err
) goto hash_error
;
297 esp
= (reg_entry
*) hash_find (reg_hash
, "esp");
298 ebp
= (reg_entry
*) hash_find (reg_hash
, "ebp");
300 /* initialize reg_hash hash table */
301 prefix_hash
= hash_new();
303 register const prefix_entry
*prefixtab
;
305 for (prefixtab
= i386_prefixtab
;
306 prefixtab
< i386_prefixtab_end
; prefixtab
++) {
307 hash_err
= hash_insert (prefix_hash
, prefixtab
->prefix_name
, prefixtab
);
308 if (hash_err
&& *hash_err
) goto hash_error
;
312 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
314 register unsigned int c
;
316 bzero (opcode_chars
, sizeof(opcode_chars
));
317 bzero (operand_chars
, sizeof(operand_chars
));
318 bzero (space_chars
, sizeof(space_chars
));
319 bzero (identifier_chars
, sizeof(identifier_chars
));
320 bzero (digit_chars
, sizeof(digit_chars
));
322 for (c
= 0; c
< 256; c
++) {
323 if (islower(c
) || isdigit(c
)) {
325 register_chars
[c
] = c
;
326 } else if (isupper(c
)) {
327 opcode_chars
[c
] = tolower(c
);
328 register_chars
[c
] = opcode_chars
[c
];
329 } else if (c
== PREFIX_SEPERATOR
) {
331 } else if (c
== ')' || c
== '(') {
332 register_chars
[c
] = c
;
335 if (isupper(c
) || islower(c
) || isdigit(c
))
336 operand_chars
[c
] = c
;
337 else if (c
&& strchr(operand_special_chars
, c
))
338 operand_chars
[c
] = c
;
340 if (isdigit(c
) || c
== '-') digit_chars
[c
] = c
;
342 if (isalpha(c
) || c
== '_' || c
== '.' || isdigit(c
))
343 identifier_chars
[c
] = c
;
345 if (c
== ' ' || c
== '\t') space_chars
[c
] = c
;
350 void md_end() {} /* not much to do here. */
355 /* debugging routines for md_assemble */
356 /* static void pi (), pte (), pt (), pe (), ps (); */
358 static void pi (line
, x
)
362 register template *p
;
365 fprintf (stdout
, "%s: template ", line
);
367 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
368 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
369 fprintf (stdout
, " base %x index %x scale %x\n",
370 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
371 for (i
= 0; i
< x
->operands
; i
++) {
372 fprintf (stdout
, " #%d: ", i
+1);
374 fprintf (stdout
, "\n");
375 if (x
->types
[i
] & Reg
) fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
376 if (x
->types
[i
] & Imm
) pe (x
->imms
[i
]);
377 if (x
->types
[i
] & (Disp
|Abs
)) pe (x
->disps
[i
]);
385 fprintf (stdout
, " %d operands ", t
->operands
);
386 fprintf (stdout
, "opcode %x ",
388 if (t
->extension_opcode
!= None
)
389 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
390 if (t
->opcode_modifier
&D
)
391 fprintf (stdout
, "D");
392 if (t
->opcode_modifier
&W
)
393 fprintf (stdout
, "W");
394 fprintf (stdout
, "\n");
395 for (i
= 0; i
< t
->operands
; i
++) {
396 fprintf (stdout
, " #%d type ", i
+1);
397 pt (t
->operand_types
[i
]);
398 fprintf (stdout
, "\n");
405 fprintf (stdout
, " segment %s\n", segment_name (e
->X_seg
));
406 fprintf (stdout
, " add_number %d (%x)\n",
407 e
->X_add_number
, e
->X_add_number
);
408 if (e
->X_add_symbol
) {
409 fprintf (stdout
, " add_symbol ");
410 ps (e
->X_add_symbol
);
411 fprintf (stdout
, "\n");
413 if (e
->X_subtract_symbol
) {
414 fprintf (stdout
, " sub_symbol ");
415 ps (e
->X_subtract_symbol
);
416 fprintf (stdout
, "\n");
423 fprintf (stdout
, "%s type %s%s",
425 S_IS_EXTERNAL(s
) ? "EXTERNAL " : "",
426 segment_name(S_GET_SEGMENT(s
)));
433 { Reg8
, "r8" }, { Reg16
, "r16" }, { Reg32
, "r32" }, { Imm8
, "i8" },
435 { Imm16
, "i16" }, { Imm32
, "i32" }, { Mem8
, "Mem8"}, { Mem16
, "Mem16"},
436 { Mem32
, "Mem32"}, { BaseIndex
, "BaseIndex" },
437 { Abs8
, "Abs8" }, { Abs16
, "Abs16" }, { Abs32
, "Abs32" },
438 { Disp8
, "d8" }, { Disp16
, "d16" },
439 { Disp32
, "d32" }, { SReg2
, "SReg2" }, { SReg3
, "SReg3" }, { Acc
, "Acc" },
440 { InOutPortReg
, "InOutPortReg" }, { ShiftCount
, "ShiftCount" },
441 { Imm1
, "i1" }, { Control
, "control reg" }, {Test
, "test reg"},
442 { FloatReg
, "FReg"}, {FloatAcc
, "FAcc"},
443 { JumpAbsolute
, "Jump Absolute"},
450 register struct type_name
*ty
;
453 fprintf (stdout
, "Unknown");
455 for (ty
= type_names
; ty
->mask
; ty
++)
456 if (t
& ty
->mask
) fprintf (stdout
, "%s, ", ty
->tname
);
461 #endif /* DEBUG386 */
464 This is the guts of the machine-dependent assembler. LINE points to a
465 machine dependent instruction. This funciton is supposed to emit
466 the frags/bytes it assembles to.
468 void md_assemble (line
)
471 /* Holds temlate once we've found it. */
472 register template * t
;
474 /* Possible templates for current insn */
475 templates
*current_templates
= (templates
*) 0;
477 /* Initialize globals. */
478 bzero (&i
, sizeof(i
));
479 bzero (disp_expressions
, sizeof(disp_expressions
));
480 bzero (im_expressions
, sizeof(im_expressions
));
481 save_stack_p
= save_stack
; /* reset stack pointer */
483 /* Fist parse an opcode & call i386_operand for the operands.
484 We assume that the scrubber has arranged it so that line[0] is the valid
485 start of a (possibly prefixed) opcode. */
487 register char *l
= line
; /* Fast place to put LINE. */
489 /* 1 if operand is pending after ','. */
490 unsigned int expecting_operand
= 0;
491 /* 1 if we found a prefix only acceptable with string insns. */
492 unsigned int expecting_string_instruction
= 0;
493 /* Non-zero if operand parens not balenced. */
494 unsigned int paren_not_balenced
;
495 char * token_start
= l
;
497 while (! is_space_char(*l
) && *l
!= END_OF_INSN
) {
498 if (! is_opcode_char(*l
)) {
499 as_bad("invalid character %s in opcode", output_invalid(*l
));
501 } else if (*l
!= PREFIX_SEPERATOR
) {
502 *l
= opcode_chars
[(unsigned char) *l
]; /* fold case of opcodes */
504 } else { /* this opcode's got a prefix */
505 register unsigned int q
;
506 register prefix_entry
* prefix
;
508 if (l
== token_start
) {
509 as_bad("expecting prefix; got nothing");
512 END_STRING_AND_SAVE (l
);
513 prefix
= (prefix_entry
*) hash_find (prefix_hash
, token_start
);
515 as_bad("no such opcode prefix ('%s')", token_start
);
518 RESTORE_END_STRING (l
);
519 /* check for repeated prefix */
520 for (q
= 0; q
< i
.prefixes
; q
++)
521 if (i
.prefix
[q
] == prefix
->prefix_code
) {
522 as_bad("same prefix used twice; you don't really want this!");
525 if (i
.prefixes
== MAX_PREFIXES
) {
526 as_bad("too many opcode prefixes");
529 i
.prefix
[i
.prefixes
++] = prefix
->prefix_code
;
530 if (prefix
->prefix_code
== REPE
|| prefix
->prefix_code
== REPNE
)
531 expecting_string_instruction
= 1;
532 /* skip past PREFIX_SEPERATOR and reset token_start */
536 END_STRING_AND_SAVE (l
);
537 if (token_start
== l
) {
538 as_bad("expecting opcode; got nothing");
542 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
543 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
544 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
545 if (! current_templates
) {
546 int last_index
= strlen(token_start
) - 1;
547 char last_char
= token_start
[last_index
];
549 case DWORD_OPCODE_SUFFIX
:
550 case WORD_OPCODE_SUFFIX
:
551 case BYTE_OPCODE_SUFFIX
:
552 token_start
[last_index
] = '\0';
553 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
554 token_start
[last_index
] = last_char
;
555 i
.suffix
= last_char
;
557 if (!current_templates
) {
558 as_bad("no such 386 instruction: `%s'", token_start
); return;
561 RESTORE_END_STRING (l
);
563 /* check for rep/repne without a string instruction */
564 if (expecting_string_instruction
&&
565 ! IS_STRING_INSTRUCTION (current_templates
->
566 start
->base_opcode
)) {
567 as_bad("expecting string instruction after rep/repne");
571 /* There may be operands to parse. */
572 if (*l
!= END_OF_INSN
&&
573 /* For string instructions, we ignore any operands if given. This
574 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
575 the operands are always going to be the same, and are not really
576 encoded in machine code. */
577 ! IS_STRING_INSTRUCTION (current_templates
->
578 start
->base_opcode
)) {
581 /* skip optional white space before operand */
582 while (! is_operand_char(*l
) && *l
!= END_OF_INSN
) {
583 if (! is_space_char(*l
)) {
584 as_bad("invalid character %s before %s operand",
586 ordinal_names
[i
.operands
]);
591 token_start
= l
; /* after white space */
592 paren_not_balenced
= 0;
593 while (paren_not_balenced
|| *l
!= ',') {
594 if (*l
== END_OF_INSN
) {
595 if (paren_not_balenced
) {
596 as_bad("unbalenced parenthesis in %s operand.",
597 ordinal_names
[i
.operands
]);
599 } else break; /* we are done */
600 } else if (! is_operand_char(*l
)) {
601 as_bad("invalid character %s in %s operand",
603 ordinal_names
[i
.operands
]);
606 if (*l
== '(') ++paren_not_balenced
;
607 if (*l
== ')') --paren_not_balenced
;
610 if (l
!= token_start
) { /* yes, we've read in another operand */
611 unsigned int operand_ok
;
612 this_operand
= i
.operands
++;
613 if (i
.operands
> MAX_OPERANDS
) {
614 as_bad("spurious operands; (%d operands/instruction max)",
618 /* now parse operand adding info to 'i' as we go along */
619 END_STRING_AND_SAVE (l
);
620 operand_ok
= i386_operand (token_start
);
621 RESTORE_END_STRING (l
); /* restore old contents */
622 if (!operand_ok
) return;
624 if (expecting_operand
) {
625 expecting_operand_after_comma
:
626 as_bad("expecting operand after ','; got nothing");
630 as_bad("expecting operand before ','; got nothing");
635 /* now *l must be either ',' or END_OF_INSN */
637 if (*++l
== END_OF_INSN
) { /* just skip it, if it's \n complain */
638 goto expecting_operand_after_comma
;
640 expecting_operand
= 1;
642 } while (*l
!= END_OF_INSN
); /* until we get end of insn */
646 /* Now we've parsed the opcode into a set of templates, and have the
648 Next, we find a template that matches the given insn,
649 making sure the overlap of the given operands types is consistent
650 with the template operand types. */
652 #define MATCH(overlap,given_type) \
654 (overlap & (JumpAbsolute|BaseIndex|Mem8)) \
655 == (given_type & (JumpAbsolute|BaseIndex|Mem8)))
657 /* If m0 and m1 are register matches they must be consistent
658 with the expected operand types t0 and t1.
659 That is, if both m0 & m1 are register matches
660 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
661 then, either 1. or 2. must be true:
662 1. the expected operand type register overlap is null:
665 the given register overlap is null:
667 2. the expected operand type register overlap == the given
668 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
670 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
671 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
672 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
673 ((t0 & t1) & (m0 & m1) & (Reg)) \
676 register unsigned int overlap0
, overlap1
;
678 unsigned int overlap2
;
679 unsigned int found_reverse_match
;
681 overlap0
= overlap1
= overlap2
= found_reverse_match
= 0;
682 for (t
= current_templates
->start
;
683 t
< current_templates
->end
;
686 /* must have right number of operands */
687 if (i
.operands
!= t
->operands
) continue;
688 else if (!t
->operands
) break; /* 0 operands always matches */
690 overlap0
= i
.types
[0] & t
->operand_types
[0];
691 switch (t
->operands
) {
693 if (! MATCH (overlap0
,i
.types
[0])) continue;
696 overlap1
= i
.types
[1] & t
->operand_types
[1];
697 if (! MATCH (overlap0
,i
.types
[0]) ||
698 ! MATCH (overlap1
,i
.types
[1]) ||
699 ! CONSISTENT_REGISTER_MATCH(overlap0
, overlap1
,
701 t
->operand_types
[1])) {
703 /* check if other direction is valid ... */
704 if (! (t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
))
707 /* try reversing direction of operands */
708 overlap0
= i
.types
[0] & t
->operand_types
[1];
709 overlap1
= i
.types
[1] & t
->operand_types
[0];
710 if (! MATCH (overlap0
,i
.types
[0]) ||
711 ! MATCH (overlap1
,i
.types
[1]) ||
712 ! CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
714 t
->operand_types
[1])) {
715 /* does not match either direction */
718 /* found a reverse match here -- slip through */
719 /* found_reverse_match holds which of D or FloatD we've found */
720 found_reverse_match
= t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
;
721 } /* endif: not forward match */
722 /* found either forward/reverse 2 operand match here */
723 if (t
->operands
== 3) {
724 overlap2
= i
.types
[2] & t
->operand_types
[2];
725 if (! MATCH (overlap2
,i
.types
[2]) ||
726 ! CONSISTENT_REGISTER_MATCH (overlap0
, overlap2
,
728 t
->operand_types
[2]) ||
729 ! CONSISTENT_REGISTER_MATCH (overlap1
, overlap2
,
731 t
->operand_types
[2]))
734 /* found either forward/reverse 2 or 3 operand match here:
735 slip through to break */
737 break; /* we've found a match; break out of loop */
739 if (t
== current_templates
->end
) { /* we found no match */
740 as_bad("operands given don't match any known 386 instruction");
744 /* Copy the template we found (we may change it!). */
745 bcopy (t
, &i
.tm
, sizeof (template));
746 t
= &i
.tm
; /* alter new copy of template */
748 /* If there's no opcode suffix we try to invent one based on register
750 if (! i
.suffix
&& i
.reg_operands
) {
751 /* We take i.suffix from the LAST register operand specified. This
752 assumes that the last register operands is the destination register
755 for (o
= 0; o
< MAX_OPERANDS
; o
++)
756 if (i
.types
[o
] & Reg
) {
757 i
.suffix
= (i
.types
[o
] == Reg8
) ? BYTE_OPCODE_SUFFIX
:
758 (i
.types
[o
] == Reg16
) ? WORD_OPCODE_SUFFIX
:
763 /* Make still unresolved immediate matches conform to size of immediate
764 given in i.suffix. Note: overlap2 cannot be an immediate!
766 if ((overlap0
& (Imm8
|Imm8S
|Imm16
|Imm32
))
767 && overlap0
!= Imm8
&& overlap0
!= Imm8S
768 && overlap0
!= Imm16
&& overlap0
!= Imm32
) {
770 as_bad("no opcode suffix given; can't determine immediate size");
773 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
|Imm8S
) :
774 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
776 if ((overlap1
& (Imm8
|Imm8S
|Imm16
|Imm32
))
777 && overlap1
!= Imm8
&& overlap1
!= Imm8S
778 && overlap1
!= Imm16
&& overlap1
!= Imm32
) {
780 as_bad("no opcode suffix given; can't determine immediate size");
783 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
|Imm8S
) :
784 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
787 i
.types
[0] = overlap0
;
788 i
.types
[1] = overlap1
;
789 i
.types
[2] = overlap2
;
791 if (overlap0
& ImplicitRegister
) i
.reg_operands
--;
792 if (overlap1
& ImplicitRegister
) i
.reg_operands
--;
793 if (overlap2
& ImplicitRegister
) i
.reg_operands
--;
794 if (overlap0
& Imm1
) i
.imm_operands
= 0; /* kludge for shift insns */
796 if (found_reverse_match
) {
798 save
= t
->operand_types
[0];
799 t
->operand_types
[0] = t
->operand_types
[1];
800 t
->operand_types
[1] = save
;
803 /* Finalize opcode. First, we change the opcode based on the operand
804 size given by i.suffix: we never have to change things for byte insns,
805 or when no opcode suffix is need to size the operands. */
807 if (! i
.suffix
&& (t
->opcode_modifier
& W
)) {
808 as_bad("no opcode suffix given and no register operands; can't size instruction");
812 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
) {
813 /* Select between byte and word/dword operations. */
814 if (t
->opcode_modifier
& W
)
816 /* Now select between word & dword operations via the
817 operand size prefix. */
818 if (i
.suffix
== WORD_OPCODE_SUFFIX
) {
819 if (i
.prefixes
== MAX_PREFIXES
) {
820 as_bad("%d prefixes given and 'w' opcode suffix gives too many prefixes",
824 i
.prefix
[i
.prefixes
++] = WORD_PREFIX_OPCODE
;
828 /* For insns with operands there are more diddles to do to the opcode. */
830 /* If we found a reverse match we must alter the opcode direction bit
831 found_reverse_match holds bit to set (different for int &
834 if (found_reverse_match
) {
835 t
->base_opcode
|= found_reverse_match
;
839 The imul $imm, %reg instruction is converted into
840 imul $imm, %reg, %reg. */
841 if (t
->opcode_modifier
& imulKludge
) {
842 i
.regs
[2] = i
.regs
[1]; /* Pretend we saw the 3 operand case. */
846 /* Certain instructions expect the destination to be in the i.rm.reg
847 field. This is by far the exceptional case. For these instructions,
848 if the source operand is a register, we must reverse the i.rm.reg
849 and i.rm.regmem fields. We accomplish this by faking that the
850 two register operands were given in the reverse order. */
851 if ((t
->opcode_modifier
& ReverseRegRegmem
) && i
.reg_operands
== 2) {
852 unsigned int first_reg_operand
= (i
.types
[0] & Reg
) ? 0 : 1;
853 unsigned int second_reg_operand
= first_reg_operand
+ 1;
854 reg_entry
*tmp
= i
.regs
[first_reg_operand
];
855 i
.regs
[first_reg_operand
] = i
.regs
[second_reg_operand
];
856 i
.regs
[second_reg_operand
] = tmp
;
859 if (t
->opcode_modifier
& ShortForm
) {
860 /* The register or float register operand is in operand 0 or 1. */
861 unsigned int o
= (i
.types
[0] & (Reg
|FloatReg
)) ? 0 : 1;
862 /* Register goes in low 3 bits of opcode. */
863 t
->base_opcode
|= i
.regs
[o
]->reg_num
;
864 } else if (t
->opcode_modifier
& ShortFormW
) {
865 /* Short form with 0x8 width bit. Register is always dest. operand */
866 t
->base_opcode
|= i
.regs
[1]->reg_num
;
867 if (i
.suffix
== WORD_OPCODE_SUFFIX
||
868 i
.suffix
== DWORD_OPCODE_SUFFIX
)
869 t
->base_opcode
|= 0x8;
870 } else if (t
->opcode_modifier
& Seg2ShortForm
) {
871 if (t
->base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1) {
872 as_bad("you can't 'pop cs' on the 386.");
875 t
->base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
876 } else if (t
->opcode_modifier
& Seg3ShortForm
) {
877 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
878 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
879 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
880 to change the opcode. */
881 if (i
.regs
[0]->reg_num
== 5)
882 t
->base_opcode
|= 0x08;
883 } else if (t
->opcode_modifier
& Modrm
) {
884 /* The opcode is completed (modulo t->extension_opcode which must
885 be put into the modrm byte.
886 Now, we make the modrm & index base bytes based on all the info
889 /* i.reg_operands MUST be the number of real register operands;
890 implicit registers do not count. */
891 if (i
.reg_operands
== 2) {
892 unsigned int source
, dest
;
893 source
= (i
.types
[0] & (Reg
|SReg2
|SReg3
|Control
|Debug
|Test
)) ? 0 : 1;
896 /* We must be careful to make sure that all segment/control/test/
897 debug registers go into the i.rm.reg field (despite the whether
898 they are source or destination operands). */
899 if (i
.regs
[dest
]->reg_type
& (SReg2
|SReg3
|Control
|Debug
|Test
)) {
900 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
901 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
903 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
904 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
906 } else { /* if it's not 2 reg operands... */
907 if (i
.mem_operands
) {
908 unsigned int fake_zero_displacement
= 0;
909 unsigned int o
= (i
.types
[0] & Mem
) ? 0 : ((i
.types
[1] & Mem
) ? 1 : 2);
911 /* Encode memory operand into modrm byte and base index byte. */
913 if (i
.base_reg
== esp
&& ! i
.index_reg
) {
914 /* <disp>(%esp) becomes two byte modrm with no index register. */
915 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
916 i
.rm
.mode
= MODE_FROM_DISP_SIZE (i
.types
[o
]);
917 i
.bi
.base
= ESP_REG_NUM
;
918 i
.bi
.index
= NO_INDEX_REGISTER
;
919 i
.bi
.scale
= 0; /* Must be zero! */
920 } else if (i
.base_reg
== ebp
&& !i
.index_reg
) {
921 if (! (i
.types
[o
] & Disp
)) {
922 /* Must fake a zero byte displacement.
923 There is no direct way to code '(%ebp)' directly. */
924 fake_zero_displacement
= 1;
925 /* fake_zero_displacement code does not set this. */
928 i
.rm
.mode
= MODE_FROM_DISP_SIZE (i
.types
[o
]);
929 i
.rm
.regmem
= EBP_REG_NUM
;
930 } else if (! i
.base_reg
&& (i
.types
[o
] & BaseIndex
)) {
931 /* There are three cases here.
932 Case 1: '<32bit disp>(,1)' -- indirect absolute.
933 (Same as cases 2 & 3 with NO index register)
934 Case 2: <32bit disp> (,<index>) -- no base register with disp
935 Case 3: (, <index>) --- no base register;
936 no disp (must add 32bit 0 disp). */
937 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
938 i
.rm
.mode
= 0; /* 32bit mode */
939 i
.bi
.base
= NO_BASE_REGISTER
;
941 i
.types
[o
] |= Disp32
; /* Must be 32bit! */
942 if (i
.index_reg
) { /* case 2 or case 3 */
943 i
.bi
.index
= i
.index_reg
->reg_num
;
944 i
.bi
.scale
= i
.log2_scale_factor
;
945 if (i
.disp_operands
== 0)
946 fake_zero_displacement
= 1; /* case 3 */
948 i
.bi
.index
= NO_INDEX_REGISTER
;
951 } else if (i
.disp_operands
&& !i
.base_reg
&& !i
.index_reg
) {
952 /* Operand is just <32bit disp> */
953 i
.rm
.regmem
= EBP_REG_NUM
;
956 i
.types
[o
] |= Disp32
;
958 /* It's not a special case; rev'em up. */
959 i
.rm
.regmem
= i
.base_reg
->reg_num
;
960 i
.rm
.mode
= MODE_FROM_DISP_SIZE (i
.types
[o
]);
962 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
963 i
.bi
.base
= i
.base_reg
->reg_num
;
964 i
.bi
.index
= i
.index_reg
->reg_num
;
965 i
.bi
.scale
= i
.log2_scale_factor
;
966 if (i
.base_reg
== ebp
&& i
.disp_operands
== 0) { /* pace */
967 fake_zero_displacement
= 1;
969 i
.rm
.mode
= MODE_FROM_DISP_SIZE (i
.types
[o
]);
973 if (fake_zero_displacement
) {
974 /* Fakes a zero displacement assuming that i.types[o] holds
975 the correct displacement size. */
976 exp
= &disp_expressions
[i
.disp_operands
++];
978 exp
->X_seg
= SEG_ABSOLUTE
;
979 exp
->X_add_number
= 0;
980 exp
->X_add_symbol
= (symbolS
*) 0;
981 exp
->X_subtract_symbol
= (symbolS
*) 0;
984 /* Select the correct segment for the memory operand. */
986 const unsigned int seg_index
;
987 const seg_entry
* default_seg
;
989 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
) {
990 seg_index
= (i
.rm
.mode
<<3) | i
.bi
.base
;
991 default_seg
= two_byte_segment_defaults
[seg_index
];
993 seg_index
= (i
.rm
.mode
<<3) | i
.rm
.regmem
;
994 default_seg
= one_byte_segment_defaults
[seg_index
];
996 /* If the specified segment is not the default, use an
997 opcode prefix to select it */
998 if (i
.seg
!= default_seg
) {
999 if (i
.prefixes
== MAX_PREFIXES
) {
1000 as_bad("%d prefixes given and %s segment override gives too many prefixes",
1001 MAX_PREFIXES
, i
.seg
->seg_name
);
1004 i
.prefix
[i
.prefixes
++] = i
.seg
->seg_prefix
;
1009 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1010 (if any) based on t->extension_opcode. Again, we must be careful
1011 to make sure that segment/control/debug/test registers are coded
1012 into the i.rm.reg field. */
1013 if (i
.reg_operands
) {
1015 (i
.types
[0] & (Reg
|SReg2
|SReg3
|Control
|Debug
|Test
)) ? 0 :
1016 (i
.types
[1] & (Reg
|SReg2
|SReg3
|Control
|Debug
|Test
)) ? 1 : 2;
1017 /* If there is an extension opcode to put here, the register number
1018 must be put into the regmem field. */
1019 if (t
->extension_opcode
!= None
)
1020 i
.rm
.regmem
= i
.regs
[o
]->reg_num
;
1021 else i
.rm
.reg
= i
.regs
[o
]->reg_num
;
1023 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1024 we must set it to 3 to indicate this is a register operand
1025 int the regmem field */
1026 if (! i
.mem_operands
) i
.rm
.mode
= 3;
1029 /* Fill in i.rm.reg field with extension opcode (if any). */
1030 if (t
->extension_opcode
!= None
)
1031 i
.rm
.reg
= t
->extension_opcode
;
1037 /* Handle conversion of 'int $3' --> special int3 insn. */
1038 if (t
->base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3) {
1039 t
->base_opcode
= INT3_OPCODE
;
1043 /* We are ready to output the insn. */
1048 if (t
->opcode_modifier
& Jump
) {
1049 int n
= i
.disps
[0]->X_add_number
;
1051 switch (i
.disps
[0]->X_seg
) {
1053 if (FITS_IN_SIGNED_BYTE (n
)) {
1055 p
[0] = t
->base_opcode
;
1057 #if 0 /* leave out 16 bit jumps - pace */
1058 } else if (FITS_IN_SIGNED_WORD (n
)) {
1060 p
[0] = WORD_PREFIX_OPCODE
;
1061 p
[1] = t
->base_opcode
;
1062 md_number_to_chars (&p
[2], n
, 2);
1064 } else { /* It's an absolute dword displacement. */
1065 if (t
->base_opcode
== JUMP_PC_RELATIVE
) { /* pace */
1066 /* unconditional jump */
1069 md_number_to_chars (&p
[1], n
, 4);
1071 /* conditional jump */
1073 p
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1074 p
[1] = t
->base_opcode
+ 0x10;
1075 md_number_to_chars (&p
[2], n
, 4);
1080 /* It's a symbol; end frag & setup for relax.
1081 Make sure there are 6 chars left in the current frag; if not
1082 we'll have to start a new one. */
1083 /* I caught it failing with obstack_room == 6,
1084 so I changed to <= pace */
1085 if (obstack_room (&frags
) <= 6) {
1086 frag_wane(frag_now
);
1090 p
[0] = t
->base_opcode
;
1091 frag_var (rs_machine_dependent
,
1092 6, /* 2 opcode/prefix + 4 displacement */
1094 ((unsigned char) *p
== JUMP_PC_RELATIVE
1095 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
)
1096 : ENCODE_RELAX_STATE (COND_JUMP
, BYTE
)),
1097 i
.disps
[0]->X_add_symbol
,
1101 } else if (t
->opcode_modifier
& (JumpByte
|JumpDword
)) {
1102 int size
= (t
->opcode_modifier
& JumpByte
) ? 1 : 4;
1103 int n
= i
.disps
[0]->X_add_number
;
1105 if (FITS_IN_UNSIGNED_BYTE(t
->base_opcode
)) {
1106 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1108 p
= frag_more (2); /* opcode can be at most two bytes */
1109 /* put out high byte first: can't use md_number_to_chars! */
1110 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1111 *p
= t
->base_opcode
& 0xff;
1114 p
= frag_more (size
);
1115 switch (i
.disps
[0]->X_seg
) {
1117 md_number_to_chars (p
, n
, size
);
1118 if (size
== 1 && ! FITS_IN_SIGNED_BYTE (n
)) {
1119 as_bad("loop/jecx only takes byte displacement; %d shortened to %d",
1124 fix_new (frag_now
, p
- frag_now
->fr_literal
, size
,
1125 i
.disps
[0]->X_add_symbol
, i
.disps
[0]->X_subtract_symbol
,
1126 i
.disps
[0]->X_add_number
, 1, NO_RELOC
);
1129 } else if (t
->opcode_modifier
& JumpInterSegment
) {
1130 p
= frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1131 p
[0] = t
->base_opcode
;
1132 if (i
.imms
[1]->X_seg
== SEG_ABSOLUTE
)
1133 md_number_to_chars (p
+ 1, i
.imms
[1]->X_add_number
, 4);
1135 fix_new (frag_now
, p
+ 1 - frag_now
->fr_literal
, 4,
1136 i
.imms
[1]->X_add_symbol
,
1137 i
.imms
[1]->X_subtract_symbol
,
1138 i
.imms
[1]->X_add_number
, 0, NO_RELOC
);
1139 if (i
.imms
[0]->X_seg
!= SEG_ABSOLUTE
)
1140 as_bad("can't handle non absolute segment in long call/jmp");
1141 md_number_to_chars (p
+ 5, i
.imms
[0]->X_add_number
, 2);
1143 /* Output normal instructions here. */
1146 /* First the prefix bytes. */
1147 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++) {
1149 md_number_to_chars (p
, (unsigned int) *q
, 1);
1152 /* Now the opcode; be careful about word order here! */
1153 if (FITS_IN_UNSIGNED_BYTE(t
->base_opcode
)) {
1154 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1155 } else if (FITS_IN_UNSIGNED_WORD(t
->base_opcode
)) {
1157 /* put out high byte first: can't use md_number_to_chars! */
1158 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1159 *p
= t
->base_opcode
& 0xff;
1160 } else { /* opcode is either 3 or 4 bytes */
1161 if (t
->base_opcode
& 0xff000000) {
1163 *p
++ = (t
->base_opcode
>> 24) & 0xff;
1164 } else p
= frag_more (3);
1165 *p
++ = (t
->base_opcode
>> 16) & 0xff;
1166 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1167 *p
= (t
->base_opcode
) & 0xff;
1170 /* Now the modrm byte and base index byte (if present). */
1171 if (t
->opcode_modifier
& Modrm
) {
1173 /* md_number_to_chars (p, i.rm, 1); */
1174 md_number_to_chars (p
, (i
.rm
.regmem
<<0 | i
.rm
.reg
<<3 | i
.rm
.mode
<<6), 1);
1175 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1176 ==> need second modrm byte. */
1177 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
&& i
.rm
.mode
!= 3) {
1179 /* md_number_to_chars (p, i.bi, 1); */
1180 md_number_to_chars (p
,(i
.bi
.base
<<0 | i
.bi
.index
<<3 | i
.bi
.scale
<<6), 1);
1184 if (i
.disp_operands
) {
1185 register unsigned int n
;
1187 for (n
= 0; n
< i
.operands
; n
++) {
1189 if (i
.disps
[n
]->X_seg
== SEG_ABSOLUTE
) {
1190 if (i
.types
[n
] & (Disp8
|Abs8
)) {
1192 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 1);
1193 } else if (i
.types
[n
] & (Disp16
|Abs16
)) {
1195 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 2);
1196 } else { /* Disp32|Abs32 */
1198 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 4);
1200 } else { /* not SEG_ABSOLUTE */
1201 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1203 fix_new (frag_now
, p
- frag_now
->fr_literal
, 4,
1204 i
.disps
[n
]->X_add_symbol
, i
.disps
[n
]->X_subtract_symbol
,
1205 i
.disps
[n
]->X_add_number
, 0, NO_RELOC
);
1209 } /* end displacement output */
1211 /* output immediate */
1212 if (i
.imm_operands
) {
1213 register unsigned int n
;
1215 for (n
= 0; n
< i
.operands
; n
++) {
1217 if (i
.imms
[n
]->X_seg
== SEG_ABSOLUTE
) {
1218 if (i
.types
[n
] & (Imm8
|Imm8S
)) {
1220 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 1);
1221 } else if (i
.types
[n
] & Imm16
) {
1223 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 2);
1226 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 4);
1228 } else { /* not SEG_ABSOLUTE */
1229 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
1230 /* try to support other sizes ... */
1232 if (i
.types
[n
] & (Imm8
|Imm8S
))
1234 else if (i
.types
[n
] & Imm16
)
1238 p
= frag_more (size
);
1239 fix_new (frag_now
, p
- frag_now
->fr_literal
, size
,
1240 i
.imms
[n
]->X_add_symbol
, i
.imms
[n
]->X_subtract_symbol
,
1241 i
.imms
[n
]->X_add_number
, 0, NO_RELOC
);
1245 } /* end immediate output */
1249 if (flagseen
['D']) {
1252 #endif /* DEBUG386 */
1258 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1261 static int i386_operand (operand_string
)
1262 char *operand_string
;
1264 register char *op_string
= operand_string
;
1266 /* Address of '\0' at end of operand_string. */
1267 char * end_of_operand_string
= operand_string
+ strlen(operand_string
);
1269 /* Start and end of displacement string expression (if found). */
1270 char * displacement_string_start
= 0;
1271 char * displacement_string_end
;
1273 /* We check for an absolute prefix (differentiating,
1274 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1275 if (*op_string
== ABSOLUTE_PREFIX
) {
1277 i
.types
[this_operand
] |= JumpAbsolute
;
1280 /* Check if operand is a register. */
1281 if (*op_string
== REGISTER_PREFIX
) {
1282 register reg_entry
* r
;
1283 if (! (r
= parse_register (op_string
))) {
1284 as_bad("bad register name ('%s')", op_string
);
1287 /* Check for segment override, rather than segment register by
1288 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1289 if ((r
->reg_type
& (SReg2
|SReg3
)) && op_string
[3] == ':') {
1290 switch (r
->reg_num
) {
1304 op_string
+= 4; /* skip % <x> s : */
1305 operand_string
= op_string
; /* Pretend given string starts here. */
1306 if (!is_digit_char(*op_string
) && !is_identifier_char(*op_string
)
1307 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
) {
1308 as_bad("bad memory operand after segment override");
1311 /* Handle case of %es:*foo. */
1312 if (*op_string
== ABSOLUTE_PREFIX
) {
1314 i
.types
[this_operand
] |= JumpAbsolute
;
1316 goto do_memory_reference
;
1318 i
.types
[this_operand
] |= r
->reg_type
;
1319 i
.regs
[this_operand
] = r
;
1321 } else if (*op_string
== IMMEDIATE_PREFIX
) { /* ... or an immediate */
1322 char * save_input_line_pointer
;
1323 register expressionS
*exp
;
1325 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
) {
1326 as_bad("only 1 or 2 immediate operands are allowed");
1329 exp
= &im_expressions
[i
.imm_operands
++];
1330 i
.imms
[this_operand
] = exp
;
1331 save_input_line_pointer
= input_line_pointer
;
1332 input_line_pointer
= ++op_string
; /* must advance op_string! */
1333 exp_seg
= expression (exp
);
1334 input_line_pointer
= save_input_line_pointer
;
1336 case SEG_ABSENT
: /* missing or bad expr becomes absolute 0 */
1337 as_bad("missing or invalid immediate expression '%s' taken as 0",
1339 exp
->X_seg
= SEG_ABSOLUTE
;
1340 exp
->X_add_number
= 0;
1341 exp
->X_add_symbol
= (symbolS
*) 0;
1342 exp
->X_subtract_symbol
= (symbolS
*) 0;
1343 i
.types
[this_operand
] |= Imm
;
1346 i
.types
[this_operand
] |= SMALLEST_IMM_TYPE (exp
->X_add_number
);
1348 case SEG_TEXT
: case SEG_DATA
: case SEG_BSS
: case SEG_UNKNOWN
:
1349 i
.types
[this_operand
] |= Imm32
; /* this is an address ==> 32bit */
1353 as_bad("Unimplemented segment type %d in parse_operand", exp_seg
);
1356 /* shorten this type of this operand if the instruction wants
1357 * fewer bits than are present in the immediate. The bit field
1358 * code can put out 'andb $0xffffff, %al', for example. pace
1359 * also 'movw $foo,(%eax)'
1362 case WORD_OPCODE_SUFFIX
:
1363 i
.types
[this_operand
] |= Imm16
;
1365 case BYTE_OPCODE_SUFFIX
:
1366 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
1369 } else if (is_digit_char(*op_string
) || is_identifier_char(*op_string
)
1370 || *op_string
== '(') {
1371 /* This is a memory reference of some sort. */
1372 register char * base_string
;
1373 unsigned int found_base_index_form
;
1375 do_memory_reference
:
1376 if (i
.mem_operands
== MAX_MEMORY_OPERANDS
) {
1377 as_bad("more than 1 memory reference in instruction");
1382 /* Determine type of memory operand from opcode_suffix;
1383 no opcode suffix implies general memory references. */
1385 case BYTE_OPCODE_SUFFIX
:
1386 i
.types
[this_operand
] |= Mem8
;
1388 case WORD_OPCODE_SUFFIX
:
1389 i
.types
[this_operand
] |= Mem16
;
1391 case DWORD_OPCODE_SUFFIX
:
1393 i
.types
[this_operand
] |= Mem32
;
1396 /* Check for base index form. We detect the base index form by
1397 looking for an ')' at the end of the operand, searching
1398 for the '(' matching it, and finding a REGISTER_PREFIX or ','
1400 base_string
= end_of_operand_string
- 1;
1401 found_base_index_form
= 0;
1402 if (*base_string
== ')') {
1403 unsigned int parens_balenced
= 1;
1404 /* We've already checked that the number of left & right ()'s are equal,
1405 so this loop will not be infinite. */
1408 if (*base_string
== ')') parens_balenced
++;
1409 if (*base_string
== '(') parens_balenced
--;
1410 } while (parens_balenced
);
1411 base_string
++; /* Skip past '('. */
1412 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
1413 found_base_index_form
= 1;
1416 /* If we can't parse a base index register expression, we've found
1417 a pure displacement expression. We set up displacement_string_start
1418 and displacement_string_end for the code below. */
1419 if (! found_base_index_form
) {
1420 displacement_string_start
= op_string
;
1421 displacement_string_end
= end_of_operand_string
;
1423 char *base_reg_name
, *index_reg_name
, *num_string
;
1426 i
.types
[this_operand
] |= BaseIndex
;
1428 /* If there is a displacement set-up for it to be parsed later. */
1429 if (base_string
!= op_string
+ 1) {
1430 displacement_string_start
= op_string
;
1431 displacement_string_end
= base_string
- 1;
1434 /* Find base register (if any). */
1435 if (*base_string
!= ',') {
1436 base_reg_name
= base_string
++;
1437 /* skip past register name & parse it */
1438 while (isalpha(*base_string
)) base_string
++;
1439 if (base_string
== base_reg_name
+1) {
1440 as_bad("can't find base register name after '(%c'",
1444 END_STRING_AND_SAVE (base_string
);
1445 if (! (i
.base_reg
= parse_register (base_reg_name
))) {
1446 as_bad("bad base register name ('%s')", base_reg_name
);
1449 RESTORE_END_STRING (base_string
);
1452 /* Now check seperator; must be ',' ==> index reg
1453 OR num ==> no index reg. just scale factor
1454 OR ')' ==> end. (scale factor = 1) */
1455 if (*base_string
!= ',' && *base_string
!= ')') {
1456 as_bad("expecting ',' or ')' after base register in `%s'",
1461 /* There may index reg here; and there may be a scale factor. */
1462 if (*base_string
== ',' && *(base_string
+1) == REGISTER_PREFIX
) {
1463 index_reg_name
= ++base_string
;
1464 while (isalpha(*++base_string
));
1465 END_STRING_AND_SAVE (base_string
);
1466 if (! (i
.index_reg
= parse_register(index_reg_name
))) {
1467 as_bad("bad index register name ('%s')", index_reg_name
);
1470 RESTORE_END_STRING (base_string
);
1473 /* Check for scale factor. */
1474 if (*base_string
== ',' && isdigit(*(base_string
+1))) {
1475 num_string
= ++base_string
;
1476 while (is_digit_char(*base_string
)) base_string
++;
1477 if (base_string
== num_string
) {
1478 as_bad("can't find a scale factor after ','");
1481 END_STRING_AND_SAVE (base_string
);
1482 /* We've got a scale factor. */
1483 if (! sscanf (num_string
, "%d", &num
)) {
1484 as_bad("can't parse scale factor from '%s'", num_string
);
1487 RESTORE_END_STRING (base_string
);
1488 switch (num
) { /* must be 1 digit scale */
1489 case 1: i
.log2_scale_factor
= 0; break;
1490 case 2: i
.log2_scale_factor
= 1; break;
1491 case 4: i
.log2_scale_factor
= 2; break;
1492 case 8: i
.log2_scale_factor
= 3; break;
1494 as_bad("expecting scale factor of 1, 2, 4, 8; got %d", num
);
1498 if (! i
.index_reg
&& *base_string
== ',') {
1499 as_bad("expecting index register or scale factor after ','; got '%c'",
1506 /* If there's an expression begining the operand, parse it,
1507 assuming displacement_string_start and displacement_string_end
1509 if (displacement_string_start
) {
1510 register expressionS
* exp
;
1512 char * save_input_line_pointer
;
1513 exp
= &disp_expressions
[i
.disp_operands
];
1514 i
.disps
[this_operand
] = exp
;
1516 save_input_line_pointer
= input_line_pointer
;
1517 input_line_pointer
= displacement_string_start
;
1518 END_STRING_AND_SAVE (displacement_string_end
);
1519 exp_seg
= expression (exp
);
1520 if(*input_line_pointer
)
1521 as_bad("Ignoring junk '%s' after expression",input_line_pointer
);
1522 RESTORE_END_STRING (displacement_string_end
);
1523 input_line_pointer
= save_input_line_pointer
;
1526 /* missing expr becomes absolute 0 */
1527 as_bad("missing or invalid displacement '%s' taken as 0",
1529 i
.types
[this_operand
] |= (Disp
|Abs
);
1530 exp
->X_seg
= SEG_ABSOLUTE
;
1531 exp
->X_add_number
= 0;
1532 exp
->X_add_symbol
= (symbolS
*) 0;
1533 exp
->X_subtract_symbol
= (symbolS
*) 0;
1536 i
.types
[this_operand
] |= SMALLEST_DISP_TYPE (exp
->X_add_number
);
1538 case SEG_TEXT
: case SEG_DATA
: case SEG_BSS
:
1539 case SEG_UNKNOWN
: /* must be 32 bit displacement (i.e. address) */
1540 i
.types
[this_operand
] |= Disp32
;
1543 goto seg_unimplemented
;
1547 /* Make sure the memory operand we've been dealt is valid. */
1548 if (i
.base_reg
&& i
.index_reg
&&
1549 ! (i
.base_reg
->reg_type
& i
.index_reg
->reg_type
& Reg
)) {
1550 as_bad("register size mismatch in (base,index,scale) expression");
1553 if ((i
.base_reg
&& (i
.base_reg
->reg_type
& Reg32
) == 0) ||
1554 (i
.index_reg
&& (i
.index_reg
->reg_type
& Reg32
) == 0)) {
1555 as_bad("base/index register must be 32 bit register");
1558 if (i
.index_reg
&& i
.index_reg
== esp
) {
1559 as_bad("%s may not be used as an index register", esp
->reg_name
);
1562 } else { /* it's not a memory operand; argh! */
1563 as_bad("invalid char %s begining %s operand '%s'",
1564 output_invalid(*op_string
), ordinal_names
[this_operand
],
1568 return 1; /* normal return */
1572 * md_estimate_size_before_relax()
1574 * Called just before relax().
1575 * Any symbol that is now undefined will not become defined.
1576 * Return the correct fr_subtype in the frag.
1577 * Return the initial "guess for fr_var" to caller.
1578 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
1579 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
1580 * Although it may not be explicit in the frag, pretend fr_var starts with a
1584 md_estimate_size_before_relax (fragP
, segment
)
1585 register fragS
* fragP
;
1586 register segT segment
;
1588 register unsigned char * opcode
;
1589 register int old_fr_fix
;
1591 old_fr_fix
= fragP
-> fr_fix
;
1592 opcode
= (unsigned char *) fragP
-> fr_opcode
;
1593 /* We've already got fragP->fr_subtype right; all we have to do is check
1594 for un-relaxable symbols. */
1595 if (S_GET_SEGMENT(fragP
-> fr_symbol
) != segment
) {
1596 /* symbol is undefined in this segment */
1597 switch (opcode
[0]) {
1598 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
1599 opcode
[0] = 0xe9; /* dword disp jmp */
1600 fragP
-> fr_fix
+= 4;
1601 fix_new (fragP
, old_fr_fix
, 4,
1604 fragP
-> fr_offset
, 1, NO_RELOC
);
1608 /* This changes the byte-displacement jump 0x7N -->
1609 the dword-displacement jump 0x0f8N */
1610 opcode
[1] = opcode
[0] + 0x10;
1611 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
1612 fragP
-> fr_fix
+= 1 + 4; /* we've added an opcode byte */
1613 fix_new (fragP
, old_fr_fix
+ 1, 4,
1616 fragP
-> fr_offset
, 1, NO_RELOC
);
1621 return (fragP
-> fr_var
+ fragP
-> fr_fix
- old_fr_fix
);
1622 } /* md_estimate_size_before_relax() */
1625 * md_convert_frag();
1627 * Called after relax() is finished.
1628 * In: Address of frag.
1629 * fr_type == rs_machine_dependent.
1630 * fr_subtype is what the address relaxed to.
1632 * Out: Any fixSs and constants are set up.
1633 * Caller will turn frag into a ".space 0".
1636 md_convert_frag (fragP
)
1637 register fragS
* fragP
;
1639 register unsigned char * opcode
;
1640 unsigned char * where_to_put_displacement
;
1641 unsigned int target_address
, opcode_address
;
1642 unsigned int extension
;
1643 int displacement_from_opcode_start
;
1645 opcode
= (unsigned char *) fragP
-> fr_opcode
;
1647 /* Address we want to reach in file space. */
1648 target_address
= S_GET_VALUE(fragP
->fr_symbol
) + fragP
->fr_offset
;
1650 /* Address opcode resides at in file space. */
1651 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
1653 /* Displacement from opcode start to fill into instruction. */
1654 displacement_from_opcode_start
= target_address
- opcode_address
;
1656 switch (fragP
->fr_subtype
) {
1657 case ENCODE_RELAX_STATE (COND_JUMP
, BYTE
):
1658 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
):
1659 /* don't have to change opcode */
1660 extension
= 1; /* 1 opcode + 1 displacement */
1661 where_to_put_displacement
= &opcode
[1];
1664 case ENCODE_RELAX_STATE (COND_JUMP
, WORD
):
1665 opcode
[1] = TWO_BYTE_OPCODE_ESCAPE
;
1666 opcode
[2] = opcode
[0] + 0x10;
1667 opcode
[0] = WORD_PREFIX_OPCODE
;
1668 extension
= 4; /* 3 opcode + 2 displacement */
1669 where_to_put_displacement
= &opcode
[3];
1672 case ENCODE_RELAX_STATE (UNCOND_JUMP
, WORD
):
1674 opcode
[0] = WORD_PREFIX_OPCODE
;
1675 extension
= 3; /* 2 opcode + 2 displacement */
1676 where_to_put_displacement
= &opcode
[2];
1679 case ENCODE_RELAX_STATE (COND_JUMP
, DWORD
):
1680 opcode
[1] = opcode
[0] + 0x10;
1681 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1682 extension
= 5; /* 2 opcode + 4 displacement */
1683 where_to_put_displacement
= &opcode
[2];
1686 case ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
):
1688 extension
= 4; /* 1 opcode + 4 displacement */
1689 where_to_put_displacement
= &opcode
[1];
1693 BAD_CASE(fragP
-> fr_subtype
);
1696 /* now put displacement after opcode */
1697 md_number_to_chars (where_to_put_displacement
,
1698 displacement_from_opcode_start
- extension
,
1699 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
1700 fragP
-> fr_fix
+= extension
;
1704 int md_short_jump_size
= 2; /* size of byte displacement jmp */
1705 int md_long_jump_size
= 5; /* size of dword displacement jmp */
1706 int md_reloc_size
= 8; /* Size of relocation record */
1708 void md_create_short_jump(ptr
, from_addr
, to_addr
, frag
, to_symbol
)
1710 long from_addr
, to_addr
;
1716 offset
= to_addr
- (from_addr
+ 2);
1717 md_number_to_chars (ptr
, (long) 0xeb, 1); /* opcode for byte-disp jump */
1718 md_number_to_chars (ptr
+ 1, offset
, 1);
1721 void md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
1723 long from_addr
, to_addr
;
1729 if (flagseen
['m']) {
1730 offset
= to_addr
- S_GET_VALUE(to_symbol
);
1731 md_number_to_chars (ptr
, 0xe9, 1); /* opcode for long jmp */
1732 md_number_to_chars (ptr
+ 1, offset
, 4);
1733 fix_new (frag
, (ptr
+1) - frag
->fr_literal
, 4,
1734 to_symbol
, (symbolS
*) 0, (long) 0, 0, NO_RELOC
);
1736 offset
= to_addr
- (from_addr
+ 5);
1737 md_number_to_chars(ptr
, (long) 0xe9, 1);
1738 md_number_to_chars(ptr
+ 1, offset
, 4);
1743 md_parse_option(argP
,cntP
,vecP
)
1751 void /* Knows about order of bytes in address. */
1752 md_number_to_chars (con
, value
, nbytes
)
1753 char con
[]; /* Return 'nbytes' of chars here. */
1754 long value
; /* The value of the bits. */
1755 int nbytes
; /* Number of bytes in the output. */
1757 register char * p
= con
;
1761 p
[0] = value
& 0xff;
1764 p
[0] = value
& 0xff;
1765 p
[1] = (value
>> 8) & 0xff;
1768 p
[0] = value
& 0xff;
1769 p
[1] = (value
>>8) & 0xff;
1770 p
[2] = (value
>>16) & 0xff;
1771 p
[3] = (value
>>24) & 0xff;
1779 /* Apply a fixup (fixS) to segment data, once it has been determined
1780 by our caller that we have all the info we need to fix it up.
1782 On the 386, immediates, displacements, and data pointers are all in
1783 the same (little-endian) format, so we don't need to care about which
1787 md_apply_fix (fixP
, value
)
1788 fixS
* fixP
; /* The fix we're to put in */
1789 long value
; /* The value of the bits. */
1791 register char * p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
1793 switch (fixP
->fx_size
) {
1808 BAD_CASE (fixP
->fx_size
);
1812 long /* Knows about the byte order in a word. */
1813 md_chars_to_number (con
, nbytes
)
1814 unsigned char con
[]; /* Low order byte 1st. */
1815 int nbytes
; /* Number of bytes in the input. */
1818 for (retval
=0, con
+=nbytes
-1; nbytes
--; con
--)
1820 retval
<<= BITS_PER_CHAR
;
1826 /* Not needed for coff since relocation structure does not
1827 contain bitfields. */
1828 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
1829 /* Output relocation information in the target's format. */
1831 md_ri_to_chars(the_bytes
, ri
)
1833 struct reloc_info_generic
*ri
;
1836 md_number_to_chars(the_bytes
, ri
->r_address
, 4);
1837 /* now the fun stuff */
1838 the_bytes
[6] = (ri
->r_symbolnum
>> 16) & 0x0ff;
1839 the_bytes
[5] = (ri
->r_symbolnum
>> 8) & 0x0ff;
1840 the_bytes
[4] = ri
->r_symbolnum
& 0x0ff;
1841 the_bytes
[7] = (((ri
->r_extern
<< 3) & 0x08) | ((ri
->r_length
<< 1) & 0x06) |
1842 ((ri
->r_pcrel
<< 0) & 0x01)) & 0x0F;
1844 #endif /* OBJ_AOUT or OBJ_BOUT */
1847 #define MAX_LITTLENUMS 6
1849 /* Turn the string pointed to by litP into a floating point constant of type
1850 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
1851 is stored in *sizeP . An error message is returned, or NULL on OK.
1854 md_atof(type
,litP
,sizeP
)
1860 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
1861 LITTLENUM_TYPE
*wordP
;
1882 return "Bad call to md_atof ()";
1884 t
= atof_ieee (input_line_pointer
,type
,words
);
1886 input_line_pointer
=t
;
1888 *sizeP
= prec
* sizeof(LITTLENUM_TYPE
);
1889 /* this loops outputs the LITTLENUMs in REVERSE order; in accord with
1890 the bigendian 386 */
1891 for(wordP
= words
+ prec
- 1;prec
--;) {
1892 md_number_to_chars (litP
, (long) (*wordP
--), sizeof(LITTLENUM_TYPE
));
1893 litP
+= sizeof(LITTLENUM_TYPE
);
1895 return ""; /* Someone should teach Dean about null pointers */
1898 char output_invalid_buf
[8];
1900 static char * output_invalid (c
)
1903 if (isprint(c
)) sprintf (output_invalid_buf
, "'%c'", c
);
1904 else sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
1905 return output_invalid_buf
;
1908 static reg_entry
*parse_register (reg_string
)
1909 char *reg_string
; /* reg_string starts *before* REGISTER_PREFIX */
1911 register char *s
= reg_string
;
1913 char reg_name_given
[MAX_REG_NAME_SIZE
];
1915 s
++; /* skip REGISTER_PREFIX */
1916 for (p
= reg_name_given
; is_register_char (*s
); p
++, s
++) {
1917 *p
= register_chars
[*s
];
1918 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
1919 return (reg_entry
*) 0;
1922 return (reg_entry
*) hash_find (reg_hash
, reg_name_given
);
1926 /* We have no need to default values of symbols. */
1930 md_undefined_symbol (name
)
1936 /* Parse an operand that is machine-specific.
1937 We just return without modifying the expression if we have nothing
1942 md_operand (expressionP
)
1943 expressionS
*expressionP
;
1947 /* Round up a section size to the appropriate boundary. */
1949 md_section_align (segment
, size
)
1953 return size
; /* Byte alignment is fine */
1956 /* Exactly what point is a PC-relative offset relative TO?
1957 On the i386, they're relative to the address of the offset, plus
1958 its size. (??? Is this right? FIXME-SOON!) */
1960 md_pcrel_from (fixP
)
1963 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1968 * Revision 1.1 1991/04/04 18:16:41 rich
1971 * Revision 1.2 1991/03/30 17:11:30 rich
1972 * Updated md_create_short_jump calling protocol.
1983 /* end of tc-i386.c */