1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2011 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
60 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
62 /* Some systems define MIN in, e.g., param.h. */
64 #define MIN(a,b) ((a) < (b) ? (a) : (b))
67 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
68 #define CURR_SLOT md.slot[md.curr_slot]
70 #define O_pseudo_fixup (O_max + 1)
74 /* IA-64 ABI section pseudo-ops. */
75 SPECIAL_SECTION_BSS
= 0,
77 SPECIAL_SECTION_SDATA
,
78 SPECIAL_SECTION_RODATA
,
79 SPECIAL_SECTION_COMMENT
,
80 SPECIAL_SECTION_UNWIND
,
81 SPECIAL_SECTION_UNWIND_INFO
,
82 /* HPUX specific section pseudo-ops. */
83 SPECIAL_SECTION_INIT_ARRAY
,
84 SPECIAL_SECTION_FINI_ARRAY
,
101 FUNC_LT_FPTR_RELATIVE
,
103 FUNC_LT_DTP_RELATIVE
,
107 FUNC_SLOTCOUNT_RELOC
,
114 REG_FR
= (REG_GR
+ 128),
115 REG_AR
= (REG_FR
+ 128),
116 REG_CR
= (REG_AR
+ 128),
117 REG_P
= (REG_CR
+ 128),
118 REG_BR
= (REG_P
+ 64),
119 REG_IP
= (REG_BR
+ 8),
126 /* The following are pseudo-registers for use by gas only. */
137 /* The following pseudo-registers are used for unwind directives only: */
145 DYNREG_GR
= 0, /* dynamic general purpose register */
146 DYNREG_FR
, /* dynamic floating point register */
147 DYNREG_PR
, /* dynamic predicate register */
151 enum operand_match_result
154 OPERAND_OUT_OF_RANGE
,
158 /* On the ia64, we can't know the address of a text label until the
159 instructions are packed into a bundle. To handle this, we keep
160 track of the list of labels that appear in front of each
164 struct label_fix
*next
;
166 bfd_boolean dw2_mark_labels
;
170 /* An internally used relocation. */
171 #define DUMMY_RELOC_IA64_SLOTCOUNT (BFD_RELOC_UNUSED + 1)
174 /* This is the endianness of the current section. */
175 extern int target_big_endian
;
177 /* This is the default endianness. */
178 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
180 void (*ia64_number_to_chars
) (char *, valueT
, int);
182 static void ia64_float_to_chars_bigendian (char *, LITTLENUM_TYPE
*, int);
183 static void ia64_float_to_chars_littleendian (char *, LITTLENUM_TYPE
*, int);
185 static void (*ia64_float_to_chars
) (char *, LITTLENUM_TYPE
*, int);
187 static struct hash_control
*alias_hash
;
188 static struct hash_control
*alias_name_hash
;
189 static struct hash_control
*secalias_hash
;
190 static struct hash_control
*secalias_name_hash
;
192 /* List of chars besides those in app.c:symbol_chars that can start an
193 operand. Used to prevent the scrubber eating vital white-space. */
194 const char ia64_symbol_chars
[] = "@?";
196 /* Characters which always start a comment. */
197 const char comment_chars
[] = "";
199 /* Characters which start a comment at the beginning of a line. */
200 const char line_comment_chars
[] = "#";
202 /* Characters which may be used to separate multiple commands on a
204 const char line_separator_chars
[] = ";{}";
206 /* Characters which are used to indicate an exponent in a floating
208 const char EXP_CHARS
[] = "eE";
210 /* Characters which mean that a number is a floating point constant,
212 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
214 /* ia64-specific option processing: */
216 const char *md_shortopts
= "m:N:x::";
218 struct option md_longopts
[] =
220 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
221 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
222 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
223 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
226 size_t md_longopts_size
= sizeof (md_longopts
);
230 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
231 struct hash_control
*reg_hash
; /* register name hash table */
232 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
233 struct hash_control
*const_hash
; /* constant hash table */
234 struct hash_control
*entry_hash
; /* code entry hint hash table */
236 /* If X_op is != O_absent, the registername for the instruction's
237 qualifying predicate. If NULL, p0 is assumed for instructions
238 that are predictable. */
241 /* Optimize for which CPU. */
248 /* What to do when hint.b is used. */
260 explicit_mode
: 1, /* which mode we're in */
261 default_explicit_mode
: 1, /* which mode is the default */
262 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
264 keep_pending_output
: 1;
266 /* What to do when something is wrong with unwind directives. */
269 unwind_check_warning
,
273 /* Each bundle consists of up to three instructions. We keep
274 track of four most recent instructions so we can correctly set
275 the end_of_insn_group for the last instruction in a bundle. */
277 int num_slots_in_use
;
281 end_of_insn_group
: 1,
282 manual_bundling_on
: 1,
283 manual_bundling_off
: 1,
284 loc_directive_seen
: 1;
285 signed char user_template
; /* user-selected template, if any */
286 unsigned char qp_regno
; /* qualifying predicate */
287 /* This duplicates a good fraction of "struct fix" but we
288 can't use a "struct fix" instead since we can't call
289 fix_new_exp() until we know the address of the instruction. */
293 bfd_reloc_code_real_type code
;
294 enum ia64_opnd opnd
; /* type of operand in need of fix */
295 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
296 expressionS expr
; /* the value to be inserted */
298 fixup
[2]; /* at most two fixups per insn */
299 struct ia64_opcode
*idesc
;
300 struct label_fix
*label_fixups
;
301 struct label_fix
*tag_fixups
;
302 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
305 unsigned int src_line
;
306 struct dwarf2_line_info debug_line
;
314 struct dynreg
*next
; /* next dynamic register */
316 unsigned short base
; /* the base register number */
317 unsigned short num_regs
; /* # of registers in this set */
319 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
321 flagword flags
; /* ELF-header flags */
324 unsigned hint
:1; /* is this hint currently valid? */
325 bfd_vma offset
; /* mem.offset offset */
326 bfd_vma base
; /* mem.offset base */
329 int path
; /* number of alt. entry points seen */
330 const char **entry_labels
; /* labels of all alternate paths in
331 the current DV-checking block. */
332 int maxpaths
; /* size currently allocated for
335 int pointer_size
; /* size in bytes of a pointer */
336 int pointer_size_shift
; /* shift size of a pointer for alignment */
338 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
342 /* These are not const, because they are modified to MMI for non-itanium1
344 /* MFI bundle of nops. */
345 static unsigned char le_nop
[16] =
347 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
348 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
350 /* MFI bundle of nops with stop-bit. */
351 static unsigned char le_nop_stop
[16] =
353 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
354 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
357 /* application registers: */
363 #define AR_BSPSTORE 18
389 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
390 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
391 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
392 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
393 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
394 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
395 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
396 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
397 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
398 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
399 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
400 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
401 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
402 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
405 /* control registers: */
446 {"cr.gpta", CR_GPTA
},
447 {"cr.ipsr", CR_IPSR
},
451 {"cr.itir", CR_ITIR
},
452 {"cr.iipa", CR_IIPA
},
456 {"cr.iib0", CR_IIB0
},
457 {"cr.iib1", CR_IIB1
},
462 {"cr.irr0", CR_IRR0
},
463 {"cr.irr1", CR_IRR0
+ 1},
464 {"cr.irr2", CR_IRR0
+ 2},
465 {"cr.irr3", CR_IRR3
},
468 {"cr.cmcv", CR_CMCV
},
469 {"cr.lrr0", CR_LRR0
},
478 static const struct const_desc
485 /* PSR constant masks: */
488 {"psr.be", ((valueT
) 1) << 1},
489 {"psr.up", ((valueT
) 1) << 2},
490 {"psr.ac", ((valueT
) 1) << 3},
491 {"psr.mfl", ((valueT
) 1) << 4},
492 {"psr.mfh", ((valueT
) 1) << 5},
494 {"psr.ic", ((valueT
) 1) << 13},
495 {"psr.i", ((valueT
) 1) << 14},
496 {"psr.pk", ((valueT
) 1) << 15},
498 {"psr.dt", ((valueT
) 1) << 17},
499 {"psr.dfl", ((valueT
) 1) << 18},
500 {"psr.dfh", ((valueT
) 1) << 19},
501 {"psr.sp", ((valueT
) 1) << 20},
502 {"psr.pp", ((valueT
) 1) << 21},
503 {"psr.di", ((valueT
) 1) << 22},
504 {"psr.si", ((valueT
) 1) << 23},
505 {"psr.db", ((valueT
) 1) << 24},
506 {"psr.lp", ((valueT
) 1) << 25},
507 {"psr.tb", ((valueT
) 1) << 26},
508 {"psr.rt", ((valueT
) 1) << 27},
509 /* 28-31: reserved */
510 /* 32-33: cpl (current privilege level) */
511 {"psr.is", ((valueT
) 1) << 34},
512 {"psr.mc", ((valueT
) 1) << 35},
513 {"psr.it", ((valueT
) 1) << 36},
514 {"psr.id", ((valueT
) 1) << 37},
515 {"psr.da", ((valueT
) 1) << 38},
516 {"psr.dd", ((valueT
) 1) << 39},
517 {"psr.ss", ((valueT
) 1) << 40},
518 /* 41-42: ri (restart instruction) */
519 {"psr.ed", ((valueT
) 1) << 43},
520 {"psr.bn", ((valueT
) 1) << 44},
523 /* indirect register-sets/memory: */
532 { "CPUID", IND_CPUID
},
533 { "cpuid", IND_CPUID
},
545 /* Pseudo functions used to indicate relocation types (these functions
546 start with an at sign (@). */
568 /* reloc pseudo functions (these must come first!): */
569 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
570 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
571 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
572 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
573 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
574 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
575 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
576 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
577 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
578 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
579 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
580 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
581 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
582 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
583 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
584 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
585 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
587 { "slotcount", PSEUDO_FUNC_RELOC
, { 0 } },
590 /* mbtype4 constants: */
591 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
592 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
593 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
594 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
595 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
597 /* fclass constants: */
598 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
599 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
600 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
601 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
602 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
603 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
604 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
605 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
606 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
608 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
610 /* hint constants: */
611 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
613 /* unwind-related constants: */
614 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
615 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
616 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
617 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
618 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
619 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
620 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
622 /* unwind-related registers: */
623 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
626 /* 41-bit nop opcodes (one per unit): */
627 static const bfd_vma nop
[IA64_NUM_UNITS
] =
629 0x0000000000LL
, /* NIL => break 0 */
630 0x0008000000LL
, /* I-unit nop */
631 0x0008000000LL
, /* M-unit nop */
632 0x4000000000LL
, /* B-unit nop */
633 0x0008000000LL
, /* F-unit nop */
634 0x0000000000LL
, /* L-"unit" nop immediate */
635 0x0008000000LL
, /* X-unit nop */
638 /* Can't be `const' as it's passed to input routines (which have the
639 habit of setting temporary sentinels. */
640 static char special_section_name
[][20] =
642 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
643 {".IA_64.unwind"}, {".IA_64.unwind_info"},
644 {".init_array"}, {".fini_array"}
647 /* The best template for a particular sequence of up to three
649 #define N IA64_NUM_TYPES
650 static unsigned char best_template
[N
][N
][N
];
653 /* Resource dependencies currently in effect */
655 int depind
; /* dependency index */
656 const struct ia64_dependency
*dependency
; /* actual dependency */
657 unsigned specific
:1, /* is this a specific bit/regno? */
658 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
659 int index
; /* specific regno/bit within dependency */
660 int note
; /* optional qualifying note (0 if none) */
664 int insn_srlz
; /* current insn serialization state */
665 int data_srlz
; /* current data serialization state */
666 int qp_regno
; /* qualifying predicate for this usage */
667 char *file
; /* what file marked this dependency */
668 unsigned int line
; /* what line marked this dependency */
669 struct mem_offset mem_offset
; /* optional memory offset hint */
670 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
671 int path
; /* corresponding code entry index */
673 static int regdepslen
= 0;
674 static int regdepstotlen
= 0;
675 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
676 static const char *dv_sem
[] = { "none", "implied", "impliedf",
677 "data", "instr", "specific", "stop", "other" };
678 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
680 /* Current state of PR mutexation */
681 static struct qpmutex
{
684 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
685 static int qp_mutexeslen
= 0;
686 static int qp_mutexestotlen
= 0;
687 static valueT qp_safe_across_calls
= 0;
689 /* Current state of PR implications */
690 static struct qp_imply
{
693 unsigned p2_branched
:1;
695 } *qp_implies
= NULL
;
696 static int qp_implieslen
= 0;
697 static int qp_impliestotlen
= 0;
699 /* Keep track of static GR values so that indirect register usage can
700 sometimes be tracked. */
711 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
717 /* Remember the alignment frag. */
718 static fragS
*align_frag
;
720 /* These are the routines required to output the various types of
723 /* A slot_number is a frag address plus the slot index (0-2). We use the
724 frag address here so that if there is a section switch in the middle of
725 a function, then instructions emitted to a different section are not
726 counted. Since there may be more than one frag for a function, this
727 means we also need to keep track of which frag this address belongs to
728 so we can compute inter-frag distances. This also nicely solves the
729 problem with nops emitted for align directives, which can't easily be
730 counted, but can easily be derived from frag sizes. */
732 typedef struct unw_rec_list
{
734 unsigned long slot_number
;
736 struct unw_rec_list
*next
;
739 #define SLOT_NUM_NOT_SET (unsigned)-1
741 /* Linked list of saved prologue counts. A very poor
742 implementation of a map from label numbers to prologue counts. */
743 typedef struct label_prologue_count
745 struct label_prologue_count
*next
;
746 unsigned long label_number
;
747 unsigned int prologue_count
;
748 } label_prologue_count
;
750 typedef struct proc_pending
753 struct proc_pending
*next
;
758 /* Maintain a list of unwind entries for the current function. */
762 /* Any unwind entries that should be attached to the current slot
763 that an insn is being constructed for. */
764 unw_rec_list
*current_entry
;
766 /* These are used to create the unwind table entry for this function. */
767 proc_pending proc_pending
;
768 symbolS
*info
; /* pointer to unwind info */
769 symbolS
*personality_routine
;
771 subsegT saved_text_subseg
;
772 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
774 /* TRUE if processing unwind directives in a prologue region. */
775 unsigned int prologue
: 1;
776 unsigned int prologue_mask
: 4;
777 unsigned int prologue_gr
: 7;
778 unsigned int body
: 1;
779 unsigned int insn
: 1;
780 unsigned int prologue_count
; /* number of .prologues seen so far */
781 /* Prologue counts at previous .label_state directives. */
782 struct label_prologue_count
* saved_prologue_counts
;
784 /* List of split up .save-s. */
785 unw_p_record
*pending_saves
;
788 /* The input value is a negated offset from psp, and specifies an address
789 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
790 must add 16 and divide by 4 to get the encoded value. */
792 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
794 typedef void (*vbyte_func
) (int, char *, char *);
796 /* Forward declarations: */
797 static void dot_alias (int);
798 static int parse_operand_and_eval (expressionS
*, int);
799 static void emit_one_bundle (void);
800 static bfd_reloc_code_real_type
ia64_gen_real_reloc_type (struct symbol
*,
801 bfd_reloc_code_real_type
);
802 static void insn_group_break (int, int, int);
803 static void add_qp_mutex (valueT
);
804 static void add_qp_imply (int, int);
805 static void clear_qp_mutex (valueT
);
806 static void clear_qp_implies (valueT
, valueT
);
807 static void print_dependency (const char *, int);
808 static void instruction_serialization (void);
809 static void data_serialization (void);
810 static void output_R3_format (vbyte_func
, unw_record_type
, unsigned long);
811 static void output_B3_format (vbyte_func
, unsigned long, unsigned long);
812 static void output_B4_format (vbyte_func
, unw_record_type
, unsigned long);
813 static void free_saved_prologue_counts (void);
815 /* Determine if application register REGNUM resides only in the integer
816 unit (as opposed to the memory unit). */
818 ar_is_only_in_integer_unit (int reg
)
821 return reg
>= 64 && reg
<= 111;
824 /* Determine if application register REGNUM resides only in the memory
825 unit (as opposed to the integer unit). */
827 ar_is_only_in_memory_unit (int reg
)
830 return reg
>= 0 && reg
<= 47;
833 /* Switch to section NAME and create section if necessary. It's
834 rather ugly that we have to manipulate input_line_pointer but I
835 don't see any other way to accomplish the same thing without
836 changing obj-elf.c (which may be the Right Thing, in the end). */
838 set_section (char *name
)
840 char *saved_input_line_pointer
;
842 saved_input_line_pointer
= input_line_pointer
;
843 input_line_pointer
= name
;
845 input_line_pointer
= saved_input_line_pointer
;
848 /* Map 's' to SHF_IA_64_SHORT. */
851 ia64_elf_section_letter (int letter
, char **ptr_msg
)
854 return SHF_IA_64_SHORT
;
855 else if (letter
== 'o')
856 return SHF_LINK_ORDER
;
858 else if (letter
== 'O')
859 return SHF_IA_64_VMS_OVERLAID
;
860 else if (letter
== 'g')
861 return SHF_IA_64_VMS_GLOBAL
;
864 *ptr_msg
= _("bad .section directive: want a,o,s,w,x,M,S,G,T in string");
868 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
871 ia64_elf_section_flags (flagword flags
,
873 int type ATTRIBUTE_UNUSED
)
875 if (attr
& SHF_IA_64_SHORT
)
876 flags
|= SEC_SMALL_DATA
;
881 ia64_elf_section_type (const char *str
, size_t len
)
883 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
885 if (STREQ (ELF_STRING_ia64_unwind_info
))
888 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
891 if (STREQ (ELF_STRING_ia64_unwind
))
892 return SHT_IA_64_UNWIND
;
894 if (STREQ (ELF_STRING_ia64_unwind_once
))
895 return SHT_IA_64_UNWIND
;
897 if (STREQ ("unwind"))
898 return SHT_IA_64_UNWIND
;
905 set_regstack (unsigned int ins
,
913 sof
= ins
+ locs
+ outs
;
916 as_bad (_("Size of frame exceeds maximum of 96 registers"));
921 as_warn (_("Size of rotating registers exceeds frame size"));
924 md
.in
.base
= REG_GR
+ 32;
925 md
.loc
.base
= md
.in
.base
+ ins
;
926 md
.out
.base
= md
.loc
.base
+ locs
;
928 md
.in
.num_regs
= ins
;
929 md
.loc
.num_regs
= locs
;
930 md
.out
.num_regs
= outs
;
931 md
.rot
.num_regs
= rots
;
936 ia64_flush_insns (void)
938 struct label_fix
*lfix
;
940 subsegT saved_subseg
;
944 if (!md
.last_text_seg
)
948 saved_subseg
= now_subseg
;
950 subseg_set (md
.last_text_seg
, 0);
952 while (md
.num_slots_in_use
> 0)
953 emit_one_bundle (); /* force out queued instructions */
955 /* In case there are labels following the last instruction, resolve
958 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
960 symbol_set_value_now (lfix
->sym
);
961 mark
|= lfix
->dw2_mark_labels
;
965 dwarf2_where (&CURR_SLOT
.debug_line
);
966 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
967 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
968 dwarf2_consume_line_info ();
970 CURR_SLOT
.label_fixups
= 0;
972 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
973 symbol_set_value_now (lfix
->sym
);
974 CURR_SLOT
.tag_fixups
= 0;
976 /* In case there are unwind directives following the last instruction,
977 resolve those now. We only handle prologue, body, and endp directives
978 here. Give an error for others. */
979 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
987 ptr
->slot_number
= (unsigned long) frag_more (0);
988 ptr
->slot_frag
= frag_now
;
991 /* Allow any record which doesn't have a "t" field (i.e.,
992 doesn't relate to a particular instruction). */
1008 as_bad (_("Unwind directive not followed by an instruction."));
1012 unwind
.current_entry
= NULL
;
1014 subseg_set (saved_seg
, saved_subseg
);
1016 if (md
.qp
.X_op
== O_register
)
1017 as_bad (_("qualifying predicate not followed by instruction"));
1021 ia64_do_align (int nbytes
)
1023 char *saved_input_line_pointer
= input_line_pointer
;
1025 input_line_pointer
= "";
1026 s_align_bytes (nbytes
);
1027 input_line_pointer
= saved_input_line_pointer
;
1031 ia64_cons_align (int nbytes
)
1035 char *saved_input_line_pointer
= input_line_pointer
;
1036 input_line_pointer
= "";
1037 s_align_bytes (nbytes
);
1038 input_line_pointer
= saved_input_line_pointer
;
1042 /* Output COUNT bytes to a memory location. */
1043 static char *vbyte_mem_ptr
= NULL
;
1046 output_vbyte_mem (int count
, char *ptr
, char *comment ATTRIBUTE_UNUSED
)
1049 if (vbyte_mem_ptr
== NULL
)
1054 for (x
= 0; x
< count
; x
++)
1055 *(vbyte_mem_ptr
++) = ptr
[x
];
1058 /* Count the number of bytes required for records. */
1059 static int vbyte_count
= 0;
1061 count_output (int count
,
1062 char *ptr ATTRIBUTE_UNUSED
,
1063 char *comment ATTRIBUTE_UNUSED
)
1065 vbyte_count
+= count
;
1069 output_R1_format (vbyte_func f
, unw_record_type rtype
, int rlen
)
1075 output_R3_format (f
, rtype
, rlen
);
1081 else if (rtype
!= prologue
)
1082 as_bad (_("record type is not valid"));
1084 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1085 (*f
) (1, &byte
, NULL
);
1089 output_R2_format (vbyte_func f
, int mask
, int grsave
, unsigned long rlen
)
1093 mask
= (mask
& 0x0f);
1094 grsave
= (grsave
& 0x7f);
1096 bytes
[0] = (UNW_R2
| (mask
>> 1));
1097 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1098 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1099 (*f
) (count
, bytes
, NULL
);
1103 output_R3_format (vbyte_func f
, unw_record_type rtype
, unsigned long rlen
)
1109 output_R1_format (f
, rtype
, rlen
);
1115 else if (rtype
!= prologue
)
1116 as_bad (_("record type is not valid"));
1117 bytes
[0] = (UNW_R3
| r
);
1118 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1119 (*f
) (count
+ 1, bytes
, NULL
);
1123 output_P1_format (vbyte_func f
, int brmask
)
1126 byte
= UNW_P1
| (brmask
& 0x1f);
1127 (*f
) (1, &byte
, NULL
);
1131 output_P2_format (vbyte_func f
, int brmask
, int gr
)
1134 brmask
= (brmask
& 0x1f);
1135 bytes
[0] = UNW_P2
| (brmask
>> 1);
1136 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1137 (*f
) (2, bytes
, NULL
);
1141 output_P3_format (vbyte_func f
, unw_record_type rtype
, int reg
)
1185 as_bad (_("Invalid record type for P3 format."));
1187 bytes
[0] = (UNW_P3
| (r
>> 1));
1188 bytes
[1] = (((r
& 1) << 7) | reg
);
1189 (*f
) (2, bytes
, NULL
);
1193 output_P4_format (vbyte_func f
, unsigned char *imask
, unsigned long imask_size
)
1196 (*f
) (imask_size
, (char *) imask
, NULL
);
1200 output_P5_format (vbyte_func f
, int grmask
, unsigned long frmask
)
1203 grmask
= (grmask
& 0x0f);
1206 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1207 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1208 bytes
[3] = (frmask
& 0x000000ff);
1209 (*f
) (4, bytes
, NULL
);
1213 output_P6_format (vbyte_func f
, unw_record_type rtype
, int rmask
)
1218 if (rtype
== gr_mem
)
1220 else if (rtype
!= fr_mem
)
1221 as_bad (_("Invalid record type for format P6"));
1222 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1223 (*f
) (1, &byte
, NULL
);
1227 output_P7_format (vbyte_func f
,
1228 unw_record_type rtype
,
1235 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1240 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1290 bytes
[0] = (UNW_P7
| r
);
1291 (*f
) (count
, bytes
, NULL
);
1295 output_P8_format (vbyte_func f
, unw_record_type rtype
, unsigned long t
)
1333 case bspstore_psprel
:
1336 case bspstore_sprel
:
1348 case priunat_when_gr
:
1351 case priunat_psprel
:
1357 case priunat_when_mem
:
1364 count
+= output_leb128 (bytes
+ 2, t
, 0);
1365 (*f
) (count
, bytes
, NULL
);
1369 output_P9_format (vbyte_func f
, int grmask
, int gr
)
1373 bytes
[1] = (grmask
& 0x0f);
1374 bytes
[2] = (gr
& 0x7f);
1375 (*f
) (3, bytes
, NULL
);
1379 output_P10_format (vbyte_func f
, int abi
, int context
)
1383 bytes
[1] = (abi
& 0xff);
1384 bytes
[2] = (context
& 0xff);
1385 (*f
) (3, bytes
, NULL
);
1389 output_B1_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1395 output_B4_format (f
, rtype
, label
);
1398 if (rtype
== copy_state
)
1400 else if (rtype
!= label_state
)
1401 as_bad (_("Invalid record type for format B1"));
1403 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1404 (*f
) (1, &byte
, NULL
);
1408 output_B2_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1414 output_B3_format (f
, ecount
, t
);
1417 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1418 count
+= output_leb128 (bytes
+ 1, t
, 0);
1419 (*f
) (count
, bytes
, NULL
);
1423 output_B3_format (vbyte_func f
, unsigned long ecount
, unsigned long t
)
1429 output_B2_format (f
, ecount
, t
);
1433 count
+= output_leb128 (bytes
+ 1, t
, 0);
1434 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1435 (*f
) (count
, bytes
, NULL
);
1439 output_B4_format (vbyte_func f
, unw_record_type rtype
, unsigned long label
)
1446 output_B1_format (f
, rtype
, label
);
1450 if (rtype
== copy_state
)
1452 else if (rtype
!= label_state
)
1453 as_bad (_("Invalid record type for format B1"));
1455 bytes
[0] = (UNW_B4
| (r
<< 3));
1456 count
+= output_leb128 (bytes
+ 1, label
, 0);
1457 (*f
) (count
, bytes
, NULL
);
1461 format_ab_reg (int ab
, int reg
)
1466 ret
= (ab
<< 5) | reg
;
1471 output_X1_format (vbyte_func f
,
1472 unw_record_type rtype
,
1483 if (rtype
== spill_sprel
)
1485 else if (rtype
!= spill_psprel
)
1486 as_bad (_("Invalid record type for format X1"));
1487 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1488 count
+= output_leb128 (bytes
+ 2, t
, 0);
1489 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1490 (*f
) (count
, bytes
, NULL
);
1494 output_X2_format (vbyte_func f
,
1505 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1506 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1507 count
+= output_leb128 (bytes
+ 3, t
, 0);
1508 (*f
) (count
, bytes
, NULL
);
1512 output_X3_format (vbyte_func f
,
1513 unw_record_type rtype
,
1525 if (rtype
== spill_sprel_p
)
1527 else if (rtype
!= spill_psprel_p
)
1528 as_bad (_("Invalid record type for format X3"));
1529 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1530 bytes
[2] = format_ab_reg (ab
, reg
);
1531 count
+= output_leb128 (bytes
+ 3, t
, 0);
1532 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1533 (*f
) (count
, bytes
, NULL
);
1537 output_X4_format (vbyte_func f
,
1549 bytes
[1] = (qp
& 0x3f);
1550 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1551 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1552 count
+= output_leb128 (bytes
+ 4, t
, 0);
1553 (*f
) (count
, bytes
, NULL
);
1556 /* This function checks whether there are any outstanding .save-s and
1557 discards them if so. */
1560 check_pending_save (void)
1562 if (unwind
.pending_saves
)
1564 unw_rec_list
*cur
, *prev
;
1566 as_warn (_("Previous .save incomplete"));
1567 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1568 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1571 prev
->next
= cur
->next
;
1573 unwind
.list
= cur
->next
;
1574 if (cur
== unwind
.tail
)
1576 if (cur
== unwind
.current_entry
)
1577 unwind
.current_entry
= cur
->next
;
1578 /* Don't free the first discarded record, it's being used as
1579 terminator for (currently) br_gr and gr_gr processing, and
1580 also prevents leaving a dangling pointer to it in its
1582 cur
->r
.record
.p
.grmask
= 0;
1583 cur
->r
.record
.p
.brmask
= 0;
1584 cur
->r
.record
.p
.frmask
= 0;
1585 prev
= cur
->r
.record
.p
.next
;
1586 cur
->r
.record
.p
.next
= NULL
;
1598 cur
= cur
->r
.record
.p
.next
;
1601 unwind
.pending_saves
= NULL
;
1605 /* This function allocates a record list structure, and initializes fields. */
1607 static unw_rec_list
*
1608 alloc_record (unw_record_type t
)
1611 ptr
= xmalloc (sizeof (*ptr
));
1612 memset (ptr
, 0, sizeof (*ptr
));
1613 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1618 /* Dummy unwind record used for calculating the length of the last prologue or
1621 static unw_rec_list
*
1624 unw_rec_list
*ptr
= alloc_record (endp
);
1628 static unw_rec_list
*
1629 output_prologue (void)
1631 unw_rec_list
*ptr
= alloc_record (prologue
);
1632 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1636 static unw_rec_list
*
1637 output_prologue_gr (unsigned int saved_mask
, unsigned int reg
)
1639 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1640 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1641 ptr
->r
.record
.r
.grmask
= saved_mask
;
1642 ptr
->r
.record
.r
.grsave
= reg
;
1646 static unw_rec_list
*
1649 unw_rec_list
*ptr
= alloc_record (body
);
1653 static unw_rec_list
*
1654 output_mem_stack_f (unsigned int size
)
1656 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1657 ptr
->r
.record
.p
.size
= size
;
1661 static unw_rec_list
*
1662 output_mem_stack_v (void)
1664 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1668 static unw_rec_list
*
1669 output_psp_gr (unsigned int gr
)
1671 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1672 ptr
->r
.record
.p
.r
.gr
= gr
;
1676 static unw_rec_list
*
1677 output_psp_sprel (unsigned int offset
)
1679 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1680 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1684 static unw_rec_list
*
1685 output_rp_when (void)
1687 unw_rec_list
*ptr
= alloc_record (rp_when
);
1691 static unw_rec_list
*
1692 output_rp_gr (unsigned int gr
)
1694 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1695 ptr
->r
.record
.p
.r
.gr
= gr
;
1699 static unw_rec_list
*
1700 output_rp_br (unsigned int br
)
1702 unw_rec_list
*ptr
= alloc_record (rp_br
);
1703 ptr
->r
.record
.p
.r
.br
= br
;
1707 static unw_rec_list
*
1708 output_rp_psprel (unsigned int offset
)
1710 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1711 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1715 static unw_rec_list
*
1716 output_rp_sprel (unsigned int offset
)
1718 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1719 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1723 static unw_rec_list
*
1724 output_pfs_when (void)
1726 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1730 static unw_rec_list
*
1731 output_pfs_gr (unsigned int gr
)
1733 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1734 ptr
->r
.record
.p
.r
.gr
= gr
;
1738 static unw_rec_list
*
1739 output_pfs_psprel (unsigned int offset
)
1741 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1742 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1746 static unw_rec_list
*
1747 output_pfs_sprel (unsigned int offset
)
1749 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1750 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1754 static unw_rec_list
*
1755 output_preds_when (void)
1757 unw_rec_list
*ptr
= alloc_record (preds_when
);
1761 static unw_rec_list
*
1762 output_preds_gr (unsigned int gr
)
1764 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1765 ptr
->r
.record
.p
.r
.gr
= gr
;
1769 static unw_rec_list
*
1770 output_preds_psprel (unsigned int offset
)
1772 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1773 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1777 static unw_rec_list
*
1778 output_preds_sprel (unsigned int offset
)
1780 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1781 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1785 static unw_rec_list
*
1786 output_fr_mem (unsigned int mask
)
1788 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1789 unw_rec_list
*cur
= ptr
;
1791 ptr
->r
.record
.p
.frmask
= mask
;
1792 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1795 unw_rec_list
*prev
= cur
;
1797 /* Clear least significant set bit. */
1798 mask
&= ~(mask
& (~mask
+ 1));
1801 cur
= alloc_record (fr_mem
);
1802 cur
->r
.record
.p
.frmask
= mask
;
1803 /* Retain only least significant bit. */
1804 prev
->r
.record
.p
.frmask
^= mask
;
1805 prev
->r
.record
.p
.next
= cur
;
1809 static unw_rec_list
*
1810 output_frgr_mem (unsigned int gr_mask
, unsigned int fr_mask
)
1812 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1813 unw_rec_list
*cur
= ptr
;
1815 unwind
.pending_saves
= &cur
->r
.record
.p
;
1816 cur
->r
.record
.p
.frmask
= fr_mask
;
1819 unw_rec_list
*prev
= cur
;
1821 /* Clear least significant set bit. */
1822 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
1823 if (!gr_mask
&& !fr_mask
)
1825 cur
= alloc_record (frgr_mem
);
1826 cur
->r
.record
.p
.frmask
= fr_mask
;
1827 /* Retain only least significant bit. */
1828 prev
->r
.record
.p
.frmask
^= fr_mask
;
1829 prev
->r
.record
.p
.next
= cur
;
1831 cur
->r
.record
.p
.grmask
= gr_mask
;
1834 unw_rec_list
*prev
= cur
;
1836 /* Clear least significant set bit. */
1837 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
1840 cur
= alloc_record (frgr_mem
);
1841 cur
->r
.record
.p
.grmask
= gr_mask
;
1842 /* Retain only least significant bit. */
1843 prev
->r
.record
.p
.grmask
^= gr_mask
;
1844 prev
->r
.record
.p
.next
= cur
;
1848 static unw_rec_list
*
1849 output_gr_gr (unsigned int mask
, unsigned int reg
)
1851 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1852 unw_rec_list
*cur
= ptr
;
1854 ptr
->r
.record
.p
.grmask
= mask
;
1855 ptr
->r
.record
.p
.r
.gr
= reg
;
1856 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1859 unw_rec_list
*prev
= cur
;
1861 /* Clear least significant set bit. */
1862 mask
&= ~(mask
& (~mask
+ 1));
1865 cur
= alloc_record (gr_gr
);
1866 cur
->r
.record
.p
.grmask
= mask
;
1867 /* Indicate this record shouldn't be output. */
1868 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
1869 /* Retain only least significant bit. */
1870 prev
->r
.record
.p
.grmask
^= mask
;
1871 prev
->r
.record
.p
.next
= cur
;
1875 static unw_rec_list
*
1876 output_gr_mem (unsigned int mask
)
1878 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1879 unw_rec_list
*cur
= ptr
;
1881 ptr
->r
.record
.p
.grmask
= mask
;
1882 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1885 unw_rec_list
*prev
= cur
;
1887 /* Clear least significant set bit. */
1888 mask
&= ~(mask
& (~mask
+ 1));
1891 cur
= alloc_record (gr_mem
);
1892 cur
->r
.record
.p
.grmask
= mask
;
1893 /* Retain only least significant bit. */
1894 prev
->r
.record
.p
.grmask
^= mask
;
1895 prev
->r
.record
.p
.next
= cur
;
1899 static unw_rec_list
*
1900 output_br_mem (unsigned int mask
)
1902 unw_rec_list
*ptr
= alloc_record (br_mem
);
1903 unw_rec_list
*cur
= ptr
;
1905 ptr
->r
.record
.p
.brmask
= mask
;
1906 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1909 unw_rec_list
*prev
= cur
;
1911 /* Clear least significant set bit. */
1912 mask
&= ~(mask
& (~mask
+ 1));
1915 cur
= alloc_record (br_mem
);
1916 cur
->r
.record
.p
.brmask
= mask
;
1917 /* Retain only least significant bit. */
1918 prev
->r
.record
.p
.brmask
^= mask
;
1919 prev
->r
.record
.p
.next
= cur
;
1923 static unw_rec_list
*
1924 output_br_gr (unsigned int mask
, unsigned int reg
)
1926 unw_rec_list
*ptr
= alloc_record (br_gr
);
1927 unw_rec_list
*cur
= ptr
;
1929 ptr
->r
.record
.p
.brmask
= mask
;
1930 ptr
->r
.record
.p
.r
.gr
= reg
;
1931 unwind
.pending_saves
= &ptr
->r
.record
.p
;
1934 unw_rec_list
*prev
= cur
;
1936 /* Clear least significant set bit. */
1937 mask
&= ~(mask
& (~mask
+ 1));
1940 cur
= alloc_record (br_gr
);
1941 cur
->r
.record
.p
.brmask
= mask
;
1942 /* Indicate this record shouldn't be output. */
1943 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
1944 /* Retain only least significant bit. */
1945 prev
->r
.record
.p
.brmask
^= mask
;
1946 prev
->r
.record
.p
.next
= cur
;
1950 static unw_rec_list
*
1951 output_spill_base (unsigned int offset
)
1953 unw_rec_list
*ptr
= alloc_record (spill_base
);
1954 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1958 static unw_rec_list
*
1959 output_unat_when (void)
1961 unw_rec_list
*ptr
= alloc_record (unat_when
);
1965 static unw_rec_list
*
1966 output_unat_gr (unsigned int gr
)
1968 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1969 ptr
->r
.record
.p
.r
.gr
= gr
;
1973 static unw_rec_list
*
1974 output_unat_psprel (unsigned int offset
)
1976 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
1977 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1981 static unw_rec_list
*
1982 output_unat_sprel (unsigned int offset
)
1984 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
1985 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1989 static unw_rec_list
*
1990 output_lc_when (void)
1992 unw_rec_list
*ptr
= alloc_record (lc_when
);
1996 static unw_rec_list
*
1997 output_lc_gr (unsigned int gr
)
1999 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2000 ptr
->r
.record
.p
.r
.gr
= gr
;
2004 static unw_rec_list
*
2005 output_lc_psprel (unsigned int offset
)
2007 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2008 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2012 static unw_rec_list
*
2013 output_lc_sprel (unsigned int offset
)
2015 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2016 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2020 static unw_rec_list
*
2021 output_fpsr_when (void)
2023 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2027 static unw_rec_list
*
2028 output_fpsr_gr (unsigned int gr
)
2030 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2031 ptr
->r
.record
.p
.r
.gr
= gr
;
2035 static unw_rec_list
*
2036 output_fpsr_psprel (unsigned int offset
)
2038 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2039 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2043 static unw_rec_list
*
2044 output_fpsr_sprel (unsigned int offset
)
2046 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2047 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2051 static unw_rec_list
*
2052 output_priunat_when_gr (void)
2054 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2058 static unw_rec_list
*
2059 output_priunat_when_mem (void)
2061 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2065 static unw_rec_list
*
2066 output_priunat_gr (unsigned int gr
)
2068 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2069 ptr
->r
.record
.p
.r
.gr
= gr
;
2073 static unw_rec_list
*
2074 output_priunat_psprel (unsigned int offset
)
2076 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2077 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2081 static unw_rec_list
*
2082 output_priunat_sprel (unsigned int offset
)
2084 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2085 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2089 static unw_rec_list
*
2090 output_bsp_when (void)
2092 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2096 static unw_rec_list
*
2097 output_bsp_gr (unsigned int gr
)
2099 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2100 ptr
->r
.record
.p
.r
.gr
= gr
;
2104 static unw_rec_list
*
2105 output_bsp_psprel (unsigned int offset
)
2107 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2108 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2112 static unw_rec_list
*
2113 output_bsp_sprel (unsigned int offset
)
2115 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2116 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2120 static unw_rec_list
*
2121 output_bspstore_when (void)
2123 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2127 static unw_rec_list
*
2128 output_bspstore_gr (unsigned int gr
)
2130 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2131 ptr
->r
.record
.p
.r
.gr
= gr
;
2135 static unw_rec_list
*
2136 output_bspstore_psprel (unsigned int offset
)
2138 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2139 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2143 static unw_rec_list
*
2144 output_bspstore_sprel (unsigned int offset
)
2146 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2147 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2151 static unw_rec_list
*
2152 output_rnat_when (void)
2154 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2158 static unw_rec_list
*
2159 output_rnat_gr (unsigned int gr
)
2161 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2162 ptr
->r
.record
.p
.r
.gr
= gr
;
2166 static unw_rec_list
*
2167 output_rnat_psprel (unsigned int offset
)
2169 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2170 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2174 static unw_rec_list
*
2175 output_rnat_sprel (unsigned int offset
)
2177 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2178 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2182 static unw_rec_list
*
2183 output_unwabi (unsigned long abi
, unsigned long context
)
2185 unw_rec_list
*ptr
= alloc_record (unwabi
);
2186 ptr
->r
.record
.p
.abi
= abi
;
2187 ptr
->r
.record
.p
.context
= context
;
2191 static unw_rec_list
*
2192 output_epilogue (unsigned long ecount
)
2194 unw_rec_list
*ptr
= alloc_record (epilogue
);
2195 ptr
->r
.record
.b
.ecount
= ecount
;
2199 static unw_rec_list
*
2200 output_label_state (unsigned long label
)
2202 unw_rec_list
*ptr
= alloc_record (label_state
);
2203 ptr
->r
.record
.b
.label
= label
;
2207 static unw_rec_list
*
2208 output_copy_state (unsigned long label
)
2210 unw_rec_list
*ptr
= alloc_record (copy_state
);
2211 ptr
->r
.record
.b
.label
= label
;
2215 static unw_rec_list
*
2216 output_spill_psprel (unsigned int ab
,
2218 unsigned int offset
,
2219 unsigned int predicate
)
2221 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2222 ptr
->r
.record
.x
.ab
= ab
;
2223 ptr
->r
.record
.x
.reg
= reg
;
2224 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2225 ptr
->r
.record
.x
.qp
= predicate
;
2229 static unw_rec_list
*
2230 output_spill_sprel (unsigned int ab
,
2232 unsigned int offset
,
2233 unsigned int predicate
)
2235 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2236 ptr
->r
.record
.x
.ab
= ab
;
2237 ptr
->r
.record
.x
.reg
= reg
;
2238 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2239 ptr
->r
.record
.x
.qp
= predicate
;
2243 static unw_rec_list
*
2244 output_spill_reg (unsigned int ab
,
2246 unsigned int targ_reg
,
2248 unsigned int predicate
)
2250 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2251 ptr
->r
.record
.x
.ab
= ab
;
2252 ptr
->r
.record
.x
.reg
= reg
;
2253 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2254 ptr
->r
.record
.x
.xy
= xy
;
2255 ptr
->r
.record
.x
.qp
= predicate
;
2259 /* Given a unw_rec_list process the correct format with the
2260 specified function. */
2263 process_one_record (unw_rec_list
*ptr
, vbyte_func f
)
2265 unsigned int fr_mask
, gr_mask
;
2267 switch (ptr
->r
.type
)
2269 /* This is a dummy record that takes up no space in the output. */
2277 /* These are taken care of by prologue/prologue_gr. */
2282 if (ptr
->r
.type
== prologue_gr
)
2283 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2284 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2286 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2288 /* Output descriptor(s) for union of register spills (if any). */
2289 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2290 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2293 if ((fr_mask
& ~0xfUL
) == 0)
2294 output_P6_format (f
, fr_mem
, fr_mask
);
2297 output_P5_format (f
, gr_mask
, fr_mask
);
2302 output_P6_format (f
, gr_mem
, gr_mask
);
2303 if (ptr
->r
.record
.r
.mask
.br_mem
)
2304 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2306 /* output imask descriptor if necessary: */
2307 if (ptr
->r
.record
.r
.mask
.i
)
2308 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2309 ptr
->r
.record
.r
.imask_size
);
2313 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2317 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2318 ptr
->r
.record
.p
.size
);
2331 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2334 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2337 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2345 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2354 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2364 case bspstore_sprel
:
2366 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2369 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2371 const unw_rec_list
*cur
= ptr
;
2373 gr_mask
= cur
->r
.record
.p
.grmask
;
2374 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2375 gr_mask
|= cur
->r
.record
.p
.grmask
;
2376 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2380 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2382 const unw_rec_list
*cur
= ptr
;
2384 gr_mask
= cur
->r
.record
.p
.brmask
;
2385 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2386 gr_mask
|= cur
->r
.record
.p
.brmask
;
2387 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2391 as_bad (_("spill_mask record unimplemented."));
2393 case priunat_when_gr
:
2394 case priunat_when_mem
:
2398 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2400 case priunat_psprel
:
2402 case bspstore_psprel
:
2404 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2407 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2410 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2414 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2417 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2418 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2419 ptr
->r
.record
.x
.where
.pspoff
);
2422 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2423 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2424 ptr
->r
.record
.x
.where
.spoff
);
2427 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2428 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2429 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2431 case spill_psprel_p
:
2432 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2433 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2434 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2437 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2438 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2439 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2442 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2443 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2444 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2448 as_bad (_("record_type_not_valid"));
2453 /* Given a unw_rec_list list, process all the records with
2454 the specified function. */
2456 process_unw_records (unw_rec_list
*list
, vbyte_func f
)
2459 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2460 process_one_record (ptr
, f
);
2463 /* Determine the size of a record list in bytes. */
2465 calc_record_size (unw_rec_list
*list
)
2468 process_unw_records (list
, count_output
);
2472 /* Return the number of bits set in the input value.
2473 Perhaps this has a better place... */
2474 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2475 # define popcount __builtin_popcount
2478 popcount (unsigned x
)
2480 static const unsigned char popcnt
[16] =
2488 if (x
< NELEMS (popcnt
))
2490 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2494 /* Update IMASK bitmask to reflect the fact that one or more registers
2495 of type TYPE are saved starting at instruction with index T. If N
2496 bits are set in REGMASK, it is assumed that instructions T through
2497 T+N-1 save these registers.
2501 1: instruction saves next fp reg
2502 2: instruction saves next general reg
2503 3: instruction saves next branch reg */
2505 set_imask (unw_rec_list
*region
,
2506 unsigned long regmask
,
2510 unsigned char *imask
;
2511 unsigned long imask_size
;
2515 imask
= region
->r
.record
.r
.mask
.i
;
2516 imask_size
= region
->r
.record
.r
.imask_size
;
2519 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2520 imask
= xmalloc (imask_size
);
2521 memset (imask
, 0, imask_size
);
2523 region
->r
.record
.r
.imask_size
= imask_size
;
2524 region
->r
.record
.r
.mask
.i
= imask
;
2528 pos
= 2 * (3 - t
% 4);
2531 if (i
>= imask_size
)
2533 as_bad (_("Ignoring attempt to spill beyond end of region"));
2537 imask
[i
] |= (type
& 0x3) << pos
;
2539 regmask
&= (regmask
- 1);
2549 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2550 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2551 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2554 static unsigned long
2555 slot_index (unsigned long slot_addr
,
2557 unsigned long first_addr
,
2561 unsigned long s_index
= 0;
2563 /* First time we are called, the initial address and frag are invalid. */
2564 if (first_addr
== 0)
2567 /* If the two addresses are in different frags, then we need to add in
2568 the remaining size of this frag, and then the entire size of intermediate
2570 while (slot_frag
!= first_frag
)
2572 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2576 /* We can get the final addresses only during and after
2578 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2579 s_index
+= 3 * ((first_frag
->fr_next
->fr_address
2580 - first_frag
->fr_address
2581 - first_frag
->fr_fix
) >> 4);
2584 /* We don't know what the final addresses will be. We try our
2585 best to estimate. */
2586 switch (first_frag
->fr_type
)
2592 as_fatal (_("Only constant space allocation is supported"));
2598 /* Take alignment into account. Assume the worst case
2599 before relaxation. */
2600 s_index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2604 if (first_frag
->fr_symbol
)
2606 as_fatal (_("Only constant offsets are supported"));
2610 s_index
+= 3 * (first_frag
->fr_offset
>> 4);
2614 /* Add in the full size of the frag converted to instruction slots. */
2615 s_index
+= 3 * (first_frag
->fr_fix
>> 4);
2616 /* Subtract away the initial part before first_addr. */
2617 s_index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2618 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2620 /* Move to the beginning of the next frag. */
2621 first_frag
= first_frag
->fr_next
;
2622 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2624 /* This can happen if there is section switching in the middle of a
2625 function, causing the frag chain for the function to be broken.
2626 It is too difficult to recover safely from this problem, so we just
2627 exit with an error. */
2628 if (first_frag
== NULL
)
2629 as_fatal (_("Section switching in code is not supported."));
2632 /* Add in the used part of the last frag. */
2633 s_index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2634 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2638 /* Optimize unwind record directives. */
2640 static unw_rec_list
*
2641 optimize_unw_records (unw_rec_list
*list
)
2646 /* If the only unwind record is ".prologue" or ".prologue" followed
2647 by ".body", then we can optimize the unwind directives away. */
2648 if (list
->r
.type
== prologue
2649 && (list
->next
->r
.type
== endp
2650 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2656 /* Given a complete record list, process any records which have
2657 unresolved fields, (ie length counts for a prologue). After
2658 this has been run, all necessary information should be available
2659 within each record to generate an image. */
2662 fixup_unw_records (unw_rec_list
*list
, int before_relax
)
2664 unw_rec_list
*ptr
, *region
= 0;
2665 unsigned long first_addr
= 0, rlen
= 0, t
;
2666 fragS
*first_frag
= 0;
2668 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2670 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2671 as_bad (_(" Insn slot not set in unwind record."));
2672 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2673 first_addr
, first_frag
, before_relax
);
2674 switch (ptr
->r
.type
)
2682 unsigned long last_addr
= 0;
2683 fragS
*last_frag
= NULL
;
2685 first_addr
= ptr
->slot_number
;
2686 first_frag
= ptr
->slot_frag
;
2687 /* Find either the next body/prologue start, or the end of
2688 the function, and determine the size of the region. */
2689 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2690 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2691 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2693 last_addr
= last
->slot_number
;
2694 last_frag
= last
->slot_frag
;
2697 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2699 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2700 if (ptr
->r
.type
== body
)
2701 /* End of region. */
2709 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2711 /* This happens when a memory-stack-less procedure uses a
2712 ".restore sp" directive at the end of a region to pop
2714 ptr
->r
.record
.b
.t
= 0;
2725 case priunat_when_gr
:
2726 case priunat_when_mem
:
2730 ptr
->r
.record
.p
.t
= t
;
2738 case spill_psprel_p
:
2739 ptr
->r
.record
.x
.t
= t
;
2745 as_bad (_("frgr_mem record before region record!"));
2748 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2749 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2750 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2751 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2756 as_bad (_("fr_mem record before region record!"));
2759 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2760 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2765 as_bad (_("gr_mem record before region record!"));
2768 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2769 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2774 as_bad (_("br_mem record before region record!"));
2777 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2778 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2784 as_bad (_("gr_gr record before region record!"));
2787 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2792 as_bad (_("br_gr record before region record!"));
2795 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2804 /* Estimate the size of a frag before relaxing. We only have one type of frag
2805 to handle here, which is the unwind info frag. */
2808 ia64_estimate_size_before_relax (fragS
*frag
,
2809 asection
*segtype ATTRIBUTE_UNUSED
)
2814 /* ??? This code is identical to the first part of ia64_convert_frag. */
2815 list
= (unw_rec_list
*) frag
->fr_opcode
;
2816 fixup_unw_records (list
, 0);
2818 len
= calc_record_size (list
);
2819 /* pad to pointer-size boundary. */
2820 pad
= len
% md
.pointer_size
;
2822 len
+= md
.pointer_size
- pad
;
2823 /* Add 8 for the header. */
2825 /* Add a pointer for the personality offset. */
2826 if (frag
->fr_offset
)
2827 size
+= md
.pointer_size
;
2829 /* fr_var carries the max_chars that we created the fragment with.
2830 We must, of course, have allocated enough memory earlier. */
2831 gas_assert (frag
->fr_var
>= size
);
2833 return frag
->fr_fix
+ size
;
2836 /* This function converts a rs_machine_dependent variant frag into a
2837 normal fill frag with the unwind image from the the record list. */
2839 ia64_convert_frag (fragS
*frag
)
2845 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2846 list
= (unw_rec_list
*) frag
->fr_opcode
;
2847 fixup_unw_records (list
, 0);
2849 len
= calc_record_size (list
);
2850 /* pad to pointer-size boundary. */
2851 pad
= len
% md
.pointer_size
;
2853 len
+= md
.pointer_size
- pad
;
2854 /* Add 8 for the header. */
2856 /* Add a pointer for the personality offset. */
2857 if (frag
->fr_offset
)
2858 size
+= md
.pointer_size
;
2860 /* fr_var carries the max_chars that we created the fragment with.
2861 We must, of course, have allocated enough memory earlier. */
2862 gas_assert (frag
->fr_var
>= size
);
2864 /* Initialize the header area. fr_offset is initialized with
2865 unwind.personality_routine. */
2866 if (frag
->fr_offset
)
2868 if (md
.flags
& EF_IA_64_ABI64
)
2869 flag_value
= (bfd_vma
) 3 << 32;
2871 /* 32-bit unwind info block. */
2872 flag_value
= (bfd_vma
) 0x1003 << 32;
2877 md_number_to_chars (frag
->fr_literal
,
2878 (((bfd_vma
) 1 << 48) /* Version. */
2879 | flag_value
/* U & E handler flags. */
2880 | (len
/ md
.pointer_size
)), /* Length. */
2883 /* Skip the header. */
2884 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2885 process_unw_records (list
, output_vbyte_mem
);
2887 /* Fill the padding bytes with zeros. */
2889 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2890 md
.pointer_size
- pad
);
2891 /* Fill the unwind personality with zeros. */
2892 if (frag
->fr_offset
)
2893 md_number_to_chars (frag
->fr_literal
+ size
- md
.pointer_size
, 0,
2896 frag
->fr_fix
+= size
;
2897 frag
->fr_type
= rs_fill
;
2899 frag
->fr_offset
= 0;
2903 parse_predicate_and_operand (expressionS
*e
, unsigned *qp
, const char *po
)
2905 int sep
= parse_operand_and_eval (e
, ',');
2907 *qp
= e
->X_add_number
- REG_P
;
2908 if (e
->X_op
!= O_register
|| *qp
> 63)
2910 as_bad (_("First operand to .%s must be a predicate"), po
);
2914 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
2916 sep
= parse_operand_and_eval (e
, ',');
2923 convert_expr_to_ab_reg (const expressionS
*e
,
2929 unsigned int reg
= e
->X_add_number
;
2931 *ab
= *regp
= 0; /* Anything valid is good here. */
2933 if (e
->X_op
!= O_register
)
2934 reg
= REG_GR
; /* Anything invalid is good here. */
2936 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2939 *regp
= reg
- REG_GR
;
2941 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2942 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2945 *regp
= reg
- REG_FR
;
2947 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2950 *regp
= reg
- REG_BR
;
2957 case REG_PR
: *regp
= 0; break;
2958 case REG_PSP
: *regp
= 1; break;
2959 case REG_PRIUNAT
: *regp
= 2; break;
2960 case REG_BR
+ 0: *regp
= 3; break;
2961 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2962 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2963 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2964 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2965 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2966 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2967 case REG_AR
+ AR_LC
: *regp
= 10; break;
2970 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
2977 convert_expr_to_xy_reg (const expressionS
*e
,
2983 unsigned int reg
= e
->X_add_number
;
2985 *xy
= *regp
= 0; /* Anything valid is good here. */
2987 if (e
->X_op
!= O_register
)
2988 reg
= REG_GR
; /* Anything invalid is good here. */
2990 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
2993 *regp
= reg
- REG_GR
;
2995 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
2998 *regp
= reg
- REG_FR
;
3000 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3003 *regp
= reg
- REG_BR
;
3006 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3012 /* The current frag is an alignment frag. */
3013 align_frag
= frag_now
;
3014 s_align_bytes (arg
);
3018 dot_radix (int dummy ATTRIBUTE_UNUSED
)
3025 if (is_it_end_of_statement ())
3027 radix
= input_line_pointer
;
3028 ch
= get_symbol_end ();
3029 ia64_canonicalize_symbol_name (radix
);
3030 if (strcasecmp (radix
, "C"))
3031 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3032 *input_line_pointer
= ch
;
3033 demand_empty_rest_of_line ();
3036 /* Helper function for .loc directives. If the assembler is not generating
3037 line number info, then we need to remember which instructions have a .loc
3038 directive, and only call dwarf2_gen_line_info for those instructions. */
3043 CURR_SLOT
.loc_directive_seen
= 1;
3044 dwarf2_directive_loc (x
);
3047 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3049 dot_special_section (int which
)
3051 set_section ((char *) special_section_name
[which
]);
3054 /* Return -1 for warning and 0 for error. */
3057 unwind_diagnostic (const char * region
, const char *directive
)
3059 if (md
.unwind_check
== unwind_check_warning
)
3061 as_warn (_(".%s outside of %s"), directive
, region
);
3066 as_bad (_(".%s outside of %s"), directive
, region
);
3067 ignore_rest_of_line ();
3072 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3073 a procedure but the unwind directive check is set to warning, 0 if
3074 a directive isn't in a procedure and the unwind directive check is set
3078 in_procedure (const char *directive
)
3080 if (unwind
.proc_pending
.sym
3081 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3083 return unwind_diagnostic ("procedure", directive
);
3086 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3087 a prologue but the unwind directive check is set to warning, 0 if
3088 a directive isn't in a prologue and the unwind directive check is set
3092 in_prologue (const char *directive
)
3094 int in
= in_procedure (directive
);
3096 if (in
> 0 && !unwind
.prologue
)
3097 in
= unwind_diagnostic ("prologue", directive
);
3098 check_pending_save ();
3102 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3103 a body but the unwind directive check is set to warning, 0 if
3104 a directive isn't in a body and the unwind directive check is set
3108 in_body (const char *directive
)
3110 int in
= in_procedure (directive
);
3112 if (in
> 0 && !unwind
.body
)
3113 in
= unwind_diagnostic ("body region", directive
);
3118 add_unwind_entry (unw_rec_list
*ptr
, int sep
)
3123 unwind
.tail
->next
= ptr
;
3128 /* The current entry can in fact be a chain of unwind entries. */
3129 if (unwind
.current_entry
== NULL
)
3130 unwind
.current_entry
= ptr
;
3133 /* The current entry can in fact be a chain of unwind entries. */
3134 if (unwind
.current_entry
== NULL
)
3135 unwind
.current_entry
= ptr
;
3139 /* Parse a tag permitted for the current directive. */
3143 ch
= get_symbol_end ();
3144 /* FIXME: For now, just issue a warning that this isn't implemented. */
3151 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3154 *input_line_pointer
= ch
;
3156 if (sep
!= NOT_A_CHAR
)
3157 demand_empty_rest_of_line ();
3161 dot_fframe (int dummy ATTRIBUTE_UNUSED
)
3166 if (!in_prologue ("fframe"))
3169 sep
= parse_operand_and_eval (&e
, ',');
3171 if (e
.X_op
!= O_constant
)
3173 as_bad (_("First operand to .fframe must be a constant"));
3176 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3180 dot_vframe (int dummy ATTRIBUTE_UNUSED
)
3186 if (!in_prologue ("vframe"))
3189 sep
= parse_operand_and_eval (&e
, ',');
3190 reg
= e
.X_add_number
- REG_GR
;
3191 if (e
.X_op
!= O_register
|| reg
> 127)
3193 as_bad (_("First operand to .vframe must be a general register"));
3196 add_unwind_entry (output_mem_stack_v (), sep
);
3197 if (! (unwind
.prologue_mask
& 2))
3198 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3199 else if (reg
!= unwind
.prologue_gr
3200 + (unsigned) popcount (unwind
.prologue_mask
& (-2 << 1)))
3201 as_warn (_("Operand of .vframe contradicts .prologue"));
3205 dot_vframesp (int psp
)
3211 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3213 if (!in_prologue ("vframesp"))
3216 sep
= parse_operand_and_eval (&e
, ',');
3217 if (e
.X_op
!= O_constant
)
3219 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3222 add_unwind_entry (output_mem_stack_v (), sep
);
3223 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3227 dot_save (int dummy ATTRIBUTE_UNUSED
)
3230 unsigned reg1
, reg2
;
3233 if (!in_prologue ("save"))
3236 sep
= parse_operand_and_eval (&e1
, ',');
3238 sep
= parse_operand_and_eval (&e2
, ',');
3242 reg1
= e1
.X_add_number
;
3243 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3244 if (e1
.X_op
!= O_register
)
3246 as_bad (_("First operand to .save not a register"));
3247 reg1
= REG_PR
; /* Anything valid is good here. */
3249 reg2
= e2
.X_add_number
- REG_GR
;
3250 if (e2
.X_op
!= O_register
|| reg2
> 127)
3252 as_bad (_("Second operand to .save not a valid register"));
3257 case REG_AR
+ AR_BSP
:
3258 add_unwind_entry (output_bsp_when (), sep
);
3259 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3261 case REG_AR
+ AR_BSPSTORE
:
3262 add_unwind_entry (output_bspstore_when (), sep
);
3263 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3265 case REG_AR
+ AR_RNAT
:
3266 add_unwind_entry (output_rnat_when (), sep
);
3267 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3269 case REG_AR
+ AR_UNAT
:
3270 add_unwind_entry (output_unat_when (), sep
);
3271 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3273 case REG_AR
+ AR_FPSR
:
3274 add_unwind_entry (output_fpsr_when (), sep
);
3275 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3277 case REG_AR
+ AR_PFS
:
3278 add_unwind_entry (output_pfs_when (), sep
);
3279 if (! (unwind
.prologue_mask
& 4))
3280 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3281 else if (reg2
!= unwind
.prologue_gr
3282 + (unsigned) popcount (unwind
.prologue_mask
& (-4 << 1)))
3283 as_warn (_("Second operand of .save contradicts .prologue"));
3285 case REG_AR
+ AR_LC
:
3286 add_unwind_entry (output_lc_when (), sep
);
3287 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3290 add_unwind_entry (output_rp_when (), sep
);
3291 if (! (unwind
.prologue_mask
& 8))
3292 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3293 else if (reg2
!= unwind
.prologue_gr
)
3294 as_warn (_("Second operand of .save contradicts .prologue"));
3297 add_unwind_entry (output_preds_when (), sep
);
3298 if (! (unwind
.prologue_mask
& 1))
3299 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3300 else if (reg2
!= unwind
.prologue_gr
3301 + (unsigned) popcount (unwind
.prologue_mask
& (-1 << 1)))
3302 as_warn (_("Second operand of .save contradicts .prologue"));
3305 add_unwind_entry (output_priunat_when_gr (), sep
);
3306 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3309 as_bad (_("First operand to .save not a valid register"));
3310 add_unwind_entry (NULL
, sep
);
3316 dot_restore (int dummy ATTRIBUTE_UNUSED
)
3319 unsigned long ecount
; /* # of _additional_ regions to pop */
3322 if (!in_body ("restore"))
3325 sep
= parse_operand_and_eval (&e1
, ',');
3326 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3327 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3333 sep
= parse_operand_and_eval (&e2
, ',');
3334 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3336 as_bad (_("Second operand to .restore must be a constant >= 0"));
3337 e2
.X_add_number
= 0;
3339 ecount
= e2
.X_add_number
;
3342 ecount
= unwind
.prologue_count
- 1;
3344 if (ecount
>= unwind
.prologue_count
)
3346 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3347 ecount
+ 1, unwind
.prologue_count
);
3351 add_unwind_entry (output_epilogue (ecount
), sep
);
3353 if (ecount
< unwind
.prologue_count
)
3354 unwind
.prologue_count
-= ecount
+ 1;
3356 unwind
.prologue_count
= 0;
3360 dot_restorereg (int pred
)
3362 unsigned int qp
, ab
, reg
;
3365 const char * const po
= pred
? "restorereg.p" : "restorereg";
3367 if (!in_procedure (po
))
3371 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3374 sep
= parse_operand_and_eval (&e
, ',');
3377 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3379 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3382 static char *special_linkonce_name
[] =
3384 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3388 start_unwind_section (const segT text_seg
, int sec_index
)
3391 Use a slightly ugly scheme to derive the unwind section names from
3392 the text section name:
3394 text sect. unwind table sect.
3395 name: name: comments:
3396 ---------- ----------------- --------------------------------
3398 .text.foo .IA_64.unwind.text.foo
3399 .foo .IA_64.unwind.foo
3401 .gnu.linkonce.ia64unw.foo
3402 _info .IA_64.unwind_info gas issues error message (ditto)
3403 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3405 This mapping is done so that:
3407 (a) An object file with unwind info only in .text will use
3408 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3409 This follows the letter of the ABI and also ensures backwards
3410 compatibility with older toolchains.
3412 (b) An object file with unwind info in multiple text sections
3413 will use separate unwind sections for each text section.
3414 This allows us to properly set the "sh_info" and "sh_link"
3415 fields in SHT_IA_64_UNWIND as required by the ABI and also
3416 lets GNU ld support programs with multiple segments
3417 containing unwind info (as might be the case for certain
3418 embedded applications).
3420 (c) An error is issued if there would be a name clash.
3423 const char *text_name
, *sec_text_name
;
3425 const char *prefix
= special_section_name
[sec_index
];
3427 size_t prefix_len
, suffix_len
, sec_name_len
;
3429 sec_text_name
= segment_name (text_seg
);
3430 text_name
= sec_text_name
;
3431 if (strncmp (text_name
, "_info", 5) == 0)
3433 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3435 ignore_rest_of_line ();
3438 if (strcmp (text_name
, ".text") == 0)
3441 /* Build the unwind section name by appending the (possibly stripped)
3442 text section name to the unwind prefix. */
3444 if (strncmp (text_name
, ".gnu.linkonce.t.",
3445 sizeof (".gnu.linkonce.t.") - 1) == 0)
3447 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3448 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3451 prefix_len
= strlen (prefix
);
3452 suffix_len
= strlen (suffix
);
3453 sec_name_len
= prefix_len
+ suffix_len
;
3454 sec_name
= alloca (sec_name_len
+ 1);
3455 memcpy (sec_name
, prefix
, prefix_len
);
3456 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3457 sec_name
[sec_name_len
] = '\0';
3459 /* Handle COMDAT group. */
3460 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3461 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3464 size_t len
, group_name_len
;
3465 const char *group_name
= elf_group_name (text_seg
);
3467 if (group_name
== NULL
)
3469 as_bad (_("Group section `%s' has no group signature"),
3471 ignore_rest_of_line ();
3474 /* We have to construct a fake section directive. */
3475 group_name_len
= strlen (group_name
);
3477 + 16 /* ,"aG",@progbits, */
3478 + group_name_len
/* ,group_name */
3481 section
= alloca (len
+ 1);
3482 memcpy (section
, sec_name
, sec_name_len
);
3483 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3484 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3485 memcpy (section
+ len
- 7, ",comdat", 7);
3486 section
[len
] = '\0';
3487 set_section (section
);
3491 set_section (sec_name
);
3492 bfd_set_section_flags (stdoutput
, now_seg
,
3493 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3496 elf_linked_to_section (now_seg
) = text_seg
;
3500 generate_unwind_image (const segT text_seg
)
3505 /* Mark the end of the unwind info, so that we can compute the size of the
3506 last unwind region. */
3507 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3509 /* Force out pending instructions, to make sure all unwind records have
3510 a valid slot_number field. */
3511 ia64_flush_insns ();
3513 /* Generate the unwind record. */
3514 list
= optimize_unw_records (unwind
.list
);
3515 fixup_unw_records (list
, 1);
3516 size
= calc_record_size (list
);
3518 if (size
> 0 || unwind
.force_unwind_entry
)
3520 unwind
.force_unwind_entry
= 0;
3521 /* pad to pointer-size boundary. */
3522 pad
= size
% md
.pointer_size
;
3524 size
+= md
.pointer_size
- pad
;
3525 /* Add 8 for the header. */
3527 /* Add a pointer for the personality offset. */
3528 if (unwind
.personality_routine
)
3529 size
+= md
.pointer_size
;
3532 /* If there are unwind records, switch sections, and output the info. */
3536 bfd_reloc_code_real_type reloc
;
3538 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3540 /* Make sure the section has 4 byte alignment for ILP32 and
3541 8 byte alignment for LP64. */
3542 frag_align (md
.pointer_size_shift
, 0, 0);
3543 record_alignment (now_seg
, md
.pointer_size_shift
);
3545 /* Set expression which points to start of unwind descriptor area. */
3546 unwind
.info
= expr_build_dot ();
3548 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3549 (offsetT
) (long) unwind
.personality_routine
,
3552 /* Add the personality address to the image. */
3553 if (unwind
.personality_routine
!= 0)
3555 exp
.X_op
= O_symbol
;
3556 exp
.X_add_symbol
= unwind
.personality_routine
;
3557 exp
.X_add_number
= 0;
3559 if (md
.flags
& EF_IA_64_BE
)
3561 if (md
.flags
& EF_IA_64_ABI64
)
3562 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3564 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3568 if (md
.flags
& EF_IA_64_ABI64
)
3569 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3571 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3574 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3575 md
.pointer_size
, &exp
, 0, reloc
);
3576 unwind
.personality_routine
= 0;
3580 free_saved_prologue_counts ();
3581 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3585 dot_handlerdata (int dummy ATTRIBUTE_UNUSED
)
3587 if (!in_procedure ("handlerdata"))
3589 unwind
.force_unwind_entry
= 1;
3591 /* Remember which segment we're in so we can switch back after .endp */
3592 unwind
.saved_text_seg
= now_seg
;
3593 unwind
.saved_text_subseg
= now_subseg
;
3595 /* Generate unwind info into unwind-info section and then leave that
3596 section as the currently active one so dataXX directives go into
3597 the language specific data area of the unwind info block. */
3598 generate_unwind_image (now_seg
);
3599 demand_empty_rest_of_line ();
3603 dot_unwentry (int dummy ATTRIBUTE_UNUSED
)
3605 if (!in_procedure ("unwentry"))
3607 unwind
.force_unwind_entry
= 1;
3608 demand_empty_rest_of_line ();
3612 dot_altrp (int dummy ATTRIBUTE_UNUSED
)
3617 if (!in_prologue ("altrp"))
3620 parse_operand_and_eval (&e
, 0);
3621 reg
= e
.X_add_number
- REG_BR
;
3622 if (e
.X_op
!= O_register
|| reg
> 7)
3624 as_bad (_("First operand to .altrp not a valid branch register"));
3627 add_unwind_entry (output_rp_br (reg
), 0);
3631 dot_savemem (int psprel
)
3636 const char * const po
= psprel
? "savepsp" : "savesp";
3638 if (!in_prologue (po
))
3641 sep
= parse_operand_and_eval (&e1
, ',');
3643 sep
= parse_operand_and_eval (&e2
, ',');
3647 reg1
= e1
.X_add_number
;
3648 val
= e2
.X_add_number
;
3650 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3651 if (e1
.X_op
!= O_register
)
3653 as_bad (_("First operand to .%s not a register"), po
);
3654 reg1
= REG_PR
; /* Anything valid is good here. */
3656 if (e2
.X_op
!= O_constant
)
3658 as_bad (_("Second operand to .%s not a constant"), po
);
3664 case REG_AR
+ AR_BSP
:
3665 add_unwind_entry (output_bsp_when (), sep
);
3666 add_unwind_entry ((psprel
3668 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3670 case REG_AR
+ AR_BSPSTORE
:
3671 add_unwind_entry (output_bspstore_when (), sep
);
3672 add_unwind_entry ((psprel
3673 ? output_bspstore_psprel
3674 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3676 case REG_AR
+ AR_RNAT
:
3677 add_unwind_entry (output_rnat_when (), sep
);
3678 add_unwind_entry ((psprel
3679 ? output_rnat_psprel
3680 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3682 case REG_AR
+ AR_UNAT
:
3683 add_unwind_entry (output_unat_when (), sep
);
3684 add_unwind_entry ((psprel
3685 ? output_unat_psprel
3686 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3688 case REG_AR
+ AR_FPSR
:
3689 add_unwind_entry (output_fpsr_when (), sep
);
3690 add_unwind_entry ((psprel
3691 ? output_fpsr_psprel
3692 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3694 case REG_AR
+ AR_PFS
:
3695 add_unwind_entry (output_pfs_when (), sep
);
3696 add_unwind_entry ((psprel
3698 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3700 case REG_AR
+ AR_LC
:
3701 add_unwind_entry (output_lc_when (), sep
);
3702 add_unwind_entry ((psprel
3704 : output_lc_sprel
) (val
), NOT_A_CHAR
);
3707 add_unwind_entry (output_rp_when (), sep
);
3708 add_unwind_entry ((psprel
3710 : output_rp_sprel
) (val
), NOT_A_CHAR
);
3713 add_unwind_entry (output_preds_when (), sep
);
3714 add_unwind_entry ((psprel
3715 ? output_preds_psprel
3716 : output_preds_sprel
) (val
), NOT_A_CHAR
);
3719 add_unwind_entry (output_priunat_when_mem (), sep
);
3720 add_unwind_entry ((psprel
3721 ? output_priunat_psprel
3722 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
3725 as_bad (_("First operand to .%s not a valid register"), po
);
3726 add_unwind_entry (NULL
, sep
);
3732 dot_saveg (int dummy ATTRIBUTE_UNUSED
)
3738 if (!in_prologue ("save.g"))
3741 sep
= parse_operand_and_eval (&e
, ',');
3743 grmask
= e
.X_add_number
;
3744 if (e
.X_op
!= O_constant
3745 || e
.X_add_number
<= 0
3746 || e
.X_add_number
> 0xf)
3748 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
3755 int n
= popcount (grmask
);
3757 parse_operand_and_eval (&e
, 0);
3758 reg
= e
.X_add_number
- REG_GR
;
3759 if (e
.X_op
!= O_register
|| reg
> 127)
3761 as_bad (_("Second operand to .save.g must be a general register"));
3764 else if (reg
> 128U - n
)
3766 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
3769 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
3772 add_unwind_entry (output_gr_mem (grmask
), 0);
3776 dot_savef (int dummy ATTRIBUTE_UNUSED
)
3780 if (!in_prologue ("save.f"))
3783 parse_operand_and_eval (&e
, 0);
3785 if (e
.X_op
!= O_constant
3786 || e
.X_add_number
<= 0
3787 || e
.X_add_number
> 0xfffff)
3789 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
3792 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
3796 dot_saveb (int dummy ATTRIBUTE_UNUSED
)
3802 if (!in_prologue ("save.b"))
3805 sep
= parse_operand_and_eval (&e
, ',');
3807 brmask
= e
.X_add_number
;
3808 if (e
.X_op
!= O_constant
3809 || e
.X_add_number
<= 0
3810 || e
.X_add_number
> 0x1f)
3812 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
3819 int n
= popcount (brmask
);
3821 parse_operand_and_eval (&e
, 0);
3822 reg
= e
.X_add_number
- REG_GR
;
3823 if (e
.X_op
!= O_register
|| reg
> 127)
3825 as_bad (_("Second operand to .save.b must be a general register"));
3828 else if (reg
> 128U - n
)
3830 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
3833 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
3836 add_unwind_entry (output_br_mem (brmask
), 0);
3840 dot_savegf (int dummy ATTRIBUTE_UNUSED
)
3844 if (!in_prologue ("save.gf"))
3847 if (parse_operand_and_eval (&e1
, ',') == ',')
3848 parse_operand_and_eval (&e2
, 0);
3852 if (e1
.X_op
!= O_constant
3853 || e1
.X_add_number
< 0
3854 || e1
.X_add_number
> 0xf)
3856 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
3858 e1
.X_add_number
= 0;
3860 if (e2
.X_op
!= O_constant
3861 || e2
.X_add_number
< 0
3862 || e2
.X_add_number
> 0xfffff)
3864 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
3866 e2
.X_add_number
= 0;
3868 if (e1
.X_op
== O_constant
3869 && e2
.X_op
== O_constant
3870 && e1
.X_add_number
== 0
3871 && e2
.X_add_number
== 0)
3872 as_bad (_("Operands to .save.gf may not be both zero"));
3874 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
3878 dot_spill (int dummy ATTRIBUTE_UNUSED
)
3882 if (!in_prologue ("spill"))
3885 parse_operand_and_eval (&e
, 0);
3887 if (e
.X_op
!= O_constant
)
3889 as_bad (_("Operand to .spill must be a constant"));
3892 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
3896 dot_spillreg (int pred
)
3899 unsigned int qp
, ab
, xy
, reg
, treg
;
3901 const char * const po
= pred
? "spillreg.p" : "spillreg";
3903 if (!in_procedure (po
))
3907 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3910 sep
= parse_operand_and_eval (&e
, ',');
3913 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3916 sep
= parse_operand_and_eval (&e
, ',');
3919 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
3921 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
3925 dot_spillmem (int psprel
)
3928 int pred
= (psprel
< 0), sep
;
3929 unsigned int qp
, ab
, reg
;
3935 po
= psprel
? "spillpsp.p" : "spillsp.p";
3938 po
= psprel
? "spillpsp" : "spillsp";
3940 if (!in_procedure (po
))
3944 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3947 sep
= parse_operand_and_eval (&e
, ',');
3950 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3953 sep
= parse_operand_and_eval (&e
, ',');
3956 if (e
.X_op
!= O_constant
)
3958 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
3963 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
3965 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
3969 get_saved_prologue_count (unsigned long lbl
)
3971 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3973 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3977 return lpc
->prologue_count
;
3979 as_bad (_("Missing .label_state %ld"), lbl
);
3984 save_prologue_count (unsigned long lbl
, unsigned int count
)
3986 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3988 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3992 lpc
->prologue_count
= count
;
3995 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
3997 new_lpc
->next
= unwind
.saved_prologue_counts
;
3998 new_lpc
->label_number
= lbl
;
3999 new_lpc
->prologue_count
= count
;
4000 unwind
.saved_prologue_counts
= new_lpc
;
4005 free_saved_prologue_counts ()
4007 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4008 label_prologue_count
*next
;
4017 unwind
.saved_prologue_counts
= NULL
;
4021 dot_label_state (int dummy ATTRIBUTE_UNUSED
)
4025 if (!in_body ("label_state"))
4028 parse_operand_and_eval (&e
, 0);
4029 if (e
.X_op
== O_constant
)
4030 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4033 as_bad (_("Operand to .label_state must be a constant"));
4036 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4040 dot_copy_state (int dummy ATTRIBUTE_UNUSED
)
4044 if (!in_body ("copy_state"))
4047 parse_operand_and_eval (&e
, 0);
4048 if (e
.X_op
== O_constant
)
4049 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4052 as_bad (_("Operand to .copy_state must be a constant"));
4055 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4059 dot_unwabi (int dummy ATTRIBUTE_UNUSED
)
4064 if (!in_prologue ("unwabi"))
4067 sep
= parse_operand_and_eval (&e1
, ',');
4069 parse_operand_and_eval (&e2
, 0);
4073 if (e1
.X_op
!= O_constant
)
4075 as_bad (_("First operand to .unwabi must be a constant"));
4076 e1
.X_add_number
= 0;
4079 if (e2
.X_op
!= O_constant
)
4081 as_bad (_("Second operand to .unwabi must be a constant"));
4082 e2
.X_add_number
= 0;
4085 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4089 dot_personality (int dummy ATTRIBUTE_UNUSED
)
4092 if (!in_procedure ("personality"))
4095 name
= input_line_pointer
;
4096 c
= get_symbol_end ();
4097 p
= input_line_pointer
;
4098 unwind
.personality_routine
= symbol_find_or_make (name
);
4099 unwind
.force_unwind_entry
= 1;
4102 demand_empty_rest_of_line ();
4106 dot_proc (int dummy ATTRIBUTE_UNUSED
)
4110 proc_pending
*pending
, *last_pending
;
4112 if (unwind
.proc_pending
.sym
)
4114 (md
.unwind_check
== unwind_check_warning
4116 : as_bad
) (_("Missing .endp after previous .proc"));
4117 while (unwind
.proc_pending
.next
)
4119 pending
= unwind
.proc_pending
.next
;
4120 unwind
.proc_pending
.next
= pending
->next
;
4124 last_pending
= NULL
;
4126 /* Parse names of main and alternate entry points and mark them as
4127 function symbols: */
4131 name
= input_line_pointer
;
4132 c
= get_symbol_end ();
4133 p
= input_line_pointer
;
4135 as_bad (_("Empty argument of .proc"));
4138 sym
= symbol_find_or_make (name
);
4139 if (S_IS_DEFINED (sym
))
4140 as_bad (_("`%s' was already defined"), name
);
4141 else if (!last_pending
)
4143 unwind
.proc_pending
.sym
= sym
;
4144 last_pending
= &unwind
.proc_pending
;
4148 pending
= xmalloc (sizeof (*pending
));
4150 last_pending
= last_pending
->next
= pending
;
4152 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4156 if (*input_line_pointer
!= ',')
4158 ++input_line_pointer
;
4162 unwind
.proc_pending
.sym
= expr_build_dot ();
4163 last_pending
= &unwind
.proc_pending
;
4165 last_pending
->next
= NULL
;
4166 demand_empty_rest_of_line ();
4169 unwind
.prologue
= 0;
4170 unwind
.prologue_count
= 0;
4173 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4174 unwind
.personality_routine
= 0;
4178 dot_body (int dummy ATTRIBUTE_UNUSED
)
4180 if (!in_procedure ("body"))
4182 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4183 as_warn (_("Initial .body should precede any instructions"));
4184 check_pending_save ();
4186 unwind
.prologue
= 0;
4187 unwind
.prologue_mask
= 0;
4190 add_unwind_entry (output_body (), 0);
4194 dot_prologue (int dummy ATTRIBUTE_UNUSED
)
4196 unsigned mask
= 0, grsave
= 0;
4198 if (!in_procedure ("prologue"))
4200 if (unwind
.prologue
)
4202 as_bad (_(".prologue within prologue"));
4203 ignore_rest_of_line ();
4206 if (!unwind
.body
&& unwind
.insn
)
4207 as_warn (_("Initial .prologue should precede any instructions"));
4209 if (!is_it_end_of_statement ())
4212 int n
, sep
= parse_operand_and_eval (&e
, ',');
4214 if (e
.X_op
!= O_constant
4215 || e
.X_add_number
< 0
4216 || e
.X_add_number
> 0xf)
4217 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4218 else if (e
.X_add_number
== 0)
4219 as_warn (_("Pointless use of zero first operand to .prologue"));
4221 mask
= e
.X_add_number
;
4222 n
= popcount (mask
);
4225 parse_operand_and_eval (&e
, 0);
4228 if (e
.X_op
== O_constant
4229 && e
.X_add_number
>= 0
4230 && e
.X_add_number
< 128)
4232 if (md
.unwind_check
== unwind_check_error
)
4233 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4234 grsave
= e
.X_add_number
;
4236 else if (e
.X_op
!= O_register
4237 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4239 as_bad (_("Second operand to .prologue must be a general register"));
4242 else if (grsave
> 128U - n
)
4244 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4251 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4253 add_unwind_entry (output_prologue (), 0);
4255 unwind
.prologue
= 1;
4256 unwind
.prologue_mask
= mask
;
4257 unwind
.prologue_gr
= grsave
;
4259 ++unwind
.prologue_count
;
4263 dot_endp (int dummy ATTRIBUTE_UNUSED
)
4266 int bytes_per_address
;
4269 subsegT saved_subseg
;
4270 proc_pending
*pending
;
4271 int unwind_check
= md
.unwind_check
;
4273 md
.unwind_check
= unwind_check_error
;
4274 if (!in_procedure ("endp"))
4276 md
.unwind_check
= unwind_check
;
4278 if (unwind
.saved_text_seg
)
4280 saved_seg
= unwind
.saved_text_seg
;
4281 saved_subseg
= unwind
.saved_text_subseg
;
4282 unwind
.saved_text_seg
= NULL
;
4286 saved_seg
= now_seg
;
4287 saved_subseg
= now_subseg
;
4290 insn_group_break (1, 0, 0);
4292 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4294 generate_unwind_image (saved_seg
);
4296 if (unwind
.info
|| unwind
.force_unwind_entry
)
4300 subseg_set (md
.last_text_seg
, 0);
4301 proc_end
= expr_build_dot ();
4303 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4305 /* Make sure that section has 4 byte alignment for ILP32 and
4306 8 byte alignment for LP64. */
4307 record_alignment (now_seg
, md
.pointer_size_shift
);
4309 /* Need space for 3 pointers for procedure start, procedure end,
4311 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4312 where
= frag_now_fix () - (3 * md
.pointer_size
);
4313 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4315 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4316 e
.X_op
= O_pseudo_fixup
;
4317 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4319 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4320 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4321 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4322 S_GET_VALUE (unwind
.proc_pending
.sym
),
4323 symbol_get_frag (unwind
.proc_pending
.sym
));
4325 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4326 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4328 e
.X_op
= O_pseudo_fixup
;
4329 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4331 e
.X_add_symbol
= proc_end
;
4332 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4333 bytes_per_address
, &e
);
4337 e
.X_op
= O_pseudo_fixup
;
4338 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4340 e
.X_add_symbol
= unwind
.info
;
4341 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4342 bytes_per_address
, &e
);
4345 subseg_set (saved_seg
, saved_subseg
);
4347 /* Set symbol sizes. */
4348 pending
= &unwind
.proc_pending
;
4349 if (S_GET_NAME (pending
->sym
))
4353 symbolS
*sym
= pending
->sym
;
4355 if (!S_IS_DEFINED (sym
))
4356 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4357 else if (S_GET_SIZE (sym
) == 0
4358 && symbol_get_obj (sym
)->size
== NULL
)
4360 fragS
*frag
= symbol_get_frag (sym
);
4364 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4365 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4368 symbol_get_obj (sym
)->size
=
4369 (expressionS
*) xmalloc (sizeof (expressionS
));
4370 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4371 symbol_get_obj (sym
)->size
->X_add_symbol
4372 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4373 frag_now_fix (), frag_now
);
4374 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4375 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4379 } while ((pending
= pending
->next
) != NULL
);
4382 /* Parse names of main and alternate entry points. */
4388 name
= input_line_pointer
;
4389 c
= get_symbol_end ();
4390 p
= input_line_pointer
;
4392 (md
.unwind_check
== unwind_check_warning
4394 : as_bad
) (_("Empty argument of .endp"));
4397 symbolS
*sym
= symbol_find (name
);
4399 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4401 if (sym
== pending
->sym
)
4403 pending
->sym
= NULL
;
4407 if (!sym
|| !pending
)
4408 as_warn (_("`%s' was not specified with previous .proc"), name
);
4412 if (*input_line_pointer
!= ',')
4414 ++input_line_pointer
;
4416 demand_empty_rest_of_line ();
4418 /* Deliberately only checking for the main entry point here; the
4419 language spec even says all arguments to .endp are ignored. */
4420 if (unwind
.proc_pending
.sym
4421 && S_GET_NAME (unwind
.proc_pending
.sym
)
4422 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4423 as_warn (_("`%s' should be an operand to this .endp"),
4424 S_GET_NAME (unwind
.proc_pending
.sym
));
4425 while (unwind
.proc_pending
.next
)
4427 pending
= unwind
.proc_pending
.next
;
4428 unwind
.proc_pending
.next
= pending
->next
;
4431 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4435 dot_template (int template_val
)
4437 CURR_SLOT
.user_template
= template_val
;
4441 dot_regstk (int dummy ATTRIBUTE_UNUSED
)
4443 int ins
, locs
, outs
, rots
;
4445 if (is_it_end_of_statement ())
4446 ins
= locs
= outs
= rots
= 0;
4449 ins
= get_absolute_expression ();
4450 if (*input_line_pointer
++ != ',')
4452 locs
= get_absolute_expression ();
4453 if (*input_line_pointer
++ != ',')
4455 outs
= get_absolute_expression ();
4456 if (*input_line_pointer
++ != ',')
4458 rots
= get_absolute_expression ();
4460 set_regstack (ins
, locs
, outs
, rots
);
4464 as_bad (_("Comma expected"));
4465 ignore_rest_of_line ();
4472 valueT num_alloced
= 0;
4473 struct dynreg
**drpp
, *dr
;
4474 int ch
, base_reg
= 0;
4480 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4481 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4482 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4486 /* First, remove existing names from hash table. */
4487 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4489 hash_delete (md
.dynreg_hash
, dr
->name
, FALSE
);
4490 /* FIXME: Free dr->name. */
4494 drpp
= &md
.dynreg
[type
];
4497 start
= input_line_pointer
;
4498 ch
= get_symbol_end ();
4499 len
= strlen (ia64_canonicalize_symbol_name (start
));
4500 *input_line_pointer
= ch
;
4503 if (*input_line_pointer
!= '[')
4505 as_bad (_("Expected '['"));
4508 ++input_line_pointer
; /* skip '[' */
4510 num_regs
= get_absolute_expression ();
4512 if (*input_line_pointer
++ != ']')
4514 as_bad (_("Expected ']'"));
4519 as_bad (_("Number of elements must be positive"));
4524 num_alloced
+= num_regs
;
4528 if (num_alloced
> md
.rot
.num_regs
)
4530 as_bad (_("Used more than the declared %d rotating registers"),
4536 if (num_alloced
> 96)
4538 as_bad (_("Used more than the available 96 rotating registers"));
4543 if (num_alloced
> 48)
4545 as_bad (_("Used more than the available 48 rotating registers"));
4556 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4557 memset (*drpp
, 0, sizeof (*dr
));
4560 name
= obstack_alloc (¬es
, len
+ 1);
4561 memcpy (name
, start
, len
);
4566 dr
->num_regs
= num_regs
;
4567 dr
->base
= base_reg
;
4569 base_reg
+= num_regs
;
4571 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4573 as_bad (_("Attempt to redefine register set `%s'"), name
);
4574 obstack_free (¬es
, name
);
4578 if (*input_line_pointer
!= ',')
4580 ++input_line_pointer
; /* skip comma */
4583 demand_empty_rest_of_line ();
4587 ignore_rest_of_line ();
4591 dot_byteorder (int byteorder
)
4593 segment_info_type
*seginfo
= seg_info (now_seg
);
4595 if (byteorder
== -1)
4597 if (seginfo
->tc_segment_info_data
.endian
== 0)
4598 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4599 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4602 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4604 if (target_big_endian
!= byteorder
)
4606 target_big_endian
= byteorder
;
4607 if (target_big_endian
)
4609 ia64_number_to_chars
= number_to_chars_bigendian
;
4610 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4614 ia64_number_to_chars
= number_to_chars_littleendian
;
4615 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4621 dot_psr (int dummy ATTRIBUTE_UNUSED
)
4628 option
= input_line_pointer
;
4629 ch
= get_symbol_end ();
4630 if (strcmp (option
, "lsb") == 0)
4631 md
.flags
&= ~EF_IA_64_BE
;
4632 else if (strcmp (option
, "msb") == 0)
4633 md
.flags
|= EF_IA_64_BE
;
4634 else if (strcmp (option
, "abi32") == 0)
4635 md
.flags
&= ~EF_IA_64_ABI64
;
4636 else if (strcmp (option
, "abi64") == 0)
4637 md
.flags
|= EF_IA_64_ABI64
;
4639 as_bad (_("Unknown psr option `%s'"), option
);
4640 *input_line_pointer
= ch
;
4643 if (*input_line_pointer
!= ',')
4646 ++input_line_pointer
;
4649 demand_empty_rest_of_line ();
4653 dot_ln (int dummy ATTRIBUTE_UNUSED
)
4655 new_logical_line (0, get_absolute_expression ());
4656 demand_empty_rest_of_line ();
4660 cross_section (int ref
, void (*builder
) (int), int ua
)
4663 int saved_auto_align
;
4664 unsigned int section_count
;
4667 start
= input_line_pointer
;
4673 name
= demand_copy_C_string (&len
);
4674 obstack_free(¬es
, name
);
4677 ignore_rest_of_line ();
4683 char c
= get_symbol_end ();
4685 if (input_line_pointer
== start
)
4687 as_bad (_("Missing section name"));
4688 ignore_rest_of_line ();
4691 *input_line_pointer
= c
;
4693 end
= input_line_pointer
;
4695 if (*input_line_pointer
!= ',')
4697 as_bad (_("Comma expected after section name"));
4698 ignore_rest_of_line ();
4702 end
= input_line_pointer
+ 1; /* skip comma */
4703 input_line_pointer
= start
;
4704 md
.keep_pending_output
= 1;
4705 section_count
= bfd_count_sections (stdoutput
);
4706 obj_elf_section (0);
4707 if (section_count
!= bfd_count_sections (stdoutput
))
4708 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
4709 input_line_pointer
= end
;
4710 saved_auto_align
= md
.auto_align
;
4715 md
.auto_align
= saved_auto_align
;
4716 obj_elf_previous (0);
4717 md
.keep_pending_output
= 0;
4721 dot_xdata (int size
)
4723 cross_section (size
, cons
, 0);
4726 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4729 stmt_float_cons (int kind
)
4749 ia64_do_align (alignment
);
4754 stmt_cons_ua (int size
)
4756 int saved_auto_align
= md
.auto_align
;
4760 md
.auto_align
= saved_auto_align
;
4764 dot_xfloat_cons (int kind
)
4766 cross_section (kind
, stmt_float_cons
, 0);
4770 dot_xstringer (int zero
)
4772 cross_section (zero
, stringer
, 0);
4776 dot_xdata_ua (int size
)
4778 cross_section (size
, cons
, 1);
4782 dot_xfloat_cons_ua (int kind
)
4784 cross_section (kind
, float_cons
, 1);
4787 /* .reg.val <regname>,value */
4790 dot_reg_val (int dummy ATTRIBUTE_UNUSED
)
4794 expression_and_evaluate (®
);
4795 if (reg
.X_op
!= O_register
)
4797 as_bad (_("Register name expected"));
4798 ignore_rest_of_line ();
4800 else if (*input_line_pointer
++ != ',')
4802 as_bad (_("Comma expected"));
4803 ignore_rest_of_line ();
4807 valueT value
= get_absolute_expression ();
4808 int regno
= reg
.X_add_number
;
4809 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4810 as_warn (_("Register value annotation ignored"));
4813 gr_values
[regno
- REG_GR
].known
= 1;
4814 gr_values
[regno
- REG_GR
].value
= value
;
4815 gr_values
[regno
- REG_GR
].path
= md
.path
;
4818 demand_empty_rest_of_line ();
4823 .serialize.instruction
4826 dot_serialize (int type
)
4828 insn_group_break (0, 0, 0);
4830 instruction_serialization ();
4832 data_serialization ();
4833 insn_group_break (0, 0, 0);
4834 demand_empty_rest_of_line ();
4837 /* select dv checking mode
4842 A stop is inserted when changing modes
4846 dot_dv_mode (int type
)
4848 if (md
.manual_bundling
)
4849 as_warn (_("Directive invalid within a bundle"));
4851 if (type
== 'E' || type
== 'A')
4852 md
.mode_explicitly_set
= 0;
4854 md
.mode_explicitly_set
= 1;
4861 if (md
.explicit_mode
)
4862 insn_group_break (1, 0, 0);
4863 md
.explicit_mode
= 0;
4867 if (!md
.explicit_mode
)
4868 insn_group_break (1, 0, 0);
4869 md
.explicit_mode
= 1;
4873 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4874 insn_group_break (1, 0, 0);
4875 md
.explicit_mode
= md
.default_explicit_mode
;
4876 md
.mode_explicitly_set
= 0;
4882 print_prmask (valueT mask
)
4886 for (regno
= 0; regno
< 64; regno
++)
4888 if (mask
& ((valueT
) 1 << regno
))
4890 fprintf (stderr
, "%s p%d", comma
, regno
);
4897 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
4898 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
4899 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
4900 .pred.safe_across_calls p1 [, p2 [,...]]
4904 dot_pred_rel (int type
)
4908 int p1
= -1, p2
= -1;
4912 if (*input_line_pointer
== '"')
4915 char *form
= demand_copy_C_string (&len
);
4917 if (strcmp (form
, "mutex") == 0)
4919 else if (strcmp (form
, "clear") == 0)
4921 else if (strcmp (form
, "imply") == 0)
4923 obstack_free (¬es
, form
);
4925 else if (*input_line_pointer
== '@')
4927 char *form
= ++input_line_pointer
;
4928 char c
= get_symbol_end();
4930 if (strcmp (form
, "mutex") == 0)
4932 else if (strcmp (form
, "clear") == 0)
4934 else if (strcmp (form
, "imply") == 0)
4936 *input_line_pointer
= c
;
4940 as_bad (_("Missing predicate relation type"));
4941 ignore_rest_of_line ();
4946 as_bad (_("Unrecognized predicate relation type"));
4947 ignore_rest_of_line ();
4950 if (*input_line_pointer
== ',')
4951 ++input_line_pointer
;
4959 expressionS pr
, *pr1
, *pr2
;
4961 sep
= parse_operand_and_eval (&pr
, ',');
4962 if (pr
.X_op
== O_register
4963 && pr
.X_add_number
>= REG_P
4964 && pr
.X_add_number
<= REG_P
+ 63)
4966 regno
= pr
.X_add_number
- REG_P
;
4974 else if (type
!= 'i'
4975 && pr
.X_op
== O_subtract
4976 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
4977 && pr1
->X_op
== O_register
4978 && pr1
->X_add_number
>= REG_P
4979 && pr1
->X_add_number
<= REG_P
+ 63
4980 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
4981 && pr2
->X_op
== O_register
4982 && pr2
->X_add_number
>= REG_P
4983 && pr2
->X_add_number
<= REG_P
+ 63)
4988 regno
= pr1
->X_add_number
- REG_P
;
4989 stop
= pr2
->X_add_number
- REG_P
;
4992 as_bad (_("Bad register range"));
4993 ignore_rest_of_line ();
4996 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
4997 count
+= stop
- regno
+ 1;
5001 as_bad (_("Predicate register expected"));
5002 ignore_rest_of_line ();
5006 as_warn (_("Duplicate predicate register ignored"));
5017 clear_qp_mutex (mask
);
5018 clear_qp_implies (mask
, (valueT
) 0);
5021 if (count
!= 2 || p1
== -1 || p2
== -1)
5022 as_bad (_("Predicate source and target required"));
5023 else if (p1
== 0 || p2
== 0)
5024 as_bad (_("Use of p0 is not valid in this context"));
5026 add_qp_imply (p1
, p2
);
5031 as_bad (_("At least two PR arguments expected"));
5036 as_bad (_("Use of p0 is not valid in this context"));
5039 add_qp_mutex (mask
);
5042 /* note that we don't override any existing relations */
5045 as_bad (_("At least one PR argument expected"));
5050 fprintf (stderr
, "Safe across calls: ");
5051 print_prmask (mask
);
5052 fprintf (stderr
, "\n");
5054 qp_safe_across_calls
= mask
;
5057 demand_empty_rest_of_line ();
5060 /* .entry label [, label [, ...]]
5061 Hint to DV code that the given labels are to be considered entry points.
5062 Otherwise, only global labels are considered entry points. */
5065 dot_entry (int dummy ATTRIBUTE_UNUSED
)
5074 name
= input_line_pointer
;
5075 c
= get_symbol_end ();
5076 symbolP
= symbol_find_or_make (name
);
5078 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (void *) symbolP
);
5080 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5083 *input_line_pointer
= c
;
5085 c
= *input_line_pointer
;
5088 input_line_pointer
++;
5090 if (*input_line_pointer
== '\n')
5096 demand_empty_rest_of_line ();
5099 /* .mem.offset offset, base
5100 "base" is used to distinguish between offsets from a different base. */
5103 dot_mem_offset (int dummy ATTRIBUTE_UNUSED
)
5105 md
.mem_offset
.hint
= 1;
5106 md
.mem_offset
.offset
= get_absolute_expression ();
5107 if (*input_line_pointer
!= ',')
5109 as_bad (_("Comma expected"));
5110 ignore_rest_of_line ();
5113 ++input_line_pointer
;
5114 md
.mem_offset
.base
= get_absolute_expression ();
5115 demand_empty_rest_of_line ();
5118 /* ia64-specific pseudo-ops: */
5119 const pseudo_typeS md_pseudo_table
[] =
5121 { "radix", dot_radix
, 0 },
5122 { "lcomm", s_lcomm_bytes
, 1 },
5123 { "loc", dot_loc
, 0 },
5124 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5125 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5126 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5127 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5128 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5129 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5130 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5131 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5132 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5133 { "proc", dot_proc
, 0 },
5134 { "body", dot_body
, 0 },
5135 { "prologue", dot_prologue
, 0 },
5136 { "endp", dot_endp
, 0 },
5138 { "fframe", dot_fframe
, 0 },
5139 { "vframe", dot_vframe
, 0 },
5140 { "vframesp", dot_vframesp
, 0 },
5141 { "vframepsp", dot_vframesp
, 1 },
5142 { "save", dot_save
, 0 },
5143 { "restore", dot_restore
, 0 },
5144 { "restorereg", dot_restorereg
, 0 },
5145 { "restorereg.p", dot_restorereg
, 1 },
5146 { "handlerdata", dot_handlerdata
, 0 },
5147 { "unwentry", dot_unwentry
, 0 },
5148 { "altrp", dot_altrp
, 0 },
5149 { "savesp", dot_savemem
, 0 },
5150 { "savepsp", dot_savemem
, 1 },
5151 { "save.g", dot_saveg
, 0 },
5152 { "save.f", dot_savef
, 0 },
5153 { "save.b", dot_saveb
, 0 },
5154 { "save.gf", dot_savegf
, 0 },
5155 { "spill", dot_spill
, 0 },
5156 { "spillreg", dot_spillreg
, 0 },
5157 { "spillsp", dot_spillmem
, 0 },
5158 { "spillpsp", dot_spillmem
, 1 },
5159 { "spillreg.p", dot_spillreg
, 1 },
5160 { "spillsp.p", dot_spillmem
, ~0 },
5161 { "spillpsp.p", dot_spillmem
, ~1 },
5162 { "label_state", dot_label_state
, 0 },
5163 { "copy_state", dot_copy_state
, 0 },
5164 { "unwabi", dot_unwabi
, 0 },
5165 { "personality", dot_personality
, 0 },
5166 { "mii", dot_template
, 0x0 },
5167 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5168 { "mlx", dot_template
, 0x2 },
5169 { "mmi", dot_template
, 0x4 },
5170 { "mfi", dot_template
, 0x6 },
5171 { "mmf", dot_template
, 0x7 },
5172 { "mib", dot_template
, 0x8 },
5173 { "mbb", dot_template
, 0x9 },
5174 { "bbb", dot_template
, 0xb },
5175 { "mmb", dot_template
, 0xc },
5176 { "mfb", dot_template
, 0xe },
5177 { "align", dot_align
, 0 },
5178 { "regstk", dot_regstk
, 0 },
5179 { "rotr", dot_rot
, DYNREG_GR
},
5180 { "rotf", dot_rot
, DYNREG_FR
},
5181 { "rotp", dot_rot
, DYNREG_PR
},
5182 { "lsb", dot_byteorder
, 0 },
5183 { "msb", dot_byteorder
, 1 },
5184 { "psr", dot_psr
, 0 },
5185 { "alias", dot_alias
, 0 },
5186 { "secalias", dot_alias
, 1 },
5187 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5189 { "xdata1", dot_xdata
, 1 },
5190 { "xdata2", dot_xdata
, 2 },
5191 { "xdata4", dot_xdata
, 4 },
5192 { "xdata8", dot_xdata
, 8 },
5193 { "xdata16", dot_xdata
, 16 },
5194 { "xreal4", dot_xfloat_cons
, 'f' },
5195 { "xreal8", dot_xfloat_cons
, 'd' },
5196 { "xreal10", dot_xfloat_cons
, 'x' },
5197 { "xreal16", dot_xfloat_cons
, 'X' },
5198 { "xstring", dot_xstringer
, 8 + 0 },
5199 { "xstringz", dot_xstringer
, 8 + 1 },
5201 /* unaligned versions: */
5202 { "xdata2.ua", dot_xdata_ua
, 2 },
5203 { "xdata4.ua", dot_xdata_ua
, 4 },
5204 { "xdata8.ua", dot_xdata_ua
, 8 },
5205 { "xdata16.ua", dot_xdata_ua
, 16 },
5206 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5207 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5208 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5209 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5211 /* annotations/DV checking support */
5212 { "entry", dot_entry
, 0 },
5213 { "mem.offset", dot_mem_offset
, 0 },
5214 { "pred.rel", dot_pred_rel
, 0 },
5215 { "pred.rel.clear", dot_pred_rel
, 'c' },
5216 { "pred.rel.imply", dot_pred_rel
, 'i' },
5217 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5218 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5219 { "reg.val", dot_reg_val
, 0 },
5220 { "serialize.data", dot_serialize
, 0 },
5221 { "serialize.instruction", dot_serialize
, 1 },
5222 { "auto", dot_dv_mode
, 'a' },
5223 { "explicit", dot_dv_mode
, 'e' },
5224 { "default", dot_dv_mode
, 'd' },
5226 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5227 IA-64 aligns data allocation pseudo-ops by default, so we have to
5228 tell it that these ones are supposed to be unaligned. Long term,
5229 should rewrite so that only IA-64 specific data allocation pseudo-ops
5230 are aligned by default. */
5231 {"2byte", stmt_cons_ua
, 2},
5232 {"4byte", stmt_cons_ua
, 4},
5233 {"8byte", stmt_cons_ua
, 8},
5238 static const struct pseudo_opcode
5241 void (*handler
) (int);
5246 /* these are more like pseudo-ops, but don't start with a dot */
5247 { "data1", cons
, 1 },
5248 { "data2", cons
, 2 },
5249 { "data4", cons
, 4 },
5250 { "data8", cons
, 8 },
5251 { "data16", cons
, 16 },
5252 { "real4", stmt_float_cons
, 'f' },
5253 { "real8", stmt_float_cons
, 'd' },
5254 { "real10", stmt_float_cons
, 'x' },
5255 { "real16", stmt_float_cons
, 'X' },
5256 { "string", stringer
, 8 + 0 },
5257 { "stringz", stringer
, 8 + 1 },
5259 /* unaligned versions: */
5260 { "data2.ua", stmt_cons_ua
, 2 },
5261 { "data4.ua", stmt_cons_ua
, 4 },
5262 { "data8.ua", stmt_cons_ua
, 8 },
5263 { "data16.ua", stmt_cons_ua
, 16 },
5264 { "real4.ua", float_cons
, 'f' },
5265 { "real8.ua", float_cons
, 'd' },
5266 { "real10.ua", float_cons
, 'x' },
5267 { "real16.ua", float_cons
, 'X' },
5270 /* Declare a register by creating a symbol for it and entering it in
5271 the symbol table. */
5274 declare_register (const char *name
, unsigned int regnum
)
5279 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5281 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (void *) sym
);
5283 as_fatal ("Inserting \"%s\" into register table failed: %s",
5290 declare_register_set (const char *prefix
,
5291 unsigned int num_regs
,
5292 unsigned int base_regnum
)
5297 for (i
= 0; i
< num_regs
; ++i
)
5299 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5300 declare_register (name
, base_regnum
+ i
);
5305 operand_width (enum ia64_opnd opnd
)
5307 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5308 unsigned int bits
= 0;
5312 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5313 bits
+= odesc
->field
[i
].bits
;
5318 static enum operand_match_result
5319 operand_match (const struct ia64_opcode
*idesc
, int res_index
, expressionS
*e
)
5321 enum ia64_opnd opnd
= idesc
->operands
[res_index
];
5322 int bits
, relocatable
= 0;
5323 struct insn_fix
*fix
;
5330 case IA64_OPND_AR_CCV
:
5331 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5332 return OPERAND_MATCH
;
5335 case IA64_OPND_AR_CSD
:
5336 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5337 return OPERAND_MATCH
;
5340 case IA64_OPND_AR_PFS
:
5341 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5342 return OPERAND_MATCH
;
5346 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5347 return OPERAND_MATCH
;
5351 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5352 return OPERAND_MATCH
;
5356 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5357 return OPERAND_MATCH
;
5360 case IA64_OPND_PR_ROT
:
5361 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5362 return OPERAND_MATCH
;
5366 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5367 return OPERAND_MATCH
;
5370 case IA64_OPND_PSR_L
:
5371 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5372 return OPERAND_MATCH
;
5375 case IA64_OPND_PSR_UM
:
5376 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5377 return OPERAND_MATCH
;
5381 if (e
->X_op
== O_constant
)
5383 if (e
->X_add_number
== 1)
5384 return OPERAND_MATCH
;
5386 return OPERAND_OUT_OF_RANGE
;
5391 if (e
->X_op
== O_constant
)
5393 if (e
->X_add_number
== 8)
5394 return OPERAND_MATCH
;
5396 return OPERAND_OUT_OF_RANGE
;
5401 if (e
->X_op
== O_constant
)
5403 if (e
->X_add_number
== 16)
5404 return OPERAND_MATCH
;
5406 return OPERAND_OUT_OF_RANGE
;
5410 /* register operands: */
5413 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5414 && e
->X_add_number
< REG_AR
+ 128)
5415 return OPERAND_MATCH
;
5420 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5421 && e
->X_add_number
< REG_BR
+ 8)
5422 return OPERAND_MATCH
;
5426 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5427 && e
->X_add_number
< REG_CR
+ 128)
5428 return OPERAND_MATCH
;
5435 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5436 && e
->X_add_number
< REG_FR
+ 128)
5437 return OPERAND_MATCH
;
5442 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5443 && e
->X_add_number
< REG_P
+ 64)
5444 return OPERAND_MATCH
;
5450 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5451 && e
->X_add_number
< REG_GR
+ 128)
5452 return OPERAND_MATCH
;
5455 case IA64_OPND_R3_2
:
5456 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5458 if (e
->X_add_number
< REG_GR
+ 4)
5459 return OPERAND_MATCH
;
5460 else if (e
->X_add_number
< REG_GR
+ 128)
5461 return OPERAND_OUT_OF_RANGE
;
5465 /* indirect operands: */
5466 case IA64_OPND_CPUID_R3
:
5467 case IA64_OPND_DBR_R3
:
5468 case IA64_OPND_DTR_R3
:
5469 case IA64_OPND_ITR_R3
:
5470 case IA64_OPND_IBR_R3
:
5471 case IA64_OPND_MSR_R3
:
5472 case IA64_OPND_PKR_R3
:
5473 case IA64_OPND_PMC_R3
:
5474 case IA64_OPND_PMD_R3
:
5475 case IA64_OPND_RR_R3
:
5476 if (e
->X_op
== O_index
&& e
->X_op_symbol
5477 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5478 == opnd
- IA64_OPND_CPUID_R3
))
5479 return OPERAND_MATCH
;
5483 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5484 return OPERAND_MATCH
;
5487 /* immediate operands: */
5488 case IA64_OPND_CNT2a
:
5489 case IA64_OPND_LEN4
:
5490 case IA64_OPND_LEN6
:
5491 bits
= operand_width (idesc
->operands
[res_index
]);
5492 if (e
->X_op
== O_constant
)
5494 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5495 return OPERAND_MATCH
;
5497 return OPERAND_OUT_OF_RANGE
;
5501 case IA64_OPND_CNT2b
:
5502 if (e
->X_op
== O_constant
)
5504 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5505 return OPERAND_MATCH
;
5507 return OPERAND_OUT_OF_RANGE
;
5511 case IA64_OPND_CNT2c
:
5512 val
= e
->X_add_number
;
5513 if (e
->X_op
== O_constant
)
5515 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5516 return OPERAND_MATCH
;
5518 return OPERAND_OUT_OF_RANGE
;
5523 /* SOR must be an integer multiple of 8 */
5524 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5525 return OPERAND_OUT_OF_RANGE
;
5528 if (e
->X_op
== O_constant
)
5530 if ((bfd_vma
) e
->X_add_number
<= 96)
5531 return OPERAND_MATCH
;
5533 return OPERAND_OUT_OF_RANGE
;
5537 case IA64_OPND_IMMU62
:
5538 if (e
->X_op
== O_constant
)
5540 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5541 return OPERAND_MATCH
;
5543 return OPERAND_OUT_OF_RANGE
;
5547 /* FIXME -- need 62-bit relocation type */
5548 as_bad (_("62-bit relocation not yet implemented"));
5552 case IA64_OPND_IMMU64
:
5553 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5554 || e
->X_op
== O_subtract
)
5556 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5557 fix
->code
= BFD_RELOC_IA64_IMM64
;
5558 if (e
->X_op
!= O_subtract
)
5560 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5561 if (e
->X_op
== O_pseudo_fixup
)
5565 fix
->opnd
= idesc
->operands
[res_index
];
5568 ++CURR_SLOT
.num_fixups
;
5569 return OPERAND_MATCH
;
5571 else if (e
->X_op
== O_constant
)
5572 return OPERAND_MATCH
;
5575 case IA64_OPND_IMMU5b
:
5576 if (e
->X_op
== O_constant
)
5578 val
= e
->X_add_number
;
5579 if (val
>= 32 && val
<= 63)
5580 return OPERAND_MATCH
;
5582 return OPERAND_OUT_OF_RANGE
;
5586 case IA64_OPND_CCNT5
:
5587 case IA64_OPND_CNT5
:
5588 case IA64_OPND_CNT6
:
5589 case IA64_OPND_CPOS6a
:
5590 case IA64_OPND_CPOS6b
:
5591 case IA64_OPND_CPOS6c
:
5592 case IA64_OPND_IMMU2
:
5593 case IA64_OPND_IMMU7a
:
5594 case IA64_OPND_IMMU7b
:
5595 case IA64_OPND_IMMU21
:
5596 case IA64_OPND_IMMU24
:
5597 case IA64_OPND_MBTYPE4
:
5598 case IA64_OPND_MHTYPE8
:
5599 case IA64_OPND_POS6
:
5600 bits
= operand_width (idesc
->operands
[res_index
]);
5601 if (e
->X_op
== O_constant
)
5603 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5604 return OPERAND_MATCH
;
5606 return OPERAND_OUT_OF_RANGE
;
5610 case IA64_OPND_IMMU9
:
5611 bits
= operand_width (idesc
->operands
[res_index
]);
5612 if (e
->X_op
== O_constant
)
5614 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5616 int lobits
= e
->X_add_number
& 0x3;
5617 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5618 e
->X_add_number
|= (bfd_vma
) 0x3;
5619 return OPERAND_MATCH
;
5622 return OPERAND_OUT_OF_RANGE
;
5626 case IA64_OPND_IMM44
:
5627 /* least 16 bits must be zero */
5628 if ((e
->X_add_number
& 0xffff) != 0)
5629 /* XXX technically, this is wrong: we should not be issuing warning
5630 messages until we're sure this instruction pattern is going to
5632 as_warn (_("lower 16 bits of mask ignored"));
5634 if (e
->X_op
== O_constant
)
5636 if (((e
->X_add_number
>= 0
5637 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5638 || (e
->X_add_number
< 0
5639 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5642 if (e
->X_add_number
>= 0
5643 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5645 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5647 return OPERAND_MATCH
;
5650 return OPERAND_OUT_OF_RANGE
;
5654 case IA64_OPND_IMM17
:
5655 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5656 if (e
->X_op
== O_constant
)
5658 if (((e
->X_add_number
>= 0
5659 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5660 || (e
->X_add_number
< 0
5661 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5664 if (e
->X_add_number
>= 0
5665 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5667 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5669 return OPERAND_MATCH
;
5672 return OPERAND_OUT_OF_RANGE
;
5676 case IA64_OPND_IMM14
:
5677 case IA64_OPND_IMM22
:
5679 case IA64_OPND_IMM1
:
5680 case IA64_OPND_IMM8
:
5681 case IA64_OPND_IMM8U4
:
5682 case IA64_OPND_IMM8M1
:
5683 case IA64_OPND_IMM8M1U4
:
5684 case IA64_OPND_IMM8M1U8
:
5685 case IA64_OPND_IMM9a
:
5686 case IA64_OPND_IMM9b
:
5687 bits
= operand_width (idesc
->operands
[res_index
]);
5688 if (relocatable
&& (e
->X_op
== O_symbol
5689 || e
->X_op
== O_subtract
5690 || e
->X_op
== O_pseudo_fixup
))
5692 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5694 if (idesc
->operands
[res_index
] == IA64_OPND_IMM14
)
5695 fix
->code
= BFD_RELOC_IA64_IMM14
;
5697 fix
->code
= BFD_RELOC_IA64_IMM22
;
5699 if (e
->X_op
!= O_subtract
)
5701 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5702 if (e
->X_op
== O_pseudo_fixup
)
5706 fix
->opnd
= idesc
->operands
[res_index
];
5709 ++CURR_SLOT
.num_fixups
;
5710 return OPERAND_MATCH
;
5712 else if (e
->X_op
!= O_constant
5713 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5714 return OPERAND_MISMATCH
;
5716 if (opnd
== IA64_OPND_IMM8M1U4
)
5718 /* Zero is not valid for unsigned compares that take an adjusted
5719 constant immediate range. */
5720 if (e
->X_add_number
== 0)
5721 return OPERAND_OUT_OF_RANGE
;
5723 /* Sign-extend 32-bit unsigned numbers, so that the following range
5724 checks will work. */
5725 val
= e
->X_add_number
;
5726 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5727 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5728 val
= ((val
<< 32) >> 32);
5730 /* Check for 0x100000000. This is valid because
5731 0x100000000-1 is the same as ((uint32_t) -1). */
5732 if (val
== ((bfd_signed_vma
) 1 << 32))
5733 return OPERAND_MATCH
;
5737 else if (opnd
== IA64_OPND_IMM8M1U8
)
5739 /* Zero is not valid for unsigned compares that take an adjusted
5740 constant immediate range. */
5741 if (e
->X_add_number
== 0)
5742 return OPERAND_OUT_OF_RANGE
;
5744 /* Check for 0x10000000000000000. */
5745 if (e
->X_op
== O_big
)
5747 if (generic_bignum
[0] == 0
5748 && generic_bignum
[1] == 0
5749 && generic_bignum
[2] == 0
5750 && generic_bignum
[3] == 0
5751 && generic_bignum
[4] == 1)
5752 return OPERAND_MATCH
;
5754 return OPERAND_OUT_OF_RANGE
;
5757 val
= e
->X_add_number
- 1;
5759 else if (opnd
== IA64_OPND_IMM8M1
)
5760 val
= e
->X_add_number
- 1;
5761 else if (opnd
== IA64_OPND_IMM8U4
)
5763 /* Sign-extend 32-bit unsigned numbers, so that the following range
5764 checks will work. */
5765 val
= e
->X_add_number
;
5766 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5767 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5768 val
= ((val
<< 32) >> 32);
5771 val
= e
->X_add_number
;
5773 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5774 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5775 return OPERAND_MATCH
;
5777 return OPERAND_OUT_OF_RANGE
;
5779 case IA64_OPND_INC3
:
5780 /* +/- 1, 4, 8, 16 */
5781 val
= e
->X_add_number
;
5784 if (e
->X_op
== O_constant
)
5786 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5787 return OPERAND_MATCH
;
5789 return OPERAND_OUT_OF_RANGE
;
5793 case IA64_OPND_TGT25
:
5794 case IA64_OPND_TGT25b
:
5795 case IA64_OPND_TGT25c
:
5796 case IA64_OPND_TGT64
:
5797 if (e
->X_op
== O_symbol
)
5799 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5800 if (opnd
== IA64_OPND_TGT25
)
5801 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5802 else if (opnd
== IA64_OPND_TGT25b
)
5803 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5804 else if (opnd
== IA64_OPND_TGT25c
)
5805 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5806 else if (opnd
== IA64_OPND_TGT64
)
5807 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5811 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5812 fix
->opnd
= idesc
->operands
[res_index
];
5815 ++CURR_SLOT
.num_fixups
;
5816 return OPERAND_MATCH
;
5818 case IA64_OPND_TAG13
:
5819 case IA64_OPND_TAG13b
:
5823 return OPERAND_MATCH
;
5826 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5827 /* There are no external relocs for TAG13/TAG13b fields, so we
5828 create a dummy reloc. This will not live past md_apply_fix. */
5829 fix
->code
= BFD_RELOC_UNUSED
;
5830 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5831 fix
->opnd
= idesc
->operands
[res_index
];
5834 ++CURR_SLOT
.num_fixups
;
5835 return OPERAND_MATCH
;
5842 case IA64_OPND_LDXMOV
:
5843 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5844 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5845 fix
->opnd
= idesc
->operands
[res_index
];
5848 ++CURR_SLOT
.num_fixups
;
5849 return OPERAND_MATCH
;
5854 return OPERAND_MISMATCH
;
5858 parse_operand (expressionS
*e
, int more
)
5862 memset (e
, 0, sizeof (*e
));
5866 sep
= *input_line_pointer
;
5867 if (more
&& (sep
== ',' || sep
== more
))
5868 ++input_line_pointer
;
5873 parse_operand_and_eval (expressionS
*e
, int more
)
5875 int sep
= parse_operand (e
, more
);
5876 resolve_expression (e
);
5881 parse_operand_maybe_eval (expressionS
*e
, int more
, enum ia64_opnd op
)
5883 int sep
= parse_operand (e
, more
);
5886 case IA64_OPND_IMM14
:
5887 case IA64_OPND_IMM22
:
5888 case IA64_OPND_IMMU64
:
5889 case IA64_OPND_TGT25
:
5890 case IA64_OPND_TGT25b
:
5891 case IA64_OPND_TGT25c
:
5892 case IA64_OPND_TGT64
:
5893 case IA64_OPND_TAG13
:
5894 case IA64_OPND_TAG13b
:
5895 case IA64_OPND_LDXMOV
:
5898 resolve_expression (e
);
5904 /* Returns the next entry in the opcode table that matches the one in
5905 IDESC, and frees the entry in IDESC. If no matching entry is
5906 found, NULL is returned instead. */
5908 static struct ia64_opcode
*
5909 get_next_opcode (struct ia64_opcode
*idesc
)
5911 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
5912 ia64_free_opcode (idesc
);
5916 /* Parse the operands for the opcode and find the opcode variant that
5917 matches the specified operands, or NULL if no match is possible. */
5919 static struct ia64_opcode
*
5920 parse_operands (struct ia64_opcode
*idesc
)
5922 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
5923 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
5926 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
5927 enum operand_match_result result
;
5929 char *first_arg
= 0, *end
, *saved_input_pointer
;
5932 gas_assert (strlen (idesc
->name
) <= 128);
5934 strcpy (mnemonic
, idesc
->name
);
5935 if (idesc
->operands
[2] == IA64_OPND_SOF
5936 || idesc
->operands
[1] == IA64_OPND_SOF
)
5938 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5939 can't parse the first operand until we have parsed the
5940 remaining operands of the "alloc" instruction. */
5942 first_arg
= input_line_pointer
;
5943 end
= strchr (input_line_pointer
, '=');
5946 as_bad (_("Expected separator `='"));
5949 input_line_pointer
= end
+ 1;
5956 if (i
< NELEMS (CURR_SLOT
.opnd
))
5958 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ i
, '=',
5959 idesc
->operands
[i
]);
5960 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
5967 sep
= parse_operand (&dummy
, '=');
5968 if (dummy
.X_op
== O_absent
)
5974 if (sep
!= '=' && sep
!= ',')
5979 if (num_outputs
> 0)
5980 as_bad (_("Duplicate equal sign (=) in instruction"));
5982 num_outputs
= i
+ 1;
5987 as_bad (_("Illegal operand separator `%c'"), sep
);
5991 if (idesc
->operands
[2] == IA64_OPND_SOF
5992 || idesc
->operands
[1] == IA64_OPND_SOF
)
5994 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
5995 Note, however, that due to that mapping operand numbers in error
5996 messages for any of the constant operands will not be correct. */
5997 know (strcmp (idesc
->name
, "alloc") == 0);
5998 /* The first operand hasn't been parsed/initialized, yet (but
5999 num_operands intentionally doesn't account for that). */
6000 i
= num_operands
> 4 ? 2 : 1;
6001 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6002 ? CURR_SLOT.opnd[n].X_add_number \
6004 sof
= set_regstack (FORCE_CONST(i
),
6007 FORCE_CONST(i
+ 3));
6010 /* now we can parse the first arg: */
6011 saved_input_pointer
= input_line_pointer
;
6012 input_line_pointer
= first_arg
;
6013 sep
= parse_operand_maybe_eval (CURR_SLOT
.opnd
+ 0, '=',
6014 idesc
->operands
[0]);
6016 --num_outputs
; /* force error */
6017 input_line_pointer
= saved_input_pointer
;
6019 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6020 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6021 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6022 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6023 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6025 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6026 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6029 highest_unmatched_operand
= -4;
6030 curr_out_of_range_pos
= -1;
6032 for (; idesc
; idesc
= get_next_opcode (idesc
))
6034 if (num_outputs
!= idesc
->num_outputs
)
6035 continue; /* mismatch in # of outputs */
6036 if (highest_unmatched_operand
< 0)
6037 highest_unmatched_operand
|= 1;
6038 if (num_operands
> NELEMS (idesc
->operands
)
6039 || (num_operands
< NELEMS (idesc
->operands
)
6040 && idesc
->operands
[num_operands
])
6041 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6042 continue; /* mismatch in number of arguments */
6043 if (highest_unmatched_operand
< 0)
6044 highest_unmatched_operand
|= 2;
6046 CURR_SLOT
.num_fixups
= 0;
6048 /* Try to match all operands. If we see an out-of-range operand,
6049 then continue trying to match the rest of the operands, since if
6050 the rest match, then this idesc will give the best error message. */
6052 out_of_range_pos
= -1;
6053 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6055 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6056 if (result
!= OPERAND_MATCH
)
6058 if (result
!= OPERAND_OUT_OF_RANGE
)
6060 if (out_of_range_pos
< 0)
6061 /* remember position of the first out-of-range operand: */
6062 out_of_range_pos
= i
;
6066 /* If we did not match all operands, or if at least one operand was
6067 out-of-range, then this idesc does not match. Keep track of which
6068 idesc matched the most operands before failing. If we have two
6069 idescs that failed at the same position, and one had an out-of-range
6070 operand, then prefer the out-of-range operand. Thus if we have
6071 "add r0=0x1000000,r1" we get an error saying the constant is out
6072 of range instead of an error saying that the constant should have been
6075 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6077 if (i
> highest_unmatched_operand
6078 || (i
== highest_unmatched_operand
6079 && out_of_range_pos
> curr_out_of_range_pos
))
6081 highest_unmatched_operand
= i
;
6082 if (out_of_range_pos
>= 0)
6084 expected_operand
= idesc
->operands
[out_of_range_pos
];
6085 error_pos
= out_of_range_pos
;
6089 expected_operand
= idesc
->operands
[i
];
6092 curr_out_of_range_pos
= out_of_range_pos
;
6101 if (expected_operand
)
6102 as_bad (_("Operand %u of `%s' should be %s"),
6103 error_pos
+ 1, mnemonic
,
6104 elf64_ia64_operands
[expected_operand
].desc
);
6105 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6106 as_bad (_("Wrong number of output operands"));
6107 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6108 as_bad (_("Wrong number of input operands"));
6110 as_bad (_("Operand mismatch"));
6114 /* Check that the instruction doesn't use
6115 - r0, f0, or f1 as output operands
6116 - the same predicate twice as output operands
6117 - r0 as address of a base update load or store
6118 - the same GR as output and address of a base update load
6119 - two even- or two odd-numbered FRs as output operands of a floating
6120 point parallel load.
6121 At most two (conflicting) output (or output-like) operands can exist,
6122 (floating point parallel loads have three outputs, but the base register,
6123 if updated, cannot conflict with the actual outputs). */
6125 for (i
= 0; i
< num_operands
; ++i
)
6130 switch (idesc
->operands
[i
])
6135 if (i
< num_outputs
)
6137 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6140 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6142 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6147 if (i
< num_outputs
)
6150 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6152 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6159 if (i
< num_outputs
)
6161 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6162 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6165 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6168 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6170 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6174 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6176 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6179 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6181 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6192 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6195 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6201 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6206 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6211 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6219 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6221 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6222 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6223 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6224 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6225 && ! ((reg1
^ reg2
) & 1))
6226 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6227 reg1
- REG_FR
, reg2
- REG_FR
);
6228 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6229 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6230 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6231 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6232 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6233 reg1
- REG_FR
, reg2
- REG_FR
);
6238 build_insn (struct slot
*slot
, bfd_vma
*insnp
)
6240 const struct ia64_operand
*odesc
, *o2desc
;
6241 struct ia64_opcode
*idesc
= slot
->idesc
;
6247 insn
= idesc
->opcode
| slot
->qp_regno
;
6249 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6251 if (slot
->opnd
[i
].X_op
== O_register
6252 || slot
->opnd
[i
].X_op
== O_constant
6253 || slot
->opnd
[i
].X_op
== O_index
)
6254 val
= slot
->opnd
[i
].X_add_number
;
6255 else if (slot
->opnd
[i
].X_op
== O_big
)
6257 /* This must be the value 0x10000000000000000. */
6258 gas_assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6264 switch (idesc
->operands
[i
])
6266 case IA64_OPND_IMMU64
:
6267 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6268 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6269 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6270 | (((val
>> 63) & 0x1) << 36));
6273 case IA64_OPND_IMMU62
:
6274 val
&= 0x3fffffffffffffffULL
;
6275 if (val
!= slot
->opnd
[i
].X_add_number
)
6276 as_warn (_("Value truncated to 62 bits"));
6277 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6278 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6281 case IA64_OPND_TGT64
:
6283 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6284 insn
|= ((((val
>> 59) & 0x1) << 36)
6285 | (((val
>> 0) & 0xfffff) << 13));
6316 case IA64_OPND_R3_2
:
6317 case IA64_OPND_CPUID_R3
:
6318 case IA64_OPND_DBR_R3
:
6319 case IA64_OPND_DTR_R3
:
6320 case IA64_OPND_ITR_R3
:
6321 case IA64_OPND_IBR_R3
:
6323 case IA64_OPND_MSR_R3
:
6324 case IA64_OPND_PKR_R3
:
6325 case IA64_OPND_PMC_R3
:
6326 case IA64_OPND_PMD_R3
:
6327 case IA64_OPND_RR_R3
:
6335 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6336 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6338 as_bad_where (slot
->src_file
, slot
->src_line
,
6339 _("Bad operand value: %s"), err
);
6340 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6342 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6343 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6345 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6346 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6348 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6349 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6350 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6352 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6353 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6361 emit_one_bundle (void)
6363 int manual_bundling_off
= 0, manual_bundling
= 0;
6364 enum ia64_unit required_unit
, insn_unit
= 0;
6365 enum ia64_insn_type type
[3], insn_type
;
6366 unsigned int template_val
, orig_template
;
6367 bfd_vma insn
[3] = { -1, -1, -1 };
6368 struct ia64_opcode
*idesc
;
6369 int end_of_insn_group
= 0, user_template
= -1;
6370 int n
, i
, j
, first
, curr
, last_slot
;
6371 bfd_vma t0
= 0, t1
= 0;
6372 struct label_fix
*lfix
;
6373 bfd_boolean mark_label
;
6374 struct insn_fix
*ifix
;
6380 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6381 know (first
>= 0 && first
< NUM_SLOTS
);
6382 n
= MIN (3, md
.num_slots_in_use
);
6384 /* Determine template: user user_template if specified, best match
6387 if (md
.slot
[first
].user_template
>= 0)
6388 user_template
= template_val
= md
.slot
[first
].user_template
;
6391 /* Auto select appropriate template. */
6392 memset (type
, 0, sizeof (type
));
6394 for (i
= 0; i
< n
; ++i
)
6396 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6398 type
[i
] = md
.slot
[curr
].idesc
->type
;
6399 curr
= (curr
+ 1) % NUM_SLOTS
;
6401 template_val
= best_template
[type
[0]][type
[1]][type
[2]];
6404 /* initialize instructions with appropriate nops: */
6405 for (i
= 0; i
< 3; ++i
)
6406 insn
[i
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[i
]];
6410 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6411 from the start of the frag. */
6412 addr_mod
= frag_now_fix () & 15;
6413 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6414 as_bad (_("instruction address is not a multiple of 16"));
6415 frag_now
->insn_addr
= addr_mod
;
6416 frag_now
->has_code
= 1;
6418 /* now fill in slots with as many insns as possible: */
6420 idesc
= md
.slot
[curr
].idesc
;
6421 end_of_insn_group
= 0;
6423 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6425 /* If we have unwind records, we may need to update some now. */
6426 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6427 unw_rec_list
*end_ptr
= NULL
;
6431 /* Find the last prologue/body record in the list for the current
6432 insn, and set the slot number for all records up to that point.
6433 This needs to be done now, because prologue/body records refer to
6434 the current point, not the point after the instruction has been
6435 issued. This matters because there may have been nops emitted
6436 meanwhile. Any non-prologue non-body record followed by a
6437 prologue/body record must also refer to the current point. */
6438 unw_rec_list
*last_ptr
;
6440 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6441 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6442 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6443 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6444 || ptr
->r
.type
== body
)
6448 /* Make last_ptr point one after the last prologue/body
6450 last_ptr
= last_ptr
->next
;
6451 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6454 ptr
->slot_number
= (unsigned long) f
+ i
;
6455 ptr
->slot_frag
= frag_now
;
6457 /* Remove the initialized records, so that we won't accidentally
6458 update them again if we insert a nop and continue. */
6459 md
.slot
[curr
].unwind_record
= last_ptr
;
6463 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6464 if (md
.slot
[curr
].manual_bundling_on
)
6467 manual_bundling
= 1;
6469 break; /* Need to start a new bundle. */
6472 /* If this instruction specifies a template, then it must be the first
6473 instruction of a bundle. */
6474 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6477 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6479 if (manual_bundling
&& !manual_bundling_off
)
6481 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6482 _("`%s' must be last in bundle"), idesc
->name
);
6484 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6488 if (idesc
->flags
& IA64_OPCODE_LAST
)
6491 unsigned int required_template
;
6493 /* If we need a stop bit after an M slot, our only choice is
6494 template 5 (M;;MI). If we need a stop bit after a B
6495 slot, our only choice is to place it at the end of the
6496 bundle, because the only available templates are MIB,
6497 MBB, BBB, MMB, and MFB. We don't handle anything other
6498 than M and B slots because these are the only kind of
6499 instructions that can have the IA64_OPCODE_LAST bit set. */
6500 required_template
= template_val
;
6501 switch (idesc
->type
)
6505 required_template
= 5;
6513 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6514 _("Internal error: don't know how to force %s to end of instruction group"),
6520 && (i
> required_slot
6521 || (required_slot
== 2 && !manual_bundling_off
)
6522 || (user_template
>= 0
6523 /* Changing from MMI to M;MI is OK. */
6524 && (template_val
^ required_template
) > 1)))
6526 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6527 _("`%s' must be last in instruction group"),
6529 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6530 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6532 if (required_slot
< i
)
6533 /* Can't fit this instruction. */
6537 if (required_template
!= template_val
)
6539 /* If we switch the template, we need to reset the NOPs
6540 after slot i. The slot-types of the instructions ahead
6541 of i never change, so we don't need to worry about
6542 changing NOPs in front of this slot. */
6543 for (j
= i
; j
< 3; ++j
)
6544 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6546 /* We just picked a template that includes the stop bit in the
6547 middle, so we don't need another one emitted later. */
6548 md
.slot
[curr
].end_of_insn_group
= 0;
6550 template_val
= required_template
;
6552 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6554 if (manual_bundling
)
6556 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6557 _("Label must be first in a bundle"));
6558 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6560 /* This insn must go into the first slot of a bundle. */
6564 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6566 /* We need an instruction group boundary in the middle of a
6567 bundle. See if we can switch to an other template with
6568 an appropriate boundary. */
6570 orig_template
= template_val
;
6571 if (i
== 1 && (user_template
== 4
6572 || (user_template
< 0
6573 && (ia64_templ_desc
[template_val
].exec_unit
[0]
6577 end_of_insn_group
= 0;
6579 else if (i
== 2 && (user_template
== 0
6580 || (user_template
< 0
6581 && (ia64_templ_desc
[template_val
].exec_unit
[1]
6583 /* This test makes sure we don't switch the template if
6584 the next instruction is one that needs to be first in
6585 an instruction group. Since all those instructions are
6586 in the M group, there is no way such an instruction can
6587 fit in this bundle even if we switch the template. The
6588 reason we have to check for this is that otherwise we
6589 may end up generating "MI;;I M.." which has the deadly
6590 effect that the second M instruction is no longer the
6591 first in the group! --davidm 99/12/16 */
6592 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6595 end_of_insn_group
= 0;
6598 && user_template
== 0
6599 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6600 /* Use the next slot. */
6602 else if (curr
!= first
)
6603 /* can't fit this insn */
6606 if (template_val
!= orig_template
)
6607 /* if we switch the template, we need to reset the NOPs
6608 after slot i. The slot-types of the instructions ahead
6609 of i never change, so we don't need to worry about
6610 changing NOPs in front of this slot. */
6611 for (j
= i
; j
< 3; ++j
)
6612 insn
[j
] = nop
[ia64_templ_desc
[template_val
].exec_unit
[j
]];
6614 required_unit
= ia64_templ_desc
[template_val
].exec_unit
[i
];
6616 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6617 if (idesc
->type
== IA64_TYPE_DYN
)
6619 enum ia64_opnd opnd1
, opnd2
;
6621 if ((strcmp (idesc
->name
, "nop") == 0)
6622 || (strcmp (idesc
->name
, "break") == 0))
6623 insn_unit
= required_unit
;
6624 else if (strcmp (idesc
->name
, "hint") == 0)
6626 insn_unit
= required_unit
;
6627 if (required_unit
== IA64_UNIT_B
)
6633 case hint_b_warning
:
6634 as_warn (_("hint in B unit may be treated as nop"));
6637 /* When manual bundling is off and there is no
6638 user template, we choose a different unit so
6639 that hint won't go into the current slot. We
6640 will fill the current bundle with nops and
6641 try to put hint into the next bundle. */
6642 if (!manual_bundling
&& user_template
< 0)
6643 insn_unit
= IA64_UNIT_I
;
6645 as_bad (_("hint in B unit can't be used"));
6650 else if (strcmp (idesc
->name
, "chk.s") == 0
6651 || strcmp (idesc
->name
, "mov") == 0)
6653 insn_unit
= IA64_UNIT_M
;
6654 if (required_unit
== IA64_UNIT_I
6655 || (required_unit
== IA64_UNIT_F
&& template_val
== 6))
6656 insn_unit
= IA64_UNIT_I
;
6659 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6661 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6662 idesc
->name
, "?imbfxx"[insn_unit
]);
6663 opnd1
= idesc
->operands
[0];
6664 opnd2
= idesc
->operands
[1];
6665 ia64_free_opcode (idesc
);
6666 idesc
= ia64_find_opcode (mnemonic
);
6667 /* moves to/from ARs have collisions */
6668 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6670 while (idesc
!= NULL
6671 && (idesc
->operands
[0] != opnd1
6672 || idesc
->operands
[1] != opnd2
))
6673 idesc
= get_next_opcode (idesc
);
6675 md
.slot
[curr
].idesc
= idesc
;
6679 insn_type
= idesc
->type
;
6680 insn_unit
= IA64_UNIT_NIL
;
6684 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6685 insn_unit
= required_unit
;
6687 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6688 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6689 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6690 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6691 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6696 if (insn_unit
!= required_unit
)
6697 continue; /* Try next slot. */
6699 /* Now is a good time to fix up the labels for this insn. */
6701 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6703 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6704 symbol_set_frag (lfix
->sym
, frag_now
);
6705 mark_label
|= lfix
->dw2_mark_labels
;
6707 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6709 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6710 symbol_set_frag (lfix
->sym
, frag_now
);
6713 if (debug_type
== DEBUG_DWARF2
6714 || md
.slot
[curr
].loc_directive_seen
6717 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6719 md
.slot
[curr
].loc_directive_seen
= 0;
6721 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
6723 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6726 build_insn (md
.slot
+ curr
, insn
+ i
);
6728 ptr
= md
.slot
[curr
].unwind_record
;
6731 /* Set slot numbers for all remaining unwind records belonging to the
6732 current insn. There can not be any prologue/body unwind records
6734 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6736 ptr
->slot_number
= (unsigned long) f
+ i
;
6737 ptr
->slot_frag
= frag_now
;
6739 md
.slot
[curr
].unwind_record
= NULL
;
6742 if (required_unit
== IA64_UNIT_L
)
6745 /* skip one slot for long/X-unit instructions */
6748 --md
.num_slots_in_use
;
6751 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6753 ifix
= md
.slot
[curr
].fixup
+ j
;
6754 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6755 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6756 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6757 fix
->fx_file
= md
.slot
[curr
].src_file
;
6758 fix
->fx_line
= md
.slot
[curr
].src_line
;
6761 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6764 ia64_free_opcode (md
.slot
[curr
].idesc
);
6765 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6766 md
.slot
[curr
].user_template
= -1;
6768 if (manual_bundling_off
)
6770 manual_bundling
= 0;
6773 curr
= (curr
+ 1) % NUM_SLOTS
;
6774 idesc
= md
.slot
[curr
].idesc
;
6777 /* A user template was specified, but the first following instruction did
6778 not fit. This can happen with or without manual bundling. */
6779 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
6781 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6782 _("`%s' does not fit into %s template"),
6783 idesc
->name
, ia64_templ_desc
[template_val
].name
);
6784 /* Drop first insn so we don't livelock. */
6785 --md
.num_slots_in_use
;
6786 know (curr
== first
);
6787 ia64_free_opcode (md
.slot
[curr
].idesc
);
6788 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6789 md
.slot
[curr
].user_template
= -1;
6791 else if (manual_bundling
> 0)
6793 if (md
.num_slots_in_use
> 0)
6796 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6797 _("`%s' does not fit into bundle"), idesc
->name
);
6802 if (template_val
== 2)
6804 else if (last_slot
== 0)
6805 where
= "slots 2 or 3";
6808 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6809 _("`%s' can't go in %s of %s template"),
6810 idesc
->name
, where
, ia64_templ_desc
[template_val
].name
);
6814 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6815 _("Missing '}' at end of file"));
6818 know (md
.num_slots_in_use
< NUM_SLOTS
);
6820 t0
= end_of_insn_group
| (template_val
<< 1) | (insn
[0] << 5) | (insn
[1] << 46);
6821 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6823 number_to_chars_littleendian (f
+ 0, t0
, 8);
6824 number_to_chars_littleendian (f
+ 8, t1
, 8);
6828 md_parse_option (int c
, char *arg
)
6833 /* Switches from the Intel assembler. */
6835 if (strcmp (arg
, "ilp64") == 0
6836 || strcmp (arg
, "lp64") == 0
6837 || strcmp (arg
, "p64") == 0)
6839 md
.flags
|= EF_IA_64_ABI64
;
6841 else if (strcmp (arg
, "ilp32") == 0)
6843 md
.flags
&= ~EF_IA_64_ABI64
;
6845 else if (strcmp (arg
, "le") == 0)
6847 md
.flags
&= ~EF_IA_64_BE
;
6848 default_big_endian
= 0;
6850 else if (strcmp (arg
, "be") == 0)
6852 md
.flags
|= EF_IA_64_BE
;
6853 default_big_endian
= 1;
6855 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6858 if (strcmp (arg
, "warning") == 0)
6859 md
.unwind_check
= unwind_check_warning
;
6860 else if (strcmp (arg
, "error") == 0)
6861 md
.unwind_check
= unwind_check_error
;
6865 else if (strncmp (arg
, "hint.b=", 7) == 0)
6868 if (strcmp (arg
, "ok") == 0)
6869 md
.hint_b
= hint_b_ok
;
6870 else if (strcmp (arg
, "warning") == 0)
6871 md
.hint_b
= hint_b_warning
;
6872 else if (strcmp (arg
, "error") == 0)
6873 md
.hint_b
= hint_b_error
;
6877 else if (strncmp (arg
, "tune=", 5) == 0)
6880 if (strcmp (arg
, "itanium1") == 0)
6882 else if (strcmp (arg
, "itanium2") == 0)
6892 if (strcmp (arg
, "so") == 0)
6894 /* Suppress signon message. */
6896 else if (strcmp (arg
, "pi") == 0)
6898 /* Reject privileged instructions. FIXME */
6900 else if (strcmp (arg
, "us") == 0)
6902 /* Allow union of signed and unsigned range. FIXME */
6904 else if (strcmp (arg
, "close_fcalls") == 0)
6906 /* Do not resolve global function calls. */
6913 /* temp[="prefix"] Insert temporary labels into the object file
6914 symbol table prefixed by "prefix".
6915 Default prefix is ":temp:".
6920 /* indirect=<tgt> Assume unannotated indirect branches behavior
6921 according to <tgt> --
6922 exit: branch out from the current context (default)
6923 labels: all labels in context may be branch targets
6925 if (strncmp (arg
, "indirect=", 9) != 0)
6930 /* -X conflicts with an ignored option, use -x instead */
6932 if (!arg
|| strcmp (arg
, "explicit") == 0)
6934 /* set default mode to explicit */
6935 md
.default_explicit_mode
= 1;
6938 else if (strcmp (arg
, "auto") == 0)
6940 md
.default_explicit_mode
= 0;
6942 else if (strcmp (arg
, "none") == 0)
6946 else if (strcmp (arg
, "debug") == 0)
6950 else if (strcmp (arg
, "debugx") == 0)
6952 md
.default_explicit_mode
= 1;
6955 else if (strcmp (arg
, "debugn") == 0)
6962 as_bad (_("Unrecognized option '-x%s'"), arg
);
6967 /* nops Print nops statistics. */
6970 /* GNU specific switches for gcc. */
6971 case OPTION_MCONSTANT_GP
:
6972 md
.flags
|= EF_IA_64_CONS_GP
;
6975 case OPTION_MAUTO_PIC
:
6976 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
6987 md_show_usage (FILE *stream
)
6991 --mconstant-gp mark output file as using the constant-GP model\n\
6992 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6993 --mauto-pic mark output file as using the constant-GP model\n\
6994 without function descriptors (sets ELF header flag\n\
6995 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6996 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6997 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6998 -mtune=[itanium1|itanium2]\n\
6999 tune for a specific CPU (default -mtune=itanium2)\n\
7000 -munwind-check=[warning|error]\n\
7001 unwind directive check (default -munwind-check=warning)\n\
7002 -mhint.b=[ok|warning|error]\n\
7003 hint.b check (default -mhint.b=error)\n\
7004 -x | -xexplicit turn on dependency violation checking\n"), stream
);
7005 /* Note for translators: "automagically" can be translated as "automatically" here. */
7007 -xauto automagically remove dependency violations (default)\n\
7008 -xnone turn off dependency violation checking\n\
7009 -xdebug debug dependency violation checker\n\
7010 -xdebugn debug dependency violation checker but turn off\n\
7011 dependency violation checking\n\
7012 -xdebugx debug dependency violation checker and turn on\n\
7013 dependency violation checking\n"),
7018 ia64_after_parse_args (void)
7020 if (debug_type
== DEBUG_STABS
)
7021 as_fatal (_("--gstabs is not supported for ia64"));
7024 /* Return true if TYPE fits in TEMPL at SLOT. */
7027 match (int templ
, int type
, int slot
)
7029 enum ia64_unit unit
;
7032 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7035 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7037 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7039 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7040 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7041 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7042 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7043 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7044 default: result
= 0; break;
7049 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7050 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7051 type M or I would fit in TEMPL at SLOT. */
7054 extra_goodness (int templ
, int slot
)
7059 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7061 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7067 if (match (templ
, IA64_TYPE_M
, slot
)
7068 || match (templ
, IA64_TYPE_I
, slot
))
7069 /* Favor M- and I-unit NOPs. We definitely want to avoid
7070 F-unit and B-unit may cause split-issue or less-than-optimal
7071 branch-prediction. */
7082 /* This function is called once, at assembler startup time. It sets
7083 up all the tables, etc. that the MD part of the assembler will need
7084 that can be determined before arguments are parsed. */
7088 int i
, j
, k
, t
, goodness
, best
, ok
;
7093 md
.explicit_mode
= md
.default_explicit_mode
;
7095 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7097 /* Make sure function pointers get initialized. */
7098 target_big_endian
= -1;
7099 dot_byteorder (default_big_endian
);
7101 alias_hash
= hash_new ();
7102 alias_name_hash
= hash_new ();
7103 secalias_hash
= hash_new ();
7104 secalias_name_hash
= hash_new ();
7106 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7107 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7108 &zero_address_frag
);
7110 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7111 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7112 &zero_address_frag
);
7114 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7115 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7116 &zero_address_frag
);
7118 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7119 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7120 &zero_address_frag
);
7122 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7123 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7124 &zero_address_frag
);
7126 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7127 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7128 &zero_address_frag
);
7130 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7131 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7132 &zero_address_frag
);
7134 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7135 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7136 &zero_address_frag
);
7138 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7139 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7140 &zero_address_frag
);
7142 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7143 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7144 &zero_address_frag
);
7146 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7147 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7148 &zero_address_frag
);
7150 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7151 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7152 &zero_address_frag
);
7154 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7155 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7156 &zero_address_frag
);
7158 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7159 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7160 &zero_address_frag
);
7162 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7163 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7164 &zero_address_frag
);
7166 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7167 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7168 &zero_address_frag
);
7170 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7171 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7172 &zero_address_frag
);
7175 pseudo_func
[FUNC_SLOTCOUNT_RELOC
].u
.sym
=
7176 symbol_new (".<slotcount>", undefined_section
, FUNC_SLOTCOUNT_RELOC
,
7177 &zero_address_frag
);
7180 if (md
.tune
!= itanium1
)
7182 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7184 le_nop_stop
[0] = 0x9;
7187 /* Compute the table of best templates. We compute goodness as a
7188 base 4 value, in which each match counts for 3. Match-failures
7189 result in NOPs and we use extra_goodness() to pick the execution
7190 units that are best suited for issuing the NOP. */
7191 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7192 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7193 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7196 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7199 if (match (t
, i
, 0))
7201 if (match (t
, j
, 1))
7203 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7204 goodness
= 3 + 3 + 3;
7206 goodness
= 3 + 3 + extra_goodness (t
, 2);
7208 else if (match (t
, j
, 2))
7209 goodness
= 3 + 3 + extra_goodness (t
, 1);
7213 goodness
+= extra_goodness (t
, 1);
7214 goodness
+= extra_goodness (t
, 2);
7217 else if (match (t
, i
, 1))
7219 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7222 goodness
= 3 + extra_goodness (t
, 2);
7224 else if (match (t
, i
, 2))
7225 goodness
= 3 + extra_goodness (t
, 1);
7227 if (goodness
> best
)
7230 best_template
[i
][j
][k
] = t
;
7235 #ifdef DEBUG_TEMPLATES
7236 /* For debugging changes to the best_template calculations. We don't care
7237 about combinations with invalid instructions, so start the loops at 1. */
7238 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7239 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7240 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7242 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7244 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7246 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7250 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7251 md
.slot
[i
].user_template
= -1;
7253 md
.pseudo_hash
= hash_new ();
7254 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7256 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7257 (void *) (pseudo_opcode
+ i
));
7259 as_fatal (_("ia64.md_begin: can't hash `%s': %s"),
7260 pseudo_opcode
[i
].name
, err
);
7263 md
.reg_hash
= hash_new ();
7264 md
.dynreg_hash
= hash_new ();
7265 md
.const_hash
= hash_new ();
7266 md
.entry_hash
= hash_new ();
7268 /* general registers: */
7269 declare_register_set ("r", 128, REG_GR
);
7270 declare_register ("gp", REG_GR
+ 1);
7271 declare_register ("sp", REG_GR
+ 12);
7272 declare_register ("tp", REG_GR
+ 13);
7273 declare_register_set ("ret", 4, REG_GR
+ 8);
7275 /* floating point registers: */
7276 declare_register_set ("f", 128, REG_FR
);
7277 declare_register_set ("farg", 8, REG_FR
+ 8);
7278 declare_register_set ("fret", 8, REG_FR
+ 8);
7280 /* branch registers: */
7281 declare_register_set ("b", 8, REG_BR
);
7282 declare_register ("rp", REG_BR
+ 0);
7284 /* predicate registers: */
7285 declare_register_set ("p", 64, REG_P
);
7286 declare_register ("pr", REG_PR
);
7287 declare_register ("pr.rot", REG_PR_ROT
);
7289 /* application registers: */
7290 declare_register_set ("ar", 128, REG_AR
);
7291 for (i
= 0; i
< NELEMS (ar
); ++i
)
7292 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7294 /* control registers: */
7295 declare_register_set ("cr", 128, REG_CR
);
7296 for (i
= 0; i
< NELEMS (cr
); ++i
)
7297 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7299 declare_register ("ip", REG_IP
);
7300 declare_register ("cfm", REG_CFM
);
7301 declare_register ("psr", REG_PSR
);
7302 declare_register ("psr.l", REG_PSR_L
);
7303 declare_register ("psr.um", REG_PSR_UM
);
7305 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7307 unsigned int regnum
= indirect_reg
[i
].regnum
;
7309 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7312 /* pseudo-registers used to specify unwind info: */
7313 declare_register ("psp", REG_PSP
);
7315 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7317 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7318 (void *) (const_bits
+ i
));
7320 as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"),
7324 /* Set the architecture and machine depending on defaults and command line
7326 if (md
.flags
& EF_IA_64_ABI64
)
7327 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7329 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7332 as_warn (_("Could not set architecture and machine"));
7334 /* Set the pointer size and pointer shift size depending on md.flags */
7336 if (md
.flags
& EF_IA_64_ABI64
)
7338 md
.pointer_size
= 8; /* pointers are 8 bytes */
7339 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7343 md
.pointer_size
= 4; /* pointers are 4 bytes */
7344 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7347 md
.mem_offset
.hint
= 0;
7350 md
.entry_labels
= NULL
;
7353 /* Set the default options in md. Cannot do this in md_begin because
7354 that is called after md_parse_option which is where we set the
7355 options in md based on command line options. */
7358 ia64_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
7360 md
.flags
= MD_FLAGS_DEFAULT
;
7362 /* Don't turn on dependency checking for VMS, doesn't work. */
7365 /* FIXME: We should change it to unwind_check_error someday. */
7366 md
.unwind_check
= unwind_check_warning
;
7367 md
.hint_b
= hint_b_error
;
7371 /* Return a string for the target object file format. */
7374 ia64_target_format (void)
7376 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7378 if (md
.flags
& EF_IA_64_BE
)
7380 if (md
.flags
& EF_IA_64_ABI64
)
7381 #if defined(TE_AIX50)
7382 return "elf64-ia64-aix-big";
7383 #elif defined(TE_HPUX)
7384 return "elf64-ia64-hpux-big";
7386 return "elf64-ia64-big";
7389 #if defined(TE_AIX50)
7390 return "elf32-ia64-aix-big";
7391 #elif defined(TE_HPUX)
7392 return "elf32-ia64-hpux-big";
7394 return "elf32-ia64-big";
7399 if (md
.flags
& EF_IA_64_ABI64
)
7400 #if defined (TE_AIX50)
7401 return "elf64-ia64-aix-little";
7402 #elif defined (TE_VMS)
7404 md
.flags
|= EF_IA_64_ARCHVER_1
;
7405 return "elf64-ia64-vms";
7408 return "elf64-ia64-little";
7412 return "elf32-ia64-aix-little";
7414 return "elf32-ia64-little";
7419 return "unknown-format";
7423 ia64_end_of_source (void)
7425 /* terminate insn group upon reaching end of file: */
7426 insn_group_break (1, 0, 0);
7428 /* emits slots we haven't written yet: */
7429 ia64_flush_insns ();
7431 bfd_set_private_flags (stdoutput
, md
.flags
);
7433 md
.mem_offset
.hint
= 0;
7437 ia64_start_line (void)
7442 /* Make sure we don't reference input_line_pointer[-1] when that's
7448 if (md
.qp
.X_op
== O_register
)
7449 as_bad (_("qualifying predicate not followed by instruction"));
7450 md
.qp
.X_op
= O_absent
;
7452 if (ignore_input ())
7455 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7457 if (md
.detect_dv
&& !md
.explicit_mode
)
7464 as_warn (_("Explicit stops are ignored in auto mode"));
7468 insn_group_break (1, 0, 0);
7470 else if (input_line_pointer
[-1] == '{')
7472 if (md
.manual_bundling
)
7473 as_warn (_("Found '{' when manual bundling is already turned on"));
7475 CURR_SLOT
.manual_bundling_on
= 1;
7476 md
.manual_bundling
= 1;
7478 /* Bundling is only acceptable in explicit mode
7479 or when in default automatic mode. */
7480 if (md
.detect_dv
&& !md
.explicit_mode
)
7482 if (!md
.mode_explicitly_set
7483 && !md
.default_explicit_mode
)
7486 as_warn (_("Found '{' after explicit switch to automatic mode"));
7489 else if (input_line_pointer
[-1] == '}')
7491 if (!md
.manual_bundling
)
7492 as_warn (_("Found '}' when manual bundling is off"));
7494 PREV_SLOT
.manual_bundling_off
= 1;
7495 md
.manual_bundling
= 0;
7497 /* switch back to automatic mode, if applicable */
7500 && !md
.mode_explicitly_set
7501 && !md
.default_explicit_mode
)
7506 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7508 static int defining_tag
= 0;
7511 ia64_unrecognized_line (int ch
)
7516 expression_and_evaluate (&md
.qp
);
7517 if (*input_line_pointer
++ != ')')
7519 as_bad (_("Expected ')'"));
7522 if (md
.qp
.X_op
!= O_register
)
7524 as_bad (_("Qualifying predicate expected"));
7527 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7529 as_bad (_("Predicate register expected"));
7541 if (md
.qp
.X_op
== O_register
)
7543 as_bad (_("Tag must come before qualifying predicate."));
7547 /* This implements just enough of read_a_source_file in read.c to
7548 recognize labels. */
7549 if (is_name_beginner (*input_line_pointer
))
7551 s
= input_line_pointer
;
7552 c
= get_symbol_end ();
7554 else if (LOCAL_LABELS_FB
7555 && ISDIGIT (*input_line_pointer
))
7558 while (ISDIGIT (*input_line_pointer
))
7559 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7560 fb_label_instance_inc (temp
);
7561 s
= fb_label_name (temp
, 0);
7562 c
= *input_line_pointer
;
7571 /* Put ':' back for error messages' sake. */
7572 *input_line_pointer
++ = ':';
7573 as_bad (_("Expected ':'"));
7580 /* Put ':' back for error messages' sake. */
7581 *input_line_pointer
++ = ':';
7582 if (*input_line_pointer
++ != ']')
7584 as_bad (_("Expected ']'"));
7589 as_bad (_("Tag name expected"));
7599 /* Not a valid line. */
7604 ia64_frob_label (struct symbol
*sym
)
7606 struct label_fix
*fix
;
7608 /* Tags need special handling since they are not bundle breaks like
7612 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7614 fix
->next
= CURR_SLOT
.tag_fixups
;
7615 fix
->dw2_mark_labels
= FALSE
;
7616 CURR_SLOT
.tag_fixups
= fix
;
7621 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7623 md
.last_text_seg
= now_seg
;
7624 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7626 fix
->next
= CURR_SLOT
.label_fixups
;
7627 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7628 CURR_SLOT
.label_fixups
= fix
;
7630 /* Keep track of how many code entry points we've seen. */
7631 if (md
.path
== md
.maxpaths
)
7634 md
.entry_labels
= (const char **)
7635 xrealloc ((void *) md
.entry_labels
,
7636 md
.maxpaths
* sizeof (char *));
7638 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7643 /* The HP-UX linker will give unresolved symbol errors for symbols
7644 that are declared but unused. This routine removes declared,
7645 unused symbols from an object. */
7647 ia64_frob_symbol (struct symbol
*sym
)
7649 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7650 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7651 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7652 && ! S_IS_EXTERNAL (sym
)))
7659 ia64_flush_pending_output (void)
7661 if (!md
.keep_pending_output
7662 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7664 /* ??? This causes many unnecessary stop bits to be emitted.
7665 Unfortunately, it isn't clear if it is safe to remove this. */
7666 insn_group_break (1, 0, 0);
7667 ia64_flush_insns ();
7671 /* Do ia64-specific expression optimization. All that's done here is
7672 to transform index expressions that are either due to the indexing
7673 of rotating registers or due to the indexing of indirect register
7676 ia64_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
7680 resolve_expression (l
);
7681 if (l
->X_op
== O_register
)
7683 unsigned num_regs
= l
->X_add_number
>> 16;
7685 resolve_expression (r
);
7688 /* Left side is a .rotX-allocated register. */
7689 if (r
->X_op
!= O_constant
)
7691 as_bad (_("Rotating register index must be a non-negative constant"));
7692 r
->X_add_number
= 0;
7694 else if ((valueT
) r
->X_add_number
>= num_regs
)
7696 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
7697 r
->X_add_number
= 0;
7699 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7702 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
7704 if (r
->X_op
!= O_register
7705 || r
->X_add_number
< REG_GR
7706 || r
->X_add_number
> REG_GR
+ 127)
7708 as_bad (_("Indirect register index must be a general register"));
7709 r
->X_add_number
= REG_GR
;
7712 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
7713 l
->X_add_number
= r
->X_add_number
;
7717 as_bad (_("Index can only be applied to rotating or indirect registers"));
7718 /* Fall back to some register use of which has as little as possible
7719 side effects, to minimize subsequent error messages. */
7720 l
->X_op
= O_register
;
7721 l
->X_add_number
= REG_GR
+ 3;
7726 ia64_parse_name (char *name
, expressionS
*e
, char *nextcharP
)
7728 struct const_desc
*cdesc
;
7729 struct dynreg
*dr
= 0;
7736 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7738 /* Find what relocation pseudo-function we're dealing with. */
7739 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7740 if (pseudo_func
[idx
].name
7741 && pseudo_func
[idx
].name
[0] == name
[1]
7742 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7744 pseudo_type
= pseudo_func
[idx
].type
;
7747 switch (pseudo_type
)
7749 case PSEUDO_FUNC_RELOC
:
7750 end
= input_line_pointer
;
7751 if (*nextcharP
!= '(')
7753 as_bad (_("Expected '('"));
7757 ++input_line_pointer
;
7759 if (*input_line_pointer
!= ')')
7761 as_bad (_("Missing ')'"));
7765 ++input_line_pointer
;
7767 if (idx
== FUNC_SLOTCOUNT_RELOC
)
7769 /* @slotcount can accept any expression. Canonicalize. */
7770 e
->X_add_symbol
= make_expr_symbol (e
);
7772 e
->X_add_number
= 0;
7775 if (e
->X_op
!= O_symbol
)
7777 if (e
->X_op
!= O_pseudo_fixup
)
7779 as_bad (_("Not a symbolic expression"));
7782 if (idx
!= FUNC_LT_RELATIVE
)
7784 as_bad (_("Illegal combination of relocation functions"));
7787 switch (S_GET_VALUE (e
->X_op_symbol
))
7789 case FUNC_FPTR_RELATIVE
:
7790 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7791 case FUNC_DTP_MODULE
:
7792 idx
= FUNC_LT_DTP_MODULE
; break;
7793 case FUNC_DTP_RELATIVE
:
7794 idx
= FUNC_LT_DTP_RELATIVE
; break;
7795 case FUNC_TP_RELATIVE
:
7796 idx
= FUNC_LT_TP_RELATIVE
; break;
7798 as_bad (_("Illegal combination of relocation functions"));
7802 /* Make sure gas doesn't get rid of local symbols that are used
7804 e
->X_op
= O_pseudo_fixup
;
7805 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7807 *nextcharP
= *input_line_pointer
;
7810 case PSEUDO_FUNC_CONST
:
7811 e
->X_op
= O_constant
;
7812 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7815 case PSEUDO_FUNC_REG
:
7816 e
->X_op
= O_register
;
7817 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7826 /* first see if NAME is a known register name: */
7827 sym
= hash_find (md
.reg_hash
, name
);
7830 e
->X_op
= O_register
;
7831 e
->X_add_number
= S_GET_VALUE (sym
);
7835 cdesc
= hash_find (md
.const_hash
, name
);
7838 e
->X_op
= O_constant
;
7839 e
->X_add_number
= cdesc
->value
;
7843 /* check for inN, locN, or outN: */
7848 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7856 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7864 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7875 /* Ignore register numbers with leading zeroes, except zero itself. */
7876 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
7878 unsigned long regnum
;
7880 /* The name is inN, locN, or outN; parse the register number. */
7881 regnum
= strtoul (name
+ idx
, &end
, 10);
7882 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
7884 if (regnum
>= dr
->num_regs
)
7887 as_bad (_("No current frame"));
7889 as_bad (_("Register number out of range 0..%u"),
7893 e
->X_op
= O_register
;
7894 e
->X_add_number
= dr
->base
+ regnum
;
7899 end
= alloca (strlen (name
) + 1);
7901 name
= ia64_canonicalize_symbol_name (end
);
7902 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7904 /* We've got ourselves the name of a rotating register set.
7905 Store the base register number in the low 16 bits of
7906 X_add_number and the size of the register set in the top 16
7908 e
->X_op
= O_register
;
7909 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7915 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7918 ia64_canonicalize_symbol_name (char *name
)
7920 size_t len
= strlen (name
), full
= len
;
7922 while (len
> 0 && name
[len
- 1] == '#')
7927 as_bad (_("Standalone `#' is illegal"));
7929 else if (len
< full
- 1)
7930 as_warn (_("Redundant `#' suffix operators"));
7935 /* Return true if idesc is a conditional branch instruction. This excludes
7936 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7937 because they always read/write resources regardless of the value of the
7938 qualifying predicate. br.ia must always use p0, and hence is always
7939 taken. Thus this function returns true for branches which can fall
7940 through, and which use no resources if they do fall through. */
7943 is_conditional_branch (struct ia64_opcode
*idesc
)
7945 /* br is a conditional branch. Everything that starts with br. except
7946 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7947 Everything that starts with brl is a conditional branch. */
7948 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
7949 && (idesc
->name
[2] == '\0'
7950 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
7951 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
7952 || idesc
->name
[2] == 'l'
7953 /* br.cond, br.call, br.clr */
7954 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
7955 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
7956 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
7959 /* Return whether the given opcode is a taken branch. If there's any doubt,
7963 is_taken_branch (struct ia64_opcode
*idesc
)
7965 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
7966 || strncmp (idesc
->name
, "br.ia", 5) == 0);
7969 /* Return whether the given opcode is an interruption or rfi. If there's any
7970 doubt, returns zero. */
7973 is_interruption_or_rfi (struct ia64_opcode
*idesc
)
7975 if (strcmp (idesc
->name
, "rfi") == 0)
7980 /* Returns the index of the given dependency in the opcode's list of chks, or
7981 -1 if there is no dependency. */
7984 depends_on (int depind
, struct ia64_opcode
*idesc
)
7987 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
7988 for (i
= 0; i
< dep
->nchks
; i
++)
7990 if (depind
== DEP (dep
->chks
[i
]))
7996 /* Determine a set of specific resources used for a particular resource
7997 class. Returns the number of specific resources identified For those
7998 cases which are not determinable statically, the resource returned is
8001 Meanings of value in 'NOTE':
8002 1) only read/write when the register number is explicitly encoded in the
8004 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8005 accesses CFM when qualifying predicate is in the rotating region.
8006 3) general register value is used to specify an indirect register; not
8007 determinable statically.
8008 4) only read the given resource when bits 7:0 of the indirect index
8009 register value does not match the register number of the resource; not
8010 determinable statically.
8011 5) all rules are implementation specific.
8012 6) only when both the index specified by the reader and the index specified
8013 by the writer have the same value in bits 63:61; not determinable
8015 7) only access the specified resource when the corresponding mask bit is
8017 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8018 only read when these insns reference FR2-31
8019 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8020 written when these insns write FR32-127
8021 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8023 11) The target predicates are written independently of PR[qp], but source
8024 registers are only read if PR[qp] is true. Since the state of PR[qp]
8025 cannot statically be determined, all source registers are marked used.
8026 12) This insn only reads the specified predicate register when that
8027 register is the PR[qp].
8028 13) This reference to ld-c only applies to the GR whose value is loaded
8029 with data returned from memory, not the post-incremented address register.
8030 14) The RSE resource includes the implementation-specific RSE internal
8031 state resources. At least one (and possibly more) of these resources are
8032 read by each instruction listed in IC:rse-readers. At least one (and
8033 possibly more) of these resources are written by each insn listed in
8035 15+16) Represents reserved instructions, which the assembler does not
8037 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8038 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8040 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8041 this code; there are no dependency violations based on memory access.
8044 #define MAX_SPECS 256
8049 specify_resource (const struct ia64_dependency
*dep
,
8050 struct ia64_opcode
*idesc
,
8051 /* is this a DV chk or a DV reg? */
8053 /* returned specific resources */
8054 struct rsrc specs
[MAX_SPECS
],
8055 /* resource note for this insn's usage */
8057 /* which execution path to examine */
8065 if (dep
->mode
== IA64_DV_WAW
8066 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8067 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8070 /* template for any resources we identify */
8071 tmpl
.dependency
= dep
;
8073 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8074 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8075 tmpl
.link_to_qp_branch
= 1;
8076 tmpl
.mem_offset
.hint
= 0;
8077 tmpl
.mem_offset
.offset
= 0;
8078 tmpl
.mem_offset
.base
= 0;
8081 tmpl
.cmp_type
= CMP_NONE
;
8088 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8089 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8090 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8092 /* we don't need to track these */
8093 if (dep
->semantics
== IA64_DVS_NONE
)
8096 switch (dep
->specifier
)
8101 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8103 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8104 if (regno
>= 0 && regno
<= 7)
8106 specs
[count
] = tmpl
;
8107 specs
[count
++].index
= regno
;
8113 for (i
= 0; i
< 8; i
++)
8115 specs
[count
] = tmpl
;
8116 specs
[count
++].index
= i
;
8125 case IA64_RS_AR_UNAT
:
8126 /* This is a mov =AR or mov AR= instruction. */
8127 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8129 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8130 if (regno
== AR_UNAT
)
8132 specs
[count
++] = tmpl
;
8137 /* This is a spill/fill, or other instruction that modifies the
8140 /* Unless we can determine the specific bits used, mark the whole
8141 thing; bits 8:3 of the memory address indicate the bit used in
8142 UNAT. The .mem.offset hint may be used to eliminate a small
8143 subset of conflicts. */
8144 specs
[count
] = tmpl
;
8145 if (md
.mem_offset
.hint
)
8148 fprintf (stderr
, " Using hint for spill/fill\n");
8149 /* The index isn't actually used, just set it to something
8150 approximating the bit index. */
8151 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8152 specs
[count
].mem_offset
.hint
= 1;
8153 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8154 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8158 specs
[count
++].specific
= 0;
8166 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8168 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8169 if ((regno
>= 8 && regno
<= 15)
8170 || (regno
>= 20 && regno
<= 23)
8171 || (regno
>= 31 && regno
<= 39)
8172 || (regno
>= 41 && regno
<= 47)
8173 || (regno
>= 67 && regno
<= 111))
8175 specs
[count
] = tmpl
;
8176 specs
[count
++].index
= regno
;
8189 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8191 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8192 if ((regno
>= 48 && regno
<= 63)
8193 || (regno
>= 112 && regno
<= 127))
8195 specs
[count
] = tmpl
;
8196 specs
[count
++].index
= regno
;
8202 for (i
= 48; i
< 64; i
++)
8204 specs
[count
] = tmpl
;
8205 specs
[count
++].index
= i
;
8207 for (i
= 112; i
< 128; i
++)
8209 specs
[count
] = tmpl
;
8210 specs
[count
++].index
= i
;
8228 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8229 if (idesc
->operands
[i
] == IA64_OPND_B1
8230 || idesc
->operands
[i
] == IA64_OPND_B2
)
8232 specs
[count
] = tmpl
;
8233 specs
[count
++].index
=
8234 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8239 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8240 if (idesc
->operands
[i
] == IA64_OPND_B1
8241 || idesc
->operands
[i
] == IA64_OPND_B2
)
8243 specs
[count
] = tmpl
;
8244 specs
[count
++].index
=
8245 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8251 case IA64_RS_CPUID
: /* four or more registers */
8254 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8256 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8257 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8260 specs
[count
] = tmpl
;
8261 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8265 specs
[count
] = tmpl
;
8266 specs
[count
++].specific
= 0;
8276 case IA64_RS_DBR
: /* four or more registers */
8279 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8281 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8282 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8285 specs
[count
] = tmpl
;
8286 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8290 specs
[count
] = tmpl
;
8291 specs
[count
++].specific
= 0;
8295 else if (note
== 0 && !rsrc_write
)
8297 specs
[count
] = tmpl
;
8298 specs
[count
++].specific
= 0;
8306 case IA64_RS_IBR
: /* four or more registers */
8309 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8311 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8312 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8315 specs
[count
] = tmpl
;
8316 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8320 specs
[count
] = tmpl
;
8321 specs
[count
++].specific
= 0;
8334 /* These are implementation specific. Force all references to
8335 conflict with all other references. */
8336 specs
[count
] = tmpl
;
8337 specs
[count
++].specific
= 0;
8345 case IA64_RS_PKR
: /* 16 or more registers */
8346 if (note
== 3 || note
== 4)
8348 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8350 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8351 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8356 specs
[count
] = tmpl
;
8357 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8360 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8362 /* Uses all registers *except* the one in R3. */
8363 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8365 specs
[count
] = tmpl
;
8366 specs
[count
++].index
= i
;
8372 specs
[count
] = tmpl
;
8373 specs
[count
++].specific
= 0;
8380 specs
[count
] = tmpl
;
8381 specs
[count
++].specific
= 0;
8385 case IA64_RS_PMC
: /* four or more registers */
8388 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8389 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8392 int reg_index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8394 int regno
= CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_GR
;
8395 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8398 specs
[count
] = tmpl
;
8399 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8403 specs
[count
] = tmpl
;
8404 specs
[count
++].specific
= 0;
8414 case IA64_RS_PMD
: /* four or more registers */
8417 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8419 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8420 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8423 specs
[count
] = tmpl
;
8424 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8428 specs
[count
] = tmpl
;
8429 specs
[count
++].specific
= 0;
8439 case IA64_RS_RR
: /* eight registers */
8442 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8444 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8445 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8448 specs
[count
] = tmpl
;
8449 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8453 specs
[count
] = tmpl
;
8454 specs
[count
++].specific
= 0;
8458 else if (note
== 0 && !rsrc_write
)
8460 specs
[count
] = tmpl
;
8461 specs
[count
++].specific
= 0;
8469 case IA64_RS_CR_IRR
:
8472 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8473 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8475 && idesc
->operands
[1] == IA64_OPND_CR3
8478 for (i
= 0; i
< 4; i
++)
8480 specs
[count
] = tmpl
;
8481 specs
[count
++].index
= CR_IRR0
+ i
;
8487 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8488 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8490 && regno
<= CR_IRR3
)
8492 specs
[count
] = tmpl
;
8493 specs
[count
++].index
= regno
;
8502 case IA64_RS_CR_IIB
:
8509 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8510 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8511 && (regno
== CR_IIB0
|| regno
== CR_IIB1
))
8513 specs
[count
] = tmpl
;
8514 specs
[count
++].index
= regno
;
8519 case IA64_RS_CR_LRR
:
8526 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8527 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8528 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8530 specs
[count
] = tmpl
;
8531 specs
[count
++].index
= regno
;
8539 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8541 specs
[count
] = tmpl
;
8542 specs
[count
++].index
=
8543 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8558 else if (rsrc_write
)
8560 if (dep
->specifier
== IA64_RS_FRb
8561 && idesc
->operands
[0] == IA64_OPND_F1
)
8563 specs
[count
] = tmpl
;
8564 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8569 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8571 if (idesc
->operands
[i
] == IA64_OPND_F2
8572 || idesc
->operands
[i
] == IA64_OPND_F3
8573 || idesc
->operands
[i
] == IA64_OPND_F4
)
8575 specs
[count
] = tmpl
;
8576 specs
[count
++].index
=
8577 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8586 /* This reference applies only to the GR whose value is loaded with
8587 data returned from memory. */
8588 specs
[count
] = tmpl
;
8589 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8595 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8596 if (idesc
->operands
[i
] == IA64_OPND_R1
8597 || idesc
->operands
[i
] == IA64_OPND_R2
8598 || idesc
->operands
[i
] == IA64_OPND_R3
)
8600 specs
[count
] = tmpl
;
8601 specs
[count
++].index
=
8602 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8604 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8605 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8606 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8608 specs
[count
] = tmpl
;
8609 specs
[count
++].index
=
8610 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8615 /* Look for anything that reads a GR. */
8616 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8618 if (idesc
->operands
[i
] == IA64_OPND_MR3
8619 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8620 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8621 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8622 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8623 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8624 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8625 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8626 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8627 || ((i
>= idesc
->num_outputs
)
8628 && (idesc
->operands
[i
] == IA64_OPND_R1
8629 || idesc
->operands
[i
] == IA64_OPND_R2
8630 || idesc
->operands
[i
] == IA64_OPND_R3
8631 /* addl source register. */
8632 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8634 specs
[count
] = tmpl
;
8635 specs
[count
++].index
=
8636 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8647 /* This is the same as IA64_RS_PRr, except that the register range is
8648 from 1 - 15, and there are no rotating register reads/writes here. */
8652 for (i
= 1; i
< 16; i
++)
8654 specs
[count
] = tmpl
;
8655 specs
[count
++].index
= i
;
8661 /* Mark only those registers indicated by the mask. */
8664 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8665 for (i
= 1; i
< 16; i
++)
8666 if (mask
& ((valueT
) 1 << i
))
8668 specs
[count
] = tmpl
;
8669 specs
[count
++].index
= i
;
8677 else if (note
== 11) /* note 11 implies note 1 as well */
8681 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8683 if (idesc
->operands
[i
] == IA64_OPND_P1
8684 || idesc
->operands
[i
] == IA64_OPND_P2
)
8686 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8687 if (regno
>= 1 && regno
< 16)
8689 specs
[count
] = tmpl
;
8690 specs
[count
++].index
= regno
;
8700 else if (note
== 12)
8702 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8704 specs
[count
] = tmpl
;
8705 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8712 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8713 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8714 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8715 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8717 if ((idesc
->operands
[0] == IA64_OPND_P1
8718 || idesc
->operands
[0] == IA64_OPND_P2
)
8719 && p1
>= 1 && p1
< 16)
8721 specs
[count
] = tmpl
;
8722 specs
[count
].cmp_type
=
8723 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8724 specs
[count
++].index
= p1
;
8726 if ((idesc
->operands
[1] == IA64_OPND_P1
8727 || idesc
->operands
[1] == IA64_OPND_P2
)
8728 && p2
>= 1 && p2
< 16)
8730 specs
[count
] = tmpl
;
8731 specs
[count
].cmp_type
=
8732 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8733 specs
[count
++].index
= p2
;
8738 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8740 specs
[count
] = tmpl
;
8741 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8743 if (idesc
->operands
[1] == IA64_OPND_PR
)
8745 for (i
= 1; i
< 16; i
++)
8747 specs
[count
] = tmpl
;
8748 specs
[count
++].index
= i
;
8759 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8760 simplified cases of this. */
8764 for (i
= 16; i
< 63; i
++)
8766 specs
[count
] = tmpl
;
8767 specs
[count
++].index
= i
;
8773 /* Mark only those registers indicated by the mask. */
8775 && idesc
->operands
[0] == IA64_OPND_PR
)
8777 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8778 if (mask
& ((valueT
) 1 << 16))
8779 for (i
= 16; i
< 63; i
++)
8781 specs
[count
] = tmpl
;
8782 specs
[count
++].index
= i
;
8786 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8788 for (i
= 16; i
< 63; i
++)
8790 specs
[count
] = tmpl
;
8791 specs
[count
++].index
= i
;
8799 else if (note
== 11) /* note 11 implies note 1 as well */
8803 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8805 if (idesc
->operands
[i
] == IA64_OPND_P1
8806 || idesc
->operands
[i
] == IA64_OPND_P2
)
8808 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8809 if (regno
>= 16 && regno
< 63)
8811 specs
[count
] = tmpl
;
8812 specs
[count
++].index
= regno
;
8822 else if (note
== 12)
8824 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8826 specs
[count
] = tmpl
;
8827 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8834 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8835 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8836 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8837 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8839 if ((idesc
->operands
[0] == IA64_OPND_P1
8840 || idesc
->operands
[0] == IA64_OPND_P2
)
8841 && p1
>= 16 && p1
< 63)
8843 specs
[count
] = tmpl
;
8844 specs
[count
].cmp_type
=
8845 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8846 specs
[count
++].index
= p1
;
8848 if ((idesc
->operands
[1] == IA64_OPND_P1
8849 || idesc
->operands
[1] == IA64_OPND_P2
)
8850 && p2
>= 16 && p2
< 63)
8852 specs
[count
] = tmpl
;
8853 specs
[count
].cmp_type
=
8854 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8855 specs
[count
++].index
= p2
;
8860 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8862 specs
[count
] = tmpl
;
8863 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8865 if (idesc
->operands
[1] == IA64_OPND_PR
)
8867 for (i
= 16; i
< 63; i
++)
8869 specs
[count
] = tmpl
;
8870 specs
[count
++].index
= i
;
8882 /* Verify that the instruction is using the PSR bit indicated in
8886 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8888 if (dep
->regindex
< 6)
8890 specs
[count
++] = tmpl
;
8893 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8895 if (dep
->regindex
< 32
8896 || dep
->regindex
== 35
8897 || dep
->regindex
== 36
8898 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8900 specs
[count
++] = tmpl
;
8903 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8905 if (dep
->regindex
< 32
8906 || dep
->regindex
== 35
8907 || dep
->regindex
== 36
8908 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8910 specs
[count
++] = tmpl
;
8915 /* Several PSR bits have very specific dependencies. */
8916 switch (dep
->regindex
)
8919 specs
[count
++] = tmpl
;
8924 specs
[count
++] = tmpl
;
8928 /* Only certain CR accesses use PSR.ic */
8929 if (idesc
->operands
[0] == IA64_OPND_CR3
8930 || idesc
->operands
[1] == IA64_OPND_CR3
)
8933 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8936 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_CR
;
8953 specs
[count
++] = tmpl
;
8962 specs
[count
++] = tmpl
;
8966 /* Only some AR accesses use cpl */
8967 if (idesc
->operands
[0] == IA64_OPND_AR3
8968 || idesc
->operands
[1] == IA64_OPND_AR3
)
8971 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8974 CURR_SLOT
.opnd
[reg_index
].X_add_number
- REG_AR
;
8981 && regno
<= AR_K7
))))
8983 specs
[count
++] = tmpl
;
8988 specs
[count
++] = tmpl
;
8998 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9000 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9006 if (mask
& ((valueT
) 1 << dep
->regindex
))
9008 specs
[count
++] = tmpl
;
9013 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9014 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9015 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9016 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9018 if (idesc
->operands
[i
] == IA64_OPND_F1
9019 || idesc
->operands
[i
] == IA64_OPND_F2
9020 || idesc
->operands
[i
] == IA64_OPND_F3
9021 || idesc
->operands
[i
] == IA64_OPND_F4
)
9023 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9024 if (reg
>= min
&& reg
<= max
)
9026 specs
[count
++] = tmpl
;
9033 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9034 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9035 /* mfh is read on writes to FR32-127; mfl is read on writes to
9037 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9039 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9041 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9042 if (reg
>= min
&& reg
<= max
)
9044 specs
[count
++] = tmpl
;
9049 else if (note
== 10)
9051 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9053 if (idesc
->operands
[i
] == IA64_OPND_R1
9054 || idesc
->operands
[i
] == IA64_OPND_R2
9055 || idesc
->operands
[i
] == IA64_OPND_R3
)
9057 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9058 if (regno
>= 16 && regno
<= 31)
9060 specs
[count
++] = tmpl
;
9071 case IA64_RS_AR_FPSR
:
9072 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9074 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9075 if (regno
== AR_FPSR
)
9077 specs
[count
++] = tmpl
;
9082 specs
[count
++] = tmpl
;
9087 /* Handle all AR[REG] resources */
9088 if (note
== 0 || note
== 1)
9090 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9091 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9092 && regno
== dep
->regindex
)
9094 specs
[count
++] = tmpl
;
9096 /* other AR[REG] resources may be affected by AR accesses */
9097 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9100 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9101 switch (dep
->regindex
)
9107 if (regno
== AR_BSPSTORE
)
9109 specs
[count
++] = tmpl
;
9113 (regno
== AR_BSPSTORE
9114 || regno
== AR_RNAT
))
9116 specs
[count
++] = tmpl
;
9121 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9124 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9125 switch (dep
->regindex
)
9130 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9132 specs
[count
++] = tmpl
;
9139 specs
[count
++] = tmpl
;
9149 /* Handle all CR[REG] resources.
9150 ??? FIXME: The rule 17 isn't really handled correctly. */
9151 if (note
== 0 || note
== 1 || note
== 17)
9153 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9155 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9156 if (regno
== dep
->regindex
)
9158 specs
[count
++] = tmpl
;
9160 else if (!rsrc_write
)
9162 /* Reads from CR[IVR] affect other resources. */
9163 if (regno
== CR_IVR
)
9165 if ((dep
->regindex
>= CR_IRR0
9166 && dep
->regindex
<= CR_IRR3
)
9167 || dep
->regindex
== CR_TPR
)
9169 specs
[count
++] = tmpl
;
9176 specs
[count
++] = tmpl
;
9185 case IA64_RS_INSERVICE
:
9186 /* look for write of EOI (67) or read of IVR (65) */
9187 if ((idesc
->operands
[0] == IA64_OPND_CR3
9188 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9189 || (idesc
->operands
[1] == IA64_OPND_CR3
9190 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9192 specs
[count
++] = tmpl
;
9199 specs
[count
++] = tmpl
;
9210 specs
[count
++] = tmpl
;
9214 /* Check if any of the registers accessed are in the rotating region.
9215 mov to/from pr accesses CFM only when qp_regno is in the rotating
9217 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9219 if (idesc
->operands
[i
] == IA64_OPND_R1
9220 || idesc
->operands
[i
] == IA64_OPND_R2
9221 || idesc
->operands
[i
] == IA64_OPND_R3
)
9223 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9224 /* Assumes that md.rot.num_regs is always valid */
9225 if (md
.rot
.num_regs
> 0
9227 && num
< 31 + md
.rot
.num_regs
)
9229 specs
[count
] = tmpl
;
9230 specs
[count
++].specific
= 0;
9233 else if (idesc
->operands
[i
] == IA64_OPND_F1
9234 || idesc
->operands
[i
] == IA64_OPND_F2
9235 || idesc
->operands
[i
] == IA64_OPND_F3
9236 || idesc
->operands
[i
] == IA64_OPND_F4
)
9238 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9241 specs
[count
] = tmpl
;
9242 specs
[count
++].specific
= 0;
9245 else if (idesc
->operands
[i
] == IA64_OPND_P1
9246 || idesc
->operands
[i
] == IA64_OPND_P2
)
9248 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9251 specs
[count
] = tmpl
;
9252 specs
[count
++].specific
= 0;
9256 if (CURR_SLOT
.qp_regno
> 15)
9258 specs
[count
] = tmpl
;
9259 specs
[count
++].specific
= 0;
9264 /* This is the same as IA64_RS_PRr, except simplified to account for
9265 the fact that there is only one register. */
9269 specs
[count
++] = tmpl
;
9274 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9275 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9276 if (mask
& ((valueT
) 1 << 63))
9277 specs
[count
++] = tmpl
;
9279 else if (note
== 11)
9281 if ((idesc
->operands
[0] == IA64_OPND_P1
9282 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9283 || (idesc
->operands
[1] == IA64_OPND_P2
9284 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9286 specs
[count
++] = tmpl
;
9289 else if (note
== 12)
9291 if (CURR_SLOT
.qp_regno
== 63)
9293 specs
[count
++] = tmpl
;
9300 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9301 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9302 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9303 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9306 && (idesc
->operands
[0] == IA64_OPND_P1
9307 || idesc
->operands
[0] == IA64_OPND_P2
))
9309 specs
[count
] = tmpl
;
9310 specs
[count
++].cmp_type
=
9311 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9314 && (idesc
->operands
[1] == IA64_OPND_P1
9315 || idesc
->operands
[1] == IA64_OPND_P2
))
9317 specs
[count
] = tmpl
;
9318 specs
[count
++].cmp_type
=
9319 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9324 if (CURR_SLOT
.qp_regno
== 63)
9326 specs
[count
++] = tmpl
;
9337 /* FIXME we can identify some individual RSE written resources, but RSE
9338 read resources have not yet been completely identified, so for now
9339 treat RSE as a single resource */
9340 if (strncmp (idesc
->name
, "mov", 3) == 0)
9344 if (idesc
->operands
[0] == IA64_OPND_AR3
9345 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9347 specs
[count
++] = tmpl
;
9352 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9354 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9355 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9357 specs
[count
++] = tmpl
;
9360 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9362 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9363 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9364 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9366 specs
[count
++] = tmpl
;
9373 specs
[count
++] = tmpl
;
9378 /* FIXME -- do any of these need to be non-specific? */
9379 specs
[count
++] = tmpl
;
9383 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9390 /* Clear branch flags on marked resources. This breaks the link between the
9391 QP of the marking instruction and a subsequent branch on the same QP. */
9394 clear_qp_branch_flag (valueT mask
)
9397 for (i
= 0; i
< regdepslen
; i
++)
9399 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9400 if ((bit
& mask
) != 0)
9402 regdeps
[i
].link_to_qp_branch
= 0;
9407 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9408 any mutexes which contain one of the PRs and create new ones when
9412 update_qp_mutex (valueT mask
)
9418 while (i
< qp_mutexeslen
)
9420 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9422 /* If it destroys and creates the same mutex, do nothing. */
9423 if (qp_mutexes
[i
].prmask
== mask
9424 && qp_mutexes
[i
].path
== md
.path
)
9435 fprintf (stderr
, " Clearing mutex relation");
9436 print_prmask (qp_mutexes
[i
].prmask
);
9437 fprintf (stderr
, "\n");
9440 /* Deal with the old mutex with more than 3+ PRs only if
9441 the new mutex on the same execution path with it.
9443 FIXME: The 3+ mutex support is incomplete.
9444 dot_pred_rel () may be a better place to fix it. */
9445 if (qp_mutexes
[i
].path
== md
.path
)
9447 /* If it is a proper subset of the mutex, create a
9450 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9453 qp_mutexes
[i
].prmask
&= ~mask
;
9454 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9456 /* Modify the mutex if there are more than one
9464 /* Remove the mutex. */
9465 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9473 add_qp_mutex (mask
);
9478 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9480 Any changes to a PR clears the mutex relations which include that PR. */
9483 clear_qp_mutex (valueT mask
)
9488 while (i
< qp_mutexeslen
)
9490 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9494 fprintf (stderr
, " Clearing mutex relation");
9495 print_prmask (qp_mutexes
[i
].prmask
);
9496 fprintf (stderr
, "\n");
9498 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9505 /* Clear implies relations which contain PRs in the given masks.
9506 P1_MASK indicates the source of the implies relation, while P2_MASK
9507 indicates the implied PR. */
9510 clear_qp_implies (valueT p1_mask
, valueT p2_mask
)
9515 while (i
< qp_implieslen
)
9517 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9518 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9521 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9522 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9523 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9530 /* Add the PRs specified to the list of implied relations. */
9533 add_qp_imply (int p1
, int p2
)
9539 /* p0 is not meaningful here. */
9540 if (p1
== 0 || p2
== 0)
9546 /* If it exists already, ignore it. */
9547 for (i
= 0; i
< qp_implieslen
; i
++)
9549 if (qp_implies
[i
].p1
== p1
9550 && qp_implies
[i
].p2
== p2
9551 && qp_implies
[i
].path
== md
.path
9552 && !qp_implies
[i
].p2_branched
)
9556 if (qp_implieslen
== qp_impliestotlen
)
9558 qp_impliestotlen
+= 20;
9559 qp_implies
= (struct qp_imply
*)
9560 xrealloc ((void *) qp_implies
,
9561 qp_impliestotlen
* sizeof (struct qp_imply
));
9564 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9565 qp_implies
[qp_implieslen
].p1
= p1
;
9566 qp_implies
[qp_implieslen
].p2
= p2
;
9567 qp_implies
[qp_implieslen
].path
= md
.path
;
9568 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9570 /* Add in the implied transitive relations; for everything that p2 implies,
9571 make p1 imply that, too; for everything that implies p1, make it imply p2
9573 for (i
= 0; i
< qp_implieslen
; i
++)
9575 if (qp_implies
[i
].p1
== p2
)
9576 add_qp_imply (p1
, qp_implies
[i
].p2
);
9577 if (qp_implies
[i
].p2
== p1
)
9578 add_qp_imply (qp_implies
[i
].p1
, p2
);
9580 /* Add in mutex relations implied by this implies relation; for each mutex
9581 relation containing p2, duplicate it and replace p2 with p1. */
9582 bit
= (valueT
) 1 << p1
;
9583 mask
= (valueT
) 1 << p2
;
9584 for (i
= 0; i
< qp_mutexeslen
; i
++)
9586 if (qp_mutexes
[i
].prmask
& mask
)
9587 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9591 /* Add the PRs specified in the mask to the mutex list; this means that only
9592 one of the PRs can be true at any time. PR0 should never be included in
9596 add_qp_mutex (valueT mask
)
9601 if (qp_mutexeslen
== qp_mutexestotlen
)
9603 qp_mutexestotlen
+= 20;
9604 qp_mutexes
= (struct qpmutex
*)
9605 xrealloc ((void *) qp_mutexes
,
9606 qp_mutexestotlen
* sizeof (struct qpmutex
));
9610 fprintf (stderr
, " Registering mutex on");
9611 print_prmask (mask
);
9612 fprintf (stderr
, "\n");
9614 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9615 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9619 has_suffix_p (const char *name
, const char *suffix
)
9621 size_t namelen
= strlen (name
);
9622 size_t sufflen
= strlen (suffix
);
9624 if (namelen
<= sufflen
)
9626 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9630 clear_register_values (void)
9634 fprintf (stderr
, " Clearing register values\n");
9635 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9636 gr_values
[i
].known
= 0;
9639 /* Keep track of register values/changes which affect DV tracking.
9641 optimization note: should add a flag to classes of insns where otherwise we
9642 have to examine a group of strings to identify them. */
9645 note_register_values (struct ia64_opcode
*idesc
)
9647 valueT qp_changemask
= 0;
9650 /* Invalidate values for registers being written to. */
9651 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9653 if (idesc
->operands
[i
] == IA64_OPND_R1
9654 || idesc
->operands
[i
] == IA64_OPND_R2
9655 || idesc
->operands
[i
] == IA64_OPND_R3
)
9657 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9658 if (regno
> 0 && regno
< NELEMS (gr_values
))
9659 gr_values
[regno
].known
= 0;
9661 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9663 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9664 if (regno
> 0 && regno
< 4)
9665 gr_values
[regno
].known
= 0;
9667 else if (idesc
->operands
[i
] == IA64_OPND_P1
9668 || idesc
->operands
[i
] == IA64_OPND_P2
)
9670 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9671 qp_changemask
|= (valueT
) 1 << regno
;
9673 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9675 if (idesc
->operands
[2] & (valueT
) 0x10000)
9676 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9678 qp_changemask
= idesc
->operands
[2];
9681 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9683 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9684 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9686 qp_changemask
= idesc
->operands
[1];
9687 qp_changemask
&= ~(valueT
) 0xFFFF;
9692 /* Always clear qp branch flags on any PR change. */
9693 /* FIXME there may be exceptions for certain compares. */
9694 clear_qp_branch_flag (qp_changemask
);
9696 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9697 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9699 qp_changemask
|= ~(valueT
) 0xFFFF;
9700 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9702 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9703 gr_values
[i
].known
= 0;
9705 clear_qp_mutex (qp_changemask
);
9706 clear_qp_implies (qp_changemask
, qp_changemask
);
9708 /* After a call, all register values are undefined, except those marked
9710 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9711 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9713 /* FIXME keep GR values which are marked as "safe_across_calls" */
9714 clear_register_values ();
9715 clear_qp_mutex (~qp_safe_across_calls
);
9716 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9717 clear_qp_branch_flag (~qp_safe_across_calls
);
9719 else if (is_interruption_or_rfi (idesc
)
9720 || is_taken_branch (idesc
))
9722 clear_register_values ();
9723 clear_qp_mutex (~(valueT
) 0);
9724 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9726 /* Look for mutex and implies relations. */
9727 else if ((idesc
->operands
[0] == IA64_OPND_P1
9728 || idesc
->operands
[0] == IA64_OPND_P2
)
9729 && (idesc
->operands
[1] == IA64_OPND_P1
9730 || idesc
->operands
[1] == IA64_OPND_P2
))
9732 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9733 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9734 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9735 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9737 /* If both PRs are PR0, we can't really do anything. */
9738 if (p1
== 0 && p2
== 0)
9741 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9743 /* In general, clear mutexes and implies which include P1 or P2,
9744 with the following exceptions. */
9745 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9746 || has_suffix_p (idesc
->name
, ".and.orcm"))
9748 clear_qp_implies (p2mask
, p1mask
);
9750 else if (has_suffix_p (idesc
->name
, ".andcm")
9751 || has_suffix_p (idesc
->name
, ".and"))
9753 clear_qp_implies (0, p1mask
| p2mask
);
9755 else if (has_suffix_p (idesc
->name
, ".orcm")
9756 || has_suffix_p (idesc
->name
, ".or"))
9758 clear_qp_mutex (p1mask
| p2mask
);
9759 clear_qp_implies (p1mask
| p2mask
, 0);
9765 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9767 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9768 if (p1
== 0 || p2
== 0)
9769 clear_qp_mutex (p1mask
| p2mask
);
9771 added
= update_qp_mutex (p1mask
| p2mask
);
9773 if (CURR_SLOT
.qp_regno
== 0
9774 || has_suffix_p (idesc
->name
, ".unc"))
9776 if (added
== 0 && p1
&& p2
)
9777 add_qp_mutex (p1mask
| p2mask
);
9778 if (CURR_SLOT
.qp_regno
!= 0)
9781 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9783 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9788 /* Look for mov imm insns into GRs. */
9789 else if (idesc
->operands
[0] == IA64_OPND_R1
9790 && (idesc
->operands
[1] == IA64_OPND_IMM22
9791 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9792 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9793 && (strcmp (idesc
->name
, "mov") == 0
9794 || strcmp (idesc
->name
, "movl") == 0))
9796 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9797 if (regno
> 0 && regno
< NELEMS (gr_values
))
9799 gr_values
[regno
].known
= 1;
9800 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9801 gr_values
[regno
].path
= md
.path
;
9804 fprintf (stderr
, " Know gr%d = ", regno
);
9805 fprintf_vma (stderr
, gr_values
[regno
].value
);
9806 fputs ("\n", stderr
);
9810 /* Look for dep.z imm insns. */
9811 else if (idesc
->operands
[0] == IA64_OPND_R1
9812 && idesc
->operands
[1] == IA64_OPND_IMM8
9813 && strcmp (idesc
->name
, "dep.z") == 0)
9815 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9816 if (regno
> 0 && regno
< NELEMS (gr_values
))
9818 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9820 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9821 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9822 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9823 gr_values
[regno
].known
= 1;
9824 gr_values
[regno
].value
= value
;
9825 gr_values
[regno
].path
= md
.path
;
9828 fprintf (stderr
, " Know gr%d = ", regno
);
9829 fprintf_vma (stderr
, gr_values
[regno
].value
);
9830 fputs ("\n", stderr
);
9836 clear_qp_mutex (qp_changemask
);
9837 clear_qp_implies (qp_changemask
, qp_changemask
);
9841 /* Return whether the given predicate registers are currently mutex. */
9844 qp_mutex (int p1
, int p2
, int path
)
9851 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9852 for (i
= 0; i
< qp_mutexeslen
; i
++)
9854 if (qp_mutexes
[i
].path
>= path
9855 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9862 /* Return whether the given resource is in the given insn's list of chks
9863 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9867 resources_match (struct rsrc
*rs
,
9868 struct ia64_opcode
*idesc
,
9873 struct rsrc specs
[MAX_SPECS
];
9876 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9877 we don't need to check. One exception is note 11, which indicates that
9878 target predicates are written regardless of PR[qp]. */
9879 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9883 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9886 /* UNAT checking is a bit more specific than other resources */
9887 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9888 && specs
[count
].mem_offset
.hint
9889 && rs
->mem_offset
.hint
)
9891 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9893 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9894 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9901 /* Skip apparent PR write conflicts where both writes are an AND or both
9902 writes are an OR. */
9903 if (rs
->dependency
->specifier
== IA64_RS_PR
9904 || rs
->dependency
->specifier
== IA64_RS_PRr
9905 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9907 if (specs
[count
].cmp_type
!= CMP_NONE
9908 && specs
[count
].cmp_type
== rs
->cmp_type
)
9911 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9912 dv_mode
[rs
->dependency
->mode
],
9913 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9914 specs
[count
].index
: 63);
9919 " %s on parallel compare conflict %s vs %s on PR%d\n",
9920 dv_mode
[rs
->dependency
->mode
],
9921 dv_cmp_type
[rs
->cmp_type
],
9922 dv_cmp_type
[specs
[count
].cmp_type
],
9923 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9924 specs
[count
].index
: 63);
9928 /* If either resource is not specific, conservatively assume a conflict
9930 if (!specs
[count
].specific
|| !rs
->specific
)
9932 else if (specs
[count
].index
== rs
->index
)
9939 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9940 insert a stop to create the break. Update all resource dependencies
9941 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9942 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9943 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9947 insn_group_break (int insert_stop
, int qp_regno
, int save_current
)
9951 if (insert_stop
&& md
.num_slots_in_use
> 0)
9952 PREV_SLOT
.end_of_insn_group
= 1;
9956 fprintf (stderr
, " Insn group break%s",
9957 (insert_stop
? " (w/stop)" : ""));
9959 fprintf (stderr
, " effective for QP=%d", qp_regno
);
9960 fprintf (stderr
, "\n");
9964 while (i
< regdepslen
)
9966 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
9969 && regdeps
[i
].qp_regno
!= qp_regno
)
9976 && CURR_SLOT
.src_file
== regdeps
[i
].file
9977 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
9983 /* clear dependencies which are automatically cleared by a stop, or
9984 those that have reached the appropriate state of insn serialization */
9985 if (dep
->semantics
== IA64_DVS_IMPLIED
9986 || dep
->semantics
== IA64_DVS_IMPLIEDF
9987 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
9989 print_dependency ("Removing", i
);
9990 regdeps
[i
] = regdeps
[--regdepslen
];
9994 if (dep
->semantics
== IA64_DVS_DATA
9995 || dep
->semantics
== IA64_DVS_INSTR
9996 || dep
->semantics
== IA64_DVS_SPECIFIC
)
9998 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
9999 regdeps
[i
].insn_srlz
= STATE_STOP
;
10000 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10001 regdeps
[i
].data_srlz
= STATE_STOP
;
10008 /* Add the given resource usage spec to the list of active dependencies. */
10011 mark_resource (struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
,
10012 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
,
10017 if (regdepslen
== regdepstotlen
)
10019 regdepstotlen
+= 20;
10020 regdeps
= (struct rsrc
*)
10021 xrealloc ((void *) regdeps
,
10022 regdepstotlen
* sizeof (struct rsrc
));
10025 regdeps
[regdepslen
] = *spec
;
10026 regdeps
[regdepslen
].depind
= depind
;
10027 regdeps
[regdepslen
].path
= path
;
10028 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10029 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10031 print_dependency ("Adding", regdepslen
);
10037 print_dependency (const char *action
, int depind
)
10041 fprintf (stderr
, " %s %s '%s'",
10042 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10043 (regdeps
[depind
].dependency
)->name
);
10044 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10045 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10046 if (regdeps
[depind
].mem_offset
.hint
)
10048 fputs (" ", stderr
);
10049 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10050 fputs ("+", stderr
);
10051 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10053 fprintf (stderr
, "\n");
10058 instruction_serialization (void)
10062 fprintf (stderr
, " Instruction serialization\n");
10063 for (i
= 0; i
< regdepslen
; i
++)
10064 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10065 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10069 data_serialization (void)
10073 fprintf (stderr
, " Data serialization\n");
10074 while (i
< regdepslen
)
10076 if (regdeps
[i
].data_srlz
== STATE_STOP
10077 /* Note: as of 991210, all "other" dependencies are cleared by a
10078 data serialization. This might change with new tables */
10079 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10081 print_dependency ("Removing", i
);
10082 regdeps
[i
] = regdeps
[--regdepslen
];
10089 /* Insert stops and serializations as needed to avoid DVs. */
10092 remove_marked_resource (struct rsrc
*rs
)
10094 switch (rs
->dependency
->semantics
)
10096 case IA64_DVS_SPECIFIC
:
10098 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10099 /* ...fall through... */
10100 case IA64_DVS_INSTR
:
10102 fprintf (stderr
, "Inserting instr serialization\n");
10103 if (rs
->insn_srlz
< STATE_STOP
)
10104 insn_group_break (1, 0, 0);
10105 if (rs
->insn_srlz
< STATE_SRLZ
)
10107 struct slot oldslot
= CURR_SLOT
;
10108 /* Manually jam a srlz.i insn into the stream */
10109 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10110 CURR_SLOT
.user_template
= -1;
10111 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10112 instruction_serialization ();
10113 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10114 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10115 emit_one_bundle ();
10116 CURR_SLOT
= oldslot
;
10118 insn_group_break (1, 0, 0);
10120 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10121 "other" types of DV are eliminated
10122 by a data serialization */
10123 case IA64_DVS_DATA
:
10125 fprintf (stderr
, "Inserting data serialization\n");
10126 if (rs
->data_srlz
< STATE_STOP
)
10127 insn_group_break (1, 0, 0);
10129 struct slot oldslot
= CURR_SLOT
;
10130 /* Manually jam a srlz.d insn into the stream */
10131 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10132 CURR_SLOT
.user_template
= -1;
10133 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10134 data_serialization ();
10135 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10136 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10137 emit_one_bundle ();
10138 CURR_SLOT
= oldslot
;
10141 case IA64_DVS_IMPLIED
:
10142 case IA64_DVS_IMPLIEDF
:
10144 fprintf (stderr
, "Inserting stop\n");
10145 insn_group_break (1, 0, 0);
10152 /* Check the resources used by the given opcode against the current dependency
10155 The check is run once for each execution path encountered. In this case,
10156 a unique execution path is the sequence of instructions following a code
10157 entry point, e.g. the following has three execution paths, one starting
10158 at L0, one at L1, and one at L2.
10167 check_dependencies (struct ia64_opcode
*idesc
)
10169 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10173 /* Note that the number of marked resources may change within the
10174 loop if in auto mode. */
10176 while (i
< regdepslen
)
10178 struct rsrc
*rs
= ®deps
[i
];
10179 const struct ia64_dependency
*dep
= rs
->dependency
;
10182 int start_over
= 0;
10184 if (dep
->semantics
== IA64_DVS_NONE
10185 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10191 note
= NOTE (opdeps
->chks
[chkind
]);
10193 /* Check this resource against each execution path seen thus far. */
10194 for (path
= 0; path
<= md
.path
; path
++)
10198 /* If the dependency wasn't on the path being checked, ignore it. */
10199 if (rs
->path
< path
)
10202 /* If the QP for this insn implies a QP which has branched, don't
10203 bother checking. Ed. NOTE: I don't think this check is terribly
10204 useful; what's the point of generating code which will only be
10205 reached if its QP is zero?
10206 This code was specifically inserted to handle the following code,
10207 based on notes from Intel's DV checking code, where p1 implies p2.
10213 if (CURR_SLOT
.qp_regno
!= 0)
10217 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10219 if (qp_implies
[implies
].path
>= path
10220 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10221 && qp_implies
[implies
].p2_branched
)
10231 if ((matchtype
= resources_match (rs
, idesc
, note
,
10232 CURR_SLOT
.qp_regno
, path
)) != 0)
10235 char pathmsg
[256] = "";
10236 char indexmsg
[256] = "";
10237 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10240 snprintf (pathmsg
, sizeof (pathmsg
),
10241 " when entry is at label '%s'",
10242 md
.entry_labels
[path
- 1]);
10243 if (matchtype
== 1 && rs
->index
>= 0)
10244 snprintf (indexmsg
, sizeof (indexmsg
),
10245 ", specific resource number is %d",
10247 snprintf (msg
, sizeof (msg
),
10248 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10250 (certain
? "violates" : "may violate"),
10251 dv_mode
[dep
->mode
], dep
->name
,
10252 dv_sem
[dep
->semantics
],
10253 pathmsg
, indexmsg
);
10255 if (md
.explicit_mode
)
10257 as_warn ("%s", msg
);
10258 if (path
< md
.path
)
10259 as_warn (_("Only the first path encountering the conflict is reported"));
10260 as_warn_where (rs
->file
, rs
->line
,
10261 _("This is the location of the conflicting usage"));
10262 /* Don't bother checking other paths, to avoid duplicating
10263 the same warning */
10269 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10271 remove_marked_resource (rs
);
10273 /* since the set of dependencies has changed, start over */
10274 /* FIXME -- since we're removing dvs as we go, we
10275 probably don't really need to start over... */
10288 /* Register new dependencies based on the given opcode. */
10291 mark_resources (struct ia64_opcode
*idesc
)
10294 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10295 int add_only_qp_reads
= 0;
10297 /* A conditional branch only uses its resources if it is taken; if it is
10298 taken, we stop following that path. The other branch types effectively
10299 *always* write their resources. If it's not taken, register only QP
10301 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10303 add_only_qp_reads
= 1;
10307 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10309 for (i
= 0; i
< opdeps
->nregs
; i
++)
10311 const struct ia64_dependency
*dep
;
10312 struct rsrc specs
[MAX_SPECS
];
10317 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10318 note
= NOTE (opdeps
->regs
[i
]);
10320 if (add_only_qp_reads
10321 && !(dep
->mode
== IA64_DV_WAR
10322 && (dep
->specifier
== IA64_RS_PR
10323 || dep
->specifier
== IA64_RS_PRr
10324 || dep
->specifier
== IA64_RS_PR63
)))
10327 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10329 while (count
-- > 0)
10331 mark_resource (idesc
, dep
, &specs
[count
],
10332 DEP (opdeps
->regs
[i
]), md
.path
);
10335 /* The execution path may affect register values, which may in turn
10336 affect which indirect-access resources are accessed. */
10337 switch (dep
->specifier
)
10341 case IA64_RS_CPUID
:
10349 for (path
= 0; path
< md
.path
; path
++)
10351 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10352 while (count
-- > 0)
10353 mark_resource (idesc
, dep
, &specs
[count
],
10354 DEP (opdeps
->regs
[i
]), path
);
10361 /* Remove dependencies when they no longer apply. */
10364 update_dependencies (struct ia64_opcode
*idesc
)
10368 if (strcmp (idesc
->name
, "srlz.i") == 0)
10370 instruction_serialization ();
10372 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10374 data_serialization ();
10376 else if (is_interruption_or_rfi (idesc
)
10377 || is_taken_branch (idesc
))
10379 /* Although technically the taken branch doesn't clear dependencies
10380 which require a srlz.[id], we don't follow the branch; the next
10381 instruction is assumed to start with a clean slate. */
10385 else if (is_conditional_branch (idesc
)
10386 && CURR_SLOT
.qp_regno
!= 0)
10388 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10390 for (i
= 0; i
< qp_implieslen
; i
++)
10392 /* If the conditional branch's predicate is implied by the predicate
10393 in an existing dependency, remove that dependency. */
10394 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10397 /* Note that this implied predicate takes a branch so that if
10398 a later insn generates a DV but its predicate implies this
10399 one, we can avoid the false DV warning. */
10400 qp_implies
[i
].p2_branched
= 1;
10401 while (depind
< regdepslen
)
10403 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10405 print_dependency ("Removing", depind
);
10406 regdeps
[depind
] = regdeps
[--regdepslen
];
10413 /* Any marked resources which have this same predicate should be
10414 cleared, provided that the QP hasn't been modified between the
10415 marking instruction and the branch. */
10418 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10423 while (i
< regdepslen
)
10425 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10426 && regdeps
[i
].link_to_qp_branch
10427 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10428 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10430 /* Treat like a taken branch */
10431 print_dependency ("Removing", i
);
10432 regdeps
[i
] = regdeps
[--regdepslen
];
10441 /* Examine the current instruction for dependency violations. */
10444 check_dv (struct ia64_opcode
*idesc
)
10448 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10449 idesc
->name
, CURR_SLOT
.src_line
,
10450 idesc
->dependencies
->nchks
,
10451 idesc
->dependencies
->nregs
);
10454 /* Look through the list of currently marked resources; if the current
10455 instruction has the dependency in its chks list which uses that resource,
10456 check against the specific resources used. */
10457 check_dependencies (idesc
);
10459 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10460 then add them to the list of marked resources. */
10461 mark_resources (idesc
);
10463 /* There are several types of dependency semantics, and each has its own
10464 requirements for being cleared
10466 Instruction serialization (insns separated by interruption, rfi, or
10467 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10469 Data serialization (instruction serialization, or writer + srlz.d +
10470 reader, where writer and srlz.d are in separate groups) clears
10471 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10472 always be the case).
10474 Instruction group break (groups separated by stop, taken branch,
10475 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10477 update_dependencies (idesc
);
10479 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10480 warning. Keep track of as many as possible that are useful. */
10481 note_register_values (idesc
);
10483 /* We don't need or want this anymore. */
10484 md
.mem_offset
.hint
= 0;
10489 /* Translate one line of assembly. Pseudo ops and labels do not show
10492 md_assemble (char *str
)
10494 char *saved_input_line_pointer
, *mnemonic
;
10495 const struct pseudo_opcode
*pdesc
;
10496 struct ia64_opcode
*idesc
;
10497 unsigned char qp_regno
;
10498 unsigned int flags
;
10501 saved_input_line_pointer
= input_line_pointer
;
10502 input_line_pointer
= str
;
10504 /* extract the opcode (mnemonic): */
10506 mnemonic
= input_line_pointer
;
10507 ch
= get_symbol_end ();
10508 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10511 *input_line_pointer
= ch
;
10512 (*pdesc
->handler
) (pdesc
->arg
);
10516 /* Find the instruction descriptor matching the arguments. */
10518 idesc
= ia64_find_opcode (mnemonic
);
10519 *input_line_pointer
= ch
;
10522 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10526 idesc
= parse_operands (idesc
);
10530 /* Handle the dynamic ops we can handle now: */
10531 if (idesc
->type
== IA64_TYPE_DYN
)
10533 if (strcmp (idesc
->name
, "add") == 0)
10535 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10536 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10540 ia64_free_opcode (idesc
);
10541 idesc
= ia64_find_opcode (mnemonic
);
10543 else if (strcmp (idesc
->name
, "mov") == 0)
10545 enum ia64_opnd opnd1
, opnd2
;
10548 opnd1
= idesc
->operands
[0];
10549 opnd2
= idesc
->operands
[1];
10550 if (opnd1
== IA64_OPND_AR3
)
10552 else if (opnd2
== IA64_OPND_AR3
)
10556 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10558 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10559 mnemonic
= "mov.i";
10560 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10561 mnemonic
= "mov.m";
10569 ia64_free_opcode (idesc
);
10570 idesc
= ia64_find_opcode (mnemonic
);
10571 while (idesc
!= NULL
10572 && (idesc
->operands
[0] != opnd1
10573 || idesc
->operands
[1] != opnd2
))
10574 idesc
= get_next_opcode (idesc
);
10578 else if (strcmp (idesc
->name
, "mov.i") == 0
10579 || strcmp (idesc
->name
, "mov.m") == 0)
10581 enum ia64_opnd opnd1
, opnd2
;
10584 opnd1
= idesc
->operands
[0];
10585 opnd2
= idesc
->operands
[1];
10586 if (opnd1
== IA64_OPND_AR3
)
10588 else if (opnd2
== IA64_OPND_AR3
)
10592 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10595 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10597 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10599 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10600 as_bad (_("AR %d can only be accessed by %c-unit"),
10601 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10605 else if (strcmp (idesc
->name
, "hint.b") == 0)
10611 case hint_b_warning
:
10612 as_warn (_("hint.b may be treated as nop"));
10615 as_bad (_("hint.b shouldn't be used"));
10621 if (md
.qp
.X_op
== O_register
)
10623 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10624 md
.qp
.X_op
= O_absent
;
10627 flags
= idesc
->flags
;
10629 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10631 /* The alignment frag has to end with a stop bit only if the
10632 next instruction after the alignment directive has to be
10633 the first instruction in an instruction group. */
10636 while (align_frag
->fr_type
!= rs_align_code
)
10638 align_frag
= align_frag
->fr_next
;
10642 /* align_frag can be NULL if there are directives in
10644 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10645 align_frag
->tc_frag_data
= 1;
10648 insn_group_break (1, 0, 0);
10652 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10654 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10658 /* Build the instruction. */
10659 CURR_SLOT
.qp_regno
= qp_regno
;
10660 CURR_SLOT
.idesc
= idesc
;
10661 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10662 dwarf2_where (&CURR_SLOT
.debug_line
);
10663 dwarf2_consume_line_info ();
10665 /* Add unwind entries, if there are any. */
10666 if (unwind
.current_entry
)
10668 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10669 unwind
.current_entry
= NULL
;
10671 if (unwind
.pending_saves
)
10673 if (unwind
.pending_saves
->next
)
10675 /* Attach the next pending save to the next slot so that its
10676 slot number will get set correctly. */
10677 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10678 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10681 unwind
.pending_saves
= NULL
;
10683 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10686 /* Check for dependency violations. */
10690 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10691 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10692 emit_one_bundle ();
10694 if ((flags
& IA64_OPCODE_LAST
) != 0)
10695 insn_group_break (1, 0, 0);
10697 md
.last_text_seg
= now_seg
;
10700 input_line_pointer
= saved_input_line_pointer
;
10703 /* Called when symbol NAME cannot be found in the symbol table.
10704 Should be used for dynamic valued symbols only. */
10707 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
10712 /* Called for any expression that can not be recognized. When the
10713 function is called, `input_line_pointer' will point to the start of
10717 md_operand (expressionS
*e
)
10719 switch (*input_line_pointer
)
10722 ++input_line_pointer
;
10723 expression_and_evaluate (e
);
10724 if (*input_line_pointer
!= ']')
10726 as_bad (_("Closing bracket missing"));
10731 if (e
->X_op
!= O_register
10732 || e
->X_add_number
< REG_GR
10733 || e
->X_add_number
> REG_GR
+ 127)
10735 as_bad (_("Index must be a general register"));
10736 e
->X_add_number
= REG_GR
;
10739 ++input_line_pointer
;
10750 ignore_rest_of_line ();
10753 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10754 a section symbol plus some offset. For relocs involving @fptr(),
10755 directives we don't want such adjustments since we need to have the
10756 original symbol's name in the reloc. */
10758 ia64_fix_adjustable (fixS
*fix
)
10760 /* Prevent all adjustments to global symbols */
10761 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10764 switch (fix
->fx_r_type
)
10766 case BFD_RELOC_IA64_FPTR64I
:
10767 case BFD_RELOC_IA64_FPTR32MSB
:
10768 case BFD_RELOC_IA64_FPTR32LSB
:
10769 case BFD_RELOC_IA64_FPTR64MSB
:
10770 case BFD_RELOC_IA64_FPTR64LSB
:
10771 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10772 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10782 ia64_force_relocation (fixS
*fix
)
10784 switch (fix
->fx_r_type
)
10786 case BFD_RELOC_IA64_FPTR64I
:
10787 case BFD_RELOC_IA64_FPTR32MSB
:
10788 case BFD_RELOC_IA64_FPTR32LSB
:
10789 case BFD_RELOC_IA64_FPTR64MSB
:
10790 case BFD_RELOC_IA64_FPTR64LSB
:
10792 case BFD_RELOC_IA64_LTOFF22
:
10793 case BFD_RELOC_IA64_LTOFF64I
:
10794 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10795 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10796 case BFD_RELOC_IA64_PLTOFF22
:
10797 case BFD_RELOC_IA64_PLTOFF64I
:
10798 case BFD_RELOC_IA64_PLTOFF64MSB
:
10799 case BFD_RELOC_IA64_PLTOFF64LSB
:
10801 case BFD_RELOC_IA64_LTOFF22X
:
10802 case BFD_RELOC_IA64_LDXMOV
:
10809 return generic_force_reloc (fix
);
10812 /* Decide from what point a pc-relative relocation is relative to,
10813 relative to the pc-relative fixup. Er, relatively speaking. */
10815 ia64_pcrel_from_section (fixS
*fix
, segT sec
)
10817 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10819 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10826 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10828 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10832 exp
.X_op
= O_pseudo_fixup
;
10833 exp
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10834 exp
.X_add_number
= 0;
10835 exp
.X_add_symbol
= symbol
;
10836 emit_expr (&exp
, size
);
10839 /* This is called whenever some data item (not an instruction) needs a
10840 fixup. We pick the right reloc code depending on the byteorder
10841 currently in effect. */
10843 ia64_cons_fix_new (fragS
*f
, int where
, int nbytes
, expressionS
*exp
)
10845 bfd_reloc_code_real_type code
;
10850 /* There are no reloc for 8 and 16 bit quantities, but we allow
10851 them here since they will work fine as long as the expression
10852 is fully defined at the end of the pass over the source file. */
10853 case 1: code
= BFD_RELOC_8
; break;
10854 case 2: code
= BFD_RELOC_16
; break;
10856 if (target_big_endian
)
10857 code
= BFD_RELOC_IA64_DIR32MSB
;
10859 code
= BFD_RELOC_IA64_DIR32LSB
;
10863 /* In 32-bit mode, data8 could mean function descriptors too. */
10864 if (exp
->X_op
== O_pseudo_fixup
10865 && exp
->X_op_symbol
10866 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10867 && !(md
.flags
& EF_IA_64_ABI64
))
10869 if (target_big_endian
)
10870 code
= BFD_RELOC_IA64_IPLTMSB
;
10872 code
= BFD_RELOC_IA64_IPLTLSB
;
10873 exp
->X_op
= O_symbol
;
10878 if (target_big_endian
)
10879 code
= BFD_RELOC_IA64_DIR64MSB
;
10881 code
= BFD_RELOC_IA64_DIR64LSB
;
10886 if (exp
->X_op
== O_pseudo_fixup
10887 && exp
->X_op_symbol
10888 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10890 if (target_big_endian
)
10891 code
= BFD_RELOC_IA64_IPLTMSB
;
10893 code
= BFD_RELOC_IA64_IPLTLSB
;
10894 exp
->X_op
= O_symbol
;
10900 as_bad (_("Unsupported fixup size %d"), nbytes
);
10901 ignore_rest_of_line ();
10905 if (exp
->X_op
== O_pseudo_fixup
)
10907 exp
->X_op
= O_symbol
;
10908 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10909 /* ??? If code unchanged, unsupported. */
10912 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10913 /* We need to store the byte order in effect in case we're going
10914 to fix an 8 or 16 bit relocation (for which there no real
10915 relocs available). See md_apply_fix(). */
10916 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10919 /* Return the actual relocation we wish to associate with the pseudo
10920 reloc described by SYM and R_TYPE. SYM should be one of the
10921 symbols in the pseudo_func array, or NULL. */
10923 static bfd_reloc_code_real_type
10924 ia64_gen_real_reloc_type (struct symbol
*sym
, bfd_reloc_code_real_type r_type
)
10926 bfd_reloc_code_real_type newr
= 0;
10927 const char *type
= NULL
, *suffix
= "";
10934 switch (S_GET_VALUE (sym
))
10936 case FUNC_FPTR_RELATIVE
:
10939 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_FPTR64I
; break;
10940 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_FPTR32MSB
; break;
10941 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_FPTR32LSB
; break;
10942 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_FPTR64MSB
; break;
10943 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_FPTR64LSB
; break;
10944 default: type
= "FPTR"; break;
10948 case FUNC_GP_RELATIVE
:
10951 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_GPREL22
; break;
10952 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_GPREL64I
; break;
10953 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_GPREL32MSB
; break;
10954 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_GPREL32LSB
; break;
10955 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_GPREL64MSB
; break;
10956 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_GPREL64LSB
; break;
10957 default: type
= "GPREL"; break;
10961 case FUNC_LT_RELATIVE
:
10964 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22
; break;
10965 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_LTOFF64I
; break;
10966 default: type
= "LTOFF"; break;
10970 case FUNC_LT_RELATIVE_X
:
10973 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_LTOFF22X
; break;
10974 default: type
= "LTOFF"; suffix
= "X"; break;
10978 case FUNC_PC_RELATIVE
:
10981 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PCREL22
; break;
10982 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PCREL64I
; break;
10983 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_PCREL32MSB
; break;
10984 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_PCREL32LSB
; break;
10985 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PCREL64MSB
; break;
10986 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PCREL64LSB
; break;
10987 default: type
= "PCREL"; break;
10991 case FUNC_PLT_RELATIVE
:
10994 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_PLTOFF22
; break;
10995 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_PLTOFF64I
; break;
10996 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_PLTOFF64MSB
;break;
10997 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_PLTOFF64LSB
;break;
10998 default: type
= "PLTOFF"; break;
11002 case FUNC_SEC_RELATIVE
:
11005 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SECREL32MSB
;break;
11006 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SECREL32LSB
;break;
11007 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SECREL64MSB
;break;
11008 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SECREL64LSB
;break;
11009 default: type
= "SECREL"; break;
11013 case FUNC_SEG_RELATIVE
:
11016 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_SEGREL32MSB
;break;
11017 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_SEGREL32LSB
;break;
11018 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_SEGREL64MSB
;break;
11019 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_SEGREL64LSB
;break;
11020 default: type
= "SEGREL"; break;
11024 case FUNC_LTV_RELATIVE
:
11027 case BFD_RELOC_IA64_DIR32MSB
: newr
= BFD_RELOC_IA64_LTV32MSB
; break;
11028 case BFD_RELOC_IA64_DIR32LSB
: newr
= BFD_RELOC_IA64_LTV32LSB
; break;
11029 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_LTV64MSB
; break;
11030 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_LTV64LSB
; break;
11031 default: type
= "LTV"; break;
11035 case FUNC_LT_FPTR_RELATIVE
:
11038 case BFD_RELOC_IA64_IMM22
:
11039 newr
= BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11040 case BFD_RELOC_IA64_IMM64
:
11041 newr
= BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11042 case BFD_RELOC_IA64_DIR32MSB
:
11043 newr
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11044 case BFD_RELOC_IA64_DIR32LSB
:
11045 newr
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11046 case BFD_RELOC_IA64_DIR64MSB
:
11047 newr
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11048 case BFD_RELOC_IA64_DIR64LSB
:
11049 newr
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11051 type
= "LTOFF_FPTR"; break;
11055 case FUNC_TP_RELATIVE
:
11058 case BFD_RELOC_IA64_IMM14
: newr
= BFD_RELOC_IA64_TPREL14
; break;
11059 case BFD_RELOC_IA64_IMM22
: newr
= BFD_RELOC_IA64_TPREL22
; break;
11060 case BFD_RELOC_IA64_IMM64
: newr
= BFD_RELOC_IA64_TPREL64I
; break;
11061 case BFD_RELOC_IA64_DIR64MSB
: newr
= BFD_RELOC_IA64_TPREL64MSB
; break;
11062 case BFD_RELOC_IA64_DIR64LSB
: newr
= BFD_RELOC_IA64_TPREL64LSB
; break;
11063 default: type
= "TPREL"; break;
11067 case FUNC_LT_TP_RELATIVE
:
11070 case BFD_RELOC_IA64_IMM22
:
11071 newr
= BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11073 type
= "LTOFF_TPREL"; break;
11077 case FUNC_DTP_MODULE
:
11080 case BFD_RELOC_IA64_DIR64MSB
:
11081 newr
= BFD_RELOC_IA64_DTPMOD64MSB
; break;
11082 case BFD_RELOC_IA64_DIR64LSB
:
11083 newr
= BFD_RELOC_IA64_DTPMOD64LSB
; break;
11085 type
= "DTPMOD"; break;
11089 case FUNC_LT_DTP_MODULE
:
11092 case BFD_RELOC_IA64_IMM22
:
11093 newr
= BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11095 type
= "LTOFF_DTPMOD"; break;
11099 case FUNC_DTP_RELATIVE
:
11102 case BFD_RELOC_IA64_DIR32MSB
:
11103 newr
= BFD_RELOC_IA64_DTPREL32MSB
; break;
11104 case BFD_RELOC_IA64_DIR32LSB
:
11105 newr
= BFD_RELOC_IA64_DTPREL32LSB
; break;
11106 case BFD_RELOC_IA64_DIR64MSB
:
11107 newr
= BFD_RELOC_IA64_DTPREL64MSB
; break;
11108 case BFD_RELOC_IA64_DIR64LSB
:
11109 newr
= BFD_RELOC_IA64_DTPREL64LSB
; break;
11110 case BFD_RELOC_IA64_IMM14
:
11111 newr
= BFD_RELOC_IA64_DTPREL14
; break;
11112 case BFD_RELOC_IA64_IMM22
:
11113 newr
= BFD_RELOC_IA64_DTPREL22
; break;
11114 case BFD_RELOC_IA64_IMM64
:
11115 newr
= BFD_RELOC_IA64_DTPREL64I
; break;
11117 type
= "DTPREL"; break;
11121 case FUNC_LT_DTP_RELATIVE
:
11124 case BFD_RELOC_IA64_IMM22
:
11125 newr
= BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11127 type
= "LTOFF_DTPREL"; break;
11131 case FUNC_IPLT_RELOC
:
11134 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11135 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11136 default: type
= "IPLT"; break;
11141 case FUNC_SLOTCOUNT_RELOC
:
11142 return DUMMY_RELOC_IA64_SLOTCOUNT
;
11159 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11160 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11161 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11162 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11163 case BFD_RELOC_UNUSED
: width
= 13; break;
11164 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11165 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11166 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11170 /* This should be an error, but since previously there wasn't any
11171 diagnostic here, don't make it fail because of this for now. */
11172 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11177 /* Here is where generate the appropriate reloc for pseudo relocation
11180 ia64_validate_fix (fixS
*fix
)
11182 switch (fix
->fx_r_type
)
11184 case BFD_RELOC_IA64_FPTR64I
:
11185 case BFD_RELOC_IA64_FPTR32MSB
:
11186 case BFD_RELOC_IA64_FPTR64LSB
:
11187 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11188 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11189 if (fix
->fx_offset
!= 0)
11190 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11191 _("No addend allowed in @fptr() relocation"));
11199 fix_insn (fixS
*fix
, const struct ia64_operand
*odesc
, valueT value
)
11201 bfd_vma insn
[3], t0
, t1
, control_bits
;
11206 slot
= fix
->fx_where
& 0x3;
11207 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11209 /* Bundles are always in little-endian byte order */
11210 t0
= bfd_getl64 (fixpos
);
11211 t1
= bfd_getl64 (fixpos
+ 8);
11212 control_bits
= t0
& 0x1f;
11213 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11214 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11215 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11218 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11220 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11221 insn
[2] |= (((value
& 0x7f) << 13)
11222 | (((value
>> 7) & 0x1ff) << 27)
11223 | (((value
>> 16) & 0x1f) << 22)
11224 | (((value
>> 21) & 0x1) << 21)
11225 | (((value
>> 63) & 0x1) << 36));
11227 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11229 if (value
& ~0x3fffffffffffffffULL
)
11230 err
= _("integer operand out of range");
11231 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11232 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11234 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11237 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11238 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11239 | (((value
>> 0) & 0xfffff) << 13));
11242 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11245 as_bad_where (fix
->fx_file
, fix
->fx_line
, "%s", err
);
11247 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11248 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11249 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11250 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11253 /* Attempt to simplify or even eliminate a fixup. The return value is
11254 ignored; perhaps it was once meaningful, but now it is historical.
11255 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11257 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11261 md_apply_fix (fixS
*fix
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
11264 valueT value
= *valP
;
11266 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11270 switch (fix
->fx_r_type
)
11272 case BFD_RELOC_IA64_PCREL21B
: break;
11273 case BFD_RELOC_IA64_PCREL21BI
: break;
11274 case BFD_RELOC_IA64_PCREL21F
: break;
11275 case BFD_RELOC_IA64_PCREL21M
: break;
11276 case BFD_RELOC_IA64_PCREL60B
: break;
11277 case BFD_RELOC_IA64_PCREL22
: break;
11278 case BFD_RELOC_IA64_PCREL64I
: break;
11279 case BFD_RELOC_IA64_PCREL32MSB
: break;
11280 case BFD_RELOC_IA64_PCREL32LSB
: break;
11281 case BFD_RELOC_IA64_PCREL64MSB
: break;
11282 case BFD_RELOC_IA64_PCREL64LSB
: break;
11284 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11291 switch ((unsigned) fix
->fx_r_type
)
11293 case BFD_RELOC_UNUSED
:
11294 /* This must be a TAG13 or TAG13b operand. There are no external
11295 relocs defined for them, so we must give an error. */
11296 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11297 _("%s must have a constant value"),
11298 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11302 case BFD_RELOC_IA64_TPREL14
:
11303 case BFD_RELOC_IA64_TPREL22
:
11304 case BFD_RELOC_IA64_TPREL64I
:
11305 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11306 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11307 case BFD_RELOC_IA64_DTPREL14
:
11308 case BFD_RELOC_IA64_DTPREL22
:
11309 case BFD_RELOC_IA64_DTPREL64I
:
11310 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11311 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11315 case DUMMY_RELOC_IA64_SLOTCOUNT
:
11316 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11317 _("cannot resolve @slotcount parameter"));
11326 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11329 if (fix
->fx_r_type
== DUMMY_RELOC_IA64_SLOTCOUNT
)
11331 /* For @slotcount, convert an addresses difference to a slots
11335 v
= (value
>> 4) * 3;
11336 switch (value
& 0x0f)
11350 as_bad (_("invalid @slotcount value"));
11356 if (fix
->tc_fix_data
.bigendian
)
11357 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11359 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11364 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11369 /* Generate the BFD reloc to be stuck in the object file from the
11370 fixup used internally in the assembler. */
11373 tc_gen_reloc (asection
*sec ATTRIBUTE_UNUSED
, fixS
*fixp
)
11377 reloc
= xmalloc (sizeof (*reloc
));
11378 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11379 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11380 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11381 reloc
->addend
= fixp
->fx_offset
;
11382 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11386 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11387 _("Cannot represent %s relocation in object file"),
11388 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11395 /* Turn a string in input_line_pointer into a floating point constant
11396 of type TYPE, and store the appropriate bytes in *LIT. The number
11397 of LITTLENUMS emitted is stored in *SIZE. An error message is
11398 returned, or NULL on OK. */
11400 #define MAX_LITTLENUMS 5
11403 md_atof (int type
, char *lit
, int *size
)
11405 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11435 return _("Unrecognized or unsupported floating point constant");
11437 t
= atof_ieee (input_line_pointer
, type
, words
);
11439 input_line_pointer
= t
;
11441 (*ia64_float_to_chars
) (lit
, words
, prec
);
11445 /* It is 10 byte floating point with 6 byte padding. */
11446 memset (&lit
[10], 0, 6);
11447 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11450 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11455 /* Handle ia64 specific semantics of the align directive. */
11458 ia64_md_do_align (int n ATTRIBUTE_UNUSED
,
11459 const char *fill ATTRIBUTE_UNUSED
,
11460 int len ATTRIBUTE_UNUSED
,
11461 int max ATTRIBUTE_UNUSED
)
11463 if (subseg_text_p (now_seg
))
11464 ia64_flush_insns ();
11467 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11468 of an rs_align_code fragment. */
11471 ia64_handle_align (fragS
*fragp
)
11475 const unsigned char *nop_type
;
11477 if (fragp
->fr_type
!= rs_align_code
)
11480 /* Check if this frag has to end with a stop bit. */
11481 nop_type
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11483 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11484 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11486 /* If no paddings are needed, we check if we need a stop bit. */
11487 if (!bytes
&& fragp
->tc_frag_data
)
11489 if (fragp
->fr_fix
< 16)
11491 /* FIXME: It won't work with
11493 alloc r32=ar.pfs,1,2,4,0
11497 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11498 _("Can't add stop bit to mark end of instruction group"));
11501 /* Bundles are always in little-endian byte order. Make sure
11502 the previous bundle has the stop bit. */
11506 /* Make sure we are on a 16-byte boundary, in case someone has been
11507 putting data into a text section. */
11510 int fix
= bytes
& 15;
11511 memset (p
, 0, fix
);
11514 fragp
->fr_fix
+= fix
;
11517 /* Instruction bundles are always little-endian. */
11518 memcpy (p
, nop_type
, 16);
11519 fragp
->fr_var
= 16;
11523 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11528 number_to_chars_bigendian (lit
, (long) (*words
++),
11529 sizeof (LITTLENUM_TYPE
));
11530 lit
+= sizeof (LITTLENUM_TYPE
);
11535 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11540 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11541 sizeof (LITTLENUM_TYPE
));
11542 lit
+= sizeof (LITTLENUM_TYPE
);
11547 ia64_elf_section_change_hook (void)
11549 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11550 && elf_linked_to_section (now_seg
) == NULL
)
11551 elf_linked_to_section (now_seg
) = text_section
;
11552 dot_byteorder (-1);
11555 /* Check if a label should be made global. */
11557 ia64_check_label (symbolS
*label
)
11559 if (*input_line_pointer
== ':')
11561 S_SET_EXTERNAL (label
);
11562 input_line_pointer
++;
11566 /* Used to remember where .alias and .secalias directives are seen. We
11567 will rename symbol and section names when we are about to output
11568 the relocatable file. */
11571 char *file
; /* The file where the directive is seen. */
11572 unsigned int line
; /* The line number the directive is at. */
11573 const char *name
; /* The original name of the symbol. */
11576 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11577 .secalias. Otherwise, it is .alias. */
11579 dot_alias (int section
)
11581 char *name
, *alias
;
11585 const char *error_string
;
11588 struct hash_control
*ahash
, *nhash
;
11591 name
= input_line_pointer
;
11592 delim
= get_symbol_end ();
11593 end_name
= input_line_pointer
;
11596 if (name
== end_name
)
11598 as_bad (_("expected symbol name"));
11599 ignore_rest_of_line ();
11603 SKIP_WHITESPACE ();
11605 if (*input_line_pointer
!= ',')
11608 as_bad (_("expected comma after \"%s\""), name
);
11610 ignore_rest_of_line ();
11614 input_line_pointer
++;
11616 ia64_canonicalize_symbol_name (name
);
11618 /* We call demand_copy_C_string to check if alias string is valid.
11619 There should be a closing `"' and no `\0' in the string. */
11620 alias
= demand_copy_C_string (&len
);
11623 ignore_rest_of_line ();
11627 /* Make a copy of name string. */
11628 len
= strlen (name
) + 1;
11629 obstack_grow (¬es
, name
, len
);
11630 name
= obstack_finish (¬es
);
11635 ahash
= secalias_hash
;
11636 nhash
= secalias_name_hash
;
11641 ahash
= alias_hash
;
11642 nhash
= alias_name_hash
;
11645 /* Check if alias has been used before. */
11646 h
= (struct alias
*) hash_find (ahash
, alias
);
11649 if (strcmp (h
->name
, name
))
11650 as_bad (_("`%s' is already the alias of %s `%s'"),
11651 alias
, kind
, h
->name
);
11655 /* Check if name already has an alias. */
11656 a
= (const char *) hash_find (nhash
, name
);
11659 if (strcmp (a
, alias
))
11660 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11664 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11665 as_where (&h
->file
, &h
->line
);
11668 error_string
= hash_jam (ahash
, alias
, (void *) h
);
11671 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11672 alias
, kind
, error_string
);
11676 error_string
= hash_jam (nhash
, name
, (void *) alias
);
11679 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11680 alias
, kind
, error_string
);
11682 obstack_free (¬es
, name
);
11683 obstack_free (¬es
, alias
);
11686 demand_empty_rest_of_line ();
11689 /* It renames the original symbol name to its alias. */
11691 do_alias (const char *alias
, void *value
)
11693 struct alias
*h
= (struct alias
*) value
;
11694 symbolS
*sym
= symbol_find (h
->name
);
11699 /* Uses .alias extensively to alias CRTL functions to same with
11700 decc$ prefix. Sometimes function gets optimized away and a
11701 warning results, which should be suppressed. */
11702 if (strncmp (alias
, "decc$", 5) != 0)
11704 as_warn_where (h
->file
, h
->line
,
11705 _("symbol `%s' aliased to `%s' is not used"),
11709 S_SET_NAME (sym
, (char *) alias
);
11712 /* Called from write_object_file. */
11714 ia64_adjust_symtab (void)
11716 hash_traverse (alias_hash
, do_alias
);
11719 /* It renames the original section name to its alias. */
11721 do_secalias (const char *alias
, void *value
)
11723 struct alias
*h
= (struct alias
*) value
;
11724 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11727 as_warn_where (h
->file
, h
->line
,
11728 _("section `%s' aliased to `%s' is not used"),
11734 /* Called from write_object_file. */
11736 ia64_frob_file (void)
11738 hash_traverse (secalias_hash
, do_secalias
);
11742 #define NT_VMS_MHD 1
11743 #define NT_VMS_LNM 2
11745 /* Integrity VMS 8.x identifies it's ELF modules with a standard ELF
11748 /* Manufacture a VMS-like time string. */
11750 get_vms_time (char *Now
)
11756 pnt
= ctime (&timeb
);
11762 sprintf (Now
, "%2s-%3s-%s %s", pnt
+ 8, pnt
+ 4, pnt
+ 20, pnt
+ 11);
11766 ia64_vms_note (void)
11769 asection
*seg
= now_seg
;
11770 subsegT subseg
= now_subseg
;
11771 asection
*secp
= NULL
;
11776 /* Create the .note section. */
11778 secp
= subseg_new (".note", 0);
11779 bfd_set_section_flags (stdoutput
,
11781 SEC_HAS_CONTENTS
| SEC_READONLY
);
11783 /* Module header note (MHD). */
11784 bname
= xstrdup (lbasename (out_file_name
));
11785 if ((p
= strrchr (bname
, '.')))
11788 /* VMS note header is 24 bytes long. */
11789 p
= frag_more (8 + 8 + 8);
11790 number_to_chars_littleendian (p
+ 0, 8, 8);
11791 number_to_chars_littleendian (p
+ 8, 40 + strlen (bname
), 8);
11792 number_to_chars_littleendian (p
+ 16, NT_VMS_MHD
, 8);
11795 strcpy (p
, "IPF/VMS");
11797 p
= frag_more (17 + 17 + strlen (bname
) + 1 + 5);
11799 strcpy (p
+ 17, "24-FEB-2005 15:00");
11802 p
+= strlen (bname
) + 1;
11804 strcpy (p
, "V1.0");
11806 frag_align (3, 0, 0);
11808 /* Language processor name note. */
11809 sprintf (buf
, "GNU assembler version %s (%s) using BFD version %s",
11810 VERSION
, TARGET_ALIAS
, BFD_VERSION_STRING
);
11812 p
= frag_more (8 + 8 + 8);
11813 number_to_chars_littleendian (p
+ 0, 8, 8);
11814 number_to_chars_littleendian (p
+ 8, strlen (buf
) + 1, 8);
11815 number_to_chars_littleendian (p
+ 16, NT_VMS_LNM
, 8);
11818 strcpy (p
, "IPF/VMS");
11820 p
= frag_more (strlen (buf
) + 1);
11823 frag_align (3, 0, 0);
11825 secp
= subseg_new (".vms_display_name_info", 0);
11826 bfd_set_section_flags (stdoutput
,
11828 SEC_HAS_CONTENTS
| SEC_READONLY
);
11830 /* This symbol should be passed on the command line and be variable
11831 according to language. */
11832 sym
= symbol_new ("__gnat_vms_display_name@gnat_demangler_rtl",
11833 absolute_section
, 0, &zero_address_frag
);
11834 symbol_table_insert (sym
);
11835 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
| BSF_DYNAMIC
;
11838 /* Format 3 of VMS demangler Spec. */
11839 number_to_chars_littleendian (p
, 3, 4);
11842 /* Place holder for symbol table index of above symbol. */
11843 number_to_chars_littleendian (p
, -1, 4);
11845 frag_align (3, 0, 0);
11847 /* We probably can't restore the current segment, for there likely
11848 isn't one yet... */
11850 subseg_set (seg
, subseg
);
11853 #endif /* TE_VMS */