1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
132 /* The following pseudo-registers are used for unwind directives only: */
140 DYNREG_GR
= 0, /* dynamic general purpose register */
141 DYNREG_FR
, /* dynamic floating point register */
142 DYNREG_PR
, /* dynamic predicate register */
146 enum operand_match_result
149 OPERAND_OUT_OF_RANGE
,
153 /* On the ia64, we can't know the address of a text label until the
154 instructions are packed into a bundle. To handle this, we keep
155 track of the list of labels that appear in front of each
159 struct label_fix
*next
;
161 bfd_boolean dw2_mark_labels
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";{}";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 /* If X_op is != O_absent, the registername for the instruction's
229 qualifying predicate. If NULL, p0 is assumed for instructions
230 that are predictable. */
233 /* Optimize for which CPU. */
240 /* What to do when hint.b is used. */
252 explicit_mode
: 1, /* which mode we're in */
253 default_explicit_mode
: 1, /* which mode is the default */
254 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
256 keep_pending_output
: 1;
258 /* What to do when something is wrong with unwind directives. */
261 unwind_check_warning
,
265 /* Each bundle consists of up to three instructions. We keep
266 track of four most recent instructions so we can correctly set
267 the end_of_insn_group for the last instruction in a bundle. */
269 int num_slots_in_use
;
273 end_of_insn_group
: 1,
274 manual_bundling_on
: 1,
275 manual_bundling_off
: 1,
276 loc_directive_seen
: 1;
277 signed char user_template
; /* user-selected template, if any */
278 unsigned char qp_regno
; /* qualifying predicate */
279 /* This duplicates a good fraction of "struct fix" but we
280 can't use a "struct fix" instead since we can't call
281 fix_new_exp() until we know the address of the instruction. */
285 bfd_reloc_code_real_type code
;
286 enum ia64_opnd opnd
; /* type of operand in need of fix */
287 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
288 expressionS expr
; /* the value to be inserted */
290 fixup
[2]; /* at most two fixups per insn */
291 struct ia64_opcode
*idesc
;
292 struct label_fix
*label_fixups
;
293 struct label_fix
*tag_fixups
;
294 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
297 unsigned int src_line
;
298 struct dwarf2_line_info debug_line
;
306 struct dynreg
*next
; /* next dynamic register */
308 unsigned short base
; /* the base register number */
309 unsigned short num_regs
; /* # of registers in this set */
311 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
313 flagword flags
; /* ELF-header flags */
316 unsigned hint
:1; /* is this hint currently valid? */
317 bfd_vma offset
; /* mem.offset offset */
318 bfd_vma base
; /* mem.offset base */
321 int path
; /* number of alt. entry points seen */
322 const char **entry_labels
; /* labels of all alternate paths in
323 the current DV-checking block. */
324 int maxpaths
; /* size currently allocated for
327 int pointer_size
; /* size in bytes of a pointer */
328 int pointer_size_shift
; /* shift size of a pointer for alignment */
330 symbolS
*indregsym
[IND_RR
- IND_CPUID
+ 1];
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
381 {"ar.k0", AR_K0
}, {"ar.k1", AR_K0
+ 1},
382 {"ar.k2", AR_K0
+ 2}, {"ar.k3", AR_K0
+ 3},
383 {"ar.k4", AR_K0
+ 4}, {"ar.k5", AR_K0
+ 5},
384 {"ar.k6", AR_K0
+ 6}, {"ar.k7", AR_K7
},
385 {"ar.rsc", AR_RSC
}, {"ar.bsp", AR_BSP
},
386 {"ar.bspstore", AR_BSPSTORE
}, {"ar.rnat", AR_RNAT
},
387 {"ar.fcr", AR_FCR
}, {"ar.eflag", AR_EFLAG
},
388 {"ar.csd", AR_CSD
}, {"ar.ssd", AR_SSD
},
389 {"ar.cflg", AR_CFLG
}, {"ar.fsr", AR_FSR
},
390 {"ar.fir", AR_FIR
}, {"ar.fdr", AR_FDR
},
391 {"ar.ccv", AR_CCV
}, {"ar.unat", AR_UNAT
},
392 {"ar.fpsr", AR_FPSR
}, {"ar.itc", AR_ITC
},
393 {"ar.ruc", AR_RUC
}, {"ar.pfs", AR_PFS
},
394 {"ar.lc", AR_LC
}, {"ar.ec", AR_EC
},
397 /* control registers: */
436 {"cr.gpta", CR_GPTA
},
437 {"cr.ipsr", CR_IPSR
},
441 {"cr.itir", CR_ITIR
},
442 {"cr.iipa", CR_IIPA
},
450 {"cr.irr0", CR_IRR0
},
451 {"cr.irr1", CR_IRR0
+ 1},
452 {"cr.irr2", CR_IRR0
+ 2},
453 {"cr.irr3", CR_IRR3
},
456 {"cr.cmcv", CR_CMCV
},
457 {"cr.lrr0", CR_LRR0
},
466 static const struct const_desc
473 /* PSR constant masks: */
476 {"psr.be", ((valueT
) 1) << 1},
477 {"psr.up", ((valueT
) 1) << 2},
478 {"psr.ac", ((valueT
) 1) << 3},
479 {"psr.mfl", ((valueT
) 1) << 4},
480 {"psr.mfh", ((valueT
) 1) << 5},
482 {"psr.ic", ((valueT
) 1) << 13},
483 {"psr.i", ((valueT
) 1) << 14},
484 {"psr.pk", ((valueT
) 1) << 15},
486 {"psr.dt", ((valueT
) 1) << 17},
487 {"psr.dfl", ((valueT
) 1) << 18},
488 {"psr.dfh", ((valueT
) 1) << 19},
489 {"psr.sp", ((valueT
) 1) << 20},
490 {"psr.pp", ((valueT
) 1) << 21},
491 {"psr.di", ((valueT
) 1) << 22},
492 {"psr.si", ((valueT
) 1) << 23},
493 {"psr.db", ((valueT
) 1) << 24},
494 {"psr.lp", ((valueT
) 1) << 25},
495 {"psr.tb", ((valueT
) 1) << 26},
496 {"psr.rt", ((valueT
) 1) << 27},
497 /* 28-31: reserved */
498 /* 32-33: cpl (current privilege level) */
499 {"psr.is", ((valueT
) 1) << 34},
500 {"psr.mc", ((valueT
) 1) << 35},
501 {"psr.it", ((valueT
) 1) << 36},
502 {"psr.id", ((valueT
) 1) << 37},
503 {"psr.da", ((valueT
) 1) << 38},
504 {"psr.dd", ((valueT
) 1) << 39},
505 {"psr.ss", ((valueT
) 1) << 40},
506 /* 41-42: ri (restart instruction) */
507 {"psr.ed", ((valueT
) 1) << 43},
508 {"psr.bn", ((valueT
) 1) << 44},
511 /* indirect register-sets/memory: */
520 { "CPUID", IND_CPUID
},
521 { "cpuid", IND_CPUID
},
533 /* Pseudo functions used to indicate relocation types (these functions
534 start with an at sign (@). */
556 /* reloc pseudo functions (these must come first!): */
557 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
558 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
559 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
560 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
561 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
562 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
563 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
564 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
565 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
566 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
567 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
568 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
569 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
570 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
571 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
572 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
573 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
575 /* mbtype4 constants: */
576 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
577 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
578 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
579 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
580 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
582 /* fclass constants: */
583 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
584 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
585 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
586 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
587 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
588 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
589 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
590 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
591 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
593 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
595 /* hint constants: */
596 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
598 /* unwind-related constants: */
599 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
600 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
601 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
602 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
603 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
604 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
605 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
607 /* unwind-related registers: */
608 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
611 /* 41-bit nop opcodes (one per unit): */
612 static const bfd_vma nop
[IA64_NUM_UNITS
] =
614 0x0000000000LL
, /* NIL => break 0 */
615 0x0008000000LL
, /* I-unit nop */
616 0x0008000000LL
, /* M-unit nop */
617 0x4000000000LL
, /* B-unit nop */
618 0x0008000000LL
, /* F-unit nop */
619 0x0000000000LL
, /* L-"unit" nop immediate */
620 0x0008000000LL
, /* X-unit nop */
623 /* Can't be `const' as it's passed to input routines (which have the
624 habit of setting temporary sentinels. */
625 static char special_section_name
[][20] =
627 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
628 {".IA_64.unwind"}, {".IA_64.unwind_info"},
629 {".init_array"}, {".fini_array"}
632 /* The best template for a particular sequence of up to three
634 #define N IA64_NUM_TYPES
635 static unsigned char best_template
[N
][N
][N
];
638 /* Resource dependencies currently in effect */
640 int depind
; /* dependency index */
641 const struct ia64_dependency
*dependency
; /* actual dependency */
642 unsigned specific
:1, /* is this a specific bit/regno? */
643 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
644 int index
; /* specific regno/bit within dependency */
645 int note
; /* optional qualifying note (0 if none) */
649 int insn_srlz
; /* current insn serialization state */
650 int data_srlz
; /* current data serialization state */
651 int qp_regno
; /* qualifying predicate for this usage */
652 char *file
; /* what file marked this dependency */
653 unsigned int line
; /* what line marked this dependency */
654 struct mem_offset mem_offset
; /* optional memory offset hint */
655 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
656 int path
; /* corresponding code entry index */
658 static int regdepslen
= 0;
659 static int regdepstotlen
= 0;
660 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
661 static const char *dv_sem
[] = { "none", "implied", "impliedf",
662 "data", "instr", "specific", "stop", "other" };
663 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
665 /* Current state of PR mutexation */
666 static struct qpmutex
{
669 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
670 static int qp_mutexeslen
= 0;
671 static int qp_mutexestotlen
= 0;
672 static valueT qp_safe_across_calls
= 0;
674 /* Current state of PR implications */
675 static struct qp_imply
{
678 unsigned p2_branched
:1;
680 } *qp_implies
= NULL
;
681 static int qp_implieslen
= 0;
682 static int qp_impliestotlen
= 0;
684 /* Keep track of static GR values so that indirect register usage can
685 sometimes be tracked. */
696 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
702 /* Remember the alignment frag. */
703 static fragS
*align_frag
;
705 /* These are the routines required to output the various types of
708 /* A slot_number is a frag address plus the slot index (0-2). We use the
709 frag address here so that if there is a section switch in the middle of
710 a function, then instructions emitted to a different section are not
711 counted. Since there may be more than one frag for a function, this
712 means we also need to keep track of which frag this address belongs to
713 so we can compute inter-frag distances. This also nicely solves the
714 problem with nops emitted for align directives, which can't easily be
715 counted, but can easily be derived from frag sizes. */
717 typedef struct unw_rec_list
{
719 unsigned long slot_number
;
721 struct unw_rec_list
*next
;
724 #define SLOT_NUM_NOT_SET (unsigned)-1
726 /* Linked list of saved prologue counts. A very poor
727 implementation of a map from label numbers to prologue counts. */
728 typedef struct label_prologue_count
730 struct label_prologue_count
*next
;
731 unsigned long label_number
;
732 unsigned int prologue_count
;
733 } label_prologue_count
;
735 typedef struct proc_pending
738 struct proc_pending
*next
;
743 /* Maintain a list of unwind entries for the current function. */
747 /* Any unwind entries that should be attached to the current slot
748 that an insn is being constructed for. */
749 unw_rec_list
*current_entry
;
751 /* These are used to create the unwind table entry for this function. */
752 proc_pending proc_pending
;
753 symbolS
*info
; /* pointer to unwind info */
754 symbolS
*personality_routine
;
756 subsegT saved_text_subseg
;
757 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
759 /* TRUE if processing unwind directives in a prologue region. */
760 unsigned int prologue
: 1;
761 unsigned int prologue_mask
: 4;
762 unsigned int prologue_gr
: 7;
763 unsigned int body
: 1;
764 unsigned int insn
: 1;
765 unsigned int prologue_count
; /* number of .prologues seen so far */
766 /* Prologue counts at previous .label_state directives. */
767 struct label_prologue_count
* saved_prologue_counts
;
769 /* List of split up .save-s. */
770 unw_p_record
*pending_saves
;
773 /* The input value is a negated offset from psp, and specifies an address
774 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
775 must add 16 and divide by 4 to get the encoded value. */
777 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
779 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
781 /* Forward declarations: */
782 static void set_section
PARAMS ((char *name
));
783 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
784 unsigned int, unsigned int));
785 static void dot_align (int);
786 static void dot_radix
PARAMS ((int));
787 static void dot_special_section
PARAMS ((int));
788 static void dot_proc
PARAMS ((int));
789 static void dot_fframe
PARAMS ((int));
790 static void dot_vframe
PARAMS ((int));
791 static void dot_vframesp
PARAMS ((int));
792 static void dot_save
PARAMS ((int));
793 static void dot_restore
PARAMS ((int));
794 static void dot_restorereg
PARAMS ((int));
795 static void dot_handlerdata
PARAMS ((int));
796 static void dot_unwentry
PARAMS ((int));
797 static void dot_altrp
PARAMS ((int));
798 static void dot_savemem
PARAMS ((int));
799 static void dot_saveg
PARAMS ((int));
800 static void dot_savef
PARAMS ((int));
801 static void dot_saveb
PARAMS ((int));
802 static void dot_savegf
PARAMS ((int));
803 static void dot_spill
PARAMS ((int));
804 static void dot_spillreg
PARAMS ((int));
805 static void dot_spillmem
PARAMS ((int));
806 static void dot_label_state
PARAMS ((int));
807 static void dot_copy_state
PARAMS ((int));
808 static void dot_unwabi
PARAMS ((int));
809 static void dot_personality
PARAMS ((int));
810 static void dot_body
PARAMS ((int));
811 static void dot_prologue
PARAMS ((int));
812 static void dot_endp
PARAMS ((int));
813 static void dot_template
PARAMS ((int));
814 static void dot_regstk
PARAMS ((int));
815 static void dot_rot
PARAMS ((int));
816 static void dot_byteorder
PARAMS ((int));
817 static void dot_psr
PARAMS ((int));
818 static void dot_alias
PARAMS ((int));
819 static void dot_ln
PARAMS ((int));
820 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
821 static void dot_xdata
PARAMS ((int));
822 static void stmt_float_cons
PARAMS ((int));
823 static void stmt_cons_ua
PARAMS ((int));
824 static void dot_xfloat_cons
PARAMS ((int));
825 static void dot_xstringer
PARAMS ((int));
826 static void dot_xdata_ua
PARAMS ((int));
827 static void dot_xfloat_cons_ua
PARAMS ((int));
828 static void print_prmask
PARAMS ((valueT mask
));
829 static void dot_pred_rel
PARAMS ((int));
830 static void dot_reg_val
PARAMS ((int));
831 static void dot_serialize
PARAMS ((int));
832 static void dot_dv_mode
PARAMS ((int));
833 static void dot_entry
PARAMS ((int));
834 static void dot_mem_offset
PARAMS ((int));
835 static void add_unwind_entry
PARAMS((unw_rec_list
*, int));
836 static symbolS
*declare_register
PARAMS ((const char *name
, unsigned int regnum
));
837 static void declare_register_set
PARAMS ((const char *, unsigned int, unsigned int));
838 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
839 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
842 static int parse_operand
PARAMS ((expressionS
*, int));
843 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
844 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
845 static void emit_one_bundle
PARAMS ((void));
846 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
847 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
848 bfd_reloc_code_real_type r_type
));
849 static void insn_group_break
PARAMS ((int, int, int));
850 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
851 struct rsrc
*, int depind
, int path
));
852 static void add_qp_mutex
PARAMS((valueT mask
));
853 static void add_qp_imply
PARAMS((int p1
, int p2
));
854 static void clear_qp_branch_flag
PARAMS((valueT mask
));
855 static void clear_qp_mutex
PARAMS((valueT mask
));
856 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
857 static int has_suffix_p
PARAMS((const char *, const char *));
858 static void clear_register_values
PARAMS ((void));
859 static void print_dependency
PARAMS ((const char *action
, int depind
));
860 static void instruction_serialization
PARAMS ((void));
861 static void data_serialization
PARAMS ((void));
862 static void remove_marked_resource
PARAMS ((struct rsrc
*));
863 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
864 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
865 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
866 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
867 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
868 struct ia64_opcode
*, int, struct rsrc
[], int, int));
869 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
870 static void check_dependencies
PARAMS((struct ia64_opcode
*));
871 static void mark_resources
PARAMS((struct ia64_opcode
*));
872 static void update_dependencies
PARAMS((struct ia64_opcode
*));
873 static void note_register_values
PARAMS((struct ia64_opcode
*));
874 static int qp_mutex
PARAMS ((int, int, int));
875 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
876 static void output_vbyte_mem
PARAMS ((int, char *, char *));
877 static void count_output
PARAMS ((int, char *, char *));
878 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
879 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
880 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
881 static void output_P1_format
PARAMS ((vbyte_func
, int));
882 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
883 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
884 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
885 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
886 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
887 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
888 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
889 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
890 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
891 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
892 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
893 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
894 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
895 static char format_ab_reg
PARAMS ((int, int));
896 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
898 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
899 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
901 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
902 static unw_rec_list
*output_endp
PARAMS ((void));
903 static unw_rec_list
*output_prologue
PARAMS ((void));
904 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
905 static unw_rec_list
*output_body
PARAMS ((void));
906 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
907 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
908 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
909 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
910 static unw_rec_list
*output_rp_when
PARAMS ((void));
911 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
912 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
913 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
914 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
915 static unw_rec_list
*output_pfs_when
PARAMS ((void));
916 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
917 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
918 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
919 static unw_rec_list
*output_preds_when
PARAMS ((void));
920 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
921 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
922 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
923 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
924 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
925 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
926 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
927 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
928 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
929 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
930 static unw_rec_list
*output_unat_when
PARAMS ((void));
931 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
932 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
933 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
934 static unw_rec_list
*output_lc_when
PARAMS ((void));
935 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
936 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
937 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
938 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
939 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
940 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
941 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
942 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
943 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
944 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
945 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
946 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
947 static unw_rec_list
*output_bsp_when
PARAMS ((void));
948 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
949 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
950 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
951 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
952 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
953 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
954 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
955 static unw_rec_list
*output_rnat_when
PARAMS ((void));
956 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
957 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
958 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
959 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
960 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
961 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
962 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
963 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int,
965 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int,
967 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
968 unsigned int, unsigned int));
969 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
970 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
971 static int calc_record_size
PARAMS ((unw_rec_list
*));
972 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
973 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
974 unsigned long, fragS
*,
976 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
977 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
978 static int parse_predicate_and_operand
PARAMS ((expressionS
*, unsigned *, const char *));
979 static void convert_expr_to_ab_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
980 static void convert_expr_to_xy_reg
PARAMS ((const expressionS
*, unsigned int *, unsigned int *, const char *, int));
981 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
982 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
983 static void free_saved_prologue_counts
PARAMS ((void));
985 /* Determine if application register REGNUM resides only in the integer
986 unit (as opposed to the memory unit). */
988 ar_is_only_in_integer_unit (int reg
)
991 return reg
>= 64 && reg
<= 111;
994 /* Determine if application register REGNUM resides only in the memory
995 unit (as opposed to the integer unit). */
997 ar_is_only_in_memory_unit (int reg
)
1000 return reg
>= 0 && reg
<= 47;
1003 /* Switch to section NAME and create section if necessary. It's
1004 rather ugly that we have to manipulate input_line_pointer but I
1005 don't see any other way to accomplish the same thing without
1006 changing obj-elf.c (which may be the Right Thing, in the end). */
1011 char *saved_input_line_pointer
;
1013 saved_input_line_pointer
= input_line_pointer
;
1014 input_line_pointer
= name
;
1015 obj_elf_section (0);
1016 input_line_pointer
= saved_input_line_pointer
;
1019 /* Map 's' to SHF_IA_64_SHORT. */
1022 ia64_elf_section_letter (letter
, ptr_msg
)
1027 return SHF_IA_64_SHORT
;
1028 else if (letter
== 'o')
1029 return SHF_LINK_ORDER
;
1031 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1035 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1038 ia64_elf_section_flags (flags
, attr
, type
)
1040 int attr
, type ATTRIBUTE_UNUSED
;
1042 if (attr
& SHF_IA_64_SHORT
)
1043 flags
|= SEC_SMALL_DATA
;
1048 ia64_elf_section_type (str
, len
)
1052 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1054 if (STREQ (ELF_STRING_ia64_unwind_info
))
1055 return SHT_PROGBITS
;
1057 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1058 return SHT_PROGBITS
;
1060 if (STREQ (ELF_STRING_ia64_unwind
))
1061 return SHT_IA_64_UNWIND
;
1063 if (STREQ (ELF_STRING_ia64_unwind_once
))
1064 return SHT_IA_64_UNWIND
;
1066 if (STREQ ("unwind"))
1067 return SHT_IA_64_UNWIND
;
1074 set_regstack (ins
, locs
, outs
, rots
)
1075 unsigned int ins
, locs
, outs
, rots
;
1077 /* Size of frame. */
1080 sof
= ins
+ locs
+ outs
;
1083 as_bad (_("Size of frame exceeds maximum of 96 registers"));
1088 as_warn (_("Size of rotating registers exceeds frame size"));
1091 md
.in
.base
= REG_GR
+ 32;
1092 md
.loc
.base
= md
.in
.base
+ ins
;
1093 md
.out
.base
= md
.loc
.base
+ locs
;
1095 md
.in
.num_regs
= ins
;
1096 md
.loc
.num_regs
= locs
;
1097 md
.out
.num_regs
= outs
;
1098 md
.rot
.num_regs
= rots
;
1105 struct label_fix
*lfix
;
1107 subsegT saved_subseg
;
1111 if (!md
.last_text_seg
)
1114 saved_seg
= now_seg
;
1115 saved_subseg
= now_subseg
;
1117 subseg_set (md
.last_text_seg
, 0);
1119 while (md
.num_slots_in_use
> 0)
1120 emit_one_bundle (); /* force out queued instructions */
1122 /* In case there are labels following the last instruction, resolve
1125 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1127 symbol_set_value_now (lfix
->sym
);
1128 mark
|= lfix
->dw2_mark_labels
;
1132 dwarf2_where (&CURR_SLOT
.debug_line
);
1133 CURR_SLOT
.debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
1134 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT
.debug_line
);
1135 dwarf2_consume_line_info ();
1137 CURR_SLOT
.label_fixups
= 0;
1139 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1140 symbol_set_value_now (lfix
->sym
);
1141 CURR_SLOT
.tag_fixups
= 0;
1143 /* In case there are unwind directives following the last instruction,
1144 resolve those now. We only handle prologue, body, and endp directives
1145 here. Give an error for others. */
1146 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1148 switch (ptr
->r
.type
)
1154 ptr
->slot_number
= (unsigned long) frag_more (0);
1155 ptr
->slot_frag
= frag_now
;
1158 /* Allow any record which doesn't have a "t" field (i.e.,
1159 doesn't relate to a particular instruction). */
1175 as_bad (_("Unwind directive not followed by an instruction."));
1179 unwind
.current_entry
= NULL
;
1181 subseg_set (saved_seg
, saved_subseg
);
1183 if (md
.qp
.X_op
== O_register
)
1184 as_bad (_("qualifying predicate not followed by instruction"));
1188 ia64_do_align (int nbytes
)
1190 char *saved_input_line_pointer
= input_line_pointer
;
1192 input_line_pointer
= "";
1193 s_align_bytes (nbytes
);
1194 input_line_pointer
= saved_input_line_pointer
;
1198 ia64_cons_align (nbytes
)
1203 char *saved_input_line_pointer
= input_line_pointer
;
1204 input_line_pointer
= "";
1205 s_align_bytes (nbytes
);
1206 input_line_pointer
= saved_input_line_pointer
;
1210 /* Output COUNT bytes to a memory location. */
1211 static char *vbyte_mem_ptr
= NULL
;
1214 output_vbyte_mem (count
, ptr
, comment
)
1217 char *comment ATTRIBUTE_UNUSED
;
1220 if (vbyte_mem_ptr
== NULL
)
1225 for (x
= 0; x
< count
; x
++)
1226 *(vbyte_mem_ptr
++) = ptr
[x
];
1229 /* Count the number of bytes required for records. */
1230 static int vbyte_count
= 0;
1232 count_output (count
, ptr
, comment
)
1234 char *ptr ATTRIBUTE_UNUSED
;
1235 char *comment ATTRIBUTE_UNUSED
;
1237 vbyte_count
+= count
;
1241 output_R1_format (f
, rtype
, rlen
)
1243 unw_record_type rtype
;
1250 output_R3_format (f
, rtype
, rlen
);
1256 else if (rtype
!= prologue
)
1257 as_bad (_("record type is not valid"));
1259 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1260 (*f
) (1, &byte
, NULL
);
1264 output_R2_format (f
, mask
, grsave
, rlen
)
1271 mask
= (mask
& 0x0f);
1272 grsave
= (grsave
& 0x7f);
1274 bytes
[0] = (UNW_R2
| (mask
>> 1));
1275 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1276 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1277 (*f
) (count
, bytes
, NULL
);
1281 output_R3_format (f
, rtype
, rlen
)
1283 unw_record_type rtype
;
1290 output_R1_format (f
, rtype
, rlen
);
1296 else if (rtype
!= prologue
)
1297 as_bad (_("record type is not valid"));
1298 bytes
[0] = (UNW_R3
| r
);
1299 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1300 (*f
) (count
+ 1, bytes
, NULL
);
1304 output_P1_format (f
, brmask
)
1309 byte
= UNW_P1
| (brmask
& 0x1f);
1310 (*f
) (1, &byte
, NULL
);
1314 output_P2_format (f
, brmask
, gr
)
1320 brmask
= (brmask
& 0x1f);
1321 bytes
[0] = UNW_P2
| (brmask
>> 1);
1322 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1323 (*f
) (2, bytes
, NULL
);
1327 output_P3_format (f
, rtype
, reg
)
1329 unw_record_type rtype
;
1374 as_bad (_("Invalid record type for P3 format."));
1376 bytes
[0] = (UNW_P3
| (r
>> 1));
1377 bytes
[1] = (((r
& 1) << 7) | reg
);
1378 (*f
) (2, bytes
, NULL
);
1382 output_P4_format (f
, imask
, imask_size
)
1384 unsigned char *imask
;
1385 unsigned long imask_size
;
1388 (*f
) (imask_size
, (char *) imask
, NULL
);
1392 output_P5_format (f
, grmask
, frmask
)
1395 unsigned long frmask
;
1398 grmask
= (grmask
& 0x0f);
1401 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1402 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1403 bytes
[3] = (frmask
& 0x000000ff);
1404 (*f
) (4, bytes
, NULL
);
1408 output_P6_format (f
, rtype
, rmask
)
1410 unw_record_type rtype
;
1416 if (rtype
== gr_mem
)
1418 else if (rtype
!= fr_mem
)
1419 as_bad (_("Invalid record type for format P6"));
1420 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1421 (*f
) (1, &byte
, NULL
);
1425 output_P7_format (f
, rtype
, w1
, w2
)
1427 unw_record_type rtype
;
1434 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1439 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1489 bytes
[0] = (UNW_P7
| r
);
1490 (*f
) (count
, bytes
, NULL
);
1494 output_P8_format (f
, rtype
, t
)
1496 unw_record_type rtype
;
1535 case bspstore_psprel
:
1538 case bspstore_sprel
:
1550 case priunat_when_gr
:
1553 case priunat_psprel
:
1559 case priunat_when_mem
:
1566 count
+= output_leb128 (bytes
+ 2, t
, 0);
1567 (*f
) (count
, bytes
, NULL
);
1571 output_P9_format (f
, grmask
, gr
)
1578 bytes
[1] = (grmask
& 0x0f);
1579 bytes
[2] = (gr
& 0x7f);
1580 (*f
) (3, bytes
, NULL
);
1584 output_P10_format (f
, abi
, context
)
1591 bytes
[1] = (abi
& 0xff);
1592 bytes
[2] = (context
& 0xff);
1593 (*f
) (3, bytes
, NULL
);
1597 output_B1_format (f
, rtype
, label
)
1599 unw_record_type rtype
;
1600 unsigned long label
;
1606 output_B4_format (f
, rtype
, label
);
1609 if (rtype
== copy_state
)
1611 else if (rtype
!= label_state
)
1612 as_bad (_("Invalid record type for format B1"));
1614 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1615 (*f
) (1, &byte
, NULL
);
1619 output_B2_format (f
, ecount
, t
)
1621 unsigned long ecount
;
1628 output_B3_format (f
, ecount
, t
);
1631 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1632 count
+= output_leb128 (bytes
+ 1, t
, 0);
1633 (*f
) (count
, bytes
, NULL
);
1637 output_B3_format (f
, ecount
, t
)
1639 unsigned long ecount
;
1646 output_B2_format (f
, ecount
, t
);
1650 count
+= output_leb128 (bytes
+ 1, t
, 0);
1651 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1652 (*f
) (count
, bytes
, NULL
);
1656 output_B4_format (f
, rtype
, label
)
1658 unw_record_type rtype
;
1659 unsigned long label
;
1666 output_B1_format (f
, rtype
, label
);
1670 if (rtype
== copy_state
)
1672 else if (rtype
!= label_state
)
1673 as_bad (_("Invalid record type for format B1"));
1675 bytes
[0] = (UNW_B4
| (r
<< 3));
1676 count
+= output_leb128 (bytes
+ 1, label
, 0);
1677 (*f
) (count
, bytes
, NULL
);
1681 format_ab_reg (ab
, reg
)
1688 ret
= (ab
<< 5) | reg
;
1693 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1695 unw_record_type rtype
;
1705 if (rtype
== spill_sprel
)
1707 else if (rtype
!= spill_psprel
)
1708 as_bad (_("Invalid record type for format X1"));
1709 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1710 count
+= output_leb128 (bytes
+ 2, t
, 0);
1711 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1712 (*f
) (count
, bytes
, NULL
);
1716 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1725 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1726 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1727 count
+= output_leb128 (bytes
+ 3, t
, 0);
1728 (*f
) (count
, bytes
, NULL
);
1732 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1734 unw_record_type rtype
;
1745 if (rtype
== spill_sprel_p
)
1747 else if (rtype
!= spill_psprel_p
)
1748 as_bad (_("Invalid record type for format X3"));
1749 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1750 bytes
[2] = format_ab_reg (ab
, reg
);
1751 count
+= output_leb128 (bytes
+ 3, t
, 0);
1752 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1753 (*f
) (count
, bytes
, NULL
);
1757 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1767 bytes
[1] = (qp
& 0x3f);
1768 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1769 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1770 count
+= output_leb128 (bytes
+ 4, t
, 0);
1771 (*f
) (count
, bytes
, NULL
);
1774 /* This function checks whether there are any outstanding .save-s and
1775 discards them if so. */
1778 check_pending_save (void)
1780 if (unwind
.pending_saves
)
1782 unw_rec_list
*cur
, *prev
;
1784 as_warn (_("Previous .save incomplete"));
1785 for (cur
= unwind
.list
, prev
= NULL
; cur
; )
1786 if (&cur
->r
.record
.p
== unwind
.pending_saves
)
1789 prev
->next
= cur
->next
;
1791 unwind
.list
= cur
->next
;
1792 if (cur
== unwind
.tail
)
1794 if (cur
== unwind
.current_entry
)
1795 unwind
.current_entry
= cur
->next
;
1796 /* Don't free the first discarded record, it's being used as
1797 terminator for (currently) br_gr and gr_gr processing, and
1798 also prevents leaving a dangling pointer to it in its
1800 cur
->r
.record
.p
.grmask
= 0;
1801 cur
->r
.record
.p
.brmask
= 0;
1802 cur
->r
.record
.p
.frmask
= 0;
1803 prev
= cur
->r
.record
.p
.next
;
1804 cur
->r
.record
.p
.next
= NULL
;
1816 cur
= cur
->r
.record
.p
.next
;
1819 unwind
.pending_saves
= NULL
;
1823 /* This function allocates a record list structure, and initializes fields. */
1825 static unw_rec_list
*
1826 alloc_record (unw_record_type t
)
1829 ptr
= xmalloc (sizeof (*ptr
));
1830 memset (ptr
, 0, sizeof (*ptr
));
1831 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1836 /* Dummy unwind record used for calculating the length of the last prologue or
1839 static unw_rec_list
*
1842 unw_rec_list
*ptr
= alloc_record (endp
);
1846 static unw_rec_list
*
1849 unw_rec_list
*ptr
= alloc_record (prologue
);
1850 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1854 static unw_rec_list
*
1855 output_prologue_gr (saved_mask
, reg
)
1856 unsigned int saved_mask
;
1859 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1860 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1861 ptr
->r
.record
.r
.grmask
= saved_mask
;
1862 ptr
->r
.record
.r
.grsave
= reg
;
1866 static unw_rec_list
*
1869 unw_rec_list
*ptr
= alloc_record (body
);
1873 static unw_rec_list
*
1874 output_mem_stack_f (size
)
1877 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1878 ptr
->r
.record
.p
.size
= size
;
1882 static unw_rec_list
*
1883 output_mem_stack_v ()
1885 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1889 static unw_rec_list
*
1893 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1894 ptr
->r
.record
.p
.r
.gr
= gr
;
1898 static unw_rec_list
*
1899 output_psp_sprel (offset
)
1900 unsigned int offset
;
1902 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1903 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1907 static unw_rec_list
*
1910 unw_rec_list
*ptr
= alloc_record (rp_when
);
1914 static unw_rec_list
*
1918 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1919 ptr
->r
.record
.p
.r
.gr
= gr
;
1923 static unw_rec_list
*
1927 unw_rec_list
*ptr
= alloc_record (rp_br
);
1928 ptr
->r
.record
.p
.r
.br
= br
;
1932 static unw_rec_list
*
1933 output_rp_psprel (offset
)
1934 unsigned int offset
;
1936 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1937 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1941 static unw_rec_list
*
1942 output_rp_sprel (offset
)
1943 unsigned int offset
;
1945 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1946 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1950 static unw_rec_list
*
1953 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1957 static unw_rec_list
*
1961 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1962 ptr
->r
.record
.p
.r
.gr
= gr
;
1966 static unw_rec_list
*
1967 output_pfs_psprel (offset
)
1968 unsigned int offset
;
1970 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1971 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
1975 static unw_rec_list
*
1976 output_pfs_sprel (offset
)
1977 unsigned int offset
;
1979 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1980 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
1984 static unw_rec_list
*
1985 output_preds_when ()
1987 unw_rec_list
*ptr
= alloc_record (preds_when
);
1991 static unw_rec_list
*
1992 output_preds_gr (gr
)
1995 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1996 ptr
->r
.record
.p
.r
.gr
= gr
;
2000 static unw_rec_list
*
2001 output_preds_psprel (offset
)
2002 unsigned int offset
;
2004 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
2005 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2009 static unw_rec_list
*
2010 output_preds_sprel (offset
)
2011 unsigned int offset
;
2013 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
2014 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2018 static unw_rec_list
*
2019 output_fr_mem (mask
)
2022 unw_rec_list
*ptr
= alloc_record (fr_mem
);
2023 unw_rec_list
*cur
= ptr
;
2025 ptr
->r
.record
.p
.frmask
= mask
;
2026 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2029 unw_rec_list
*prev
= cur
;
2031 /* Clear least significant set bit. */
2032 mask
&= ~(mask
& (~mask
+ 1));
2035 cur
= alloc_record (fr_mem
);
2036 cur
->r
.record
.p
.frmask
= mask
;
2037 /* Retain only least significant bit. */
2038 prev
->r
.record
.p
.frmask
^= mask
;
2039 prev
->r
.record
.p
.next
= cur
;
2043 static unw_rec_list
*
2044 output_frgr_mem (gr_mask
, fr_mask
)
2045 unsigned int gr_mask
;
2046 unsigned int fr_mask
;
2048 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
2049 unw_rec_list
*cur
= ptr
;
2051 unwind
.pending_saves
= &cur
->r
.record
.p
;
2052 cur
->r
.record
.p
.frmask
= fr_mask
;
2055 unw_rec_list
*prev
= cur
;
2057 /* Clear least significant set bit. */
2058 fr_mask
&= ~(fr_mask
& (~fr_mask
+ 1));
2059 if (!gr_mask
&& !fr_mask
)
2061 cur
= alloc_record (frgr_mem
);
2062 cur
->r
.record
.p
.frmask
= fr_mask
;
2063 /* Retain only least significant bit. */
2064 prev
->r
.record
.p
.frmask
^= fr_mask
;
2065 prev
->r
.record
.p
.next
= cur
;
2067 cur
->r
.record
.p
.grmask
= gr_mask
;
2070 unw_rec_list
*prev
= cur
;
2072 /* Clear least significant set bit. */
2073 gr_mask
&= ~(gr_mask
& (~gr_mask
+ 1));
2076 cur
= alloc_record (frgr_mem
);
2077 cur
->r
.record
.p
.grmask
= gr_mask
;
2078 /* Retain only least significant bit. */
2079 prev
->r
.record
.p
.grmask
^= gr_mask
;
2080 prev
->r
.record
.p
.next
= cur
;
2084 static unw_rec_list
*
2085 output_gr_gr (mask
, reg
)
2089 unw_rec_list
*ptr
= alloc_record (gr_gr
);
2090 unw_rec_list
*cur
= ptr
;
2092 ptr
->r
.record
.p
.grmask
= mask
;
2093 ptr
->r
.record
.p
.r
.gr
= reg
;
2094 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2097 unw_rec_list
*prev
= cur
;
2099 /* Clear least significant set bit. */
2100 mask
&= ~(mask
& (~mask
+ 1));
2103 cur
= alloc_record (gr_gr
);
2104 cur
->r
.record
.p
.grmask
= mask
;
2105 /* Indicate this record shouldn't be output. */
2106 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2107 /* Retain only least significant bit. */
2108 prev
->r
.record
.p
.grmask
^= mask
;
2109 prev
->r
.record
.p
.next
= cur
;
2113 static unw_rec_list
*
2114 output_gr_mem (mask
)
2117 unw_rec_list
*ptr
= alloc_record (gr_mem
);
2118 unw_rec_list
*cur
= ptr
;
2120 ptr
->r
.record
.p
.grmask
= mask
;
2121 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2124 unw_rec_list
*prev
= cur
;
2126 /* Clear least significant set bit. */
2127 mask
&= ~(mask
& (~mask
+ 1));
2130 cur
= alloc_record (gr_mem
);
2131 cur
->r
.record
.p
.grmask
= mask
;
2132 /* Retain only least significant bit. */
2133 prev
->r
.record
.p
.grmask
^= mask
;
2134 prev
->r
.record
.p
.next
= cur
;
2138 static unw_rec_list
*
2139 output_br_mem (unsigned int mask
)
2141 unw_rec_list
*ptr
= alloc_record (br_mem
);
2142 unw_rec_list
*cur
= ptr
;
2144 ptr
->r
.record
.p
.brmask
= mask
;
2145 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2148 unw_rec_list
*prev
= cur
;
2150 /* Clear least significant set bit. */
2151 mask
&= ~(mask
& (~mask
+ 1));
2154 cur
= alloc_record (br_mem
);
2155 cur
->r
.record
.p
.brmask
= mask
;
2156 /* Retain only least significant bit. */
2157 prev
->r
.record
.p
.brmask
^= mask
;
2158 prev
->r
.record
.p
.next
= cur
;
2162 static unw_rec_list
*
2163 output_br_gr (mask
, reg
)
2167 unw_rec_list
*ptr
= alloc_record (br_gr
);
2168 unw_rec_list
*cur
= ptr
;
2170 ptr
->r
.record
.p
.brmask
= mask
;
2171 ptr
->r
.record
.p
.r
.gr
= reg
;
2172 unwind
.pending_saves
= &ptr
->r
.record
.p
;
2175 unw_rec_list
*prev
= cur
;
2177 /* Clear least significant set bit. */
2178 mask
&= ~(mask
& (~mask
+ 1));
2181 cur
= alloc_record (br_gr
);
2182 cur
->r
.record
.p
.brmask
= mask
;
2183 /* Indicate this record shouldn't be output. */
2184 cur
->r
.record
.p
.r
.gr
= REG_NUM
;
2185 /* Retain only least significant bit. */
2186 prev
->r
.record
.p
.brmask
^= mask
;
2187 prev
->r
.record
.p
.next
= cur
;
2191 static unw_rec_list
*
2192 output_spill_base (offset
)
2193 unsigned int offset
;
2195 unw_rec_list
*ptr
= alloc_record (spill_base
);
2196 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2200 static unw_rec_list
*
2203 unw_rec_list
*ptr
= alloc_record (unat_when
);
2207 static unw_rec_list
*
2211 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2212 ptr
->r
.record
.p
.r
.gr
= gr
;
2216 static unw_rec_list
*
2217 output_unat_psprel (offset
)
2218 unsigned int offset
;
2220 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2221 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2225 static unw_rec_list
*
2226 output_unat_sprel (offset
)
2227 unsigned int offset
;
2229 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2230 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2234 static unw_rec_list
*
2237 unw_rec_list
*ptr
= alloc_record (lc_when
);
2241 static unw_rec_list
*
2245 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2246 ptr
->r
.record
.p
.r
.gr
= gr
;
2250 static unw_rec_list
*
2251 output_lc_psprel (offset
)
2252 unsigned int offset
;
2254 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2255 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2259 static unw_rec_list
*
2260 output_lc_sprel (offset
)
2261 unsigned int offset
;
2263 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2264 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2268 static unw_rec_list
*
2271 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2275 static unw_rec_list
*
2279 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2280 ptr
->r
.record
.p
.r
.gr
= gr
;
2284 static unw_rec_list
*
2285 output_fpsr_psprel (offset
)
2286 unsigned int offset
;
2288 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2289 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2293 static unw_rec_list
*
2294 output_fpsr_sprel (offset
)
2295 unsigned int offset
;
2297 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2298 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2302 static unw_rec_list
*
2303 output_priunat_when_gr ()
2305 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2309 static unw_rec_list
*
2310 output_priunat_when_mem ()
2312 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2316 static unw_rec_list
*
2317 output_priunat_gr (gr
)
2320 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2321 ptr
->r
.record
.p
.r
.gr
= gr
;
2325 static unw_rec_list
*
2326 output_priunat_psprel (offset
)
2327 unsigned int offset
;
2329 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2330 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2334 static unw_rec_list
*
2335 output_priunat_sprel (offset
)
2336 unsigned int offset
;
2338 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2339 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2343 static unw_rec_list
*
2346 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2350 static unw_rec_list
*
2354 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2355 ptr
->r
.record
.p
.r
.gr
= gr
;
2359 static unw_rec_list
*
2360 output_bsp_psprel (offset
)
2361 unsigned int offset
;
2363 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2364 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2368 static unw_rec_list
*
2369 output_bsp_sprel (offset
)
2370 unsigned int offset
;
2372 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2373 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2377 static unw_rec_list
*
2378 output_bspstore_when ()
2380 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2384 static unw_rec_list
*
2385 output_bspstore_gr (gr
)
2388 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2389 ptr
->r
.record
.p
.r
.gr
= gr
;
2393 static unw_rec_list
*
2394 output_bspstore_psprel (offset
)
2395 unsigned int offset
;
2397 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2398 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2402 static unw_rec_list
*
2403 output_bspstore_sprel (offset
)
2404 unsigned int offset
;
2406 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2407 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2411 static unw_rec_list
*
2414 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2418 static unw_rec_list
*
2422 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2423 ptr
->r
.record
.p
.r
.gr
= gr
;
2427 static unw_rec_list
*
2428 output_rnat_psprel (offset
)
2429 unsigned int offset
;
2431 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2432 ptr
->r
.record
.p
.off
.psp
= ENCODED_PSP_OFFSET (offset
);
2436 static unw_rec_list
*
2437 output_rnat_sprel (offset
)
2438 unsigned int offset
;
2440 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2441 ptr
->r
.record
.p
.off
.sp
= offset
/ 4;
2445 static unw_rec_list
*
2446 output_unwabi (abi
, context
)
2448 unsigned long context
;
2450 unw_rec_list
*ptr
= alloc_record (unwabi
);
2451 ptr
->r
.record
.p
.abi
= abi
;
2452 ptr
->r
.record
.p
.context
= context
;
2456 static unw_rec_list
*
2457 output_epilogue (unsigned long ecount
)
2459 unw_rec_list
*ptr
= alloc_record (epilogue
);
2460 ptr
->r
.record
.b
.ecount
= ecount
;
2464 static unw_rec_list
*
2465 output_label_state (unsigned long label
)
2467 unw_rec_list
*ptr
= alloc_record (label_state
);
2468 ptr
->r
.record
.b
.label
= label
;
2472 static unw_rec_list
*
2473 output_copy_state (unsigned long label
)
2475 unw_rec_list
*ptr
= alloc_record (copy_state
);
2476 ptr
->r
.record
.b
.label
= label
;
2480 static unw_rec_list
*
2481 output_spill_psprel (ab
, reg
, offset
, predicate
)
2484 unsigned int offset
;
2485 unsigned int predicate
;
2487 unw_rec_list
*ptr
= alloc_record (predicate
? spill_psprel_p
: spill_psprel
);
2488 ptr
->r
.record
.x
.ab
= ab
;
2489 ptr
->r
.record
.x
.reg
= reg
;
2490 ptr
->r
.record
.x
.where
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2491 ptr
->r
.record
.x
.qp
= predicate
;
2495 static unw_rec_list
*
2496 output_spill_sprel (ab
, reg
, offset
, predicate
)
2499 unsigned int offset
;
2500 unsigned int predicate
;
2502 unw_rec_list
*ptr
= alloc_record (predicate
? spill_sprel_p
: spill_sprel
);
2503 ptr
->r
.record
.x
.ab
= ab
;
2504 ptr
->r
.record
.x
.reg
= reg
;
2505 ptr
->r
.record
.x
.where
.spoff
= offset
/ 4;
2506 ptr
->r
.record
.x
.qp
= predicate
;
2510 static unw_rec_list
*
2511 output_spill_reg (ab
, reg
, targ_reg
, xy
, predicate
)
2514 unsigned int targ_reg
;
2516 unsigned int predicate
;
2518 unw_rec_list
*ptr
= alloc_record (predicate
? spill_reg_p
: spill_reg
);
2519 ptr
->r
.record
.x
.ab
= ab
;
2520 ptr
->r
.record
.x
.reg
= reg
;
2521 ptr
->r
.record
.x
.where
.reg
= targ_reg
;
2522 ptr
->r
.record
.x
.xy
= xy
;
2523 ptr
->r
.record
.x
.qp
= predicate
;
2527 /* Given a unw_rec_list process the correct format with the
2528 specified function. */
2531 process_one_record (ptr
, f
)
2535 unsigned int fr_mask
, gr_mask
;
2537 switch (ptr
->r
.type
)
2539 /* This is a dummy record that takes up no space in the output. */
2547 /* These are taken care of by prologue/prologue_gr. */
2552 if (ptr
->r
.type
== prologue_gr
)
2553 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2554 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2556 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2558 /* Output descriptor(s) for union of register spills (if any). */
2559 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2560 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2563 if ((fr_mask
& ~0xfUL
) == 0)
2564 output_P6_format (f
, fr_mem
, fr_mask
);
2567 output_P5_format (f
, gr_mask
, fr_mask
);
2572 output_P6_format (f
, gr_mem
, gr_mask
);
2573 if (ptr
->r
.record
.r
.mask
.br_mem
)
2574 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2576 /* output imask descriptor if necessary: */
2577 if (ptr
->r
.record
.r
.mask
.i
)
2578 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2579 ptr
->r
.record
.r
.imask_size
);
2583 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2587 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2588 ptr
->r
.record
.p
.size
);
2601 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.r
.gr
);
2604 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.r
.br
);
2607 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.off
.sp
, 0);
2615 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2624 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
, 0);
2634 case bspstore_sprel
:
2636 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.sp
);
2639 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2641 const unw_rec_list
*cur
= ptr
;
2643 gr_mask
= cur
->r
.record
.p
.grmask
;
2644 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2645 gr_mask
|= cur
->r
.record
.p
.grmask
;
2646 output_P9_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2650 if (ptr
->r
.record
.p
.r
.gr
< REG_NUM
)
2652 const unw_rec_list
*cur
= ptr
;
2654 gr_mask
= cur
->r
.record
.p
.brmask
;
2655 while ((cur
= cur
->r
.record
.p
.next
) != NULL
)
2656 gr_mask
|= cur
->r
.record
.p
.brmask
;
2657 output_P2_format (f
, gr_mask
, ptr
->r
.record
.p
.r
.gr
);
2661 as_bad (_("spill_mask record unimplemented."));
2663 case priunat_when_gr
:
2664 case priunat_when_mem
:
2668 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2670 case priunat_psprel
:
2672 case bspstore_psprel
:
2674 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.off
.psp
);
2677 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2680 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2684 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2687 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2688 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2689 ptr
->r
.record
.x
.where
.pspoff
);
2692 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2693 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2694 ptr
->r
.record
.x
.where
.spoff
);
2697 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2698 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2699 ptr
->r
.record
.x
.where
.reg
, ptr
->r
.record
.x
.t
);
2701 case spill_psprel_p
:
2702 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2703 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2704 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.pspoff
);
2707 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2708 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2709 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.where
.spoff
);
2712 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2713 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2714 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.where
.reg
,
2718 as_bad (_("record_type_not_valid"));
2723 /* Given a unw_rec_list list, process all the records with
2724 the specified function. */
2726 process_unw_records (list
, f
)
2731 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2732 process_one_record (ptr
, f
);
2735 /* Determine the size of a record list in bytes. */
2737 calc_record_size (list
)
2741 process_unw_records (list
, count_output
);
2745 /* Return the number of bits set in the input value.
2746 Perhaps this has a better place... */
2747 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2748 # define popcount __builtin_popcount
2751 popcount (unsigned x
)
2753 static const unsigned char popcnt
[16] =
2761 if (x
< NELEMS (popcnt
))
2763 return popcnt
[x
% NELEMS (popcnt
)] + popcount (x
/ NELEMS (popcnt
));
2767 /* Update IMASK bitmask to reflect the fact that one or more registers
2768 of type TYPE are saved starting at instruction with index T. If N
2769 bits are set in REGMASK, it is assumed that instructions T through
2770 T+N-1 save these registers.
2774 1: instruction saves next fp reg
2775 2: instruction saves next general reg
2776 3: instruction saves next branch reg */
2778 set_imask (region
, regmask
, t
, type
)
2779 unw_rec_list
*region
;
2780 unsigned long regmask
;
2784 unsigned char *imask
;
2785 unsigned long imask_size
;
2789 imask
= region
->r
.record
.r
.mask
.i
;
2790 imask_size
= region
->r
.record
.r
.imask_size
;
2793 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2794 imask
= xmalloc (imask_size
);
2795 memset (imask
, 0, imask_size
);
2797 region
->r
.record
.r
.imask_size
= imask_size
;
2798 region
->r
.record
.r
.mask
.i
= imask
;
2802 pos
= 2 * (3 - t
% 4);
2805 if (i
>= imask_size
)
2807 as_bad (_("Ignoring attempt to spill beyond end of region"));
2811 imask
[i
] |= (type
& 0x3) << pos
;
2813 regmask
&= (regmask
- 1);
2823 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2824 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2825 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2829 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2830 unsigned long slot_addr
;
2832 unsigned long first_addr
;
2836 unsigned long index
= 0;
2838 /* First time we are called, the initial address and frag are invalid. */
2839 if (first_addr
== 0)
2842 /* If the two addresses are in different frags, then we need to add in
2843 the remaining size of this frag, and then the entire size of intermediate
2845 while (slot_frag
!= first_frag
)
2847 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2851 /* We can get the final addresses only during and after
2853 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2854 index
+= 3 * ((first_frag
->fr_next
->fr_address
2855 - first_frag
->fr_address
2856 - first_frag
->fr_fix
) >> 4);
2859 /* We don't know what the final addresses will be. We try our
2860 best to estimate. */
2861 switch (first_frag
->fr_type
)
2867 as_fatal (_("Only constant space allocation is supported"));
2873 /* Take alignment into account. Assume the worst case
2874 before relaxation. */
2875 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2879 if (first_frag
->fr_symbol
)
2881 as_fatal (_("Only constant offsets are supported"));
2885 index
+= 3 * (first_frag
->fr_offset
>> 4);
2889 /* Add in the full size of the frag converted to instruction slots. */
2890 index
+= 3 * (first_frag
->fr_fix
>> 4);
2891 /* Subtract away the initial part before first_addr. */
2892 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2893 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2895 /* Move to the beginning of the next frag. */
2896 first_frag
= first_frag
->fr_next
;
2897 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2899 /* This can happen if there is section switching in the middle of a
2900 function, causing the frag chain for the function to be broken.
2901 It is too difficult to recover safely from this problem, so we just
2902 exit with an error. */
2903 if (first_frag
== NULL
)
2904 as_fatal (_("Section switching in code is not supported."));
2907 /* Add in the used part of the last frag. */
2908 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2909 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2913 /* Optimize unwind record directives. */
2915 static unw_rec_list
*
2916 optimize_unw_records (list
)
2922 /* If the only unwind record is ".prologue" or ".prologue" followed
2923 by ".body", then we can optimize the unwind directives away. */
2924 if (list
->r
.type
== prologue
2925 && (list
->next
->r
.type
== endp
2926 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2932 /* Given a complete record list, process any records which have
2933 unresolved fields, (ie length counts for a prologue). After
2934 this has been run, all necessary information should be available
2935 within each record to generate an image. */
2938 fixup_unw_records (list
, before_relax
)
2942 unw_rec_list
*ptr
, *region
= 0;
2943 unsigned long first_addr
= 0, rlen
= 0, t
;
2944 fragS
*first_frag
= 0;
2946 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2948 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2949 as_bad (_(" Insn slot not set in unwind record."));
2950 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2951 first_addr
, first_frag
, before_relax
);
2952 switch (ptr
->r
.type
)
2960 unsigned long last_addr
= 0;
2961 fragS
*last_frag
= NULL
;
2963 first_addr
= ptr
->slot_number
;
2964 first_frag
= ptr
->slot_frag
;
2965 /* Find either the next body/prologue start, or the end of
2966 the function, and determine the size of the region. */
2967 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2968 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2969 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2971 last_addr
= last
->slot_number
;
2972 last_frag
= last
->slot_frag
;
2975 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2977 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2978 if (ptr
->r
.type
== body
)
2979 /* End of region. */
2987 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2989 /* This happens when a memory-stack-less procedure uses a
2990 ".restore sp" directive at the end of a region to pop
2992 ptr
->r
.record
.b
.t
= 0;
3003 case priunat_when_gr
:
3004 case priunat_when_mem
:
3008 ptr
->r
.record
.p
.t
= t
;
3016 case spill_psprel_p
:
3017 ptr
->r
.record
.x
.t
= t
;
3023 as_bad (_("frgr_mem record before region record!"));
3026 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
3027 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
3028 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
3029 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3034 as_bad (_("fr_mem record before region record!"));
3037 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
3038 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
3043 as_bad (_("gr_mem record before region record!"));
3046 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
3047 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3052 as_bad (_("br_mem record before region record!"));
3055 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
3056 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
3062 as_bad (_("gr_gr record before region record!"));
3065 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
3070 as_bad (_("br_gr record before region record!"));
3073 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
3082 /* Estimate the size of a frag before relaxing. We only have one type of frag
3083 to handle here, which is the unwind info frag. */
3086 ia64_estimate_size_before_relax (fragS
*frag
,
3087 asection
*segtype ATTRIBUTE_UNUSED
)
3092 /* ??? This code is identical to the first part of ia64_convert_frag. */
3093 list
= (unw_rec_list
*) frag
->fr_opcode
;
3094 fixup_unw_records (list
, 0);
3096 len
= calc_record_size (list
);
3097 /* pad to pointer-size boundary. */
3098 pad
= len
% md
.pointer_size
;
3100 len
+= md
.pointer_size
- pad
;
3101 /* Add 8 for the header. */
3103 /* Add a pointer for the personality offset. */
3104 if (frag
->fr_offset
)
3105 size
+= md
.pointer_size
;
3107 /* fr_var carries the max_chars that we created the fragment with.
3108 We must, of course, have allocated enough memory earlier. */
3109 assert (frag
->fr_var
>= size
);
3111 return frag
->fr_fix
+ size
;
3114 /* This function converts a rs_machine_dependent variant frag into a
3115 normal fill frag with the unwind image from the the record list. */
3117 ia64_convert_frag (fragS
*frag
)
3123 /* ??? This code is identical to ia64_estimate_size_before_relax. */
3124 list
= (unw_rec_list
*) frag
->fr_opcode
;
3125 fixup_unw_records (list
, 0);
3127 len
= calc_record_size (list
);
3128 /* pad to pointer-size boundary. */
3129 pad
= len
% md
.pointer_size
;
3131 len
+= md
.pointer_size
- pad
;
3132 /* Add 8 for the header. */
3134 /* Add a pointer for the personality offset. */
3135 if (frag
->fr_offset
)
3136 size
+= md
.pointer_size
;
3138 /* fr_var carries the max_chars that we created the fragment with.
3139 We must, of course, have allocated enough memory earlier. */
3140 assert (frag
->fr_var
>= size
);
3142 /* Initialize the header area. fr_offset is initialized with
3143 unwind.personality_routine. */
3144 if (frag
->fr_offset
)
3146 if (md
.flags
& EF_IA_64_ABI64
)
3147 flag_value
= (bfd_vma
) 3 << 32;
3149 /* 32-bit unwind info block. */
3150 flag_value
= (bfd_vma
) 0x1003 << 32;
3155 md_number_to_chars (frag
->fr_literal
,
3156 (((bfd_vma
) 1 << 48) /* Version. */
3157 | flag_value
/* U & E handler flags. */
3158 | (len
/ md
.pointer_size
)), /* Length. */
3161 /* Skip the header. */
3162 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
3163 process_unw_records (list
, output_vbyte_mem
);
3165 /* Fill the padding bytes with zeros. */
3167 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
3168 md
.pointer_size
- pad
);
3170 frag
->fr_fix
+= size
;
3171 frag
->fr_type
= rs_fill
;
3173 frag
->fr_offset
= 0;
3177 parse_predicate_and_operand (e
, qp
, po
)
3182 int sep
= parse_operand (e
, ',');
3184 *qp
= e
->X_add_number
- REG_P
;
3185 if (e
->X_op
!= O_register
|| *qp
> 63)
3187 as_bad (_("First operand to .%s must be a predicate"), po
);
3191 as_warn (_("Pointless use of p0 as first operand to .%s"), po
);
3193 sep
= parse_operand (e
, ',');
3200 convert_expr_to_ab_reg (e
, ab
, regp
, po
, n
)
3201 const expressionS
*e
;
3207 unsigned int reg
= e
->X_add_number
;
3209 *ab
= *regp
= 0; /* Anything valid is good here. */
3211 if (e
->X_op
!= O_register
)
3212 reg
= REG_GR
; /* Anything invalid is good here. */
3214 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
3217 *regp
= reg
- REG_GR
;
3219 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
3220 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
3223 *regp
= reg
- REG_FR
;
3225 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3228 *regp
= reg
- REG_BR
;
3235 case REG_PR
: *regp
= 0; break;
3236 case REG_PSP
: *regp
= 1; break;
3237 case REG_PRIUNAT
: *regp
= 2; break;
3238 case REG_BR
+ 0: *regp
= 3; break;
3239 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3240 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3241 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3242 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3243 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3244 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3245 case REG_AR
+ AR_LC
: *regp
= 10; break;
3248 as_bad (_("Operand %d to .%s must be a preserved register"), n
, po
);
3255 convert_expr_to_xy_reg (e
, xy
, regp
, po
, n
)
3256 const expressionS
*e
;
3262 unsigned int reg
= e
->X_add_number
;
3264 *xy
= *regp
= 0; /* Anything valid is good here. */
3266 if (e
->X_op
!= O_register
)
3267 reg
= REG_GR
; /* Anything invalid is good here. */
3269 if (reg
>= (REG_GR
+ 1) && reg
<= (REG_GR
+ 127))
3272 *regp
= reg
- REG_GR
;
3274 else if (reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 127))
3277 *regp
= reg
- REG_FR
;
3279 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3282 *regp
= reg
- REG_BR
;
3285 as_bad (_("Operand %d to .%s must be a writable register"), n
, po
);
3291 /* The current frag is an alignment frag. */
3292 align_frag
= frag_now
;
3293 s_align_bytes (arg
);
3298 int dummy ATTRIBUTE_UNUSED
;
3305 if (is_it_end_of_statement ())
3307 radix
= input_line_pointer
;
3308 ch
= get_symbol_end ();
3309 ia64_canonicalize_symbol_name (radix
);
3310 if (strcasecmp (radix
, "C"))
3311 as_bad (_("Radix `%s' unsupported or invalid"), radix
);
3312 *input_line_pointer
= ch
;
3313 demand_empty_rest_of_line ();
3316 /* Helper function for .loc directives. If the assembler is not generating
3317 line number info, then we need to remember which instructions have a .loc
3318 directive, and only call dwarf2_gen_line_info for those instructions. */
3323 CURR_SLOT
.loc_directive_seen
= 1;
3324 dwarf2_directive_loc (x
);
3327 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3329 dot_special_section (which
)
3332 set_section ((char *) special_section_name
[which
]);
3335 /* Return -1 for warning and 0 for error. */
3338 unwind_diagnostic (const char * region
, const char *directive
)
3340 if (md
.unwind_check
== unwind_check_warning
)
3342 as_warn (_(".%s outside of %s"), directive
, region
);
3347 as_bad (_(".%s outside of %s"), directive
, region
);
3348 ignore_rest_of_line ();
3353 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3354 a procedure but the unwind directive check is set to warning, 0 if
3355 a directive isn't in a procedure and the unwind directive check is set
3359 in_procedure (const char *directive
)
3361 if (unwind
.proc_pending
.sym
3362 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3364 return unwind_diagnostic ("procedure", directive
);
3367 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3368 a prologue but the unwind directive check is set to warning, 0 if
3369 a directive isn't in a prologue and the unwind directive check is set
3373 in_prologue (const char *directive
)
3375 int in
= in_procedure (directive
);
3377 if (in
> 0 && !unwind
.prologue
)
3378 in
= unwind_diagnostic ("prologue", directive
);
3379 check_pending_save ();
3383 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3384 a body but the unwind directive check is set to warning, 0 if
3385 a directive isn't in a body and the unwind directive check is set
3389 in_body (const char *directive
)
3391 int in
= in_procedure (directive
);
3393 if (in
> 0 && !unwind
.body
)
3394 in
= unwind_diagnostic ("body region", directive
);
3399 add_unwind_entry (ptr
, sep
)
3406 unwind
.tail
->next
= ptr
;
3411 /* The current entry can in fact be a chain of unwind entries. */
3412 if (unwind
.current_entry
== NULL
)
3413 unwind
.current_entry
= ptr
;
3416 /* The current entry can in fact be a chain of unwind entries. */
3417 if (unwind
.current_entry
== NULL
)
3418 unwind
.current_entry
= ptr
;
3422 /* Parse a tag permitted for the current directive. */
3426 ch
= get_symbol_end ();
3427 /* FIXME: For now, just issue a warning that this isn't implemented. */
3434 as_warn (_("Tags on unwind pseudo-ops aren't supported, yet"));
3437 *input_line_pointer
= ch
;
3439 if (sep
!= NOT_A_CHAR
)
3440 demand_empty_rest_of_line ();
3445 int dummy ATTRIBUTE_UNUSED
;
3450 if (!in_prologue ("fframe"))
3453 sep
= parse_operand (&e
, ',');
3455 if (e
.X_op
!= O_constant
)
3457 as_bad (_("First operand to .fframe must be a constant"));
3460 add_unwind_entry (output_mem_stack_f (e
.X_add_number
), sep
);
3465 int dummy ATTRIBUTE_UNUSED
;
3471 if (!in_prologue ("vframe"))
3474 sep
= parse_operand (&e
, ',');
3475 reg
= e
.X_add_number
- REG_GR
;
3476 if (e
.X_op
!= O_register
|| reg
> 127)
3478 as_bad (_("First operand to .vframe must be a general register"));
3481 add_unwind_entry (output_mem_stack_v (), sep
);
3482 if (! (unwind
.prologue_mask
& 2))
3483 add_unwind_entry (output_psp_gr (reg
), NOT_A_CHAR
);
3484 else if (reg
!= unwind
.prologue_gr
3485 + (unsigned) popcount (unwind
.prologue_mask
& (-2 << 1)))
3486 as_warn (_("Operand of .vframe contradicts .prologue"));
3497 as_warn (_(".vframepsp is meaningless, assuming .vframesp was meant"));
3499 if (!in_prologue ("vframesp"))
3502 sep
= parse_operand (&e
, ',');
3503 if (e
.X_op
!= O_constant
)
3505 as_bad (_("Operand to .vframesp must be a constant (sp-relative offset)"));
3508 add_unwind_entry (output_mem_stack_v (), sep
);
3509 add_unwind_entry (output_psp_sprel (e
.X_add_number
), NOT_A_CHAR
);
3514 int dummy ATTRIBUTE_UNUSED
;
3517 unsigned reg1
, reg2
;
3520 if (!in_prologue ("save"))
3523 sep
= parse_operand (&e1
, ',');
3525 sep
= parse_operand (&e2
, ',');
3529 reg1
= e1
.X_add_number
;
3530 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3531 if (e1
.X_op
!= O_register
)
3533 as_bad (_("First operand to .save not a register"));
3534 reg1
= REG_PR
; /* Anything valid is good here. */
3536 reg2
= e2
.X_add_number
- REG_GR
;
3537 if (e2
.X_op
!= O_register
|| reg2
> 127)
3539 as_bad (_("Second operand to .save not a valid register"));
3544 case REG_AR
+ AR_BSP
:
3545 add_unwind_entry (output_bsp_when (), sep
);
3546 add_unwind_entry (output_bsp_gr (reg2
), NOT_A_CHAR
);
3548 case REG_AR
+ AR_BSPSTORE
:
3549 add_unwind_entry (output_bspstore_when (), sep
);
3550 add_unwind_entry (output_bspstore_gr (reg2
), NOT_A_CHAR
);
3552 case REG_AR
+ AR_RNAT
:
3553 add_unwind_entry (output_rnat_when (), sep
);
3554 add_unwind_entry (output_rnat_gr (reg2
), NOT_A_CHAR
);
3556 case REG_AR
+ AR_UNAT
:
3557 add_unwind_entry (output_unat_when (), sep
);
3558 add_unwind_entry (output_unat_gr (reg2
), NOT_A_CHAR
);
3560 case REG_AR
+ AR_FPSR
:
3561 add_unwind_entry (output_fpsr_when (), sep
);
3562 add_unwind_entry (output_fpsr_gr (reg2
), NOT_A_CHAR
);
3564 case REG_AR
+ AR_PFS
:
3565 add_unwind_entry (output_pfs_when (), sep
);
3566 if (! (unwind
.prologue_mask
& 4))
3567 add_unwind_entry (output_pfs_gr (reg2
), NOT_A_CHAR
);
3568 else if (reg2
!= unwind
.prologue_gr
3569 + (unsigned) popcount (unwind
.prologue_mask
& (-4 << 1)))
3570 as_warn (_("Second operand of .save contradicts .prologue"));
3572 case REG_AR
+ AR_LC
:
3573 add_unwind_entry (output_lc_when (), sep
);
3574 add_unwind_entry (output_lc_gr (reg2
), NOT_A_CHAR
);
3577 add_unwind_entry (output_rp_when (), sep
);
3578 if (! (unwind
.prologue_mask
& 8))
3579 add_unwind_entry (output_rp_gr (reg2
), NOT_A_CHAR
);
3580 else if (reg2
!= unwind
.prologue_gr
)
3581 as_warn (_("Second operand of .save contradicts .prologue"));
3584 add_unwind_entry (output_preds_when (), sep
);
3585 if (! (unwind
.prologue_mask
& 1))
3586 add_unwind_entry (output_preds_gr (reg2
), NOT_A_CHAR
);
3587 else if (reg2
!= unwind
.prologue_gr
3588 + (unsigned) popcount (unwind
.prologue_mask
& (-1 << 1)))
3589 as_warn (_("Second operand of .save contradicts .prologue"));
3592 add_unwind_entry (output_priunat_when_gr (), sep
);
3593 add_unwind_entry (output_priunat_gr (reg2
), NOT_A_CHAR
);
3596 as_bad (_("First operand to .save not a valid register"));
3597 add_unwind_entry (NULL
, sep
);
3604 int dummy ATTRIBUTE_UNUSED
;
3607 unsigned long ecount
; /* # of _additional_ regions to pop */
3610 if (!in_body ("restore"))
3613 sep
= parse_operand (&e1
, ',');
3614 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3615 as_bad (_("First operand to .restore must be stack pointer (sp)"));
3621 sep
= parse_operand (&e2
, ',');
3622 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3624 as_bad (_("Second operand to .restore must be a constant >= 0"));
3625 e2
.X_add_number
= 0;
3627 ecount
= e2
.X_add_number
;
3630 ecount
= unwind
.prologue_count
- 1;
3632 if (ecount
>= unwind
.prologue_count
)
3634 as_bad (_("Epilogue count of %lu exceeds number of nested prologues (%u)"),
3635 ecount
+ 1, unwind
.prologue_count
);
3639 add_unwind_entry (output_epilogue (ecount
), sep
);
3641 if (ecount
< unwind
.prologue_count
)
3642 unwind
.prologue_count
-= ecount
+ 1;
3644 unwind
.prologue_count
= 0;
3648 dot_restorereg (pred
)
3651 unsigned int qp
, ab
, reg
;
3654 const char * const po
= pred
? "restorereg.p" : "restorereg";
3656 if (!in_procedure (po
))
3660 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
3663 sep
= parse_operand (&e
, ',');
3666 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
3668 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0, qp
), sep
);
3671 static char *special_linkonce_name
[] =
3673 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3677 start_unwind_section (const segT text_seg
, int sec_index
)
3680 Use a slightly ugly scheme to derive the unwind section names from
3681 the text section name:
3683 text sect. unwind table sect.
3684 name: name: comments:
3685 ---------- ----------------- --------------------------------
3687 .text.foo .IA_64.unwind.text.foo
3688 .foo .IA_64.unwind.foo
3690 .gnu.linkonce.ia64unw.foo
3691 _info .IA_64.unwind_info gas issues error message (ditto)
3692 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3694 This mapping is done so that:
3696 (a) An object file with unwind info only in .text will use
3697 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3698 This follows the letter of the ABI and also ensures backwards
3699 compatibility with older toolchains.
3701 (b) An object file with unwind info in multiple text sections
3702 will use separate unwind sections for each text section.
3703 This allows us to properly set the "sh_info" and "sh_link"
3704 fields in SHT_IA_64_UNWIND as required by the ABI and also
3705 lets GNU ld support programs with multiple segments
3706 containing unwind info (as might be the case for certain
3707 embedded applications).
3709 (c) An error is issued if there would be a name clash.
3712 const char *text_name
, *sec_text_name
;
3714 const char *prefix
= special_section_name
[sec_index
];
3716 size_t prefix_len
, suffix_len
, sec_name_len
;
3718 sec_text_name
= segment_name (text_seg
);
3719 text_name
= sec_text_name
;
3720 if (strncmp (text_name
, "_info", 5) == 0)
3722 as_bad (_("Illegal section name `%s' (causes unwind section name clash)"),
3724 ignore_rest_of_line ();
3727 if (strcmp (text_name
, ".text") == 0)
3730 /* Build the unwind section name by appending the (possibly stripped)
3731 text section name to the unwind prefix. */
3733 if (strncmp (text_name
, ".gnu.linkonce.t.",
3734 sizeof (".gnu.linkonce.t.") - 1) == 0)
3736 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3737 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3740 prefix_len
= strlen (prefix
);
3741 suffix_len
= strlen (suffix
);
3742 sec_name_len
= prefix_len
+ suffix_len
;
3743 sec_name
= alloca (sec_name_len
+ 1);
3744 memcpy (sec_name
, prefix
, prefix_len
);
3745 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3746 sec_name
[sec_name_len
] = '\0';
3748 /* Handle COMDAT group. */
3749 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3750 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3753 size_t len
, group_name_len
;
3754 const char *group_name
= elf_group_name (text_seg
);
3756 if (group_name
== NULL
)
3758 as_bad (_("Group section `%s' has no group signature"),
3760 ignore_rest_of_line ();
3763 /* We have to construct a fake section directive. */
3764 group_name_len
= strlen (group_name
);
3766 + 16 /* ,"aG",@progbits, */
3767 + group_name_len
/* ,group_name */
3770 section
= alloca (len
+ 1);
3771 memcpy (section
, sec_name
, sec_name_len
);
3772 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3773 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3774 memcpy (section
+ len
- 7, ",comdat", 7);
3775 section
[len
] = '\0';
3776 set_section (section
);
3780 set_section (sec_name
);
3781 bfd_set_section_flags (stdoutput
, now_seg
,
3782 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3785 elf_linked_to_section (now_seg
) = text_seg
;
3789 generate_unwind_image (const segT text_seg
)
3794 /* Mark the end of the unwind info, so that we can compute the size of the
3795 last unwind region. */
3796 add_unwind_entry (output_endp (), NOT_A_CHAR
);
3798 /* Force out pending instructions, to make sure all unwind records have
3799 a valid slot_number field. */
3800 ia64_flush_insns ();
3802 /* Generate the unwind record. */
3803 list
= optimize_unw_records (unwind
.list
);
3804 fixup_unw_records (list
, 1);
3805 size
= calc_record_size (list
);
3807 if (size
> 0 || unwind
.force_unwind_entry
)
3809 unwind
.force_unwind_entry
= 0;
3810 /* pad to pointer-size boundary. */
3811 pad
= size
% md
.pointer_size
;
3813 size
+= md
.pointer_size
- pad
;
3814 /* Add 8 for the header. */
3816 /* Add a pointer for the personality offset. */
3817 if (unwind
.personality_routine
)
3818 size
+= md
.pointer_size
;
3821 /* If there are unwind records, switch sections, and output the info. */
3825 bfd_reloc_code_real_type reloc
;
3827 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3829 /* Make sure the section has 4 byte alignment for ILP32 and
3830 8 byte alignment for LP64. */
3831 frag_align (md
.pointer_size_shift
, 0, 0);
3832 record_alignment (now_seg
, md
.pointer_size_shift
);
3834 /* Set expression which points to start of unwind descriptor area. */
3835 unwind
.info
= expr_build_dot ();
3837 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3838 (offsetT
) (long) unwind
.personality_routine
,
3841 /* Add the personality address to the image. */
3842 if (unwind
.personality_routine
!= 0)
3844 exp
.X_op
= O_symbol
;
3845 exp
.X_add_symbol
= unwind
.personality_routine
;
3846 exp
.X_add_number
= 0;
3848 if (md
.flags
& EF_IA_64_BE
)
3850 if (md
.flags
& EF_IA_64_ABI64
)
3851 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3853 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3857 if (md
.flags
& EF_IA_64_ABI64
)
3858 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3860 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3863 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3864 md
.pointer_size
, &exp
, 0, reloc
);
3865 unwind
.personality_routine
= 0;
3869 free_saved_prologue_counts ();
3870 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3874 dot_handlerdata (dummy
)
3875 int dummy ATTRIBUTE_UNUSED
;
3877 if (!in_procedure ("handlerdata"))
3879 unwind
.force_unwind_entry
= 1;
3881 /* Remember which segment we're in so we can switch back after .endp */
3882 unwind
.saved_text_seg
= now_seg
;
3883 unwind
.saved_text_subseg
= now_subseg
;
3885 /* Generate unwind info into unwind-info section and then leave that
3886 section as the currently active one so dataXX directives go into
3887 the language specific data area of the unwind info block. */
3888 generate_unwind_image (now_seg
);
3889 demand_empty_rest_of_line ();
3893 dot_unwentry (dummy
)
3894 int dummy ATTRIBUTE_UNUSED
;
3896 if (!in_procedure ("unwentry"))
3898 unwind
.force_unwind_entry
= 1;
3899 demand_empty_rest_of_line ();
3904 int dummy ATTRIBUTE_UNUSED
;
3909 if (!in_prologue ("altrp"))
3912 parse_operand (&e
, 0);
3913 reg
= e
.X_add_number
- REG_BR
;
3914 if (e
.X_op
!= O_register
|| reg
> 7)
3916 as_bad (_("First operand to .altrp not a valid branch register"));
3919 add_unwind_entry (output_rp_br (reg
), 0);
3923 dot_savemem (psprel
)
3929 const char * const po
= psprel
? "savepsp" : "savesp";
3931 if (!in_prologue (po
))
3934 sep
= parse_operand (&e1
, ',');
3936 sep
= parse_operand (&e2
, ',');
3940 reg1
= e1
.X_add_number
;
3941 val
= e2
.X_add_number
;
3943 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3944 if (e1
.X_op
!= O_register
)
3946 as_bad (_("First operand to .%s not a register"), po
);
3947 reg1
= REG_PR
; /* Anything valid is good here. */
3949 if (e2
.X_op
!= O_constant
)
3951 as_bad (_("Second operand to .%s not a constant"), po
);
3957 case REG_AR
+ AR_BSP
:
3958 add_unwind_entry (output_bsp_when (), sep
);
3959 add_unwind_entry ((psprel
3961 : output_bsp_sprel
) (val
), NOT_A_CHAR
);
3963 case REG_AR
+ AR_BSPSTORE
:
3964 add_unwind_entry (output_bspstore_when (), sep
);
3965 add_unwind_entry ((psprel
3966 ? output_bspstore_psprel
3967 : output_bspstore_sprel
) (val
), NOT_A_CHAR
);
3969 case REG_AR
+ AR_RNAT
:
3970 add_unwind_entry (output_rnat_when (), sep
);
3971 add_unwind_entry ((psprel
3972 ? output_rnat_psprel
3973 : output_rnat_sprel
) (val
), NOT_A_CHAR
);
3975 case REG_AR
+ AR_UNAT
:
3976 add_unwind_entry (output_unat_when (), sep
);
3977 add_unwind_entry ((psprel
3978 ? output_unat_psprel
3979 : output_unat_sprel
) (val
), NOT_A_CHAR
);
3981 case REG_AR
+ AR_FPSR
:
3982 add_unwind_entry (output_fpsr_when (), sep
);
3983 add_unwind_entry ((psprel
3984 ? output_fpsr_psprel
3985 : output_fpsr_sprel
) (val
), NOT_A_CHAR
);
3987 case REG_AR
+ AR_PFS
:
3988 add_unwind_entry (output_pfs_when (), sep
);
3989 add_unwind_entry ((psprel
3991 : output_pfs_sprel
) (val
), NOT_A_CHAR
);
3993 case REG_AR
+ AR_LC
:
3994 add_unwind_entry (output_lc_when (), sep
);
3995 add_unwind_entry ((psprel
3997 : output_lc_sprel
) (val
), NOT_A_CHAR
);
4000 add_unwind_entry (output_rp_when (), sep
);
4001 add_unwind_entry ((psprel
4003 : output_rp_sprel
) (val
), NOT_A_CHAR
);
4006 add_unwind_entry (output_preds_when (), sep
);
4007 add_unwind_entry ((psprel
4008 ? output_preds_psprel
4009 : output_preds_sprel
) (val
), NOT_A_CHAR
);
4012 add_unwind_entry (output_priunat_when_mem (), sep
);
4013 add_unwind_entry ((psprel
4014 ? output_priunat_psprel
4015 : output_priunat_sprel
) (val
), NOT_A_CHAR
);
4018 as_bad (_("First operand to .%s not a valid register"), po
);
4019 add_unwind_entry (NULL
, sep
);
4026 int dummy ATTRIBUTE_UNUSED
;
4032 if (!in_prologue ("save.g"))
4035 sep
= parse_operand (&e
, ',');
4037 grmask
= e
.X_add_number
;
4038 if (e
.X_op
!= O_constant
4039 || e
.X_add_number
<= 0
4040 || e
.X_add_number
> 0xf)
4042 as_bad (_("First operand to .save.g must be a positive 4-bit constant"));
4049 int n
= popcount (grmask
);
4051 parse_operand (&e
, 0);
4052 reg
= e
.X_add_number
- REG_GR
;
4053 if (e
.X_op
!= O_register
|| reg
> 127)
4055 as_bad (_("Second operand to .save.g must be a general register"));
4058 else if (reg
> 128U - n
)
4060 as_bad (_("Second operand to .save.g must be the first of %d general registers"), n
);
4063 add_unwind_entry (output_gr_gr (grmask
, reg
), 0);
4066 add_unwind_entry (output_gr_mem (grmask
), 0);
4071 int dummy ATTRIBUTE_UNUSED
;
4075 if (!in_prologue ("save.f"))
4078 parse_operand (&e
, 0);
4080 if (e
.X_op
!= O_constant
4081 || e
.X_add_number
<= 0
4082 || e
.X_add_number
> 0xfffff)
4084 as_bad (_("Operand to .save.f must be a positive 20-bit constant"));
4087 add_unwind_entry (output_fr_mem (e
.X_add_number
), 0);
4092 int dummy ATTRIBUTE_UNUSED
;
4098 if (!in_prologue ("save.b"))
4101 sep
= parse_operand (&e
, ',');
4103 brmask
= e
.X_add_number
;
4104 if (e
.X_op
!= O_constant
4105 || e
.X_add_number
<= 0
4106 || e
.X_add_number
> 0x1f)
4108 as_bad (_("First operand to .save.b must be a positive 5-bit constant"));
4115 int n
= popcount (brmask
);
4117 parse_operand (&e
, 0);
4118 reg
= e
.X_add_number
- REG_GR
;
4119 if (e
.X_op
!= O_register
|| reg
> 127)
4121 as_bad (_("Second operand to .save.b must be a general register"));
4124 else if (reg
> 128U - n
)
4126 as_bad (_("Second operand to .save.b must be the first of %d general registers"), n
);
4129 add_unwind_entry (output_br_gr (brmask
, reg
), 0);
4132 add_unwind_entry (output_br_mem (brmask
), 0);
4137 int dummy ATTRIBUTE_UNUSED
;
4141 if (!in_prologue ("save.gf"))
4144 if (parse_operand (&e1
, ',') == ',')
4145 parse_operand (&e2
, 0);
4149 if (e1
.X_op
!= O_constant
4150 || e1
.X_add_number
< 0
4151 || e1
.X_add_number
> 0xf)
4153 as_bad (_("First operand to .save.gf must be a non-negative 4-bit constant"));
4155 e1
.X_add_number
= 0;
4157 if (e2
.X_op
!= O_constant
4158 || e2
.X_add_number
< 0
4159 || e2
.X_add_number
> 0xfffff)
4161 as_bad (_("Second operand to .save.gf must be a non-negative 20-bit constant"));
4163 e2
.X_add_number
= 0;
4165 if (e1
.X_op
== O_constant
4166 && e2
.X_op
== O_constant
4167 && e1
.X_add_number
== 0
4168 && e2
.X_add_number
== 0)
4169 as_bad (_("Operands to .save.gf may not be both zero"));
4171 add_unwind_entry (output_frgr_mem (e1
.X_add_number
, e2
.X_add_number
), 0);
4176 int dummy ATTRIBUTE_UNUSED
;
4180 if (!in_prologue ("spill"))
4183 parse_operand (&e
, 0);
4185 if (e
.X_op
!= O_constant
)
4187 as_bad (_("Operand to .spill must be a constant"));
4190 add_unwind_entry (output_spill_base (e
.X_add_number
), 0);
4198 unsigned int qp
, ab
, xy
, reg
, treg
;
4200 const char * const po
= pred
? "spillreg.p" : "spillreg";
4202 if (!in_procedure (po
))
4206 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4209 sep
= parse_operand (&e
, ',');
4212 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4215 sep
= parse_operand (&e
, ',');
4218 convert_expr_to_xy_reg (&e
, &xy
, &treg
, po
, 2 + pred
);
4220 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
, qp
), sep
);
4224 dot_spillmem (psprel
)
4228 int pred
= (psprel
< 0), sep
;
4229 unsigned int qp
, ab
, reg
;
4235 po
= psprel
? "spillpsp.p" : "spillsp.p";
4238 po
= psprel
? "spillpsp" : "spillsp";
4240 if (!in_procedure (po
))
4244 sep
= parse_predicate_and_operand (&e
, &qp
, po
);
4247 sep
= parse_operand (&e
, ',');
4250 convert_expr_to_ab_reg (&e
, &ab
, ®
, po
, 1 + pred
);
4253 sep
= parse_operand (&e
, ',');
4256 if (e
.X_op
!= O_constant
)
4258 as_bad (_("Operand %d to .%s must be a constant"), 2 + pred
, po
);
4263 add_unwind_entry (output_spill_psprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4265 add_unwind_entry (output_spill_sprel (ab
, reg
, e
.X_add_number
, qp
), sep
);
4269 get_saved_prologue_count (lbl
)
4272 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4274 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4278 return lpc
->prologue_count
;
4280 as_bad (_("Missing .label_state %ld"), lbl
);
4285 save_prologue_count (lbl
, count
)
4289 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4291 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4295 lpc
->prologue_count
= count
;
4298 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4300 new_lpc
->next
= unwind
.saved_prologue_counts
;
4301 new_lpc
->label_number
= lbl
;
4302 new_lpc
->prologue_count
= count
;
4303 unwind
.saved_prologue_counts
= new_lpc
;
4308 free_saved_prologue_counts ()
4310 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4311 label_prologue_count
*next
;
4320 unwind
.saved_prologue_counts
= NULL
;
4324 dot_label_state (dummy
)
4325 int dummy ATTRIBUTE_UNUSED
;
4329 if (!in_body ("label_state"))
4332 parse_operand (&e
, 0);
4333 if (e
.X_op
== O_constant
)
4334 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4337 as_bad (_("Operand to .label_state must be a constant"));
4340 add_unwind_entry (output_label_state (e
.X_add_number
), 0);
4344 dot_copy_state (dummy
)
4345 int dummy ATTRIBUTE_UNUSED
;
4349 if (!in_body ("copy_state"))
4352 parse_operand (&e
, 0);
4353 if (e
.X_op
== O_constant
)
4354 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4357 as_bad (_("Operand to .copy_state must be a constant"));
4360 add_unwind_entry (output_copy_state (e
.X_add_number
), 0);
4365 int dummy ATTRIBUTE_UNUSED
;
4370 if (!in_prologue ("unwabi"))
4373 sep
= parse_operand (&e1
, ',');
4375 parse_operand (&e2
, 0);
4379 if (e1
.X_op
!= O_constant
)
4381 as_bad (_("First operand to .unwabi must be a constant"));
4382 e1
.X_add_number
= 0;
4385 if (e2
.X_op
!= O_constant
)
4387 as_bad (_("Second operand to .unwabi must be a constant"));
4388 e2
.X_add_number
= 0;
4391 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
), 0);
4395 dot_personality (dummy
)
4396 int dummy ATTRIBUTE_UNUSED
;
4399 if (!in_procedure ("personality"))
4402 name
= input_line_pointer
;
4403 c
= get_symbol_end ();
4404 p
= input_line_pointer
;
4405 unwind
.personality_routine
= symbol_find_or_make (name
);
4406 unwind
.force_unwind_entry
= 1;
4409 demand_empty_rest_of_line ();
4414 int dummy ATTRIBUTE_UNUSED
;
4418 proc_pending
*pending
, *last_pending
;
4420 if (unwind
.proc_pending
.sym
)
4422 (md
.unwind_check
== unwind_check_warning
4424 : as_bad
) (_("Missing .endp after previous .proc"));
4425 while (unwind
.proc_pending
.next
)
4427 pending
= unwind
.proc_pending
.next
;
4428 unwind
.proc_pending
.next
= pending
->next
;
4432 last_pending
= NULL
;
4434 /* Parse names of main and alternate entry points and mark them as
4435 function symbols: */
4439 name
= input_line_pointer
;
4440 c
= get_symbol_end ();
4441 p
= input_line_pointer
;
4443 as_bad (_("Empty argument of .proc"));
4446 sym
= symbol_find_or_make (name
);
4447 if (S_IS_DEFINED (sym
))
4448 as_bad (_("`%s' was already defined"), name
);
4449 else if (!last_pending
)
4451 unwind
.proc_pending
.sym
= sym
;
4452 last_pending
= &unwind
.proc_pending
;
4456 pending
= xmalloc (sizeof (*pending
));
4458 last_pending
= last_pending
->next
= pending
;
4460 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4464 if (*input_line_pointer
!= ',')
4466 ++input_line_pointer
;
4470 unwind
.proc_pending
.sym
= expr_build_dot ();
4471 last_pending
= &unwind
.proc_pending
;
4473 last_pending
->next
= NULL
;
4474 demand_empty_rest_of_line ();
4477 unwind
.prologue
= 0;
4478 unwind
.prologue_count
= 0;
4481 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4482 unwind
.personality_routine
= 0;
4487 int dummy ATTRIBUTE_UNUSED
;
4489 if (!in_procedure ("body"))
4491 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4492 as_warn (_("Initial .body should precede any instructions"));
4493 check_pending_save ();
4495 unwind
.prologue
= 0;
4496 unwind
.prologue_mask
= 0;
4499 add_unwind_entry (output_body (), 0);
4503 dot_prologue (dummy
)
4504 int dummy ATTRIBUTE_UNUSED
;
4506 unsigned mask
= 0, grsave
= 0;
4508 if (!in_procedure ("prologue"))
4510 if (unwind
.prologue
)
4512 as_bad (_(".prologue within prologue"));
4513 ignore_rest_of_line ();
4516 if (!unwind
.body
&& unwind
.insn
)
4517 as_warn (_("Initial .prologue should precede any instructions"));
4519 if (!is_it_end_of_statement ())
4522 int n
, sep
= parse_operand (&e
, ',');
4524 if (e
.X_op
!= O_constant
4525 || e
.X_add_number
< 0
4526 || e
.X_add_number
> 0xf)
4527 as_bad (_("First operand to .prologue must be a positive 4-bit constant"));
4528 else if (e
.X_add_number
== 0)
4529 as_warn (_("Pointless use of zero first operand to .prologue"));
4531 mask
= e
.X_add_number
;
4532 n
= popcount (mask
);
4535 parse_operand (&e
, 0);
4538 if (e
.X_op
== O_constant
4539 && e
.X_add_number
>= 0
4540 && e
.X_add_number
< 128)
4542 if (md
.unwind_check
== unwind_check_error
)
4543 as_warn (_("Using a constant as second operand to .prologue is deprecated"));
4544 grsave
= e
.X_add_number
;
4546 else if (e
.X_op
!= O_register
4547 || (grsave
= e
.X_add_number
- REG_GR
) > 127)
4549 as_bad (_("Second operand to .prologue must be a general register"));
4552 else if (grsave
> 128U - n
)
4554 as_bad (_("Second operand to .prologue must be the first of %d general registers"), n
);
4561 add_unwind_entry (output_prologue_gr (mask
, grsave
), 0);
4563 add_unwind_entry (output_prologue (), 0);
4565 unwind
.prologue
= 1;
4566 unwind
.prologue_mask
= mask
;
4567 unwind
.prologue_gr
= grsave
;
4569 ++unwind
.prologue_count
;
4574 int dummy ATTRIBUTE_UNUSED
;
4577 int bytes_per_address
;
4580 subsegT saved_subseg
;
4581 proc_pending
*pending
;
4582 int unwind_check
= md
.unwind_check
;
4584 md
.unwind_check
= unwind_check_error
;
4585 if (!in_procedure ("endp"))
4587 md
.unwind_check
= unwind_check
;
4589 if (unwind
.saved_text_seg
)
4591 saved_seg
= unwind
.saved_text_seg
;
4592 saved_subseg
= unwind
.saved_text_subseg
;
4593 unwind
.saved_text_seg
= NULL
;
4597 saved_seg
= now_seg
;
4598 saved_subseg
= now_subseg
;
4601 insn_group_break (1, 0, 0);
4603 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4605 generate_unwind_image (saved_seg
);
4607 if (unwind
.info
|| unwind
.force_unwind_entry
)
4611 subseg_set (md
.last_text_seg
, 0);
4612 proc_end
= expr_build_dot ();
4614 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4616 /* Make sure that section has 4 byte alignment for ILP32 and
4617 8 byte alignment for LP64. */
4618 record_alignment (now_seg
, md
.pointer_size_shift
);
4620 /* Need space for 3 pointers for procedure start, procedure end,
4622 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4623 where
= frag_now_fix () - (3 * md
.pointer_size
);
4624 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4626 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4627 e
.X_op
= O_pseudo_fixup
;
4628 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4630 if (!S_IS_LOCAL (unwind
.proc_pending
.sym
)
4631 && S_IS_DEFINED (unwind
.proc_pending
.sym
))
4632 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_pending
.sym
),
4633 S_GET_VALUE (unwind
.proc_pending
.sym
),
4634 symbol_get_frag (unwind
.proc_pending
.sym
));
4636 e
.X_add_symbol
= unwind
.proc_pending
.sym
;
4637 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4639 e
.X_op
= O_pseudo_fixup
;
4640 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4642 e
.X_add_symbol
= proc_end
;
4643 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4644 bytes_per_address
, &e
);
4648 e
.X_op
= O_pseudo_fixup
;
4649 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4651 e
.X_add_symbol
= unwind
.info
;
4652 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4653 bytes_per_address
, &e
);
4656 subseg_set (saved_seg
, saved_subseg
);
4658 /* Set symbol sizes. */
4659 pending
= &unwind
.proc_pending
;
4660 if (S_GET_NAME (pending
->sym
))
4664 symbolS
*sym
= pending
->sym
;
4666 if (!S_IS_DEFINED (sym
))
4667 as_bad (_("`%s' was not defined within procedure"), S_GET_NAME (sym
));
4668 else if (S_GET_SIZE (sym
) == 0
4669 && symbol_get_obj (sym
)->size
== NULL
)
4671 fragS
*frag
= symbol_get_frag (sym
);
4675 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4676 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4679 symbol_get_obj (sym
)->size
=
4680 (expressionS
*) xmalloc (sizeof (expressionS
));
4681 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4682 symbol_get_obj (sym
)->size
->X_add_symbol
4683 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4684 frag_now_fix (), frag_now
);
4685 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4686 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4690 } while ((pending
= pending
->next
) != NULL
);
4693 /* Parse names of main and alternate entry points. */
4699 name
= input_line_pointer
;
4700 c
= get_symbol_end ();
4701 p
= input_line_pointer
;
4703 (md
.unwind_check
== unwind_check_warning
4705 : as_bad
) (_("Empty argument of .endp"));
4708 symbolS
*sym
= symbol_find (name
);
4710 for (pending
= &unwind
.proc_pending
; pending
; pending
= pending
->next
)
4712 if (sym
== pending
->sym
)
4714 pending
->sym
= NULL
;
4718 if (!sym
|| !pending
)
4719 as_warn (_("`%s' was not specified with previous .proc"), name
);
4723 if (*input_line_pointer
!= ',')
4725 ++input_line_pointer
;
4727 demand_empty_rest_of_line ();
4729 /* Deliberately only checking for the main entry point here; the
4730 language spec even says all arguments to .endp are ignored. */
4731 if (unwind
.proc_pending
.sym
4732 && S_GET_NAME (unwind
.proc_pending
.sym
)
4733 && strcmp (S_GET_NAME (unwind
.proc_pending
.sym
), FAKE_LABEL_NAME
))
4734 as_warn (_("`%s' should be an operand to this .endp"),
4735 S_GET_NAME (unwind
.proc_pending
.sym
));
4736 while (unwind
.proc_pending
.next
)
4738 pending
= unwind
.proc_pending
.next
;
4739 unwind
.proc_pending
.next
= pending
->next
;
4742 unwind
.proc_pending
.sym
= unwind
.info
= NULL
;
4746 dot_template (template)
4749 CURR_SLOT
.user_template
= template;
4754 int dummy ATTRIBUTE_UNUSED
;
4756 int ins
, locs
, outs
, rots
;
4758 if (is_it_end_of_statement ())
4759 ins
= locs
= outs
= rots
= 0;
4762 ins
= get_absolute_expression ();
4763 if (*input_line_pointer
++ != ',')
4765 locs
= get_absolute_expression ();
4766 if (*input_line_pointer
++ != ',')
4768 outs
= get_absolute_expression ();
4769 if (*input_line_pointer
++ != ',')
4771 rots
= get_absolute_expression ();
4773 set_regstack (ins
, locs
, outs
, rots
);
4777 as_bad (_("Comma expected"));
4778 ignore_rest_of_line ();
4786 valueT num_alloced
= 0;
4787 struct dynreg
**drpp
, *dr
;
4788 int ch
, base_reg
= 0;
4794 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4795 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4796 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4800 /* First, remove existing names from hash table. */
4801 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4803 hash_delete (md
.dynreg_hash
, dr
->name
);
4804 /* FIXME: Free dr->name. */
4808 drpp
= &md
.dynreg
[type
];
4811 start
= input_line_pointer
;
4812 ch
= get_symbol_end ();
4813 len
= strlen (ia64_canonicalize_symbol_name (start
));
4814 *input_line_pointer
= ch
;
4817 if (*input_line_pointer
!= '[')
4819 as_bad (_("Expected '['"));
4822 ++input_line_pointer
; /* skip '[' */
4824 num_regs
= get_absolute_expression ();
4826 if (*input_line_pointer
++ != ']')
4828 as_bad (_("Expected ']'"));
4833 as_bad (_("Number of elements must be positive"));
4838 num_alloced
+= num_regs
;
4842 if (num_alloced
> md
.rot
.num_regs
)
4844 as_bad (_("Used more than the declared %d rotating registers"),
4850 if (num_alloced
> 96)
4852 as_bad (_("Used more than the available 96 rotating registers"));
4857 if (num_alloced
> 48)
4859 as_bad (_("Used more than the available 48 rotating registers"));
4870 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4871 memset (*drpp
, 0, sizeof (*dr
));
4874 name
= obstack_alloc (¬es
, len
+ 1);
4875 memcpy (name
, start
, len
);
4880 dr
->num_regs
= num_regs
;
4881 dr
->base
= base_reg
;
4883 base_reg
+= num_regs
;
4885 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4887 as_bad (_("Attempt to redefine register set `%s'"), name
);
4888 obstack_free (¬es
, name
);
4892 if (*input_line_pointer
!= ',')
4894 ++input_line_pointer
; /* skip comma */
4897 demand_empty_rest_of_line ();
4901 ignore_rest_of_line ();
4905 dot_byteorder (byteorder
)
4908 segment_info_type
*seginfo
= seg_info (now_seg
);
4910 if (byteorder
== -1)
4912 if (seginfo
->tc_segment_info_data
.endian
== 0)
4913 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4914 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4917 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4919 if (target_big_endian
!= byteorder
)
4921 target_big_endian
= byteorder
;
4922 if (target_big_endian
)
4924 ia64_number_to_chars
= number_to_chars_bigendian
;
4925 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4929 ia64_number_to_chars
= number_to_chars_littleendian
;
4930 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4937 int dummy ATTRIBUTE_UNUSED
;
4944 option
= input_line_pointer
;
4945 ch
= get_symbol_end ();
4946 if (strcmp (option
, "lsb") == 0)
4947 md
.flags
&= ~EF_IA_64_BE
;
4948 else if (strcmp (option
, "msb") == 0)
4949 md
.flags
|= EF_IA_64_BE
;
4950 else if (strcmp (option
, "abi32") == 0)
4951 md
.flags
&= ~EF_IA_64_ABI64
;
4952 else if (strcmp (option
, "abi64") == 0)
4953 md
.flags
|= EF_IA_64_ABI64
;
4955 as_bad (_("Unknown psr option `%s'"), option
);
4956 *input_line_pointer
= ch
;
4959 if (*input_line_pointer
!= ',')
4962 ++input_line_pointer
;
4965 demand_empty_rest_of_line ();
4970 int dummy ATTRIBUTE_UNUSED
;
4972 new_logical_line (0, get_absolute_expression ());
4973 demand_empty_rest_of_line ();
4977 cross_section (ref
, cons
, ua
)
4979 void (*cons
) PARAMS((int));
4983 int saved_auto_align
;
4984 unsigned int section_count
;
4987 start
= input_line_pointer
;
4993 name
= demand_copy_C_string (&len
);
4994 obstack_free(¬es
, name
);
4997 ignore_rest_of_line ();
5003 char c
= get_symbol_end ();
5005 if (input_line_pointer
== start
)
5007 as_bad (_("Missing section name"));
5008 ignore_rest_of_line ();
5011 *input_line_pointer
= c
;
5013 end
= input_line_pointer
;
5015 if (*input_line_pointer
!= ',')
5017 as_bad (_("Comma expected after section name"));
5018 ignore_rest_of_line ();
5022 end
= input_line_pointer
+ 1; /* skip comma */
5023 input_line_pointer
= start
;
5024 md
.keep_pending_output
= 1;
5025 section_count
= bfd_count_sections(stdoutput
);
5026 obj_elf_section (0);
5027 if (section_count
!= bfd_count_sections(stdoutput
))
5028 as_warn (_("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."));
5029 input_line_pointer
= end
;
5030 saved_auto_align
= md
.auto_align
;
5035 md
.auto_align
= saved_auto_align
;
5036 obj_elf_previous (0);
5037 md
.keep_pending_output
= 0;
5044 cross_section (size
, cons
, 0);
5047 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
5050 stmt_float_cons (kind
)
5071 ia64_do_align (alignment
);
5079 int saved_auto_align
= md
.auto_align
;
5083 md
.auto_align
= saved_auto_align
;
5087 dot_xfloat_cons (kind
)
5090 cross_section (kind
, stmt_float_cons
, 0);
5094 dot_xstringer (int zero
)
5096 cross_section (zero
, stringer
, 0);
5103 cross_section (size
, cons
, 1);
5107 dot_xfloat_cons_ua (kind
)
5110 cross_section (kind
, float_cons
, 1);
5113 /* .reg.val <regname>,value */
5117 int dummy ATTRIBUTE_UNUSED
;
5121 expression_and_evaluate (®
);
5122 if (reg
.X_op
!= O_register
)
5124 as_bad (_("Register name expected"));
5125 ignore_rest_of_line ();
5127 else if (*input_line_pointer
++ != ',')
5129 as_bad (_("Comma expected"));
5130 ignore_rest_of_line ();
5134 valueT value
= get_absolute_expression ();
5135 int regno
= reg
.X_add_number
;
5136 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
5137 as_warn (_("Register value annotation ignored"));
5140 gr_values
[regno
- REG_GR
].known
= 1;
5141 gr_values
[regno
- REG_GR
].value
= value
;
5142 gr_values
[regno
- REG_GR
].path
= md
.path
;
5145 demand_empty_rest_of_line ();
5150 .serialize.instruction
5153 dot_serialize (type
)
5156 insn_group_break (0, 0, 0);
5158 instruction_serialization ();
5160 data_serialization ();
5161 insn_group_break (0, 0, 0);
5162 demand_empty_rest_of_line ();
5165 /* select dv checking mode
5170 A stop is inserted when changing modes
5177 if (md
.manual_bundling
)
5178 as_warn (_("Directive invalid within a bundle"));
5180 if (type
== 'E' || type
== 'A')
5181 md
.mode_explicitly_set
= 0;
5183 md
.mode_explicitly_set
= 1;
5190 if (md
.explicit_mode
)
5191 insn_group_break (1, 0, 0);
5192 md
.explicit_mode
= 0;
5196 if (!md
.explicit_mode
)
5197 insn_group_break (1, 0, 0);
5198 md
.explicit_mode
= 1;
5202 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5203 insn_group_break (1, 0, 0);
5204 md
.explicit_mode
= md
.default_explicit_mode
;
5205 md
.mode_explicitly_set
= 0;
5216 for (regno
= 0; regno
< 64; regno
++)
5218 if (mask
& ((valueT
) 1 << regno
))
5220 fprintf (stderr
, "%s p%d", comma
, regno
);
5227 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5228 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5229 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5230 .pred.safe_across_calls p1 [, p2 [,...]]
5239 int p1
= -1, p2
= -1;
5243 if (*input_line_pointer
== '"')
5246 char *form
= demand_copy_C_string (&len
);
5248 if (strcmp (form
, "mutex") == 0)
5250 else if (strcmp (form
, "clear") == 0)
5252 else if (strcmp (form
, "imply") == 0)
5254 obstack_free (¬es
, form
);
5256 else if (*input_line_pointer
== '@')
5258 char *form
= ++input_line_pointer
;
5259 char c
= get_symbol_end();
5261 if (strcmp (form
, "mutex") == 0)
5263 else if (strcmp (form
, "clear") == 0)
5265 else if (strcmp (form
, "imply") == 0)
5267 *input_line_pointer
= c
;
5271 as_bad (_("Missing predicate relation type"));
5272 ignore_rest_of_line ();
5277 as_bad (_("Unrecognized predicate relation type"));
5278 ignore_rest_of_line ();
5281 if (*input_line_pointer
== ',')
5282 ++input_line_pointer
;
5290 expressionS pr
, *pr1
, *pr2
;
5292 sep
= parse_operand (&pr
, ',');
5293 if (pr
.X_op
== O_register
5294 && pr
.X_add_number
>= REG_P
5295 && pr
.X_add_number
<= REG_P
+ 63)
5297 regno
= pr
.X_add_number
- REG_P
;
5305 else if (type
!= 'i'
5306 && pr
.X_op
== O_subtract
5307 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5308 && pr1
->X_op
== O_register
5309 && pr1
->X_add_number
>= REG_P
5310 && pr1
->X_add_number
<= REG_P
+ 63
5311 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5312 && pr2
->X_op
== O_register
5313 && pr2
->X_add_number
>= REG_P
5314 && pr2
->X_add_number
<= REG_P
+ 63)
5319 regno
= pr1
->X_add_number
- REG_P
;
5320 stop
= pr2
->X_add_number
- REG_P
;
5323 as_bad (_("Bad register range"));
5324 ignore_rest_of_line ();
5327 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5328 count
+= stop
- regno
+ 1;
5332 as_bad (_("Predicate register expected"));
5333 ignore_rest_of_line ();
5337 as_warn (_("Duplicate predicate register ignored"));
5348 clear_qp_mutex (mask
);
5349 clear_qp_implies (mask
, (valueT
) 0);
5352 if (count
!= 2 || p1
== -1 || p2
== -1)
5353 as_bad (_("Predicate source and target required"));
5354 else if (p1
== 0 || p2
== 0)
5355 as_bad (_("Use of p0 is not valid in this context"));
5357 add_qp_imply (p1
, p2
);
5362 as_bad (_("At least two PR arguments expected"));
5367 as_bad (_("Use of p0 is not valid in this context"));
5370 add_qp_mutex (mask
);
5373 /* note that we don't override any existing relations */
5376 as_bad (_("At least one PR argument expected"));
5381 fprintf (stderr
, "Safe across calls: ");
5382 print_prmask (mask
);
5383 fprintf (stderr
, "\n");
5385 qp_safe_across_calls
= mask
;
5388 demand_empty_rest_of_line ();
5391 /* .entry label [, label [, ...]]
5392 Hint to DV code that the given labels are to be considered entry points.
5393 Otherwise, only global labels are considered entry points. */
5397 int dummy ATTRIBUTE_UNUSED
;
5406 name
= input_line_pointer
;
5407 c
= get_symbol_end ();
5408 symbolP
= symbol_find_or_make (name
);
5410 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5412 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5415 *input_line_pointer
= c
;
5417 c
= *input_line_pointer
;
5420 input_line_pointer
++;
5422 if (*input_line_pointer
== '\n')
5428 demand_empty_rest_of_line ();
5431 /* .mem.offset offset, base
5432 "base" is used to distinguish between offsets from a different base. */
5435 dot_mem_offset (dummy
)
5436 int dummy ATTRIBUTE_UNUSED
;
5438 md
.mem_offset
.hint
= 1;
5439 md
.mem_offset
.offset
= get_absolute_expression ();
5440 if (*input_line_pointer
!= ',')
5442 as_bad (_("Comma expected"));
5443 ignore_rest_of_line ();
5446 ++input_line_pointer
;
5447 md
.mem_offset
.base
= get_absolute_expression ();
5448 demand_empty_rest_of_line ();
5451 /* ia64-specific pseudo-ops: */
5452 const pseudo_typeS md_pseudo_table
[] =
5454 { "radix", dot_radix
, 0 },
5455 { "lcomm", s_lcomm_bytes
, 1 },
5456 { "loc", dot_loc
, 0 },
5457 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5458 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5459 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5460 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5461 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5462 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5463 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5464 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5465 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5466 { "proc", dot_proc
, 0 },
5467 { "body", dot_body
, 0 },
5468 { "prologue", dot_prologue
, 0 },
5469 { "endp", dot_endp
, 0 },
5471 { "fframe", dot_fframe
, 0 },
5472 { "vframe", dot_vframe
, 0 },
5473 { "vframesp", dot_vframesp
, 0 },
5474 { "vframepsp", dot_vframesp
, 1 },
5475 { "save", dot_save
, 0 },
5476 { "restore", dot_restore
, 0 },
5477 { "restorereg", dot_restorereg
, 0 },
5478 { "restorereg.p", dot_restorereg
, 1 },
5479 { "handlerdata", dot_handlerdata
, 0 },
5480 { "unwentry", dot_unwentry
, 0 },
5481 { "altrp", dot_altrp
, 0 },
5482 { "savesp", dot_savemem
, 0 },
5483 { "savepsp", dot_savemem
, 1 },
5484 { "save.g", dot_saveg
, 0 },
5485 { "save.f", dot_savef
, 0 },
5486 { "save.b", dot_saveb
, 0 },
5487 { "save.gf", dot_savegf
, 0 },
5488 { "spill", dot_spill
, 0 },
5489 { "spillreg", dot_spillreg
, 0 },
5490 { "spillsp", dot_spillmem
, 0 },
5491 { "spillpsp", dot_spillmem
, 1 },
5492 { "spillreg.p", dot_spillreg
, 1 },
5493 { "spillsp.p", dot_spillmem
, ~0 },
5494 { "spillpsp.p", dot_spillmem
, ~1 },
5495 { "label_state", dot_label_state
, 0 },
5496 { "copy_state", dot_copy_state
, 0 },
5497 { "unwabi", dot_unwabi
, 0 },
5498 { "personality", dot_personality
, 0 },
5499 { "mii", dot_template
, 0x0 },
5500 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5501 { "mlx", dot_template
, 0x2 },
5502 { "mmi", dot_template
, 0x4 },
5503 { "mfi", dot_template
, 0x6 },
5504 { "mmf", dot_template
, 0x7 },
5505 { "mib", dot_template
, 0x8 },
5506 { "mbb", dot_template
, 0x9 },
5507 { "bbb", dot_template
, 0xb },
5508 { "mmb", dot_template
, 0xc },
5509 { "mfb", dot_template
, 0xe },
5510 { "align", dot_align
, 0 },
5511 { "regstk", dot_regstk
, 0 },
5512 { "rotr", dot_rot
, DYNREG_GR
},
5513 { "rotf", dot_rot
, DYNREG_FR
},
5514 { "rotp", dot_rot
, DYNREG_PR
},
5515 { "lsb", dot_byteorder
, 0 },
5516 { "msb", dot_byteorder
, 1 },
5517 { "psr", dot_psr
, 0 },
5518 { "alias", dot_alias
, 0 },
5519 { "secalias", dot_alias
, 1 },
5520 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5522 { "xdata1", dot_xdata
, 1 },
5523 { "xdata2", dot_xdata
, 2 },
5524 { "xdata4", dot_xdata
, 4 },
5525 { "xdata8", dot_xdata
, 8 },
5526 { "xdata16", dot_xdata
, 16 },
5527 { "xreal4", dot_xfloat_cons
, 'f' },
5528 { "xreal8", dot_xfloat_cons
, 'd' },
5529 { "xreal10", dot_xfloat_cons
, 'x' },
5530 { "xreal16", dot_xfloat_cons
, 'X' },
5531 { "xstring", dot_xstringer
, 8 + 0 },
5532 { "xstringz", dot_xstringer
, 8 + 1 },
5534 /* unaligned versions: */
5535 { "xdata2.ua", dot_xdata_ua
, 2 },
5536 { "xdata4.ua", dot_xdata_ua
, 4 },
5537 { "xdata8.ua", dot_xdata_ua
, 8 },
5538 { "xdata16.ua", dot_xdata_ua
, 16 },
5539 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5540 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5541 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5542 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5544 /* annotations/DV checking support */
5545 { "entry", dot_entry
, 0 },
5546 { "mem.offset", dot_mem_offset
, 0 },
5547 { "pred.rel", dot_pred_rel
, 0 },
5548 { "pred.rel.clear", dot_pred_rel
, 'c' },
5549 { "pred.rel.imply", dot_pred_rel
, 'i' },
5550 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5551 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5552 { "reg.val", dot_reg_val
, 0 },
5553 { "serialize.data", dot_serialize
, 0 },
5554 { "serialize.instruction", dot_serialize
, 1 },
5555 { "auto", dot_dv_mode
, 'a' },
5556 { "explicit", dot_dv_mode
, 'e' },
5557 { "default", dot_dv_mode
, 'd' },
5559 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5560 IA-64 aligns data allocation pseudo-ops by default, so we have to
5561 tell it that these ones are supposed to be unaligned. Long term,
5562 should rewrite so that only IA-64 specific data allocation pseudo-ops
5563 are aligned by default. */
5564 {"2byte", stmt_cons_ua
, 2},
5565 {"4byte", stmt_cons_ua
, 4},
5566 {"8byte", stmt_cons_ua
, 8},
5571 static const struct pseudo_opcode
5574 void (*handler
) (int);
5579 /* these are more like pseudo-ops, but don't start with a dot */
5580 { "data1", cons
, 1 },
5581 { "data2", cons
, 2 },
5582 { "data4", cons
, 4 },
5583 { "data8", cons
, 8 },
5584 { "data16", cons
, 16 },
5585 { "real4", stmt_float_cons
, 'f' },
5586 { "real8", stmt_float_cons
, 'd' },
5587 { "real10", stmt_float_cons
, 'x' },
5588 { "real16", stmt_float_cons
, 'X' },
5589 { "string", stringer
, 8 + 0 },
5590 { "stringz", stringer
, 8 + 1 },
5592 /* unaligned versions: */
5593 { "data2.ua", stmt_cons_ua
, 2 },
5594 { "data4.ua", stmt_cons_ua
, 4 },
5595 { "data8.ua", stmt_cons_ua
, 8 },
5596 { "data16.ua", stmt_cons_ua
, 16 },
5597 { "real4.ua", float_cons
, 'f' },
5598 { "real8.ua", float_cons
, 'd' },
5599 { "real10.ua", float_cons
, 'x' },
5600 { "real16.ua", float_cons
, 'X' },
5603 /* Declare a register by creating a symbol for it and entering it in
5604 the symbol table. */
5607 declare_register (name
, regnum
)
5609 unsigned int regnum
;
5614 sym
= symbol_create (name
, reg_section
, regnum
, &zero_address_frag
);
5616 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5618 as_fatal ("Inserting \"%s\" into register table failed: %s",
5625 declare_register_set (prefix
, num_regs
, base_regnum
)
5627 unsigned int num_regs
;
5628 unsigned int base_regnum
;
5633 for (i
= 0; i
< num_regs
; ++i
)
5635 snprintf (name
, sizeof (name
), "%s%u", prefix
, i
);
5636 declare_register (name
, base_regnum
+ i
);
5641 operand_width (opnd
)
5642 enum ia64_opnd opnd
;
5644 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5645 unsigned int bits
= 0;
5649 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5650 bits
+= odesc
->field
[i
].bits
;
5655 static enum operand_match_result
5656 operand_match (idesc
, index
, e
)
5657 const struct ia64_opcode
*idesc
;
5661 enum ia64_opnd opnd
= idesc
->operands
[index
];
5662 int bits
, relocatable
= 0;
5663 struct insn_fix
*fix
;
5670 case IA64_OPND_AR_CCV
:
5671 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5672 return OPERAND_MATCH
;
5675 case IA64_OPND_AR_CSD
:
5676 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5677 return OPERAND_MATCH
;
5680 case IA64_OPND_AR_PFS
:
5681 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5682 return OPERAND_MATCH
;
5686 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5687 return OPERAND_MATCH
;
5691 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5692 return OPERAND_MATCH
;
5696 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5697 return OPERAND_MATCH
;
5700 case IA64_OPND_PR_ROT
:
5701 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5702 return OPERAND_MATCH
;
5706 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5707 return OPERAND_MATCH
;
5710 case IA64_OPND_PSR_L
:
5711 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5712 return OPERAND_MATCH
;
5715 case IA64_OPND_PSR_UM
:
5716 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5717 return OPERAND_MATCH
;
5721 if (e
->X_op
== O_constant
)
5723 if (e
->X_add_number
== 1)
5724 return OPERAND_MATCH
;
5726 return OPERAND_OUT_OF_RANGE
;
5731 if (e
->X_op
== O_constant
)
5733 if (e
->X_add_number
== 8)
5734 return OPERAND_MATCH
;
5736 return OPERAND_OUT_OF_RANGE
;
5741 if (e
->X_op
== O_constant
)
5743 if (e
->X_add_number
== 16)
5744 return OPERAND_MATCH
;
5746 return OPERAND_OUT_OF_RANGE
;
5750 /* register operands: */
5753 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5754 && e
->X_add_number
< REG_AR
+ 128)
5755 return OPERAND_MATCH
;
5760 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5761 && e
->X_add_number
< REG_BR
+ 8)
5762 return OPERAND_MATCH
;
5766 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5767 && e
->X_add_number
< REG_CR
+ 128)
5768 return OPERAND_MATCH
;
5775 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5776 && e
->X_add_number
< REG_FR
+ 128)
5777 return OPERAND_MATCH
;
5782 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5783 && e
->X_add_number
< REG_P
+ 64)
5784 return OPERAND_MATCH
;
5790 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5791 && e
->X_add_number
< REG_GR
+ 128)
5792 return OPERAND_MATCH
;
5795 case IA64_OPND_R3_2
:
5796 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5798 if (e
->X_add_number
< REG_GR
+ 4)
5799 return OPERAND_MATCH
;
5800 else if (e
->X_add_number
< REG_GR
+ 128)
5801 return OPERAND_OUT_OF_RANGE
;
5805 /* indirect operands: */
5806 case IA64_OPND_CPUID_R3
:
5807 case IA64_OPND_DBR_R3
:
5808 case IA64_OPND_DTR_R3
:
5809 case IA64_OPND_ITR_R3
:
5810 case IA64_OPND_IBR_R3
:
5811 case IA64_OPND_MSR_R3
:
5812 case IA64_OPND_PKR_R3
:
5813 case IA64_OPND_PMC_R3
:
5814 case IA64_OPND_PMD_R3
:
5815 case IA64_OPND_RR_R3
:
5816 if (e
->X_op
== O_index
&& e
->X_op_symbol
5817 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5818 == opnd
- IA64_OPND_CPUID_R3
))
5819 return OPERAND_MATCH
;
5823 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5824 return OPERAND_MATCH
;
5827 /* immediate operands: */
5828 case IA64_OPND_CNT2a
:
5829 case IA64_OPND_LEN4
:
5830 case IA64_OPND_LEN6
:
5831 bits
= operand_width (idesc
->operands
[index
]);
5832 if (e
->X_op
== O_constant
)
5834 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5835 return OPERAND_MATCH
;
5837 return OPERAND_OUT_OF_RANGE
;
5841 case IA64_OPND_CNT2b
:
5842 if (e
->X_op
== O_constant
)
5844 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5845 return OPERAND_MATCH
;
5847 return OPERAND_OUT_OF_RANGE
;
5851 case IA64_OPND_CNT2c
:
5852 val
= e
->X_add_number
;
5853 if (e
->X_op
== O_constant
)
5855 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5856 return OPERAND_MATCH
;
5858 return OPERAND_OUT_OF_RANGE
;
5863 /* SOR must be an integer multiple of 8 */
5864 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5865 return OPERAND_OUT_OF_RANGE
;
5868 if (e
->X_op
== O_constant
)
5870 if ((bfd_vma
) e
->X_add_number
<= 96)
5871 return OPERAND_MATCH
;
5873 return OPERAND_OUT_OF_RANGE
;
5877 case IA64_OPND_IMMU62
:
5878 if (e
->X_op
== O_constant
)
5880 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5881 return OPERAND_MATCH
;
5883 return OPERAND_OUT_OF_RANGE
;
5887 /* FIXME -- need 62-bit relocation type */
5888 as_bad (_("62-bit relocation not yet implemented"));
5892 case IA64_OPND_IMMU64
:
5893 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5894 || e
->X_op
== O_subtract
)
5896 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5897 fix
->code
= BFD_RELOC_IA64_IMM64
;
5898 if (e
->X_op
!= O_subtract
)
5900 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5901 if (e
->X_op
== O_pseudo_fixup
)
5905 fix
->opnd
= idesc
->operands
[index
];
5908 ++CURR_SLOT
.num_fixups
;
5909 return OPERAND_MATCH
;
5911 else if (e
->X_op
== O_constant
)
5912 return OPERAND_MATCH
;
5915 case IA64_OPND_IMMU5b
:
5916 if (e
->X_op
== O_constant
)
5918 val
= e
->X_add_number
;
5919 if (val
>= 32 && val
<= 63)
5920 return OPERAND_MATCH
;
5922 return OPERAND_OUT_OF_RANGE
;
5926 case IA64_OPND_CCNT5
:
5927 case IA64_OPND_CNT5
:
5928 case IA64_OPND_CNT6
:
5929 case IA64_OPND_CPOS6a
:
5930 case IA64_OPND_CPOS6b
:
5931 case IA64_OPND_CPOS6c
:
5932 case IA64_OPND_IMMU2
:
5933 case IA64_OPND_IMMU7a
:
5934 case IA64_OPND_IMMU7b
:
5935 case IA64_OPND_IMMU21
:
5936 case IA64_OPND_IMMU24
:
5937 case IA64_OPND_MBTYPE4
:
5938 case IA64_OPND_MHTYPE8
:
5939 case IA64_OPND_POS6
:
5940 bits
= operand_width (idesc
->operands
[index
]);
5941 if (e
->X_op
== O_constant
)
5943 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5944 return OPERAND_MATCH
;
5946 return OPERAND_OUT_OF_RANGE
;
5950 case IA64_OPND_IMMU9
:
5951 bits
= operand_width (idesc
->operands
[index
]);
5952 if (e
->X_op
== O_constant
)
5954 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5956 int lobits
= e
->X_add_number
& 0x3;
5957 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5958 e
->X_add_number
|= (bfd_vma
) 0x3;
5959 return OPERAND_MATCH
;
5962 return OPERAND_OUT_OF_RANGE
;
5966 case IA64_OPND_IMM44
:
5967 /* least 16 bits must be zero */
5968 if ((e
->X_add_number
& 0xffff) != 0)
5969 /* XXX technically, this is wrong: we should not be issuing warning
5970 messages until we're sure this instruction pattern is going to
5972 as_warn (_("lower 16 bits of mask ignored"));
5974 if (e
->X_op
== O_constant
)
5976 if (((e
->X_add_number
>= 0
5977 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5978 || (e
->X_add_number
< 0
5979 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5982 if (e
->X_add_number
>= 0
5983 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5985 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5987 return OPERAND_MATCH
;
5990 return OPERAND_OUT_OF_RANGE
;
5994 case IA64_OPND_IMM17
:
5995 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5996 if (e
->X_op
== O_constant
)
5998 if (((e
->X_add_number
>= 0
5999 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
6000 || (e
->X_add_number
< 0
6001 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
6004 if (e
->X_add_number
>= 0
6005 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
6007 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
6009 return OPERAND_MATCH
;
6012 return OPERAND_OUT_OF_RANGE
;
6016 case IA64_OPND_IMM14
:
6017 case IA64_OPND_IMM22
:
6019 case IA64_OPND_IMM1
:
6020 case IA64_OPND_IMM8
:
6021 case IA64_OPND_IMM8U4
:
6022 case IA64_OPND_IMM8M1
:
6023 case IA64_OPND_IMM8M1U4
:
6024 case IA64_OPND_IMM8M1U8
:
6025 case IA64_OPND_IMM9a
:
6026 case IA64_OPND_IMM9b
:
6027 bits
= operand_width (idesc
->operands
[index
]);
6028 if (relocatable
&& (e
->X_op
== O_symbol
6029 || e
->X_op
== O_subtract
6030 || e
->X_op
== O_pseudo_fixup
))
6032 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6034 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
6035 fix
->code
= BFD_RELOC_IA64_IMM14
;
6037 fix
->code
= BFD_RELOC_IA64_IMM22
;
6039 if (e
->X_op
!= O_subtract
)
6041 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6042 if (e
->X_op
== O_pseudo_fixup
)
6046 fix
->opnd
= idesc
->operands
[index
];
6049 ++CURR_SLOT
.num_fixups
;
6050 return OPERAND_MATCH
;
6052 else if (e
->X_op
!= O_constant
6053 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
6054 return OPERAND_MISMATCH
;
6056 if (opnd
== IA64_OPND_IMM8M1U4
)
6058 /* Zero is not valid for unsigned compares that take an adjusted
6059 constant immediate range. */
6060 if (e
->X_add_number
== 0)
6061 return OPERAND_OUT_OF_RANGE
;
6063 /* Sign-extend 32-bit unsigned numbers, so that the following range
6064 checks will work. */
6065 val
= e
->X_add_number
;
6066 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
6067 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
6068 val
= ((val
<< 32) >> 32);
6070 /* Check for 0x100000000. This is valid because
6071 0x100000000-1 is the same as ((uint32_t) -1). */
6072 if (val
== ((bfd_signed_vma
) 1 << 32))
6073 return OPERAND_MATCH
;
6077 else if (opnd
== IA64_OPND_IMM8M1U8
)
6079 /* Zero is not valid for unsigned compares that take an adjusted
6080 constant immediate range. */
6081 if (e
->X_add_number
== 0)
6082 return OPERAND_OUT_OF_RANGE
;
6084 /* Check for 0x10000000000000000. */
6085 if (e
->X_op
== O_big
)
6087 if (generic_bignum
[0] == 0
6088 && generic_bignum
[1] == 0
6089 && generic_bignum
[2] == 0
6090 && generic_bignum
[3] == 0
6091 && generic_bignum
[4] == 1)
6092 return OPERAND_MATCH
;
6094 return OPERAND_OUT_OF_RANGE
;
6097 val
= e
->X_add_number
- 1;
6099 else if (opnd
== IA64_OPND_IMM8M1
)
6100 val
= e
->X_add_number
- 1;
6101 else if (opnd
== IA64_OPND_IMM8U4
)
6103 /* Sign-extend 32-bit unsigned numbers, so that the following range
6104 checks will work. */
6105 val
= e
->X_add_number
;
6106 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
6107 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
6108 val
= ((val
<< 32) >> 32);
6111 val
= e
->X_add_number
;
6113 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
6114 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
6115 return OPERAND_MATCH
;
6117 return OPERAND_OUT_OF_RANGE
;
6119 case IA64_OPND_INC3
:
6120 /* +/- 1, 4, 8, 16 */
6121 val
= e
->X_add_number
;
6124 if (e
->X_op
== O_constant
)
6126 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
6127 return OPERAND_MATCH
;
6129 return OPERAND_OUT_OF_RANGE
;
6133 case IA64_OPND_TGT25
:
6134 case IA64_OPND_TGT25b
:
6135 case IA64_OPND_TGT25c
:
6136 case IA64_OPND_TGT64
:
6137 if (e
->X_op
== O_symbol
)
6139 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6140 if (opnd
== IA64_OPND_TGT25
)
6141 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
6142 else if (opnd
== IA64_OPND_TGT25b
)
6143 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
6144 else if (opnd
== IA64_OPND_TGT25c
)
6145 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
6146 else if (opnd
== IA64_OPND_TGT64
)
6147 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
6151 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6152 fix
->opnd
= idesc
->operands
[index
];
6155 ++CURR_SLOT
.num_fixups
;
6156 return OPERAND_MATCH
;
6158 case IA64_OPND_TAG13
:
6159 case IA64_OPND_TAG13b
:
6163 return OPERAND_MATCH
;
6166 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6167 /* There are no external relocs for TAG13/TAG13b fields, so we
6168 create a dummy reloc. This will not live past md_apply_fix. */
6169 fix
->code
= BFD_RELOC_UNUSED
;
6170 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
6171 fix
->opnd
= idesc
->operands
[index
];
6174 ++CURR_SLOT
.num_fixups
;
6175 return OPERAND_MATCH
;
6182 case IA64_OPND_LDXMOV
:
6183 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
6184 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
6185 fix
->opnd
= idesc
->operands
[index
];
6188 ++CURR_SLOT
.num_fixups
;
6189 return OPERAND_MATCH
;
6194 return OPERAND_MISMATCH
;
6198 parse_operand (e
, more
)
6204 memset (e
, 0, sizeof (*e
));
6207 expression_and_evaluate (e
);
6208 sep
= *input_line_pointer
;
6209 if (more
&& (sep
== ',' || sep
== more
))
6210 ++input_line_pointer
;
6214 /* Returns the next entry in the opcode table that matches the one in
6215 IDESC, and frees the entry in IDESC. If no matching entry is
6216 found, NULL is returned instead. */
6218 static struct ia64_opcode
*
6219 get_next_opcode (struct ia64_opcode
*idesc
)
6221 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6222 ia64_free_opcode (idesc
);
6226 /* Parse the operands for the opcode and find the opcode variant that
6227 matches the specified operands, or NULL if no match is possible. */
6229 static struct ia64_opcode
*
6230 parse_operands (idesc
)
6231 struct ia64_opcode
*idesc
;
6233 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6234 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6237 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6238 enum operand_match_result result
;
6240 char *first_arg
= 0, *end
, *saved_input_pointer
;
6243 assert (strlen (idesc
->name
) <= 128);
6245 strcpy (mnemonic
, idesc
->name
);
6246 if (idesc
->operands
[2] == IA64_OPND_SOF
6247 || idesc
->operands
[1] == IA64_OPND_SOF
)
6249 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6250 can't parse the first operand until we have parsed the
6251 remaining operands of the "alloc" instruction. */
6253 first_arg
= input_line_pointer
;
6254 end
= strchr (input_line_pointer
, '=');
6257 as_bad (_("Expected separator `='"));
6260 input_line_pointer
= end
+ 1;
6267 if (i
< NELEMS (CURR_SLOT
.opnd
))
6269 sep
= parse_operand (CURR_SLOT
.opnd
+ i
, '=');
6270 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6277 sep
= parse_operand (&dummy
, '=');
6278 if (dummy
.X_op
== O_absent
)
6284 if (sep
!= '=' && sep
!= ',')
6289 if (num_outputs
> 0)
6290 as_bad (_("Duplicate equal sign (=) in instruction"));
6292 num_outputs
= i
+ 1;
6297 as_bad (_("Illegal operand separator `%c'"), sep
);
6301 if (idesc
->operands
[2] == IA64_OPND_SOF
6302 || idesc
->operands
[1] == IA64_OPND_SOF
)
6304 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6305 Note, however, that due to that mapping operand numbers in error
6306 messages for any of the constant operands will not be correct. */
6307 know (strcmp (idesc
->name
, "alloc") == 0);
6308 /* The first operand hasn't been parsed/initialized, yet (but
6309 num_operands intentionally doesn't account for that). */
6310 i
= num_operands
> 4 ? 2 : 1;
6311 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6312 ? CURR_SLOT.opnd[n].X_add_number \
6314 sof
= set_regstack (FORCE_CONST(i
),
6317 FORCE_CONST(i
+ 3));
6320 /* now we can parse the first arg: */
6321 saved_input_pointer
= input_line_pointer
;
6322 input_line_pointer
= first_arg
;
6323 sep
= parse_operand (CURR_SLOT
.opnd
+ 0, '=');
6325 --num_outputs
; /* force error */
6326 input_line_pointer
= saved_input_pointer
;
6328 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6329 if (CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6330 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
)
6331 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6332 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6334 CURR_SLOT
.opnd
[i
+ 1].X_op
= O_illegal
;
6335 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6338 highest_unmatched_operand
= -4;
6339 curr_out_of_range_pos
= -1;
6341 for (; idesc
; idesc
= get_next_opcode (idesc
))
6343 if (num_outputs
!= idesc
->num_outputs
)
6344 continue; /* mismatch in # of outputs */
6345 if (highest_unmatched_operand
< 0)
6346 highest_unmatched_operand
|= 1;
6347 if (num_operands
> NELEMS (idesc
->operands
)
6348 || (num_operands
< NELEMS (idesc
->operands
)
6349 && idesc
->operands
[num_operands
])
6350 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6351 continue; /* mismatch in number of arguments */
6352 if (highest_unmatched_operand
< 0)
6353 highest_unmatched_operand
|= 2;
6355 CURR_SLOT
.num_fixups
= 0;
6357 /* Try to match all operands. If we see an out-of-range operand,
6358 then continue trying to match the rest of the operands, since if
6359 the rest match, then this idesc will give the best error message. */
6361 out_of_range_pos
= -1;
6362 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6364 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6365 if (result
!= OPERAND_MATCH
)
6367 if (result
!= OPERAND_OUT_OF_RANGE
)
6369 if (out_of_range_pos
< 0)
6370 /* remember position of the first out-of-range operand: */
6371 out_of_range_pos
= i
;
6375 /* If we did not match all operands, or if at least one operand was
6376 out-of-range, then this idesc does not match. Keep track of which
6377 idesc matched the most operands before failing. If we have two
6378 idescs that failed at the same position, and one had an out-of-range
6379 operand, then prefer the out-of-range operand. Thus if we have
6380 "add r0=0x1000000,r1" we get an error saying the constant is out
6381 of range instead of an error saying that the constant should have been
6384 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6386 if (i
> highest_unmatched_operand
6387 || (i
== highest_unmatched_operand
6388 && out_of_range_pos
> curr_out_of_range_pos
))
6390 highest_unmatched_operand
= i
;
6391 if (out_of_range_pos
>= 0)
6393 expected_operand
= idesc
->operands
[out_of_range_pos
];
6394 error_pos
= out_of_range_pos
;
6398 expected_operand
= idesc
->operands
[i
];
6401 curr_out_of_range_pos
= out_of_range_pos
;
6410 if (expected_operand
)
6411 as_bad (_("Operand %u of `%s' should be %s"),
6412 error_pos
+ 1, mnemonic
,
6413 elf64_ia64_operands
[expected_operand
].desc
);
6414 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6415 as_bad (_("Wrong number of output operands"));
6416 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6417 as_bad (_("Wrong number of input operands"));
6419 as_bad (_("Operand mismatch"));
6423 /* Check that the instruction doesn't use
6424 - r0, f0, or f1 as output operands
6425 - the same predicate twice as output operands
6426 - r0 as address of a base update load or store
6427 - the same GR as output and address of a base update load
6428 - two even- or two odd-numbered FRs as output operands of a floating
6429 point parallel load.
6430 At most two (conflicting) output (or output-like) operands can exist,
6431 (floating point parallel loads have three outputs, but the base register,
6432 if updated, cannot conflict with the actual outputs). */
6434 for (i
= 0; i
< num_operands
; ++i
)
6439 switch (idesc
->operands
[i
])
6444 if (i
< num_outputs
)
6446 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6449 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6451 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6456 if (i
< num_outputs
)
6459 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6461 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6468 if (i
< num_outputs
)
6470 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6471 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6474 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6477 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6479 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6483 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6485 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6488 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6490 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6501 as_warn (_("Invalid use of `%c%d' as output operand"), reg_class
, regno
);
6504 as_warn (_("Invalid use of `r%d' as base update address operand"), regno
);
6510 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6515 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6520 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6528 as_warn (_("Invalid duplicate use of `%c%d'"), reg_class
, reg1
);
6530 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6531 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6532 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6533 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6534 && ! ((reg1
^ reg2
) & 1))
6535 as_warn (_("Invalid simultaneous use of `f%d' and `f%d'"),
6536 reg1
- REG_FR
, reg2
- REG_FR
);
6537 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6538 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6539 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6540 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6541 as_warn (_("Dangerous simultaneous use of `f%d' and `f%d'"),
6542 reg1
- REG_FR
, reg2
- REG_FR
);
6547 build_insn (slot
, insnp
)
6551 const struct ia64_operand
*odesc
, *o2desc
;
6552 struct ia64_opcode
*idesc
= slot
->idesc
;
6558 insn
= idesc
->opcode
| slot
->qp_regno
;
6560 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6562 if (slot
->opnd
[i
].X_op
== O_register
6563 || slot
->opnd
[i
].X_op
== O_constant
6564 || slot
->opnd
[i
].X_op
== O_index
)
6565 val
= slot
->opnd
[i
].X_add_number
;
6566 else if (slot
->opnd
[i
].X_op
== O_big
)
6568 /* This must be the value 0x10000000000000000. */
6569 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6575 switch (idesc
->operands
[i
])
6577 case IA64_OPND_IMMU64
:
6578 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6579 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6580 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6581 | (((val
>> 63) & 0x1) << 36));
6584 case IA64_OPND_IMMU62
:
6585 val
&= 0x3fffffffffffffffULL
;
6586 if (val
!= slot
->opnd
[i
].X_add_number
)
6587 as_warn (_("Value truncated to 62 bits"));
6588 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6589 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6592 case IA64_OPND_TGT64
:
6594 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6595 insn
|= ((((val
>> 59) & 0x1) << 36)
6596 | (((val
>> 0) & 0xfffff) << 13));
6627 case IA64_OPND_R3_2
:
6628 case IA64_OPND_CPUID_R3
:
6629 case IA64_OPND_DBR_R3
:
6630 case IA64_OPND_DTR_R3
:
6631 case IA64_OPND_ITR_R3
:
6632 case IA64_OPND_IBR_R3
:
6634 case IA64_OPND_MSR_R3
:
6635 case IA64_OPND_PKR_R3
:
6636 case IA64_OPND_PMC_R3
:
6637 case IA64_OPND_PMD_R3
:
6638 case IA64_OPND_RR_R3
:
6646 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6647 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6649 as_bad_where (slot
->src_file
, slot
->src_line
,
6650 _("Bad operand value: %s"), err
);
6651 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6653 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6654 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6656 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6657 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6659 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6660 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6661 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6663 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6664 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6674 int manual_bundling_off
= 0, manual_bundling
= 0;
6675 enum ia64_unit required_unit
, insn_unit
= 0;
6676 enum ia64_insn_type type
[3], insn_type
;
6677 unsigned int template, orig_template
;
6678 bfd_vma insn
[3] = { -1, -1, -1 };
6679 struct ia64_opcode
*idesc
;
6680 int end_of_insn_group
= 0, user_template
= -1;
6681 int n
, i
, j
, first
, curr
, last_slot
;
6682 bfd_vma t0
= 0, t1
= 0;
6683 struct label_fix
*lfix
;
6684 bfd_boolean mark_label
;
6685 struct insn_fix
*ifix
;
6691 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6692 know (first
>= 0 && first
< NUM_SLOTS
);
6693 n
= MIN (3, md
.num_slots_in_use
);
6695 /* Determine template: user user_template if specified, best match
6698 if (md
.slot
[first
].user_template
>= 0)
6699 user_template
= template = md
.slot
[first
].user_template
;
6702 /* Auto select appropriate template. */
6703 memset (type
, 0, sizeof (type
));
6705 for (i
= 0; i
< n
; ++i
)
6707 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6709 type
[i
] = md
.slot
[curr
].idesc
->type
;
6710 curr
= (curr
+ 1) % NUM_SLOTS
;
6712 template = best_template
[type
[0]][type
[1]][type
[2]];
6715 /* initialize instructions with appropriate nops: */
6716 for (i
= 0; i
< 3; ++i
)
6717 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6721 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6722 from the start of the frag. */
6723 addr_mod
= frag_now_fix () & 15;
6724 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6725 as_bad (_("instruction address is not a multiple of 16"));
6726 frag_now
->insn_addr
= addr_mod
;
6727 frag_now
->has_code
= 1;
6729 /* now fill in slots with as many insns as possible: */
6731 idesc
= md
.slot
[curr
].idesc
;
6732 end_of_insn_group
= 0;
6734 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6736 /* If we have unwind records, we may need to update some now. */
6737 unw_rec_list
*ptr
= md
.slot
[curr
].unwind_record
;
6738 unw_rec_list
*end_ptr
= NULL
;
6742 /* Find the last prologue/body record in the list for the current
6743 insn, and set the slot number for all records up to that point.
6744 This needs to be done now, because prologue/body records refer to
6745 the current point, not the point after the instruction has been
6746 issued. This matters because there may have been nops emitted
6747 meanwhile. Any non-prologue non-body record followed by a
6748 prologue/body record must also refer to the current point. */
6749 unw_rec_list
*last_ptr
;
6751 for (j
= 1; end_ptr
== NULL
&& j
< md
.num_slots_in_use
; ++j
)
6752 end_ptr
= md
.slot
[(curr
+ j
) % NUM_SLOTS
].unwind_record
;
6753 for (last_ptr
= NULL
; ptr
!= end_ptr
; ptr
= ptr
->next
)
6754 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6755 || ptr
->r
.type
== body
)
6759 /* Make last_ptr point one after the last prologue/body
6761 last_ptr
= last_ptr
->next
;
6762 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6765 ptr
->slot_number
= (unsigned long) f
+ i
;
6766 ptr
->slot_frag
= frag_now
;
6768 /* Remove the initialized records, so that we won't accidentally
6769 update them again if we insert a nop and continue. */
6770 md
.slot
[curr
].unwind_record
= last_ptr
;
6774 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6775 if (md
.slot
[curr
].manual_bundling_on
)
6778 manual_bundling
= 1;
6780 break; /* Need to start a new bundle. */
6783 /* If this instruction specifies a template, then it must be the first
6784 instruction of a bundle. */
6785 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6788 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6790 if (manual_bundling
&& !manual_bundling_off
)
6792 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6793 _("`%s' must be last in bundle"), idesc
->name
);
6795 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6799 if (idesc
->flags
& IA64_OPCODE_LAST
)
6802 unsigned int required_template
;
6804 /* If we need a stop bit after an M slot, our only choice is
6805 template 5 (M;;MI). If we need a stop bit after a B
6806 slot, our only choice is to place it at the end of the
6807 bundle, because the only available templates are MIB,
6808 MBB, BBB, MMB, and MFB. We don't handle anything other
6809 than M and B slots because these are the only kind of
6810 instructions that can have the IA64_OPCODE_LAST bit set. */
6811 required_template
= template;
6812 switch (idesc
->type
)
6816 required_template
= 5;
6824 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6825 _("Internal error: don't know how to force %s to end of instruction group"),
6831 && (i
> required_slot
6832 || (required_slot
== 2 && !manual_bundling_off
)
6833 || (user_template
>= 0
6834 /* Changing from MMI to M;MI is OK. */
6835 && (template ^ required_template
) > 1)))
6837 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6838 _("`%s' must be last in instruction group"),
6840 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6841 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6843 if (required_slot
< i
)
6844 /* Can't fit this instruction. */
6848 if (required_template
!= template)
6850 /* If we switch the template, we need to reset the NOPs
6851 after slot i. The slot-types of the instructions ahead
6852 of i never change, so we don't need to worry about
6853 changing NOPs in front of this slot. */
6854 for (j
= i
; j
< 3; ++j
)
6855 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6857 /* We just picked a template that includes the stop bit in the
6858 middle, so we don't need another one emitted later. */
6859 md
.slot
[curr
].end_of_insn_group
= 0;
6861 template = required_template
;
6863 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6865 if (manual_bundling
)
6867 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6868 _("Label must be first in a bundle"));
6869 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6871 /* This insn must go into the first slot of a bundle. */
6875 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6877 /* We need an instruction group boundary in the middle of a
6878 bundle. See if we can switch to an other template with
6879 an appropriate boundary. */
6881 orig_template
= template;
6882 if (i
== 1 && (user_template
== 4
6883 || (user_template
< 0
6884 && (ia64_templ_desc
[template].exec_unit
[0]
6888 end_of_insn_group
= 0;
6890 else if (i
== 2 && (user_template
== 0
6891 || (user_template
< 0
6892 && (ia64_templ_desc
[template].exec_unit
[1]
6894 /* This test makes sure we don't switch the template if
6895 the next instruction is one that needs to be first in
6896 an instruction group. Since all those instructions are
6897 in the M group, there is no way such an instruction can
6898 fit in this bundle even if we switch the template. The
6899 reason we have to check for this is that otherwise we
6900 may end up generating "MI;;I M.." which has the deadly
6901 effect that the second M instruction is no longer the
6902 first in the group! --davidm 99/12/16 */
6903 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6906 end_of_insn_group
= 0;
6909 && user_template
== 0
6910 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6911 /* Use the next slot. */
6913 else if (curr
!= first
)
6914 /* can't fit this insn */
6917 if (template != orig_template
)
6918 /* if we switch the template, we need to reset the NOPs
6919 after slot i. The slot-types of the instructions ahead
6920 of i never change, so we don't need to worry about
6921 changing NOPs in front of this slot. */
6922 for (j
= i
; j
< 3; ++j
)
6923 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6925 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6927 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6928 if (idesc
->type
== IA64_TYPE_DYN
)
6930 enum ia64_opnd opnd1
, opnd2
;
6932 if ((strcmp (idesc
->name
, "nop") == 0)
6933 || (strcmp (idesc
->name
, "break") == 0))
6934 insn_unit
= required_unit
;
6935 else if (strcmp (idesc
->name
, "hint") == 0)
6937 insn_unit
= required_unit
;
6938 if (required_unit
== IA64_UNIT_B
)
6944 case hint_b_warning
:
6945 as_warn (_("hint in B unit may be treated as nop"));
6948 /* When manual bundling is off and there is no
6949 user template, we choose a different unit so
6950 that hint won't go into the current slot. We
6951 will fill the current bundle with nops and
6952 try to put hint into the next bundle. */
6953 if (!manual_bundling
&& user_template
< 0)
6954 insn_unit
= IA64_UNIT_I
;
6956 as_bad (_("hint in B unit can't be used"));
6961 else if (strcmp (idesc
->name
, "chk.s") == 0
6962 || strcmp (idesc
->name
, "mov") == 0)
6964 insn_unit
= IA64_UNIT_M
;
6965 if (required_unit
== IA64_UNIT_I
6966 || (required_unit
== IA64_UNIT_F
&& template == 6))
6967 insn_unit
= IA64_UNIT_I
;
6970 as_fatal (_("emit_one_bundle: unexpected dynamic op"));
6972 snprintf (mnemonic
, sizeof (mnemonic
), "%s.%c",
6973 idesc
->name
, "?imbfxx"[insn_unit
]);
6974 opnd1
= idesc
->operands
[0];
6975 opnd2
= idesc
->operands
[1];
6976 ia64_free_opcode (idesc
);
6977 idesc
= ia64_find_opcode (mnemonic
);
6978 /* moves to/from ARs have collisions */
6979 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6981 while (idesc
!= NULL
6982 && (idesc
->operands
[0] != opnd1
6983 || idesc
->operands
[1] != opnd2
))
6984 idesc
= get_next_opcode (idesc
);
6986 md
.slot
[curr
].idesc
= idesc
;
6990 insn_type
= idesc
->type
;
6991 insn_unit
= IA64_UNIT_NIL
;
6995 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6996 insn_unit
= required_unit
;
6998 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6999 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
7000 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
7001 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
7002 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
7007 if (insn_unit
!= required_unit
)
7008 continue; /* Try next slot. */
7010 /* Now is a good time to fix up the labels for this insn. */
7012 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
7014 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
7015 symbol_set_frag (lfix
->sym
, frag_now
);
7016 mark_label
|= lfix
->dw2_mark_labels
;
7018 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
7020 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
7021 symbol_set_frag (lfix
->sym
, frag_now
);
7024 if (debug_type
== DEBUG_DWARF2
7025 || md
.slot
[curr
].loc_directive_seen
7028 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
7030 md
.slot
[curr
].loc_directive_seen
= 0;
7032 md
.slot
[curr
].debug_line
.flags
|= DWARF2_FLAG_BASIC_BLOCK
;
7034 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
7037 build_insn (md
.slot
+ curr
, insn
+ i
);
7039 ptr
= md
.slot
[curr
].unwind_record
;
7042 /* Set slot numbers for all remaining unwind records belonging to the
7043 current insn. There can not be any prologue/body unwind records
7045 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
7047 ptr
->slot_number
= (unsigned long) f
+ i
;
7048 ptr
->slot_frag
= frag_now
;
7050 md
.slot
[curr
].unwind_record
= NULL
;
7053 if (required_unit
== IA64_UNIT_L
)
7056 /* skip one slot for long/X-unit instructions */
7059 --md
.num_slots_in_use
;
7062 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
7064 ifix
= md
.slot
[curr
].fixup
+ j
;
7065 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
7066 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
7067 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
7068 fix
->fx_file
= md
.slot
[curr
].src_file
;
7069 fix
->fx_line
= md
.slot
[curr
].src_line
;
7072 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
7075 ia64_free_opcode (md
.slot
[curr
].idesc
);
7076 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
7077 md
.slot
[curr
].user_template
= -1;
7079 if (manual_bundling_off
)
7081 manual_bundling
= 0;
7084 curr
= (curr
+ 1) % NUM_SLOTS
;
7085 idesc
= md
.slot
[curr
].idesc
;
7088 /* A user template was specified, but the first following instruction did
7089 not fit. This can happen with or without manual bundling. */
7090 if (md
.num_slots_in_use
> 0 && last_slot
< 0)
7092 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7093 _("`%s' does not fit into %s template"),
7094 idesc
->name
, ia64_templ_desc
[template].name
);
7095 /* Drop first insn so we don't livelock. */
7096 --md
.num_slots_in_use
;
7097 know (curr
== first
);
7098 ia64_free_opcode (md
.slot
[curr
].idesc
);
7099 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
7100 md
.slot
[curr
].user_template
= -1;
7102 else if (manual_bundling
> 0)
7104 if (md
.num_slots_in_use
> 0)
7107 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7108 _("`%s' does not fit into bundle"), idesc
->name
);
7115 else if (last_slot
== 0)
7116 where
= "slots 2 or 3";
7119 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7120 _("`%s' can't go in %s of %s template"),
7121 idesc
->name
, where
, ia64_templ_desc
[template].name
);
7125 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
7126 _("Missing '}' at end of file"));
7129 know (md
.num_slots_in_use
< NUM_SLOTS
);
7131 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
7132 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
7134 number_to_chars_littleendian (f
+ 0, t0
, 8);
7135 number_to_chars_littleendian (f
+ 8, t1
, 8);
7139 md_parse_option (c
, arg
)
7146 /* Switches from the Intel assembler. */
7148 if (strcmp (arg
, "ilp64") == 0
7149 || strcmp (arg
, "lp64") == 0
7150 || strcmp (arg
, "p64") == 0)
7152 md
.flags
|= EF_IA_64_ABI64
;
7154 else if (strcmp (arg
, "ilp32") == 0)
7156 md
.flags
&= ~EF_IA_64_ABI64
;
7158 else if (strcmp (arg
, "le") == 0)
7160 md
.flags
&= ~EF_IA_64_BE
;
7161 default_big_endian
= 0;
7163 else if (strcmp (arg
, "be") == 0)
7165 md
.flags
|= EF_IA_64_BE
;
7166 default_big_endian
= 1;
7168 else if (strncmp (arg
, "unwind-check=", 13) == 0)
7171 if (strcmp (arg
, "warning") == 0)
7172 md
.unwind_check
= unwind_check_warning
;
7173 else if (strcmp (arg
, "error") == 0)
7174 md
.unwind_check
= unwind_check_error
;
7178 else if (strncmp (arg
, "hint.b=", 7) == 0)
7181 if (strcmp (arg
, "ok") == 0)
7182 md
.hint_b
= hint_b_ok
;
7183 else if (strcmp (arg
, "warning") == 0)
7184 md
.hint_b
= hint_b_warning
;
7185 else if (strcmp (arg
, "error") == 0)
7186 md
.hint_b
= hint_b_error
;
7190 else if (strncmp (arg
, "tune=", 5) == 0)
7193 if (strcmp (arg
, "itanium1") == 0)
7195 else if (strcmp (arg
, "itanium2") == 0)
7205 if (strcmp (arg
, "so") == 0)
7207 /* Suppress signon message. */
7209 else if (strcmp (arg
, "pi") == 0)
7211 /* Reject privileged instructions. FIXME */
7213 else if (strcmp (arg
, "us") == 0)
7215 /* Allow union of signed and unsigned range. FIXME */
7217 else if (strcmp (arg
, "close_fcalls") == 0)
7219 /* Do not resolve global function calls. */
7226 /* temp[="prefix"] Insert temporary labels into the object file
7227 symbol table prefixed by "prefix".
7228 Default prefix is ":temp:".
7233 /* indirect=<tgt> Assume unannotated indirect branches behavior
7234 according to <tgt> --
7235 exit: branch out from the current context (default)
7236 labels: all labels in context may be branch targets
7238 if (strncmp (arg
, "indirect=", 9) != 0)
7243 /* -X conflicts with an ignored option, use -x instead */
7245 if (!arg
|| strcmp (arg
, "explicit") == 0)
7247 /* set default mode to explicit */
7248 md
.default_explicit_mode
= 1;
7251 else if (strcmp (arg
, "auto") == 0)
7253 md
.default_explicit_mode
= 0;
7255 else if (strcmp (arg
, "none") == 0)
7259 else if (strcmp (arg
, "debug") == 0)
7263 else if (strcmp (arg
, "debugx") == 0)
7265 md
.default_explicit_mode
= 1;
7268 else if (strcmp (arg
, "debugn") == 0)
7275 as_bad (_("Unrecognized option '-x%s'"), arg
);
7280 /* nops Print nops statistics. */
7283 /* GNU specific switches for gcc. */
7284 case OPTION_MCONSTANT_GP
:
7285 md
.flags
|= EF_IA_64_CONS_GP
;
7288 case OPTION_MAUTO_PIC
:
7289 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7300 md_show_usage (stream
)
7305 --mconstant-gp mark output file as using the constant-GP model\n\
7306 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7307 --mauto-pic mark output file as using the constant-GP model\n\
7308 without function descriptors (sets ELF header flag\n\
7309 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7310 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7311 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7312 -mtune=[itanium1|itanium2]\n\
7313 tune for a specific CPU (default -mtune=itanium2)\n\
7314 -munwind-check=[warning|error]\n\
7315 unwind directive check (default -munwind-check=warning)\n\
7316 -mhint.b=[ok|warning|error]\n\
7317 hint.b check (default -mhint.b=error)\n\
7318 -x | -xexplicit turn on dependency violation checking\n\
7319 -xauto automagically remove dependency violations (default)\n\
7320 -xnone turn off dependency violation checking\n\
7321 -xdebug debug dependency violation checker\n\
7322 -xdebugn debug dependency violation checker but turn off\n\
7323 dependency violation checking\n\
7324 -xdebugx debug dependency violation checker and turn on\n\
7325 dependency violation checking\n"),
7330 ia64_after_parse_args ()
7332 if (debug_type
== DEBUG_STABS
)
7333 as_fatal (_("--gstabs is not supported for ia64"));
7336 /* Return true if TYPE fits in TEMPL at SLOT. */
7339 match (int templ
, int type
, int slot
)
7341 enum ia64_unit unit
;
7344 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7347 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7349 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7351 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7352 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7353 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7354 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7355 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7356 default: result
= 0; break;
7361 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7362 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7363 type M or I would fit in TEMPL at SLOT. */
7366 extra_goodness (int templ
, int slot
)
7371 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7373 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7379 if (match (templ
, IA64_TYPE_M
, slot
)
7380 || match (templ
, IA64_TYPE_I
, slot
))
7381 /* Favor M- and I-unit NOPs. We definitely want to avoid
7382 F-unit and B-unit may cause split-issue or less-than-optimal
7383 branch-prediction. */
7394 /* This function is called once, at assembler startup time. It sets
7395 up all the tables, etc. that the MD part of the assembler will need
7396 that can be determined before arguments are parsed. */
7400 int i
, j
, k
, t
, goodness
, best
, ok
;
7405 md
.explicit_mode
= md
.default_explicit_mode
;
7407 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7409 /* Make sure function pointers get initialized. */
7410 target_big_endian
= -1;
7411 dot_byteorder (default_big_endian
);
7413 alias_hash
= hash_new ();
7414 alias_name_hash
= hash_new ();
7415 secalias_hash
= hash_new ();
7416 secalias_name_hash
= hash_new ();
7418 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7419 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7420 &zero_address_frag
);
7422 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7423 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7424 &zero_address_frag
);
7426 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7427 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7428 &zero_address_frag
);
7430 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7431 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7432 &zero_address_frag
);
7434 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7435 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7436 &zero_address_frag
);
7438 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7439 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7440 &zero_address_frag
);
7442 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7443 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7444 &zero_address_frag
);
7446 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7447 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7448 &zero_address_frag
);
7450 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7451 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7452 &zero_address_frag
);
7454 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7455 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7456 &zero_address_frag
);
7458 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7459 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7460 &zero_address_frag
);
7462 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7463 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7464 &zero_address_frag
);
7466 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7467 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7468 &zero_address_frag
);
7470 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7471 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7472 &zero_address_frag
);
7474 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7475 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7476 &zero_address_frag
);
7478 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7479 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7480 &zero_address_frag
);
7482 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7483 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7484 &zero_address_frag
);
7486 if (md
.tune
!= itanium1
)
7488 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7490 le_nop_stop
[0] = 0x9;
7493 /* Compute the table of best templates. We compute goodness as a
7494 base 4 value, in which each match counts for 3. Match-failures
7495 result in NOPs and we use extra_goodness() to pick the execution
7496 units that are best suited for issuing the NOP. */
7497 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7498 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7499 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7502 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7505 if (match (t
, i
, 0))
7507 if (match (t
, j
, 1))
7509 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7510 goodness
= 3 + 3 + 3;
7512 goodness
= 3 + 3 + extra_goodness (t
, 2);
7514 else if (match (t
, j
, 2))
7515 goodness
= 3 + 3 + extra_goodness (t
, 1);
7519 goodness
+= extra_goodness (t
, 1);
7520 goodness
+= extra_goodness (t
, 2);
7523 else if (match (t
, i
, 1))
7525 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7528 goodness
= 3 + extra_goodness (t
, 2);
7530 else if (match (t
, i
, 2))
7531 goodness
= 3 + extra_goodness (t
, 1);
7533 if (goodness
> best
)
7536 best_template
[i
][j
][k
] = t
;
7541 #ifdef DEBUG_TEMPLATES
7542 /* For debugging changes to the best_template calculations. We don't care
7543 about combinations with invalid instructions, so start the loops at 1. */
7544 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7545 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7546 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7548 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7550 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7552 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7556 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7557 md
.slot
[i
].user_template
= -1;
7559 md
.pseudo_hash
= hash_new ();
7560 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7562 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7563 (void *) (pseudo_opcode
+ i
));
7565 as_fatal (_("ia64.md_begin: can't hash `%s': %s"),
7566 pseudo_opcode
[i
].name
, err
);
7569 md
.reg_hash
= hash_new ();
7570 md
.dynreg_hash
= hash_new ();
7571 md
.const_hash
= hash_new ();
7572 md
.entry_hash
= hash_new ();
7574 /* general registers: */
7575 declare_register_set ("r", 128, REG_GR
);
7576 declare_register ("gp", REG_GR
+ 1);
7577 declare_register ("sp", REG_GR
+ 12);
7578 declare_register ("tp", REG_GR
+ 13);
7579 declare_register_set ("ret", 4, REG_GR
+ 8);
7581 /* floating point registers: */
7582 declare_register_set ("f", 128, REG_FR
);
7583 declare_register_set ("farg", 8, REG_FR
+ 8);
7584 declare_register_set ("fret", 8, REG_FR
+ 8);
7586 /* branch registers: */
7587 declare_register_set ("b", 8, REG_BR
);
7588 declare_register ("rp", REG_BR
+ 0);
7590 /* predicate registers: */
7591 declare_register_set ("p", 64, REG_P
);
7592 declare_register ("pr", REG_PR
);
7593 declare_register ("pr.rot", REG_PR_ROT
);
7595 /* application registers: */
7596 declare_register_set ("ar", 128, REG_AR
);
7597 for (i
= 0; i
< NELEMS (ar
); ++i
)
7598 declare_register (ar
[i
].name
, REG_AR
+ ar
[i
].regnum
);
7600 /* control registers: */
7601 declare_register_set ("cr", 128, REG_CR
);
7602 for (i
= 0; i
< NELEMS (cr
); ++i
)
7603 declare_register (cr
[i
].name
, REG_CR
+ cr
[i
].regnum
);
7605 declare_register ("ip", REG_IP
);
7606 declare_register ("cfm", REG_CFM
);
7607 declare_register ("psr", REG_PSR
);
7608 declare_register ("psr.l", REG_PSR_L
);
7609 declare_register ("psr.um", REG_PSR_UM
);
7611 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7613 unsigned int regnum
= indirect_reg
[i
].regnum
;
7615 md
.indregsym
[regnum
- IND_CPUID
] = declare_register (indirect_reg
[i
].name
, regnum
);
7618 /* pseudo-registers used to specify unwind info: */
7619 declare_register ("psp", REG_PSP
);
7621 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7623 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7624 (PTR
) (const_bits
+ i
));
7626 as_fatal (_("Inserting \"%s\" into constant hash table failed: %s"),
7630 /* Set the architecture and machine depending on defaults and command line
7632 if (md
.flags
& EF_IA_64_ABI64
)
7633 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7635 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7638 as_warn (_("Could not set architecture and machine"));
7640 /* Set the pointer size and pointer shift size depending on md.flags */
7642 if (md
.flags
& EF_IA_64_ABI64
)
7644 md
.pointer_size
= 8; /* pointers are 8 bytes */
7645 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7649 md
.pointer_size
= 4; /* pointers are 4 bytes */
7650 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7653 md
.mem_offset
.hint
= 0;
7656 md
.entry_labels
= NULL
;
7659 /* Set the default options in md. Cannot do this in md_begin because
7660 that is called after md_parse_option which is where we set the
7661 options in md based on command line options. */
7664 ia64_init (argc
, argv
)
7665 int argc ATTRIBUTE_UNUSED
;
7666 char **argv ATTRIBUTE_UNUSED
;
7668 md
.flags
= MD_FLAGS_DEFAULT
;
7670 /* FIXME: We should change it to unwind_check_error someday. */
7671 md
.unwind_check
= unwind_check_warning
;
7672 md
.hint_b
= hint_b_error
;
7676 /* Return a string for the target object file format. */
7679 ia64_target_format ()
7681 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7683 if (md
.flags
& EF_IA_64_BE
)
7685 if (md
.flags
& EF_IA_64_ABI64
)
7686 #if defined(TE_AIX50)
7687 return "elf64-ia64-aix-big";
7688 #elif defined(TE_HPUX)
7689 return "elf64-ia64-hpux-big";
7691 return "elf64-ia64-big";
7694 #if defined(TE_AIX50)
7695 return "elf32-ia64-aix-big";
7696 #elif defined(TE_HPUX)
7697 return "elf32-ia64-hpux-big";
7699 return "elf32-ia64-big";
7704 if (md
.flags
& EF_IA_64_ABI64
)
7706 return "elf64-ia64-aix-little";
7708 return "elf64-ia64-little";
7712 return "elf32-ia64-aix-little";
7714 return "elf32-ia64-little";
7719 return "unknown-format";
7723 ia64_end_of_source ()
7725 /* terminate insn group upon reaching end of file: */
7726 insn_group_break (1, 0, 0);
7728 /* emits slots we haven't written yet: */
7729 ia64_flush_insns ();
7731 bfd_set_private_flags (stdoutput
, md
.flags
);
7733 md
.mem_offset
.hint
= 0;
7742 /* Make sure we don't reference input_line_pointer[-1] when that's
7748 if (md
.qp
.X_op
== O_register
)
7749 as_bad (_("qualifying predicate not followed by instruction"));
7750 md
.qp
.X_op
= O_absent
;
7752 if (ignore_input ())
7755 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7757 if (md
.detect_dv
&& !md
.explicit_mode
)
7764 as_warn (_("Explicit stops are ignored in auto mode"));
7768 insn_group_break (1, 0, 0);
7770 else if (input_line_pointer
[-1] == '{')
7772 if (md
.manual_bundling
)
7773 as_warn (_("Found '{' when manual bundling is already turned on"));
7775 CURR_SLOT
.manual_bundling_on
= 1;
7776 md
.manual_bundling
= 1;
7778 /* Bundling is only acceptable in explicit mode
7779 or when in default automatic mode. */
7780 if (md
.detect_dv
&& !md
.explicit_mode
)
7782 if (!md
.mode_explicitly_set
7783 && !md
.default_explicit_mode
)
7786 as_warn (_("Found '{' after explicit switch to automatic mode"));
7789 else if (input_line_pointer
[-1] == '}')
7791 if (!md
.manual_bundling
)
7792 as_warn (_("Found '}' when manual bundling is off"));
7794 PREV_SLOT
.manual_bundling_off
= 1;
7795 md
.manual_bundling
= 0;
7797 /* switch back to automatic mode, if applicable */
7800 && !md
.mode_explicitly_set
7801 && !md
.default_explicit_mode
)
7806 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7808 static int defining_tag
= 0;
7811 ia64_unrecognized_line (ch
)
7817 expression_and_evaluate (&md
.qp
);
7818 if (*input_line_pointer
++ != ')')
7820 as_bad (_("Expected ')'"));
7823 if (md
.qp
.X_op
!= O_register
)
7825 as_bad (_("Qualifying predicate expected"));
7828 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7830 as_bad (_("Predicate register expected"));
7842 if (md
.qp
.X_op
== O_register
)
7844 as_bad (_("Tag must come before qualifying predicate."));
7848 /* This implements just enough of read_a_source_file in read.c to
7849 recognize labels. */
7850 if (is_name_beginner (*input_line_pointer
))
7852 s
= input_line_pointer
;
7853 c
= get_symbol_end ();
7855 else if (LOCAL_LABELS_FB
7856 && ISDIGIT (*input_line_pointer
))
7859 while (ISDIGIT (*input_line_pointer
))
7860 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7861 fb_label_instance_inc (temp
);
7862 s
= fb_label_name (temp
, 0);
7863 c
= *input_line_pointer
;
7872 /* Put ':' back for error messages' sake. */
7873 *input_line_pointer
++ = ':';
7874 as_bad (_("Expected ':'"));
7881 /* Put ':' back for error messages' sake. */
7882 *input_line_pointer
++ = ':';
7883 if (*input_line_pointer
++ != ']')
7885 as_bad (_("Expected ']'"));
7890 as_bad (_("Tag name expected"));
7900 /* Not a valid line. */
7905 ia64_frob_label (sym
)
7908 struct label_fix
*fix
;
7910 /* Tags need special handling since they are not bundle breaks like
7914 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7916 fix
->next
= CURR_SLOT
.tag_fixups
;
7917 fix
->dw2_mark_labels
= FALSE
;
7918 CURR_SLOT
.tag_fixups
= fix
;
7923 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7925 md
.last_text_seg
= now_seg
;
7926 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7928 fix
->next
= CURR_SLOT
.label_fixups
;
7929 fix
->dw2_mark_labels
= dwarf2_loc_mark_labels
;
7930 CURR_SLOT
.label_fixups
= fix
;
7932 /* Keep track of how many code entry points we've seen. */
7933 if (md
.path
== md
.maxpaths
)
7936 md
.entry_labels
= (const char **)
7937 xrealloc ((void *) md
.entry_labels
,
7938 md
.maxpaths
* sizeof (char *));
7940 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7945 /* The HP-UX linker will give unresolved symbol errors for symbols
7946 that are declared but unused. This routine removes declared,
7947 unused symbols from an object. */
7949 ia64_frob_symbol (sym
)
7952 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7953 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7954 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7955 && ! S_IS_EXTERNAL (sym
)))
7962 ia64_flush_pending_output ()
7964 if (!md
.keep_pending_output
7965 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7967 /* ??? This causes many unnecessary stop bits to be emitted.
7968 Unfortunately, it isn't clear if it is safe to remove this. */
7969 insn_group_break (1, 0, 0);
7970 ia64_flush_insns ();
7974 /* Do ia64-specific expression optimization. All that's done here is
7975 to transform index expressions that are either due to the indexing
7976 of rotating registers or due to the indexing of indirect register
7979 ia64_optimize_expr (l
, op
, r
)
7986 resolve_expression (l
);
7987 if (l
->X_op
== O_register
)
7989 unsigned num_regs
= l
->X_add_number
>> 16;
7991 resolve_expression (r
);
7994 /* Left side is a .rotX-allocated register. */
7995 if (r
->X_op
!= O_constant
)
7997 as_bad (_("Rotating register index must be a non-negative constant"));
7998 r
->X_add_number
= 0;
8000 else if ((valueT
) r
->X_add_number
>= num_regs
)
8002 as_bad (_("Index out of range 0..%u"), num_regs
- 1);
8003 r
->X_add_number
= 0;
8005 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
8008 else if (l
->X_add_number
>= IND_CPUID
&& l
->X_add_number
<= IND_RR
)
8010 if (r
->X_op
!= O_register
8011 || r
->X_add_number
< REG_GR
8012 || r
->X_add_number
> REG_GR
+ 127)
8014 as_bad (_("Indirect register index must be a general register"));
8015 r
->X_add_number
= REG_GR
;
8018 l
->X_op_symbol
= md
.indregsym
[l
->X_add_number
- IND_CPUID
];
8019 l
->X_add_number
= r
->X_add_number
;
8023 as_bad (_("Index can only be applied to rotating or indirect registers"));
8024 /* Fall back to some register use of which has as little as possible
8025 side effects, to minimize subsequent error messages. */
8026 l
->X_op
= O_register
;
8027 l
->X_add_number
= REG_GR
+ 3;
8032 ia64_parse_name (name
, e
, nextcharP
)
8037 struct const_desc
*cdesc
;
8038 struct dynreg
*dr
= 0;
8045 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
8047 /* Find what relocation pseudo-function we're dealing with. */
8048 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
8049 if (pseudo_func
[idx
].name
8050 && pseudo_func
[idx
].name
[0] == name
[1]
8051 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
8053 pseudo_type
= pseudo_func
[idx
].type
;
8056 switch (pseudo_type
)
8058 case PSEUDO_FUNC_RELOC
:
8059 end
= input_line_pointer
;
8060 if (*nextcharP
!= '(')
8062 as_bad (_("Expected '('"));
8066 ++input_line_pointer
;
8068 if (*input_line_pointer
!= ')')
8070 as_bad (_("Missing ')'"));
8074 ++input_line_pointer
;
8075 if (e
->X_op
!= O_symbol
)
8077 if (e
->X_op
!= O_pseudo_fixup
)
8079 as_bad (_("Not a symbolic expression"));
8082 if (idx
!= FUNC_LT_RELATIVE
)
8084 as_bad (_("Illegal combination of relocation functions"));
8087 switch (S_GET_VALUE (e
->X_op_symbol
))
8089 case FUNC_FPTR_RELATIVE
:
8090 idx
= FUNC_LT_FPTR_RELATIVE
; break;
8091 case FUNC_DTP_MODULE
:
8092 idx
= FUNC_LT_DTP_MODULE
; break;
8093 case FUNC_DTP_RELATIVE
:
8094 idx
= FUNC_LT_DTP_RELATIVE
; break;
8095 case FUNC_TP_RELATIVE
:
8096 idx
= FUNC_LT_TP_RELATIVE
; break;
8098 as_bad (_("Illegal combination of relocation functions"));
8102 /* Make sure gas doesn't get rid of local symbols that are used
8104 e
->X_op
= O_pseudo_fixup
;
8105 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
8107 *nextcharP
= *input_line_pointer
;
8110 case PSEUDO_FUNC_CONST
:
8111 e
->X_op
= O_constant
;
8112 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8115 case PSEUDO_FUNC_REG
:
8116 e
->X_op
= O_register
;
8117 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
8126 /* first see if NAME is a known register name: */
8127 sym
= hash_find (md
.reg_hash
, name
);
8130 e
->X_op
= O_register
;
8131 e
->X_add_number
= S_GET_VALUE (sym
);
8135 cdesc
= hash_find (md
.const_hash
, name
);
8138 e
->X_op
= O_constant
;
8139 e
->X_add_number
= cdesc
->value
;
8143 /* check for inN, locN, or outN: */
8148 if (name
[1] == 'n' && ISDIGIT (name
[2]))
8156 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
8164 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
8175 /* Ignore register numbers with leading zeroes, except zero itself. */
8176 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
8178 unsigned long regnum
;
8180 /* The name is inN, locN, or outN; parse the register number. */
8181 regnum
= strtoul (name
+ idx
, &end
, 10);
8182 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
8184 if (regnum
>= dr
->num_regs
)
8187 as_bad (_("No current frame"));
8189 as_bad (_("Register number out of range 0..%u"),
8193 e
->X_op
= O_register
;
8194 e
->X_add_number
= dr
->base
+ regnum
;
8199 end
= alloca (strlen (name
) + 1);
8201 name
= ia64_canonicalize_symbol_name (end
);
8202 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8204 /* We've got ourselves the name of a rotating register set.
8205 Store the base register number in the low 16 bits of
8206 X_add_number and the size of the register set in the top 16
8208 e
->X_op
= O_register
;
8209 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8215 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8218 ia64_canonicalize_symbol_name (name
)
8221 size_t len
= strlen (name
), full
= len
;
8223 while (len
> 0 && name
[len
- 1] == '#')
8228 as_bad (_("Standalone `#' is illegal"));
8230 else if (len
< full
- 1)
8231 as_warn (_("Redundant `#' suffix operators"));
8236 /* Return true if idesc is a conditional branch instruction. This excludes
8237 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8238 because they always read/write resources regardless of the value of the
8239 qualifying predicate. br.ia must always use p0, and hence is always
8240 taken. Thus this function returns true for branches which can fall
8241 through, and which use no resources if they do fall through. */
8244 is_conditional_branch (idesc
)
8245 struct ia64_opcode
*idesc
;
8247 /* br is a conditional branch. Everything that starts with br. except
8248 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8249 Everything that starts with brl is a conditional branch. */
8250 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8251 && (idesc
->name
[2] == '\0'
8252 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8253 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8254 || idesc
->name
[2] == 'l'
8255 /* br.cond, br.call, br.clr */
8256 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8257 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8258 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8261 /* Return whether the given opcode is a taken branch. If there's any doubt,
8265 is_taken_branch (idesc
)
8266 struct ia64_opcode
*idesc
;
8268 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8269 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8272 /* Return whether the given opcode is an interruption or rfi. If there's any
8273 doubt, returns zero. */
8276 is_interruption_or_rfi (idesc
)
8277 struct ia64_opcode
*idesc
;
8279 if (strcmp (idesc
->name
, "rfi") == 0)
8284 /* Returns the index of the given dependency in the opcode's list of chks, or
8285 -1 if there is no dependency. */
8288 depends_on (depind
, idesc
)
8290 struct ia64_opcode
*idesc
;
8293 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8294 for (i
= 0; i
< dep
->nchks
; i
++)
8296 if (depind
== DEP (dep
->chks
[i
]))
8302 /* Determine a set of specific resources used for a particular resource
8303 class. Returns the number of specific resources identified For those
8304 cases which are not determinable statically, the resource returned is
8307 Meanings of value in 'NOTE':
8308 1) only read/write when the register number is explicitly encoded in the
8310 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8311 accesses CFM when qualifying predicate is in the rotating region.
8312 3) general register value is used to specify an indirect register; not
8313 determinable statically.
8314 4) only read the given resource when bits 7:0 of the indirect index
8315 register value does not match the register number of the resource; not
8316 determinable statically.
8317 5) all rules are implementation specific.
8318 6) only when both the index specified by the reader and the index specified
8319 by the writer have the same value in bits 63:61; not determinable
8321 7) only access the specified resource when the corresponding mask bit is
8323 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8324 only read when these insns reference FR2-31
8325 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8326 written when these insns write FR32-127
8327 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8329 11) The target predicates are written independently of PR[qp], but source
8330 registers are only read if PR[qp] is true. Since the state of PR[qp]
8331 cannot statically be determined, all source registers are marked used.
8332 12) This insn only reads the specified predicate register when that
8333 register is the PR[qp].
8334 13) This reference to ld-c only applies to the GR whose value is loaded
8335 with data returned from memory, not the post-incremented address register.
8336 14) The RSE resource includes the implementation-specific RSE internal
8337 state resources. At least one (and possibly more) of these resources are
8338 read by each instruction listed in IC:rse-readers. At least one (and
8339 possibly more) of these resources are written by each insn listed in
8341 15+16) Represents reserved instructions, which the assembler does not
8343 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
8344 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
8346 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8347 this code; there are no dependency violations based on memory access.
8350 #define MAX_SPECS 256
8355 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8356 const struct ia64_dependency
*dep
;
8357 struct ia64_opcode
*idesc
;
8358 int type
; /* is this a DV chk or a DV reg? */
8359 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8360 int note
; /* resource note for this insn's usage */
8361 int path
; /* which execution path to examine */
8368 if (dep
->mode
== IA64_DV_WAW
8369 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8370 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8373 /* template for any resources we identify */
8374 tmpl
.dependency
= dep
;
8376 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8377 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8378 tmpl
.link_to_qp_branch
= 1;
8379 tmpl
.mem_offset
.hint
= 0;
8380 tmpl
.mem_offset
.offset
= 0;
8381 tmpl
.mem_offset
.base
= 0;
8384 tmpl
.cmp_type
= CMP_NONE
;
8391 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8392 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8393 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8395 /* we don't need to track these */
8396 if (dep
->semantics
== IA64_DVS_NONE
)
8399 switch (dep
->specifier
)
8404 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8406 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8407 if (regno
>= 0 && regno
<= 7)
8409 specs
[count
] = tmpl
;
8410 specs
[count
++].index
= regno
;
8416 for (i
= 0; i
< 8; i
++)
8418 specs
[count
] = tmpl
;
8419 specs
[count
++].index
= i
;
8428 case IA64_RS_AR_UNAT
:
8429 /* This is a mov =AR or mov AR= instruction. */
8430 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8432 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8433 if (regno
== AR_UNAT
)
8435 specs
[count
++] = tmpl
;
8440 /* This is a spill/fill, or other instruction that modifies the
8443 /* Unless we can determine the specific bits used, mark the whole
8444 thing; bits 8:3 of the memory address indicate the bit used in
8445 UNAT. The .mem.offset hint may be used to eliminate a small
8446 subset of conflicts. */
8447 specs
[count
] = tmpl
;
8448 if (md
.mem_offset
.hint
)
8451 fprintf (stderr
, " Using hint for spill/fill\n");
8452 /* The index isn't actually used, just set it to something
8453 approximating the bit index. */
8454 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8455 specs
[count
].mem_offset
.hint
= 1;
8456 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8457 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8461 specs
[count
++].specific
= 0;
8469 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8471 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8472 if ((regno
>= 8 && regno
<= 15)
8473 || (regno
>= 20 && regno
<= 23)
8474 || (regno
>= 31 && regno
<= 39)
8475 || (regno
>= 41 && regno
<= 47)
8476 || (regno
>= 67 && regno
<= 111))
8478 specs
[count
] = tmpl
;
8479 specs
[count
++].index
= regno
;
8492 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8494 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8495 if ((regno
>= 48 && regno
<= 63)
8496 || (regno
>= 112 && regno
<= 127))
8498 specs
[count
] = tmpl
;
8499 specs
[count
++].index
= regno
;
8505 for (i
= 48; i
< 64; i
++)
8507 specs
[count
] = tmpl
;
8508 specs
[count
++].index
= i
;
8510 for (i
= 112; i
< 128; i
++)
8512 specs
[count
] = tmpl
;
8513 specs
[count
++].index
= i
;
8531 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8532 if (idesc
->operands
[i
] == IA64_OPND_B1
8533 || idesc
->operands
[i
] == IA64_OPND_B2
)
8535 specs
[count
] = tmpl
;
8536 specs
[count
++].index
=
8537 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8542 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8543 if (idesc
->operands
[i
] == IA64_OPND_B1
8544 || idesc
->operands
[i
] == IA64_OPND_B2
)
8546 specs
[count
] = tmpl
;
8547 specs
[count
++].index
=
8548 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8554 case IA64_RS_CPUID
: /* four or more registers */
8557 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8559 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8560 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8563 specs
[count
] = tmpl
;
8564 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8568 specs
[count
] = tmpl
;
8569 specs
[count
++].specific
= 0;
8579 case IA64_RS_DBR
: /* four or more registers */
8582 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8584 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8585 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8588 specs
[count
] = tmpl
;
8589 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8593 specs
[count
] = tmpl
;
8594 specs
[count
++].specific
= 0;
8598 else if (note
== 0 && !rsrc_write
)
8600 specs
[count
] = tmpl
;
8601 specs
[count
++].specific
= 0;
8609 case IA64_RS_IBR
: /* four or more registers */
8612 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8614 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8615 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8618 specs
[count
] = tmpl
;
8619 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8623 specs
[count
] = tmpl
;
8624 specs
[count
++].specific
= 0;
8637 /* These are implementation specific. Force all references to
8638 conflict with all other references. */
8639 specs
[count
] = tmpl
;
8640 specs
[count
++].specific
= 0;
8648 case IA64_RS_PKR
: /* 16 or more registers */
8649 if (note
== 3 || note
== 4)
8651 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8653 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8654 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8659 specs
[count
] = tmpl
;
8660 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8663 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8665 /* Uses all registers *except* the one in R3. */
8666 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8668 specs
[count
] = tmpl
;
8669 specs
[count
++].index
= i
;
8675 specs
[count
] = tmpl
;
8676 specs
[count
++].specific
= 0;
8683 specs
[count
] = tmpl
;
8684 specs
[count
++].specific
= 0;
8688 case IA64_RS_PMC
: /* four or more registers */
8691 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8692 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8695 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8697 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8698 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8701 specs
[count
] = tmpl
;
8702 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8706 specs
[count
] = tmpl
;
8707 specs
[count
++].specific
= 0;
8717 case IA64_RS_PMD
: /* four or more registers */
8720 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8722 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8723 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8726 specs
[count
] = tmpl
;
8727 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8731 specs
[count
] = tmpl
;
8732 specs
[count
++].specific
= 0;
8742 case IA64_RS_RR
: /* eight registers */
8745 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8747 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8748 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8751 specs
[count
] = tmpl
;
8752 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8756 specs
[count
] = tmpl
;
8757 specs
[count
++].specific
= 0;
8761 else if (note
== 0 && !rsrc_write
)
8763 specs
[count
] = tmpl
;
8764 specs
[count
++].specific
= 0;
8772 case IA64_RS_CR_IRR
:
8775 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8776 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8778 && idesc
->operands
[1] == IA64_OPND_CR3
8781 for (i
= 0; i
< 4; i
++)
8783 specs
[count
] = tmpl
;
8784 specs
[count
++].index
= CR_IRR0
+ i
;
8790 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8791 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8793 && regno
<= CR_IRR3
)
8795 specs
[count
] = tmpl
;
8796 specs
[count
++].index
= regno
;
8805 case IA64_RS_CR_LRR
:
8812 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8813 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8814 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8816 specs
[count
] = tmpl
;
8817 specs
[count
++].index
= regno
;
8825 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8827 specs
[count
] = tmpl
;
8828 specs
[count
++].index
=
8829 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8844 else if (rsrc_write
)
8846 if (dep
->specifier
== IA64_RS_FRb
8847 && idesc
->operands
[0] == IA64_OPND_F1
)
8849 specs
[count
] = tmpl
;
8850 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8855 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8857 if (idesc
->operands
[i
] == IA64_OPND_F2
8858 || idesc
->operands
[i
] == IA64_OPND_F3
8859 || idesc
->operands
[i
] == IA64_OPND_F4
)
8861 specs
[count
] = tmpl
;
8862 specs
[count
++].index
=
8863 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8872 /* This reference applies only to the GR whose value is loaded with
8873 data returned from memory. */
8874 specs
[count
] = tmpl
;
8875 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8881 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8882 if (idesc
->operands
[i
] == IA64_OPND_R1
8883 || idesc
->operands
[i
] == IA64_OPND_R2
8884 || idesc
->operands
[i
] == IA64_OPND_R3
)
8886 specs
[count
] = tmpl
;
8887 specs
[count
++].index
=
8888 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8890 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8891 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8892 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8894 specs
[count
] = tmpl
;
8895 specs
[count
++].index
=
8896 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8901 /* Look for anything that reads a GR. */
8902 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8904 if (idesc
->operands
[i
] == IA64_OPND_MR3
8905 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8906 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8907 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8908 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8909 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8910 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8911 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8912 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8913 || ((i
>= idesc
->num_outputs
)
8914 && (idesc
->operands
[i
] == IA64_OPND_R1
8915 || idesc
->operands
[i
] == IA64_OPND_R2
8916 || idesc
->operands
[i
] == IA64_OPND_R3
8917 /* addl source register. */
8918 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8920 specs
[count
] = tmpl
;
8921 specs
[count
++].index
=
8922 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8933 /* This is the same as IA64_RS_PRr, except that the register range is
8934 from 1 - 15, and there are no rotating register reads/writes here. */
8938 for (i
= 1; i
< 16; i
++)
8940 specs
[count
] = tmpl
;
8941 specs
[count
++].index
= i
;
8947 /* Mark only those registers indicated by the mask. */
8950 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8951 for (i
= 1; i
< 16; i
++)
8952 if (mask
& ((valueT
) 1 << i
))
8954 specs
[count
] = tmpl
;
8955 specs
[count
++].index
= i
;
8963 else if (note
== 11) /* note 11 implies note 1 as well */
8967 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8969 if (idesc
->operands
[i
] == IA64_OPND_P1
8970 || idesc
->operands
[i
] == IA64_OPND_P2
)
8972 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8973 if (regno
>= 1 && regno
< 16)
8975 specs
[count
] = tmpl
;
8976 specs
[count
++].index
= regno
;
8986 else if (note
== 12)
8988 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8990 specs
[count
] = tmpl
;
8991 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8998 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8999 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9000 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9001 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9003 if ((idesc
->operands
[0] == IA64_OPND_P1
9004 || idesc
->operands
[0] == IA64_OPND_P2
)
9005 && p1
>= 1 && p1
< 16)
9007 specs
[count
] = tmpl
;
9008 specs
[count
].cmp_type
=
9009 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9010 specs
[count
++].index
= p1
;
9012 if ((idesc
->operands
[1] == IA64_OPND_P1
9013 || idesc
->operands
[1] == IA64_OPND_P2
)
9014 && p2
>= 1 && p2
< 16)
9016 specs
[count
] = tmpl
;
9017 specs
[count
].cmp_type
=
9018 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9019 specs
[count
++].index
= p2
;
9024 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
9026 specs
[count
] = tmpl
;
9027 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9029 if (idesc
->operands
[1] == IA64_OPND_PR
)
9031 for (i
= 1; i
< 16; i
++)
9033 specs
[count
] = tmpl
;
9034 specs
[count
++].index
= i
;
9045 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
9046 simplified cases of this. */
9050 for (i
= 16; i
< 63; i
++)
9052 specs
[count
] = tmpl
;
9053 specs
[count
++].index
= i
;
9059 /* Mark only those registers indicated by the mask. */
9061 && idesc
->operands
[0] == IA64_OPND_PR
)
9063 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9064 if (mask
& ((valueT
) 1 << 16))
9065 for (i
= 16; i
< 63; i
++)
9067 specs
[count
] = tmpl
;
9068 specs
[count
++].index
= i
;
9072 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
9074 for (i
= 16; i
< 63; i
++)
9076 specs
[count
] = tmpl
;
9077 specs
[count
++].index
= i
;
9085 else if (note
== 11) /* note 11 implies note 1 as well */
9089 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9091 if (idesc
->operands
[i
] == IA64_OPND_P1
9092 || idesc
->operands
[i
] == IA64_OPND_P2
)
9094 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9095 if (regno
>= 16 && regno
< 63)
9097 specs
[count
] = tmpl
;
9098 specs
[count
++].index
= regno
;
9108 else if (note
== 12)
9110 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9112 specs
[count
] = tmpl
;
9113 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9120 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9121 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9122 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9123 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9125 if ((idesc
->operands
[0] == IA64_OPND_P1
9126 || idesc
->operands
[0] == IA64_OPND_P2
)
9127 && p1
>= 16 && p1
< 63)
9129 specs
[count
] = tmpl
;
9130 specs
[count
].cmp_type
=
9131 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9132 specs
[count
++].index
= p1
;
9134 if ((idesc
->operands
[1] == IA64_OPND_P1
9135 || idesc
->operands
[1] == IA64_OPND_P2
)
9136 && p2
>= 16 && p2
< 63)
9138 specs
[count
] = tmpl
;
9139 specs
[count
].cmp_type
=
9140 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9141 specs
[count
++].index
= p2
;
9146 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
9148 specs
[count
] = tmpl
;
9149 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
9151 if (idesc
->operands
[1] == IA64_OPND_PR
)
9153 for (i
= 16; i
< 63; i
++)
9155 specs
[count
] = tmpl
;
9156 specs
[count
++].index
= i
;
9168 /* Verify that the instruction is using the PSR bit indicated in
9172 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
9174 if (dep
->regindex
< 6)
9176 specs
[count
++] = tmpl
;
9179 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
9181 if (dep
->regindex
< 32
9182 || dep
->regindex
== 35
9183 || dep
->regindex
== 36
9184 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
9186 specs
[count
++] = tmpl
;
9189 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
9191 if (dep
->regindex
< 32
9192 || dep
->regindex
== 35
9193 || dep
->regindex
== 36
9194 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9196 specs
[count
++] = tmpl
;
9201 /* Several PSR bits have very specific dependencies. */
9202 switch (dep
->regindex
)
9205 specs
[count
++] = tmpl
;
9210 specs
[count
++] = tmpl
;
9214 /* Only certain CR accesses use PSR.ic */
9215 if (idesc
->operands
[0] == IA64_OPND_CR3
9216 || idesc
->operands
[1] == IA64_OPND_CR3
)
9219 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9222 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9237 specs
[count
++] = tmpl
;
9246 specs
[count
++] = tmpl
;
9250 /* Only some AR accesses use cpl */
9251 if (idesc
->operands
[0] == IA64_OPND_AR3
9252 || idesc
->operands
[1] == IA64_OPND_AR3
)
9255 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9258 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9265 && regno
<= AR_K7
))))
9267 specs
[count
++] = tmpl
;
9272 specs
[count
++] = tmpl
;
9282 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9284 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9290 if (mask
& ((valueT
) 1 << dep
->regindex
))
9292 specs
[count
++] = tmpl
;
9297 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9298 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9299 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9300 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9302 if (idesc
->operands
[i
] == IA64_OPND_F1
9303 || idesc
->operands
[i
] == IA64_OPND_F2
9304 || idesc
->operands
[i
] == IA64_OPND_F3
9305 || idesc
->operands
[i
] == IA64_OPND_F4
)
9307 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9308 if (reg
>= min
&& reg
<= max
)
9310 specs
[count
++] = tmpl
;
9317 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9318 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9319 /* mfh is read on writes to FR32-127; mfl is read on writes to
9321 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9323 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9325 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9326 if (reg
>= min
&& reg
<= max
)
9328 specs
[count
++] = tmpl
;
9333 else if (note
== 10)
9335 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9337 if (idesc
->operands
[i
] == IA64_OPND_R1
9338 || idesc
->operands
[i
] == IA64_OPND_R2
9339 || idesc
->operands
[i
] == IA64_OPND_R3
)
9341 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9342 if (regno
>= 16 && regno
<= 31)
9344 specs
[count
++] = tmpl
;
9355 case IA64_RS_AR_FPSR
:
9356 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9358 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9359 if (regno
== AR_FPSR
)
9361 specs
[count
++] = tmpl
;
9366 specs
[count
++] = tmpl
;
9371 /* Handle all AR[REG] resources */
9372 if (note
== 0 || note
== 1)
9374 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9375 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9376 && regno
== dep
->regindex
)
9378 specs
[count
++] = tmpl
;
9380 /* other AR[REG] resources may be affected by AR accesses */
9381 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9384 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9385 switch (dep
->regindex
)
9391 if (regno
== AR_BSPSTORE
)
9393 specs
[count
++] = tmpl
;
9397 (regno
== AR_BSPSTORE
9398 || regno
== AR_RNAT
))
9400 specs
[count
++] = tmpl
;
9405 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9408 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9409 switch (dep
->regindex
)
9414 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9416 specs
[count
++] = tmpl
;
9423 specs
[count
++] = tmpl
;
9433 /* Handle all CR[REG] resources.
9434 ??? FIXME: The rule 17 isn't really handled correctly. */
9435 if (note
== 0 || note
== 1 || note
== 17)
9437 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9439 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9440 if (regno
== dep
->regindex
)
9442 specs
[count
++] = tmpl
;
9444 else if (!rsrc_write
)
9446 /* Reads from CR[IVR] affect other resources. */
9447 if (regno
== CR_IVR
)
9449 if ((dep
->regindex
>= CR_IRR0
9450 && dep
->regindex
<= CR_IRR3
)
9451 || dep
->regindex
== CR_TPR
)
9453 specs
[count
++] = tmpl
;
9460 specs
[count
++] = tmpl
;
9469 case IA64_RS_INSERVICE
:
9470 /* look for write of EOI (67) or read of IVR (65) */
9471 if ((idesc
->operands
[0] == IA64_OPND_CR3
9472 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9473 || (idesc
->operands
[1] == IA64_OPND_CR3
9474 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9476 specs
[count
++] = tmpl
;
9483 specs
[count
++] = tmpl
;
9494 specs
[count
++] = tmpl
;
9498 /* Check if any of the registers accessed are in the rotating region.
9499 mov to/from pr accesses CFM only when qp_regno is in the rotating
9501 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9503 if (idesc
->operands
[i
] == IA64_OPND_R1
9504 || idesc
->operands
[i
] == IA64_OPND_R2
9505 || idesc
->operands
[i
] == IA64_OPND_R3
)
9507 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9508 /* Assumes that md.rot.num_regs is always valid */
9509 if (md
.rot
.num_regs
> 0
9511 && num
< 31 + md
.rot
.num_regs
)
9513 specs
[count
] = tmpl
;
9514 specs
[count
++].specific
= 0;
9517 else if (idesc
->operands
[i
] == IA64_OPND_F1
9518 || idesc
->operands
[i
] == IA64_OPND_F2
9519 || idesc
->operands
[i
] == IA64_OPND_F3
9520 || idesc
->operands
[i
] == IA64_OPND_F4
)
9522 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9525 specs
[count
] = tmpl
;
9526 specs
[count
++].specific
= 0;
9529 else if (idesc
->operands
[i
] == IA64_OPND_P1
9530 || idesc
->operands
[i
] == IA64_OPND_P2
)
9532 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9535 specs
[count
] = tmpl
;
9536 specs
[count
++].specific
= 0;
9540 if (CURR_SLOT
.qp_regno
> 15)
9542 specs
[count
] = tmpl
;
9543 specs
[count
++].specific
= 0;
9548 /* This is the same as IA64_RS_PRr, except simplified to account for
9549 the fact that there is only one register. */
9553 specs
[count
++] = tmpl
;
9558 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9559 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9560 if (mask
& ((valueT
) 1 << 63))
9561 specs
[count
++] = tmpl
;
9563 else if (note
== 11)
9565 if ((idesc
->operands
[0] == IA64_OPND_P1
9566 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9567 || (idesc
->operands
[1] == IA64_OPND_P2
9568 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9570 specs
[count
++] = tmpl
;
9573 else if (note
== 12)
9575 if (CURR_SLOT
.qp_regno
== 63)
9577 specs
[count
++] = tmpl
;
9584 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9585 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9586 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9587 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9590 && (idesc
->operands
[0] == IA64_OPND_P1
9591 || idesc
->operands
[0] == IA64_OPND_P2
))
9593 specs
[count
] = tmpl
;
9594 specs
[count
++].cmp_type
=
9595 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9598 && (idesc
->operands
[1] == IA64_OPND_P1
9599 || idesc
->operands
[1] == IA64_OPND_P2
))
9601 specs
[count
] = tmpl
;
9602 specs
[count
++].cmp_type
=
9603 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9608 if (CURR_SLOT
.qp_regno
== 63)
9610 specs
[count
++] = tmpl
;
9621 /* FIXME we can identify some individual RSE written resources, but RSE
9622 read resources have not yet been completely identified, so for now
9623 treat RSE as a single resource */
9624 if (strncmp (idesc
->name
, "mov", 3) == 0)
9628 if (idesc
->operands
[0] == IA64_OPND_AR3
9629 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9631 specs
[count
++] = tmpl
;
9636 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9638 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9639 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9641 specs
[count
++] = tmpl
;
9644 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9646 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9647 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9648 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9650 specs
[count
++] = tmpl
;
9657 specs
[count
++] = tmpl
;
9662 /* FIXME -- do any of these need to be non-specific? */
9663 specs
[count
++] = tmpl
;
9667 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9674 /* Clear branch flags on marked resources. This breaks the link between the
9675 QP of the marking instruction and a subsequent branch on the same QP. */
9678 clear_qp_branch_flag (mask
)
9682 for (i
= 0; i
< regdepslen
; i
++)
9684 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9685 if ((bit
& mask
) != 0)
9687 regdeps
[i
].link_to_qp_branch
= 0;
9692 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9693 any mutexes which contain one of the PRs and create new ones when
9697 update_qp_mutex (valueT mask
)
9703 while (i
< qp_mutexeslen
)
9705 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9707 /* If it destroys and creates the same mutex, do nothing. */
9708 if (qp_mutexes
[i
].prmask
== mask
9709 && qp_mutexes
[i
].path
== md
.path
)
9720 fprintf (stderr
, " Clearing mutex relation");
9721 print_prmask (qp_mutexes
[i
].prmask
);
9722 fprintf (stderr
, "\n");
9725 /* Deal with the old mutex with more than 3+ PRs only if
9726 the new mutex on the same execution path with it.
9728 FIXME: The 3+ mutex support is incomplete.
9729 dot_pred_rel () may be a better place to fix it. */
9730 if (qp_mutexes
[i
].path
== md
.path
)
9732 /* If it is a proper subset of the mutex, create a
9735 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9738 qp_mutexes
[i
].prmask
&= ~mask
;
9739 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9741 /* Modify the mutex if there are more than one
9749 /* Remove the mutex. */
9750 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9758 add_qp_mutex (mask
);
9763 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9765 Any changes to a PR clears the mutex relations which include that PR. */
9768 clear_qp_mutex (mask
)
9774 while (i
< qp_mutexeslen
)
9776 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9780 fprintf (stderr
, " Clearing mutex relation");
9781 print_prmask (qp_mutexes
[i
].prmask
);
9782 fprintf (stderr
, "\n");
9784 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9791 /* Clear implies relations which contain PRs in the given masks.
9792 P1_MASK indicates the source of the implies relation, while P2_MASK
9793 indicates the implied PR. */
9796 clear_qp_implies (p1_mask
, p2_mask
)
9803 while (i
< qp_implieslen
)
9805 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9806 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9809 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9810 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9811 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9818 /* Add the PRs specified to the list of implied relations. */
9821 add_qp_imply (p1
, p2
)
9828 /* p0 is not meaningful here. */
9829 if (p1
== 0 || p2
== 0)
9835 /* If it exists already, ignore it. */
9836 for (i
= 0; i
< qp_implieslen
; i
++)
9838 if (qp_implies
[i
].p1
== p1
9839 && qp_implies
[i
].p2
== p2
9840 && qp_implies
[i
].path
== md
.path
9841 && !qp_implies
[i
].p2_branched
)
9845 if (qp_implieslen
== qp_impliestotlen
)
9847 qp_impliestotlen
+= 20;
9848 qp_implies
= (struct qp_imply
*)
9849 xrealloc ((void *) qp_implies
,
9850 qp_impliestotlen
* sizeof (struct qp_imply
));
9853 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9854 qp_implies
[qp_implieslen
].p1
= p1
;
9855 qp_implies
[qp_implieslen
].p2
= p2
;
9856 qp_implies
[qp_implieslen
].path
= md
.path
;
9857 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9859 /* Add in the implied transitive relations; for everything that p2 implies,
9860 make p1 imply that, too; for everything that implies p1, make it imply p2
9862 for (i
= 0; i
< qp_implieslen
; i
++)
9864 if (qp_implies
[i
].p1
== p2
)
9865 add_qp_imply (p1
, qp_implies
[i
].p2
);
9866 if (qp_implies
[i
].p2
== p1
)
9867 add_qp_imply (qp_implies
[i
].p1
, p2
);
9869 /* Add in mutex relations implied by this implies relation; for each mutex
9870 relation containing p2, duplicate it and replace p2 with p1. */
9871 bit
= (valueT
) 1 << p1
;
9872 mask
= (valueT
) 1 << p2
;
9873 for (i
= 0; i
< qp_mutexeslen
; i
++)
9875 if (qp_mutexes
[i
].prmask
& mask
)
9876 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9880 /* Add the PRs specified in the mask to the mutex list; this means that only
9881 one of the PRs can be true at any time. PR0 should never be included in
9891 if (qp_mutexeslen
== qp_mutexestotlen
)
9893 qp_mutexestotlen
+= 20;
9894 qp_mutexes
= (struct qpmutex
*)
9895 xrealloc ((void *) qp_mutexes
,
9896 qp_mutexestotlen
* sizeof (struct qpmutex
));
9900 fprintf (stderr
, " Registering mutex on");
9901 print_prmask (mask
);
9902 fprintf (stderr
, "\n");
9904 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9905 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9909 has_suffix_p (name
, suffix
)
9913 size_t namelen
= strlen (name
);
9914 size_t sufflen
= strlen (suffix
);
9916 if (namelen
<= sufflen
)
9918 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9922 clear_register_values ()
9926 fprintf (stderr
, " Clearing register values\n");
9927 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9928 gr_values
[i
].known
= 0;
9931 /* Keep track of register values/changes which affect DV tracking.
9933 optimization note: should add a flag to classes of insns where otherwise we
9934 have to examine a group of strings to identify them. */
9937 note_register_values (idesc
)
9938 struct ia64_opcode
*idesc
;
9940 valueT qp_changemask
= 0;
9943 /* Invalidate values for registers being written to. */
9944 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9946 if (idesc
->operands
[i
] == IA64_OPND_R1
9947 || idesc
->operands
[i
] == IA64_OPND_R2
9948 || idesc
->operands
[i
] == IA64_OPND_R3
)
9950 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9951 if (regno
> 0 && regno
< NELEMS (gr_values
))
9952 gr_values
[regno
].known
= 0;
9954 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9956 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9957 if (regno
> 0 && regno
< 4)
9958 gr_values
[regno
].known
= 0;
9960 else if (idesc
->operands
[i
] == IA64_OPND_P1
9961 || idesc
->operands
[i
] == IA64_OPND_P2
)
9963 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9964 qp_changemask
|= (valueT
) 1 << regno
;
9966 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9968 if (idesc
->operands
[2] & (valueT
) 0x10000)
9969 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9971 qp_changemask
= idesc
->operands
[2];
9974 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9976 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9977 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9979 qp_changemask
= idesc
->operands
[1];
9980 qp_changemask
&= ~(valueT
) 0xFFFF;
9985 /* Always clear qp branch flags on any PR change. */
9986 /* FIXME there may be exceptions for certain compares. */
9987 clear_qp_branch_flag (qp_changemask
);
9989 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9990 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9992 qp_changemask
|= ~(valueT
) 0xFFFF;
9993 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9995 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9996 gr_values
[i
].known
= 0;
9998 clear_qp_mutex (qp_changemask
);
9999 clear_qp_implies (qp_changemask
, qp_changemask
);
10001 /* After a call, all register values are undefined, except those marked
10003 else if (strncmp (idesc
->name
, "br.call", 6) == 0
10004 || strncmp (idesc
->name
, "brl.call", 7) == 0)
10006 /* FIXME keep GR values which are marked as "safe_across_calls" */
10007 clear_register_values ();
10008 clear_qp_mutex (~qp_safe_across_calls
);
10009 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
10010 clear_qp_branch_flag (~qp_safe_across_calls
);
10012 else if (is_interruption_or_rfi (idesc
)
10013 || is_taken_branch (idesc
))
10015 clear_register_values ();
10016 clear_qp_mutex (~(valueT
) 0);
10017 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
10019 /* Look for mutex and implies relations. */
10020 else if ((idesc
->operands
[0] == IA64_OPND_P1
10021 || idesc
->operands
[0] == IA64_OPND_P2
)
10022 && (idesc
->operands
[1] == IA64_OPND_P1
10023 || idesc
->operands
[1] == IA64_OPND_P2
))
10025 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
10026 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
10027 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
10028 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
10030 /* If both PRs are PR0, we can't really do anything. */
10031 if (p1
== 0 && p2
== 0)
10034 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
10036 /* In general, clear mutexes and implies which include P1 or P2,
10037 with the following exceptions. */
10038 else if (has_suffix_p (idesc
->name
, ".or.andcm")
10039 || has_suffix_p (idesc
->name
, ".and.orcm"))
10041 clear_qp_implies (p2mask
, p1mask
);
10043 else if (has_suffix_p (idesc
->name
, ".andcm")
10044 || has_suffix_p (idesc
->name
, ".and"))
10046 clear_qp_implies (0, p1mask
| p2mask
);
10048 else if (has_suffix_p (idesc
->name
, ".orcm")
10049 || has_suffix_p (idesc
->name
, ".or"))
10051 clear_qp_mutex (p1mask
| p2mask
);
10052 clear_qp_implies (p1mask
| p2mask
, 0);
10058 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
10060 /* If one of the PRs is PR0, we call clear_qp_mutex. */
10061 if (p1
== 0 || p2
== 0)
10062 clear_qp_mutex (p1mask
| p2mask
);
10064 added
= update_qp_mutex (p1mask
| p2mask
);
10066 if (CURR_SLOT
.qp_regno
== 0
10067 || has_suffix_p (idesc
->name
, ".unc"))
10069 if (added
== 0 && p1
&& p2
)
10070 add_qp_mutex (p1mask
| p2mask
);
10071 if (CURR_SLOT
.qp_regno
!= 0)
10074 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
10076 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
10081 /* Look for mov imm insns into GRs. */
10082 else if (idesc
->operands
[0] == IA64_OPND_R1
10083 && (idesc
->operands
[1] == IA64_OPND_IMM22
10084 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
10085 && CURR_SLOT
.opnd
[1].X_op
== O_constant
10086 && (strcmp (idesc
->name
, "mov") == 0
10087 || strcmp (idesc
->name
, "movl") == 0))
10089 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10090 if (regno
> 0 && regno
< NELEMS (gr_values
))
10092 gr_values
[regno
].known
= 1;
10093 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
10094 gr_values
[regno
].path
= md
.path
;
10097 fprintf (stderr
, " Know gr%d = ", regno
);
10098 fprintf_vma (stderr
, gr_values
[regno
].value
);
10099 fputs ("\n", stderr
);
10103 /* Look for dep.z imm insns. */
10104 else if (idesc
->operands
[0] == IA64_OPND_R1
10105 && idesc
->operands
[1] == IA64_OPND_IMM8
10106 && strcmp (idesc
->name
, "dep.z") == 0)
10108 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
10109 if (regno
> 0 && regno
< NELEMS (gr_values
))
10111 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
10113 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
10114 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
10115 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
10116 gr_values
[regno
].known
= 1;
10117 gr_values
[regno
].value
= value
;
10118 gr_values
[regno
].path
= md
.path
;
10121 fprintf (stderr
, " Know gr%d = ", regno
);
10122 fprintf_vma (stderr
, gr_values
[regno
].value
);
10123 fputs ("\n", stderr
);
10129 clear_qp_mutex (qp_changemask
);
10130 clear_qp_implies (qp_changemask
, qp_changemask
);
10134 /* Return whether the given predicate registers are currently mutex. */
10137 qp_mutex (p1
, p2
, path
)
10147 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
10148 for (i
= 0; i
< qp_mutexeslen
; i
++)
10150 if (qp_mutexes
[i
].path
>= path
10151 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
10158 /* Return whether the given resource is in the given insn's list of chks
10159 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10163 resources_match (rs
, idesc
, note
, qp_regno
, path
)
10165 struct ia64_opcode
*idesc
;
10170 struct rsrc specs
[MAX_SPECS
];
10173 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10174 we don't need to check. One exception is note 11, which indicates that
10175 target predicates are written regardless of PR[qp]. */
10176 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
10180 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
10181 while (count
-- > 0)
10183 /* UNAT checking is a bit more specific than other resources */
10184 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
10185 && specs
[count
].mem_offset
.hint
10186 && rs
->mem_offset
.hint
)
10188 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
10190 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
10191 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10198 /* Skip apparent PR write conflicts where both writes are an AND or both
10199 writes are an OR. */
10200 if (rs
->dependency
->specifier
== IA64_RS_PR
10201 || rs
->dependency
->specifier
== IA64_RS_PRr
10202 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10204 if (specs
[count
].cmp_type
!= CMP_NONE
10205 && specs
[count
].cmp_type
== rs
->cmp_type
)
10208 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10209 dv_mode
[rs
->dependency
->mode
],
10210 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10211 specs
[count
].index
: 63);
10216 " %s on parallel compare conflict %s vs %s on PR%d\n",
10217 dv_mode
[rs
->dependency
->mode
],
10218 dv_cmp_type
[rs
->cmp_type
],
10219 dv_cmp_type
[specs
[count
].cmp_type
],
10220 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10221 specs
[count
].index
: 63);
10225 /* If either resource is not specific, conservatively assume a conflict
10227 if (!specs
[count
].specific
|| !rs
->specific
)
10229 else if (specs
[count
].index
== rs
->index
)
10236 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10237 insert a stop to create the break. Update all resource dependencies
10238 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10239 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10240 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10244 insn_group_break (insert_stop
, qp_regno
, save_current
)
10251 if (insert_stop
&& md
.num_slots_in_use
> 0)
10252 PREV_SLOT
.end_of_insn_group
= 1;
10256 fprintf (stderr
, " Insn group break%s",
10257 (insert_stop
? " (w/stop)" : ""));
10259 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10260 fprintf (stderr
, "\n");
10264 while (i
< regdepslen
)
10266 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10269 && regdeps
[i
].qp_regno
!= qp_regno
)
10276 && CURR_SLOT
.src_file
== regdeps
[i
].file
10277 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10283 /* clear dependencies which are automatically cleared by a stop, or
10284 those that have reached the appropriate state of insn serialization */
10285 if (dep
->semantics
== IA64_DVS_IMPLIED
10286 || dep
->semantics
== IA64_DVS_IMPLIEDF
10287 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10289 print_dependency ("Removing", i
);
10290 regdeps
[i
] = regdeps
[--regdepslen
];
10294 if (dep
->semantics
== IA64_DVS_DATA
10295 || dep
->semantics
== IA64_DVS_INSTR
10296 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10298 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10299 regdeps
[i
].insn_srlz
= STATE_STOP
;
10300 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10301 regdeps
[i
].data_srlz
= STATE_STOP
;
10308 /* Add the given resource usage spec to the list of active dependencies. */
10311 mark_resource (idesc
, dep
, spec
, depind
, path
)
10312 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10313 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10318 if (regdepslen
== regdepstotlen
)
10320 regdepstotlen
+= 20;
10321 regdeps
= (struct rsrc
*)
10322 xrealloc ((void *) regdeps
,
10323 regdepstotlen
* sizeof (struct rsrc
));
10326 regdeps
[regdepslen
] = *spec
;
10327 regdeps
[regdepslen
].depind
= depind
;
10328 regdeps
[regdepslen
].path
= path
;
10329 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10330 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10332 print_dependency ("Adding", regdepslen
);
10338 print_dependency (action
, depind
)
10339 const char *action
;
10344 fprintf (stderr
, " %s %s '%s'",
10345 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10346 (regdeps
[depind
].dependency
)->name
);
10347 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10348 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10349 if (regdeps
[depind
].mem_offset
.hint
)
10351 fputs (" ", stderr
);
10352 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10353 fputs ("+", stderr
);
10354 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10356 fprintf (stderr
, "\n");
10361 instruction_serialization ()
10365 fprintf (stderr
, " Instruction serialization\n");
10366 for (i
= 0; i
< regdepslen
; i
++)
10367 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10368 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10372 data_serialization ()
10376 fprintf (stderr
, " Data serialization\n");
10377 while (i
< regdepslen
)
10379 if (regdeps
[i
].data_srlz
== STATE_STOP
10380 /* Note: as of 991210, all "other" dependencies are cleared by a
10381 data serialization. This might change with new tables */
10382 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10384 print_dependency ("Removing", i
);
10385 regdeps
[i
] = regdeps
[--regdepslen
];
10392 /* Insert stops and serializations as needed to avoid DVs. */
10395 remove_marked_resource (rs
)
10398 switch (rs
->dependency
->semantics
)
10400 case IA64_DVS_SPECIFIC
:
10402 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10403 /* ...fall through... */
10404 case IA64_DVS_INSTR
:
10406 fprintf (stderr
, "Inserting instr serialization\n");
10407 if (rs
->insn_srlz
< STATE_STOP
)
10408 insn_group_break (1, 0, 0);
10409 if (rs
->insn_srlz
< STATE_SRLZ
)
10411 struct slot oldslot
= CURR_SLOT
;
10412 /* Manually jam a srlz.i insn into the stream */
10413 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10414 CURR_SLOT
.user_template
= -1;
10415 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10416 instruction_serialization ();
10417 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10418 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10419 emit_one_bundle ();
10420 CURR_SLOT
= oldslot
;
10422 insn_group_break (1, 0, 0);
10424 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10425 "other" types of DV are eliminated
10426 by a data serialization */
10427 case IA64_DVS_DATA
:
10429 fprintf (stderr
, "Inserting data serialization\n");
10430 if (rs
->data_srlz
< STATE_STOP
)
10431 insn_group_break (1, 0, 0);
10433 struct slot oldslot
= CURR_SLOT
;
10434 /* Manually jam a srlz.d insn into the stream */
10435 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10436 CURR_SLOT
.user_template
= -1;
10437 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10438 data_serialization ();
10439 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10440 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10441 emit_one_bundle ();
10442 CURR_SLOT
= oldslot
;
10445 case IA64_DVS_IMPLIED
:
10446 case IA64_DVS_IMPLIEDF
:
10448 fprintf (stderr
, "Inserting stop\n");
10449 insn_group_break (1, 0, 0);
10456 /* Check the resources used by the given opcode against the current dependency
10459 The check is run once for each execution path encountered. In this case,
10460 a unique execution path is the sequence of instructions following a code
10461 entry point, e.g. the following has three execution paths, one starting
10462 at L0, one at L1, and one at L2.
10471 check_dependencies (idesc
)
10472 struct ia64_opcode
*idesc
;
10474 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10478 /* Note that the number of marked resources may change within the
10479 loop if in auto mode. */
10481 while (i
< regdepslen
)
10483 struct rsrc
*rs
= ®deps
[i
];
10484 const struct ia64_dependency
*dep
= rs
->dependency
;
10487 int start_over
= 0;
10489 if (dep
->semantics
== IA64_DVS_NONE
10490 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10496 note
= NOTE (opdeps
->chks
[chkind
]);
10498 /* Check this resource against each execution path seen thus far. */
10499 for (path
= 0; path
<= md
.path
; path
++)
10503 /* If the dependency wasn't on the path being checked, ignore it. */
10504 if (rs
->path
< path
)
10507 /* If the QP for this insn implies a QP which has branched, don't
10508 bother checking. Ed. NOTE: I don't think this check is terribly
10509 useful; what's the point of generating code which will only be
10510 reached if its QP is zero?
10511 This code was specifically inserted to handle the following code,
10512 based on notes from Intel's DV checking code, where p1 implies p2.
10518 if (CURR_SLOT
.qp_regno
!= 0)
10522 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10524 if (qp_implies
[implies
].path
>= path
10525 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10526 && qp_implies
[implies
].p2_branched
)
10536 if ((matchtype
= resources_match (rs
, idesc
, note
,
10537 CURR_SLOT
.qp_regno
, path
)) != 0)
10540 char pathmsg
[256] = "";
10541 char indexmsg
[256] = "";
10542 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10545 snprintf (pathmsg
, sizeof (pathmsg
),
10546 " when entry is at label '%s'",
10547 md
.entry_labels
[path
- 1]);
10548 if (matchtype
== 1 && rs
->index
>= 0)
10549 snprintf (indexmsg
, sizeof (indexmsg
),
10550 ", specific resource number is %d",
10552 snprintf (msg
, sizeof (msg
),
10553 "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10555 (certain
? "violates" : "may violate"),
10556 dv_mode
[dep
->mode
], dep
->name
,
10557 dv_sem
[dep
->semantics
],
10558 pathmsg
, indexmsg
);
10560 if (md
.explicit_mode
)
10562 as_warn ("%s", msg
);
10563 if (path
< md
.path
)
10564 as_warn (_("Only the first path encountering the conflict is reported"));
10565 as_warn_where (rs
->file
, rs
->line
,
10566 _("This is the location of the conflicting usage"));
10567 /* Don't bother checking other paths, to avoid duplicating
10568 the same warning */
10574 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10576 remove_marked_resource (rs
);
10578 /* since the set of dependencies has changed, start over */
10579 /* FIXME -- since we're removing dvs as we go, we
10580 probably don't really need to start over... */
10593 /* Register new dependencies based on the given opcode. */
10596 mark_resources (idesc
)
10597 struct ia64_opcode
*idesc
;
10600 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10601 int add_only_qp_reads
= 0;
10603 /* A conditional branch only uses its resources if it is taken; if it is
10604 taken, we stop following that path. The other branch types effectively
10605 *always* write their resources. If it's not taken, register only QP
10607 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10609 add_only_qp_reads
= 1;
10613 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10615 for (i
= 0; i
< opdeps
->nregs
; i
++)
10617 const struct ia64_dependency
*dep
;
10618 struct rsrc specs
[MAX_SPECS
];
10623 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10624 note
= NOTE (opdeps
->regs
[i
]);
10626 if (add_only_qp_reads
10627 && !(dep
->mode
== IA64_DV_WAR
10628 && (dep
->specifier
== IA64_RS_PR
10629 || dep
->specifier
== IA64_RS_PRr
10630 || dep
->specifier
== IA64_RS_PR63
)))
10633 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10635 while (count
-- > 0)
10637 mark_resource (idesc
, dep
, &specs
[count
],
10638 DEP (opdeps
->regs
[i
]), md
.path
);
10641 /* The execution path may affect register values, which may in turn
10642 affect which indirect-access resources are accessed. */
10643 switch (dep
->specifier
)
10647 case IA64_RS_CPUID
:
10655 for (path
= 0; path
< md
.path
; path
++)
10657 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10658 while (count
-- > 0)
10659 mark_resource (idesc
, dep
, &specs
[count
],
10660 DEP (opdeps
->regs
[i
]), path
);
10667 /* Remove dependencies when they no longer apply. */
10670 update_dependencies (idesc
)
10671 struct ia64_opcode
*idesc
;
10675 if (strcmp (idesc
->name
, "srlz.i") == 0)
10677 instruction_serialization ();
10679 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10681 data_serialization ();
10683 else if (is_interruption_or_rfi (idesc
)
10684 || is_taken_branch (idesc
))
10686 /* Although technically the taken branch doesn't clear dependencies
10687 which require a srlz.[id], we don't follow the branch; the next
10688 instruction is assumed to start with a clean slate. */
10692 else if (is_conditional_branch (idesc
)
10693 && CURR_SLOT
.qp_regno
!= 0)
10695 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10697 for (i
= 0; i
< qp_implieslen
; i
++)
10699 /* If the conditional branch's predicate is implied by the predicate
10700 in an existing dependency, remove that dependency. */
10701 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10704 /* Note that this implied predicate takes a branch so that if
10705 a later insn generates a DV but its predicate implies this
10706 one, we can avoid the false DV warning. */
10707 qp_implies
[i
].p2_branched
= 1;
10708 while (depind
< regdepslen
)
10710 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10712 print_dependency ("Removing", depind
);
10713 regdeps
[depind
] = regdeps
[--regdepslen
];
10720 /* Any marked resources which have this same predicate should be
10721 cleared, provided that the QP hasn't been modified between the
10722 marking instruction and the branch. */
10725 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10730 while (i
< regdepslen
)
10732 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10733 && regdeps
[i
].link_to_qp_branch
10734 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10735 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10737 /* Treat like a taken branch */
10738 print_dependency ("Removing", i
);
10739 regdeps
[i
] = regdeps
[--regdepslen
];
10748 /* Examine the current instruction for dependency violations. */
10752 struct ia64_opcode
*idesc
;
10756 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10757 idesc
->name
, CURR_SLOT
.src_line
,
10758 idesc
->dependencies
->nchks
,
10759 idesc
->dependencies
->nregs
);
10762 /* Look through the list of currently marked resources; if the current
10763 instruction has the dependency in its chks list which uses that resource,
10764 check against the specific resources used. */
10765 check_dependencies (idesc
);
10767 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10768 then add them to the list of marked resources. */
10769 mark_resources (idesc
);
10771 /* There are several types of dependency semantics, and each has its own
10772 requirements for being cleared
10774 Instruction serialization (insns separated by interruption, rfi, or
10775 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10777 Data serialization (instruction serialization, or writer + srlz.d +
10778 reader, where writer and srlz.d are in separate groups) clears
10779 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10780 always be the case).
10782 Instruction group break (groups separated by stop, taken branch,
10783 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10785 update_dependencies (idesc
);
10787 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10788 warning. Keep track of as many as possible that are useful. */
10789 note_register_values (idesc
);
10791 /* We don't need or want this anymore. */
10792 md
.mem_offset
.hint
= 0;
10797 /* Translate one line of assembly. Pseudo ops and labels do not show
10803 char *saved_input_line_pointer
, *mnemonic
;
10804 const struct pseudo_opcode
*pdesc
;
10805 struct ia64_opcode
*idesc
;
10806 unsigned char qp_regno
;
10807 unsigned int flags
;
10810 saved_input_line_pointer
= input_line_pointer
;
10811 input_line_pointer
= str
;
10813 /* extract the opcode (mnemonic): */
10815 mnemonic
= input_line_pointer
;
10816 ch
= get_symbol_end ();
10817 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10820 *input_line_pointer
= ch
;
10821 (*pdesc
->handler
) (pdesc
->arg
);
10825 /* Find the instruction descriptor matching the arguments. */
10827 idesc
= ia64_find_opcode (mnemonic
);
10828 *input_line_pointer
= ch
;
10831 as_bad (_("Unknown opcode `%s'"), mnemonic
);
10835 idesc
= parse_operands (idesc
);
10839 /* Handle the dynamic ops we can handle now: */
10840 if (idesc
->type
== IA64_TYPE_DYN
)
10842 if (strcmp (idesc
->name
, "add") == 0)
10844 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10845 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10849 ia64_free_opcode (idesc
);
10850 idesc
= ia64_find_opcode (mnemonic
);
10852 else if (strcmp (idesc
->name
, "mov") == 0)
10854 enum ia64_opnd opnd1
, opnd2
;
10857 opnd1
= idesc
->operands
[0];
10858 opnd2
= idesc
->operands
[1];
10859 if (opnd1
== IA64_OPND_AR3
)
10861 else if (opnd2
== IA64_OPND_AR3
)
10865 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10867 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10868 mnemonic
= "mov.i";
10869 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10870 mnemonic
= "mov.m";
10878 ia64_free_opcode (idesc
);
10879 idesc
= ia64_find_opcode (mnemonic
);
10880 while (idesc
!= NULL
10881 && (idesc
->operands
[0] != opnd1
10882 || idesc
->operands
[1] != opnd2
))
10883 idesc
= get_next_opcode (idesc
);
10887 else if (strcmp (idesc
->name
, "mov.i") == 0
10888 || strcmp (idesc
->name
, "mov.m") == 0)
10890 enum ia64_opnd opnd1
, opnd2
;
10893 opnd1
= idesc
->operands
[0];
10894 opnd2
= idesc
->operands
[1];
10895 if (opnd1
== IA64_OPND_AR3
)
10897 else if (opnd2
== IA64_OPND_AR3
)
10901 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10904 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10906 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10908 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10909 as_bad (_("AR %d can only be accessed by %c-unit"),
10910 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10914 else if (strcmp (idesc
->name
, "hint.b") == 0)
10920 case hint_b_warning
:
10921 as_warn (_("hint.b may be treated as nop"));
10924 as_bad (_("hint.b shouldn't be used"));
10930 if (md
.qp
.X_op
== O_register
)
10932 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10933 md
.qp
.X_op
= O_absent
;
10936 flags
= idesc
->flags
;
10938 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10940 /* The alignment frag has to end with a stop bit only if the
10941 next instruction after the alignment directive has to be
10942 the first instruction in an instruction group. */
10945 while (align_frag
->fr_type
!= rs_align_code
)
10947 align_frag
= align_frag
->fr_next
;
10951 /* align_frag can be NULL if there are directives in
10953 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10954 align_frag
->tc_frag_data
= 1;
10957 insn_group_break (1, 0, 0);
10961 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10963 as_bad (_("`%s' cannot be predicated"), idesc
->name
);
10967 /* Build the instruction. */
10968 CURR_SLOT
.qp_regno
= qp_regno
;
10969 CURR_SLOT
.idesc
= idesc
;
10970 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10971 dwarf2_where (&CURR_SLOT
.debug_line
);
10972 dwarf2_consume_line_info ();
10974 /* Add unwind entries, if there are any. */
10975 if (unwind
.current_entry
)
10977 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10978 unwind
.current_entry
= NULL
;
10980 if (unwind
.pending_saves
)
10982 if (unwind
.pending_saves
->next
)
10984 /* Attach the next pending save to the next slot so that its
10985 slot number will get set correctly. */
10986 add_unwind_entry (unwind
.pending_saves
->next
, NOT_A_CHAR
);
10987 unwind
.pending_saves
= &unwind
.pending_saves
->next
->r
.record
.p
;
10990 unwind
.pending_saves
= NULL
;
10992 if (unwind
.proc_pending
.sym
&& S_IS_DEFINED (unwind
.proc_pending
.sym
))
10995 /* Check for dependency violations. */
10999 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
11000 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
11001 emit_one_bundle ();
11003 if ((flags
& IA64_OPCODE_LAST
) != 0)
11004 insn_group_break (1, 0, 0);
11006 md
.last_text_seg
= now_seg
;
11009 input_line_pointer
= saved_input_line_pointer
;
11012 /* Called when symbol NAME cannot be found in the symbol table.
11013 Should be used for dynamic valued symbols only. */
11016 md_undefined_symbol (name
)
11017 char *name ATTRIBUTE_UNUSED
;
11022 /* Called for any expression that can not be recognized. When the
11023 function is called, `input_line_pointer' will point to the start of
11030 switch (*input_line_pointer
)
11033 ++input_line_pointer
;
11034 expression_and_evaluate (e
);
11035 if (*input_line_pointer
!= ']')
11037 as_bad (_("Closing bracket missing"));
11042 if (e
->X_op
!= O_register
11043 || e
->X_add_number
< REG_GR
11044 || e
->X_add_number
> REG_GR
+ 127)
11046 as_bad (_("Index must be a general register"));
11047 e
->X_add_number
= REG_GR
;
11050 ++input_line_pointer
;
11061 ignore_rest_of_line ();
11064 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
11065 a section symbol plus some offset. For relocs involving @fptr(),
11066 directives we don't want such adjustments since we need to have the
11067 original symbol's name in the reloc. */
11069 ia64_fix_adjustable (fix
)
11072 /* Prevent all adjustments to global symbols */
11073 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
11076 switch (fix
->fx_r_type
)
11078 case BFD_RELOC_IA64_FPTR64I
:
11079 case BFD_RELOC_IA64_FPTR32MSB
:
11080 case BFD_RELOC_IA64_FPTR32LSB
:
11081 case BFD_RELOC_IA64_FPTR64MSB
:
11082 case BFD_RELOC_IA64_FPTR64LSB
:
11083 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11084 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11094 ia64_force_relocation (fix
)
11097 switch (fix
->fx_r_type
)
11099 case BFD_RELOC_IA64_FPTR64I
:
11100 case BFD_RELOC_IA64_FPTR32MSB
:
11101 case BFD_RELOC_IA64_FPTR32LSB
:
11102 case BFD_RELOC_IA64_FPTR64MSB
:
11103 case BFD_RELOC_IA64_FPTR64LSB
:
11105 case BFD_RELOC_IA64_LTOFF22
:
11106 case BFD_RELOC_IA64_LTOFF64I
:
11107 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11108 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11109 case BFD_RELOC_IA64_PLTOFF22
:
11110 case BFD_RELOC_IA64_PLTOFF64I
:
11111 case BFD_RELOC_IA64_PLTOFF64MSB
:
11112 case BFD_RELOC_IA64_PLTOFF64LSB
:
11114 case BFD_RELOC_IA64_LTOFF22X
:
11115 case BFD_RELOC_IA64_LDXMOV
:
11122 return generic_force_reloc (fix
);
11125 /* Decide from what point a pc-relative relocation is relative to,
11126 relative to the pc-relative fixup. Er, relatively speaking. */
11128 ia64_pcrel_from_section (fix
, sec
)
11132 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
11134 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
11141 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11143 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
11147 expr
.X_op
= O_pseudo_fixup
;
11148 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
11149 expr
.X_add_number
= 0;
11150 expr
.X_add_symbol
= symbol
;
11151 emit_expr (&expr
, size
);
11154 /* This is called whenever some data item (not an instruction) needs a
11155 fixup. We pick the right reloc code depending on the byteorder
11156 currently in effect. */
11158 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
11164 bfd_reloc_code_real_type code
;
11169 /* There are no reloc for 8 and 16 bit quantities, but we allow
11170 them here since they will work fine as long as the expression
11171 is fully defined at the end of the pass over the source file. */
11172 case 1: code
= BFD_RELOC_8
; break;
11173 case 2: code
= BFD_RELOC_16
; break;
11175 if (target_big_endian
)
11176 code
= BFD_RELOC_IA64_DIR32MSB
;
11178 code
= BFD_RELOC_IA64_DIR32LSB
;
11182 /* In 32-bit mode, data8 could mean function descriptors too. */
11183 if (exp
->X_op
== O_pseudo_fixup
11184 && exp
->X_op_symbol
11185 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
11186 && !(md
.flags
& EF_IA_64_ABI64
))
11188 if (target_big_endian
)
11189 code
= BFD_RELOC_IA64_IPLTMSB
;
11191 code
= BFD_RELOC_IA64_IPLTLSB
;
11192 exp
->X_op
= O_symbol
;
11197 if (target_big_endian
)
11198 code
= BFD_RELOC_IA64_DIR64MSB
;
11200 code
= BFD_RELOC_IA64_DIR64LSB
;
11205 if (exp
->X_op
== O_pseudo_fixup
11206 && exp
->X_op_symbol
11207 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
11209 if (target_big_endian
)
11210 code
= BFD_RELOC_IA64_IPLTMSB
;
11212 code
= BFD_RELOC_IA64_IPLTLSB
;
11213 exp
->X_op
= O_symbol
;
11219 as_bad (_("Unsupported fixup size %d"), nbytes
);
11220 ignore_rest_of_line ();
11224 if (exp
->X_op
== O_pseudo_fixup
)
11226 exp
->X_op
= O_symbol
;
11227 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11228 /* ??? If code unchanged, unsupported. */
11231 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11232 /* We need to store the byte order in effect in case we're going
11233 to fix an 8 or 16 bit relocation (for which there no real
11234 relocs available). See md_apply_fix(). */
11235 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11238 /* Return the actual relocation we wish to associate with the pseudo
11239 reloc described by SYM and R_TYPE. SYM should be one of the
11240 symbols in the pseudo_func array, or NULL. */
11242 static bfd_reloc_code_real_type
11243 ia64_gen_real_reloc_type (sym
, r_type
)
11244 struct symbol
*sym
;
11245 bfd_reloc_code_real_type r_type
;
11247 bfd_reloc_code_real_type
new = 0;
11248 const char *type
= NULL
, *suffix
= "";
11255 switch (S_GET_VALUE (sym
))
11257 case FUNC_FPTR_RELATIVE
:
11260 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11261 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11262 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11263 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11264 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11265 default: type
= "FPTR"; break;
11269 case FUNC_GP_RELATIVE
:
11272 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11273 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11274 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11275 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11276 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11277 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11278 default: type
= "GPREL"; break;
11282 case FUNC_LT_RELATIVE
:
11285 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11286 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11287 default: type
= "LTOFF"; break;
11291 case FUNC_LT_RELATIVE_X
:
11294 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11295 default: type
= "LTOFF"; suffix
= "X"; break;
11299 case FUNC_PC_RELATIVE
:
11302 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11303 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11304 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11305 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11306 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11307 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11308 default: type
= "PCREL"; break;
11312 case FUNC_PLT_RELATIVE
:
11315 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11316 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11317 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11318 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11319 default: type
= "PLTOFF"; break;
11323 case FUNC_SEC_RELATIVE
:
11326 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11327 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11328 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11329 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11330 default: type
= "SECREL"; break;
11334 case FUNC_SEG_RELATIVE
:
11337 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11338 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11339 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11340 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11341 default: type
= "SEGREL"; break;
11345 case FUNC_LTV_RELATIVE
:
11348 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11349 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11350 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11351 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11352 default: type
= "LTV"; break;
11356 case FUNC_LT_FPTR_RELATIVE
:
11359 case BFD_RELOC_IA64_IMM22
:
11360 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11361 case BFD_RELOC_IA64_IMM64
:
11362 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11363 case BFD_RELOC_IA64_DIR32MSB
:
11364 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11365 case BFD_RELOC_IA64_DIR32LSB
:
11366 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11367 case BFD_RELOC_IA64_DIR64MSB
:
11368 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11369 case BFD_RELOC_IA64_DIR64LSB
:
11370 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11372 type
= "LTOFF_FPTR"; break;
11376 case FUNC_TP_RELATIVE
:
11379 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11380 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11381 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11382 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11383 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11384 default: type
= "TPREL"; break;
11388 case FUNC_LT_TP_RELATIVE
:
11391 case BFD_RELOC_IA64_IMM22
:
11392 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11394 type
= "LTOFF_TPREL"; break;
11398 case FUNC_DTP_MODULE
:
11401 case BFD_RELOC_IA64_DIR64MSB
:
11402 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11403 case BFD_RELOC_IA64_DIR64LSB
:
11404 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11406 type
= "DTPMOD"; break;
11410 case FUNC_LT_DTP_MODULE
:
11413 case BFD_RELOC_IA64_IMM22
:
11414 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11416 type
= "LTOFF_DTPMOD"; break;
11420 case FUNC_DTP_RELATIVE
:
11423 case BFD_RELOC_IA64_DIR32MSB
:
11424 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11425 case BFD_RELOC_IA64_DIR32LSB
:
11426 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11427 case BFD_RELOC_IA64_DIR64MSB
:
11428 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11429 case BFD_RELOC_IA64_DIR64LSB
:
11430 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11431 case BFD_RELOC_IA64_IMM14
:
11432 new = BFD_RELOC_IA64_DTPREL14
; break;
11433 case BFD_RELOC_IA64_IMM22
:
11434 new = BFD_RELOC_IA64_DTPREL22
; break;
11435 case BFD_RELOC_IA64_IMM64
:
11436 new = BFD_RELOC_IA64_DTPREL64I
; break;
11438 type
= "DTPREL"; break;
11442 case FUNC_LT_DTP_RELATIVE
:
11445 case BFD_RELOC_IA64_IMM22
:
11446 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11448 type
= "LTOFF_DTPREL"; break;
11452 case FUNC_IPLT_RELOC
:
11455 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11456 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11457 default: type
= "IPLT"; break;
11475 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11476 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11477 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11478 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11479 case BFD_RELOC_UNUSED
: width
= 13; break;
11480 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11481 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11482 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11486 /* This should be an error, but since previously there wasn't any
11487 diagnostic here, don't make it fail because of this for now. */
11488 as_warn (_("Cannot express %s%d%s relocation"), type
, width
, suffix
);
11493 /* Here is where generate the appropriate reloc for pseudo relocation
11496 ia64_validate_fix (fix
)
11499 switch (fix
->fx_r_type
)
11501 case BFD_RELOC_IA64_FPTR64I
:
11502 case BFD_RELOC_IA64_FPTR32MSB
:
11503 case BFD_RELOC_IA64_FPTR64LSB
:
11504 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11505 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11506 if (fix
->fx_offset
!= 0)
11507 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11508 _("No addend allowed in @fptr() relocation"));
11516 fix_insn (fix
, odesc
, value
)
11518 const struct ia64_operand
*odesc
;
11521 bfd_vma insn
[3], t0
, t1
, control_bits
;
11526 slot
= fix
->fx_where
& 0x3;
11527 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11529 /* Bundles are always in little-endian byte order */
11530 t0
= bfd_getl64 (fixpos
);
11531 t1
= bfd_getl64 (fixpos
+ 8);
11532 control_bits
= t0
& 0x1f;
11533 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11534 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11535 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11538 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11540 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11541 insn
[2] |= (((value
& 0x7f) << 13)
11542 | (((value
>> 7) & 0x1ff) << 27)
11543 | (((value
>> 16) & 0x1f) << 22)
11544 | (((value
>> 21) & 0x1) << 21)
11545 | (((value
>> 63) & 0x1) << 36));
11547 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11549 if (value
& ~0x3fffffffffffffffULL
)
11550 err
= "integer operand out of range";
11551 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11552 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11554 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11557 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11558 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11559 | (((value
>> 0) & 0xfffff) << 13));
11562 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11565 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11567 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11568 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11569 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11570 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11573 /* Attempt to simplify or even eliminate a fixup. The return value is
11574 ignored; perhaps it was once meaningful, but now it is historical.
11575 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11577 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11581 md_apply_fix (fix
, valP
, seg
)
11584 segT seg ATTRIBUTE_UNUSED
;
11587 valueT value
= *valP
;
11589 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11593 switch (fix
->fx_r_type
)
11595 case BFD_RELOC_IA64_PCREL21B
: break;
11596 case BFD_RELOC_IA64_PCREL21BI
: break;
11597 case BFD_RELOC_IA64_PCREL21F
: break;
11598 case BFD_RELOC_IA64_PCREL21M
: break;
11599 case BFD_RELOC_IA64_PCREL60B
: break;
11600 case BFD_RELOC_IA64_PCREL22
: break;
11601 case BFD_RELOC_IA64_PCREL64I
: break;
11602 case BFD_RELOC_IA64_PCREL32MSB
: break;
11603 case BFD_RELOC_IA64_PCREL32LSB
: break;
11604 case BFD_RELOC_IA64_PCREL64MSB
: break;
11605 case BFD_RELOC_IA64_PCREL64LSB
: break;
11607 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11614 switch (fix
->fx_r_type
)
11616 case BFD_RELOC_UNUSED
:
11617 /* This must be a TAG13 or TAG13b operand. There are no external
11618 relocs defined for them, so we must give an error. */
11619 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11620 _("%s must have a constant value"),
11621 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11625 case BFD_RELOC_IA64_TPREL14
:
11626 case BFD_RELOC_IA64_TPREL22
:
11627 case BFD_RELOC_IA64_TPREL64I
:
11628 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11629 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11630 case BFD_RELOC_IA64_DTPREL14
:
11631 case BFD_RELOC_IA64_DTPREL22
:
11632 case BFD_RELOC_IA64_DTPREL64I
:
11633 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11634 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11641 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11643 if (fix
->tc_fix_data
.bigendian
)
11644 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11646 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11651 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11656 /* Generate the BFD reloc to be stuck in the object file from the
11657 fixup used internally in the assembler. */
11660 tc_gen_reloc (sec
, fixp
)
11661 asection
*sec ATTRIBUTE_UNUSED
;
11666 reloc
= xmalloc (sizeof (*reloc
));
11667 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11668 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11669 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11670 reloc
->addend
= fixp
->fx_offset
;
11671 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11675 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11676 _("Cannot represent %s relocation in object file"),
11677 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11684 /* Turn a string in input_line_pointer into a floating point constant
11685 of type TYPE, and store the appropriate bytes in *LIT. The number
11686 of LITTLENUMS emitted is stored in *SIZE. An error message is
11687 returned, or NULL on OK. */
11689 #define MAX_LITTLENUMS 5
11692 md_atof (int type
, char *lit
, int *size
)
11694 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11724 return _("Unrecognized or unsupported floating point constant");
11726 t
= atof_ieee (input_line_pointer
, type
, words
);
11728 input_line_pointer
= t
;
11730 (*ia64_float_to_chars
) (lit
, words
, prec
);
11734 /* It is 10 byte floating point with 6 byte padding. */
11735 memset (&lit
[10], 0, 6);
11736 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11739 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11744 /* Handle ia64 specific semantics of the align directive. */
11747 ia64_md_do_align (n
, fill
, len
, max
)
11748 int n ATTRIBUTE_UNUSED
;
11749 const char *fill ATTRIBUTE_UNUSED
;
11750 int len ATTRIBUTE_UNUSED
;
11751 int max ATTRIBUTE_UNUSED
;
11753 if (subseg_text_p (now_seg
))
11754 ia64_flush_insns ();
11757 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11758 of an rs_align_code fragment. */
11761 ia64_handle_align (fragp
)
11766 const unsigned char *nop
;
11768 if (fragp
->fr_type
!= rs_align_code
)
11771 /* Check if this frag has to end with a stop bit. */
11772 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11774 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11775 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11777 /* If no paddings are needed, we check if we need a stop bit. */
11778 if (!bytes
&& fragp
->tc_frag_data
)
11780 if (fragp
->fr_fix
< 16)
11782 /* FIXME: It won't work with
11784 alloc r32=ar.pfs,1,2,4,0
11788 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11789 _("Can't add stop bit to mark end of instruction group"));
11792 /* Bundles are always in little-endian byte order. Make sure
11793 the previous bundle has the stop bit. */
11797 /* Make sure we are on a 16-byte boundary, in case someone has been
11798 putting data into a text section. */
11801 int fix
= bytes
& 15;
11802 memset (p
, 0, fix
);
11805 fragp
->fr_fix
+= fix
;
11808 /* Instruction bundles are always little-endian. */
11809 memcpy (p
, nop
, 16);
11810 fragp
->fr_var
= 16;
11814 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11819 number_to_chars_bigendian (lit
, (long) (*words
++),
11820 sizeof (LITTLENUM_TYPE
));
11821 lit
+= sizeof (LITTLENUM_TYPE
);
11826 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11831 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11832 sizeof (LITTLENUM_TYPE
));
11833 lit
+= sizeof (LITTLENUM_TYPE
);
11838 ia64_elf_section_change_hook (void)
11840 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11841 && elf_linked_to_section (now_seg
) == NULL
)
11842 elf_linked_to_section (now_seg
) = text_section
;
11843 dot_byteorder (-1);
11846 /* Check if a label should be made global. */
11848 ia64_check_label (symbolS
*label
)
11850 if (*input_line_pointer
== ':')
11852 S_SET_EXTERNAL (label
);
11853 input_line_pointer
++;
11857 /* Used to remember where .alias and .secalias directives are seen. We
11858 will rename symbol and section names when we are about to output
11859 the relocatable file. */
11862 char *file
; /* The file where the directive is seen. */
11863 unsigned int line
; /* The line number the directive is at. */
11864 const char *name
; /* The original name of the symbol. */
11867 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11868 .secalias. Otherwise, it is .alias. */
11870 dot_alias (int section
)
11872 char *name
, *alias
;
11876 const char *error_string
;
11879 struct hash_control
*ahash
, *nhash
;
11882 name
= input_line_pointer
;
11883 delim
= get_symbol_end ();
11884 end_name
= input_line_pointer
;
11887 if (name
== end_name
)
11889 as_bad (_("expected symbol name"));
11890 ignore_rest_of_line ();
11894 SKIP_WHITESPACE ();
11896 if (*input_line_pointer
!= ',')
11899 as_bad (_("expected comma after \"%s\""), name
);
11901 ignore_rest_of_line ();
11905 input_line_pointer
++;
11907 ia64_canonicalize_symbol_name (name
);
11909 /* We call demand_copy_C_string to check if alias string is valid.
11910 There should be a closing `"' and no `\0' in the string. */
11911 alias
= demand_copy_C_string (&len
);
11914 ignore_rest_of_line ();
11918 /* Make a copy of name string. */
11919 len
= strlen (name
) + 1;
11920 obstack_grow (¬es
, name
, len
);
11921 name
= obstack_finish (¬es
);
11926 ahash
= secalias_hash
;
11927 nhash
= secalias_name_hash
;
11932 ahash
= alias_hash
;
11933 nhash
= alias_name_hash
;
11936 /* Check if alias has been used before. */
11937 h
= (struct alias
*) hash_find (ahash
, alias
);
11940 if (strcmp (h
->name
, name
))
11941 as_bad (_("`%s' is already the alias of %s `%s'"),
11942 alias
, kind
, h
->name
);
11946 /* Check if name already has an alias. */
11947 a
= (const char *) hash_find (nhash
, name
);
11950 if (strcmp (a
, alias
))
11951 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11955 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11956 as_where (&h
->file
, &h
->line
);
11959 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11962 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11963 alias
, kind
, error_string
);
11967 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11970 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11971 alias
, kind
, error_string
);
11973 obstack_free (¬es
, name
);
11974 obstack_free (¬es
, alias
);
11977 demand_empty_rest_of_line ();
11980 /* It renames the original symbol name to its alias. */
11982 do_alias (const char *alias
, PTR value
)
11984 struct alias
*h
= (struct alias
*) value
;
11985 symbolS
*sym
= symbol_find (h
->name
);
11988 as_warn_where (h
->file
, h
->line
,
11989 _("symbol `%s' aliased to `%s' is not used"),
11992 S_SET_NAME (sym
, (char *) alias
);
11995 /* Called from write_object_file. */
11997 ia64_adjust_symtab (void)
11999 hash_traverse (alias_hash
, do_alias
);
12002 /* It renames the original section name to its alias. */
12004 do_secalias (const char *alias
, PTR value
)
12006 struct alias
*h
= (struct alias
*) value
;
12007 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
12010 as_warn_where (h
->file
, h
->line
,
12011 _("section `%s' aliased to `%s' is not used"),
12017 /* Called from write_object_file. */
12019 ia64_frob_file (void)
12021 hash_traverse (secalias_hash
, do_secalias
);