1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS
= 0,
67 SPECIAL_SECTION_SDATA
,
68 SPECIAL_SECTION_RODATA
,
69 SPECIAL_SECTION_COMMENT
,
70 SPECIAL_SECTION_UNWIND
,
71 SPECIAL_SECTION_UNWIND_INFO
,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY
,
74 SPECIAL_SECTION_FINI_ARRAY
,
91 FUNC_LT_FPTR_RELATIVE
,
101 REG_FR
= (REG_GR
+ 128),
102 REG_AR
= (REG_FR
+ 128),
103 REG_CR
= (REG_AR
+ 128),
104 REG_P
= (REG_CR
+ 128),
105 REG_BR
= (REG_P
+ 64),
106 REG_IP
= (REG_BR
+ 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR
= 0, /* dynamic general purpose register */
134 DYNREG_FR
, /* dynamic floating point register */
135 DYNREG_PR
, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE
,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix
*next
;
156 extern int target_big_endian
;
158 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
160 static void ia64_float_to_chars_bigendian
161 PARAMS ((char *, LITTLENUM_TYPE
*, int));
162 static void ia64_float_to_chars_littleendian
163 PARAMS ((char *, LITTLENUM_TYPE
*, int));
164 static void (*ia64_float_to_chars
)
165 PARAMS ((char *, LITTLENUM_TYPE
*, int));
167 static struct hash_control
*alias_hash
;
168 static struct hash_control
*alias_name_hash
;
169 static struct hash_control
*secalias_hash
;
170 static struct hash_control
*secalias_name_hash
;
172 /* Characters which always start a comment. */
173 const char comment_chars
[] = "";
175 /* Characters which start a comment at the beginning of a line. */
176 const char line_comment_chars
[] = "#";
178 /* Characters which may be used to separate multiple commands on a
180 const char line_separator_chars
[] = ";";
182 /* Characters which are used to indicate an exponent in a floating
184 const char EXP_CHARS
[] = "eE";
186 /* Characters which mean that a number is a floating point constant,
188 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
190 /* ia64-specific option processing: */
192 const char *md_shortopts
= "m:N:x::";
194 struct option md_longopts
[] =
196 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
197 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
198 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
199 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
202 size_t md_longopts_size
= sizeof (md_longopts
);
206 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
207 struct hash_control
*reg_hash
; /* register name hash table */
208 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
209 struct hash_control
*const_hash
; /* constant hash table */
210 struct hash_control
*entry_hash
; /* code entry hint hash table */
212 symbolS
*regsym
[REG_NUM
];
214 /* If X_op is != O_absent, the registername for the instruction's
215 qualifying predicate. If NULL, p0 is assumed for instructions
216 that are predicatable. */
223 explicit_mode
: 1, /* which mode we're in */
224 default_explicit_mode
: 1, /* which mode is the default */
225 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
227 keep_pending_output
: 1;
229 /* Each bundle consists of up to three instructions. We keep
230 track of four most recent instructions so we can correctly set
231 the end_of_insn_group for the last instruction in a bundle. */
233 int num_slots_in_use
;
237 end_of_insn_group
: 1,
238 manual_bundling_on
: 1,
239 manual_bundling_off
: 1;
240 signed char user_template
; /* user-selected template, if any */
241 unsigned char qp_regno
; /* qualifying predicate */
242 /* This duplicates a good fraction of "struct fix" but we
243 can't use a "struct fix" instead since we can't call
244 fix_new_exp() until we know the address of the instruction. */
248 bfd_reloc_code_real_type code
;
249 enum ia64_opnd opnd
; /* type of operand in need of fix */
250 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
251 expressionS expr
; /* the value to be inserted */
253 fixup
[2]; /* at most two fixups per insn */
254 struct ia64_opcode
*idesc
;
255 struct label_fix
*label_fixups
;
256 struct label_fix
*tag_fixups
;
257 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
260 unsigned int src_line
;
261 struct dwarf2_line_info debug_line
;
269 struct dynreg
*next
; /* next dynamic register */
271 unsigned short base
; /* the base register number */
272 unsigned short num_regs
; /* # of registers in this set */
274 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
276 flagword flags
; /* ELF-header flags */
279 unsigned hint
:1; /* is this hint currently valid? */
280 bfd_vma offset
; /* mem.offset offset */
281 bfd_vma base
; /* mem.offset base */
284 int path
; /* number of alt. entry points seen */
285 const char **entry_labels
; /* labels of all alternate paths in
286 the current DV-checking block. */
287 int maxpaths
; /* size currently allocated for
289 /* Support for hardware errata workarounds. */
291 /* Record data about the last three insn groups. */
294 /* B-step workaround.
295 For each predicate register, this is set if the corresponding insn
296 group conditionally sets this register with one of the affected
299 /* B-step workaround.
300 For each general register, this is set if the corresponding insn
301 a) is conditional one one of the predicate registers for which
302 P_REG_SET is 1 in the corresponding entry of the previous group,
303 b) sets this general register with one of the affected
305 int g_reg_set_conditionally
[128];
309 int pointer_size
; /* size in bytes of a pointer */
310 int pointer_size_shift
; /* shift size of a pointer for alignment */
314 /* application registers: */
320 #define AR_BSPSTORE 18
335 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
336 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
337 {"ar.rsc", 16}, {"ar.bsp", 17},
338 {"ar.bspstore", 18}, {"ar.rnat", 19},
339 {"ar.fcr", 21}, {"ar.eflag", 24},
340 {"ar.csd", 25}, {"ar.ssd", 26},
341 {"ar.cflg", 27}, {"ar.fsr", 28},
342 {"ar.fir", 29}, {"ar.fdr", 30},
343 {"ar.ccv", 32}, {"ar.unat", 36},
344 {"ar.fpsr", 40}, {"ar.itc", 44},
345 {"ar.pfs", 64}, {"ar.lc", 65},
366 /* control registers: */
408 static const struct const_desc
415 /* PSR constant masks: */
418 {"psr.be", ((valueT
) 1) << 1},
419 {"psr.up", ((valueT
) 1) << 2},
420 {"psr.ac", ((valueT
) 1) << 3},
421 {"psr.mfl", ((valueT
) 1) << 4},
422 {"psr.mfh", ((valueT
) 1) << 5},
424 {"psr.ic", ((valueT
) 1) << 13},
425 {"psr.i", ((valueT
) 1) << 14},
426 {"psr.pk", ((valueT
) 1) << 15},
428 {"psr.dt", ((valueT
) 1) << 17},
429 {"psr.dfl", ((valueT
) 1) << 18},
430 {"psr.dfh", ((valueT
) 1) << 19},
431 {"psr.sp", ((valueT
) 1) << 20},
432 {"psr.pp", ((valueT
) 1) << 21},
433 {"psr.di", ((valueT
) 1) << 22},
434 {"psr.si", ((valueT
) 1) << 23},
435 {"psr.db", ((valueT
) 1) << 24},
436 {"psr.lp", ((valueT
) 1) << 25},
437 {"psr.tb", ((valueT
) 1) << 26},
438 {"psr.rt", ((valueT
) 1) << 27},
439 /* 28-31: reserved */
440 /* 32-33: cpl (current privilege level) */
441 {"psr.is", ((valueT
) 1) << 34},
442 {"psr.mc", ((valueT
) 1) << 35},
443 {"psr.it", ((valueT
) 1) << 36},
444 {"psr.id", ((valueT
) 1) << 37},
445 {"psr.da", ((valueT
) 1) << 38},
446 {"psr.dd", ((valueT
) 1) << 39},
447 {"psr.ss", ((valueT
) 1) << 40},
448 /* 41-42: ri (restart instruction) */
449 {"psr.ed", ((valueT
) 1) << 43},
450 {"psr.bn", ((valueT
) 1) << 44},
453 /* indirect register-sets/memory: */
462 { "CPUID", IND_CPUID
},
463 { "cpuid", IND_CPUID
},
475 /* Pseudo functions used to indicate relocation types (these functions
476 start with an at sign (@). */
498 /* reloc pseudo functions (these must come first!): */
499 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
500 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
501 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
502 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
503 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
504 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
505 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
506 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
507 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
508 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
509 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
510 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
511 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
512 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
513 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
514 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
515 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
517 /* mbtype4 constants: */
518 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
519 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
520 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
521 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
522 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
524 /* fclass constants: */
525 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
526 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
527 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
528 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
529 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
530 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
531 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
532 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
533 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
535 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
537 /* hint constants: */
538 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
540 /* unwind-related constants: */
541 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
542 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
543 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
544 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
545 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
546 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
547 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
549 /* unwind-related registers: */
550 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
553 /* 41-bit nop opcodes (one per unit): */
554 static const bfd_vma nop
[IA64_NUM_UNITS
] =
556 0x0000000000LL
, /* NIL => break 0 */
557 0x0008000000LL
, /* I-unit nop */
558 0x0008000000LL
, /* M-unit nop */
559 0x4000000000LL
, /* B-unit nop */
560 0x0008000000LL
, /* F-unit nop */
561 0x0008000000LL
, /* L-"unit" nop */
562 0x0008000000LL
, /* X-unit nop */
565 /* Can't be `const' as it's passed to input routines (which have the
566 habit of setting temporary sentinels. */
567 static char special_section_name
[][20] =
569 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
570 {".IA_64.unwind"}, {".IA_64.unwind_info"},
571 {".init_array"}, {".fini_array"}
574 static char *special_linkonce_name
[] =
576 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
579 /* The best template for a particular sequence of up to three
581 #define N IA64_NUM_TYPES
582 static unsigned char best_template
[N
][N
][N
];
585 /* Resource dependencies currently in effect */
587 int depind
; /* dependency index */
588 const struct ia64_dependency
*dependency
; /* actual dependency */
589 unsigned specific
:1, /* is this a specific bit/regno? */
590 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
591 int index
; /* specific regno/bit within dependency */
592 int note
; /* optional qualifying note (0 if none) */
596 int insn_srlz
; /* current insn serialization state */
597 int data_srlz
; /* current data serialization state */
598 int qp_regno
; /* qualifying predicate for this usage */
599 char *file
; /* what file marked this dependency */
600 unsigned int line
; /* what line marked this dependency */
601 struct mem_offset mem_offset
; /* optional memory offset hint */
602 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
603 int path
; /* corresponding code entry index */
605 static int regdepslen
= 0;
606 static int regdepstotlen
= 0;
607 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
608 static const char *dv_sem
[] = { "none", "implied", "impliedf",
609 "data", "instr", "specific", "stop", "other" };
610 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
612 /* Current state of PR mutexation */
613 static struct qpmutex
{
616 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
617 static int qp_mutexeslen
= 0;
618 static int qp_mutexestotlen
= 0;
619 static valueT qp_safe_across_calls
= 0;
621 /* Current state of PR implications */
622 static struct qp_imply
{
625 unsigned p2_branched
:1;
627 } *qp_implies
= NULL
;
628 static int qp_implieslen
= 0;
629 static int qp_impliestotlen
= 0;
631 /* Keep track of static GR values so that indirect register usage can
632 sometimes be tracked. */
637 } gr_values
[128] = {{ 1, 0, 0 }};
639 /* These are the routines required to output the various types of
642 /* A slot_number is a frag address plus the slot index (0-2). We use the
643 frag address here so that if there is a section switch in the middle of
644 a function, then instructions emitted to a different section are not
645 counted. Since there may be more than one frag for a function, this
646 means we also need to keep track of which frag this address belongs to
647 so we can compute inter-frag distances. This also nicely solves the
648 problem with nops emitted for align directives, which can't easily be
649 counted, but can easily be derived from frag sizes. */
651 typedef struct unw_rec_list
{
653 unsigned long slot_number
;
655 unsigned long next_slot_number
;
656 fragS
*next_slot_frag
;
657 struct unw_rec_list
*next
;
660 #define SLOT_NUM_NOT_SET (unsigned)-1
662 /* Linked list of saved prologue counts. A very poor
663 implementation of a map from label numbers to prologue counts. */
664 typedef struct label_prologue_count
666 struct label_prologue_count
*next
;
667 unsigned long label_number
;
668 unsigned int prologue_count
;
669 } label_prologue_count
;
673 /* Maintain a list of unwind entries for the current function. */
677 /* Any unwind entires that should be attached to the current slot
678 that an insn is being constructed for. */
679 unw_rec_list
*current_entry
;
681 /* These are used to create the unwind table entry for this function. */
684 symbolS
*info
; /* pointer to unwind info */
685 symbolS
*personality_routine
;
687 subsegT saved_text_subseg
;
688 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
690 /* TRUE if processing unwind directives in a prologue region. */
693 unsigned int prologue_count
; /* number of .prologues seen so far */
694 /* Prologue counts at previous .label_state directives. */
695 struct label_prologue_count
* saved_prologue_counts
;
698 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
700 /* Forward declarations: */
701 static int ar_is_in_integer_unit
PARAMS ((int regnum
));
702 static void set_section
PARAMS ((char *name
));
703 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
704 unsigned int, unsigned int));
705 static void dot_radix
PARAMS ((int));
706 static void dot_special_section
PARAMS ((int));
707 static void dot_proc
PARAMS ((int));
708 static void dot_fframe
PARAMS ((int));
709 static void dot_vframe
PARAMS ((int));
710 static void dot_vframesp
PARAMS ((int));
711 static void dot_vframepsp
PARAMS ((int));
712 static void dot_save
PARAMS ((int));
713 static void dot_restore
PARAMS ((int));
714 static void dot_restorereg
PARAMS ((int));
715 static void dot_restorereg_p
PARAMS ((int));
716 static void dot_handlerdata
PARAMS ((int));
717 static void dot_unwentry
PARAMS ((int));
718 static void dot_altrp
PARAMS ((int));
719 static void dot_savemem
PARAMS ((int));
720 static void dot_saveg
PARAMS ((int));
721 static void dot_savef
PARAMS ((int));
722 static void dot_saveb
PARAMS ((int));
723 static void dot_savegf
PARAMS ((int));
724 static void dot_spill
PARAMS ((int));
725 static void dot_spillreg
PARAMS ((int));
726 static void dot_spillmem
PARAMS ((int));
727 static void dot_spillreg_p
PARAMS ((int));
728 static void dot_spillmem_p
PARAMS ((int));
729 static void dot_label_state
PARAMS ((int));
730 static void dot_copy_state
PARAMS ((int));
731 static void dot_unwabi
PARAMS ((int));
732 static void dot_personality
PARAMS ((int));
733 static void dot_body
PARAMS ((int));
734 static void dot_prologue
PARAMS ((int));
735 static void dot_endp
PARAMS ((int));
736 static void dot_template
PARAMS ((int));
737 static void dot_regstk
PARAMS ((int));
738 static void dot_rot
PARAMS ((int));
739 static void dot_byteorder
PARAMS ((int));
740 static void dot_psr
PARAMS ((int));
741 static void dot_alias
PARAMS ((int));
742 static void dot_ln
PARAMS ((int));
743 static char *parse_section_name
PARAMS ((void));
744 static void dot_xdata
PARAMS ((int));
745 static void stmt_float_cons
PARAMS ((int));
746 static void stmt_cons_ua
PARAMS ((int));
747 static void dot_xfloat_cons
PARAMS ((int));
748 static void dot_xstringer
PARAMS ((int));
749 static void dot_xdata_ua
PARAMS ((int));
750 static void dot_xfloat_cons_ua
PARAMS ((int));
751 static void print_prmask
PARAMS ((valueT mask
));
752 static void dot_pred_rel
PARAMS ((int));
753 static void dot_reg_val
PARAMS ((int));
754 static void dot_dv_mode
PARAMS ((int));
755 static void dot_entry
PARAMS ((int));
756 static void dot_mem_offset
PARAMS ((int));
757 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
758 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
759 static void declare_register_set
PARAMS ((const char *, int, int));
760 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
761 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
764 static int parse_operand
PARAMS ((expressionS
*e
));
765 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
766 static int errata_nop_necessary_p
PARAMS ((struct slot
*, enum ia64_unit
));
767 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
768 static void emit_one_bundle
PARAMS ((void));
769 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
770 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
771 bfd_reloc_code_real_type r_type
));
772 static void insn_group_break
PARAMS ((int, int, int));
773 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
774 struct rsrc
*, int depind
, int path
));
775 static void add_qp_mutex
PARAMS((valueT mask
));
776 static void add_qp_imply
PARAMS((int p1
, int p2
));
777 static void clear_qp_branch_flag
PARAMS((valueT mask
));
778 static void clear_qp_mutex
PARAMS((valueT mask
));
779 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
780 static int has_suffix_p
PARAMS((const char *, const char *));
781 static void clear_register_values
PARAMS ((void));
782 static void print_dependency
PARAMS ((const char *action
, int depind
));
783 static void instruction_serialization
PARAMS ((void));
784 static void data_serialization
PARAMS ((void));
785 static void remove_marked_resource
PARAMS ((struct rsrc
*));
786 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
787 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
788 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
789 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
790 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
791 struct ia64_opcode
*, int, struct rsrc
[], int, int));
792 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
793 static void check_dependencies
PARAMS((struct ia64_opcode
*));
794 static void mark_resources
PARAMS((struct ia64_opcode
*));
795 static void update_dependencies
PARAMS((struct ia64_opcode
*));
796 static void note_register_values
PARAMS((struct ia64_opcode
*));
797 static int qp_mutex
PARAMS ((int, int, int));
798 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
799 static void output_vbyte_mem
PARAMS ((int, char *, char *));
800 static void count_output
PARAMS ((int, char *, char *));
801 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
802 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
803 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
804 static void output_P1_format
PARAMS ((vbyte_func
, int));
805 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
806 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
807 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
808 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
809 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
810 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
811 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
812 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
813 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
814 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
815 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
816 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
817 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
818 static char format_ab_reg
PARAMS ((int, int));
819 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
821 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
822 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
824 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
825 static unw_rec_list
*output_prologue
PARAMS ((void));
826 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
827 static unw_rec_list
*output_body
PARAMS ((void));
828 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
829 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
830 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
831 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
832 static unw_rec_list
*output_rp_when
PARAMS ((void));
833 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
834 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
835 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
836 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
837 static unw_rec_list
*output_pfs_when
PARAMS ((void));
838 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
839 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
840 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
841 static unw_rec_list
*output_preds_when
PARAMS ((void));
842 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
843 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
844 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
845 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
846 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
847 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
848 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
849 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
850 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
851 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
852 static unw_rec_list
*output_unat_when
PARAMS ((void));
853 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
854 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
855 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
856 static unw_rec_list
*output_lc_when
PARAMS ((void));
857 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
858 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
859 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
860 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
861 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
862 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
863 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
864 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
865 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
866 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
867 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
868 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
869 static unw_rec_list
*output_bsp_when
PARAMS ((void));
870 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
871 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
872 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
873 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
874 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
875 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
876 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
877 static unw_rec_list
*output_rnat_when
PARAMS ((void));
878 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
879 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
880 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
881 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
882 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
883 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
884 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
885 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
886 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
887 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
889 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
891 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
893 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
894 unsigned int, unsigned int));
895 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
896 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
897 static int calc_record_size
PARAMS ((unw_rec_list
*));
898 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
899 static int count_bits
PARAMS ((unsigned long));
900 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
901 unsigned long, fragS
*));
902 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
903 static void fixup_unw_records
PARAMS ((unw_rec_list
*));
904 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
905 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
906 static void generate_unwind_image
PARAMS ((const char *));
907 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
908 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
909 static void free_saved_prologue_counts
PARAMS ((void));
911 /* Build the unwind section name by appending the (possibly stripped)
912 text section NAME to the unwind PREFIX. The resulting string
913 pointer is assigned to RESULT. The string is allocated on the
914 stack, so this must be a macro... */
915 #define make_unw_section_name(special, text_name, result) \
917 const char *_prefix = special_section_name[special]; \
918 const char *_suffix = text_name; \
919 size_t _prefix_len, _suffix_len; \
921 if (strncmp (text_name, ".gnu.linkonce.t.", \
922 sizeof (".gnu.linkonce.t.") - 1) == 0) \
924 _prefix = special_linkonce_name[special - SPECIAL_SECTION_UNWIND]; \
925 _suffix += sizeof (".gnu.linkonce.t.") - 1; \
927 _prefix_len = strlen (_prefix), _suffix_len = strlen (_suffix); \
928 _result = alloca (_prefix_len + _suffix_len + 1); \
929 memcpy (_result, _prefix, _prefix_len); \
930 memcpy (_result + _prefix_len, _suffix, _suffix_len); \
931 _result[_prefix_len + _suffix_len] = '\0'; \
936 /* Determine if application register REGNUM resides in the integer
937 unit (as opposed to the memory unit). */
939 ar_is_in_integer_unit (reg
)
944 return (reg
== 64 /* pfs */
945 || reg
== 65 /* lc */
946 || reg
== 66 /* ec */
947 /* ??? ias accepts and puts these in the integer unit. */
948 || (reg
>= 112 && reg
<= 127));
951 /* Switch to section NAME and create section if necessary. It's
952 rather ugly that we have to manipulate input_line_pointer but I
953 don't see any other way to accomplish the same thing without
954 changing obj-elf.c (which may be the Right Thing, in the end). */
959 char *saved_input_line_pointer
;
961 saved_input_line_pointer
= input_line_pointer
;
962 input_line_pointer
= name
;
964 input_line_pointer
= saved_input_line_pointer
;
967 /* Map 's' to SHF_IA_64_SHORT. */
970 ia64_elf_section_letter (letter
, ptr_msg
)
975 return SHF_IA_64_SHORT
;
976 else if (letter
== 'o')
977 return SHF_LINK_ORDER
;
979 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
983 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
986 ia64_elf_section_flags (flags
, attr
, type
)
988 int attr
, type ATTRIBUTE_UNUSED
;
990 if (attr
& SHF_IA_64_SHORT
)
991 flags
|= SEC_SMALL_DATA
;
996 ia64_elf_section_type (str
, len
)
1000 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1002 if (STREQ (ELF_STRING_ia64_unwind_info
))
1003 return SHT_PROGBITS
;
1005 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1006 return SHT_PROGBITS
;
1008 if (STREQ (ELF_STRING_ia64_unwind
))
1009 return SHT_IA_64_UNWIND
;
1011 if (STREQ (ELF_STRING_ia64_unwind_once
))
1012 return SHT_IA_64_UNWIND
;
1014 if (STREQ ("unwind"))
1015 return SHT_IA_64_UNWIND
;
1017 if (STREQ ("init_array"))
1018 return SHT_INIT_ARRAY
;
1020 if (STREQ ("fini_array"))
1021 return SHT_FINI_ARRAY
;
1028 set_regstack (ins
, locs
, outs
, rots
)
1029 unsigned int ins
, locs
, outs
, rots
;
1031 /* Size of frame. */
1034 sof
= ins
+ locs
+ outs
;
1037 as_bad ("Size of frame exceeds maximum of 96 registers");
1042 as_warn ("Size of rotating registers exceeds frame size");
1045 md
.in
.base
= REG_GR
+ 32;
1046 md
.loc
.base
= md
.in
.base
+ ins
;
1047 md
.out
.base
= md
.loc
.base
+ locs
;
1049 md
.in
.num_regs
= ins
;
1050 md
.loc
.num_regs
= locs
;
1051 md
.out
.num_regs
= outs
;
1052 md
.rot
.num_regs
= rots
;
1059 struct label_fix
*lfix
;
1061 subsegT saved_subseg
;
1064 if (!md
.last_text_seg
)
1067 saved_seg
= now_seg
;
1068 saved_subseg
= now_subseg
;
1070 subseg_set (md
.last_text_seg
, 0);
1072 while (md
.num_slots_in_use
> 0)
1073 emit_one_bundle (); /* force out queued instructions */
1075 /* In case there are labels following the last instruction, resolve
1077 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1079 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1080 symbol_set_frag (lfix
->sym
, frag_now
);
1082 CURR_SLOT
.label_fixups
= 0;
1083 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1085 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1086 symbol_set_frag (lfix
->sym
, frag_now
);
1088 CURR_SLOT
.tag_fixups
= 0;
1090 /* In case there are unwind directives following the last instruction,
1091 resolve those now. We only handle body and prologue directives here.
1092 Give an error for others. */
1093 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1095 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
1096 || ptr
->r
.type
== body
)
1098 ptr
->slot_number
= (unsigned long) frag_more (0);
1099 ptr
->slot_frag
= frag_now
;
1102 as_bad (_("Unwind directive not followed by an instruction."));
1104 unwind
.current_entry
= NULL
;
1106 subseg_set (saved_seg
, saved_subseg
);
1108 if (md
.qp
.X_op
== O_register
)
1109 as_bad ("qualifying predicate not followed by instruction");
1113 ia64_do_align (nbytes
)
1116 char *saved_input_line_pointer
= input_line_pointer
;
1118 input_line_pointer
= "";
1119 s_align_bytes (nbytes
);
1120 input_line_pointer
= saved_input_line_pointer
;
1124 ia64_cons_align (nbytes
)
1129 char *saved_input_line_pointer
= input_line_pointer
;
1130 input_line_pointer
= "";
1131 s_align_bytes (nbytes
);
1132 input_line_pointer
= saved_input_line_pointer
;
1136 /* Output COUNT bytes to a memory location. */
1137 static unsigned char *vbyte_mem_ptr
= NULL
;
1140 output_vbyte_mem (count
, ptr
, comment
)
1143 char *comment ATTRIBUTE_UNUSED
;
1146 if (vbyte_mem_ptr
== NULL
)
1151 for (x
= 0; x
< count
; x
++)
1152 *(vbyte_mem_ptr
++) = ptr
[x
];
1155 /* Count the number of bytes required for records. */
1156 static int vbyte_count
= 0;
1158 count_output (count
, ptr
, comment
)
1160 char *ptr ATTRIBUTE_UNUSED
;
1161 char *comment ATTRIBUTE_UNUSED
;
1163 vbyte_count
+= count
;
1167 output_R1_format (f
, rtype
, rlen
)
1169 unw_record_type rtype
;
1176 output_R3_format (f
, rtype
, rlen
);
1182 else if (rtype
!= prologue
)
1183 as_bad ("record type is not valid");
1185 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1186 (*f
) (1, &byte
, NULL
);
1190 output_R2_format (f
, mask
, grsave
, rlen
)
1197 mask
= (mask
& 0x0f);
1198 grsave
= (grsave
& 0x7f);
1200 bytes
[0] = (UNW_R2
| (mask
>> 1));
1201 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1202 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1203 (*f
) (count
, bytes
, NULL
);
1207 output_R3_format (f
, rtype
, rlen
)
1209 unw_record_type rtype
;
1216 output_R1_format (f
, rtype
, rlen
);
1222 else if (rtype
!= prologue
)
1223 as_bad ("record type is not valid");
1224 bytes
[0] = (UNW_R3
| r
);
1225 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1226 (*f
) (count
+ 1, bytes
, NULL
);
1230 output_P1_format (f
, brmask
)
1235 byte
= UNW_P1
| (brmask
& 0x1f);
1236 (*f
) (1, &byte
, NULL
);
1240 output_P2_format (f
, brmask
, gr
)
1246 brmask
= (brmask
& 0x1f);
1247 bytes
[0] = UNW_P2
| (brmask
>> 1);
1248 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1249 (*f
) (2, bytes
, NULL
);
1253 output_P3_format (f
, rtype
, reg
)
1255 unw_record_type rtype
;
1300 as_bad ("Invalid record type for P3 format.");
1302 bytes
[0] = (UNW_P3
| (r
>> 1));
1303 bytes
[1] = (((r
& 1) << 7) | reg
);
1304 (*f
) (2, bytes
, NULL
);
1308 output_P4_format (f
, imask
, imask_size
)
1310 unsigned char *imask
;
1311 unsigned long imask_size
;
1314 (*f
) (imask_size
, imask
, NULL
);
1318 output_P5_format (f
, grmask
, frmask
)
1321 unsigned long frmask
;
1324 grmask
= (grmask
& 0x0f);
1327 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1328 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1329 bytes
[3] = (frmask
& 0x000000ff);
1330 (*f
) (4, bytes
, NULL
);
1334 output_P6_format (f
, rtype
, rmask
)
1336 unw_record_type rtype
;
1342 if (rtype
== gr_mem
)
1344 else if (rtype
!= fr_mem
)
1345 as_bad ("Invalid record type for format P6");
1346 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1347 (*f
) (1, &byte
, NULL
);
1351 output_P7_format (f
, rtype
, w1
, w2
)
1353 unw_record_type rtype
;
1360 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1365 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1415 bytes
[0] = (UNW_P7
| r
);
1416 (*f
) (count
, bytes
, NULL
);
1420 output_P8_format (f
, rtype
, t
)
1422 unw_record_type rtype
;
1461 case bspstore_psprel
:
1464 case bspstore_sprel
:
1476 case priunat_when_gr
:
1479 case priunat_psprel
:
1485 case priunat_when_mem
:
1492 count
+= output_leb128 (bytes
+ 2, t
, 0);
1493 (*f
) (count
, bytes
, NULL
);
1497 output_P9_format (f
, grmask
, gr
)
1504 bytes
[1] = (grmask
& 0x0f);
1505 bytes
[2] = (gr
& 0x7f);
1506 (*f
) (3, bytes
, NULL
);
1510 output_P10_format (f
, abi
, context
)
1517 bytes
[1] = (abi
& 0xff);
1518 bytes
[2] = (context
& 0xff);
1519 (*f
) (3, bytes
, NULL
);
1523 output_B1_format (f
, rtype
, label
)
1525 unw_record_type rtype
;
1526 unsigned long label
;
1532 output_B4_format (f
, rtype
, label
);
1535 if (rtype
== copy_state
)
1537 else if (rtype
!= label_state
)
1538 as_bad ("Invalid record type for format B1");
1540 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1541 (*f
) (1, &byte
, NULL
);
1545 output_B2_format (f
, ecount
, t
)
1547 unsigned long ecount
;
1554 output_B3_format (f
, ecount
, t
);
1557 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1558 count
+= output_leb128 (bytes
+ 1, t
, 0);
1559 (*f
) (count
, bytes
, NULL
);
1563 output_B3_format (f
, ecount
, t
)
1565 unsigned long ecount
;
1572 output_B2_format (f
, ecount
, t
);
1576 count
+= output_leb128 (bytes
+ 1, t
, 0);
1577 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1578 (*f
) (count
, bytes
, NULL
);
1582 output_B4_format (f
, rtype
, label
)
1584 unw_record_type rtype
;
1585 unsigned long label
;
1592 output_B1_format (f
, rtype
, label
);
1596 if (rtype
== copy_state
)
1598 else if (rtype
!= label_state
)
1599 as_bad ("Invalid record type for format B1");
1601 bytes
[0] = (UNW_B4
| (r
<< 3));
1602 count
+= output_leb128 (bytes
+ 1, label
, 0);
1603 (*f
) (count
, bytes
, NULL
);
1607 format_ab_reg (ab
, reg
)
1614 ret
= (ab
<< 5) | reg
;
1619 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1621 unw_record_type rtype
;
1631 if (rtype
== spill_sprel
)
1633 else if (rtype
!= spill_psprel
)
1634 as_bad ("Invalid record type for format X1");
1635 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1636 count
+= output_leb128 (bytes
+ 2, t
, 0);
1637 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1638 (*f
) (count
, bytes
, NULL
);
1642 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1651 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1652 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1653 count
+= output_leb128 (bytes
+ 3, t
, 0);
1654 (*f
) (count
, bytes
, NULL
);
1658 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1660 unw_record_type rtype
;
1671 if (rtype
== spill_sprel_p
)
1673 else if (rtype
!= spill_psprel_p
)
1674 as_bad ("Invalid record type for format X3");
1675 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1676 bytes
[2] = format_ab_reg (ab
, reg
);
1677 count
+= output_leb128 (bytes
+ 3, t
, 0);
1678 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1679 (*f
) (count
, bytes
, NULL
);
1683 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1693 bytes
[1] = (qp
& 0x3f);
1694 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1695 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1696 count
+= output_leb128 (bytes
+ 4, t
, 0);
1697 (*f
) (count
, bytes
, NULL
);
1700 /* This function allocates a record list structure, and initializes fields. */
1702 static unw_rec_list
*
1703 alloc_record (unw_record_type t
)
1706 ptr
= xmalloc (sizeof (*ptr
));
1708 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1710 ptr
->next_slot_number
= 0;
1711 ptr
->next_slot_frag
= 0;
1715 static unw_rec_list
*
1718 unw_rec_list
*ptr
= alloc_record (prologue
);
1719 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1723 static unw_rec_list
*
1724 output_prologue_gr (saved_mask
, reg
)
1725 unsigned int saved_mask
;
1728 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1729 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1730 ptr
->r
.record
.r
.grmask
= saved_mask
;
1731 ptr
->r
.record
.r
.grsave
= reg
;
1735 static unw_rec_list
*
1738 unw_rec_list
*ptr
= alloc_record (body
);
1742 static unw_rec_list
*
1743 output_mem_stack_f (size
)
1746 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1747 ptr
->r
.record
.p
.size
= size
;
1751 static unw_rec_list
*
1752 output_mem_stack_v ()
1754 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1758 static unw_rec_list
*
1762 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1763 ptr
->r
.record
.p
.gr
= gr
;
1767 static unw_rec_list
*
1768 output_psp_sprel (offset
)
1769 unsigned int offset
;
1771 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1772 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1776 static unw_rec_list
*
1779 unw_rec_list
*ptr
= alloc_record (rp_when
);
1783 static unw_rec_list
*
1787 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1788 ptr
->r
.record
.p
.gr
= gr
;
1792 static unw_rec_list
*
1796 unw_rec_list
*ptr
= alloc_record (rp_br
);
1797 ptr
->r
.record
.p
.br
= br
;
1801 static unw_rec_list
*
1802 output_rp_psprel (offset
)
1803 unsigned int offset
;
1805 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1806 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1810 static unw_rec_list
*
1811 output_rp_sprel (offset
)
1812 unsigned int offset
;
1814 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1815 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1819 static unw_rec_list
*
1822 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1826 static unw_rec_list
*
1830 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1831 ptr
->r
.record
.p
.gr
= gr
;
1835 static unw_rec_list
*
1836 output_pfs_psprel (offset
)
1837 unsigned int offset
;
1839 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1840 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1844 static unw_rec_list
*
1845 output_pfs_sprel (offset
)
1846 unsigned int offset
;
1848 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1849 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1853 static unw_rec_list
*
1854 output_preds_when ()
1856 unw_rec_list
*ptr
= alloc_record (preds_when
);
1860 static unw_rec_list
*
1861 output_preds_gr (gr
)
1864 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1865 ptr
->r
.record
.p
.gr
= gr
;
1869 static unw_rec_list
*
1870 output_preds_psprel (offset
)
1871 unsigned int offset
;
1873 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1874 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1878 static unw_rec_list
*
1879 output_preds_sprel (offset
)
1880 unsigned int offset
;
1882 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1883 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1887 static unw_rec_list
*
1888 output_fr_mem (mask
)
1891 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1892 ptr
->r
.record
.p
.rmask
= mask
;
1896 static unw_rec_list
*
1897 output_frgr_mem (gr_mask
, fr_mask
)
1898 unsigned int gr_mask
;
1899 unsigned int fr_mask
;
1901 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1902 ptr
->r
.record
.p
.grmask
= gr_mask
;
1903 ptr
->r
.record
.p
.frmask
= fr_mask
;
1907 static unw_rec_list
*
1908 output_gr_gr (mask
, reg
)
1912 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1913 ptr
->r
.record
.p
.grmask
= mask
;
1914 ptr
->r
.record
.p
.gr
= reg
;
1918 static unw_rec_list
*
1919 output_gr_mem (mask
)
1922 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1923 ptr
->r
.record
.p
.rmask
= mask
;
1927 static unw_rec_list
*
1928 output_br_mem (unsigned int mask
)
1930 unw_rec_list
*ptr
= alloc_record (br_mem
);
1931 ptr
->r
.record
.p
.brmask
= mask
;
1935 static unw_rec_list
*
1936 output_br_gr (save_mask
, reg
)
1937 unsigned int save_mask
;
1940 unw_rec_list
*ptr
= alloc_record (br_gr
);
1941 ptr
->r
.record
.p
.brmask
= save_mask
;
1942 ptr
->r
.record
.p
.gr
= reg
;
1946 static unw_rec_list
*
1947 output_spill_base (offset
)
1948 unsigned int offset
;
1950 unw_rec_list
*ptr
= alloc_record (spill_base
);
1951 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1955 static unw_rec_list
*
1958 unw_rec_list
*ptr
= alloc_record (unat_when
);
1962 static unw_rec_list
*
1966 unw_rec_list
*ptr
= alloc_record (unat_gr
);
1967 ptr
->r
.record
.p
.gr
= gr
;
1971 static unw_rec_list
*
1972 output_unat_psprel (offset
)
1973 unsigned int offset
;
1975 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
1976 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
1980 static unw_rec_list
*
1981 output_unat_sprel (offset
)
1982 unsigned int offset
;
1984 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
1985 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1989 static unw_rec_list
*
1992 unw_rec_list
*ptr
= alloc_record (lc_when
);
1996 static unw_rec_list
*
2000 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2001 ptr
->r
.record
.p
.gr
= gr
;
2005 static unw_rec_list
*
2006 output_lc_psprel (offset
)
2007 unsigned int offset
;
2009 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2010 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2014 static unw_rec_list
*
2015 output_lc_sprel (offset
)
2016 unsigned int offset
;
2018 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2019 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2023 static unw_rec_list
*
2026 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2030 static unw_rec_list
*
2034 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2035 ptr
->r
.record
.p
.gr
= gr
;
2039 static unw_rec_list
*
2040 output_fpsr_psprel (offset
)
2041 unsigned int offset
;
2043 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2044 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2048 static unw_rec_list
*
2049 output_fpsr_sprel (offset
)
2050 unsigned int offset
;
2052 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2053 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2057 static unw_rec_list
*
2058 output_priunat_when_gr ()
2060 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2064 static unw_rec_list
*
2065 output_priunat_when_mem ()
2067 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2071 static unw_rec_list
*
2072 output_priunat_gr (gr
)
2075 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2076 ptr
->r
.record
.p
.gr
= gr
;
2080 static unw_rec_list
*
2081 output_priunat_psprel (offset
)
2082 unsigned int offset
;
2084 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2085 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2089 static unw_rec_list
*
2090 output_priunat_sprel (offset
)
2091 unsigned int offset
;
2093 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2094 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2098 static unw_rec_list
*
2101 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2105 static unw_rec_list
*
2109 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2110 ptr
->r
.record
.p
.gr
= gr
;
2114 static unw_rec_list
*
2115 output_bsp_psprel (offset
)
2116 unsigned int offset
;
2118 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2119 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2123 static unw_rec_list
*
2124 output_bsp_sprel (offset
)
2125 unsigned int offset
;
2127 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2128 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2132 static unw_rec_list
*
2133 output_bspstore_when ()
2135 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2139 static unw_rec_list
*
2140 output_bspstore_gr (gr
)
2143 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2144 ptr
->r
.record
.p
.gr
= gr
;
2148 static unw_rec_list
*
2149 output_bspstore_psprel (offset
)
2150 unsigned int offset
;
2152 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2153 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2157 static unw_rec_list
*
2158 output_bspstore_sprel (offset
)
2159 unsigned int offset
;
2161 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2162 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2166 static unw_rec_list
*
2169 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2173 static unw_rec_list
*
2177 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2178 ptr
->r
.record
.p
.gr
= gr
;
2182 static unw_rec_list
*
2183 output_rnat_psprel (offset
)
2184 unsigned int offset
;
2186 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2187 ptr
->r
.record
.p
.pspoff
= offset
/ 4;
2191 static unw_rec_list
*
2192 output_rnat_sprel (offset
)
2193 unsigned int offset
;
2195 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2196 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2200 static unw_rec_list
*
2201 output_unwabi (abi
, context
)
2203 unsigned long context
;
2205 unw_rec_list
*ptr
= alloc_record (unwabi
);
2206 ptr
->r
.record
.p
.abi
= abi
;
2207 ptr
->r
.record
.p
.context
= context
;
2211 static unw_rec_list
*
2212 output_epilogue (unsigned long ecount
)
2214 unw_rec_list
*ptr
= alloc_record (epilogue
);
2215 ptr
->r
.record
.b
.ecount
= ecount
;
2219 static unw_rec_list
*
2220 output_label_state (unsigned long label
)
2222 unw_rec_list
*ptr
= alloc_record (label_state
);
2223 ptr
->r
.record
.b
.label
= label
;
2227 static unw_rec_list
*
2228 output_copy_state (unsigned long label
)
2230 unw_rec_list
*ptr
= alloc_record (copy_state
);
2231 ptr
->r
.record
.b
.label
= label
;
2235 static unw_rec_list
*
2236 output_spill_psprel (ab
, reg
, offset
)
2239 unsigned int offset
;
2241 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2242 ptr
->r
.record
.x
.ab
= ab
;
2243 ptr
->r
.record
.x
.reg
= reg
;
2244 ptr
->r
.record
.x
.pspoff
= offset
/ 4;
2248 static unw_rec_list
*
2249 output_spill_sprel (ab
, reg
, offset
)
2252 unsigned int offset
;
2254 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2255 ptr
->r
.record
.x
.ab
= ab
;
2256 ptr
->r
.record
.x
.reg
= reg
;
2257 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2261 static unw_rec_list
*
2262 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2265 unsigned int offset
;
2266 unsigned int predicate
;
2268 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2269 ptr
->r
.record
.x
.ab
= ab
;
2270 ptr
->r
.record
.x
.reg
= reg
;
2271 ptr
->r
.record
.x
.pspoff
= offset
/ 4;
2272 ptr
->r
.record
.x
.qp
= predicate
;
2276 static unw_rec_list
*
2277 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2280 unsigned int offset
;
2281 unsigned int predicate
;
2283 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2284 ptr
->r
.record
.x
.ab
= ab
;
2285 ptr
->r
.record
.x
.reg
= reg
;
2286 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2287 ptr
->r
.record
.x
.qp
= predicate
;
2291 static unw_rec_list
*
2292 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2295 unsigned int targ_reg
;
2298 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2299 ptr
->r
.record
.x
.ab
= ab
;
2300 ptr
->r
.record
.x
.reg
= reg
;
2301 ptr
->r
.record
.x
.treg
= targ_reg
;
2302 ptr
->r
.record
.x
.xy
= xy
;
2306 static unw_rec_list
*
2307 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2310 unsigned int targ_reg
;
2312 unsigned int predicate
;
2314 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2315 ptr
->r
.record
.x
.ab
= ab
;
2316 ptr
->r
.record
.x
.reg
= reg
;
2317 ptr
->r
.record
.x
.treg
= targ_reg
;
2318 ptr
->r
.record
.x
.xy
= xy
;
2319 ptr
->r
.record
.x
.qp
= predicate
;
2323 /* Given a unw_rec_list process the correct format with the
2324 specified function. */
2327 process_one_record (ptr
, f
)
2331 unsigned long fr_mask
, gr_mask
;
2333 switch (ptr
->r
.type
)
2339 /* These are taken care of by prologue/prologue_gr. */
2344 if (ptr
->r
.type
== prologue_gr
)
2345 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2346 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2348 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2350 /* Output descriptor(s) for union of register spills (if any). */
2351 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2352 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2355 if ((fr_mask
& ~0xfUL
) == 0)
2356 output_P6_format (f
, fr_mem
, fr_mask
);
2359 output_P5_format (f
, gr_mask
, fr_mask
);
2364 output_P6_format (f
, gr_mem
, gr_mask
);
2365 if (ptr
->r
.record
.r
.mask
.br_mem
)
2366 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2368 /* output imask descriptor if necessary: */
2369 if (ptr
->r
.record
.r
.mask
.i
)
2370 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2371 ptr
->r
.record
.r
.imask_size
);
2375 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2379 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2380 ptr
->r
.record
.p
.size
);
2393 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2396 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2399 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2407 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2416 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2426 case bspstore_sprel
:
2428 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2431 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2434 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2437 as_bad ("spill_mask record unimplemented.");
2439 case priunat_when_gr
:
2440 case priunat_when_mem
:
2444 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2446 case priunat_psprel
:
2448 case bspstore_psprel
:
2450 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2453 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2456 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2460 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2463 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2464 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2465 ptr
->r
.record
.x
.pspoff
);
2468 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2469 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2470 ptr
->r
.record
.x
.spoff
);
2473 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2474 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2475 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2477 case spill_psprel_p
:
2478 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2479 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2480 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2483 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2484 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2485 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2488 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2489 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2490 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2494 as_bad ("record_type_not_valid");
2499 /* Given a unw_rec_list list, process all the records with
2500 the specified function. */
2502 process_unw_records (list
, f
)
2507 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2508 process_one_record (ptr
, f
);
2511 /* Determine the size of a record list in bytes. */
2513 calc_record_size (list
)
2517 process_unw_records (list
, count_output
);
2521 /* Update IMASK bitmask to reflect the fact that one or more registers
2522 of type TYPE are saved starting at instruction with index T. If N
2523 bits are set in REGMASK, it is assumed that instructions T through
2524 T+N-1 save these registers.
2528 1: instruction saves next fp reg
2529 2: instruction saves next general reg
2530 3: instruction saves next branch reg */
2532 set_imask (region
, regmask
, t
, type
)
2533 unw_rec_list
*region
;
2534 unsigned long regmask
;
2538 unsigned char *imask
;
2539 unsigned long imask_size
;
2543 imask
= region
->r
.record
.r
.mask
.i
;
2544 imask_size
= region
->r
.record
.r
.imask_size
;
2547 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2548 imask
= xmalloc (imask_size
);
2549 memset (imask
, 0, imask_size
);
2551 region
->r
.record
.r
.imask_size
= imask_size
;
2552 region
->r
.record
.r
.mask
.i
= imask
;
2556 pos
= 2 * (3 - t
% 4);
2559 if (i
>= imask_size
)
2561 as_bad ("Ignoring attempt to spill beyond end of region");
2565 imask
[i
] |= (type
& 0x3) << pos
;
2567 regmask
&= (regmask
- 1);
2578 count_bits (unsigned long mask
)
2590 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2591 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2592 containing FIRST_ADDR. */
2595 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
)
2596 unsigned long slot_addr
;
2598 unsigned long first_addr
;
2601 unsigned long index
= 0;
2603 /* First time we are called, the initial address and frag are invalid. */
2604 if (first_addr
== 0)
2607 /* If the two addresses are in different frags, then we need to add in
2608 the remaining size of this frag, and then the entire size of intermediate
2610 while (slot_frag
!= first_frag
)
2612 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2616 /* We can get the final addresses only after relaxation is
2618 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2619 index
+= 3 * ((first_frag
->fr_next
->fr_address
2620 - first_frag
->fr_address
2621 - first_frag
->fr_fix
) >> 4);
2624 /* We don't know what the final addresses will be. We try our
2625 best to estimate. */
2626 switch (first_frag
->fr_type
)
2632 as_fatal ("only constant space allocation is supported");
2638 /* Take alignment into account. Assume the worst case
2639 before relaxation. */
2640 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2644 if (first_frag
->fr_symbol
)
2646 as_fatal ("only constant offsets are supported");
2650 index
+= 3 * (first_frag
->fr_offset
>> 4);
2654 /* Add in the full size of the frag converted to instruction slots. */
2655 index
+= 3 * (first_frag
->fr_fix
>> 4);
2656 /* Subtract away the initial part before first_addr. */
2657 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2658 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2660 /* Move to the beginning of the next frag. */
2661 first_frag
= first_frag
->fr_next
;
2662 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2665 /* Add in the used part of the last frag. */
2666 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2667 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2671 /* Optimize unwind record directives. */
2673 static unw_rec_list
*
2674 optimize_unw_records (list
)
2680 /* If the only unwind record is ".prologue" or ".prologue" followed
2681 by ".body", then we can optimize the unwind directives away. */
2682 if (list
->r
.type
== prologue
2683 && (list
->next
== NULL
2684 || (list
->next
->r
.type
== body
&& list
->next
->next
== NULL
)))
2690 /* Given a complete record list, process any records which have
2691 unresolved fields, (ie length counts for a prologue). After
2692 this has been run, all necessary information should be available
2693 within each record to generate an image. */
2696 fixup_unw_records (list
)
2699 unw_rec_list
*ptr
, *region
= 0;
2700 unsigned long first_addr
= 0, rlen
= 0, t
;
2701 fragS
*first_frag
= 0;
2703 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2705 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2706 as_bad (" Insn slot not set in unwind record.");
2707 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2708 first_addr
, first_frag
);
2709 switch (ptr
->r
.type
)
2716 int size
, dir_len
= 0;
2717 unsigned long last_addr
;
2720 first_addr
= ptr
->slot_number
;
2721 first_frag
= ptr
->slot_frag
;
2722 /* Find either the next body/prologue start, or the end of
2723 the list, and determine the size of the region. */
2724 last_addr
= list
->next_slot_number
;
2725 last_frag
= list
->next_slot_frag
;
2726 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2727 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2728 || last
->r
.type
== body
)
2730 last_addr
= last
->slot_number
;
2731 last_frag
= last
->slot_frag
;
2734 else if (!last
->next
)
2736 /* In the absence of an explicit .body directive,
2737 the prologue ends after the last instruction
2738 covered by an unwind directive. */
2739 if (ptr
->r
.type
!= body
)
2741 last_addr
= last
->slot_number
;
2742 last_frag
= last
->slot_frag
;
2743 switch (last
->r
.type
)
2746 dir_len
= (count_bits (last
->r
.record
.p
.frmask
)
2747 + count_bits (last
->r
.record
.p
.grmask
));
2751 dir_len
+= count_bits (last
->r
.record
.p
.rmask
);
2755 dir_len
+= count_bits (last
->r
.record
.p
.brmask
);
2758 dir_len
+= count_bits (last
->r
.record
.p
.grmask
);
2767 size
= (slot_index (last_addr
, last_frag
, first_addr
, first_frag
)
2769 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2770 if (ptr
->r
.type
== body
)
2771 /* End of region. */
2778 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2789 case priunat_when_gr
:
2790 case priunat_when_mem
:
2794 ptr
->r
.record
.p
.t
= t
;
2802 case spill_psprel_p
:
2803 ptr
->r
.record
.x
.t
= t
;
2809 as_bad ("frgr_mem record before region record!\n");
2812 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2813 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2814 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2815 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2820 as_bad ("fr_mem record before region record!\n");
2823 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2824 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2829 as_bad ("gr_mem record before region record!\n");
2832 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2833 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2838 as_bad ("br_mem record before region record!\n");
2841 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2842 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2848 as_bad ("gr_gr record before region record!\n");
2851 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2856 as_bad ("br_gr record before region record!\n");
2859 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2868 /* This function converts a rs_machine_dependent variant frag into a
2869 normal fill frag with the unwind image from the the record list. */
2871 ia64_convert_frag (fragS
*frag
)
2877 list
= (unw_rec_list
*) frag
->fr_opcode
;
2878 fixup_unw_records (list
);
2880 len
= calc_record_size (list
);
2881 /* pad to pointer-size boundary. */
2882 pad
= len
% md
.pointer_size
;
2884 len
+= md
.pointer_size
- pad
;
2885 /* Add 8 for the header + a pointer for the personality offset. */
2886 size
= len
+ 8 + md
.pointer_size
;
2888 /* fr_var carries the max_chars that we created the fragment with.
2889 We must, of course, have allocated enough memory earlier. */
2890 assert (frag
->fr_var
>= size
);
2892 /* Initialize the header area. fr_offset is initialized with
2893 unwind.personality_routine. */
2894 if (frag
->fr_offset
)
2896 if (md
.flags
& EF_IA_64_ABI64
)
2897 flag_value
= (bfd_vma
) 3 << 32;
2899 /* 32-bit unwind info block. */
2900 flag_value
= (bfd_vma
) 0x1003 << 32;
2905 md_number_to_chars (frag
->fr_literal
,
2906 (((bfd_vma
) 1 << 48) /* Version. */
2907 | flag_value
/* U & E handler flags. */
2908 | (len
/ md
.pointer_size
)), /* Length. */
2911 /* Skip the header. */
2912 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2913 process_unw_records (list
, output_vbyte_mem
);
2915 /* Fill the padding bytes with zeros. */
2917 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2918 md
.pointer_size
- pad
);
2920 frag
->fr_fix
+= size
;
2921 frag
->fr_type
= rs_fill
;
2923 frag
->fr_offset
= 0;
2927 convert_expr_to_ab_reg (e
, ab
, regp
)
2934 if (e
->X_op
!= O_register
)
2937 reg
= e
->X_add_number
;
2938 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2941 *regp
= reg
- REG_GR
;
2943 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2944 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2947 *regp
= reg
- REG_FR
;
2949 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
2952 *regp
= reg
- REG_BR
;
2959 case REG_PR
: *regp
= 0; break;
2960 case REG_PSP
: *regp
= 1; break;
2961 case REG_PRIUNAT
: *regp
= 2; break;
2962 case REG_BR
+ 0: *regp
= 3; break;
2963 case REG_AR
+ AR_BSP
: *regp
= 4; break;
2964 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
2965 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
2966 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
2967 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
2968 case REG_AR
+ AR_PFS
: *regp
= 9; break;
2969 case REG_AR
+ AR_LC
: *regp
= 10; break;
2979 convert_expr_to_xy_reg (e
, xy
, regp
)
2986 if (e
->X_op
!= O_register
)
2989 reg
= e
->X_add_number
;
2991 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
2994 *regp
= reg
- REG_GR
;
2996 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
2999 *regp
= reg
- REG_FR
;
3001 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3004 *regp
= reg
- REG_BR
;
3013 int dummy ATTRIBUTE_UNUSED
;
3018 radix
= *input_line_pointer
++;
3020 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3022 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3023 ignore_rest_of_line ();
3028 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3030 dot_special_section (which
)
3033 set_section ((char *) special_section_name
[which
]);
3037 add_unwind_entry (ptr
)
3041 unwind
.tail
->next
= ptr
;
3046 /* The current entry can in fact be a chain of unwind entries. */
3047 if (unwind
.current_entry
== NULL
)
3048 unwind
.current_entry
= ptr
;
3053 int dummy ATTRIBUTE_UNUSED
;
3059 if (e
.X_op
!= O_constant
)
3060 as_bad ("Operand to .fframe must be a constant");
3062 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3067 int dummy ATTRIBUTE_UNUSED
;
3073 reg
= e
.X_add_number
- REG_GR
;
3074 if (e
.X_op
== O_register
&& reg
< 128)
3076 add_unwind_entry (output_mem_stack_v ());
3077 if (! (unwind
.prologue_mask
& 2))
3078 add_unwind_entry (output_psp_gr (reg
));
3081 as_bad ("First operand to .vframe must be a general register");
3085 dot_vframesp (dummy
)
3086 int dummy ATTRIBUTE_UNUSED
;
3091 if (e
.X_op
== O_constant
)
3093 add_unwind_entry (output_mem_stack_v ());
3094 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3097 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3101 dot_vframepsp (dummy
)
3102 int dummy ATTRIBUTE_UNUSED
;
3107 if (e
.X_op
== O_constant
)
3109 add_unwind_entry (output_mem_stack_v ());
3110 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3113 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3118 int dummy ATTRIBUTE_UNUSED
;
3124 sep
= parse_operand (&e1
);
3126 as_bad ("No second operand to .save");
3127 sep
= parse_operand (&e2
);
3129 reg1
= e1
.X_add_number
;
3130 reg2
= e2
.X_add_number
- REG_GR
;
3132 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3133 if (e1
.X_op
== O_register
)
3135 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3139 case REG_AR
+ AR_BSP
:
3140 add_unwind_entry (output_bsp_when ());
3141 add_unwind_entry (output_bsp_gr (reg2
));
3143 case REG_AR
+ AR_BSPSTORE
:
3144 add_unwind_entry (output_bspstore_when ());
3145 add_unwind_entry (output_bspstore_gr (reg2
));
3147 case REG_AR
+ AR_RNAT
:
3148 add_unwind_entry (output_rnat_when ());
3149 add_unwind_entry (output_rnat_gr (reg2
));
3151 case REG_AR
+ AR_UNAT
:
3152 add_unwind_entry (output_unat_when ());
3153 add_unwind_entry (output_unat_gr (reg2
));
3155 case REG_AR
+ AR_FPSR
:
3156 add_unwind_entry (output_fpsr_when ());
3157 add_unwind_entry (output_fpsr_gr (reg2
));
3159 case REG_AR
+ AR_PFS
:
3160 add_unwind_entry (output_pfs_when ());
3161 if (! (unwind
.prologue_mask
& 4))
3162 add_unwind_entry (output_pfs_gr (reg2
));
3164 case REG_AR
+ AR_LC
:
3165 add_unwind_entry (output_lc_when ());
3166 add_unwind_entry (output_lc_gr (reg2
));
3169 add_unwind_entry (output_rp_when ());
3170 if (! (unwind
.prologue_mask
& 8))
3171 add_unwind_entry (output_rp_gr (reg2
));
3174 add_unwind_entry (output_preds_when ());
3175 if (! (unwind
.prologue_mask
& 1))
3176 add_unwind_entry (output_preds_gr (reg2
));
3179 add_unwind_entry (output_priunat_when_gr ());
3180 add_unwind_entry (output_priunat_gr (reg2
));
3183 as_bad ("First operand not a valid register");
3187 as_bad (" Second operand not a valid register");
3190 as_bad ("First operand not a register");
3195 int dummy ATTRIBUTE_UNUSED
;
3198 unsigned long ecount
; /* # of _additional_ regions to pop */
3201 sep
= parse_operand (&e1
);
3202 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3204 as_bad ("First operand to .restore must be stack pointer (sp)");
3210 parse_operand (&e2
);
3211 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3213 as_bad ("Second operand to .restore must be a constant >= 0");
3216 ecount
= e2
.X_add_number
;
3219 ecount
= unwind
.prologue_count
- 1;
3221 if (ecount
>= unwind
.prologue_count
)
3223 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3224 ecount
+ 1, unwind
.prologue_count
);
3228 add_unwind_entry (output_epilogue (ecount
));
3230 if (ecount
< unwind
.prologue_count
)
3231 unwind
.prologue_count
-= ecount
+ 1;
3233 unwind
.prologue_count
= 0;
3237 dot_restorereg (dummy
)
3238 int dummy ATTRIBUTE_UNUSED
;
3240 unsigned int ab
, reg
;
3245 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3247 as_bad ("First operand to .restorereg must be a preserved register");
3250 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3254 dot_restorereg_p (dummy
)
3255 int dummy ATTRIBUTE_UNUSED
;
3257 unsigned int qp
, ab
, reg
;
3261 sep
= parse_operand (&e1
);
3264 as_bad ("No second operand to .restorereg.p");
3268 parse_operand (&e2
);
3270 qp
= e1
.X_add_number
- REG_P
;
3271 if (e1
.X_op
!= O_register
|| qp
> 63)
3273 as_bad ("First operand to .restorereg.p must be a predicate");
3277 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3279 as_bad ("Second operand to .restorereg.p must be a preserved register");
3282 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3286 generate_unwind_image (text_name
)
3287 const char *text_name
;
3292 /* Force out pending instructions, to make sure all unwind records have
3293 a valid slot_number field. */
3294 ia64_flush_insns ();
3296 /* Generate the unwind record. */
3297 list
= optimize_unw_records (unwind
.list
);
3298 fixup_unw_records (list
);
3299 size
= calc_record_size (list
);
3301 if (size
> 0 || unwind
.force_unwind_entry
)
3303 unwind
.force_unwind_entry
= 0;
3304 /* pad to pointer-size boundary. */
3305 pad
= size
% md
.pointer_size
;
3307 size
+= md
.pointer_size
- pad
;
3308 /* Add 8 for the header + a pointer for the personality
3310 size
+= 8 + md
.pointer_size
;
3313 /* If there are unwind records, switch sections, and output the info. */
3318 bfd_reloc_code_real_type reloc
;
3320 make_unw_section_name (SPECIAL_SECTION_UNWIND_INFO
, text_name
, sec_name
);
3321 set_section (sec_name
);
3322 bfd_set_section_flags (stdoutput
, now_seg
,
3323 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3325 /* Make sure the section has 4 byte alignment for ILP32 and
3326 8 byte alignment for LP64. */
3327 frag_align (md
.pointer_size_shift
, 0, 0);
3328 record_alignment (now_seg
, md
.pointer_size_shift
);
3330 /* Set expression which points to start of unwind descriptor area. */
3331 unwind
.info
= expr_build_dot ();
3333 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3334 (offsetT
) unwind
.personality_routine
, (char *) list
);
3336 /* Add the personality address to the image. */
3337 if (unwind
.personality_routine
!= 0)
3339 exp
.X_op
= O_symbol
;
3340 exp
.X_add_symbol
= unwind
.personality_routine
;
3341 exp
.X_add_number
= 0;
3343 if (md
.flags
& EF_IA_64_BE
)
3345 if (md
.flags
& EF_IA_64_ABI64
)
3346 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3348 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3352 if (md
.flags
& EF_IA_64_ABI64
)
3353 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3355 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3358 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3359 md
.pointer_size
, &exp
, 0, reloc
);
3360 unwind
.personality_routine
= 0;
3364 free_saved_prologue_counts ();
3365 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3369 dot_handlerdata (dummy
)
3370 int dummy ATTRIBUTE_UNUSED
;
3372 const char *text_name
= segment_name (now_seg
);
3374 /* If text section name starts with ".text" (which it should),
3375 strip this prefix off. */
3376 if (strcmp (text_name
, ".text") == 0)
3379 unwind
.force_unwind_entry
= 1;
3381 /* Remember which segment we're in so we can switch back after .endp */
3382 unwind
.saved_text_seg
= now_seg
;
3383 unwind
.saved_text_subseg
= now_subseg
;
3385 /* Generate unwind info into unwind-info section and then leave that
3386 section as the currently active one so dataXX directives go into
3387 the language specific data area of the unwind info block. */
3388 generate_unwind_image (text_name
);
3389 demand_empty_rest_of_line ();
3393 dot_unwentry (dummy
)
3394 int dummy ATTRIBUTE_UNUSED
;
3396 unwind
.force_unwind_entry
= 1;
3397 demand_empty_rest_of_line ();
3402 int dummy ATTRIBUTE_UNUSED
;
3408 reg
= e
.X_add_number
- REG_BR
;
3409 if (e
.X_op
== O_register
&& reg
< 8)
3410 add_unwind_entry (output_rp_br (reg
));
3412 as_bad ("First operand not a valid branch register");
3416 dot_savemem (psprel
)
3423 sep
= parse_operand (&e1
);
3425 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3426 sep
= parse_operand (&e2
);
3428 reg1
= e1
.X_add_number
;
3429 val
= e2
.X_add_number
;
3431 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3432 if (e1
.X_op
== O_register
)
3434 if (e2
.X_op
== O_constant
)
3438 case REG_AR
+ AR_BSP
:
3439 add_unwind_entry (output_bsp_when ());
3440 add_unwind_entry ((psprel
3442 : output_bsp_sprel
) (val
));
3444 case REG_AR
+ AR_BSPSTORE
:
3445 add_unwind_entry (output_bspstore_when ());
3446 add_unwind_entry ((psprel
3447 ? output_bspstore_psprel
3448 : output_bspstore_sprel
) (val
));
3450 case REG_AR
+ AR_RNAT
:
3451 add_unwind_entry (output_rnat_when ());
3452 add_unwind_entry ((psprel
3453 ? output_rnat_psprel
3454 : output_rnat_sprel
) (val
));
3456 case REG_AR
+ AR_UNAT
:
3457 add_unwind_entry (output_unat_when ());
3458 add_unwind_entry ((psprel
3459 ? output_unat_psprel
3460 : output_unat_sprel
) (val
));
3462 case REG_AR
+ AR_FPSR
:
3463 add_unwind_entry (output_fpsr_when ());
3464 add_unwind_entry ((psprel
3465 ? output_fpsr_psprel
3466 : output_fpsr_sprel
) (val
));
3468 case REG_AR
+ AR_PFS
:
3469 add_unwind_entry (output_pfs_when ());
3470 add_unwind_entry ((psprel
3472 : output_pfs_sprel
) (val
));
3474 case REG_AR
+ AR_LC
:
3475 add_unwind_entry (output_lc_when ());
3476 add_unwind_entry ((psprel
3478 : output_lc_sprel
) (val
));
3481 add_unwind_entry (output_rp_when ());
3482 add_unwind_entry ((psprel
3484 : output_rp_sprel
) (val
));
3487 add_unwind_entry (output_preds_when ());
3488 add_unwind_entry ((psprel
3489 ? output_preds_psprel
3490 : output_preds_sprel
) (val
));
3493 add_unwind_entry (output_priunat_when_mem ());
3494 add_unwind_entry ((psprel
3495 ? output_priunat_psprel
3496 : output_priunat_sprel
) (val
));
3499 as_bad ("First operand not a valid register");
3503 as_bad (" Second operand not a valid constant");
3506 as_bad ("First operand not a register");
3511 int dummy ATTRIBUTE_UNUSED
;
3515 sep
= parse_operand (&e1
);
3517 parse_operand (&e2
);
3519 if (e1
.X_op
!= O_constant
)
3520 as_bad ("First operand to .save.g must be a constant.");
3523 int grmask
= e1
.X_add_number
;
3525 add_unwind_entry (output_gr_mem (grmask
));
3528 int reg
= e2
.X_add_number
- REG_GR
;
3529 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3530 add_unwind_entry (output_gr_gr (grmask
, reg
));
3532 as_bad ("Second operand is an invalid register.");
3539 int dummy ATTRIBUTE_UNUSED
;
3543 sep
= parse_operand (&e1
);
3545 if (e1
.X_op
!= O_constant
)
3546 as_bad ("Operand to .save.f must be a constant.");
3548 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3553 int dummy ATTRIBUTE_UNUSED
;
3560 sep
= parse_operand (&e1
);
3561 if (e1
.X_op
!= O_constant
)
3563 as_bad ("First operand to .save.b must be a constant.");
3566 brmask
= e1
.X_add_number
;
3570 sep
= parse_operand (&e2
);
3571 reg
= e2
.X_add_number
- REG_GR
;
3572 if (e2
.X_op
!= O_register
|| reg
> 127)
3574 as_bad ("Second operand to .save.b must be a general register.");
3577 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3580 add_unwind_entry (output_br_mem (brmask
));
3582 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3583 ignore_rest_of_line ();
3588 int dummy ATTRIBUTE_UNUSED
;
3592 sep
= parse_operand (&e1
);
3594 parse_operand (&e2
);
3596 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3597 as_bad ("Both operands of .save.gf must be constants.");
3600 int grmask
= e1
.X_add_number
;
3601 int frmask
= e2
.X_add_number
;
3602 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3608 int dummy ATTRIBUTE_UNUSED
;
3613 sep
= parse_operand (&e
);
3614 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3615 ignore_rest_of_line ();
3617 if (e
.X_op
!= O_constant
)
3618 as_bad ("Operand to .spill must be a constant");
3620 add_unwind_entry (output_spill_base (e
.X_add_number
));
3624 dot_spillreg (dummy
)
3625 int dummy ATTRIBUTE_UNUSED
;
3627 int sep
, ab
, xy
, reg
, treg
;
3630 sep
= parse_operand (&e1
);
3633 as_bad ("No second operand to .spillreg");
3637 parse_operand (&e2
);
3639 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3641 as_bad ("First operand to .spillreg must be a preserved register");
3645 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3647 as_bad ("Second operand to .spillreg must be a register");
3651 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3655 dot_spillmem (psprel
)
3661 sep
= parse_operand (&e1
);
3664 as_bad ("Second operand missing");
3668 parse_operand (&e2
);
3670 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3672 as_bad ("First operand to .spill%s must be a preserved register",
3673 psprel
? "psp" : "sp");
3677 if (e2
.X_op
!= O_constant
)
3679 as_bad ("Second operand to .spill%s must be a constant",
3680 psprel
? "psp" : "sp");
3685 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
3687 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
3691 dot_spillreg_p (dummy
)
3692 int dummy ATTRIBUTE_UNUSED
;
3694 int sep
, ab
, xy
, reg
, treg
;
3695 expressionS e1
, e2
, e3
;
3698 sep
= parse_operand (&e1
);
3701 as_bad ("No second and third operand to .spillreg.p");
3705 sep
= parse_operand (&e2
);
3708 as_bad ("No third operand to .spillreg.p");
3712 parse_operand (&e3
);
3714 qp
= e1
.X_add_number
- REG_P
;
3716 if (e1
.X_op
!= O_register
|| qp
> 63)
3718 as_bad ("First operand to .spillreg.p must be a predicate");
3722 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3724 as_bad ("Second operand to .spillreg.p must be a preserved register");
3728 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
3730 as_bad ("Third operand to .spillreg.p must be a register");
3734 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
3738 dot_spillmem_p (psprel
)
3741 expressionS e1
, e2
, e3
;
3745 sep
= parse_operand (&e1
);
3748 as_bad ("Second operand missing");
3752 parse_operand (&e2
);
3755 as_bad ("Second operand missing");
3759 parse_operand (&e3
);
3761 qp
= e1
.X_add_number
- REG_P
;
3762 if (e1
.X_op
!= O_register
|| qp
> 63)
3764 as_bad ("First operand to .spill%s_p must be a predicate",
3765 psprel
? "psp" : "sp");
3769 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3771 as_bad ("Second operand to .spill%s_p must be a preserved register",
3772 psprel
? "psp" : "sp");
3776 if (e3
.X_op
!= O_constant
)
3778 as_bad ("Third operand to .spill%s_p must be a constant",
3779 psprel
? "psp" : "sp");
3784 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3786 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
3790 get_saved_prologue_count (lbl
)
3793 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3795 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3799 return lpc
->prologue_count
;
3801 as_bad ("Missing .label_state %ld", lbl
);
3806 save_prologue_count (lbl
, count
)
3810 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3812 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
3816 lpc
->prologue_count
= count
;
3819 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
3821 new_lpc
->next
= unwind
.saved_prologue_counts
;
3822 new_lpc
->label_number
= lbl
;
3823 new_lpc
->prologue_count
= count
;
3824 unwind
.saved_prologue_counts
= new_lpc
;
3829 free_saved_prologue_counts ()
3831 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
3832 label_prologue_count
*next
;
3841 unwind
.saved_prologue_counts
= NULL
;
3845 dot_label_state (dummy
)
3846 int dummy ATTRIBUTE_UNUSED
;
3851 if (e
.X_op
!= O_constant
)
3853 as_bad ("Operand to .label_state must be a constant");
3856 add_unwind_entry (output_label_state (e
.X_add_number
));
3857 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
3861 dot_copy_state (dummy
)
3862 int dummy ATTRIBUTE_UNUSED
;
3867 if (e
.X_op
!= O_constant
)
3869 as_bad ("Operand to .copy_state must be a constant");
3872 add_unwind_entry (output_copy_state (e
.X_add_number
));
3873 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
3878 int dummy ATTRIBUTE_UNUSED
;
3883 sep
= parse_operand (&e1
);
3886 as_bad ("Second operand to .unwabi missing");
3889 sep
= parse_operand (&e2
);
3890 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3891 ignore_rest_of_line ();
3893 if (e1
.X_op
!= O_constant
)
3895 as_bad ("First operand to .unwabi must be a constant");
3899 if (e2
.X_op
!= O_constant
)
3901 as_bad ("Second operand to .unwabi must be a constant");
3905 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
3909 dot_personality (dummy
)
3910 int dummy ATTRIBUTE_UNUSED
;
3914 name
= input_line_pointer
;
3915 c
= get_symbol_end ();
3916 p
= input_line_pointer
;
3917 unwind
.personality_routine
= symbol_find_or_make (name
);
3918 unwind
.force_unwind_entry
= 1;
3921 demand_empty_rest_of_line ();
3926 int dummy ATTRIBUTE_UNUSED
;
3931 unwind
.proc_start
= expr_build_dot ();
3932 /* Parse names of main and alternate entry points and mark them as
3933 function symbols: */
3937 name
= input_line_pointer
;
3938 c
= get_symbol_end ();
3939 p
= input_line_pointer
;
3940 sym
= symbol_find_or_make (name
);
3941 if (unwind
.proc_start
== 0)
3943 unwind
.proc_start
= sym
;
3945 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
3948 if (*input_line_pointer
!= ',')
3950 ++input_line_pointer
;
3952 demand_empty_rest_of_line ();
3955 unwind
.prologue_count
= 0;
3956 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3957 unwind
.personality_routine
= 0;
3962 int dummy ATTRIBUTE_UNUSED
;
3964 unwind
.prologue
= 0;
3965 unwind
.prologue_mask
= 0;
3967 add_unwind_entry (output_body ());
3968 demand_empty_rest_of_line ();
3972 dot_prologue (dummy
)
3973 int dummy ATTRIBUTE_UNUSED
;
3976 int mask
= 0, grsave
= 0;
3978 if (!is_it_end_of_statement ())
3981 sep
= parse_operand (&e1
);
3983 as_bad ("No second operand to .prologue");
3984 sep
= parse_operand (&e2
);
3985 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3986 ignore_rest_of_line ();
3988 if (e1
.X_op
== O_constant
)
3990 mask
= e1
.X_add_number
;
3992 if (e2
.X_op
== O_constant
)
3993 grsave
= e2
.X_add_number
;
3994 else if (e2
.X_op
== O_register
3995 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
3998 as_bad ("Second operand not a constant or general register");
4000 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4003 as_bad ("First operand not a constant");
4006 add_unwind_entry (output_prologue ());
4008 unwind
.prologue
= 1;
4009 unwind
.prologue_mask
= mask
;
4010 ++unwind
.prologue_count
;
4015 int dummy ATTRIBUTE_UNUSED
;
4019 int bytes_per_address
;
4022 subsegT saved_subseg
;
4023 const char *sec_name
, *text_name
;
4027 if (unwind
.saved_text_seg
)
4029 saved_seg
= unwind
.saved_text_seg
;
4030 saved_subseg
= unwind
.saved_text_subseg
;
4031 unwind
.saved_text_seg
= NULL
;
4035 saved_seg
= now_seg
;
4036 saved_subseg
= now_subseg
;
4040 Use a slightly ugly scheme to derive the unwind section names from
4041 the text section name:
4043 text sect. unwind table sect.
4044 name: name: comments:
4045 ---------- ----------------- --------------------------------
4047 .text.foo .IA_64.unwind.text.foo
4048 .foo .IA_64.unwind.foo
4050 .gnu.linkonce.ia64unw.foo
4051 _info .IA_64.unwind_info gas issues error message (ditto)
4052 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
4054 This mapping is done so that:
4056 (a) An object file with unwind info only in .text will use
4057 unwind section names .IA_64.unwind and .IA_64.unwind_info.
4058 This follows the letter of the ABI and also ensures backwards
4059 compatibility with older toolchains.
4061 (b) An object file with unwind info in multiple text sections
4062 will use separate unwind sections for each text section.
4063 This allows us to properly set the "sh_info" and "sh_link"
4064 fields in SHT_IA_64_UNWIND as required by the ABI and also
4065 lets GNU ld support programs with multiple segments
4066 containing unwind info (as might be the case for certain
4067 embedded applications).
4069 (c) An error is issued if there would be a name clash.
4071 text_name
= segment_name (saved_seg
);
4072 if (strncmp (text_name
, "_info", 5) == 0)
4074 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
4076 ignore_rest_of_line ();
4079 if (strcmp (text_name
, ".text") == 0)
4082 insn_group_break (1, 0, 0);
4084 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4086 generate_unwind_image (text_name
);
4088 if (unwind
.info
|| unwind
.force_unwind_entry
)
4090 subseg_set (md
.last_text_seg
, 0);
4091 unwind
.proc_end
= expr_build_dot ();
4093 make_unw_section_name (SPECIAL_SECTION_UNWIND
, text_name
, sec_name
);
4094 set_section ((char *) sec_name
);
4095 bfd_set_section_flags (stdoutput
, now_seg
,
4096 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
4098 /* Make sure that section has 4 byte alignment for ILP32 and
4099 8 byte alignment for LP64. */
4100 record_alignment (now_seg
, md
.pointer_size_shift
);
4102 /* Need space for 3 pointers for procedure start, procedure end,
4104 ptr
= frag_more (3 * md
.pointer_size
);
4105 where
= frag_now_fix () - (3 * md
.pointer_size
);
4106 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4108 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4109 e
.X_op
= O_pseudo_fixup
;
4110 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4112 e
.X_add_symbol
= unwind
.proc_start
;
4113 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4115 e
.X_op
= O_pseudo_fixup
;
4116 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4118 e
.X_add_symbol
= unwind
.proc_end
;
4119 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4120 bytes_per_address
, &e
);
4124 e
.X_op
= O_pseudo_fixup
;
4125 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4127 e
.X_add_symbol
= unwind
.info
;
4128 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4129 bytes_per_address
, &e
);
4132 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4136 subseg_set (saved_seg
, saved_subseg
);
4138 /* Parse names of main and alternate entry points and set symbol sizes. */
4142 name
= input_line_pointer
;
4143 c
= get_symbol_end ();
4144 p
= input_line_pointer
;
4145 sym
= symbol_find (name
);
4146 if (sym
&& unwind
.proc_start
4147 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4148 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4150 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4151 fragS
*frag
= symbol_get_frag (sym
);
4153 /* Check whether the function label is at or beyond last
4155 while (fr
&& fr
!= frag
)
4159 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4160 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4163 symbol_get_obj (sym
)->size
=
4164 (expressionS
*) xmalloc (sizeof (expressionS
));
4165 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4166 symbol_get_obj (sym
)->size
->X_add_symbol
4167 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4168 frag_now_fix (), frag_now
);
4169 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4170 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4176 if (*input_line_pointer
!= ',')
4178 ++input_line_pointer
;
4180 demand_empty_rest_of_line ();
4181 unwind
.proc_start
= unwind
.proc_end
= unwind
.info
= 0;
4185 dot_template (template)
4188 CURR_SLOT
.user_template
= template;
4193 int dummy ATTRIBUTE_UNUSED
;
4195 int ins
, locs
, outs
, rots
;
4197 if (is_it_end_of_statement ())
4198 ins
= locs
= outs
= rots
= 0;
4201 ins
= get_absolute_expression ();
4202 if (*input_line_pointer
++ != ',')
4204 locs
= get_absolute_expression ();
4205 if (*input_line_pointer
++ != ',')
4207 outs
= get_absolute_expression ();
4208 if (*input_line_pointer
++ != ',')
4210 rots
= get_absolute_expression ();
4212 set_regstack (ins
, locs
, outs
, rots
);
4216 as_bad ("Comma expected");
4217 ignore_rest_of_line ();
4224 unsigned num_regs
, num_alloced
= 0;
4225 struct dynreg
**drpp
, *dr
;
4226 int ch
, base_reg
= 0;
4232 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4233 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4234 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4238 /* First, remove existing names from hash table. */
4239 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4241 hash_delete (md
.dynreg_hash
, dr
->name
);
4245 drpp
= &md
.dynreg
[type
];
4248 start
= input_line_pointer
;
4249 ch
= get_symbol_end ();
4250 *input_line_pointer
= ch
;
4251 len
= (input_line_pointer
- start
);
4254 if (*input_line_pointer
!= '[')
4256 as_bad ("Expected '['");
4259 ++input_line_pointer
; /* skip '[' */
4261 num_regs
= get_absolute_expression ();
4263 if (*input_line_pointer
++ != ']')
4265 as_bad ("Expected ']'");
4270 num_alloced
+= num_regs
;
4274 if (num_alloced
> md
.rot
.num_regs
)
4276 as_bad ("Used more than the declared %d rotating registers",
4282 if (num_alloced
> 96)
4284 as_bad ("Used more than the available 96 rotating registers");
4289 if (num_alloced
> 48)
4291 as_bad ("Used more than the available 48 rotating registers");
4300 name
= obstack_alloc (¬es
, len
+ 1);
4301 memcpy (name
, start
, len
);
4306 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4307 memset (*drpp
, 0, sizeof (*dr
));
4312 dr
->num_regs
= num_regs
;
4313 dr
->base
= base_reg
;
4315 base_reg
+= num_regs
;
4317 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4319 as_bad ("Attempt to redefine register set `%s'", name
);
4323 if (*input_line_pointer
!= ',')
4325 ++input_line_pointer
; /* skip comma */
4328 demand_empty_rest_of_line ();
4332 ignore_rest_of_line ();
4336 dot_byteorder (byteorder
)
4339 segment_info_type
*seginfo
= seg_info (now_seg
);
4341 if (byteorder
== -1)
4343 if (seginfo
->tc_segment_info_data
.endian
== 0)
4344 seginfo
->tc_segment_info_data
.endian
4345 = TARGET_BYTES_BIG_ENDIAN
? 1 : 2;
4346 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4349 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4351 if (target_big_endian
!= byteorder
)
4353 target_big_endian
= byteorder
;
4354 if (target_big_endian
)
4356 ia64_number_to_chars
= number_to_chars_bigendian
;
4357 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4361 ia64_number_to_chars
= number_to_chars_littleendian
;
4362 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4369 int dummy ATTRIBUTE_UNUSED
;
4376 option
= input_line_pointer
;
4377 ch
= get_symbol_end ();
4378 if (strcmp (option
, "lsb") == 0)
4379 md
.flags
&= ~EF_IA_64_BE
;
4380 else if (strcmp (option
, "msb") == 0)
4381 md
.flags
|= EF_IA_64_BE
;
4382 else if (strcmp (option
, "abi32") == 0)
4383 md
.flags
&= ~EF_IA_64_ABI64
;
4384 else if (strcmp (option
, "abi64") == 0)
4385 md
.flags
|= EF_IA_64_ABI64
;
4387 as_bad ("Unknown psr option `%s'", option
);
4388 *input_line_pointer
= ch
;
4391 if (*input_line_pointer
!= ',')
4394 ++input_line_pointer
;
4397 demand_empty_rest_of_line ();
4402 int dummy ATTRIBUTE_UNUSED
;
4404 new_logical_line (0, get_absolute_expression ());
4405 demand_empty_rest_of_line ();
4409 parse_section_name ()
4415 if (*input_line_pointer
!= '"')
4417 as_bad ("Missing section name");
4418 ignore_rest_of_line ();
4421 name
= demand_copy_C_string (&len
);
4424 ignore_rest_of_line ();
4428 if (*input_line_pointer
!= ',')
4430 as_bad ("Comma expected after section name");
4431 ignore_rest_of_line ();
4434 ++input_line_pointer
; /* skip comma */
4442 char *name
= parse_section_name ();
4446 md
.keep_pending_output
= 1;
4449 obj_elf_previous (0);
4450 md
.keep_pending_output
= 0;
4453 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4456 stmt_float_cons (kind
)
4477 ia64_do_align (alignment
);
4485 int saved_auto_align
= md
.auto_align
;
4489 md
.auto_align
= saved_auto_align
;
4493 dot_xfloat_cons (kind
)
4496 char *name
= parse_section_name ();
4500 md
.keep_pending_output
= 1;
4502 stmt_float_cons (kind
);
4503 obj_elf_previous (0);
4504 md
.keep_pending_output
= 0;
4508 dot_xstringer (zero
)
4511 char *name
= parse_section_name ();
4515 md
.keep_pending_output
= 1;
4518 obj_elf_previous (0);
4519 md
.keep_pending_output
= 0;
4526 int saved_auto_align
= md
.auto_align
;
4527 char *name
= parse_section_name ();
4531 md
.keep_pending_output
= 1;
4535 md
.auto_align
= saved_auto_align
;
4536 obj_elf_previous (0);
4537 md
.keep_pending_output
= 0;
4541 dot_xfloat_cons_ua (kind
)
4544 int saved_auto_align
= md
.auto_align
;
4545 char *name
= parse_section_name ();
4549 md
.keep_pending_output
= 1;
4552 stmt_float_cons (kind
);
4553 md
.auto_align
= saved_auto_align
;
4554 obj_elf_previous (0);
4555 md
.keep_pending_output
= 0;
4558 /* .reg.val <regname>,value */
4562 int dummy ATTRIBUTE_UNUSED
;
4567 if (reg
.X_op
!= O_register
)
4569 as_bad (_("Register name expected"));
4570 ignore_rest_of_line ();
4572 else if (*input_line_pointer
++ != ',')
4574 as_bad (_("Comma expected"));
4575 ignore_rest_of_line ();
4579 valueT value
= get_absolute_expression ();
4580 int regno
= reg
.X_add_number
;
4581 if (regno
< REG_GR
|| regno
> REG_GR
+ 128)
4582 as_warn (_("Register value annotation ignored"));
4585 gr_values
[regno
- REG_GR
].known
= 1;
4586 gr_values
[regno
- REG_GR
].value
= value
;
4587 gr_values
[regno
- REG_GR
].path
= md
.path
;
4590 demand_empty_rest_of_line ();
4593 /* select dv checking mode
4598 A stop is inserted when changing modes
4605 if (md
.manual_bundling
)
4606 as_warn (_("Directive invalid within a bundle"));
4608 if (type
== 'E' || type
== 'A')
4609 md
.mode_explicitly_set
= 0;
4611 md
.mode_explicitly_set
= 1;
4618 if (md
.explicit_mode
)
4619 insn_group_break (1, 0, 0);
4620 md
.explicit_mode
= 0;
4624 if (!md
.explicit_mode
)
4625 insn_group_break (1, 0, 0);
4626 md
.explicit_mode
= 1;
4630 if (md
.explicit_mode
!= md
.default_explicit_mode
)
4631 insn_group_break (1, 0, 0);
4632 md
.explicit_mode
= md
.default_explicit_mode
;
4633 md
.mode_explicitly_set
= 0;
4644 for (regno
= 0; regno
< 64; regno
++)
4646 if (mask
& ((valueT
) 1 << regno
))
4648 fprintf (stderr
, "%s p%d", comma
, regno
);
4655 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4656 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4657 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4658 .pred.safe_across_calls p1 [, p2 [,...]]
4667 int p1
= -1, p2
= -1;
4671 if (*input_line_pointer
!= '"')
4673 as_bad (_("Missing predicate relation type"));
4674 ignore_rest_of_line ();
4680 char *form
= demand_copy_C_string (&len
);
4681 if (strcmp (form
, "mutex") == 0)
4683 else if (strcmp (form
, "clear") == 0)
4685 else if (strcmp (form
, "imply") == 0)
4689 as_bad (_("Unrecognized predicate relation type"));
4690 ignore_rest_of_line ();
4694 if (*input_line_pointer
== ',')
4695 ++input_line_pointer
;
4705 if (TOUPPER (*input_line_pointer
) != 'P'
4706 || (regno
= atoi (++input_line_pointer
)) < 0
4709 as_bad (_("Predicate register expected"));
4710 ignore_rest_of_line ();
4713 while (ISDIGIT (*input_line_pointer
))
4714 ++input_line_pointer
;
4721 as_warn (_("Duplicate predicate register ignored"));
4724 /* See if it's a range. */
4725 if (*input_line_pointer
== '-')
4728 ++input_line_pointer
;
4730 if (TOUPPER (*input_line_pointer
) != 'P'
4731 || (regno
= atoi (++input_line_pointer
)) < 0
4734 as_bad (_("Predicate register expected"));
4735 ignore_rest_of_line ();
4738 while (ISDIGIT (*input_line_pointer
))
4739 ++input_line_pointer
;
4743 as_bad (_("Bad register range"));
4744 ignore_rest_of_line ();
4755 if (*input_line_pointer
!= ',')
4757 ++input_line_pointer
;
4766 clear_qp_mutex (mask
);
4767 clear_qp_implies (mask
, (valueT
) 0);
4770 if (count
!= 2 || p1
== -1 || p2
== -1)
4771 as_bad (_("Predicate source and target required"));
4772 else if (p1
== 0 || p2
== 0)
4773 as_bad (_("Use of p0 is not valid in this context"));
4775 add_qp_imply (p1
, p2
);
4780 as_bad (_("At least two PR arguments expected"));
4785 as_bad (_("Use of p0 is not valid in this context"));
4788 add_qp_mutex (mask
);
4791 /* note that we don't override any existing relations */
4794 as_bad (_("At least one PR argument expected"));
4799 fprintf (stderr
, "Safe across calls: ");
4800 print_prmask (mask
);
4801 fprintf (stderr
, "\n");
4803 qp_safe_across_calls
= mask
;
4806 demand_empty_rest_of_line ();
4809 /* .entry label [, label [, ...]]
4810 Hint to DV code that the given labels are to be considered entry points.
4811 Otherwise, only global labels are considered entry points. */
4815 int dummy ATTRIBUTE_UNUSED
;
4824 name
= input_line_pointer
;
4825 c
= get_symbol_end ();
4826 symbolP
= symbol_find_or_make (name
);
4828 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
4830 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4833 *input_line_pointer
= c
;
4835 c
= *input_line_pointer
;
4838 input_line_pointer
++;
4840 if (*input_line_pointer
== '\n')
4846 demand_empty_rest_of_line ();
4849 /* .mem.offset offset, base
4850 "base" is used to distinguish between offsets from a different base. */
4853 dot_mem_offset (dummy
)
4854 int dummy ATTRIBUTE_UNUSED
;
4856 md
.mem_offset
.hint
= 1;
4857 md
.mem_offset
.offset
= get_absolute_expression ();
4858 if (*input_line_pointer
!= ',')
4860 as_bad (_("Comma expected"));
4861 ignore_rest_of_line ();
4864 ++input_line_pointer
;
4865 md
.mem_offset
.base
= get_absolute_expression ();
4866 demand_empty_rest_of_line ();
4869 /* ia64-specific pseudo-ops: */
4870 const pseudo_typeS md_pseudo_table
[] =
4872 { "radix", dot_radix
, 0 },
4873 { "lcomm", s_lcomm_bytes
, 1 },
4874 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
4875 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
4876 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
4877 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
4878 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
4879 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
4880 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
4881 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
4882 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
4883 { "proc", dot_proc
, 0 },
4884 { "body", dot_body
, 0 },
4885 { "prologue", dot_prologue
, 0 },
4886 { "endp", dot_endp
, 0 },
4888 { "fframe", dot_fframe
, 0 },
4889 { "vframe", dot_vframe
, 0 },
4890 { "vframesp", dot_vframesp
, 0 },
4891 { "vframepsp", dot_vframepsp
, 0 },
4892 { "save", dot_save
, 0 },
4893 { "restore", dot_restore
, 0 },
4894 { "restorereg", dot_restorereg
, 0 },
4895 { "restorereg.p", dot_restorereg_p
, 0 },
4896 { "handlerdata", dot_handlerdata
, 0 },
4897 { "unwentry", dot_unwentry
, 0 },
4898 { "altrp", dot_altrp
, 0 },
4899 { "savesp", dot_savemem
, 0 },
4900 { "savepsp", dot_savemem
, 1 },
4901 { "save.g", dot_saveg
, 0 },
4902 { "save.f", dot_savef
, 0 },
4903 { "save.b", dot_saveb
, 0 },
4904 { "save.gf", dot_savegf
, 0 },
4905 { "spill", dot_spill
, 0 },
4906 { "spillreg", dot_spillreg
, 0 },
4907 { "spillsp", dot_spillmem
, 0 },
4908 { "spillpsp", dot_spillmem
, 1 },
4909 { "spillreg.p", dot_spillreg_p
, 0 },
4910 { "spillsp.p", dot_spillmem_p
, 0 },
4911 { "spillpsp.p", dot_spillmem_p
, 1 },
4912 { "label_state", dot_label_state
, 0 },
4913 { "copy_state", dot_copy_state
, 0 },
4914 { "unwabi", dot_unwabi
, 0 },
4915 { "personality", dot_personality
, 0 },
4917 { "estate", dot_estate
, 0 },
4919 { "mii", dot_template
, 0x0 },
4920 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
4921 { "mlx", dot_template
, 0x2 },
4922 { "mmi", dot_template
, 0x4 },
4923 { "mfi", dot_template
, 0x6 },
4924 { "mmf", dot_template
, 0x7 },
4925 { "mib", dot_template
, 0x8 },
4926 { "mbb", dot_template
, 0x9 },
4927 { "bbb", dot_template
, 0xb },
4928 { "mmb", dot_template
, 0xc },
4929 { "mfb", dot_template
, 0xe },
4931 { "lb", dot_scope
, 0 },
4932 { "le", dot_scope
, 1 },
4934 { "align", s_align_bytes
, 0 },
4935 { "regstk", dot_regstk
, 0 },
4936 { "rotr", dot_rot
, DYNREG_GR
},
4937 { "rotf", dot_rot
, DYNREG_FR
},
4938 { "rotp", dot_rot
, DYNREG_PR
},
4939 { "lsb", dot_byteorder
, 0 },
4940 { "msb", dot_byteorder
, 1 },
4941 { "psr", dot_psr
, 0 },
4942 { "alias", dot_alias
, 0 },
4943 { "secalias", dot_alias
, 1 },
4944 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
4946 { "xdata1", dot_xdata
, 1 },
4947 { "xdata2", dot_xdata
, 2 },
4948 { "xdata4", dot_xdata
, 4 },
4949 { "xdata8", dot_xdata
, 8 },
4950 { "xreal4", dot_xfloat_cons
, 'f' },
4951 { "xreal8", dot_xfloat_cons
, 'd' },
4952 { "xreal10", dot_xfloat_cons
, 'x' },
4953 { "xreal16", dot_xfloat_cons
, 'X' },
4954 { "xstring", dot_xstringer
, 0 },
4955 { "xstringz", dot_xstringer
, 1 },
4957 /* unaligned versions: */
4958 { "xdata2.ua", dot_xdata_ua
, 2 },
4959 { "xdata4.ua", dot_xdata_ua
, 4 },
4960 { "xdata8.ua", dot_xdata_ua
, 8 },
4961 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
4962 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
4963 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
4964 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
4966 /* annotations/DV checking support */
4967 { "entry", dot_entry
, 0 },
4968 { "mem.offset", dot_mem_offset
, 0 },
4969 { "pred.rel", dot_pred_rel
, 0 },
4970 { "pred.rel.clear", dot_pred_rel
, 'c' },
4971 { "pred.rel.imply", dot_pred_rel
, 'i' },
4972 { "pred.rel.mutex", dot_pred_rel
, 'm' },
4973 { "pred.safe_across_calls", dot_pred_rel
, 's' },
4974 { "reg.val", dot_reg_val
, 0 },
4975 { "auto", dot_dv_mode
, 'a' },
4976 { "explicit", dot_dv_mode
, 'e' },
4977 { "default", dot_dv_mode
, 'd' },
4979 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
4980 IA-64 aligns data allocation pseudo-ops by default, so we have to
4981 tell it that these ones are supposed to be unaligned. Long term,
4982 should rewrite so that only IA-64 specific data allocation pseudo-ops
4983 are aligned by default. */
4984 {"2byte", stmt_cons_ua
, 2},
4985 {"4byte", stmt_cons_ua
, 4},
4986 {"8byte", stmt_cons_ua
, 8},
4991 static const struct pseudo_opcode
4994 void (*handler
) (int);
4999 /* these are more like pseudo-ops, but don't start with a dot */
5000 { "data1", cons
, 1 },
5001 { "data2", cons
, 2 },
5002 { "data4", cons
, 4 },
5003 { "data8", cons
, 8 },
5004 { "data16", cons
, 16 },
5005 { "real4", stmt_float_cons
, 'f' },
5006 { "real8", stmt_float_cons
, 'd' },
5007 { "real10", stmt_float_cons
, 'x' },
5008 { "real16", stmt_float_cons
, 'X' },
5009 { "string", stringer
, 0 },
5010 { "stringz", stringer
, 1 },
5012 /* unaligned versions: */
5013 { "data2.ua", stmt_cons_ua
, 2 },
5014 { "data4.ua", stmt_cons_ua
, 4 },
5015 { "data8.ua", stmt_cons_ua
, 8 },
5016 { "data16.ua", stmt_cons_ua
, 16 },
5017 { "real4.ua", float_cons
, 'f' },
5018 { "real8.ua", float_cons
, 'd' },
5019 { "real10.ua", float_cons
, 'x' },
5020 { "real16.ua", float_cons
, 'X' },
5023 /* Declare a register by creating a symbol for it and entering it in
5024 the symbol table. */
5027 declare_register (name
, regnum
)
5034 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5036 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5038 as_fatal ("Inserting \"%s\" into register table failed: %s",
5045 declare_register_set (prefix
, num_regs
, base_regnum
)
5053 for (i
= 0; i
< num_regs
; ++i
)
5055 sprintf (name
, "%s%u", prefix
, i
);
5056 declare_register (name
, base_regnum
+ i
);
5061 operand_width (opnd
)
5062 enum ia64_opnd opnd
;
5064 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5065 unsigned int bits
= 0;
5069 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5070 bits
+= odesc
->field
[i
].bits
;
5075 static enum operand_match_result
5076 operand_match (idesc
, index
, e
)
5077 const struct ia64_opcode
*idesc
;
5081 enum ia64_opnd opnd
= idesc
->operands
[index
];
5082 int bits
, relocatable
= 0;
5083 struct insn_fix
*fix
;
5090 case IA64_OPND_AR_CCV
:
5091 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5092 return OPERAND_MATCH
;
5095 case IA64_OPND_AR_CSD
:
5096 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5097 return OPERAND_MATCH
;
5100 case IA64_OPND_AR_PFS
:
5101 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5102 return OPERAND_MATCH
;
5106 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5107 return OPERAND_MATCH
;
5111 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5112 return OPERAND_MATCH
;
5116 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5117 return OPERAND_MATCH
;
5120 case IA64_OPND_PR_ROT
:
5121 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5122 return OPERAND_MATCH
;
5126 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5127 return OPERAND_MATCH
;
5130 case IA64_OPND_PSR_L
:
5131 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5132 return OPERAND_MATCH
;
5135 case IA64_OPND_PSR_UM
:
5136 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5137 return OPERAND_MATCH
;
5141 if (e
->X_op
== O_constant
)
5143 if (e
->X_add_number
== 1)
5144 return OPERAND_MATCH
;
5146 return OPERAND_OUT_OF_RANGE
;
5151 if (e
->X_op
== O_constant
)
5153 if (e
->X_add_number
== 8)
5154 return OPERAND_MATCH
;
5156 return OPERAND_OUT_OF_RANGE
;
5161 if (e
->X_op
== O_constant
)
5163 if (e
->X_add_number
== 16)
5164 return OPERAND_MATCH
;
5166 return OPERAND_OUT_OF_RANGE
;
5170 /* register operands: */
5173 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5174 && e
->X_add_number
< REG_AR
+ 128)
5175 return OPERAND_MATCH
;
5180 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5181 && e
->X_add_number
< REG_BR
+ 8)
5182 return OPERAND_MATCH
;
5186 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5187 && e
->X_add_number
< REG_CR
+ 128)
5188 return OPERAND_MATCH
;
5195 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5196 && e
->X_add_number
< REG_FR
+ 128)
5197 return OPERAND_MATCH
;
5202 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5203 && e
->X_add_number
< REG_P
+ 64)
5204 return OPERAND_MATCH
;
5210 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5211 && e
->X_add_number
< REG_GR
+ 128)
5212 return OPERAND_MATCH
;
5215 case IA64_OPND_R3_2
:
5216 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5218 if (e
->X_add_number
< REG_GR
+ 4)
5219 return OPERAND_MATCH
;
5220 else if (e
->X_add_number
< REG_GR
+ 128)
5221 return OPERAND_OUT_OF_RANGE
;
5225 /* indirect operands: */
5226 case IA64_OPND_CPUID_R3
:
5227 case IA64_OPND_DBR_R3
:
5228 case IA64_OPND_DTR_R3
:
5229 case IA64_OPND_ITR_R3
:
5230 case IA64_OPND_IBR_R3
:
5231 case IA64_OPND_MSR_R3
:
5232 case IA64_OPND_PKR_R3
:
5233 case IA64_OPND_PMC_R3
:
5234 case IA64_OPND_PMD_R3
:
5235 case IA64_OPND_RR_R3
:
5236 if (e
->X_op
== O_index
&& e
->X_op_symbol
5237 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5238 == opnd
- IA64_OPND_CPUID_R3
))
5239 return OPERAND_MATCH
;
5243 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5244 return OPERAND_MATCH
;
5247 /* immediate operands: */
5248 case IA64_OPND_CNT2a
:
5249 case IA64_OPND_LEN4
:
5250 case IA64_OPND_LEN6
:
5251 bits
= operand_width (idesc
->operands
[index
]);
5252 if (e
->X_op
== O_constant
)
5254 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5255 return OPERAND_MATCH
;
5257 return OPERAND_OUT_OF_RANGE
;
5261 case IA64_OPND_CNT2b
:
5262 if (e
->X_op
== O_constant
)
5264 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5265 return OPERAND_MATCH
;
5267 return OPERAND_OUT_OF_RANGE
;
5271 case IA64_OPND_CNT2c
:
5272 val
= e
->X_add_number
;
5273 if (e
->X_op
== O_constant
)
5275 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5276 return OPERAND_MATCH
;
5278 return OPERAND_OUT_OF_RANGE
;
5283 /* SOR must be an integer multiple of 8 */
5284 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5285 return OPERAND_OUT_OF_RANGE
;
5288 if (e
->X_op
== O_constant
)
5290 if ((bfd_vma
) e
->X_add_number
<= 96)
5291 return OPERAND_MATCH
;
5293 return OPERAND_OUT_OF_RANGE
;
5297 case IA64_OPND_IMMU62
:
5298 if (e
->X_op
== O_constant
)
5300 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5301 return OPERAND_MATCH
;
5303 return OPERAND_OUT_OF_RANGE
;
5307 /* FIXME -- need 62-bit relocation type */
5308 as_bad (_("62-bit relocation not yet implemented"));
5312 case IA64_OPND_IMMU64
:
5313 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5314 || e
->X_op
== O_subtract
)
5316 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5317 fix
->code
= BFD_RELOC_IA64_IMM64
;
5318 if (e
->X_op
!= O_subtract
)
5320 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5321 if (e
->X_op
== O_pseudo_fixup
)
5325 fix
->opnd
= idesc
->operands
[index
];
5328 ++CURR_SLOT
.num_fixups
;
5329 return OPERAND_MATCH
;
5331 else if (e
->X_op
== O_constant
)
5332 return OPERAND_MATCH
;
5335 case IA64_OPND_CCNT5
:
5336 case IA64_OPND_CNT5
:
5337 case IA64_OPND_CNT6
:
5338 case IA64_OPND_CPOS6a
:
5339 case IA64_OPND_CPOS6b
:
5340 case IA64_OPND_CPOS6c
:
5341 case IA64_OPND_IMMU2
:
5342 case IA64_OPND_IMMU7a
:
5343 case IA64_OPND_IMMU7b
:
5344 case IA64_OPND_IMMU21
:
5345 case IA64_OPND_IMMU24
:
5346 case IA64_OPND_MBTYPE4
:
5347 case IA64_OPND_MHTYPE8
:
5348 case IA64_OPND_POS6
:
5349 bits
= operand_width (idesc
->operands
[index
]);
5350 if (e
->X_op
== O_constant
)
5352 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5353 return OPERAND_MATCH
;
5355 return OPERAND_OUT_OF_RANGE
;
5359 case IA64_OPND_IMMU9
:
5360 bits
= operand_width (idesc
->operands
[index
]);
5361 if (e
->X_op
== O_constant
)
5363 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5365 int lobits
= e
->X_add_number
& 0x3;
5366 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5367 e
->X_add_number
|= (bfd_vma
) 0x3;
5368 return OPERAND_MATCH
;
5371 return OPERAND_OUT_OF_RANGE
;
5375 case IA64_OPND_IMM44
:
5376 /* least 16 bits must be zero */
5377 if ((e
->X_add_number
& 0xffff) != 0)
5378 /* XXX technically, this is wrong: we should not be issuing warning
5379 messages until we're sure this instruction pattern is going to
5381 as_warn (_("lower 16 bits of mask ignored"));
5383 if (e
->X_op
== O_constant
)
5385 if (((e
->X_add_number
>= 0
5386 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5387 || (e
->X_add_number
< 0
5388 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5391 if (e
->X_add_number
>= 0
5392 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5394 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5396 return OPERAND_MATCH
;
5399 return OPERAND_OUT_OF_RANGE
;
5403 case IA64_OPND_IMM17
:
5404 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5405 if (e
->X_op
== O_constant
)
5407 if (((e
->X_add_number
>= 0
5408 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5409 || (e
->X_add_number
< 0
5410 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5413 if (e
->X_add_number
>= 0
5414 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5416 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5418 return OPERAND_MATCH
;
5421 return OPERAND_OUT_OF_RANGE
;
5425 case IA64_OPND_IMM14
:
5426 case IA64_OPND_IMM22
:
5428 case IA64_OPND_IMM1
:
5429 case IA64_OPND_IMM8
:
5430 case IA64_OPND_IMM8U4
:
5431 case IA64_OPND_IMM8M1
:
5432 case IA64_OPND_IMM8M1U4
:
5433 case IA64_OPND_IMM8M1U8
:
5434 case IA64_OPND_IMM9a
:
5435 case IA64_OPND_IMM9b
:
5436 bits
= operand_width (idesc
->operands
[index
]);
5437 if (relocatable
&& (e
->X_op
== O_symbol
5438 || e
->X_op
== O_subtract
5439 || e
->X_op
== O_pseudo_fixup
))
5441 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5443 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5444 fix
->code
= BFD_RELOC_IA64_IMM14
;
5446 fix
->code
= BFD_RELOC_IA64_IMM22
;
5448 if (e
->X_op
!= O_subtract
)
5450 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5451 if (e
->X_op
== O_pseudo_fixup
)
5455 fix
->opnd
= idesc
->operands
[index
];
5458 ++CURR_SLOT
.num_fixups
;
5459 return OPERAND_MATCH
;
5461 else if (e
->X_op
!= O_constant
5462 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5463 return OPERAND_MISMATCH
;
5465 if (opnd
== IA64_OPND_IMM8M1U4
)
5467 /* Zero is not valid for unsigned compares that take an adjusted
5468 constant immediate range. */
5469 if (e
->X_add_number
== 0)
5470 return OPERAND_OUT_OF_RANGE
;
5472 /* Sign-extend 32-bit unsigned numbers, so that the following range
5473 checks will work. */
5474 val
= e
->X_add_number
;
5475 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5476 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5477 val
= ((val
<< 32) >> 32);
5479 /* Check for 0x100000000. This is valid because
5480 0x100000000-1 is the same as ((uint32_t) -1). */
5481 if (val
== ((bfd_signed_vma
) 1 << 32))
5482 return OPERAND_MATCH
;
5486 else if (opnd
== IA64_OPND_IMM8M1U8
)
5488 /* Zero is not valid for unsigned compares that take an adjusted
5489 constant immediate range. */
5490 if (e
->X_add_number
== 0)
5491 return OPERAND_OUT_OF_RANGE
;
5493 /* Check for 0x10000000000000000. */
5494 if (e
->X_op
== O_big
)
5496 if (generic_bignum
[0] == 0
5497 && generic_bignum
[1] == 0
5498 && generic_bignum
[2] == 0
5499 && generic_bignum
[3] == 0
5500 && generic_bignum
[4] == 1)
5501 return OPERAND_MATCH
;
5503 return OPERAND_OUT_OF_RANGE
;
5506 val
= e
->X_add_number
- 1;
5508 else if (opnd
== IA64_OPND_IMM8M1
)
5509 val
= e
->X_add_number
- 1;
5510 else if (opnd
== IA64_OPND_IMM8U4
)
5512 /* Sign-extend 32-bit unsigned numbers, so that the following range
5513 checks will work. */
5514 val
= e
->X_add_number
;
5515 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5516 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5517 val
= ((val
<< 32) >> 32);
5520 val
= e
->X_add_number
;
5522 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5523 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5524 return OPERAND_MATCH
;
5526 return OPERAND_OUT_OF_RANGE
;
5528 case IA64_OPND_INC3
:
5529 /* +/- 1, 4, 8, 16 */
5530 val
= e
->X_add_number
;
5533 if (e
->X_op
== O_constant
)
5535 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5536 return OPERAND_MATCH
;
5538 return OPERAND_OUT_OF_RANGE
;
5542 case IA64_OPND_TGT25
:
5543 case IA64_OPND_TGT25b
:
5544 case IA64_OPND_TGT25c
:
5545 case IA64_OPND_TGT64
:
5546 if (e
->X_op
== O_symbol
)
5548 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5549 if (opnd
== IA64_OPND_TGT25
)
5550 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5551 else if (opnd
== IA64_OPND_TGT25b
)
5552 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5553 else if (opnd
== IA64_OPND_TGT25c
)
5554 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5555 else if (opnd
== IA64_OPND_TGT64
)
5556 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5560 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5561 fix
->opnd
= idesc
->operands
[index
];
5564 ++CURR_SLOT
.num_fixups
;
5565 return OPERAND_MATCH
;
5567 case IA64_OPND_TAG13
:
5568 case IA64_OPND_TAG13b
:
5572 return OPERAND_MATCH
;
5575 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5576 /* There are no external relocs for TAG13/TAG13b fields, so we
5577 create a dummy reloc. This will not live past md_apply_fix3. */
5578 fix
->code
= BFD_RELOC_UNUSED
;
5579 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5580 fix
->opnd
= idesc
->operands
[index
];
5583 ++CURR_SLOT
.num_fixups
;
5584 return OPERAND_MATCH
;
5591 case IA64_OPND_LDXMOV
:
5592 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5593 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5594 fix
->opnd
= idesc
->operands
[index
];
5597 ++CURR_SLOT
.num_fixups
;
5598 return OPERAND_MATCH
;
5603 return OPERAND_MISMATCH
;
5612 memset (e
, 0, sizeof (*e
));
5615 if (*input_line_pointer
!= '}')
5617 sep
= *input_line_pointer
++;
5621 if (!md
.manual_bundling
)
5622 as_warn ("Found '}' when manual bundling is off");
5624 CURR_SLOT
.manual_bundling_off
= 1;
5625 md
.manual_bundling
= 0;
5631 /* Returns the next entry in the opcode table that matches the one in
5632 IDESC, and frees the entry in IDESC. If no matching entry is
5633 found, NULL is returned instead. */
5635 static struct ia64_opcode
*
5636 get_next_opcode (struct ia64_opcode
*idesc
)
5638 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
5639 ia64_free_opcode (idesc
);
5643 /* Parse the operands for the opcode and find the opcode variant that
5644 matches the specified operands, or NULL if no match is possible. */
5646 static struct ia64_opcode
*
5647 parse_operands (idesc
)
5648 struct ia64_opcode
*idesc
;
5650 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
5651 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
5652 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
5653 enum operand_match_result result
;
5655 char *first_arg
= 0, *end
, *saved_input_pointer
;
5658 assert (strlen (idesc
->name
) <= 128);
5660 strcpy (mnemonic
, idesc
->name
);
5661 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5663 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5664 can't parse the first operand until we have parsed the
5665 remaining operands of the "alloc" instruction. */
5667 first_arg
= input_line_pointer
;
5668 end
= strchr (input_line_pointer
, '=');
5671 as_bad ("Expected separator `='");
5674 input_line_pointer
= end
+ 1;
5679 for (; i
< NELEMS (CURR_SLOT
.opnd
); ++i
)
5681 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
5682 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
5687 if (sep
!= '=' && sep
!= ',')
5692 if (num_outputs
> 0)
5693 as_bad ("Duplicate equal sign (=) in instruction");
5695 num_outputs
= i
+ 1;
5700 as_bad ("Illegal operand separator `%c'", sep
);
5704 if (idesc
->operands
[2] == IA64_OPND_SOF
)
5706 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5707 know (strcmp (idesc
->name
, "alloc") == 0);
5708 if (num_operands
== 5 /* first_arg not included in this count! */
5709 && CURR_SLOT
.opnd
[2].X_op
== O_constant
5710 && CURR_SLOT
.opnd
[3].X_op
== O_constant
5711 && CURR_SLOT
.opnd
[4].X_op
== O_constant
5712 && CURR_SLOT
.opnd
[5].X_op
== O_constant
)
5714 sof
= set_regstack (CURR_SLOT
.opnd
[2].X_add_number
,
5715 CURR_SLOT
.opnd
[3].X_add_number
,
5716 CURR_SLOT
.opnd
[4].X_add_number
,
5717 CURR_SLOT
.opnd
[5].X_add_number
);
5719 /* now we can parse the first arg: */
5720 saved_input_pointer
= input_line_pointer
;
5721 input_line_pointer
= first_arg
;
5722 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
5724 --num_outputs
; /* force error */
5725 input_line_pointer
= saved_input_pointer
;
5727 CURR_SLOT
.opnd
[2].X_add_number
= sof
;
5728 CURR_SLOT
.opnd
[3].X_add_number
5729 = sof
- CURR_SLOT
.opnd
[4].X_add_number
;
5730 CURR_SLOT
.opnd
[4] = CURR_SLOT
.opnd
[5];
5734 highest_unmatched_operand
= 0;
5735 curr_out_of_range_pos
= -1;
5737 expected_operand
= idesc
->operands
[0];
5738 for (; idesc
; idesc
= get_next_opcode (idesc
))
5740 if (num_outputs
!= idesc
->num_outputs
)
5741 continue; /* mismatch in # of outputs */
5743 CURR_SLOT
.num_fixups
= 0;
5745 /* Try to match all operands. If we see an out-of-range operand,
5746 then continue trying to match the rest of the operands, since if
5747 the rest match, then this idesc will give the best error message. */
5749 out_of_range_pos
= -1;
5750 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
5752 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
5753 if (result
!= OPERAND_MATCH
)
5755 if (result
!= OPERAND_OUT_OF_RANGE
)
5757 if (out_of_range_pos
< 0)
5758 /* remember position of the first out-of-range operand: */
5759 out_of_range_pos
= i
;
5763 /* If we did not match all operands, or if at least one operand was
5764 out-of-range, then this idesc does not match. Keep track of which
5765 idesc matched the most operands before failing. If we have two
5766 idescs that failed at the same position, and one had an out-of-range
5767 operand, then prefer the out-of-range operand. Thus if we have
5768 "add r0=0x1000000,r1" we get an error saying the constant is out
5769 of range instead of an error saying that the constant should have been
5772 if (i
!= num_operands
|| out_of_range_pos
>= 0)
5774 if (i
> highest_unmatched_operand
5775 || (i
== highest_unmatched_operand
5776 && out_of_range_pos
> curr_out_of_range_pos
))
5778 highest_unmatched_operand
= i
;
5779 if (out_of_range_pos
>= 0)
5781 expected_operand
= idesc
->operands
[out_of_range_pos
];
5782 error_pos
= out_of_range_pos
;
5786 expected_operand
= idesc
->operands
[i
];
5789 curr_out_of_range_pos
= out_of_range_pos
;
5794 if (num_operands
< NELEMS (idesc
->operands
)
5795 && idesc
->operands
[num_operands
])
5796 continue; /* mismatch in number of arguments */
5802 if (expected_operand
)
5803 as_bad ("Operand %u of `%s' should be %s",
5804 error_pos
+ 1, mnemonic
,
5805 elf64_ia64_operands
[expected_operand
].desc
);
5807 as_bad ("Operand mismatch");
5813 /* Keep track of state necessary to determine whether a NOP is necessary
5814 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5815 detect a case where additional NOPs may be necessary. */
5817 errata_nop_necessary_p (slot
, insn_unit
)
5819 enum ia64_unit insn_unit
;
5822 struct group
*this_group
= md
.last_groups
+ md
.group_idx
;
5823 struct group
*prev_group
= md
.last_groups
+ (md
.group_idx
+ 2) % 3;
5824 struct ia64_opcode
*idesc
= slot
->idesc
;
5826 /* Test whether this could be the first insn in a problematic sequence. */
5827 if (insn_unit
== IA64_UNIT_F
)
5829 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5830 if (idesc
->operands
[i
] == IA64_OPND_P1
5831 || idesc
->operands
[i
] == IA64_OPND_P2
)
5833 int regno
= slot
->opnd
[i
].X_add_number
- REG_P
;
5834 /* Ignore invalid operands; they generate errors elsewhere. */
5837 this_group
->p_reg_set
[regno
] = 1;
5841 /* Test whether this could be the second insn in a problematic sequence. */
5842 if (insn_unit
== IA64_UNIT_M
&& slot
->qp_regno
> 0
5843 && prev_group
->p_reg_set
[slot
->qp_regno
])
5845 for (i
= 0; i
< idesc
->num_outputs
; i
++)
5846 if (idesc
->operands
[i
] == IA64_OPND_R1
5847 || idesc
->operands
[i
] == IA64_OPND_R2
5848 || idesc
->operands
[i
] == IA64_OPND_R3
)
5850 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5851 /* Ignore invalid operands; they generate errors elsewhere. */
5854 if (strncmp (idesc
->name
, "add", 3) != 0
5855 && strncmp (idesc
->name
, "sub", 3) != 0
5856 && strncmp (idesc
->name
, "shladd", 6) != 0
5857 && (idesc
->flags
& IA64_OPCODE_POSTINC
) == 0)
5858 this_group
->g_reg_set_conditionally
[regno
] = 1;
5862 /* Test whether this could be the third insn in a problematic sequence. */
5863 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; i
++)
5865 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5866 idesc
->operands
[i
] == IA64_OPND_R3
5867 /* For mov indirect. */
5868 || idesc
->operands
[i
] == IA64_OPND_RR_R3
5869 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
5870 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
5871 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
5872 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
5873 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
5874 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
5875 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
5877 || idesc
->operands
[i
] == IA64_OPND_ITR_R3
5878 || idesc
->operands
[i
] == IA64_OPND_DTR_R3
5879 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5880 || idesc
->operands
[i
] == IA64_OPND_MR3
)
5882 int regno
= slot
->opnd
[i
].X_add_number
- REG_GR
;
5883 /* Ignore invalid operands; they generate errors elsewhere. */
5886 if (idesc
->operands
[i
] == IA64_OPND_R3
)
5888 if (strcmp (idesc
->name
, "fc") != 0
5889 && strcmp (idesc
->name
, "tak") != 0
5890 && strcmp (idesc
->name
, "thash") != 0
5891 && strcmp (idesc
->name
, "tpa") != 0
5892 && strcmp (idesc
->name
, "ttag") != 0
5893 && strncmp (idesc
->name
, "ptr", 3) != 0
5894 && strncmp (idesc
->name
, "ptc", 3) != 0
5895 && strncmp (idesc
->name
, "probe", 5) != 0)
5898 if (prev_group
->g_reg_set_conditionally
[regno
])
5906 build_insn (slot
, insnp
)
5910 const struct ia64_operand
*odesc
, *o2desc
;
5911 struct ia64_opcode
*idesc
= slot
->idesc
;
5912 bfd_signed_vma insn
, val
;
5916 insn
= idesc
->opcode
| slot
->qp_regno
;
5918 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
5920 if (slot
->opnd
[i
].X_op
== O_register
5921 || slot
->opnd
[i
].X_op
== O_constant
5922 || slot
->opnd
[i
].X_op
== O_index
)
5923 val
= slot
->opnd
[i
].X_add_number
;
5924 else if (slot
->opnd
[i
].X_op
== O_big
)
5926 /* This must be the value 0x10000000000000000. */
5927 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
5933 switch (idesc
->operands
[i
])
5935 case IA64_OPND_IMMU64
:
5936 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
5937 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
5938 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
5939 | (((val
>> 63) & 0x1) << 36));
5942 case IA64_OPND_IMMU62
:
5943 val
&= 0x3fffffffffffffffULL
;
5944 if (val
!= slot
->opnd
[i
].X_add_number
)
5945 as_warn (_("Value truncated to 62 bits"));
5946 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
5947 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
5950 case IA64_OPND_TGT64
:
5952 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
5953 insn
|= ((((val
>> 59) & 0x1) << 36)
5954 | (((val
>> 0) & 0xfffff) << 13));
5985 case IA64_OPND_R3_2
:
5986 case IA64_OPND_CPUID_R3
:
5987 case IA64_OPND_DBR_R3
:
5988 case IA64_OPND_DTR_R3
:
5989 case IA64_OPND_ITR_R3
:
5990 case IA64_OPND_IBR_R3
:
5992 case IA64_OPND_MSR_R3
:
5993 case IA64_OPND_PKR_R3
:
5994 case IA64_OPND_PMC_R3
:
5995 case IA64_OPND_PMD_R3
:
5996 case IA64_OPND_RR_R3
:
6004 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6005 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6007 as_bad_where (slot
->src_file
, slot
->src_line
,
6008 "Bad operand value: %s", err
);
6009 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6011 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6012 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6014 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6015 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6017 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6018 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6019 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6021 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6022 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6032 unsigned int manual_bundling_on
= 0, manual_bundling_off
= 0;
6033 unsigned int manual_bundling
= 0;
6034 enum ia64_unit required_unit
, insn_unit
= 0;
6035 enum ia64_insn_type type
[3], insn_type
;
6036 unsigned int template, orig_template
;
6037 bfd_vma insn
[3] = { -1, -1, -1 };
6038 struct ia64_opcode
*idesc
;
6039 int end_of_insn_group
= 0, user_template
= -1;
6040 int n
, i
, j
, first
, curr
;
6041 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6042 bfd_vma t0
= 0, t1
= 0;
6043 struct label_fix
*lfix
;
6044 struct insn_fix
*ifix
;
6049 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6050 know (first
>= 0 & first
< NUM_SLOTS
);
6051 n
= MIN (3, md
.num_slots_in_use
);
6053 /* Determine template: user user_template if specified, best match
6056 if (md
.slot
[first
].user_template
>= 0)
6057 user_template
= template = md
.slot
[first
].user_template
;
6060 /* Auto select appropriate template. */
6061 memset (type
, 0, sizeof (type
));
6063 for (i
= 0; i
< n
; ++i
)
6065 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6067 type
[i
] = md
.slot
[curr
].idesc
->type
;
6068 curr
= (curr
+ 1) % NUM_SLOTS
;
6070 template = best_template
[type
[0]][type
[1]][type
[2]];
6073 /* initialize instructions with appropriate nops: */
6074 for (i
= 0; i
< 3; ++i
)
6075 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6079 /* now fill in slots with as many insns as possible: */
6081 idesc
= md
.slot
[curr
].idesc
;
6082 end_of_insn_group
= 0;
6083 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6085 /* If we have unwind records, we may need to update some now. */
6086 ptr
= md
.slot
[curr
].unwind_record
;
6089 /* Find the last prologue/body record in the list for the current
6090 insn, and set the slot number for all records up to that point.
6091 This needs to be done now, because prologue/body records refer to
6092 the current point, not the point after the instruction has been
6093 issued. This matters because there may have been nops emitted
6094 meanwhile. Any non-prologue non-body record followed by a
6095 prologue/body record must also refer to the current point. */
6097 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6098 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6099 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6100 || ptr
->r
.type
== body
)
6104 /* Make last_ptr point one after the last prologue/body
6106 last_ptr
= last_ptr
->next
;
6107 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6110 ptr
->slot_number
= (unsigned long) f
+ i
;
6111 ptr
->slot_frag
= frag_now
;
6113 /* Remove the initialized records, so that we won't accidentally
6114 update them again if we insert a nop and continue. */
6115 md
.slot
[curr
].unwind_record
= last_ptr
;
6119 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6121 if (manual_bundling
&& i
!= 2)
6122 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6123 "`%s' must be last in bundle", idesc
->name
);
6127 if (idesc
->flags
& IA64_OPCODE_LAST
)
6130 unsigned int required_template
;
6132 /* If we need a stop bit after an M slot, our only choice is
6133 template 5 (M;;MI). If we need a stop bit after a B
6134 slot, our only choice is to place it at the end of the
6135 bundle, because the only available templates are MIB,
6136 MBB, BBB, MMB, and MFB. We don't handle anything other
6137 than M and B slots because these are the only kind of
6138 instructions that can have the IA64_OPCODE_LAST bit set. */
6139 required_template
= template;
6140 switch (idesc
->type
)
6144 required_template
= 5;
6152 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6153 "Internal error: don't know how to force %s to end"
6154 "of instruction group", idesc
->name
);
6158 if (manual_bundling
&& i
!= required_slot
)
6159 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6160 "`%s' must be last in instruction group",
6162 if (required_slot
< i
)
6163 /* Can't fit this instruction. */
6167 if (required_template
!= template)
6169 /* If we switch the template, we need to reset the NOPs
6170 after slot i. The slot-types of the instructions ahead
6171 of i never change, so we don't need to worry about
6172 changing NOPs in front of this slot. */
6173 for (j
= i
; j
< 3; ++j
)
6174 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6176 template = required_template
;
6178 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6180 if (manual_bundling_on
)
6181 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6182 "Label must be first in a bundle");
6183 /* This insn must go into the first slot of a bundle. */
6187 manual_bundling_on
= md
.slot
[curr
].manual_bundling_on
;
6188 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6190 if (manual_bundling_on
)
6193 manual_bundling
= 1;
6195 break; /* need to start a new bundle */
6198 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6200 /* We need an instruction group boundary in the middle of a
6201 bundle. See if we can switch to an other template with
6202 an appropriate boundary. */
6204 orig_template
= template;
6205 if (i
== 1 && (user_template
== 4
6206 || (user_template
< 0
6207 && (ia64_templ_desc
[template].exec_unit
[0]
6211 end_of_insn_group
= 0;
6213 else if (i
== 2 && (user_template
== 0
6214 || (user_template
< 0
6215 && (ia64_templ_desc
[template].exec_unit
[1]
6217 /* This test makes sure we don't switch the template if
6218 the next instruction is one that needs to be first in
6219 an instruction group. Since all those instructions are
6220 in the M group, there is no way such an instruction can
6221 fit in this bundle even if we switch the template. The
6222 reason we have to check for this is that otherwise we
6223 may end up generating "MI;;I M.." which has the deadly
6224 effect that the second M instruction is no longer the
6225 first in the bundle! --davidm 99/12/16 */
6226 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6229 end_of_insn_group
= 0;
6231 else if (curr
!= first
)
6232 /* can't fit this insn */
6235 if (template != orig_template
)
6236 /* if we switch the template, we need to reset the NOPs
6237 after slot i. The slot-types of the instructions ahead
6238 of i never change, so we don't need to worry about
6239 changing NOPs in front of this slot. */
6240 for (j
= i
; j
< 3; ++j
)
6241 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6243 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6245 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6246 if (idesc
->type
== IA64_TYPE_DYN
)
6248 if ((strcmp (idesc
->name
, "nop") == 0)
6249 || (strcmp (idesc
->name
, "hint") == 0)
6250 || (strcmp (idesc
->name
, "break") == 0))
6251 insn_unit
= required_unit
;
6252 else if (strcmp (idesc
->name
, "chk.s") == 0)
6254 insn_unit
= IA64_UNIT_M
;
6255 if (required_unit
== IA64_UNIT_I
)
6256 insn_unit
= IA64_UNIT_I
;
6259 as_fatal ("emit_one_bundle: unexpected dynamic op");
6261 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbf??"[insn_unit
]);
6262 ia64_free_opcode (idesc
);
6263 md
.slot
[curr
].idesc
= idesc
= ia64_find_opcode (mnemonic
);
6265 know (!idesc
->next
); /* no resolved dynamic ops have collisions */
6270 insn_type
= idesc
->type
;
6271 insn_unit
= IA64_UNIT_NIL
;
6275 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6276 insn_unit
= required_unit
;
6278 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6279 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6280 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6281 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6282 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6287 if (insn_unit
!= required_unit
)
6289 if (required_unit
== IA64_UNIT_L
6290 && insn_unit
== IA64_UNIT_I
6291 && !(idesc
->flags
& IA64_OPCODE_X_IN_MLX
))
6293 /* we got ourselves an MLX template but the current
6294 instruction isn't an X-unit, or an I-unit instruction
6295 that can go into the X slot of an MLX template. Duh. */
6296 if (md
.num_slots_in_use
>= NUM_SLOTS
)
6298 as_bad_where (md
.slot
[curr
].src_file
,
6299 md
.slot
[curr
].src_line
,
6300 "`%s' can't go in X slot of "
6301 "MLX template", idesc
->name
);
6302 /* drop this insn so we don't livelock: */
6303 --md
.num_slots_in_use
;
6307 continue; /* try next slot */
6313 addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6314 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6317 if (errata_nop_necessary_p (md
.slot
+ curr
, insn_unit
))
6318 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6320 build_insn (md
.slot
+ curr
, insn
+ i
);
6322 ptr
= md
.slot
[curr
].unwind_record
;
6325 /* Set slot numbers for all remaining unwind records belonging to the
6326 current insn. There can not be any prologue/body unwind records
6328 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6329 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6331 ptr
->slot_number
= (unsigned long) f
+ i
;
6332 ptr
->slot_frag
= frag_now
;
6334 md
.slot
[curr
].unwind_record
= NULL
;
6337 if (required_unit
== IA64_UNIT_L
)
6340 /* skip one slot for long/X-unit instructions */
6343 --md
.num_slots_in_use
;
6345 /* now is a good time to fix up the labels for this insn: */
6346 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6348 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6349 symbol_set_frag (lfix
->sym
, frag_now
);
6351 /* and fix up the tags also. */
6352 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6354 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6355 symbol_set_frag (lfix
->sym
, frag_now
);
6358 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6360 ifix
= md
.slot
[curr
].fixup
+ j
;
6361 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6362 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6363 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6364 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6365 fix
->fx_file
= md
.slot
[curr
].src_file
;
6366 fix
->fx_line
= md
.slot
[curr
].src_line
;
6369 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6371 if (end_of_insn_group
)
6373 md
.group_idx
= (md
.group_idx
+ 1) % 3;
6374 memset (md
.last_groups
+ md
.group_idx
, 0, sizeof md
.last_groups
[0]);
6378 ia64_free_opcode (md
.slot
[curr
].idesc
);
6379 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6380 md
.slot
[curr
].user_template
= -1;
6382 if (manual_bundling_off
)
6384 manual_bundling
= 0;
6387 curr
= (curr
+ 1) % NUM_SLOTS
;
6388 idesc
= md
.slot
[curr
].idesc
;
6390 if (manual_bundling
)
6392 if (md
.num_slots_in_use
> 0)
6393 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6394 "`%s' does not fit into %s template",
6395 idesc
->name
, ia64_templ_desc
[template].name
);
6397 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6398 "Missing '}' at end of file");
6400 know (md
.num_slots_in_use
< NUM_SLOTS
);
6402 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6403 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6405 number_to_chars_littleendian (f
+ 0, t0
, 8);
6406 number_to_chars_littleendian (f
+ 8, t1
, 8);
6410 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6411 unwind
.list
->next_slot_frag
= frag_now
;
6416 md_parse_option (c
, arg
)
6423 /* Switches from the Intel assembler. */
6425 if (strcmp (arg
, "ilp64") == 0
6426 || strcmp (arg
, "lp64") == 0
6427 || strcmp (arg
, "p64") == 0)
6429 md
.flags
|= EF_IA_64_ABI64
;
6431 else if (strcmp (arg
, "ilp32") == 0)
6433 md
.flags
&= ~EF_IA_64_ABI64
;
6435 else if (strcmp (arg
, "le") == 0)
6437 md
.flags
&= ~EF_IA_64_BE
;
6439 else if (strcmp (arg
, "be") == 0)
6441 md
.flags
|= EF_IA_64_BE
;
6448 if (strcmp (arg
, "so") == 0)
6450 /* Suppress signon message. */
6452 else if (strcmp (arg
, "pi") == 0)
6454 /* Reject privileged instructions. FIXME */
6456 else if (strcmp (arg
, "us") == 0)
6458 /* Allow union of signed and unsigned range. FIXME */
6460 else if (strcmp (arg
, "close_fcalls") == 0)
6462 /* Do not resolve global function calls. */
6469 /* temp[="prefix"] Insert temporary labels into the object file
6470 symbol table prefixed by "prefix".
6471 Default prefix is ":temp:".
6476 /* indirect=<tgt> Assume unannotated indirect branches behavior
6477 according to <tgt> --
6478 exit: branch out from the current context (default)
6479 labels: all labels in context may be branch targets
6481 if (strncmp (arg
, "indirect=", 9) != 0)
6486 /* -X conflicts with an ignored option, use -x instead */
6488 if (!arg
|| strcmp (arg
, "explicit") == 0)
6490 /* set default mode to explicit */
6491 md
.default_explicit_mode
= 1;
6494 else if (strcmp (arg
, "auto") == 0)
6496 md
.default_explicit_mode
= 0;
6498 else if (strcmp (arg
, "debug") == 0)
6502 else if (strcmp (arg
, "debugx") == 0)
6504 md
.default_explicit_mode
= 1;
6509 as_bad (_("Unrecognized option '-x%s'"), arg
);
6514 /* nops Print nops statistics. */
6517 /* GNU specific switches for gcc. */
6518 case OPTION_MCONSTANT_GP
:
6519 md
.flags
|= EF_IA_64_CONS_GP
;
6522 case OPTION_MAUTO_PIC
:
6523 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
6534 md_show_usage (stream
)
6539 --mconstant-gp mark output file as using the constant-GP model\n\
6540 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6541 --mauto-pic mark output file as using the constant-GP model\n\
6542 without function descriptors (sets ELF header flag\n\
6543 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6544 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6545 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6546 -x | -xexplicit turn on dependency violation checking (default)\n\
6547 -xauto automagically remove dependency violations\n\
6548 -xdebug debug dependency violation checker\n"),
6553 ia64_after_parse_args ()
6555 if (debug_type
== DEBUG_STABS
)
6556 as_fatal (_("--gstabs is not supported for ia64"));
6559 /* Return true if TYPE fits in TEMPL at SLOT. */
6562 match (int templ
, int type
, int slot
)
6564 enum ia64_unit unit
;
6567 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
6570 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
6572 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
6574 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
6575 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
6576 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
6577 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
6578 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
6579 default: result
= 0; break;
6584 /* Add a bit of extra goodness if a nop of type F or B would fit
6585 in TEMPL at SLOT. */
6588 extra_goodness (int templ
, int slot
)
6590 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
6592 if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
6597 /* This function is called once, at assembler startup time. It sets
6598 up all the tables, etc. that the MD part of the assembler will need
6599 that can be determined before arguments are parsed. */
6603 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
6608 md
.explicit_mode
= md
.default_explicit_mode
;
6610 bfd_set_section_alignment (stdoutput
, text_section
, 4);
6612 /* Make sure function pointers get initialized. */
6613 target_big_endian
= -1;
6614 dot_byteorder (TARGET_BYTES_BIG_ENDIAN
);
6616 alias_hash
= hash_new ();
6617 alias_name_hash
= hash_new ();
6618 secalias_hash
= hash_new ();
6619 secalias_name_hash
= hash_new ();
6621 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
6622 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
6623 &zero_address_frag
);
6625 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
6626 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
6627 &zero_address_frag
);
6629 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
6630 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
6631 &zero_address_frag
);
6633 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
6634 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
6635 &zero_address_frag
);
6637 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
6638 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
6639 &zero_address_frag
);
6641 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
6642 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
6643 &zero_address_frag
);
6645 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
6646 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
6647 &zero_address_frag
);
6649 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
6650 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
6651 &zero_address_frag
);
6653 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
6654 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
6655 &zero_address_frag
);
6657 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
6658 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
6659 &zero_address_frag
);
6661 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
6662 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
6663 &zero_address_frag
);
6665 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
6666 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
6667 &zero_address_frag
);
6669 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
6670 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
6671 &zero_address_frag
);
6673 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
6674 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
6675 &zero_address_frag
);
6677 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
6678 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
6679 &zero_address_frag
);
6681 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
6682 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
6683 &zero_address_frag
);
6685 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
6686 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
6687 &zero_address_frag
);
6689 /* Compute the table of best templates. We compute goodness as a
6690 base 4 value, in which each match counts for 3, each F counts
6691 for 2, each B counts for 1. This should maximize the number of
6692 F and B nops in the chosen bundles, which is good because these
6693 pipelines are least likely to be overcommitted. */
6694 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
6695 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
6696 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
6699 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
6702 if (match (t
, i
, 0))
6704 if (match (t
, j
, 1))
6706 if (match (t
, k
, 2))
6707 goodness
= 3 + 3 + 3;
6709 goodness
= 3 + 3 + extra_goodness (t
, 2);
6711 else if (match (t
, j
, 2))
6712 goodness
= 3 + 3 + extra_goodness (t
, 1);
6716 goodness
+= extra_goodness (t
, 1);
6717 goodness
+= extra_goodness (t
, 2);
6720 else if (match (t
, i
, 1))
6722 if (match (t
, j
, 2))
6725 goodness
= 3 + extra_goodness (t
, 2);
6727 else if (match (t
, i
, 2))
6728 goodness
= 3 + extra_goodness (t
, 1);
6730 if (goodness
> best
)
6733 best_template
[i
][j
][k
] = t
;
6738 for (i
= 0; i
< NUM_SLOTS
; ++i
)
6739 md
.slot
[i
].user_template
= -1;
6741 md
.pseudo_hash
= hash_new ();
6742 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
6744 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
6745 (void *) (pseudo_opcode
+ i
));
6747 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6748 pseudo_opcode
[i
].name
, err
);
6751 md
.reg_hash
= hash_new ();
6752 md
.dynreg_hash
= hash_new ();
6753 md
.const_hash
= hash_new ();
6754 md
.entry_hash
= hash_new ();
6756 /* general registers: */
6759 for (i
= 0; i
< total
; ++i
)
6761 sprintf (name
, "r%d", i
- REG_GR
);
6762 md
.regsym
[i
] = declare_register (name
, i
);
6765 /* floating point registers: */
6767 for (; i
< total
; ++i
)
6769 sprintf (name
, "f%d", i
- REG_FR
);
6770 md
.regsym
[i
] = declare_register (name
, i
);
6773 /* application registers: */
6776 for (; i
< total
; ++i
)
6778 sprintf (name
, "ar%d", i
- REG_AR
);
6779 md
.regsym
[i
] = declare_register (name
, i
);
6782 /* control registers: */
6785 for (; i
< total
; ++i
)
6787 sprintf (name
, "cr%d", i
- REG_CR
);
6788 md
.regsym
[i
] = declare_register (name
, i
);
6791 /* predicate registers: */
6793 for (; i
< total
; ++i
)
6795 sprintf (name
, "p%d", i
- REG_P
);
6796 md
.regsym
[i
] = declare_register (name
, i
);
6799 /* branch registers: */
6801 for (; i
< total
; ++i
)
6803 sprintf (name
, "b%d", i
- REG_BR
);
6804 md
.regsym
[i
] = declare_register (name
, i
);
6807 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
6808 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
6809 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
6810 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
6811 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
6812 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
6813 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
6815 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
6817 regnum
= indirect_reg
[i
].regnum
;
6818 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
6821 /* define synonyms for application registers: */
6822 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
6823 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
6824 REG_AR
+ ar
[i
- REG_AR
].regnum
);
6826 /* define synonyms for control registers: */
6827 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
6828 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
6829 REG_CR
+ cr
[i
- REG_CR
].regnum
);
6831 declare_register ("gp", REG_GR
+ 1);
6832 declare_register ("sp", REG_GR
+ 12);
6833 declare_register ("rp", REG_BR
+ 0);
6835 /* pseudo-registers used to specify unwind info: */
6836 declare_register ("psp", REG_PSP
);
6838 declare_register_set ("ret", 4, REG_GR
+ 8);
6839 declare_register_set ("farg", 8, REG_FR
+ 8);
6840 declare_register_set ("fret", 8, REG_FR
+ 8);
6842 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
6844 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
6845 (PTR
) (const_bits
+ i
));
6847 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6851 /* Set the architecture and machine depending on defaults and command line
6853 if (md
.flags
& EF_IA_64_ABI64
)
6854 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
6856 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
6859 as_warn (_("Could not set architecture and machine"));
6861 /* Set the pointer size and pointer shift size depending on md.flags */
6863 if (md
.flags
& EF_IA_64_ABI64
)
6865 md
.pointer_size
= 8; /* pointers are 8 bytes */
6866 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
6870 md
.pointer_size
= 4; /* pointers are 4 bytes */
6871 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
6874 md
.mem_offset
.hint
= 0;
6877 md
.entry_labels
= NULL
;
6880 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6881 because that is called after md_parse_option which is where we do the
6882 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6883 default endianness. */
6886 ia64_init (argc
, argv
)
6887 int argc ATTRIBUTE_UNUSED
;
6888 char **argv ATTRIBUTE_UNUSED
;
6890 md
.flags
= MD_FLAGS_DEFAULT
;
6893 /* Return a string for the target object file format. */
6896 ia64_target_format ()
6898 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
6900 if (md
.flags
& EF_IA_64_BE
)
6902 if (md
.flags
& EF_IA_64_ABI64
)
6903 #if defined(TE_AIX50)
6904 return "elf64-ia64-aix-big";
6905 #elif defined(TE_HPUX)
6906 return "elf64-ia64-hpux-big";
6908 return "elf64-ia64-big";
6911 #if defined(TE_AIX50)
6912 return "elf32-ia64-aix-big";
6913 #elif defined(TE_HPUX)
6914 return "elf32-ia64-hpux-big";
6916 return "elf32-ia64-big";
6921 if (md
.flags
& EF_IA_64_ABI64
)
6923 return "elf64-ia64-aix-little";
6925 return "elf64-ia64-little";
6929 return "elf32-ia64-aix-little";
6931 return "elf32-ia64-little";
6936 return "unknown-format";
6940 ia64_end_of_source ()
6942 /* terminate insn group upon reaching end of file: */
6943 insn_group_break (1, 0, 0);
6945 /* emits slots we haven't written yet: */
6946 ia64_flush_insns ();
6948 bfd_set_private_flags (stdoutput
, md
.flags
);
6950 md
.mem_offset
.hint
= 0;
6956 if (md
.qp
.X_op
== O_register
)
6957 as_bad ("qualifying predicate not followed by instruction");
6958 md
.qp
.X_op
= O_absent
;
6960 if (ignore_input ())
6963 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
6965 if (md
.detect_dv
&& !md
.explicit_mode
)
6966 as_warn (_("Explicit stops are ignored in auto mode"));
6968 insn_group_break (1, 0, 0);
6972 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
6974 static int defining_tag
= 0;
6977 ia64_unrecognized_line (ch
)
6983 expression (&md
.qp
);
6984 if (*input_line_pointer
++ != ')')
6986 as_bad ("Expected ')'");
6989 if (md
.qp
.X_op
!= O_register
)
6991 as_bad ("Qualifying predicate expected");
6994 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
6996 as_bad ("Predicate register expected");
7002 if (md
.manual_bundling
)
7003 as_warn ("Found '{' when manual bundling is already turned on");
7005 CURR_SLOT
.manual_bundling_on
= 1;
7006 md
.manual_bundling
= 1;
7008 /* Bundling is only acceptable in explicit mode
7009 or when in default automatic mode. */
7010 if (md
.detect_dv
&& !md
.explicit_mode
)
7012 if (!md
.mode_explicitly_set
7013 && !md
.default_explicit_mode
)
7016 as_warn (_("Found '{' after explicit switch to automatic mode"));
7021 if (!md
.manual_bundling
)
7022 as_warn ("Found '}' when manual bundling is off");
7024 PREV_SLOT
.manual_bundling_off
= 1;
7025 md
.manual_bundling
= 0;
7027 /* switch back to automatic mode, if applicable */
7030 && !md
.mode_explicitly_set
7031 && !md
.default_explicit_mode
)
7034 /* Allow '{' to follow on the same line. We also allow ";;", but that
7035 happens automatically because ';' is an end of line marker. */
7037 if (input_line_pointer
[0] == '{')
7039 input_line_pointer
++;
7040 return ia64_unrecognized_line ('{');
7043 demand_empty_rest_of_line ();
7053 if (md
.qp
.X_op
== O_register
)
7055 as_bad ("Tag must come before qualifying predicate.");
7059 /* This implements just enough of read_a_source_file in read.c to
7060 recognize labels. */
7061 if (is_name_beginner (*input_line_pointer
))
7063 s
= input_line_pointer
;
7064 c
= get_symbol_end ();
7066 else if (LOCAL_LABELS_FB
7067 && ISDIGIT (*input_line_pointer
))
7070 while (ISDIGIT (*input_line_pointer
))
7071 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7072 fb_label_instance_inc (temp
);
7073 s
= fb_label_name (temp
, 0);
7074 c
= *input_line_pointer
;
7083 /* Put ':' back for error messages' sake. */
7084 *input_line_pointer
++ = ':';
7085 as_bad ("Expected ':'");
7092 /* Put ':' back for error messages' sake. */
7093 *input_line_pointer
++ = ':';
7094 if (*input_line_pointer
++ != ']')
7096 as_bad ("Expected ']'");
7101 as_bad ("Tag name expected");
7111 /* Not a valid line. */
7116 ia64_frob_label (sym
)
7119 struct label_fix
*fix
;
7121 /* Tags need special handling since they are not bundle breaks like
7125 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7127 fix
->next
= CURR_SLOT
.tag_fixups
;
7128 CURR_SLOT
.tag_fixups
= fix
;
7133 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7135 md
.last_text_seg
= now_seg
;
7136 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7138 fix
->next
= CURR_SLOT
.label_fixups
;
7139 CURR_SLOT
.label_fixups
= fix
;
7141 /* Keep track of how many code entry points we've seen. */
7142 if (md
.path
== md
.maxpaths
)
7145 md
.entry_labels
= (const char **)
7146 xrealloc ((void *) md
.entry_labels
,
7147 md
.maxpaths
* sizeof (char *));
7149 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7154 ia64_flush_pending_output ()
7156 if (!md
.keep_pending_output
7157 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7159 /* ??? This causes many unnecessary stop bits to be emitted.
7160 Unfortunately, it isn't clear if it is safe to remove this. */
7161 insn_group_break (1, 0, 0);
7162 ia64_flush_insns ();
7166 /* Do ia64-specific expression optimization. All that's done here is
7167 to transform index expressions that are either due to the indexing
7168 of rotating registers or due to the indexing of indirect register
7171 ia64_optimize_expr (l
, op
, r
)
7180 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7182 num_regs
= (l
->X_add_number
>> 16);
7183 if ((unsigned) r
->X_add_number
>= num_regs
)
7186 as_bad ("No current frame");
7188 as_bad ("Index out of range 0..%u", num_regs
- 1);
7189 r
->X_add_number
= 0;
7191 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7194 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7196 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7197 || l
->X_add_number
== IND_MEM
)
7199 as_bad ("Indirect register set name expected");
7200 l
->X_add_number
= IND_CPUID
;
7203 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7204 l
->X_add_number
= r
->X_add_number
;
7212 ia64_parse_name (name
, e
)
7216 struct const_desc
*cdesc
;
7217 struct dynreg
*dr
= 0;
7218 unsigned int regnum
;
7222 /* first see if NAME is a known register name: */
7223 sym
= hash_find (md
.reg_hash
, name
);
7226 e
->X_op
= O_register
;
7227 e
->X_add_number
= S_GET_VALUE (sym
);
7231 cdesc
= hash_find (md
.const_hash
, name
);
7234 e
->X_op
= O_constant
;
7235 e
->X_add_number
= cdesc
->value
;
7239 /* check for inN, locN, or outN: */
7243 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7251 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7259 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7272 /* The name is inN, locN, or outN; parse the register number. */
7273 regnum
= strtoul (name
, &end
, 10);
7274 if (end
> name
&& *end
== '\0')
7276 if ((unsigned) regnum
>= dr
->num_regs
)
7279 as_bad ("No current frame");
7281 as_bad ("Register number out of range 0..%u",
7285 e
->X_op
= O_register
;
7286 e
->X_add_number
= dr
->base
+ regnum
;
7291 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
7293 /* We've got ourselves the name of a rotating register set.
7294 Store the base register number in the low 16 bits of
7295 X_add_number and the size of the register set in the top 16
7297 e
->X_op
= O_register
;
7298 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
7304 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7307 ia64_canonicalize_symbol_name (name
)
7310 size_t len
= strlen (name
);
7311 if (len
> 1 && name
[len
- 1] == '#')
7312 name
[len
- 1] = '\0';
7316 /* Return true if idesc is a conditional branch instruction. This excludes
7317 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7318 because they always read/write resources regardless of the value of the
7319 qualifying predicate. br.ia must always use p0, and hence is always
7320 taken. Thus this function returns true for branches which can fall
7321 through, and which use no resources if they do fall through. */
7324 is_conditional_branch (idesc
)
7325 struct ia64_opcode
*idesc
;
7327 /* br is a conditional branch. Everything that starts with br. except
7328 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7329 Everything that starts with brl is a conditional branch. */
7330 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
7331 && (idesc
->name
[2] == '\0'
7332 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
7333 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
7334 || idesc
->name
[2] == 'l'
7335 /* br.cond, br.call, br.clr */
7336 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
7337 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
7338 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
7341 /* Return whether the given opcode is a taken branch. If there's any doubt,
7345 is_taken_branch (idesc
)
7346 struct ia64_opcode
*idesc
;
7348 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
7349 || strncmp (idesc
->name
, "br.ia", 5) == 0);
7352 /* Return whether the given opcode is an interruption or rfi. If there's any
7353 doubt, returns zero. */
7356 is_interruption_or_rfi (idesc
)
7357 struct ia64_opcode
*idesc
;
7359 if (strcmp (idesc
->name
, "rfi") == 0)
7364 /* Returns the index of the given dependency in the opcode's list of chks, or
7365 -1 if there is no dependency. */
7368 depends_on (depind
, idesc
)
7370 struct ia64_opcode
*idesc
;
7373 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
7374 for (i
= 0; i
< dep
->nchks
; i
++)
7376 if (depind
== DEP (dep
->chks
[i
]))
7382 /* Determine a set of specific resources used for a particular resource
7383 class. Returns the number of specific resources identified For those
7384 cases which are not determinable statically, the resource returned is
7387 Meanings of value in 'NOTE':
7388 1) only read/write when the register number is explicitly encoded in the
7390 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7391 accesses CFM when qualifying predicate is in the rotating region.
7392 3) general register value is used to specify an indirect register; not
7393 determinable statically.
7394 4) only read the given resource when bits 7:0 of the indirect index
7395 register value does not match the register number of the resource; not
7396 determinable statically.
7397 5) all rules are implementation specific.
7398 6) only when both the index specified by the reader and the index specified
7399 by the writer have the same value in bits 63:61; not determinable
7401 7) only access the specified resource when the corresponding mask bit is
7403 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7404 only read when these insns reference FR2-31
7405 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7406 written when these insns write FR32-127
7407 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7409 11) The target predicates are written independently of PR[qp], but source
7410 registers are only read if PR[qp] is true. Since the state of PR[qp]
7411 cannot statically be determined, all source registers are marked used.
7412 12) This insn only reads the specified predicate register when that
7413 register is the PR[qp].
7414 13) This reference to ld-c only applies to teh GR whose value is loaded
7415 with data returned from memory, not the post-incremented address register.
7416 14) The RSE resource includes the implementation-specific RSE internal
7417 state resources. At least one (and possibly more) of these resources are
7418 read by each instruction listed in IC:rse-readers. At least one (and
7419 possibly more) of these resources are written by each insn listed in
7421 15+16) Represents reserved instructions, which the assembler does not
7424 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7425 this code; there are no dependency violations based on memory access.
7428 #define MAX_SPECS 256
7433 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
7434 const struct ia64_dependency
*dep
;
7435 struct ia64_opcode
*idesc
;
7436 int type
; /* is this a DV chk or a DV reg? */
7437 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
7438 int note
; /* resource note for this insn's usage */
7439 int path
; /* which execution path to examine */
7446 if (dep
->mode
== IA64_DV_WAW
7447 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
7448 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
7451 /* template for any resources we identify */
7452 tmpl
.dependency
= dep
;
7454 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
7455 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
7456 tmpl
.link_to_qp_branch
= 1;
7457 tmpl
.mem_offset
.hint
= 0;
7460 tmpl
.cmp_type
= CMP_NONE
;
7463 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7464 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7465 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7467 /* we don't need to track these */
7468 if (dep
->semantics
== IA64_DVS_NONE
)
7471 switch (dep
->specifier
)
7476 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7478 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7479 if (regno
>= 0 && regno
<= 7)
7481 specs
[count
] = tmpl
;
7482 specs
[count
++].index
= regno
;
7488 for (i
= 0; i
< 8; i
++)
7490 specs
[count
] = tmpl
;
7491 specs
[count
++].index
= i
;
7500 case IA64_RS_AR_UNAT
:
7501 /* This is a mov =AR or mov AR= instruction. */
7502 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7504 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7505 if (regno
== AR_UNAT
)
7507 specs
[count
++] = tmpl
;
7512 /* This is a spill/fill, or other instruction that modifies the
7515 /* Unless we can determine the specific bits used, mark the whole
7516 thing; bits 8:3 of the memory address indicate the bit used in
7517 UNAT. The .mem.offset hint may be used to eliminate a small
7518 subset of conflicts. */
7519 specs
[count
] = tmpl
;
7520 if (md
.mem_offset
.hint
)
7523 fprintf (stderr
, " Using hint for spill/fill\n");
7524 /* The index isn't actually used, just set it to something
7525 approximating the bit index. */
7526 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
7527 specs
[count
].mem_offset
.hint
= 1;
7528 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
7529 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
7533 specs
[count
++].specific
= 0;
7541 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7543 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7544 if ((regno
>= 8 && regno
<= 15)
7545 || (regno
>= 20 && regno
<= 23)
7546 || (regno
>= 31 && regno
<= 39)
7547 || (regno
>= 41 && regno
<= 47)
7548 || (regno
>= 67 && regno
<= 111))
7550 specs
[count
] = tmpl
;
7551 specs
[count
++].index
= regno
;
7564 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
7566 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
7567 if ((regno
>= 48 && regno
<= 63)
7568 || (regno
>= 112 && regno
<= 127))
7570 specs
[count
] = tmpl
;
7571 specs
[count
++].index
= regno
;
7577 for (i
= 48; i
< 64; i
++)
7579 specs
[count
] = tmpl
;
7580 specs
[count
++].index
= i
;
7582 for (i
= 112; i
< 128; i
++)
7584 specs
[count
] = tmpl
;
7585 specs
[count
++].index
= i
;
7603 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7604 if (idesc
->operands
[i
] == IA64_OPND_B1
7605 || idesc
->operands
[i
] == IA64_OPND_B2
)
7607 specs
[count
] = tmpl
;
7608 specs
[count
++].index
=
7609 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7614 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7615 if (idesc
->operands
[i
] == IA64_OPND_B1
7616 || idesc
->operands
[i
] == IA64_OPND_B2
)
7618 specs
[count
] = tmpl
;
7619 specs
[count
++].index
=
7620 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
7626 case IA64_RS_CPUID
: /* four or more registers */
7629 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
7631 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7632 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7635 specs
[count
] = tmpl
;
7636 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7640 specs
[count
] = tmpl
;
7641 specs
[count
++].specific
= 0;
7651 case IA64_RS_DBR
: /* four or more registers */
7654 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
7656 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7657 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7660 specs
[count
] = tmpl
;
7661 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7665 specs
[count
] = tmpl
;
7666 specs
[count
++].specific
= 0;
7670 else if (note
== 0 && !rsrc_write
)
7672 specs
[count
] = tmpl
;
7673 specs
[count
++].specific
= 0;
7681 case IA64_RS_IBR
: /* four or more registers */
7684 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
7686 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7687 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7690 specs
[count
] = tmpl
;
7691 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7695 specs
[count
] = tmpl
;
7696 specs
[count
++].specific
= 0;
7709 /* These are implementation specific. Force all references to
7710 conflict with all other references. */
7711 specs
[count
] = tmpl
;
7712 specs
[count
++].specific
= 0;
7720 case IA64_RS_PKR
: /* 16 or more registers */
7721 if (note
== 3 || note
== 4)
7723 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
7725 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7726 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7731 specs
[count
] = tmpl
;
7732 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7735 for (i
= 0; i
< NELEMS (gr_values
); i
++)
7737 /* Uses all registers *except* the one in R3. */
7738 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
7740 specs
[count
] = tmpl
;
7741 specs
[count
++].index
= i
;
7747 specs
[count
] = tmpl
;
7748 specs
[count
++].specific
= 0;
7755 specs
[count
] = tmpl
;
7756 specs
[count
++].specific
= 0;
7760 case IA64_RS_PMC
: /* four or more registers */
7763 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
7764 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
7767 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
7769 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
7770 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7773 specs
[count
] = tmpl
;
7774 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7778 specs
[count
] = tmpl
;
7779 specs
[count
++].specific
= 0;
7789 case IA64_RS_PMD
: /* four or more registers */
7792 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
7794 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7795 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7798 specs
[count
] = tmpl
;
7799 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
7803 specs
[count
] = tmpl
;
7804 specs
[count
++].specific
= 0;
7814 case IA64_RS_RR
: /* eight registers */
7817 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
7819 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
7820 if (regno
>= 0 && regno
< NELEMS (gr_values
)
7823 specs
[count
] = tmpl
;
7824 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
7828 specs
[count
] = tmpl
;
7829 specs
[count
++].specific
= 0;
7833 else if (note
== 0 && !rsrc_write
)
7835 specs
[count
] = tmpl
;
7836 specs
[count
++].specific
= 0;
7844 case IA64_RS_CR_IRR
:
7847 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7848 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
7850 && idesc
->operands
[1] == IA64_OPND_CR3
7853 for (i
= 0; i
< 4; i
++)
7855 specs
[count
] = tmpl
;
7856 specs
[count
++].index
= CR_IRR0
+ i
;
7862 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7863 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
7865 && regno
<= CR_IRR3
)
7867 specs
[count
] = tmpl
;
7868 specs
[count
++].index
= regno
;
7877 case IA64_RS_CR_LRR
:
7884 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7885 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
7886 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
7888 specs
[count
] = tmpl
;
7889 specs
[count
++].index
= regno
;
7897 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
7899 specs
[count
] = tmpl
;
7900 specs
[count
++].index
=
7901 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
7916 else if (rsrc_write
)
7918 if (dep
->specifier
== IA64_RS_FRb
7919 && idesc
->operands
[0] == IA64_OPND_F1
)
7921 specs
[count
] = tmpl
;
7922 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
7927 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
7929 if (idesc
->operands
[i
] == IA64_OPND_F2
7930 || idesc
->operands
[i
] == IA64_OPND_F3
7931 || idesc
->operands
[i
] == IA64_OPND_F4
)
7933 specs
[count
] = tmpl
;
7934 specs
[count
++].index
=
7935 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
7944 /* This reference applies only to the GR whose value is loaded with
7945 data returned from memory. */
7946 specs
[count
] = tmpl
;
7947 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
7953 for (i
= 0; i
< idesc
->num_outputs
; i
++)
7954 if (idesc
->operands
[i
] == IA64_OPND_R1
7955 || idesc
->operands
[i
] == IA64_OPND_R2
7956 || idesc
->operands
[i
] == IA64_OPND_R3
)
7958 specs
[count
] = tmpl
;
7959 specs
[count
++].index
=
7960 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7962 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
7963 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
7964 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
7966 specs
[count
] = tmpl
;
7967 specs
[count
++].index
=
7968 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
7973 /* Look for anything that reads a GR. */
7974 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
7976 if (idesc
->operands
[i
] == IA64_OPND_MR3
7977 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
7978 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
7979 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
7980 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
7981 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
7982 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
7983 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
7984 || idesc
->operands
[i
] == IA64_OPND_RR_R3
7985 || ((i
>= idesc
->num_outputs
)
7986 && (idesc
->operands
[i
] == IA64_OPND_R1
7987 || idesc
->operands
[i
] == IA64_OPND_R2
7988 || idesc
->operands
[i
] == IA64_OPND_R3
7989 /* addl source register. */
7990 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
7992 specs
[count
] = tmpl
;
7993 specs
[count
++].index
=
7994 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8005 /* This is the same as IA64_RS_PRr, except that the register range is
8006 from 1 - 15, and there are no rotating register reads/writes here. */
8010 for (i
= 1; i
< 16; i
++)
8012 specs
[count
] = tmpl
;
8013 specs
[count
++].index
= i
;
8019 /* Mark only those registers indicated by the mask. */
8022 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8023 for (i
= 1; i
< 16; i
++)
8024 if (mask
& ((valueT
) 1 << i
))
8026 specs
[count
] = tmpl
;
8027 specs
[count
++].index
= i
;
8035 else if (note
== 11) /* note 11 implies note 1 as well */
8039 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8041 if (idesc
->operands
[i
] == IA64_OPND_P1
8042 || idesc
->operands
[i
] == IA64_OPND_P2
)
8044 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8045 if (regno
>= 1 && regno
< 16)
8047 specs
[count
] = tmpl
;
8048 specs
[count
++].index
= regno
;
8058 else if (note
== 12)
8060 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8062 specs
[count
] = tmpl
;
8063 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8070 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8071 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8072 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8073 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8075 if ((idesc
->operands
[0] == IA64_OPND_P1
8076 || idesc
->operands
[0] == IA64_OPND_P2
)
8077 && p1
>= 1 && p1
< 16)
8079 specs
[count
] = tmpl
;
8080 specs
[count
].cmp_type
=
8081 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8082 specs
[count
++].index
= p1
;
8084 if ((idesc
->operands
[1] == IA64_OPND_P1
8085 || idesc
->operands
[1] == IA64_OPND_P2
)
8086 && p2
>= 1 && p2
< 16)
8088 specs
[count
] = tmpl
;
8089 specs
[count
].cmp_type
=
8090 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8091 specs
[count
++].index
= p2
;
8096 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8098 specs
[count
] = tmpl
;
8099 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8101 if (idesc
->operands
[1] == IA64_OPND_PR
)
8103 for (i
= 1; i
< 16; i
++)
8105 specs
[count
] = tmpl
;
8106 specs
[count
++].index
= i
;
8117 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8118 simplified cases of this. */
8122 for (i
= 16; i
< 63; i
++)
8124 specs
[count
] = tmpl
;
8125 specs
[count
++].index
= i
;
8131 /* Mark only those registers indicated by the mask. */
8133 && idesc
->operands
[0] == IA64_OPND_PR
)
8135 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8136 if (mask
& ((valueT
) 1 << 16))
8137 for (i
= 16; i
< 63; i
++)
8139 specs
[count
] = tmpl
;
8140 specs
[count
++].index
= i
;
8144 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8146 for (i
= 16; i
< 63; i
++)
8148 specs
[count
] = tmpl
;
8149 specs
[count
++].index
= i
;
8157 else if (note
== 11) /* note 11 implies note 1 as well */
8161 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8163 if (idesc
->operands
[i
] == IA64_OPND_P1
8164 || idesc
->operands
[i
] == IA64_OPND_P2
)
8166 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8167 if (regno
>= 16 && regno
< 63)
8169 specs
[count
] = tmpl
;
8170 specs
[count
++].index
= regno
;
8180 else if (note
== 12)
8182 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8184 specs
[count
] = tmpl
;
8185 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8192 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8193 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8194 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8195 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8197 if ((idesc
->operands
[0] == IA64_OPND_P1
8198 || idesc
->operands
[0] == IA64_OPND_P2
)
8199 && p1
>= 16 && p1
< 63)
8201 specs
[count
] = tmpl
;
8202 specs
[count
].cmp_type
=
8203 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8204 specs
[count
++].index
= p1
;
8206 if ((idesc
->operands
[1] == IA64_OPND_P1
8207 || idesc
->operands
[1] == IA64_OPND_P2
)
8208 && p2
>= 16 && p2
< 63)
8210 specs
[count
] = tmpl
;
8211 specs
[count
].cmp_type
=
8212 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8213 specs
[count
++].index
= p2
;
8218 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8220 specs
[count
] = tmpl
;
8221 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8223 if (idesc
->operands
[1] == IA64_OPND_PR
)
8225 for (i
= 16; i
< 63; i
++)
8227 specs
[count
] = tmpl
;
8228 specs
[count
++].index
= i
;
8240 /* Verify that the instruction is using the PSR bit indicated in
8244 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8246 if (dep
->regindex
< 6)
8248 specs
[count
++] = tmpl
;
8251 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8253 if (dep
->regindex
< 32
8254 || dep
->regindex
== 35
8255 || dep
->regindex
== 36
8256 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8258 specs
[count
++] = tmpl
;
8261 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8263 if (dep
->regindex
< 32
8264 || dep
->regindex
== 35
8265 || dep
->regindex
== 36
8266 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8268 specs
[count
++] = tmpl
;
8273 /* Several PSR bits have very specific dependencies. */
8274 switch (dep
->regindex
)
8277 specs
[count
++] = tmpl
;
8282 specs
[count
++] = tmpl
;
8286 /* Only certain CR accesses use PSR.ic */
8287 if (idesc
->operands
[0] == IA64_OPND_CR3
8288 || idesc
->operands
[1] == IA64_OPND_CR3
)
8291 ((idesc
->operands
[0] == IA64_OPND_CR3
)
8294 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
8309 specs
[count
++] = tmpl
;
8318 specs
[count
++] = tmpl
;
8322 /* Only some AR accesses use cpl */
8323 if (idesc
->operands
[0] == IA64_OPND_AR3
8324 || idesc
->operands
[1] == IA64_OPND_AR3
)
8327 ((idesc
->operands
[0] == IA64_OPND_AR3
)
8330 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
8337 && regno
<= AR_K7
))))
8339 specs
[count
++] = tmpl
;
8344 specs
[count
++] = tmpl
;
8354 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
8356 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
8362 if (mask
& ((valueT
) 1 << dep
->regindex
))
8364 specs
[count
++] = tmpl
;
8369 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
8370 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
8371 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8372 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8374 if (idesc
->operands
[i
] == IA64_OPND_F1
8375 || idesc
->operands
[i
] == IA64_OPND_F2
8376 || idesc
->operands
[i
] == IA64_OPND_F3
8377 || idesc
->operands
[i
] == IA64_OPND_F4
)
8379 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8380 if (reg
>= min
&& reg
<= max
)
8382 specs
[count
++] = tmpl
;
8389 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
8390 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
8391 /* mfh is read on writes to FR32-127; mfl is read on writes to
8393 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8395 if (idesc
->operands
[i
] == IA64_OPND_F1
)
8397 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8398 if (reg
>= min
&& reg
<= max
)
8400 specs
[count
++] = tmpl
;
8405 else if (note
== 10)
8407 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8409 if (idesc
->operands
[i
] == IA64_OPND_R1
8410 || idesc
->operands
[i
] == IA64_OPND_R2
8411 || idesc
->operands
[i
] == IA64_OPND_R3
)
8413 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8414 if (regno
>= 16 && regno
<= 31)
8416 specs
[count
++] = tmpl
;
8427 case IA64_RS_AR_FPSR
:
8428 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8430 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8431 if (regno
== AR_FPSR
)
8433 specs
[count
++] = tmpl
;
8438 specs
[count
++] = tmpl
;
8443 /* Handle all AR[REG] resources */
8444 if (note
== 0 || note
== 1)
8446 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8447 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
8448 && regno
== dep
->regindex
)
8450 specs
[count
++] = tmpl
;
8452 /* other AR[REG] resources may be affected by AR accesses */
8453 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
8456 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
8457 switch (dep
->regindex
)
8463 if (regno
== AR_BSPSTORE
)
8465 specs
[count
++] = tmpl
;
8469 (regno
== AR_BSPSTORE
8470 || regno
== AR_RNAT
))
8472 specs
[count
++] = tmpl
;
8477 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8480 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
8481 switch (dep
->regindex
)
8486 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
8488 specs
[count
++] = tmpl
;
8495 specs
[count
++] = tmpl
;
8505 /* Handle all CR[REG] resources */
8506 if (note
== 0 || note
== 1)
8508 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8510 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8511 if (regno
== dep
->regindex
)
8513 specs
[count
++] = tmpl
;
8515 else if (!rsrc_write
)
8517 /* Reads from CR[IVR] affect other resources. */
8518 if (regno
== CR_IVR
)
8520 if ((dep
->regindex
>= CR_IRR0
8521 && dep
->regindex
<= CR_IRR3
)
8522 || dep
->regindex
== CR_TPR
)
8524 specs
[count
++] = tmpl
;
8531 specs
[count
++] = tmpl
;
8540 case IA64_RS_INSERVICE
:
8541 /* look for write of EOI (67) or read of IVR (65) */
8542 if ((idesc
->operands
[0] == IA64_OPND_CR3
8543 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
8544 || (idesc
->operands
[1] == IA64_OPND_CR3
8545 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
8547 specs
[count
++] = tmpl
;
8554 specs
[count
++] = tmpl
;
8565 specs
[count
++] = tmpl
;
8569 /* Check if any of the registers accessed are in the rotating region.
8570 mov to/from pr accesses CFM only when qp_regno is in the rotating
8572 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8574 if (idesc
->operands
[i
] == IA64_OPND_R1
8575 || idesc
->operands
[i
] == IA64_OPND_R2
8576 || idesc
->operands
[i
] == IA64_OPND_R3
)
8578 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8579 /* Assumes that md.rot.num_regs is always valid */
8580 if (md
.rot
.num_regs
> 0
8582 && num
< 31 + md
.rot
.num_regs
)
8584 specs
[count
] = tmpl
;
8585 specs
[count
++].specific
= 0;
8588 else if (idesc
->operands
[i
] == IA64_OPND_F1
8589 || idesc
->operands
[i
] == IA64_OPND_F2
8590 || idesc
->operands
[i
] == IA64_OPND_F3
8591 || idesc
->operands
[i
] == IA64_OPND_F4
)
8593 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8596 specs
[count
] = tmpl
;
8597 specs
[count
++].specific
= 0;
8600 else if (idesc
->operands
[i
] == IA64_OPND_P1
8601 || idesc
->operands
[i
] == IA64_OPND_P2
)
8603 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8606 specs
[count
] = tmpl
;
8607 specs
[count
++].specific
= 0;
8611 if (CURR_SLOT
.qp_regno
> 15)
8613 specs
[count
] = tmpl
;
8614 specs
[count
++].specific
= 0;
8619 /* This is the same as IA64_RS_PRr, except simplified to account for
8620 the fact that there is only one register. */
8624 specs
[count
++] = tmpl
;
8629 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
8630 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8631 if (mask
& ((valueT
) 1 << 63))
8632 specs
[count
++] = tmpl
;
8634 else if (note
== 11)
8636 if ((idesc
->operands
[0] == IA64_OPND_P1
8637 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
8638 || (idesc
->operands
[1] == IA64_OPND_P2
8639 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
8641 specs
[count
++] = tmpl
;
8644 else if (note
== 12)
8646 if (CURR_SLOT
.qp_regno
== 63)
8648 specs
[count
++] = tmpl
;
8655 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8656 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8657 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8658 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8661 && (idesc
->operands
[0] == IA64_OPND_P1
8662 || idesc
->operands
[0] == IA64_OPND_P2
))
8664 specs
[count
] = tmpl
;
8665 specs
[count
++].cmp_type
=
8666 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8669 && (idesc
->operands
[1] == IA64_OPND_P1
8670 || idesc
->operands
[1] == IA64_OPND_P2
))
8672 specs
[count
] = tmpl
;
8673 specs
[count
++].cmp_type
=
8674 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8679 if (CURR_SLOT
.qp_regno
== 63)
8681 specs
[count
++] = tmpl
;
8692 /* FIXME we can identify some individual RSE written resources, but RSE
8693 read resources have not yet been completely identified, so for now
8694 treat RSE as a single resource */
8695 if (strncmp (idesc
->name
, "mov", 3) == 0)
8699 if (idesc
->operands
[0] == IA64_OPND_AR3
8700 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
8702 specs
[count
] = tmpl
;
8703 specs
[count
++].index
= 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8708 if (idesc
->operands
[0] == IA64_OPND_AR3
)
8710 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
8711 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
8713 specs
[count
++] = tmpl
;
8716 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
8718 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
8719 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
8720 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
8722 specs
[count
++] = tmpl
;
8729 specs
[count
++] = tmpl
;
8734 /* FIXME -- do any of these need to be non-specific? */
8735 specs
[count
++] = tmpl
;
8739 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
8746 /* Clear branch flags on marked resources. This breaks the link between the
8747 QP of the marking instruction and a subsequent branch on the same QP. */
8750 clear_qp_branch_flag (mask
)
8754 for (i
= 0; i
< regdepslen
; i
++)
8756 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
8757 if ((bit
& mask
) != 0)
8759 regdeps
[i
].link_to_qp_branch
= 0;
8764 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8765 any mutexes which contain one of the PRs and create new ones when
8769 update_qp_mutex (valueT mask
)
8775 while (i
< qp_mutexeslen
)
8777 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8779 /* If it destroys and creates the same mutex, do nothing. */
8780 if (qp_mutexes
[i
].prmask
== mask
8781 && qp_mutexes
[i
].path
== md
.path
)
8792 fprintf (stderr
, " Clearing mutex relation");
8793 print_prmask (qp_mutexes
[i
].prmask
);
8794 fprintf (stderr
, "\n");
8797 /* Deal with the old mutex with more than 3+ PRs only if
8798 the new mutex on the same execution path with it.
8800 FIXME: The 3+ mutex support is incomplete.
8801 dot_pred_rel () may be a better place to fix it. */
8802 if (qp_mutexes
[i
].path
== md
.path
)
8804 /* If it is a proper subset of the mutex, create a
8807 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
8810 qp_mutexes
[i
].prmask
&= ~mask
;
8811 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
8813 /* Modify the mutex if there are more than one
8821 /* Remove the mutex. */
8822 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
8830 add_qp_mutex (mask
);
8835 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8837 Any changes to a PR clears the mutex relations which include that PR. */
8840 clear_qp_mutex (mask
)
8846 while (i
< qp_mutexeslen
)
8848 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
8852 fprintf (stderr
, " Clearing mutex relation");
8853 print_prmask (qp_mutexes
[i
].prmask
);
8854 fprintf (stderr
, "\n");
8856 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
8863 /* Clear implies relations which contain PRs in the given masks.
8864 P1_MASK indicates the source of the implies relation, while P2_MASK
8865 indicates the implied PR. */
8868 clear_qp_implies (p1_mask
, p2_mask
)
8875 while (i
< qp_implieslen
)
8877 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
8878 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
8881 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
8882 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
8883 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
8890 /* Add the PRs specified to the list of implied relations. */
8893 add_qp_imply (p1
, p2
)
8900 /* p0 is not meaningful here. */
8901 if (p1
== 0 || p2
== 0)
8907 /* If it exists already, ignore it. */
8908 for (i
= 0; i
< qp_implieslen
; i
++)
8910 if (qp_implies
[i
].p1
== p1
8911 && qp_implies
[i
].p2
== p2
8912 && qp_implies
[i
].path
== md
.path
8913 && !qp_implies
[i
].p2_branched
)
8917 if (qp_implieslen
== qp_impliestotlen
)
8919 qp_impliestotlen
+= 20;
8920 qp_implies
= (struct qp_imply
*)
8921 xrealloc ((void *) qp_implies
,
8922 qp_impliestotlen
* sizeof (struct qp_imply
));
8925 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
8926 qp_implies
[qp_implieslen
].p1
= p1
;
8927 qp_implies
[qp_implieslen
].p2
= p2
;
8928 qp_implies
[qp_implieslen
].path
= md
.path
;
8929 qp_implies
[qp_implieslen
++].p2_branched
= 0;
8931 /* Add in the implied transitive relations; for everything that p2 implies,
8932 make p1 imply that, too; for everything that implies p1, make it imply p2
8934 for (i
= 0; i
< qp_implieslen
; i
++)
8936 if (qp_implies
[i
].p1
== p2
)
8937 add_qp_imply (p1
, qp_implies
[i
].p2
);
8938 if (qp_implies
[i
].p2
== p1
)
8939 add_qp_imply (qp_implies
[i
].p1
, p2
);
8941 /* Add in mutex relations implied by this implies relation; for each mutex
8942 relation containing p2, duplicate it and replace p2 with p1. */
8943 bit
= (valueT
) 1 << p1
;
8944 mask
= (valueT
) 1 << p2
;
8945 for (i
= 0; i
< qp_mutexeslen
; i
++)
8947 if (qp_mutexes
[i
].prmask
& mask
)
8948 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
8952 /* Add the PRs specified in the mask to the mutex list; this means that only
8953 one of the PRs can be true at any time. PR0 should never be included in
8963 if (qp_mutexeslen
== qp_mutexestotlen
)
8965 qp_mutexestotlen
+= 20;
8966 qp_mutexes
= (struct qpmutex
*)
8967 xrealloc ((void *) qp_mutexes
,
8968 qp_mutexestotlen
* sizeof (struct qpmutex
));
8972 fprintf (stderr
, " Registering mutex on");
8973 print_prmask (mask
);
8974 fprintf (stderr
, "\n");
8976 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
8977 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
8981 has_suffix_p (name
, suffix
)
8985 size_t namelen
= strlen (name
);
8986 size_t sufflen
= strlen (suffix
);
8988 if (namelen
<= sufflen
)
8990 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
8994 clear_register_values ()
8998 fprintf (stderr
, " Clearing register values\n");
8999 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9000 gr_values
[i
].known
= 0;
9003 /* Keep track of register values/changes which affect DV tracking.
9005 optimization note: should add a flag to classes of insns where otherwise we
9006 have to examine a group of strings to identify them. */
9009 note_register_values (idesc
)
9010 struct ia64_opcode
*idesc
;
9012 valueT qp_changemask
= 0;
9015 /* Invalidate values for registers being written to. */
9016 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9018 if (idesc
->operands
[i
] == IA64_OPND_R1
9019 || idesc
->operands
[i
] == IA64_OPND_R2
9020 || idesc
->operands
[i
] == IA64_OPND_R3
)
9022 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9023 if (regno
> 0 && regno
< NELEMS (gr_values
))
9024 gr_values
[regno
].known
= 0;
9026 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9028 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9029 if (regno
> 0 && regno
< 4)
9030 gr_values
[regno
].known
= 0;
9032 else if (idesc
->operands
[i
] == IA64_OPND_P1
9033 || idesc
->operands
[i
] == IA64_OPND_P2
)
9035 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9036 qp_changemask
|= (valueT
) 1 << regno
;
9038 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9040 if (idesc
->operands
[2] & (valueT
) 0x10000)
9041 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9043 qp_changemask
= idesc
->operands
[2];
9046 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9048 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9049 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9051 qp_changemask
= idesc
->operands
[1];
9052 qp_changemask
&= ~(valueT
) 0xFFFF;
9057 /* Always clear qp branch flags on any PR change. */
9058 /* FIXME there may be exceptions for certain compares. */
9059 clear_qp_branch_flag (qp_changemask
);
9061 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9062 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9064 qp_changemask
|= ~(valueT
) 0xFFFF;
9065 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9067 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9068 gr_values
[i
].known
= 0;
9070 clear_qp_mutex (qp_changemask
);
9071 clear_qp_implies (qp_changemask
, qp_changemask
);
9073 /* After a call, all register values are undefined, except those marked
9075 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9076 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9078 /* FIXME keep GR values which are marked as "safe_across_calls" */
9079 clear_register_values ();
9080 clear_qp_mutex (~qp_safe_across_calls
);
9081 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9082 clear_qp_branch_flag (~qp_safe_across_calls
);
9084 else if (is_interruption_or_rfi (idesc
)
9085 || is_taken_branch (idesc
))
9087 clear_register_values ();
9088 clear_qp_mutex (~(valueT
) 0);
9089 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9091 /* Look for mutex and implies relations. */
9092 else if ((idesc
->operands
[0] == IA64_OPND_P1
9093 || idesc
->operands
[0] == IA64_OPND_P2
)
9094 && (idesc
->operands
[1] == IA64_OPND_P1
9095 || idesc
->operands
[1] == IA64_OPND_P2
))
9097 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9098 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9099 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9100 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9102 /* If both PRs are PR0, we can't really do anything. */
9103 if (p1
== 0 && p2
== 0)
9106 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9108 /* In general, clear mutexes and implies which include P1 or P2,
9109 with the following exceptions. */
9110 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9111 || has_suffix_p (idesc
->name
, ".and.orcm"))
9113 clear_qp_implies (p2mask
, p1mask
);
9115 else if (has_suffix_p (idesc
->name
, ".andcm")
9116 || has_suffix_p (idesc
->name
, ".and"))
9118 clear_qp_implies (0, p1mask
| p2mask
);
9120 else if (has_suffix_p (idesc
->name
, ".orcm")
9121 || has_suffix_p (idesc
->name
, ".or"))
9123 clear_qp_mutex (p1mask
| p2mask
);
9124 clear_qp_implies (p1mask
| p2mask
, 0);
9130 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9132 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9133 if (p1
== 0 || p2
== 0)
9134 clear_qp_mutex (p1mask
| p2mask
);
9136 added
= update_qp_mutex (p1mask
| p2mask
);
9138 if (CURR_SLOT
.qp_regno
== 0
9139 || has_suffix_p (idesc
->name
, ".unc"))
9141 if (added
== 0 && p1
&& p2
)
9142 add_qp_mutex (p1mask
| p2mask
);
9143 if (CURR_SLOT
.qp_regno
!= 0)
9146 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9148 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9153 /* Look for mov imm insns into GRs. */
9154 else if (idesc
->operands
[0] == IA64_OPND_R1
9155 && (idesc
->operands
[1] == IA64_OPND_IMM22
9156 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9157 && (strcmp (idesc
->name
, "mov") == 0
9158 || strcmp (idesc
->name
, "movl") == 0))
9160 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9161 if (regno
> 0 && regno
< NELEMS (gr_values
))
9163 gr_values
[regno
].known
= 1;
9164 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9165 gr_values
[regno
].path
= md
.path
;
9168 fprintf (stderr
, " Know gr%d = ", regno
);
9169 fprintf_vma (stderr
, gr_values
[regno
].value
);
9170 fputs ("\n", stderr
);
9176 clear_qp_mutex (qp_changemask
);
9177 clear_qp_implies (qp_changemask
, qp_changemask
);
9181 /* Return whether the given predicate registers are currently mutex. */
9184 qp_mutex (p1
, p2
, path
)
9194 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9195 for (i
= 0; i
< qp_mutexeslen
; i
++)
9197 if (qp_mutexes
[i
].path
>= path
9198 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9205 /* Return whether the given resource is in the given insn's list of chks
9206 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9210 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9212 struct ia64_opcode
*idesc
;
9217 struct rsrc specs
[MAX_SPECS
];
9220 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9221 we don't need to check. One exception is note 11, which indicates that
9222 target predicates are written regardless of PR[qp]. */
9223 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9227 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9230 /* UNAT checking is a bit more specific than other resources */
9231 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9232 && specs
[count
].mem_offset
.hint
9233 && rs
->mem_offset
.hint
)
9235 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9237 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9238 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9245 /* Skip apparent PR write conflicts where both writes are an AND or both
9246 writes are an OR. */
9247 if (rs
->dependency
->specifier
== IA64_RS_PR
9248 || rs
->dependency
->specifier
== IA64_RS_PRr
9249 || rs
->dependency
->specifier
== IA64_RS_PR63
)
9251 if (specs
[count
].cmp_type
!= CMP_NONE
9252 && specs
[count
].cmp_type
== rs
->cmp_type
)
9255 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
9256 dv_mode
[rs
->dependency
->mode
],
9257 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9258 specs
[count
].index
: 63);
9263 " %s on parallel compare conflict %s vs %s on PR%d\n",
9264 dv_mode
[rs
->dependency
->mode
],
9265 dv_cmp_type
[rs
->cmp_type
],
9266 dv_cmp_type
[specs
[count
].cmp_type
],
9267 rs
->dependency
->specifier
!= IA64_RS_PR63
?
9268 specs
[count
].index
: 63);
9272 /* If either resource is not specific, conservatively assume a conflict
9274 if (!specs
[count
].specific
|| !rs
->specific
)
9276 else if (specs
[count
].index
== rs
->index
)
9281 fprintf (stderr
, " No %s conflicts\n", rs
->dependency
->name
);
9287 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9288 insert a stop to create the break. Update all resource dependencies
9289 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9290 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9291 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9295 insn_group_break (insert_stop
, qp_regno
, save_current
)
9302 if (insert_stop
&& md
.num_slots_in_use
> 0)
9303 PREV_SLOT
.end_of_insn_group
= 1;
9307 fprintf (stderr
, " Insn group break%s",
9308 (insert_stop
? " (w/stop)" : ""));
9310 fprintf (stderr
, " effective for QP=%d", qp_regno
);
9311 fprintf (stderr
, "\n");
9315 while (i
< regdepslen
)
9317 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
9320 && regdeps
[i
].qp_regno
!= qp_regno
)
9327 && CURR_SLOT
.src_file
== regdeps
[i
].file
9328 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
9334 /* clear dependencies which are automatically cleared by a stop, or
9335 those that have reached the appropriate state of insn serialization */
9336 if (dep
->semantics
== IA64_DVS_IMPLIED
9337 || dep
->semantics
== IA64_DVS_IMPLIEDF
9338 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
9340 print_dependency ("Removing", i
);
9341 regdeps
[i
] = regdeps
[--regdepslen
];
9345 if (dep
->semantics
== IA64_DVS_DATA
9346 || dep
->semantics
== IA64_DVS_INSTR
9347 || dep
->semantics
== IA64_DVS_SPECIFIC
)
9349 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
9350 regdeps
[i
].insn_srlz
= STATE_STOP
;
9351 if (regdeps
[i
].data_srlz
== STATE_NONE
)
9352 regdeps
[i
].data_srlz
= STATE_STOP
;
9359 /* Add the given resource usage spec to the list of active dependencies. */
9362 mark_resource (idesc
, dep
, spec
, depind
, path
)
9363 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
9364 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
9369 if (regdepslen
== regdepstotlen
)
9371 regdepstotlen
+= 20;
9372 regdeps
= (struct rsrc
*)
9373 xrealloc ((void *) regdeps
,
9374 regdepstotlen
* sizeof (struct rsrc
));
9377 regdeps
[regdepslen
] = *spec
;
9378 regdeps
[regdepslen
].depind
= depind
;
9379 regdeps
[regdepslen
].path
= path
;
9380 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
9381 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
9383 print_dependency ("Adding", regdepslen
);
9389 print_dependency (action
, depind
)
9395 fprintf (stderr
, " %s %s '%s'",
9396 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
9397 (regdeps
[depind
].dependency
)->name
);
9398 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
!= 0)
9399 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
9400 if (regdeps
[depind
].mem_offset
.hint
)
9402 fputs (" ", stderr
);
9403 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
9404 fputs ("+", stderr
);
9405 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
9407 fprintf (stderr
, "\n");
9412 instruction_serialization ()
9416 fprintf (stderr
, " Instruction serialization\n");
9417 for (i
= 0; i
< regdepslen
; i
++)
9418 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
9419 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
9423 data_serialization ()
9427 fprintf (stderr
, " Data serialization\n");
9428 while (i
< regdepslen
)
9430 if (regdeps
[i
].data_srlz
== STATE_STOP
9431 /* Note: as of 991210, all "other" dependencies are cleared by a
9432 data serialization. This might change with new tables */
9433 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
9435 print_dependency ("Removing", i
);
9436 regdeps
[i
] = regdeps
[--regdepslen
];
9443 /* Insert stops and serializations as needed to avoid DVs. */
9446 remove_marked_resource (rs
)
9449 switch (rs
->dependency
->semantics
)
9451 case IA64_DVS_SPECIFIC
:
9453 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
9454 /* ...fall through... */
9455 case IA64_DVS_INSTR
:
9457 fprintf (stderr
, "Inserting instr serialization\n");
9458 if (rs
->insn_srlz
< STATE_STOP
)
9459 insn_group_break (1, 0, 0);
9460 if (rs
->insn_srlz
< STATE_SRLZ
)
9462 int oldqp
= CURR_SLOT
.qp_regno
;
9463 struct ia64_opcode
*oldidesc
= CURR_SLOT
.idesc
;
9464 /* Manually jam a srlz.i insn into the stream */
9465 CURR_SLOT
.qp_regno
= 0;
9466 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
9467 instruction_serialization ();
9468 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9469 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9471 CURR_SLOT
.qp_regno
= oldqp
;
9472 CURR_SLOT
.idesc
= oldidesc
;
9474 insn_group_break (1, 0, 0);
9476 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
9477 "other" types of DV are eliminated
9478 by a data serialization */
9481 fprintf (stderr
, "Inserting data serialization\n");
9482 if (rs
->data_srlz
< STATE_STOP
)
9483 insn_group_break (1, 0, 0);
9485 int oldqp
= CURR_SLOT
.qp_regno
;
9486 struct ia64_opcode
*oldidesc
= CURR_SLOT
.idesc
;
9487 /* Manually jam a srlz.d insn into the stream */
9488 CURR_SLOT
.qp_regno
= 0;
9489 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
9490 data_serialization ();
9491 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9492 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9494 CURR_SLOT
.qp_regno
= oldqp
;
9495 CURR_SLOT
.idesc
= oldidesc
;
9498 case IA64_DVS_IMPLIED
:
9499 case IA64_DVS_IMPLIEDF
:
9501 fprintf (stderr
, "Inserting stop\n");
9502 insn_group_break (1, 0, 0);
9509 /* Check the resources used by the given opcode against the current dependency
9512 The check is run once for each execution path encountered. In this case,
9513 a unique execution path is the sequence of instructions following a code
9514 entry point, e.g. the following has three execution paths, one starting
9515 at L0, one at L1, and one at L2.
9524 check_dependencies (idesc
)
9525 struct ia64_opcode
*idesc
;
9527 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9531 /* Note that the number of marked resources may change within the
9532 loop if in auto mode. */
9534 while (i
< regdepslen
)
9536 struct rsrc
*rs
= ®deps
[i
];
9537 const struct ia64_dependency
*dep
= rs
->dependency
;
9542 if (dep
->semantics
== IA64_DVS_NONE
9543 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
9549 note
= NOTE (opdeps
->chks
[chkind
]);
9551 /* Check this resource against each execution path seen thus far. */
9552 for (path
= 0; path
<= md
.path
; path
++)
9556 /* If the dependency wasn't on the path being checked, ignore it. */
9557 if (rs
->path
< path
)
9560 /* If the QP for this insn implies a QP which has branched, don't
9561 bother checking. Ed. NOTE: I don't think this check is terribly
9562 useful; what's the point of generating code which will only be
9563 reached if its QP is zero?
9564 This code was specifically inserted to handle the following code,
9565 based on notes from Intel's DV checking code, where p1 implies p2.
9571 if (CURR_SLOT
.qp_regno
!= 0)
9575 for (implies
= 0; implies
< qp_implieslen
; implies
++)
9577 if (qp_implies
[implies
].path
>= path
9578 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
9579 && qp_implies
[implies
].p2_branched
)
9589 if ((matchtype
= resources_match (rs
, idesc
, note
,
9590 CURR_SLOT
.qp_regno
, path
)) != 0)
9593 char pathmsg
[256] = "";
9594 char indexmsg
[256] = "";
9595 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
9598 sprintf (pathmsg
, " when entry is at label '%s'",
9599 md
.entry_labels
[path
- 1]);
9600 if (rs
->specific
&& rs
->index
!= 0)
9601 sprintf (indexmsg
, ", specific resource number is %d",
9603 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9605 (certain
? "violates" : "may violate"),
9606 dv_mode
[dep
->mode
], dep
->name
,
9607 dv_sem
[dep
->semantics
],
9610 if (md
.explicit_mode
)
9612 as_warn ("%s", msg
);
9614 as_warn (_("Only the first path encountering the conflict "
9616 as_warn_where (rs
->file
, rs
->line
,
9617 _("This is the location of the "
9618 "conflicting usage"));
9619 /* Don't bother checking other paths, to avoid duplicating
9626 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
9628 remove_marked_resource (rs
);
9630 /* since the set of dependencies has changed, start over */
9631 /* FIXME -- since we're removing dvs as we go, we
9632 probably don't really need to start over... */
9645 /* Register new dependencies based on the given opcode. */
9648 mark_resources (idesc
)
9649 struct ia64_opcode
*idesc
;
9652 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
9653 int add_only_qp_reads
= 0;
9655 /* A conditional branch only uses its resources if it is taken; if it is
9656 taken, we stop following that path. The other branch types effectively
9657 *always* write their resources. If it's not taken, register only QP
9659 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
9661 add_only_qp_reads
= 1;
9665 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
9667 for (i
= 0; i
< opdeps
->nregs
; i
++)
9669 const struct ia64_dependency
*dep
;
9670 struct rsrc specs
[MAX_SPECS
];
9675 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
9676 note
= NOTE (opdeps
->regs
[i
]);
9678 if (add_only_qp_reads
9679 && !(dep
->mode
== IA64_DV_WAR
9680 && (dep
->specifier
== IA64_RS_PR
9681 || dep
->specifier
== IA64_RS_PRr
9682 || dep
->specifier
== IA64_RS_PR63
)))
9685 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
9688 if (md
.debug_dv
&& !count
)
9689 fprintf (stderr
, " No %s %s usage found (path %d)\n",
9690 dv_mode
[dep
->mode
], dep
->name
, md
.path
);
9695 mark_resource (idesc
, dep
, &specs
[count
],
9696 DEP (opdeps
->regs
[i
]), md
.path
);
9699 /* The execution path may affect register values, which may in turn
9700 affect which indirect-access resources are accessed. */
9701 switch (dep
->specifier
)
9713 for (path
= 0; path
< md
.path
; path
++)
9715 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
9717 mark_resource (idesc
, dep
, &specs
[count
],
9718 DEP (opdeps
->regs
[i
]), path
);
9725 /* Remove dependencies when they no longer apply. */
9728 update_dependencies (idesc
)
9729 struct ia64_opcode
*idesc
;
9733 if (strcmp (idesc
->name
, "srlz.i") == 0)
9735 instruction_serialization ();
9737 else if (strcmp (idesc
->name
, "srlz.d") == 0)
9739 data_serialization ();
9741 else if (is_interruption_or_rfi (idesc
)
9742 || is_taken_branch (idesc
))
9744 /* Although technically the taken branch doesn't clear dependencies
9745 which require a srlz.[id], we don't follow the branch; the next
9746 instruction is assumed to start with a clean slate. */
9750 else if (is_conditional_branch (idesc
)
9751 && CURR_SLOT
.qp_regno
!= 0)
9753 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
9755 for (i
= 0; i
< qp_implieslen
; i
++)
9757 /* If the conditional branch's predicate is implied by the predicate
9758 in an existing dependency, remove that dependency. */
9759 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
9762 /* Note that this implied predicate takes a branch so that if
9763 a later insn generates a DV but its predicate implies this
9764 one, we can avoid the false DV warning. */
9765 qp_implies
[i
].p2_branched
= 1;
9766 while (depind
< regdepslen
)
9768 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
9770 print_dependency ("Removing", depind
);
9771 regdeps
[depind
] = regdeps
[--regdepslen
];
9778 /* Any marked resources which have this same predicate should be
9779 cleared, provided that the QP hasn't been modified between the
9780 marking instruction and the branch. */
9783 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
9788 while (i
< regdepslen
)
9790 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
9791 && regdeps
[i
].link_to_qp_branch
9792 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
9793 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
9795 /* Treat like a taken branch */
9796 print_dependency ("Removing", i
);
9797 regdeps
[i
] = regdeps
[--regdepslen
];
9806 /* Examine the current instruction for dependency violations. */
9810 struct ia64_opcode
*idesc
;
9814 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
9815 idesc
->name
, CURR_SLOT
.src_line
,
9816 idesc
->dependencies
->nchks
,
9817 idesc
->dependencies
->nregs
);
9820 /* Look through the list of currently marked resources; if the current
9821 instruction has the dependency in its chks list which uses that resource,
9822 check against the specific resources used. */
9823 check_dependencies (idesc
);
9825 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9826 then add them to the list of marked resources. */
9827 mark_resources (idesc
);
9829 /* There are several types of dependency semantics, and each has its own
9830 requirements for being cleared
9832 Instruction serialization (insns separated by interruption, rfi, or
9833 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9835 Data serialization (instruction serialization, or writer + srlz.d +
9836 reader, where writer and srlz.d are in separate groups) clears
9837 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9838 always be the case).
9840 Instruction group break (groups separated by stop, taken branch,
9841 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9843 update_dependencies (idesc
);
9845 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9846 warning. Keep track of as many as possible that are useful. */
9847 note_register_values (idesc
);
9849 /* We don't need or want this anymore. */
9850 md
.mem_offset
.hint
= 0;
9855 /* Translate one line of assembly. Pseudo ops and labels do not show
9861 char *saved_input_line_pointer
, *mnemonic
;
9862 const struct pseudo_opcode
*pdesc
;
9863 struct ia64_opcode
*idesc
;
9864 unsigned char qp_regno
;
9868 saved_input_line_pointer
= input_line_pointer
;
9869 input_line_pointer
= str
;
9871 /* extract the opcode (mnemonic): */
9873 mnemonic
= input_line_pointer
;
9874 ch
= get_symbol_end ();
9875 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
9878 *input_line_pointer
= ch
;
9879 (*pdesc
->handler
) (pdesc
->arg
);
9883 /* Find the instruction descriptor matching the arguments. */
9885 idesc
= ia64_find_opcode (mnemonic
);
9886 *input_line_pointer
= ch
;
9889 as_bad ("Unknown opcode `%s'", mnemonic
);
9893 idesc
= parse_operands (idesc
);
9897 /* Handle the dynamic ops we can handle now: */
9898 if (idesc
->type
== IA64_TYPE_DYN
)
9900 if (strcmp (idesc
->name
, "add") == 0)
9902 if (CURR_SLOT
.opnd
[2].X_op
== O_register
9903 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
9907 ia64_free_opcode (idesc
);
9908 idesc
= ia64_find_opcode (mnemonic
);
9910 know (!idesc
->next
);
9913 else if (strcmp (idesc
->name
, "mov") == 0)
9915 enum ia64_opnd opnd1
, opnd2
;
9918 opnd1
= idesc
->operands
[0];
9919 opnd2
= idesc
->operands
[1];
9920 if (opnd1
== IA64_OPND_AR3
)
9922 else if (opnd2
== IA64_OPND_AR3
)
9926 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
9927 && ar_is_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
9931 ia64_free_opcode (idesc
);
9932 idesc
= ia64_find_opcode (mnemonic
);
9933 while (idesc
!= NULL
9934 && (idesc
->operands
[0] != opnd1
9935 || idesc
->operands
[1] != opnd2
))
9936 idesc
= get_next_opcode (idesc
);
9941 if (md
.qp
.X_op
== O_register
)
9943 qp_regno
= md
.qp
.X_add_number
- REG_P
;
9944 md
.qp
.X_op
= O_absent
;
9947 flags
= idesc
->flags
;
9949 if ((flags
& IA64_OPCODE_FIRST
) != 0)
9950 insn_group_break (1, 0, 0);
9952 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
9954 as_bad ("`%s' cannot be predicated", idesc
->name
);
9958 /* Build the instruction. */
9959 CURR_SLOT
.qp_regno
= qp_regno
;
9960 CURR_SLOT
.idesc
= idesc
;
9961 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
9962 dwarf2_where (&CURR_SLOT
.debug_line
);
9964 /* Add unwind entry, if there is one. */
9965 if (unwind
.current_entry
)
9967 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
9968 unwind
.current_entry
= NULL
;
9971 /* Check for dependency violations. */
9975 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
9976 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
9979 if ((flags
& IA64_OPCODE_LAST
) != 0)
9980 insn_group_break (1, 0, 0);
9982 md
.last_text_seg
= now_seg
;
9985 input_line_pointer
= saved_input_line_pointer
;
9988 /* Called when symbol NAME cannot be found in the symbol table.
9989 Should be used for dynamic valued symbols only. */
9992 md_undefined_symbol (name
)
9993 char *name ATTRIBUTE_UNUSED
;
9998 /* Called for any expression that can not be recognized. When the
9999 function is called, `input_line_pointer' will point to the start of
10006 enum pseudo_type pseudo_type
;
10011 switch (*input_line_pointer
)
10014 /* Find what relocation pseudo-function we're dealing with. */
10016 ch
= *++input_line_pointer
;
10017 for (i
= 0; i
< NELEMS (pseudo_func
); ++i
)
10018 if (pseudo_func
[i
].name
&& pseudo_func
[i
].name
[0] == ch
)
10020 len
= strlen (pseudo_func
[i
].name
);
10021 if (strncmp (pseudo_func
[i
].name
+ 1,
10022 input_line_pointer
+ 1, len
- 1) == 0
10023 && !is_part_of_name (input_line_pointer
[len
]))
10025 input_line_pointer
+= len
;
10026 pseudo_type
= pseudo_func
[i
].type
;
10030 switch (pseudo_type
)
10032 case PSEUDO_FUNC_RELOC
:
10033 SKIP_WHITESPACE ();
10034 if (*input_line_pointer
!= '(')
10036 as_bad ("Expected '('");
10040 ++input_line_pointer
;
10042 if (*input_line_pointer
++ != ')')
10044 as_bad ("Missing ')'");
10047 if (e
->X_op
!= O_symbol
)
10049 if (e
->X_op
!= O_pseudo_fixup
)
10051 as_bad ("Not a symbolic expression");
10054 if (i
!= FUNC_LT_RELATIVE
)
10056 as_bad ("Illegal combination of relocation functions");
10059 switch (S_GET_VALUE (e
->X_op_symbol
))
10061 case FUNC_FPTR_RELATIVE
:
10062 i
= FUNC_LT_FPTR_RELATIVE
; break;
10063 case FUNC_DTP_MODULE
:
10064 i
= FUNC_LT_DTP_MODULE
; break;
10065 case FUNC_DTP_RELATIVE
:
10066 i
= FUNC_LT_DTP_RELATIVE
; break;
10067 case FUNC_TP_RELATIVE
:
10068 i
= FUNC_LT_TP_RELATIVE
; break;
10070 as_bad ("Illegal combination of relocation functions");
10074 /* Make sure gas doesn't get rid of local symbols that are used
10076 e
->X_op
= O_pseudo_fixup
;
10077 e
->X_op_symbol
= pseudo_func
[i
].u
.sym
;
10080 case PSEUDO_FUNC_CONST
:
10081 e
->X_op
= O_constant
;
10082 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10085 case PSEUDO_FUNC_REG
:
10086 e
->X_op
= O_register
;
10087 e
->X_add_number
= pseudo_func
[i
].u
.ival
;
10091 name
= input_line_pointer
- 1;
10093 as_bad ("Unknown pseudo function `%s'", name
);
10099 ++input_line_pointer
;
10101 if (*input_line_pointer
!= ']')
10103 as_bad ("Closing bracket misssing");
10108 if (e
->X_op
!= O_register
)
10109 as_bad ("Register expected as index");
10111 ++input_line_pointer
;
10122 ignore_rest_of_line ();
10125 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10126 a section symbol plus some offset. For relocs involving @fptr(),
10127 directives we don't want such adjustments since we need to have the
10128 original symbol's name in the reloc. */
10130 ia64_fix_adjustable (fix
)
10133 /* Prevent all adjustments to global symbols */
10134 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10137 switch (fix
->fx_r_type
)
10139 case BFD_RELOC_IA64_FPTR64I
:
10140 case BFD_RELOC_IA64_FPTR32MSB
:
10141 case BFD_RELOC_IA64_FPTR32LSB
:
10142 case BFD_RELOC_IA64_FPTR64MSB
:
10143 case BFD_RELOC_IA64_FPTR64LSB
:
10144 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10145 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10155 ia64_force_relocation (fix
)
10158 switch (fix
->fx_r_type
)
10160 case BFD_RELOC_IA64_FPTR64I
:
10161 case BFD_RELOC_IA64_FPTR32MSB
:
10162 case BFD_RELOC_IA64_FPTR32LSB
:
10163 case BFD_RELOC_IA64_FPTR64MSB
:
10164 case BFD_RELOC_IA64_FPTR64LSB
:
10166 case BFD_RELOC_IA64_LTOFF22
:
10167 case BFD_RELOC_IA64_LTOFF64I
:
10168 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10169 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10170 case BFD_RELOC_IA64_PLTOFF22
:
10171 case BFD_RELOC_IA64_PLTOFF64I
:
10172 case BFD_RELOC_IA64_PLTOFF64MSB
:
10173 case BFD_RELOC_IA64_PLTOFF64LSB
:
10175 case BFD_RELOC_IA64_LTOFF22X
:
10176 case BFD_RELOC_IA64_LDXMOV
:
10183 return generic_force_reloc (fix
);
10186 /* Decide from what point a pc-relative relocation is relative to,
10187 relative to the pc-relative fixup. Er, relatively speaking. */
10189 ia64_pcrel_from_section (fix
, sec
)
10193 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10195 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10202 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10204 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10208 expr
.X_op
= O_pseudo_fixup
;
10209 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10210 expr
.X_add_number
= 0;
10211 expr
.X_add_symbol
= symbol
;
10212 emit_expr (&expr
, size
);
10215 /* This is called whenever some data item (not an instruction) needs a
10216 fixup. We pick the right reloc code depending on the byteorder
10217 currently in effect. */
10219 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10225 bfd_reloc_code_real_type code
;
10230 /* There are no reloc for 8 and 16 bit quantities, but we allow
10231 them here since they will work fine as long as the expression
10232 is fully defined at the end of the pass over the source file. */
10233 case 1: code
= BFD_RELOC_8
; break;
10234 case 2: code
= BFD_RELOC_16
; break;
10236 if (target_big_endian
)
10237 code
= BFD_RELOC_IA64_DIR32MSB
;
10239 code
= BFD_RELOC_IA64_DIR32LSB
;
10243 /* In 32-bit mode, data8 could mean function descriptors too. */
10244 if (exp
->X_op
== O_pseudo_fixup
10245 && exp
->X_op_symbol
10246 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10247 && !(md
.flags
& EF_IA_64_ABI64
))
10249 if (target_big_endian
)
10250 code
= BFD_RELOC_IA64_IPLTMSB
;
10252 code
= BFD_RELOC_IA64_IPLTLSB
;
10253 exp
->X_op
= O_symbol
;
10258 if (target_big_endian
)
10259 code
= BFD_RELOC_IA64_DIR64MSB
;
10261 code
= BFD_RELOC_IA64_DIR64LSB
;
10266 if (exp
->X_op
== O_pseudo_fixup
10267 && exp
->X_op_symbol
10268 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10270 if (target_big_endian
)
10271 code
= BFD_RELOC_IA64_IPLTMSB
;
10273 code
= BFD_RELOC_IA64_IPLTLSB
;
10274 exp
->X_op
= O_symbol
;
10280 as_bad ("Unsupported fixup size %d", nbytes
);
10281 ignore_rest_of_line ();
10285 if (exp
->X_op
== O_pseudo_fixup
)
10287 exp
->X_op
= O_symbol
;
10288 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
10289 /* ??? If code unchanged, unsupported. */
10292 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
10293 /* We need to store the byte order in effect in case we're going
10294 to fix an 8 or 16 bit relocation (for which there no real
10295 relocs available). See md_apply_fix3(). */
10296 fix
->tc_fix_data
.bigendian
= target_big_endian
;
10299 /* Return the actual relocation we wish to associate with the pseudo
10300 reloc described by SYM and R_TYPE. SYM should be one of the
10301 symbols in the pseudo_func array, or NULL. */
10303 static bfd_reloc_code_real_type
10304 ia64_gen_real_reloc_type (sym
, r_type
)
10305 struct symbol
*sym
;
10306 bfd_reloc_code_real_type r_type
;
10308 bfd_reloc_code_real_type
new = 0;
10315 switch (S_GET_VALUE (sym
))
10317 case FUNC_FPTR_RELATIVE
:
10320 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
10321 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
10322 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
10323 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
10324 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
10329 case FUNC_GP_RELATIVE
:
10332 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
10333 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
10334 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
10335 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
10336 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
10337 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
10342 case FUNC_LT_RELATIVE
:
10345 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
10346 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
10351 case FUNC_LT_RELATIVE_X
:
10354 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
10359 case FUNC_PC_RELATIVE
:
10362 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
10363 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
10364 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
10365 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
10366 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
10367 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
10372 case FUNC_PLT_RELATIVE
:
10375 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
10376 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
10377 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
10378 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
10383 case FUNC_SEC_RELATIVE
:
10386 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
10387 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
10388 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
10389 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
10394 case FUNC_SEG_RELATIVE
:
10397 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
10398 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
10399 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
10400 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
10405 case FUNC_LTV_RELATIVE
:
10408 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
10409 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
10410 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
10411 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
10416 case FUNC_LT_FPTR_RELATIVE
:
10419 case BFD_RELOC_IA64_IMM22
:
10420 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
10421 case BFD_RELOC_IA64_IMM64
:
10422 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
10428 case FUNC_TP_RELATIVE
:
10431 case BFD_RELOC_IA64_IMM14
:
10432 new = BFD_RELOC_IA64_TPREL14
; break;
10433 case BFD_RELOC_IA64_IMM22
:
10434 new = BFD_RELOC_IA64_TPREL22
; break;
10435 case BFD_RELOC_IA64_IMM64
:
10436 new = BFD_RELOC_IA64_TPREL64I
; break;
10442 case FUNC_LT_TP_RELATIVE
:
10445 case BFD_RELOC_IA64_IMM22
:
10446 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
10452 case FUNC_LT_DTP_MODULE
:
10455 case BFD_RELOC_IA64_IMM22
:
10456 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
10462 case FUNC_DTP_RELATIVE
:
10465 case BFD_RELOC_IA64_DIR64MSB
:
10466 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
10467 case BFD_RELOC_IA64_DIR64LSB
:
10468 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
10469 case BFD_RELOC_IA64_IMM14
:
10470 new = BFD_RELOC_IA64_DTPREL14
; break;
10471 case BFD_RELOC_IA64_IMM22
:
10472 new = BFD_RELOC_IA64_DTPREL22
; break;
10473 case BFD_RELOC_IA64_IMM64
:
10474 new = BFD_RELOC_IA64_DTPREL64I
; break;
10480 case FUNC_LT_DTP_RELATIVE
:
10483 case BFD_RELOC_IA64_IMM22
:
10484 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
10490 case FUNC_IPLT_RELOC
:
10497 /* Hmmmm. Should this ever occur? */
10504 /* Here is where generate the appropriate reloc for pseudo relocation
10507 ia64_validate_fix (fix
)
10510 switch (fix
->fx_r_type
)
10512 case BFD_RELOC_IA64_FPTR64I
:
10513 case BFD_RELOC_IA64_FPTR32MSB
:
10514 case BFD_RELOC_IA64_FPTR64LSB
:
10515 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10516 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10517 if (fix
->fx_offset
!= 0)
10518 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10519 "No addend allowed in @fptr() relocation");
10527 fix_insn (fix
, odesc
, value
)
10529 const struct ia64_operand
*odesc
;
10532 bfd_vma insn
[3], t0
, t1
, control_bits
;
10537 slot
= fix
->fx_where
& 0x3;
10538 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
10540 /* Bundles are always in little-endian byte order */
10541 t0
= bfd_getl64 (fixpos
);
10542 t1
= bfd_getl64 (fixpos
+ 8);
10543 control_bits
= t0
& 0x1f;
10544 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
10545 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
10546 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
10549 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
10551 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
10552 insn
[2] |= (((value
& 0x7f) << 13)
10553 | (((value
>> 7) & 0x1ff) << 27)
10554 | (((value
>> 16) & 0x1f) << 22)
10555 | (((value
>> 21) & 0x1) << 21)
10556 | (((value
>> 63) & 0x1) << 36));
10558 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
10560 if (value
& ~0x3fffffffffffffffULL
)
10561 err
= "integer operand out of range";
10562 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
10563 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
10565 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
10568 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
10569 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
10570 | (((value
>> 0) & 0xfffff) << 13));
10573 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
10576 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
10578 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
10579 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
10580 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
10581 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
10584 /* Attempt to simplify or even eliminate a fixup. The return value is
10585 ignored; perhaps it was once meaningful, but now it is historical.
10586 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10588 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10592 md_apply_fix3 (fix
, valP
, seg
)
10595 segT seg ATTRIBUTE_UNUSED
;
10598 valueT value
= *valP
;
10600 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
10604 switch (fix
->fx_r_type
)
10606 case BFD_RELOC_IA64_DIR32MSB
:
10607 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32MSB
;
10610 case BFD_RELOC_IA64_DIR32LSB
:
10611 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL32LSB
;
10614 case BFD_RELOC_IA64_DIR64MSB
:
10615 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64MSB
;
10618 case BFD_RELOC_IA64_DIR64LSB
:
10619 fix
->fx_r_type
= BFD_RELOC_IA64_PCREL64LSB
;
10628 switch (fix
->fx_r_type
)
10630 case BFD_RELOC_UNUSED
:
10631 /* This must be a TAG13 or TAG13b operand. There are no external
10632 relocs defined for them, so we must give an error. */
10633 as_bad_where (fix
->fx_file
, fix
->fx_line
,
10634 "%s must have a constant value",
10635 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
10639 case BFD_RELOC_IA64_TPREL14
:
10640 case BFD_RELOC_IA64_TPREL22
:
10641 case BFD_RELOC_IA64_TPREL64I
:
10642 case BFD_RELOC_IA64_LTOFF_TPREL22
:
10643 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
10644 case BFD_RELOC_IA64_DTPREL14
:
10645 case BFD_RELOC_IA64_DTPREL22
:
10646 case BFD_RELOC_IA64_DTPREL64I
:
10647 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
10648 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
10655 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
10657 if (fix
->tc_fix_data
.bigendian
)
10658 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
10660 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
10665 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
10670 /* Generate the BFD reloc to be stuck in the object file from the
10671 fixup used internally in the assembler. */
10674 tc_gen_reloc (sec
, fixp
)
10675 asection
*sec ATTRIBUTE_UNUSED
;
10680 reloc
= xmalloc (sizeof (*reloc
));
10681 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
10682 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
10683 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
10684 reloc
->addend
= fixp
->fx_offset
;
10685 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
10689 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
10690 "Cannot represent %s relocation in object file",
10691 bfd_get_reloc_code_name (fixp
->fx_r_type
));
10696 /* Turn a string in input_line_pointer into a floating point constant
10697 of type TYPE, and store the appropriate bytes in *LIT. The number
10698 of LITTLENUMS emitted is stored in *SIZE. An error message is
10699 returned, or NULL on OK. */
10701 #define MAX_LITTLENUMS 5
10704 md_atof (type
, lit
, size
)
10709 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
10739 return "Bad call to MD_ATOF()";
10741 t
= atof_ieee (input_line_pointer
, type
, words
);
10743 input_line_pointer
= t
;
10745 (*ia64_float_to_chars
) (lit
, words
, prec
);
10749 /* It is 10 byte floating point with 6 byte padding. */
10750 memset (&lit
[10], 0, 6);
10751 *size
= 8 * sizeof (LITTLENUM_TYPE
);
10754 *size
= prec
* sizeof (LITTLENUM_TYPE
);
10759 /* Handle ia64 specific semantics of the align directive. */
10762 ia64_md_do_align (n
, fill
, len
, max
)
10763 int n ATTRIBUTE_UNUSED
;
10764 const char *fill ATTRIBUTE_UNUSED
;
10765 int len ATTRIBUTE_UNUSED
;
10766 int max ATTRIBUTE_UNUSED
;
10768 if (subseg_text_p (now_seg
))
10769 ia64_flush_insns ();
10772 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10773 of an rs_align_code fragment. */
10776 ia64_handle_align (fragp
)
10779 /* Use mfi bundle of nops with no stop bits. */
10780 static const unsigned char le_nop
[]
10781 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10782 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10787 if (fragp
->fr_type
!= rs_align_code
)
10790 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
10791 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
10793 /* Make sure we are on a 16-byte boundary, in case someone has been
10794 putting data into a text section. */
10797 int fix
= bytes
& 15;
10798 memset (p
, 0, fix
);
10801 fragp
->fr_fix
+= fix
;
10804 /* Instruction bundles are always little-endian. */
10805 memcpy (p
, le_nop
, 16);
10806 fragp
->fr_var
= 16;
10810 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
10815 number_to_chars_bigendian (lit
, (long) (*words
++),
10816 sizeof (LITTLENUM_TYPE
));
10817 lit
+= sizeof (LITTLENUM_TYPE
);
10822 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
10827 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
10828 sizeof (LITTLENUM_TYPE
));
10829 lit
+= sizeof (LITTLENUM_TYPE
);
10834 ia64_elf_section_change_hook (void)
10836 dot_byteorder (-1);
10839 /* Check if a label should be made global. */
10841 ia64_check_label (symbolS
*label
)
10843 if (*input_line_pointer
== ':')
10845 S_SET_EXTERNAL (label
);
10846 input_line_pointer
++;
10850 /* Used to remember where .alias and .secalias directives are seen. We
10851 will rename symbol and section names when we are about to output
10852 the relocatable file. */
10855 char *file
; /* The file where the directive is seen. */
10856 unsigned int line
; /* The line number the directive is at. */
10857 const char *name
; /* The orignale name of the symbol. */
10860 /* Called for .alias and .secalias directives. If SECTION is 1, it is
10861 .secalias. Otherwise, it is .alias. */
10863 dot_alias (int section
)
10865 char *name
, *alias
;
10869 const char *error_string
;
10872 struct hash_control
*ahash
, *nhash
;
10875 name
= input_line_pointer
;
10876 delim
= get_symbol_end ();
10877 end_name
= input_line_pointer
;
10880 if (name
== end_name
)
10882 as_bad (_("expected symbol name"));
10883 discard_rest_of_line ();
10887 SKIP_WHITESPACE ();
10889 if (*input_line_pointer
!= ',')
10892 as_bad (_("expected comma after \"%s\""), name
);
10894 ignore_rest_of_line ();
10898 input_line_pointer
++;
10901 /* We call demand_copy_C_string to check if alias string is valid.
10902 There should be a closing `"' and no `\0' in the string. */
10903 alias
= demand_copy_C_string (&len
);
10906 ignore_rest_of_line ();
10910 /* Make a copy of name string. */
10911 len
= strlen (name
) + 1;
10912 obstack_grow (¬es
, name
, len
);
10913 name
= obstack_finish (¬es
);
10918 ahash
= secalias_hash
;
10919 nhash
= secalias_name_hash
;
10924 ahash
= alias_hash
;
10925 nhash
= alias_name_hash
;
10928 /* Check if alias has been used before. */
10929 h
= (struct alias
*) hash_find (ahash
, alias
);
10932 if (strcmp (h
->name
, name
))
10933 as_bad (_("`%s' is already the alias of %s `%s'"),
10934 alias
, kind
, h
->name
);
10938 /* Check if name already has an alias. */
10939 a
= (const char *) hash_find (nhash
, name
);
10942 if (strcmp (a
, alias
))
10943 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
10947 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
10948 as_where (&h
->file
, &h
->line
);
10951 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
10954 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
10955 alias
, kind
, error_string
);
10959 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
10962 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
10963 alias
, kind
, error_string
);
10965 obstack_free (¬es
, name
);
10966 obstack_free (¬es
, alias
);
10969 demand_empty_rest_of_line ();
10972 /* It renames the original symbol name to its alias. */
10974 do_alias (const char *alias
, PTR value
)
10976 struct alias
*h
= (struct alias
*) value
;
10977 symbolS
*sym
= symbol_find (h
->name
);
10980 as_warn_where (h
->file
, h
->line
,
10981 _("symbol `%s' aliased to `%s' is not used"),
10984 S_SET_NAME (sym
, (char *) alias
);
10987 /* Called from write_object_file. */
10989 ia64_adjust_symtab (void)
10991 hash_traverse (alias_hash
, do_alias
);
10994 /* It renames the original section name to its alias. */
10996 do_secalias (const char *alias
, PTR value
)
10998 struct alias
*h
= (struct alias
*) value
;
10999 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11002 as_warn_where (h
->file
, h
->line
,
11003 _("section `%s' aliased to `%s' is not used"),
11009 /* Called from write_object_file. */
11011 ia64_frob_file (void)
11013 hash_traverse (secalias_hash
, do_secalias
);