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[deliverable/binutils-gdb.git] / gas / config / tc-m68k.c
1 /* tc-m68k.c All the m68020 specific stuff in one convenient, huge,
2 slow to compile, easy to find file.
3
4 Copyright (C) 1987, 1991, 1992 Free Software Foundation, Inc.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21
22 #include <ctype.h>
23 #define NO_RELOC 0
24 #include "as.h"
25
26 #include "obstack.h"
27
28 /* note that this file includes real declarations and thus can only be included by one source file per executable. */
29 #include "opcode/m68k.h"
30 #ifdef TE_SUN
31 /* This variable contains the value to write out at the beginning of
32 the a.out file. The 2<<16 means that this is a 68020 file instead
33 of an old-style 68000 file */
34
35 long omagic = 2<<16|OMAGIC; /* Magic byte for header file */
36 #else
37 long omagic = OMAGIC;
38 #endif
39
40 /* This array holds the chars that always start a comment. If the
41 pre-processor is disabled, these aren't very useful */
42 const char comment_chars[] = "|";
43
44 /* This array holds the chars that only start a comment at the beginning of
45 a line. If the line seems to have the form '# 123 filename'
46 .line and .file directives will appear in the pre-processed output */
47 /* Note that input_file.c hand checks for '#' at the beginning of the
48 first line of the input file. This is because the compiler outputs
49 #NO_APP at the beginning of its output. */
50 /* Also note that comments like this one will always work. */
51 const char line_comment_chars[] = "#";
52
53 /* Chars that can be used to separate mant from exp in floating point nums */
54 const char EXP_CHARS[] = "eE";
55
56 /* Chars that mean this number is a floating point constant */
57 /* As in 0f12.456 */
58 /* or 0d1.2345e12 */
59
60 const char FLT_CHARS[] = "rRsSfFdDxXeEpP";
61
62 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
63 changed in read.c . Ideally it shouldn't have to know about it at all,
64 but nothing is ideal around here.
65 */
66
67 int md_reloc_size = 8; /* Size of relocation record */
68
69 /* Its an arbitrary name: This means I don't approve of it */
70 /* See flames below */
71 static struct obstack robyn;
72
73 #define TAB(x,y) (((x)<<2)+(y))
74 #define TABTYPE(xy) ((xy) >> 2)
75 #define BYTE 0
76 #define SHORT 1
77 #define LONG 2
78 #define SZ_UNDEF 3
79
80 #define BRANCH 1
81 #define FBRANCH 2
82 #define PCREL 3
83 #define BCC68000 4
84 #define DBCC 5
85 #define PCLEA 6
86
87 /* Operands we can parse: (And associated modes)
88
89 numb: 8 bit num
90 numw: 16 bit num
91 numl: 32 bit num
92 dreg: data reg 0-7
93 reg: address or data register
94 areg: address register
95 apc: address register, PC, ZPC or empty string
96 num: 16 or 32 bit num
97 num2: like num
98 sz: w or l if omitted, l assumed
99 scale: 1 2 4 or 8 if omitted, 1 assumed
100
101 7.4 IMMED #num --> NUM
102 0.? DREG dreg --> dreg
103 1.? AREG areg --> areg
104 2.? AINDR areg@ --> *(areg)
105 3.? AINC areg@+ --> *(areg++)
106 4.? ADEC areg@- --> *(--areg)
107 5.? AOFF apc@(numw) --> *(apc+numw) -- empty string and ZPC not allowed here
108 6.? AINDX apc@(num,reg:sz:scale) --> *(apc+num+reg*scale)
109 6.? AINDX apc@(reg:sz:scale) --> same, with num=0
110 6.? APODX apc@(num)@(num2,reg:sz:scale) --> *(*(apc+num)+num2+reg*scale)
111 6.? APODX apc@(num)@(reg:sz:scale) --> same, with num2=0
112 6.? AMIND apc@(num)@(num2) --> *(*(apc+num)+num2) (previous mode without an index reg)
113 6.? APRDX apc@(num,reg:sz:scale)@(num2) --> *(*(apc+num+reg*scale)+num2)
114 6.? APRDX apc@(reg:sz:scale)@(num2) --> same, with num=0
115 7.0 ABSL num:sz --> *(num)
116 num --> *(num) (sz L assumed)
117 *** MSCR otherreg --> Magic
118 With -l option
119 5.? AOFF apc@(num) --> *(apc+num) -- empty string and ZPC not allowed here still
120
121 examples:
122 #foo #0x35 #12
123 d2
124 a4
125 a3@
126 a5@+
127 a6@-
128 a2@(12) pc@(14)
129 a1@(5,d2:w:1) @(45,d6:l:4)
130 pc@(a2) @(d4)
131 etc . . .
132
133
134 #name@(numw) -->turn into PC rel mode
135 apc@(num8,reg:sz:scale) --> *(apc+num8+reg*scale)
136
137 */
138
139 enum operand_type {
140 IMMED = 1,
141 DREG,
142 AREG,
143 AINDR,
144 ADEC,
145 AINC,
146 AOFF,
147 AINDX,
148 APODX,
149 AMIND,
150 APRDX,
151 ABSL,
152 MSCR,
153 REGLST,
154 };
155
156
157 struct m68k_exp {
158 char *e_beg;
159 char *e_end;
160 expressionS e_exp;
161 short e_siz; /* 0== default 1==short/byte 2==word 3==long */
162 };
163
164 /* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7==data reg,
165 8-15==addr reg for operands that take both types */
166
167 enum _register {
168 DATA = 1, /* 1- 8 == data registers 0-7 */
169 DATA0 = DATA,
170 DATA1,
171 DATA2,
172 DATA3,
173 DATA4,
174 DATA5,
175 DATA6,
176 DATA7,
177
178 ADDR,
179 ADDR0 = ADDR,
180 ADDR1,
181 ADDR2,
182 ADDR3,
183 ADDR4,
184 ADDR5,
185 ADDR6,
186 ADDR7,
187
188 /* Note that COPNUM==processor #1 -- COPNUM+7==#8, which stores as 000 */
189 /* I think. . . */
190
191 SP = ADDR7,
192
193 FPREG, /* Eight FP registers */
194 FP0 = FPREG,
195 FP1,
196 FP2,
197 FP3,
198 FP4,
199 FP5,
200 FP6,
201 FP7,
202 COPNUM = (FPREG+8), /* Co-processor #1-#8 */
203 COP0 = COPNUM,
204 COP1,
205 COP2,
206 COP3,
207 COP4,
208 COP5,
209 COP6,
210 COP7,
211 PC, /* Program counter */
212 ZPC, /* Hack for Program space, but 0 addressing */
213 SR, /* Status Reg */
214 CCR, /* Condition code Reg */
215
216 /* These have to be in order for the movec instruction to work. */
217 USP, /* User Stack Pointer */
218 ISP, /* Interrupt stack pointer */
219 SFC,
220 DFC,
221 CACR,
222 VBR,
223 CAAR,
224 MSP,
225 ITT0,
226 ITT1,
227 DTT0,
228 DTT1,
229 MMUSR,
230 TC,
231 SRP,
232 URP,
233 /* end of movec ordering constraints */
234
235 FPI,
236 FPS,
237 FPC,
238
239 DRP,
240 CRP,
241 CAL,
242 VAL,
243 SCC,
244 AC,
245 BAD,
246 BAD0 = BAD,
247 BAD1,
248 BAD2,
249 BAD3,
250 BAD4,
251 BAD5,
252 BAD6,
253 BAD7,
254 BAC,
255 BAC0 = BAC,
256 BAC1,
257 BAC2,
258 BAC3,
259 BAC4,
260 BAC5,
261 BAC6,
262 BAC7,
263 PSR,
264 PCSR,
265
266 IC, /* instruction cache token */
267 DC, /* data cache token */
268 NC, /* no cache token */
269 BC, /* both caches token */
270
271 };
272
273 /* Internal form of an operand. */
274 struct m68k_op {
275 char *error; /* Couldn't parse it */
276 enum operand_type mode; /* What mode this instruction is in. */
277 enum _register reg; /* Base register */
278 struct m68k_exp *con1;
279 int ireg; /* Index register */
280 int isiz; /* 0==unspec 1==byte(?) 2==short 3==long */
281 int imul; /* Multipy ireg by this (1,2,4,or 8) */
282 struct m68k_exp *con2;
283 };
284
285 /* internal form of a 68020 instruction */
286 struct m68k_it {
287 char *error;
288 char *args; /* list of opcode info */
289 int numargs;
290
291 int numo; /* Number of shorts in opcode */
292 short opcode[11];
293
294 struct m68k_op operands[6];
295
296 int nexp; /* number of exprs in use */
297 struct m68k_exp exprs[4];
298
299 int nfrag; /* Number of frags we have to produce */
300 struct {
301 int fragoff; /* Where in the current opcode[] the frag ends */
302 symbolS *fadd;
303 long foff;
304 int fragty;
305 } fragb[4];
306
307 int nrel; /* Num of reloc strucs in use */
308 struct {
309 int n;
310 symbolS *add,
311 *sub;
312 long off;
313 char wid;
314 char pcrel;
315 } reloc[5]; /* Five is enough??? */
316 };
317
318 #define cpu_of_arch(x) ((x) & m68000up)
319 #define float_of_arch(x) ((x) & mfloat)
320 #define mmu_of_arch(x) ((x) & mmmu)
321
322 static struct m68k_it the_ins; /* the instruction being assembled */
323
324 /* Macros for adding things to the m68k_it struct */
325
326 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
327
328 /* Like addword, but goes BEFORE general operands */
329 #define insop(w) {int z;\
330 for(z=the_ins.numo;z>opcode->m_codenum;--z)\
331 the_ins.opcode[z]=the_ins.opcode[z-1];\
332 for(z=0;z<the_ins.nrel;z++)\
333 the_ins.reloc[z].n+=2;\
334 the_ins.opcode[opcode->m_codenum]=w;\
335 the_ins.numo++;\
336 }
337
338
339 #define add_exp(beg,end) (\
340 the_ins.exprs[the_ins.nexp].e_beg=beg,\
341 the_ins.exprs[the_ins.nexp].e_end=end,\
342 &the_ins.exprs[the_ins.nexp++]\
343 )
344
345
346 /* The numo+1 kludge is so we can hit the low order byte of the prev word. Blecch*/
347 #define add_fix(width,exp,pc_rel) {\
348 the_ins.reloc[the_ins.nrel].n= ((width)=='B') ? (the_ins.numo*2-1) : \
349 (((width)=='b') ? ((the_ins.numo-1)*2) : (the_ins.numo*2));\
350 the_ins.reloc[the_ins.nrel].add=adds((exp));\
351 the_ins.reloc[the_ins.nrel].sub=subs((exp));\
352 the_ins.reloc[the_ins.nrel].off=offs((exp));\
353 the_ins.reloc[the_ins.nrel].wid=width;\
354 the_ins.reloc[the_ins.nrel++].pcrel=pc_rel;\
355 }
356
357 #define add_frag(add,off,type) {\
358 the_ins.fragb[the_ins.nfrag].fragoff=the_ins.numo;\
359 the_ins.fragb[the_ins.nfrag].fadd=add;\
360 the_ins.fragb[the_ins.nfrag].foff=off;\
361 the_ins.fragb[the_ins.nfrag++].fragty=type;\
362 }
363
364 #define isvar(exp) ((exp) && (adds(exp) || subs(exp)))
365
366 #define seg(exp) ((exp)->e_exp.X_seg)
367 #define adds(exp) ((exp)->e_exp.X_add_symbol)
368 #define subs(exp) ((exp)->e_exp.X_subtract_symbol)
369 #define offs(exp) ((exp)->e_exp.X_add_number)
370
371
372 struct m68k_incant {
373 char *m_operands;
374 unsigned long m_opcode;
375 short m_opnum;
376 short m_codenum;
377 enum m68k_architecture m_arch;
378 struct m68k_incant *m_next;
379 };
380
381 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
382 #define gettwo(x) (((x)->m_opcode)&0xffff)
383
384
385 #if __STDC__ == 1
386
387 static char *crack_operand(char *str, struct m68k_op *opP);
388 static int get_num(struct m68k_exp *exp, int ok);
389 static int get_regs(int i, char *str, struct m68k_op *opP);
390 static int reverse_16_bits(int in);
391 static int reverse_8_bits(int in);
392 static int try_index(char **s, struct m68k_op *opP);
393 static void install_gen_operand(int mode, int val);
394 static void install_operand(int mode, int val);
395 void s_bss(void);
396 static void s_data1(void);
397 static void s_data2(void);
398 static void s_even(void);
399 static void s_proc(void);
400
401 #else /* not __STDC__ */
402
403 static char *crack_operand();
404 static int get_num();
405 static int get_regs();
406 static int reverse_16_bits();
407 static int reverse_8_bits();
408 static int try_index();
409 static void install_gen_operand();
410 static void install_operand();
411 void s_bss();
412 static void s_data1();
413 static void s_data2();
414 static void s_even();
415 static void s_proc();
416
417 #endif /* not __STDC__ */
418
419 static enum m68k_architecture current_architecture = 0;
420
421 /* BCC68000 is for patching in an extra jmp instruction for long offsets
422 on the 68000. The 68000 doesn't support long branches with branchs */
423
424 /* This table desribes how you change sizes for the various types of variable
425 size expressions. This version only supports two kinds. */
426
427 /* Note that calls to frag_var need to specify the maximum expansion needed */
428 /* This is currently 10 bytes for DBCC */
429
430 /* The fields are:
431 How far Forward this mode will reach:
432 How far Backward this mode will reach:
433 How many bytes this mode will add to the size of the frag
434 Which mode to go to if the offset won't fit in this one
435 */
436 const relax_typeS
437 md_relax_table[] = {
438 { 1, 1, 0, 0 }, /* First entries aren't used */
439 { 1, 1, 0, 0 }, /* For no good reason except */
440 { 1, 1, 0, 0 }, /* that the VAX doesn't either */
441 { 1, 1, 0, 0 },
442
443 { (127), (-128), 0, TAB(BRANCH,SHORT)},
444 { (32767), (-32768), 2, TAB(BRANCH,LONG) },
445 { 0, 0, 4, 0 },
446 { 1, 1, 0, 0 },
447
448 { 1, 1, 0, 0 }, /* FBRANCH doesn't come BYTE */
449 { (32767), (-32768), 2, TAB(FBRANCH,LONG)},
450 { 0, 0, 4, 0 },
451 { 1, 1, 0, 0 },
452
453 { 1, 1, 0, 0 }, /* PCREL doesn't come BYTE */
454 { (32767), (-32768), 2, TAB(PCREL,LONG)},
455 { 0, 0, 4, 0 },
456 { 1, 1, 0, 0 },
457
458 { (127), (-128), 0, TAB(BCC68000,SHORT)},
459 { (32767), (-32768), 2, TAB(BCC68000,LONG) },
460 { 0, 0, 6, 0 }, /* jmp long space */
461 { 1, 1, 0, 0 },
462
463 { 1, 1, 0, 0 }, /* DBCC doesn't come BYTE */
464 { (32767), (-32768), 2, TAB(DBCC,LONG) },
465 { 0, 0, 10, 0 }, /* bra/jmp long space */
466 { 1, 1, 0, 0 },
467
468 { 1, 1, 0, 0 }, /* PCLEA doesn't come BYTE */
469 { 32767, -32768, 2, TAB(PCLEA,LONG) },
470 { 0, 0, 6, 0 },
471 { 1, 1, 0, 0 },
472
473 };
474
475 /* These are the machine dependent pseudo-ops. These are included so
476 the assembler can work on the output from the SUN C compiler, which
477 generates these.
478 */
479
480 /* This table describes all the machine specific pseudo-ops the assembler
481 has to support. The fields are:
482 pseudo-op name without dot
483 function to call to execute this pseudo-op
484 Integer arg to pass to the function
485 */
486 const pseudo_typeS md_pseudo_table[] = {
487 { "data1", s_data1, 0 },
488 { "data2", s_data2, 0 },
489 { "bss", s_bss, 0 },
490 { "even", s_even, 0 },
491 { "skip", s_space, 0 },
492 { "proc", s_proc, 0 },
493 { 0, 0, 0 }
494 };
495
496
497 /* #define isbyte(x) ((x)>=-128 && (x)<=127) */
498 /* #define isword(x) ((x)>=-32768 && (x)<=32767) */
499
500 #define issbyte(x) ((x)>=-128 && (x)<=127)
501 #define isubyte(x) ((x)>=0 && (x)<=255)
502 #define issword(x) ((x)>=-32768 && (x)<=32767)
503 #define isuword(x) ((x)>=0 && (x)<=65535)
504
505 #define isbyte(x) ((x)>=-128 && (x)<=255)
506 #define isword(x) ((x)>=-32768 && (x)<=65535)
507 #define islong(x) (1)
508
509 extern char *input_line_pointer;
510
511 enum {
512 FAIL = 0,
513 OK = 1,
514 };
515
516 /* JF these tables here are for speed at the expense of size */
517 /* You can replace them with the #if 0 versions if you really
518 need space and don't mind it running a bit slower */
519
520 static char mklower_table[256];
521 #define mklower(c) (mklower_table[(unsigned char)(c)])
522 static char notend_table[256];
523 static char alt_notend_table[256];
524 #define notend(s) ( !(notend_table[(unsigned char)(*s)] || (*s==':' &&\
525 alt_notend_table[(unsigned char)(s[1])])))
526
527 #if 0
528 #define mklower(c) (isupper(c) ? tolower(c) : c)
529 #endif
530
531
532 /* JF modified this to handle cases where the first part of a symbol name
533 looks like a register */
534
535 /*
536 * m68k_reg_parse() := if it looks like a register, return it's token &
537 * advance the pointer.
538 */
539
540 enum _register m68k_reg_parse(ccp)
541 register char **ccp;
542 {
543 char *start = *ccp;
544
545 if (isalpha(*start) && is_name_beginner(*start))
546 {
547 char c;
548 char *p = start;
549 symbolS *symbolP;
550
551 while (is_part_of_name(c = *p++))
552 ;
553 * -- p = 0;
554 symbolP = symbol_find(start);
555 *p = c;
556
557 if (symbolP && S_GET_SEGMENT(symbolP) == SEG_REGISTER)
558 {
559 *ccp = p;
560 return S_GET_VALUE(symbolP);
561 }
562 }
563 return FAIL;
564
565
566 }
567
568 #define SKIP_WHITE() { str++; if(*str==' ') str++;}
569
570 /*
571 * m68k_ip_op := '#' + <anything>
572 * | <register> + range_sep + get_regs
573 * ;
574 *
575 * range_sep := '/' | '-' ;
576 *
577 * SKIP_WHITE := <empty> | ' ' ;
578 *
579 */
580
581 int
582 m68k_ip_op(str,opP)
583 char *str;
584 register struct m68k_op *opP;
585 {
586 char *strend;
587 long i;
588 char *parse_index();
589 int needp;
590 if (*str==' ') {
591 str++;
592 } /* Find the beginning of the string */
593
594 if(!*str) {
595 opP->error="Missing operand";
596 return FAIL;
597 } /* Out of gas */
598
599 for(strend = str; *strend; strend++) ;;
600
601 --strend;
602
603 if(*str=='#') {
604 str++;
605 opP->con1=add_exp(str,strend);
606 opP->mode=IMMED;
607 return OK;
608 } /* Guess what: A constant. Shar and enjoy */
609
610 i = m68k_reg_parse(&str);
611
612 /* is a register, is exactly a register, and is followed by '@' */
613
614 if((i==FAIL || *str!='\0') && *str!='@') {
615 char *stmp;
616
617 if(i!=FAIL && (*str=='/' || *str=='-')) {
618 opP->mode=REGLST;
619 return(get_regs(i,str,opP));
620 }
621 if ((stmp=strchr(str,'@')) != '\0') {
622 opP->con1=add_exp(str,stmp-1);
623 if(stmp==strend) {
624 opP->mode=AINDX;
625 return(OK);
626 }
627
628 if ((current_architecture & m68020up) == 0) {
629 return(FAIL);
630 } /* if target is not a '20 or better */
631
632 stmp++;
633 if(*stmp++!='(' || *strend--!=')') {
634 opP->error="Malformed operand";
635 return(FAIL);
636 }
637 i=try_index(&stmp,opP);
638 opP->con2=add_exp(stmp,strend);
639
640 if (i == FAIL) {
641 opP->mode=AMIND;
642 } else {
643 opP->mode=APODX;
644 }
645 return(OK);
646 } /* if there's an '@' */
647 opP->mode = ABSL;
648 opP->con1 = add_exp(str,strend);
649 return(OK);
650 } /* not a register, not exactly a register, or no '@' */
651
652 opP->reg=i;
653
654 if (*str=='\0') {
655 if(i>=DATA+0 && i<=DATA+7)
656 opP->mode=DREG;
657 else if(i>=ADDR+0 && i<=ADDR+7)
658 opP->mode=AREG;
659 else
660 opP->mode=MSCR;
661 return OK;
662 }
663
664 if((i<ADDR+0 || i>ADDR+7) && i!=PC && i!=ZPC && i!=FAIL) { /* Can't indirect off non address regs */
665 opP->error="Invalid indirect register";
666 return FAIL;
667 }
668 know(*str == '@');
669
670 str++;
671 switch(*str) {
672 case '\0':
673 opP->mode=AINDR;
674 return OK;
675 case '-':
676 opP->mode=ADEC;
677 return OK;
678 case '+':
679 opP->mode=AINC;
680 return OK;
681 case '(':
682 str++;
683 break;
684 default:
685 opP->error="Junk after indirect";
686 return FAIL;
687 }
688 /* Some kind of indexing involved. Lets find out how bad it is */
689 i=try_index(&str,opP);
690 /* Didn't start with an index reg, maybe its offset or offset,reg */
691 if(i==FAIL) {
692 char *beg_str;
693
694 beg_str=str;
695 for(i=1;i;) {
696 switch(*str++) {
697 case '\0':
698 opP->error="Missing )";
699 return FAIL;
700 case ',': i=0; break;
701 case '(': i++; break;
702 case ')': --i; break;
703 }
704 }
705 /* if(str[-3]==':') {
706 int siz;
707
708 switch(str[-2]) {
709 case 'b':
710 case 'B':
711 siz=1;
712 break;
713 case 'w':
714 case 'W':
715 siz=2;
716 break;
717 case 'l':
718 case 'L':
719 siz=3;
720 break;
721 default:
722 opP->error="Specified size isn't :w or :l";
723 return FAIL;
724 }
725 opP->con1=add_exp(beg_str,str-4);
726 opP->con1->e_siz=siz;
727 } else */
728 opP->con1=add_exp(beg_str,str-2);
729 /* Should be offset,reg */
730 if(str[-1]==',') {
731 i=try_index(&str,opP);
732 if(i==FAIL) {
733 opP->error="Malformed index reg";
734 return FAIL;
735 }
736 }
737 }
738 /* We've now got offset) offset,reg) or reg) */
739
740 if (*str == '\0') {
741 /* Th-the-thats all folks */
742 if (opP->reg == FAIL) opP->mode = AINDX; /* Other form of indirect */
743 else if(opP->ireg == FAIL) opP->mode = AOFF;
744 else opP->mode = AINDX;
745 return(OK);
746 }
747 /* Next thing had better be another @ */
748 if (*str == '@') {
749 if (str[1] == '(') {
750 needp = 1;
751 str+=2;
752 }
753 else {
754 needp = 0;
755 str++;
756 }
757 }
758
759 if ((current_architecture & m68020up) == 0) {
760 return(FAIL);
761 } /* if target is not a '20 or better */
762
763
764 if(opP->ireg != FAIL) {
765 opP->mode = APRDX;
766
767 i = try_index(&str, opP);
768 if (i != FAIL) {
769 opP->error = "Two index registers! not allowed!";
770 return(FAIL);
771 }
772 } else {
773 i = try_index(&str, opP);
774 }
775
776 if (i == FAIL) {
777 char *beg_str;
778
779 beg_str = str;
780
781 for (i = 1; i; ) {
782 switch(*str++) {
783 case '\0':
784 if (needp)
785 opP->error="Missing )";
786 return(FAIL);
787 break;
788 case ',': i=0; break;
789 case '(': i++; break;
790 case ')': --i; break;
791 }
792 }
793
794 opP->con2=add_exp(beg_str,str-2);
795
796 if (str[-1] == ',') {
797 if (opP->ireg != FAIL) {
798 opP->error = "Can't have two index regs";
799 return(FAIL);
800 }
801
802 i = try_index(&str, opP);
803
804 if (i == FAIL) {
805 opP->error = "malformed index reg";
806 return(FAIL);
807 }
808
809 opP->mode = APODX;
810 } else if (opP->ireg != FAIL) {
811 opP->mode = APRDX;
812 } else {
813 opP->mode = AMIND;
814 }
815 } else {
816 opP->mode = APODX;
817 }
818
819 if(*str!='\0') {
820 opP->error="Junk after indirect";
821 return FAIL;
822 }
823 return(OK);
824 } /* m68k_ip_op() */
825
826 /*
827 *
828 * try_index := data_or_address_register + ')' + SKIP_W
829 * | data_or_address_register + ':' + SKIP_W + size_spec + SKIP_W + multiplier + ')' + SKIP_W
830 *
831 * multiplier := <empty>
832 * | ':' + multiplier_number
833 * ;
834 *
835 * multiplier_number := '1' | '2' | '4' | '8' ;
836 *
837 * size_spec := 'l' | 'L' | 'w' | 'W' ;
838 *
839 * SKIP_W := <empty> | ' ' ;
840 *
841 */
842
843 static int try_index(s,opP)
844 char **s;
845 struct m68k_op *opP;
846 {
847 register int i;
848 char *ss;
849 #define SKIP_W() { ss++; if (*ss==' ') ss++;}
850
851 ss= *s;
852 /* SKIP_W(); */
853 i=m68k_reg_parse(&ss);
854 if(!(i>=DATA+0 && i<=ADDR+7)) { /* if i is not DATA or ADDR reg */
855 *s=ss;
856 return FAIL;
857 }
858 opP->ireg=i;
859 /* SKIP_W(); */
860 if(*ss==')') {
861 opP->isiz=0;
862 opP->imul=1;
863 SKIP_W();
864 *s=ss;
865 return OK;
866 }
867 if(*ss!=':') {
868 opP->error="Missing : in index register";
869 *s=ss;
870 return FAIL;
871 }
872 SKIP_W();
873 switch(*ss) {
874 case 'w':
875 case 'W':
876 opP->isiz=2;
877 break;
878 case 'l':
879 case 'L':
880 opP->isiz=3;
881 break;
882 default:
883 opP->error="Index register size spec not :w or :l";
884 *s=ss;
885 return FAIL;
886 }
887 SKIP_W();
888 if(*ss==':') {
889 SKIP_W();
890 switch(*ss) {
891 case '1':
892 case '2':
893 case '4':
894 case '8':
895 opP->imul= *ss-'0';
896 break;
897 default:
898 opP->error="index multiplier not 1, 2, 4 or 8";
899 *s=ss;
900 return FAIL;
901 }
902 SKIP_W();
903 } else opP->imul=1;
904 if(*ss!=')') {
905 opP->error="Missing )";
906 *s=ss;
907 return FAIL;
908 }
909 SKIP_W();
910 *s=ss;
911 return OK;
912 } /* try_index() */
913
914 #ifdef TEST1 /* TEST1 tests m68k_ip_op(), which parses operands */
915 main()
916 {
917 char buf[128];
918 struct m68k_op thark;
919
920 for(;;) {
921 if(!gets(buf))
922 break;
923 memset(&thark, '\0', sizeof(thark));
924 if(!m68k_ip_op(buf,&thark)) printf("FAIL:");
925 if(thark.error)
926 printf("op1 error %s in %s\n",thark.error,buf);
927 printf("mode %d, reg %d, ",thark.mode,thark.reg);
928 if(thark.b_const)
929 printf("Constant: '%.*s',",1+thark.e_const-thark.b_const,thark.b_const);
930 printf("ireg %d, isiz %d, imul %d ",thark.ireg,thark.isiz,thark.imul);
931 if(thark.b_iadd)
932 printf("Iadd: '%.*s'",1+thark.e_iadd-thark.b_iadd,thark.b_iadd);
933 printf("\n");
934 }
935 exit(0);
936 }
937
938 #endif
939
940
941 static struct hash_control* op_hash = NULL; /* handle of the OPCODE hash table
942 NULL means any use before m68k_ip_begin()
943 will crash */
944
945 \f
946 /*
947 * m 6 8 k _ i p ( )
948 *
949 * This converts a string into a 68k instruction.
950 * The string must be a bare single instruction in sun format
951 * with RMS-style 68020 indirects
952 * (example: )
953 *
954 * It provides some error messages: at most one fatal error message (which
955 * stops the scan) and at most one warning message for each operand.
956 * The 68k instruction is returned in exploded form, since we have no
957 * knowledge of how you parse (or evaluate) your expressions.
958 * We do however strip off and decode addressing modes and operation
959 * mnemonic.
960 *
961 * This function's value is a string. If it is not "" then an internal
962 * logic error was found: read this code to assign meaning to the string.
963 * No argument string should generate such an error string:
964 * it means a bug in our code, not in the user's text.
965 *
966 * You MUST have called m68k_ip_begin() once and m86_ip_end() never before using
967 * this function.
968 */
969
970 /* JF this function no longer returns a useful value. Sorry */
971 void m68k_ip (instring)
972 char *instring;
973 {
974 register char *p;
975 register struct m68k_op *opP;
976 register struct m68k_incant *opcode;
977 register char *s;
978 register int tmpreg = 0, baseo = 0, outro = 0, nextword;
979 int siz1, siz2;
980 char c;
981 int losing;
982 int opsfound;
983 char *crack_operand();
984 LITTLENUM_TYPE words[6];
985 LITTLENUM_TYPE *wordp;
986
987 if (*instring == ' ')
988 instring++; /* skip leading whitespace */
989
990 /* Scan up to end of operation-code, which MUST end in end-of-string
991 or exactly 1 space. */
992 for (p = instring; *p != '\0'; p++)
993 if (*p == ' ')
994 break;
995
996
997 if (p == instring) {
998 the_ins.error = "No operator";
999 the_ins.opcode[0] = NULL;
1000 /* the_ins.numo=1; */
1001 return;
1002 }
1003
1004 /* p now points to the end of the opcode name, probably whitespace.
1005 make sure the name is null terminated by clobbering the whitespace,
1006 look it up in the hash table, then fix it back. */
1007 c = *p;
1008 *p = '\0';
1009 opcode = (struct m68k_incant *)hash_find (op_hash, instring);
1010 *p = c;
1011
1012 if (opcode == NULL) {
1013 the_ins.error = "Unknown operator";
1014 the_ins.opcode[0] = NULL;
1015 /* the_ins.numo=1; */
1016 return;
1017 }
1018
1019 /* found a legitimate opcode, start matching operands */
1020 while (*p == ' ') ++p;
1021
1022 for(opP = &the_ins.operands[0]; *p; opP++) {
1023
1024 p = crack_operand(p, opP);
1025
1026 if (opP->error) {
1027 the_ins.error=opP->error;
1028 return;
1029 }
1030 }
1031
1032 opsfound = opP - &the_ins.operands[0];
1033
1034 /* This ugly hack is to support the floating pt opcodes in their standard form */
1035 /* Essentially, we fake a first enty of type COP#1 */
1036 if (opcode->m_operands[0]=='I') {
1037 int n;
1038
1039 for(n=opsfound;n>0;--n)
1040 the_ins.operands[n]=the_ins.operands[n-1];
1041
1042 /* memcpy((char *)(&the_ins.operands[1]), (char *)(&the_ins.operands[0]), opsfound*sizeof(the_ins.operands[0])); */
1043 memset((char *)(&the_ins.operands[0]), '\0', sizeof(the_ins.operands[0]));
1044 the_ins.operands[0].mode=MSCR;
1045 the_ins.operands[0].reg=COPNUM; /* COP #1 */
1046 opsfound++;
1047 }
1048
1049 /* We've got the operands. Find an opcode that'll accept them */
1050 for (losing = 0; ; ) {
1051 /* if we didn't get the right number of ops,
1052 or we have no common model with this pattern
1053 then reject this pattern. */
1054
1055 if (opsfound != opcode->m_opnum
1056 || ((opcode->m_arch & current_architecture) == 0)) {
1057
1058 ++losing;
1059
1060 } else {
1061 for (s=opcode->m_operands, opP = &the_ins.operands[0]; *s && !losing; s += 2, opP++) {
1062 /* Warning: this switch is huge! */
1063 /* I've tried to organize the cases into this order:
1064 non-alpha first, then alpha by letter. lower-case goes directly
1065 before uppercase counterpart. */
1066 /* Code with multiple case ...: gets sorted by the lowest case ...
1067 it belongs to. I hope this makes sense. */
1068 switch(*s) {
1069 case '!':
1070 if (opP->mode == MSCR || opP->mode == IMMED
1071 || opP->mode == DREG || opP->mode == AREG
1072 || opP->mode == AINC || opP->mode == ADEC
1073 || opP->mode == REGLST)
1074 losing++;
1075 break;
1076
1077 case '#':
1078 if(opP->mode!=IMMED)
1079 losing++;
1080 else {
1081 long t;
1082
1083 t=get_num(opP->con1,80);
1084 if(s[1]=='b' && !isbyte(t))
1085 losing++;
1086 else if(s[1]=='w' && !isword(t))
1087 losing++;
1088 }
1089 break;
1090
1091 case '^':
1092 case 'T':
1093 if(opP->mode!=IMMED)
1094 losing++;
1095 break;
1096
1097 case '$':
1098 if(opP->mode==MSCR || opP->mode==AREG ||
1099 opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1100 losing++;
1101 break;
1102
1103 case '%':
1104 if(opP->mode==MSCR || opP->reg==PC ||
1105 opP->reg==ZPC || opP->mode==REGLST)
1106 losing++;
1107 break;
1108
1109
1110 case '&':
1111 if(opP->mode==MSCR || opP->mode==DREG ||
1112 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC ||
1113 opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
1114 losing++;
1115 break;
1116
1117 case '*':
1118 if(opP->mode==MSCR || opP->mode==REGLST)
1119 losing++;
1120 break;
1121
1122 case '+':
1123 if(opP->mode!=AINC)
1124 losing++;
1125 break;
1126
1127 case '-':
1128 if(opP->mode!=ADEC)
1129 losing++;
1130 break;
1131
1132 case '/':
1133 if(opP->mode==MSCR || opP->mode==AREG ||
1134 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->mode==REGLST)
1135 losing++;
1136 break;
1137
1138 case ';':
1139 if(opP->mode==MSCR || opP->mode==AREG || opP->mode==REGLST)
1140 losing++;
1141 break;
1142
1143 case '?':
1144 if(opP->mode==MSCR || opP->mode==AREG ||
1145 opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->reg==PC ||
1146 opP->reg==ZPC || opP->mode==REGLST)
1147 losing++;
1148 break;
1149
1150 case '@':
1151 if(opP->mode==MSCR || opP->mode==AREG ||
1152 opP->mode==IMMED || opP->mode==REGLST)
1153 losing++;
1154 break;
1155
1156 case '~': /* For now! (JF FOO is this right?) */
1157 if(opP->mode==MSCR || opP->mode==DREG ||
1158 opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
1159 losing++;
1160 break;
1161
1162 case 'A':
1163 if(opP->mode!=AREG)
1164 losing++;
1165 break;
1166 case 'a':
1167 if (opP->mode != AINDR) {
1168 ++losing;
1169 } /* if not address register indirect */
1170 break;
1171 case 'B': /* FOO */
1172 if(opP->mode!=ABSL || (flagseen['S'] && instring[0] == 'j'
1173 && instring[1] == 'b'
1174 && instring[2] == 's'
1175 && instring[3] == 'r'))
1176 losing++;
1177 break;
1178
1179 case 'C':
1180 if(opP->mode!=MSCR || opP->reg!=CCR)
1181 losing++;
1182 break;
1183
1184 case 'd': /* FOO This mode is a KLUDGE!! */
1185 if(opP->mode!=AOFF && (opP->mode!=ABSL ||
1186 opP->con1->e_beg[0]!='(' || opP->con1->e_end[0]!=')'))
1187 losing++;
1188 break;
1189
1190 case 'D':
1191 if(opP->mode!=DREG)
1192 losing++;
1193 break;
1194
1195 case 'F':
1196 if(opP->mode!=MSCR || opP->reg<(FPREG+0) || opP->reg>(FPREG+7))
1197 losing++;
1198 break;
1199
1200 case 'I':
1201 if(opP->mode!=MSCR || opP->reg<COPNUM ||
1202 opP->reg>=COPNUM+7)
1203 losing++;
1204 break;
1205
1206 case 'J':
1207 if (opP->mode != MSCR
1208 || opP->reg < USP
1209 || opP->reg > URP
1210 || cpu_of_arch(current_architecture) < m68010 /* before 68010 had none */
1211 || (cpu_of_arch(current_architecture) < m68020
1212 && opP->reg != SFC
1213 && opP->reg != DFC
1214 && opP->reg != USP
1215 && opP->reg != VBR) /* 68010's had only these */
1216 || (cpu_of_arch(current_architecture) < m68040
1217 && opP->reg != SFC
1218 && opP->reg != DFC
1219 && opP->reg != USP
1220 && opP->reg != VBR
1221 && opP->reg != CACR
1222 && opP->reg != CAAR
1223 && opP->reg != MSP
1224 && opP->reg != ISP) /* 680[23]0's have only these */
1225 || (cpu_of_arch(current_architecture) == m68040 /* 68040 has all but this */
1226 && opP->reg == CAAR)) {
1227 losing++;
1228 } /* doesn't cut it */
1229 break;
1230
1231 case 'k':
1232 if(opP->mode!=IMMED)
1233 losing++;
1234 break;
1235
1236 case 'l':
1237 case 'L':
1238 if(opP->mode==DREG || opP->mode==AREG || opP->mode==FPREG) {
1239 if(s[1]=='8')
1240 losing++;
1241 else {
1242 opP->mode=REGLST;
1243 opP->reg=1<<(opP->reg-DATA);
1244 }
1245 } else if(opP->mode!=REGLST) {
1246 losing++;
1247 } else if(s[1]=='8' && opP->reg&0x0FFffFF)
1248 losing++;
1249 else if(s[1]=='3' && opP->reg&0x7000000)
1250 losing++;
1251 break;
1252
1253 case 'M':
1254 if(opP->mode!=IMMED)
1255 losing++;
1256 else {
1257 long t;
1258
1259 t=get_num(opP->con1,80);
1260 if(!issbyte(t) || isvar(opP->con1))
1261 losing++;
1262 }
1263 break;
1264
1265 case 'O':
1266 if(opP->mode!=DREG && opP->mode!=IMMED)
1267 losing++;
1268 break;
1269
1270 case 'Q':
1271 if(opP->mode!=IMMED)
1272 losing++;
1273 else {
1274 long t;
1275
1276 t=get_num(opP->con1,80);
1277 if(t<1 || t>8 || isvar(opP->con1))
1278 losing++;
1279 }
1280 break;
1281
1282 case 'R':
1283 if(opP->mode!=DREG && opP->mode!=AREG)
1284 losing++;
1285 break;
1286
1287 case 's':
1288 if(opP->mode!=MSCR || !(opP->reg==FPI || opP->reg==FPS || opP->reg==FPC))
1289 losing++;
1290 break;
1291
1292 case 'S':
1293 if(opP->mode!=MSCR || opP->reg!=SR)
1294 losing++;
1295 break;
1296
1297 case 'U':
1298 if(opP->mode!=MSCR || opP->reg!=USP)
1299 losing++;
1300 break;
1301
1302 /* JF these are out of order. We could put them
1303 in order if we were willing to put up with
1304 bunches of #ifdef m68851s in the code */
1305 #ifndef NO_68851
1306 /* Memory addressing mode used by pflushr */
1307 case '|':
1308 if(opP->mode==MSCR || opP->mode==DREG ||
1309 opP->mode==AREG || opP->mode==REGLST)
1310 losing++;
1311 break;
1312
1313 case 'f':
1314 if (opP->mode != MSCR || (opP->reg != SFC && opP->reg != DFC))
1315 losing++;
1316 break;
1317
1318 case 'P':
1319 if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
1320 opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
1321 losing++;
1322 break;
1323
1324 case 'V':
1325 if (opP->reg != VAL)
1326 losing++;
1327 break;
1328
1329 case 'W':
1330 if (opP->mode != MSCR || (opP->reg != DRP && opP->reg != SRP &&
1331 opP->reg != CRP))
1332 losing++;
1333 break;
1334
1335 case 'X':
1336 if (opP->mode != MSCR ||
1337 (!(opP->reg >= BAD && opP->reg <= BAD+7) &&
1338 !(opP->reg >= BAC && opP->reg <= BAC+7)))
1339 losing++;
1340 break;
1341
1342 case 'Y':
1343 if (opP->reg != PSR)
1344 losing++;
1345 break;
1346
1347 case 'Z':
1348 if (opP->reg != PCSR)
1349 losing++;
1350 break;
1351 #endif
1352 case 'c':
1353 if (opP->reg != NC
1354 && opP->reg != IC
1355 && opP->reg != DC
1356 && opP->reg != BC) {
1357 losing++;
1358 } /* not a cache specifier. */
1359 break;
1360
1361 case '_':
1362 if (opP->mode != ABSL) {
1363 ++losing;
1364 } /* not absolute */
1365 break;
1366
1367 default:
1368 as_fatal("Internal error: Operand mode %c unknown in line %s of file \"%s\"",
1369 *s, __LINE__, __FILE__);
1370 } /* switch on type of operand */
1371
1372 if (losing) break;
1373 } /* for each operand */
1374 } /* if immediately wrong */
1375
1376 if (!losing) {
1377 break;
1378 } /* got it. */
1379
1380 opcode = opcode->m_next;
1381
1382 if (!opcode) {
1383 the_ins.error = "instruction/operands mismatch or invalid\n instruction for this architecture";
1384 return;
1385 } /* Fell off the end */
1386
1387 losing = 0;
1388 }
1389
1390 /* now assemble it */
1391
1392 the_ins.args=opcode->m_operands;
1393 the_ins.numargs=opcode->m_opnum;
1394 the_ins.numo=opcode->m_codenum;
1395 the_ins.opcode[0]=getone(opcode);
1396 the_ins.opcode[1]=gettwo(opcode);
1397
1398 for (s = the_ins.args, opP = &the_ins.operands[0]; *s; s += 2, opP++) {
1399 /* This switch is a doozy.
1400 Watch the first step; its a big one! */
1401 switch(s[0]) {
1402
1403 case '*':
1404 case '~':
1405 case '%':
1406 case ';':
1407 case '@':
1408 case '!':
1409 case '&':
1410 case '$':
1411 case '?':
1412 case '/':
1413 #ifndef NO_68851
1414 case '|':
1415 #endif
1416 switch(opP->mode) {
1417 case IMMED:
1418 tmpreg=0x3c; /* 7.4 */
1419 if (strchr("bwl",s[1])) nextword=get_num(opP->con1,80);
1420 else nextword=nextword=get_num(opP->con1,0);
1421 if(isvar(opP->con1))
1422 add_fix(s[1],opP->con1,0);
1423 switch(s[1]) {
1424 case 'b':
1425 if(!isbyte(nextword))
1426 opP->error="operand out of range";
1427 addword(nextword);
1428 baseo=0;
1429 break;
1430 case 'w':
1431 if(!isword(nextword))
1432 opP->error="operand out of range";
1433 addword(nextword);
1434 baseo=0;
1435 break;
1436 case 'l':
1437 addword(nextword>>16);
1438 addword(nextword);
1439 baseo=0;
1440 break;
1441
1442 case 'f':
1443 baseo=2;
1444 outro=8;
1445 break;
1446 case 'F':
1447 baseo=4;
1448 outro=11;
1449 break;
1450 case 'x':
1451 baseo=6;
1452 outro=15;
1453 break;
1454 case 'p':
1455 baseo=6;
1456 outro= -1;
1457 break;
1458 default:
1459 as_fatal("Internal error: Can't decode %c%c in line %s of file \"%s\"",
1460 *s, s[1], __LINE__, __FILE__);
1461 }
1462 if(!baseo)
1463 break;
1464
1465 /* We gotta put out some float */
1466 if(seg(opP->con1)!=SEG_BIG) {
1467 int_to_gen(nextword);
1468 gen_to_words(words,baseo,(long int)outro);
1469 for(wordp=words;baseo--;wordp++)
1470 addword(*wordp);
1471 break;
1472 } /* Its BIG */
1473 if(offs(opP->con1)>0) {
1474 as_warn("Bignum assumed to be binary bit-pattern");
1475 if(offs(opP->con1)>baseo) {
1476 as_warn("Bignum too big for %c format; truncated",s[1]);
1477 offs(opP->con1)=baseo;
1478 }
1479 baseo-=offs(opP->con1);
1480 for(wordp=generic_bignum+offs(opP->con1)-1;offs(opP->con1)--;--wordp)
1481 addword(*wordp);
1482 while(baseo--)
1483 addword(0);
1484 break;
1485 }
1486 gen_to_words(words,baseo,(long)outro);
1487 for (wordp=words;baseo--;wordp++)
1488 addword(*wordp);
1489 break;
1490 case DREG:
1491 tmpreg=opP->reg-DATA; /* 0.dreg */
1492 break;
1493 case AREG:
1494 tmpreg=0x08+opP->reg-ADDR; /* 1.areg */
1495 break;
1496 case AINDR:
1497 tmpreg=0x10+opP->reg-ADDR; /* 2.areg */
1498 break;
1499 case ADEC:
1500 tmpreg=0x20+opP->reg-ADDR; /* 4.areg */
1501 break;
1502 case AINC:
1503 tmpreg=0x18+opP->reg-ADDR; /* 3.areg */
1504 break;
1505 case AOFF:
1506
1507 nextword=get_num(opP->con1,80);
1508 /* Force into index mode. Hope this works */
1509
1510 /* We do the first bit for 32-bit displacements,
1511 and the second bit for 16 bit ones. It is
1512 possible that we should make the default be
1513 WORD instead of LONG, but I think that'd
1514 break GCC, so we put up with a little
1515 inefficiency for the sake of working output.
1516 */
1517
1518 if( !issword(nextword)
1519 || ( isvar(opP->con1)
1520 && ( ( opP->con1->e_siz==0
1521 && flagseen['l']==0)
1522 || opP->con1->e_siz==3))) {
1523
1524 if(opP->reg==PC)
1525 tmpreg=0x3B; /* 7.3 */
1526 else
1527 tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1528 if(isvar(opP->con1)) {
1529 if(opP->reg==PC) {
1530 add_frag(adds(opP->con1),
1531 offs(opP->con1),
1532 TAB(PCLEA,SZ_UNDEF));
1533 break;
1534 } else {
1535 addword(0x0170);
1536 add_fix('l',opP->con1,1);
1537 }
1538 } else
1539 addword(0x0170);
1540 addword(nextword>>16);
1541 } else {
1542 if(opP->reg==PC)
1543 tmpreg=0x3A; /* 7.2 */
1544 else
1545 tmpreg=0x28+opP->reg-ADDR; /* 5.areg */
1546
1547 if(isvar(opP->con1)) {
1548 if(opP->reg==PC) {
1549 add_fix('w',opP->con1,1);
1550 } else
1551 add_fix('w',opP->con1,0);
1552 }
1553 }
1554 addword(nextword);
1555 break;
1556
1557 case APODX:
1558 case AMIND:
1559 case APRDX:
1560 know(current_architecture & m68020up);
1561 /* intentional fall-through */
1562 case AINDX:
1563 nextword=0;
1564 baseo=get_num(opP->con1,80);
1565 outro=get_num(opP->con2,80);
1566 /* Figure out the 'addressing mode' */
1567 /* Also turn on the BASE_DISABLE bit, if needed */
1568 if(opP->reg==PC || opP->reg==ZPC) {
1569 tmpreg=0x3b; /* 7.3 */
1570 if(opP->reg==ZPC)
1571 nextword|=0x80;
1572 } else if(opP->reg==FAIL) {
1573 nextword|=0x80;
1574 tmpreg=0x30; /* 6.garbage */
1575 } else tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
1576
1577 siz1= (opP->con1) ? opP->con1->e_siz : 0;
1578 siz2= (opP->con2) ? opP->con2->e_siz : 0;
1579
1580 /* Index register stuff */
1581 if(opP->ireg>=DATA+0 && opP->ireg<=ADDR+7) {
1582 nextword|=(opP->ireg-DATA)<<12;
1583
1584 if(opP->isiz==0 || opP->isiz==3)
1585 nextword|=0x800;
1586 switch(opP->imul) {
1587 case 1: break;
1588 case 2: nextword|=0x200; break;
1589 case 4: nextword|=0x400; break;
1590 case 8: nextword|=0x600; break;
1591 default: as_fatal("failed sanity check.");
1592 }
1593 /* IF its simple,
1594 GET US OUT OF HERE! */
1595
1596 /* Must be INDEX, with an index
1597 register. Address register
1598 cannot be ZERO-PC, and either
1599 :b was forced, or we know
1600 it will fit */
1601 if( opP->mode==AINDX
1602 && opP->reg!=FAIL
1603 && opP->reg!=ZPC
1604 && ( siz1==1
1605 || ( issbyte(baseo)
1606 && !isvar(opP->con1)))) {
1607 nextword +=baseo&0xff;
1608 addword(nextword);
1609 if(isvar(opP->con1))
1610 add_fix('B',opP->con1,0);
1611 break;
1612 }
1613 } else
1614 nextword|=0x40; /* No index reg */
1615
1616 /* It aint simple */
1617 nextword|=0x100;
1618 /* If the guy specified a width, we assume that
1619 it is wide enough. Maybe it isn't. If so, we lose
1620 */
1621 switch(siz1) {
1622 case 0:
1623 if(isvar(opP->con1) || !issword(baseo)) {
1624 siz1=3;
1625 nextword|=0x30;
1626 } else if(baseo==0)
1627 nextword|=0x10;
1628 else {
1629 nextword|=0x20;
1630 siz1=2;
1631 }
1632 break;
1633 case 1:
1634 as_warn("Byte dispacement won't work. Defaulting to :w");
1635 case 2:
1636 nextword|=0x20;
1637 break;
1638 case 3:
1639 nextword|=0x30;
1640 break;
1641 }
1642
1643 /* Figure out innner displacement stuff */
1644 if(opP->mode!=AINDX) {
1645 switch(siz2) {
1646 case 0:
1647 if(isvar(opP->con2) || !issword(outro)) {
1648 siz2=3;
1649 nextword|=0x3;
1650 } else if(outro==0)
1651 nextword|=0x1;
1652 else {
1653 nextword|=0x2;
1654 siz2=2;
1655 }
1656 break;
1657 case 1:
1658 as_warn("Byte dispacement won't work. Defaulting to :w");
1659 case 2:
1660 nextword|=0x2;
1661 break;
1662 case 3:
1663 nextword|=0x3;
1664 break;
1665 }
1666 if(opP->mode==APODX) nextword|=0x04;
1667 else if(opP->mode==AMIND) nextword|=0x40;
1668 }
1669 addword(nextword);
1670
1671 if(isvar(opP->con1)) {
1672 if(opP->reg==PC || opP->reg==ZPC) {
1673 add_fix(siz1==3 ? 'l' : 'w',opP->con1,1);
1674 opP->con1->e_exp.X_add_number+=6;
1675 } else
1676 add_fix(siz1==3 ? 'l' : 'w',opP->con1,0);
1677 }
1678 if(siz1==3)
1679 addword(baseo>>16);
1680 if(siz1)
1681 addword(baseo);
1682
1683 if(isvar(opP->con2)) {
1684 if(opP->reg==PC || opP->reg==ZPC) {
1685 add_fix(siz2==3 ? 'l' : 'w',opP->con2,1);
1686 opP->con1->e_exp.X_add_number+=6;
1687 } else
1688 add_fix(siz2==3 ? 'l' : 'w',opP->con2,0);
1689 }
1690 if(siz2==3)
1691 addword(outro>>16);
1692 if(siz2)
1693 addword(outro);
1694
1695 break;
1696
1697 case ABSL:
1698 nextword=get_num(opP->con1,80);
1699 switch(opP->con1->e_siz) {
1700 default:
1701 as_warn("Unknown size for absolute reference");
1702 case 0:
1703 if(!isvar(opP->con1) && issword(offs(opP->con1))) {
1704 tmpreg=0x38; /* 7.0 */
1705 addword(nextword);
1706 break;
1707 }
1708 /* Don't generate pc relative code
1709 on 68010 and 68000 */
1710 if(isvar(opP->con1)
1711 && !subs(opP->con1)
1712 && seg(opP->con1) == SEG_TEXT
1713 && now_seg == SEG_TEXT
1714 && cpu_of_arch(current_architecture) >= m68020
1715 && !flagseen['S']
1716 && !strchr("~%&$?", s[0])) {
1717 tmpreg=0x3A; /* 7.2 */
1718 add_frag(adds(opP->con1),
1719 offs(opP->con1),
1720 TAB(PCREL,SZ_UNDEF));
1721 break;
1722 }
1723 case 3: /* Fall through into long */
1724 if(isvar(opP->con1))
1725 add_fix('l',opP->con1,0);
1726
1727 tmpreg=0x39; /* 7.1 mode */
1728 addword(nextword>>16);
1729 addword(nextword);
1730 break;
1731
1732 case 2: /* Word */
1733 if(isvar(opP->con1))
1734 add_fix('w',opP->con1,0);
1735
1736 tmpreg=0x38; /* 7.0 mode */
1737 addword(nextword);
1738 break;
1739 }
1740 break;
1741 case MSCR:
1742 default:
1743 as_bad("unknown/incorrect operand");
1744 /* abort(); */
1745 }
1746 install_gen_operand(s[1],tmpreg);
1747 break;
1748
1749 case '#':
1750 case '^':
1751 switch(s[1]) { /* JF: I hate floating point! */
1752 case 'j':
1753 tmpreg=70;
1754 break;
1755 case '8':
1756 tmpreg=20;
1757 break;
1758 case 'C':
1759 tmpreg=50;
1760 break;
1761 case '3':
1762 default:
1763 tmpreg=80;
1764 break;
1765 }
1766 tmpreg=get_num(opP->con1,tmpreg);
1767 if(isvar(opP->con1))
1768 add_fix(s[1],opP->con1,0);
1769 switch(s[1]) {
1770 case 'b': /* Danger: These do no check for
1771 certain types of overflow.
1772 user beware! */
1773 if(!isbyte(tmpreg))
1774 opP->error="out of range";
1775 insop(tmpreg);
1776 if(isvar(opP->con1))
1777 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1778 break;
1779 case 'w':
1780 if(!isword(tmpreg))
1781 opP->error="out of range";
1782 insop(tmpreg);
1783 if(isvar(opP->con1))
1784 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1785 break;
1786 case 'l':
1787 insop(tmpreg); /* Because of the way insop works, we put these two out backwards */
1788 insop(tmpreg>>16);
1789 if(isvar(opP->con1))
1790 the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
1791 break;
1792 case '3':
1793 tmpreg&=0xFF;
1794 case '8':
1795 case 'C':
1796 install_operand(s[1],tmpreg);
1797 break;
1798 default:
1799 as_fatal("Internal error: Unknown mode #%c in line %s of file \"%s\"", s[1], __LINE__, __FILE__);
1800 }
1801 break;
1802
1803 case '+':
1804 case '-':
1805 case 'A':
1806 case 'a':
1807 install_operand(s[1],opP->reg-ADDR);
1808 break;
1809
1810 case 'B':
1811 tmpreg=get_num(opP->con1,80);
1812 switch(s[1]) {
1813 case 'B':
1814 /* Needs no offsetting */
1815 add_fix('B',opP->con1,1);
1816 break;
1817 case 'W':
1818 /* Offset the displacement to be relative to byte disp location */
1819 opP->con1->e_exp.X_add_number+=2;
1820 add_fix('w',opP->con1,1);
1821 addword(0);
1822 break;
1823 case 'L':
1824 long_branch:
1825 if (cpu_of_arch(current_architecture) < m68020) /* 68000 or 010 */
1826 as_warn("Can't use long branches on 68000/68010");
1827 the_ins.opcode[the_ins.numo-1]|=0xff;
1828 /* Offset the displacement to be relative to byte disp location */
1829 opP->con1->e_exp.X_add_number+=4;
1830 add_fix('l',opP->con1,1);
1831 addword(0);
1832 addword(0);
1833 break;
1834 case 'g':
1835 if(subs(opP->con1)) /* We can't relax it */
1836 goto long_branch;
1837
1838 /* This could either be a symbol, or an
1839 absolute address. No matter, the
1840 frag hacking will finger it out.
1841 Not quite: it can't switch from
1842 BRANCH to BCC68000 for the case
1843 where opnd is absolute (it needs
1844 to use the 68000 hack since no
1845 conditional abs jumps). */
1846 if (((cpu_of_arch(current_architecture) < m68020) || (0==adds(opP->con1)))
1847 && (the_ins.opcode[0] >= 0x6200)
1848 && (the_ins.opcode[0] <= 0x6f00)) {
1849 add_frag(adds(opP->con1),offs(opP->con1),TAB(BCC68000,SZ_UNDEF));
1850 } else {
1851 add_frag(adds(opP->con1),offs(opP->con1),TAB(BRANCH,SZ_UNDEF));
1852 }
1853 break;
1854 case 'w':
1855 if(isvar(opP->con1)) {
1856 /* check for DBcc instruction */
1857 if ((the_ins.opcode[0] & 0xf0f8) ==0x50c8) {
1858 /* size varies if patch */
1859 /* needed for long form */
1860 add_frag(adds(opP->con1),offs(opP->con1),TAB(DBCC,SZ_UNDEF));
1861 break;
1862 }
1863
1864 /* Don't ask! */
1865 opP->con1->e_exp.X_add_number+=2;
1866 add_fix('w',opP->con1,1);
1867 }
1868 addword(0);
1869 break;
1870 case 'C': /* Fixed size LONG coproc branches */
1871 the_ins.opcode[the_ins.numo-1]|=0x40;
1872 /* Offset the displacement to be relative to byte disp location */
1873 /* Coproc branches don't have a byte disp option, but they are
1874 compatible with the ordinary branches, which do... */
1875 opP->con1->e_exp.X_add_number+=4;
1876 add_fix('l',opP->con1,1);
1877 addword(0);
1878 addword(0);
1879 break;
1880 case 'c': /* Var size Coprocesssor branches */
1881 if(subs(opP->con1)) {
1882 add_fix('l',opP->con1,1);
1883 add_frag((symbolS *)0,(long)0,TAB(FBRANCH,LONG));
1884 } else if(adds(opP->con1)) {
1885 add_frag(adds(opP->con1),offs(opP->con1),TAB(FBRANCH,SZ_UNDEF));
1886 } else {
1887 /* add_frag((symbolS *)0,offs(opP->con1),TAB(FBRANCH,SHORT)); */
1888 the_ins.opcode[the_ins.numo-1]|=0x40;
1889 add_fix('l',opP->con1,1);
1890 addword(0);
1891 addword(4);
1892 }
1893 break;
1894 default:
1895 as_fatal("Internal error: operand type B%c unknown in line %s of file \"%s\"",
1896 s[1], __LINE__, __FILE__);
1897 }
1898 break;
1899
1900 case 'C': /* Ignore it */
1901 break;
1902
1903 case 'd': /* JF this is a kludge */
1904 if(opP->mode==AOFF) {
1905 install_operand('s',opP->reg-ADDR);
1906 } else {
1907 char *tmpP;
1908
1909 tmpP=opP->con1->e_end-2;
1910 opP->con1->e_beg++;
1911 opP->con1->e_end-=4; /* point to the , */
1912 baseo=m68k_reg_parse(&tmpP);
1913 if(baseo<ADDR+0 || baseo>ADDR+7) {
1914 as_bad("Unknown address reg, using A0");
1915 baseo=0;
1916 } else baseo-=ADDR;
1917 install_operand('s',baseo);
1918 }
1919 tmpreg=get_num(opP->con1,80);
1920 if(!issword(tmpreg)) {
1921 as_warn("Expression out of range, using 0");
1922 tmpreg=0;
1923 }
1924 addword(tmpreg);
1925 break;
1926
1927 case 'D':
1928 install_operand(s[1],opP->reg-DATA);
1929 break;
1930
1931 case 'F':
1932 install_operand(s[1],opP->reg-FPREG);
1933 break;
1934
1935 case 'I':
1936 tmpreg=1+opP->reg-COPNUM;
1937 if(tmpreg==8)
1938 tmpreg=0;
1939 install_operand(s[1],tmpreg);
1940 break;
1941
1942 case 'J': /* JF foo */
1943 switch(opP->reg) {
1944 case SFC: tmpreg=0x000; break;
1945 case DFC: tmpreg=0x001; break;
1946 case CACR: tmpreg=0x002; break;
1947 case TC: tmpreg=0x003; break;
1948 case ITT0: tmpreg=0x004; break;
1949 case ITT1: tmpreg=0x005; break;
1950 case DTT0: tmpreg=0x006; break;
1951 case DTT1: tmpreg=0x007; break;
1952
1953 case USP: tmpreg=0x800; break;
1954 case VBR: tmpreg=0x801; break;
1955 case CAAR: tmpreg=0x802; break;
1956 case MSP: tmpreg=0x803; break;
1957 case ISP: tmpreg=0x804; break;
1958 case MMUSR: tmpreg=0x805; break;
1959 case URP: tmpreg=0x806; break;
1960 case SRP: tmpreg=0x807; break;
1961 default:
1962 as_fatal("failed sanity check.");
1963 }
1964 install_operand(s[1],tmpreg);
1965 break;
1966
1967 case 'k':
1968 tmpreg=get_num(opP->con1,55);
1969 install_operand(s[1],tmpreg&0x7f);
1970 break;
1971
1972 case 'l':
1973 tmpreg=opP->reg;
1974 if(s[1]=='w') {
1975 if(tmpreg&0x7FF0000)
1976 as_bad("Floating point register in register list");
1977 insop(reverse_16_bits(tmpreg));
1978 } else {
1979 if(tmpreg&0x700FFFF)
1980 as_bad("Wrong register in floating-point reglist");
1981 install_operand(s[1],reverse_8_bits(tmpreg>>16));
1982 }
1983 break;
1984
1985 case 'L':
1986 tmpreg=opP->reg;
1987 if(s[1]=='w') {
1988 if(tmpreg&0x7FF0000)
1989 as_bad("Floating point register in register list");
1990 insop(tmpreg);
1991 } else if(s[1]=='8') {
1992 if(tmpreg&0x0FFFFFF)
1993 as_bad("incorrect register in reglist");
1994 install_operand(s[1],tmpreg>>24);
1995 } else {
1996 if(tmpreg&0x700FFFF)
1997 as_bad("wrong register in floating-point reglist");
1998 else
1999 install_operand(s[1],tmpreg>>16);
2000 }
2001 break;
2002
2003 case 'M':
2004 install_operand(s[1],get_num(opP->con1,60));
2005 break;
2006
2007 case 'O':
2008 tmpreg= (opP->mode==DREG)
2009 ? 0x20+opP->reg-DATA
2010 : (get_num(opP->con1,40)&0x1F);
2011 install_operand(s[1],tmpreg);
2012 break;
2013
2014 case 'Q':
2015 tmpreg=get_num(opP->con1,10);
2016 if(tmpreg==8)
2017 tmpreg=0;
2018 install_operand(s[1],tmpreg);
2019 break;
2020
2021 case 'R':
2022 /* This depends on the fact that ADDR registers are
2023 eight more than their corresponding DATA regs, so
2024 the result will have the ADDR_REG bit set */
2025 install_operand(s[1],opP->reg-DATA);
2026 break;
2027
2028 case 's':
2029 if(opP->reg==FPI) tmpreg=0x1;
2030 else if(opP->reg==FPS) tmpreg=0x2;
2031 else if(opP->reg==FPC) tmpreg=0x4;
2032 else as_fatal("failed sanity check.");
2033 install_operand(s[1],tmpreg);
2034 break;
2035
2036 case 'S': /* Ignore it */
2037 break;
2038
2039 case 'T':
2040 install_operand(s[1],get_num(opP->con1,30));
2041 break;
2042
2043 case 'U': /* Ignore it */
2044 break;
2045
2046 case 'c':
2047 switch (opP->reg) {
2048 case NC: tmpreg = 0; break;
2049 case DC: tmpreg = 1; break;
2050 case IC: tmpreg = 2; break;
2051 case BC: tmpreg = 3; break;
2052 default:
2053 as_fatal("failed sanity check");
2054 } /* switch on cache token */
2055 install_operand(s[1], tmpreg);
2056 break;
2057 #ifndef NO_68851
2058 /* JF: These are out of order, I fear. */
2059 case 'f':
2060 switch (opP->reg) {
2061 case SFC:
2062 tmpreg=0;
2063 break;
2064 case DFC:
2065 tmpreg=1;
2066 break;
2067 default:
2068 as_fatal("failed sanity check.");
2069 }
2070 install_operand(s[1],tmpreg);
2071 break;
2072
2073 case 'P':
2074 switch(opP->reg) {
2075 case TC:
2076 tmpreg=0;
2077 break;
2078 case CAL:
2079 tmpreg=4;
2080 break;
2081 case VAL:
2082 tmpreg=5;
2083 break;
2084 case SCC:
2085 tmpreg=6;
2086 break;
2087 case AC:
2088 tmpreg=7;
2089 break;
2090 default:
2091 as_fatal("failed sanity check.");
2092 }
2093 install_operand(s[1],tmpreg);
2094 break;
2095
2096 case 'V':
2097 if (opP->reg == VAL)
2098 break;
2099 as_fatal("failed sanity check.");
2100
2101 case 'W':
2102 switch(opP->reg) {
2103
2104 case DRP:
2105 tmpreg=1;
2106 break;
2107 case SRP:
2108 tmpreg=2;
2109 break;
2110 case CRP:
2111 tmpreg=3;
2112 break;
2113 default:
2114 as_fatal("failed sanity check.");
2115 }
2116 install_operand(s[1],tmpreg);
2117 break;
2118
2119 case 'X':
2120 switch (opP->reg) {
2121 case BAD: case BAD+1: case BAD+2: case BAD+3:
2122 case BAD+4: case BAD+5: case BAD+6: case BAD+7:
2123 tmpreg = (4 << 10) | ((opP->reg - BAD) << 2);
2124 break;
2125
2126 case BAC: case BAC+1: case BAC+2: case BAC+3:
2127 case BAC+4: case BAC+5: case BAC+6: case BAC+7:
2128 tmpreg = (5 << 10) | ((opP->reg - BAC) << 2);
2129 break;
2130
2131 default:
2132 as_fatal("failed sanity check.");
2133 }
2134 install_operand(s[1], tmpreg);
2135 break;
2136 case 'Y':
2137 know(opP->reg == PSR);
2138 break;
2139 case 'Z':
2140 know(opP->reg == PCSR);
2141 break;
2142 #endif /* m68851 */
2143 case '_':
2144 tmpreg=get_num(opP->con1,80);
2145 install_operand(s[1], tmpreg);
2146 break;
2147 default:
2148 as_fatal("Internal error: Operand type %c unknown in line %s of file \"%s\"", s[0], __LINE__, __FILE__);
2149 }
2150 }
2151 /* By the time whe get here (FINALLY) the_ins contains the complete
2152 instruction, ready to be emitted. . . */
2153 } /* m68k_ip() */
2154
2155 /*
2156 * get_regs := '/' + ?
2157 * | '-' + <register>
2158 * | '-' + <register> + ?
2159 * | <empty>
2160 * ;
2161 *
2162
2163 * The idea here must be to scan in a set of registers but I don't
2164 * understand it. Looks awfully sloppy to me but I don't have any doc on
2165 * this format so...
2166
2167 *
2168 *
2169 */
2170
2171 static int get_regs(i,str,opP)
2172 int i;
2173 struct m68k_op *opP;
2174 char *str;
2175 {
2176 /* 26, 25, 24, 23-16, 15-8, 0-7 */
2177 /* Low order 24 bits encoded fpc,fps,fpi,fp7-fp0,a7-a0,d7-d0 */
2178 unsigned long cur_regs = 0;
2179 int reg1,
2180 reg2;
2181
2182 #define ADD_REG(x) { if(x==FPI) cur_regs|=(1<<24);\
2183 else if(x==FPS) cur_regs|=(1<<25);\
2184 else if(x==FPC) cur_regs|=(1<<26);\
2185 else cur_regs|=(1<<(x-1)); }
2186
2187 reg1=i;
2188 for(;;) {
2189 if(*str=='/') {
2190 ADD_REG(reg1);
2191 str++;
2192 } else if(*str=='-') {
2193 str++;
2194 reg2=m68k_reg_parse(&str);
2195 if(reg2<DATA || reg2>=FPREG+8 || reg1==FPI || reg1==FPS || reg1==FPC) {
2196 opP->error="unknown register in register list";
2197 return FAIL;
2198 }
2199 while(reg1<=reg2) {
2200 ADD_REG(reg1);
2201 reg1++;
2202 }
2203 if(*str=='\0')
2204 break;
2205 } else if(*str=='\0') {
2206 ADD_REG(reg1);
2207 break;
2208 } else {
2209 opP->error="unknow character in register list";
2210 return FAIL;
2211 }
2212 /* DJA -- Bug Fix. Did't handle d1-d2/a1 until the following instruction was added */
2213 if (*str=='/')
2214 str ++;
2215 reg1=m68k_reg_parse(&str);
2216 if((reg1<DATA || reg1>=FPREG+8) && !(reg1==FPI || reg1==FPS || reg1==FPC)) {
2217 opP->error="unknown register in register list";
2218 return FAIL;
2219 }
2220 }
2221 opP->reg=cur_regs;
2222 return OK;
2223 } /* get_regs() */
2224
2225 static int reverse_16_bits(in)
2226 int in;
2227 {
2228 int out=0;
2229 int n;
2230
2231 static int mask[16] = {
2232 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2233 0x0100,0x0200,0x0400,0x0800,0x1000,0x2000,0x4000,0x8000
2234 };
2235 for(n=0;n<16;n++) {
2236 if(in&mask[n])
2237 out|=mask[15-n];
2238 }
2239 return out;
2240 } /* reverse_16_bits() */
2241
2242 static int reverse_8_bits(in)
2243 int in;
2244 {
2245 int out=0;
2246 int n;
2247
2248 static int mask[8] = {
2249 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2250 };
2251
2252 for(n=0;n<8;n++) {
2253 if(in&mask[n])
2254 out|=mask[7-n];
2255 }
2256 return out;
2257 } /* reverse_8_bits() */
2258
2259 static void install_operand(mode,val)
2260 int mode;
2261 int val;
2262 {
2263 switch(mode) {
2264 case 's':
2265 the_ins.opcode[0]|=val & 0xFF; /* JF FF is for M kludge */
2266 break;
2267 case 'd':
2268 the_ins.opcode[0]|=val<<9;
2269 break;
2270 case '1':
2271 the_ins.opcode[1]|=val<<12;
2272 break;
2273 case '2':
2274 the_ins.opcode[1]|=val<<6;
2275 break;
2276 case '3':
2277 the_ins.opcode[1]|=val;
2278 break;
2279 case '4':
2280 the_ins.opcode[2]|=val<<12;
2281 break;
2282 case '5':
2283 the_ins.opcode[2]|=val<<6;
2284 break;
2285 case '6':
2286 /* DANGER! This is a hack to force cas2l and cas2w cmds
2287 to be three words long! */
2288 the_ins.numo++;
2289 the_ins.opcode[2]|=val;
2290 break;
2291 case '7':
2292 the_ins.opcode[1]|=val<<7;
2293 break;
2294 case '8':
2295 the_ins.opcode[1]|=val<<10;
2296 break;
2297 #ifndef NO_68851
2298 case '9':
2299 the_ins.opcode[1]|=val<<5;
2300 break;
2301 #endif
2302
2303 case 't':
2304 the_ins.opcode[1]|=(val<<10)|(val<<7);
2305 break;
2306 case 'D':
2307 the_ins.opcode[1]|=(val<<12)|val;
2308 break;
2309 case 'g':
2310 the_ins.opcode[0]|=val=0xff;
2311 break;
2312 case 'i':
2313 the_ins.opcode[0]|=val<<9;
2314 break;
2315 case 'C':
2316 the_ins.opcode[1]|=val;
2317 break;
2318 case 'j':
2319 the_ins.opcode[1]|=val;
2320 the_ins.numo++; /* What a hack */
2321 break;
2322 case 'k':
2323 the_ins.opcode[1]|=val<<4;
2324 break;
2325 case 'b':
2326 case 'w':
2327 case 'l':
2328 break;
2329 case 'e':
2330 the_ins.opcode[0] |= (val << 6);
2331 break;
2332 case 'L':
2333 the_ins.opcode[1] = (val >> 16);
2334 the_ins.opcode[2] = val & 0xffff;
2335 break;
2336 case 'c':
2337 default:
2338 as_fatal("failed sanity check.");
2339 }
2340 } /* install_operand() */
2341
2342 static void install_gen_operand(mode,val)
2343 int mode;
2344 int val;
2345 {
2346 switch(mode) {
2347 case 's':
2348 the_ins.opcode[0]|=val;
2349 break;
2350 case 'd':
2351 /* This is a kludge!!! */
2352 the_ins.opcode[0]|=(val&0x07)<<9|(val&0x38)<<3;
2353 break;
2354 case 'b':
2355 case 'w':
2356 case 'l':
2357 case 'f':
2358 case 'F':
2359 case 'x':
2360 case 'p':
2361 the_ins.opcode[0]|=val;
2362 break;
2363 /* more stuff goes here */
2364 default:
2365 as_fatal("failed sanity check.");
2366 }
2367 } /* install_gen_operand() */
2368
2369 /*
2370 * verify that we have some number of paren pairs, do m68k_ip_op(), and
2371 * then deal with the bitfield hack.
2372 */
2373
2374 static char *crack_operand(str,opP)
2375 register char *str;
2376 register struct m68k_op *opP;
2377 {
2378 register int parens;
2379 register int c;
2380 register char *beg_str;
2381
2382 if(!str) {
2383 return str;
2384 }
2385 beg_str=str;
2386 for(parens=0;*str && (parens>0 || notend(str));str++) {
2387 if(*str=='(') parens++;
2388 else if(*str==')') {
2389 if(!parens) { /* ERROR */
2390 opP->error="Extra )";
2391 return str;
2392 }
2393 --parens;
2394 }
2395 }
2396 if(!*str && parens) { /* ERROR */
2397 opP->error="Missing )";
2398 return str;
2399 }
2400 c= *str;
2401 *str='\0';
2402 if(m68k_ip_op(beg_str,opP)==FAIL) {
2403 *str=c;
2404 return str;
2405 }
2406 *str=c;
2407 if(c=='}')
2408 c= *++str; /* JF bitfield hack */
2409 if(c) {
2410 c= *++str;
2411 if(!c)
2412 as_bad("Missing operand");
2413 }
2414 return str;
2415 }
2416
2417 /* See the comment up above where the #define notend(... is */
2418 #if 0
2419 notend(s)
2420 char *s;
2421 {
2422 if(*s==',') return 0;
2423 if(*s=='{' || *s=='}')
2424 return 0;
2425 if(*s!=':') return 1;
2426 /* This kludge here is for the division cmd, which is a kludge */
2427 if(index("aAdD#",s[1])) return 0;
2428 return 1;
2429 }
2430 #endif
2431
2432 /* This is the guts of the machine-dependent assembler. STR points to a
2433 machine dependent instruction. This function is supposed to emit
2434 the frags/bytes it assembles to.
2435 */
2436
2437 void
2438 insert_reg(regname, regnum)
2439 char *regname;
2440 int regnum;
2441 {
2442 char buf[100];
2443 int i;
2444 symbol_table_insert(symbol_new(regname, SEG_REGISTER, regnum, &zero_address_frag));
2445
2446 for (i = 0; regname[i]; i++)
2447 buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
2448 buf[i] = '\0';
2449
2450 symbol_table_insert(symbol_new(buf, SEG_REGISTER, regnum, &zero_address_frag));
2451 }
2452
2453 static struct {
2454 char *name;
2455 int number;
2456 } init_table[] =
2457 {
2458 "d0", DATA0,
2459 "d1", DATA1,
2460 "d2", DATA2,
2461 "d3", DATA3,
2462 "d4", DATA4,
2463 "d5", DATA5,
2464 "d6", DATA6,
2465 "d7", DATA7,
2466 "a0", ADDR0,
2467 "a1", ADDR1,
2468 "a2", ADDR2,
2469 "a3", ADDR3,
2470 "a4", ADDR4,
2471 "a5", ADDR5,
2472 "a6", ADDR6,
2473 "fp", ADDR6,
2474 "a7", ADDR7,
2475 "sp", ADDR7,
2476 "fp0", FP0,
2477 "fp1", FP1,
2478 "fp2", FP2,
2479 "fp3", FP3,
2480 "fp4", FP4,
2481 "fp5", FP5,
2482 "fp6", FP6,
2483 "fp7", FP7,
2484 "fpi", FPI,
2485 "fpiar", FPI,
2486 "fpc", FPI,
2487 "fps", FPS,
2488 "fpsr", FPS,
2489 "fpc", FPC,
2490 "fpcr", FPC,
2491
2492 "cop0", COP0,
2493 "cop1", COP1,
2494 "cop2", COP2,
2495 "cop3", COP3,
2496 "cop4", COP4,
2497 "cop5", COP5,
2498 "cop6", COP6,
2499 "cop7", COP7,
2500 "pc", PC,
2501 "zpc", ZPC,
2502 "sr", SR,
2503
2504 "ccr", CCR,
2505 "cc", CCR,
2506
2507 "usp", USP,
2508 "isp", ISP,
2509 "sfc", SFC,
2510 "dfc", DFC,
2511 "cacr", CACR,
2512 "caar", CAAR,
2513
2514 "vbr", VBR,
2515
2516 "msp", MSP,
2517 "itt0", ITT0,
2518 "itt1", ITT1,
2519 "dtt0", DTT0,
2520 "dtt1", DTT1,
2521 "mmusr", MMUSR,
2522 "tc", TC,
2523 "srp", SRP,
2524 "urp", URP,
2525
2526 #ifndef NO_68851
2527 "ac", AC,
2528 "bc", BC,
2529 "cal", CAL,
2530 "crp", CRP,
2531 "drp", DRP,
2532 "pcsr", PCSR,
2533 "psr", PSR,
2534 "scc", SCC,
2535 "val", VAL,
2536 "bad0", BAD0,
2537 "bad1", BAD1,
2538 "bad2", BAD2,
2539 "bad3", BAD3,
2540 "bad4", BAD4,
2541 "bad5", BAD5,
2542 "bad6", BAD6,
2543 "bad7", BAD7,
2544 "bac0", BAC0,
2545 "bac1", BAC1,
2546 "bac2", BAC2,
2547 "bac3", BAC3,
2548 "bac4", BAC4,
2549 "bac5", BAC5,
2550 "bac6", BAC6,
2551 "bac7", BAC7,
2552 #endif
2553
2554 "ic", IC,
2555 "dc", DC,
2556 "nc", NC,
2557
2558 0,
2559
2560 };
2561
2562
2563 void
2564 init_regtable()
2565 {
2566 int i;
2567 for (i = 0; init_table[i].name; i++)
2568 {
2569 insert_reg(init_table[i].name, init_table[i].number);
2570 }
2571 }
2572
2573
2574 void
2575 md_assemble(str)
2576 char *str;
2577 {
2578 char *er;
2579 short *fromP;
2580 char *toP = NULL;
2581 int m,n = 0;
2582 char *to_beg_P;
2583 int shorts_this_frag;
2584
2585
2586 if (current_architecture == 0)
2587 current_architecture = (m68020
2588 #ifndef NO_68881
2589 | m68881
2590 #endif
2591 #ifndef NO_68851
2592 | m68851
2593 #endif
2594 );
2595 /* If only float and mmu were specified, default cpu. */
2596 else if (cpu_of_arch (current_architecture) == 0)
2597 current_architecture |= m68020;
2598
2599 memset((char *)(&the_ins), '\0', sizeof(the_ins)); /* JF for paranoia sake */
2600 m68k_ip(str);
2601 er=the_ins.error;
2602 if(!er) {
2603 for(n=the_ins.numargs;n;--n)
2604 if(the_ins.operands[n].error) {
2605 er=the_ins.operands[n].error;
2606 break;
2607 }
2608 }
2609 if(er) {
2610 as_bad("%s -- statement `%s' ignored",er,str);
2611 return;
2612 }
2613
2614 if(the_ins.nfrag==0) { /* No frag hacking involved; just put it out */
2615 toP=frag_more(2*the_ins.numo);
2616 fromP= &the_ins.opcode[0];
2617 for(m=the_ins.numo;m;--m) {
2618 md_number_to_chars(toP,(long)(*fromP),2);
2619 toP+=2;
2620 fromP++;
2621 }
2622 /* put out symbol-dependent info */
2623 for(m=0;m<the_ins.nrel;m++) {
2624 switch(the_ins.reloc[m].wid) {
2625 case 'B':
2626 n=1;
2627 break;
2628 case 'b':
2629 n=1;
2630 break;
2631 case '3':
2632 n=2;
2633 break;
2634 case 'w':
2635 n=2;
2636 break;
2637 case 'l':
2638 n=4;
2639 break;
2640 default:
2641 as_fatal("Don't know how to figure width of %c in md_assemble()",the_ins.reloc[m].wid);
2642 }
2643
2644 fix_new(frag_now,
2645 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2646 n,
2647 the_ins.reloc[m].add,
2648 the_ins.reloc[m].sub,
2649 the_ins.reloc[m].off,
2650 the_ins.reloc[m].pcrel,
2651 NO_RELOC);
2652 }
2653 return;
2654 }
2655
2656 /* There's some frag hacking */
2657 for(n=0,fromP= &the_ins.opcode[0];n<the_ins.nfrag;n++) {
2658 int wid;
2659
2660 if(n==0) wid=2*the_ins.fragb[n].fragoff;
2661 else wid=2*(the_ins.numo-the_ins.fragb[n-1].fragoff);
2662 toP=frag_more(wid);
2663 to_beg_P=toP;
2664 shorts_this_frag=0;
2665 for(m=wid/2;m;--m) {
2666 md_number_to_chars(toP,(long)(*fromP),2);
2667 toP+=2;
2668 fromP++;
2669 shorts_this_frag++;
2670 }
2671 for(m=0;m<the_ins.nrel;m++) {
2672 if((the_ins.reloc[m].n)>= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */) {
2673 the_ins.reloc[m].n-= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */;
2674 break;
2675 }
2676 wid=the_ins.reloc[m].wid;
2677 if(wid==0)
2678 continue;
2679 the_ins.reloc[m].wid=0;
2680 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2681
2682 fix_new(frag_now,
2683 (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
2684 wid,
2685 the_ins.reloc[m].add,
2686 the_ins.reloc[m].sub,
2687 the_ins.reloc[m].off,
2688 the_ins.reloc[m].pcrel,
2689 NO_RELOC);
2690 }
2691 /* know(the_ins.fragb[n].fadd); */
2692 (void)frag_var(rs_machine_dependent,10,0,(relax_substateT)(the_ins.fragb[n].fragty),
2693 the_ins.fragb[n].fadd,the_ins.fragb[n].foff,to_beg_P);
2694 }
2695 n=(the_ins.numo-the_ins.fragb[n-1].fragoff);
2696 shorts_this_frag=0;
2697 if(n) {
2698 toP=frag_more(n*sizeof(short));
2699 while(n--) {
2700 md_number_to_chars(toP,(long)(*fromP),2);
2701 toP+=2;
2702 fromP++;
2703 shorts_this_frag++;
2704 }
2705 }
2706 for(m=0;m<the_ins.nrel;m++) {
2707 int wid;
2708
2709 wid=the_ins.reloc[m].wid;
2710 if(wid==0)
2711 continue;
2712 the_ins.reloc[m].wid=0;
2713 wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
2714
2715 fix_new(frag_now,
2716 (the_ins.reloc[m].n + toP-frag_now->fr_literal)-/* the_ins.numo */ shorts_this_frag*2,
2717 wid,
2718 the_ins.reloc[m].add,
2719 the_ins.reloc[m].sub,
2720 the_ins.reloc[m].off,
2721 the_ins.reloc[m].pcrel,
2722 NO_RELOC);
2723 }
2724 }
2725
2726
2727
2728
2729
2730 void
2731 md_begin()
2732 {
2733 /*
2734 * md_begin -- set up hash tables with 68000 instructions.
2735 * similar to what the vax assembler does. ---phr
2736 */
2737 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
2738 a copy of it at runtime, adding in the information we want but isn't
2739 there. I think it'd be better to have an awk script hack the table
2740 at compile time. Or even just xstr the table and use it as-is. But
2741 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
2742 names. */
2743
2744 register const struct m68k_opcode *ins;
2745 register struct m68k_incant *hack,
2746 *slak;
2747 register char *retval = 0; /* empty string, or error msg text */
2748 register unsigned int i;
2749 register char c;
2750
2751 if ((op_hash = hash_new()) == NULL)
2752 as_fatal("Virtual memory exhausted");
2753
2754 obstack_begin(&robyn,4000);
2755 for (ins = m68k_opcodes; ins < endop; ins++) {
2756 hack=slak=(struct m68k_incant *)obstack_alloc(&robyn,sizeof(struct m68k_incant));
2757 do {
2758 /* we *could* ignore insns that don't match our
2759 arch here but just leaving them out of the
2760 hash. */
2761 slak->m_operands=ins->args;
2762 slak->m_opnum=strlen(slak->m_operands)/2;
2763 slak->m_arch = ins->arch;
2764 slak->m_opcode=ins->opcode;
2765 /* This is kludgey */
2766 slak->m_codenum=((ins->match)&0xffffL) ? 2 : 1;
2767 if((ins+1)!=endop && !strcmp(ins->name,(ins+1)->name)) {
2768 slak->m_next=(struct m68k_incant *) obstack_alloc(&robyn,sizeof(struct m68k_incant));
2769 ins++;
2770 } else
2771 slak->m_next=0;
2772 slak=slak->m_next;
2773 } while(slak);
2774
2775 retval = hash_insert (op_hash, ins->name,(char *)hack);
2776 /* Didn't his mommy tell him about null pointers? */
2777 if(retval && *retval)
2778 as_fatal("Internal Error: Can't hash %s: %s",ins->name,retval);
2779 }
2780
2781 for (i = 0; i < sizeof(mklower_table) ; i++)
2782 mklower_table[i] = (isupper(c = (char) i)) ? tolower(c) : c;
2783
2784 for (i = 0 ; i < sizeof(notend_table) ; i++) {
2785 notend_table[i] = 0;
2786 alt_notend_table[i] = 0;
2787 }
2788 notend_table[','] = 1;
2789 notend_table['{'] = 1;
2790 notend_table['}'] = 1;
2791 alt_notend_table['a'] = 1;
2792 alt_notend_table['A'] = 1;
2793 alt_notend_table['d'] = 1;
2794 alt_notend_table['D'] = 1;
2795 alt_notend_table['#'] = 1;
2796 alt_notend_table['f'] = 1;
2797 alt_notend_table['F'] = 1;
2798 #ifdef REGISTER_PREFIX
2799 alt_notend_table[REGISTER_PREFIX] = 1;
2800 #endif
2801
2802 init_regtable();
2803 }
2804
2805 #if 0
2806 #define notend(s) ((*s == ',' || *s == '}' || *s == '{' \
2807 || (*s == ':' && strchr("aAdD#", s[1]))) \
2808 ? 0 : 1)
2809 #endif
2810
2811 /* This funciton is called once, before the assembler exits. It is
2812 supposed to do any final cleanup for this part of the assembler.
2813 */
2814 void
2815 md_end()
2816 {
2817 }
2818
2819 /* Equal to MAX_PRECISION in atof-ieee.c */
2820 #define MAX_LITTLENUMS 6
2821
2822 /* Turn a string in input_line_pointer into a floating point constant of type
2823 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
2824 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
2825 */
2826 char *
2827 md_atof(type,litP,sizeP)
2828 char type;
2829 char *litP;
2830 int *sizeP;
2831 {
2832 int prec;
2833 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2834 LITTLENUM_TYPE *wordP;
2835 char *t;
2836 char *atof_ieee();
2837
2838 switch(type) {
2839 case 'f':
2840 case 'F':
2841 case 's':
2842 case 'S':
2843 prec = 2;
2844 break;
2845
2846 case 'd':
2847 case 'D':
2848 case 'r':
2849 case 'R':
2850 prec = 4;
2851 break;
2852
2853 case 'x':
2854 case 'X':
2855 prec = 6;
2856 break;
2857
2858 case 'p':
2859 case 'P':
2860 prec = 6;
2861 break;
2862
2863 default:
2864 *sizeP=0;
2865 return "Bad call to MD_ATOF()";
2866 }
2867 t=atof_ieee(input_line_pointer,type,words);
2868 if(t)
2869 input_line_pointer=t;
2870
2871 *sizeP=prec * sizeof(LITTLENUM_TYPE);
2872 for(wordP=words;prec--;) {
2873 md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
2874 litP+=sizeof(LITTLENUM_TYPE);
2875 }
2876 return ""; /* Someone should teach Dean about null pointers */
2877 }
2878
2879 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
2880 for use in the a.out file, and stores them in the array pointed to by buf.
2881 This knows about the endian-ness of the target machine and does
2882 THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
2883 2 (short) and 4 (long) Floating numbers are put out as a series of
2884 LITTLENUMS (shorts, here at least)
2885 */
2886 void
2887 md_number_to_chars(buf,val,n)
2888 char *buf;
2889 long val;
2890 int n;
2891 {
2892 switch(n) {
2893 case 1:
2894 *buf++=val;
2895 break;
2896 case 2:
2897 *buf++=(val>>8);
2898 *buf++=val;
2899 break;
2900 case 4:
2901 *buf++=(val>>24);
2902 *buf++=(val>>16);
2903 *buf++=(val>>8);
2904 *buf++=val;
2905 break;
2906 default:
2907 as_fatal("failed sanity check.");
2908 }
2909 }
2910
2911 void
2912 md_apply_fix(fixP, val)
2913 fixS *fixP;
2914 long val;
2915 {
2916 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2917
2918 switch(fixP->fx_size) {
2919 case 1:
2920 *buf++=val;
2921 break;
2922 case 2:
2923 *buf++=(val>>8);
2924 *buf++=val;
2925 break;
2926 case 4:
2927 *buf++=(val>>24);
2928 *buf++=(val>>16);
2929 *buf++=(val>>8);
2930 *buf++=val;
2931 break;
2932 default:
2933 BAD_CASE (fixP->fx_size);
2934 }
2935 }
2936
2937
2938 /* *fragP has been relaxed to its final size, and now needs to have
2939 the bytes inside it modified to conform to the new size There is UGLY
2940 MAGIC here. ..
2941 */
2942 void
2943 md_convert_frag(headers, fragP)
2944 object_headers *headers;
2945 register fragS *fragP;
2946 {
2947 long disp;
2948 long ext = 0;
2949
2950 /* Address in object code of the displacement. */
2951 register int object_address = fragP -> fr_fix + fragP -> fr_address;
2952
2953 #ifdef IBM_COMPILER_SUX
2954 /* This is wrong but it convinces the native rs6000 compiler to
2955 generate the code we want. */
2956 register char *buffer_address = fragP -> fr_literal;
2957 buffer_address += fragP -> fr_fix;
2958 #else /* IBM_COMPILER_SUX */
2959 /* Address in gas core of the place to store the displacement. */
2960 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
2961 #endif /* IBM_COMPILER_SUX */
2962
2963 /* No longer true: know(fragP->fr_symbol); */
2964
2965 /* The displacement of the address, from current location. */
2966 disp = fragP->fr_symbol ? S_GET_VALUE(fragP->fr_symbol) : 0;
2967 disp = (disp + fragP->fr_offset) - object_address;
2968
2969 switch(fragP->fr_subtype) {
2970 case TAB(BCC68000,BYTE):
2971 case TAB(BRANCH,BYTE):
2972 know(issbyte(disp));
2973 if(disp==0)
2974 as_bad("short branch with zero offset: use :w");
2975 fragP->fr_opcode[1]=disp;
2976 ext=0;
2977 break;
2978 case TAB(DBCC,SHORT):
2979 know(issword(disp));
2980 ext=2;
2981 break;
2982 case TAB(BCC68000,SHORT):
2983 case TAB(BRANCH,SHORT):
2984 know(issword(disp));
2985 fragP->fr_opcode[1]=0x00;
2986 ext=2;
2987 break;
2988 case TAB(BRANCH,LONG):
2989 if (cpu_of_arch(current_architecture) < m68020) {
2990 if (fragP->fr_opcode[0]==0x61) {
2991 fragP->fr_opcode[0]= 0x4E;
2992 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
2993 subseg_change(SEG_TEXT, 0);
2994
2995 fix_new(fragP,
2996 fragP->fr_fix,
2997 4,
2998 fragP->fr_symbol,
2999 0,
3000 fragP->fr_offset,
3001 0,
3002 NO_RELOC);
3003
3004 fragP->fr_fix+=4;
3005 ext=0;
3006 } else if (fragP->fr_opcode[0]==0x60) {
3007 fragP->fr_opcode[0]= 0x4E;
3008 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3009 subseg_change(SEG_TEXT, 0);
3010 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset,0,
3011 NO_RELOC);
3012 fragP->fr_fix+=4;
3013 ext=0;
3014 } else {
3015 as_bad("Long branch offset not supported.");
3016 }
3017 } else {
3018 fragP->fr_opcode[1]=0xff;
3019 ext=4;
3020 }
3021 break;
3022 case TAB(BCC68000,LONG):
3023 /* only Bcc 68000 instructions can come here */
3024 /* change bcc into b!cc/jmp absl long */
3025 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
3026 fragP->fr_opcode[1] = 0x6; /* branch offset = 6 */
3027
3028 /* JF: these used to be fr_opcode[2,3], but they may be in a
3029 different frag, in which case refering to them is a no-no.
3030 Only fr_opcode[0,1] are guaranteed to work. */
3031 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
3032 *buffer_address++ = 0xf9;
3033 fragP->fr_fix += 2; /* account for jmp instruction */
3034 subseg_change(SEG_TEXT,0);
3035 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3036 fragP->fr_offset,0,
3037 NO_RELOC);
3038 fragP->fr_fix += 4;
3039 ext=0;
3040 break;
3041 case TAB(DBCC,LONG):
3042 /* only DBcc 68000 instructions can come here */
3043 /* change dbcc into dbcc/jmp absl long */
3044 /* JF: these used to be fr_opcode[2-7], but that's wrong */
3045 *buffer_address++ = 0x00; /* branch offset = 4 */
3046 *buffer_address++ = 0x04;
3047 *buffer_address++ = 0x60; /* put in bra pc+6 */
3048 *buffer_address++ = 0x06;
3049 *buffer_address++ = 0x4e; /* put in jmp long (0x4ef9) */
3050 *buffer_address++ = 0xf9;
3051
3052 fragP->fr_fix += 6; /* account for bra/jmp instructions */
3053 subseg_change(SEG_TEXT,0);
3054 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3055 fragP->fr_offset,0,
3056 NO_RELOC);
3057 fragP->fr_fix += 4;
3058 ext=0;
3059 break;
3060 case TAB(FBRANCH,SHORT):
3061 know((fragP->fr_opcode[1]&0x40)==0);
3062 ext=2;
3063 break;
3064 case TAB(FBRANCH,LONG):
3065 fragP->fr_opcode[1]|=0x40; /* Turn on LONG bit */
3066 ext=4;
3067 break;
3068 case TAB(PCREL,SHORT):
3069 ext=2;
3070 break;
3071 case TAB(PCREL,LONG):
3072 /* The thing to do here is force it to ABSOLUTE LONG, since
3073 PCREL is really trying to shorten an ABSOLUTE address anyway */
3074 /* JF FOO This code has not been tested */
3075 subseg_change(SEG_TEXT,0);
3076 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3077 if((fragP->fr_opcode[1] & 0x3F) != 0x3A)
3078 as_bad("Internal error (long PC-relative operand) for insn 0x%04lx at 0x%lx",
3079 fragP->fr_opcode[0],fragP->fr_address);
3080 fragP->fr_opcode[1]&= ~0x3F;
3081 fragP->fr_opcode[1]|=0x39; /* Mode 7.1 */
3082 fragP->fr_fix+=4;
3083 /* md_number_to_chars(buffer_address,
3084 (long)(fragP->fr_symbol->sy_value + fragP->fr_offset),
3085 4); */
3086 ext=0;
3087 break;
3088 case TAB(PCLEA,SHORT):
3089 subseg_change(SEG_TEXT,0);
3090 fix_new(fragP,(int)(fragP->fr_fix),2,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset,1,
3091 NO_RELOC);
3092 fragP->fr_opcode[1] &= ~0x3F;
3093 fragP->fr_opcode[1] |= 0x3A;
3094 ext=2;
3095 break;
3096 case TAB(PCLEA,LONG):
3097 subseg_change(SEG_TEXT,0);
3098 fix_new(fragP,(int)(fragP->fr_fix)+2,4,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset+2,1,
3099 NO_RELOC);
3100 *buffer_address++ = 0x01;
3101 *buffer_address++ = 0x70;
3102 fragP->fr_fix+=2;
3103 /* buffer_address+=2; */
3104 ext=4;
3105 break;
3106
3107 } /* switch on subtype */
3108
3109 if (ext) {
3110 md_number_to_chars(buffer_address, (long) disp, (int) ext);
3111 fragP->fr_fix += ext;
3112 /* H_SET_TEXT_SIZE(headers, H_GET_TEXT_SIZE(headers) + ext); */
3113 } /* if extending */
3114
3115 return;
3116 } /* md_convert_frag() */
3117
3118 /* Force truly undefined symbols to their maximum size, and generally set up
3119 the frag list to be relaxed
3120 */
3121 int md_estimate_size_before_relax(fragP, segment)
3122 register fragS *fragP;
3123 segT segment;
3124 {
3125 int old_fix;
3126 register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
3127
3128 old_fix = fragP->fr_fix;
3129
3130 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
3131 switch (fragP->fr_subtype) {
3132
3133 case TAB(BRANCH,SZ_UNDEF): {
3134 if((fragP->fr_symbol != NULL) /* Not absolute */
3135 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3136 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),BYTE);
3137 break;
3138 } else if((fragP->fr_symbol == 0) || (cpu_of_arch(current_architecture) < m68020)) {
3139 /* On 68000, or for absolute value, switch to abs long */
3140 /* FIXME, we should check abs val, pick short or long */
3141 if(fragP->fr_opcode[0]==0x61) {
3142 fragP->fr_opcode[0]= 0x4E;
3143 fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
3144 subseg_change(SEG_TEXT, 0);
3145 fix_new(fragP, fragP->fr_fix, 4,
3146 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3147 fragP->fr_fix+=4;
3148 frag_wane(fragP);
3149 } else if(fragP->fr_opcode[0]==0x60) {
3150 fragP->fr_opcode[0]= 0x4E;
3151 fragP->fr_opcode[1]= 0xF9; /* JMP with ABSL LONG offset */
3152 subseg_change(SEG_TEXT, 0);
3153 fix_new(fragP, fragP->fr_fix, 4,
3154 fragP->fr_symbol, 0, fragP->fr_offset, 0, NO_RELOC);
3155 fragP->fr_fix+=4;
3156 frag_wane(fragP);
3157 } else {
3158 as_warn("Long branch offset to extern symbol not supported.");
3159 }
3160 } else { /* Symbol is still undefined. Make it simple */
3161 fix_new(fragP, (int)(fragP->fr_fix), 4, fragP->fr_symbol,
3162 (symbolS *)0, fragP->fr_offset+4, 1, NO_RELOC);
3163 fragP->fr_fix+=4;
3164 fragP->fr_opcode[1]=0xff;
3165 frag_wane(fragP);
3166 break;
3167 }
3168
3169 break;
3170 } /* case TAB(BRANCH,SZ_UNDEF) */
3171
3172 case TAB(FBRANCH,SZ_UNDEF): {
3173 if(S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3174 fragP->fr_subtype = TAB(FBRANCH,SHORT);
3175 fragP->fr_var += 2;
3176 } else {
3177 fragP->fr_subtype = TAB(FBRANCH,LONG);
3178 fragP->fr_var += 4;
3179 }
3180 break;
3181 } /* TAB(FBRANCH,SZ_UNDEF) */
3182
3183 case TAB(PCREL,SZ_UNDEF): {
3184 if(S_GET_SEGMENT(fragP->fr_symbol) == segment || flagseen['l']) {
3185 fragP->fr_subtype = TAB(PCREL,SHORT);
3186 fragP->fr_var += 2;
3187 } else {
3188 fragP->fr_subtype = TAB(PCREL,LONG);
3189 fragP->fr_var += 4;
3190 }
3191 break;
3192 } /* TAB(PCREL,SZ_UNDEF) */
3193
3194 case TAB(BCC68000,SZ_UNDEF): {
3195 if((fragP->fr_symbol != NULL)
3196 && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3197 fragP->fr_subtype=TAB(BCC68000,BYTE);
3198 break;
3199 }
3200 /* only Bcc 68000 instructions can come here */
3201 /* change bcc into b!cc/jmp absl long */
3202 fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
3203 if(flagseen['l']) {
3204 fragP->fr_opcode[1] = 0x04; /* branch offset = 6 */
3205 /* JF: these were fr_opcode[2,3] */
3206 buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */
3207 buffer_address[1] = 0xf8;
3208 fragP->fr_fix += 2; /* account for jmp instruction */
3209 subseg_change(SEG_TEXT,0);
3210 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
3211 fragP->fr_offset, 0, NO_RELOC);
3212 fragP->fr_fix += 2;
3213 } else {
3214 fragP->fr_opcode[1] = 0x06; /* branch offset = 6 */
3215 /* JF: these were fr_opcode[2,3] */
3216 buffer_address[0] = 0x4e; /* put in jmp long (0x4ef9) */
3217 buffer_address[1] = 0xf9;
3218 fragP->fr_fix += 2; /* account for jmp instruction */
3219 subseg_change(SEG_TEXT,0);
3220 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3221 fragP->fr_offset, 0, NO_RELOC);
3222 fragP->fr_fix += 4;
3223 }
3224 frag_wane(fragP);
3225 break;
3226 } /* case TAB(BCC68000,SZ_UNDEF) */
3227
3228 case TAB(DBCC,SZ_UNDEF): {
3229 if (fragP->fr_symbol != NULL && S_GET_SEGMENT(fragP->fr_symbol) == segment) {
3230 fragP->fr_subtype=TAB(DBCC,SHORT);
3231 fragP->fr_var+=2;
3232 break;
3233 }
3234 /* only DBcc 68000 instructions can come here */
3235 /* change dbcc into dbcc/jmp absl long */
3236 /* JF: these used to be fr_opcode[2-4], which is wrong. */
3237 buffer_address[0] = 0x00; /* branch offset = 4 */
3238 buffer_address[1] = 0x04;
3239 buffer_address[2] = 0x60; /* put in bra pc + ... */
3240
3241 if(flagseen['l']) {
3242 /* JF: these were fr_opcode[5-7] */
3243 buffer_address[3] = 0x04; /* plus 4 */
3244 buffer_address[4] = 0x4e;/* Put in Jump Word */
3245 buffer_address[5] = 0xf8;
3246 fragP->fr_fix += 6; /* account for bra/jmp instruction */
3247 subseg_change(SEG_TEXT,0);
3248 fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0,
3249
3250
3251 fragP->fr_offset, 0, NO_RELOC);
3252 fragP->fr_fix += 2;
3253 } else {
3254 /* JF: these were fr_opcode[5-7] */
3255 buffer_address[3] = 0x06; /* Plus 6 */
3256 buffer_address[4] = 0x4e; /* put in jmp long (0x4ef9) */
3257 buffer_address[5] = 0xf9;
3258 fragP->fr_fix += 6; /* account for bra/jmp instruction */
3259 subseg_change(SEG_TEXT,0);
3260 fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0,
3261 fragP->fr_offset, 0, NO_RELOC);
3262 fragP->fr_fix += 4;
3263 }
3264
3265 frag_wane(fragP);
3266 break;
3267 } /* case TAB(DBCC,SZ_UNDEF) */
3268
3269 case TAB(PCLEA,SZ_UNDEF): {
3270 if ((S_GET_SEGMENT(fragP->fr_symbol))==segment || flagseen['l']) {
3271 fragP->fr_subtype=TAB(PCLEA,SHORT);
3272 fragP->fr_var+=2;
3273 } else {
3274 fragP->fr_subtype=TAB(PCLEA,LONG);
3275 fragP->fr_var+=6;
3276 }
3277 break;
3278 } /* TAB(PCLEA,SZ_UNDEF) */
3279
3280 default:
3281 break;
3282
3283 } /* switch on subtype looking for SZ_UNDEF's. */
3284
3285 /* now that SZ_UNDEF are taken care of, check others */
3286 switch (fragP->fr_subtype) {
3287 case TAB(BCC68000,BYTE):
3288 case TAB(BRANCH,BYTE):
3289 /* We can't do a short jump to the next instruction,
3290 so we force word mode. */
3291 if (fragP->fr_symbol && S_GET_VALUE(fragP->fr_symbol)==0 &&
3292 fragP->fr_symbol->sy_frag==fragP->fr_next) {
3293 fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),SHORT);
3294 fragP->fr_var+=2;
3295 }
3296 break;
3297 default:
3298 break;
3299 }
3300 return fragP->fr_var + fragP->fr_fix - old_fix;
3301 }
3302
3303 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3304 /* the bit-field entries in the relocation_info struct plays hell
3305 with the byte-order problems of cross-assembly. So as a hack,
3306 I added this mach. dependent ri twiddler. Ugly, but it gets
3307 you there. -KWK */
3308 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
3309 are symbolnum, most sig. byte first. Last byte is broken up with
3310 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3311 nibble as nuthin. (on Sun 3 at least) */
3312 /* Translate the internal relocation information into target-specific
3313 format. */
3314 #ifdef comment
3315 void
3316 md_ri_to_chars(the_bytes, ri)
3317 char *the_bytes;
3318 struct reloc_info_generic *ri;
3319 {
3320 /* this is easy */
3321 md_number_to_chars(the_bytes, ri->r_address, 4);
3322 /* now the fun stuff */
3323 the_bytes[4] = (ri->r_symbolnum >> 16) & 0x0ff;
3324 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
3325 the_bytes[6] = ri->r_symbolnum & 0x0ff;
3326 the_bytes[7] = (((ri->r_pcrel << 7) & 0x80) | ((ri->r_length << 5) & 0x60) |
3327 ((ri->r_extern << 4) & 0x10));
3328 }
3329 #endif /* comment */
3330
3331 void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
3332 char *where;
3333 fixS *fixP;
3334 relax_addressT segment_address_in_file;
3335 {
3336 /*
3337 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3338 * Out: GNU LD relocation length code: 0, 1, or 2.
3339 */
3340
3341 static unsigned char nbytes_r_length [] = { 42, 0, 1, 42, 2 };
3342 long r_symbolnum;
3343
3344 know(fixP->fx_addsy != NULL);
3345
3346 md_number_to_chars(where,
3347 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
3348 4);
3349
3350 r_symbolnum = (S_IS_DEFINED(fixP->fx_addsy)
3351 ? S_GET_TYPE(fixP->fx_addsy)
3352 : fixP->fx_addsy->sy_number);
3353
3354 where[4] = (r_symbolnum >> 16) & 0x0ff;
3355 where[5] = (r_symbolnum >> 8) & 0x0ff;
3356 where[6] = r_symbolnum & 0x0ff;
3357 where[7] = (((fixP->fx_pcrel << 7) & 0x80) | ((nbytes_r_length[fixP->fx_size] << 5) & 0x60) |
3358 (((!S_IS_DEFINED(fixP->fx_addsy)) << 4) & 0x10));
3359
3360 return;
3361 } /* tc_aout_fix_to_chars() */
3362
3363 #endif /* OBJ_AOUT or OBJ_BOUT */
3364
3365 #ifndef WORKING_DOT_WORD
3366 const int md_short_jump_size = 4;
3367 const int md_long_jump_size = 6;
3368
3369 void
3370 md_create_short_jump(ptr,from_addr,to_addr,frag,to_symbol)
3371 char *ptr;
3372 long from_addr,
3373 to_addr;
3374 fragS *frag;
3375 symbolS *to_symbol;
3376 {
3377 long offset;
3378
3379 offset = to_addr - (from_addr+2);
3380
3381 md_number_to_chars(ptr ,(long)0x6000,2);
3382 md_number_to_chars(ptr+2,(long)offset,2);
3383 }
3384
3385 void
3386 md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)
3387 char *ptr;
3388 long from_addr,
3389 to_addr;
3390 fragS *frag;
3391 symbolS *to_symbol;
3392 {
3393 long offset;
3394
3395 if (cpu_of_arch(current_architecture) < m68020) {
3396 offset=to_addr-S_GET_VALUE(to_symbol);
3397 md_number_to_chars(ptr ,(long)0x4EF9,2);
3398 md_number_to_chars(ptr+2,(long)offset,4);
3399 fix_new(frag,(ptr+2)-frag->fr_literal,4,to_symbol,(symbolS *)0,(long)0,0,
3400 NO_RELOC);
3401 } else {
3402 offset=to_addr - (from_addr+2);
3403 md_number_to_chars(ptr ,(long)0x60ff,2);
3404 md_number_to_chars(ptr+2,(long)offset,4);
3405 }
3406 }
3407
3408 #endif
3409 /* Different values of OK tell what its OK to return. Things that aren't OK are an error (what a shock, no?)
3410
3411 0: Everything is OK
3412 10: Absolute 1:8 only
3413 20: Absolute 0:7 only
3414 30: absolute 0:15 only
3415 40: Absolute 0:31 only
3416 50: absolute 0:127 only
3417 55: absolute -64:63 only
3418 60: absolute -128:127 only
3419 70: absolute 0:4095 only
3420 80: No bignums
3421
3422 */
3423
3424 static int get_num(exp,ok)
3425 struct m68k_exp *exp;
3426 int ok;
3427 {
3428 #ifdef TEST2
3429 long l = 0;
3430
3431 if(!exp->e_beg)
3432 return 0;
3433 if(*exp->e_beg=='0') {
3434 if(exp->e_beg[1]=='x')
3435 sscanf(exp->e_beg+2,"%x",&l);
3436 else
3437 sscanf(exp->e_beg+1,"%O",&l);
3438 return l;
3439 }
3440 return atol(exp->e_beg);
3441 #else
3442 char *save_in;
3443 char c_save;
3444
3445 if(!exp) {
3446 /* Can't do anything */
3447 return 0;
3448 }
3449 if(!exp->e_beg || !exp->e_end) {
3450 seg(exp)=SEG_ABSOLUTE;
3451 adds(exp)=0;
3452 subs(exp)=0;
3453 offs(exp)= (ok==10) ? 1 : 0;
3454 as_warn("Null expression defaults to %ld",offs(exp));
3455 return 0;
3456 }
3457
3458 exp->e_siz=0;
3459 if(/* ok!=80 && */exp->e_end[-1]==':' && (exp->e_end-exp->e_beg)>=2) {
3460 switch(exp->e_end[0]) {
3461 case 's':
3462 case 'S':
3463 case 'b':
3464 case 'B':
3465 exp->e_siz=1;
3466 break;
3467 case 'w':
3468 case 'W':
3469 exp->e_siz=2;
3470 break;
3471 case 'l':
3472 case 'L':
3473 exp->e_siz=3;
3474 break;
3475 default:
3476 as_bad("Unknown size for expression \"%c\"",exp->e_end[0]);
3477 }
3478 exp->e_end-=2;
3479 }
3480 c_save=exp->e_end[1];
3481 exp->e_end[1]='\0';
3482 save_in=input_line_pointer;
3483 input_line_pointer=exp->e_beg;
3484 switch(expression(&(exp->e_exp))) {
3485 case SEG_PASS1:
3486 seg(exp)=SEG_ABSOLUTE;
3487 adds(exp)=0;
3488 subs(exp)=0;
3489 offs(exp)= (ok==10) ? 1 : 0;
3490 as_warn("Unknown expression: '%s' defaulting to %d",exp->e_beg,offs(exp));
3491 break;
3492
3493 case SEG_ABSENT:
3494 /* Do the same thing the VAX asm does */
3495 seg(exp)=SEG_ABSOLUTE;
3496 adds(exp)=0;
3497 subs(exp)=0;
3498 offs(exp)=0;
3499 if(ok==10) {
3500 as_warn("expression out of range: defaulting to 1");
3501 offs(exp)=1;
3502 }
3503 break;
3504 case SEG_ABSOLUTE:
3505 switch(ok) {
3506 case 10:
3507 if(offs(exp)<1 || offs(exp)>8) {
3508 as_warn("expression out of range: defaulting to 1");
3509 offs(exp)=1;
3510 }
3511 break;
3512 case 20:
3513 if(offs(exp)<0 || offs(exp)>7)
3514 goto outrange;
3515 break;
3516 case 30:
3517 if(offs(exp)<0 || offs(exp)>15)
3518 goto outrange;
3519 break;
3520 case 40:
3521 if(offs(exp)<0 || offs(exp)>32)
3522 goto outrange;
3523 break;
3524 case 50:
3525 if(offs(exp)<0 || offs(exp)>127)
3526 goto outrange;
3527 break;
3528 case 55:
3529 if(offs(exp)<-64 || offs(exp)>63)
3530 goto outrange;
3531 break;
3532 case 60:
3533 if(offs(exp)<-128 || offs(exp)>127)
3534 goto outrange;
3535 break;
3536 case 70:
3537 if(offs(exp)<0 || offs(exp)>4095) {
3538 outrange:
3539 as_warn("expression out of range: defaulting to 0");
3540 offs(exp)=0;
3541 }
3542 break;
3543 default:
3544 break;
3545 }
3546 break;
3547 case SEG_TEXT:
3548 case SEG_DATA:
3549 case SEG_BSS:
3550 case SEG_UNKNOWN:
3551 case SEG_DIFFERENCE:
3552 if(ok>=10 && ok<=70) {
3553 seg(exp)=SEG_ABSOLUTE;
3554 adds(exp)=0;
3555 subs(exp)=0;
3556 offs(exp)= (ok==10) ? 1 : 0;
3557 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3558 }
3559 break;
3560 case SEG_BIG:
3561 if(ok==80 && offs(exp)<0) { /* HACK! Turn it into a long */
3562 LITTLENUM_TYPE words[6];
3563
3564 gen_to_words(words,2,8L);/* These numbers are magic! */
3565 seg(exp)=SEG_ABSOLUTE;
3566 adds(exp)=0;
3567 subs(exp)=0;
3568 offs(exp)=words[1]|(words[0]<<16);
3569 } else if(ok!=0) {
3570 seg(exp)=SEG_ABSOLUTE;
3571 adds(exp)=0;
3572 subs(exp)=0;
3573 offs(exp)= (ok==10) ? 1 : 0;
3574 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
3575 }
3576 break;
3577 default:
3578 as_fatal("failed sanity check.");
3579 }
3580 if(input_line_pointer!=exp->e_end+1)
3581 as_bad("Ignoring junk after expression");
3582 exp->e_end[1]=c_save;
3583 input_line_pointer=save_in;
3584 if(exp->e_siz) {
3585 switch(exp->e_siz) {
3586 case 1:
3587 if(!isbyte(offs(exp)))
3588 as_warn("expression doesn't fit in BYTE");
3589 break;
3590 case 2:
3591 if(!isword(offs(exp)))
3592 as_warn("expression doesn't fit in WORD");
3593 break;
3594 }
3595 }
3596 return offs(exp);
3597 #endif
3598 } /* get_num() */
3599
3600 /* These are the back-ends for the various machine dependent pseudo-ops. */
3601 void demand_empty_rest_of_line(); /* Hate those extra verbose names */
3602
3603 static void s_data1() {
3604 subseg_new(SEG_DATA,1);
3605 demand_empty_rest_of_line();
3606 } /* s_data1() */
3607
3608 static void s_data2() {
3609 subseg_new(SEG_DATA,2);
3610 demand_empty_rest_of_line();
3611 } /* s_data2() */
3612
3613 static void s_bss()
3614 {
3615 /* We don't support putting frags in the BSS segment, we fake it
3616 by marking in_bss, then looking at s_skip for clues */
3617
3618 subseg_new(SEG_BSS, 0);
3619 demand_empty_rest_of_line();
3620 } /* s_bss() */
3621
3622 static void s_even() {
3623 register int temp;
3624 register long temp_fill;
3625
3626 temp = 1; /* JF should be 2? */
3627 temp_fill = get_absolute_expression ();
3628 if ( ! need_pass_2 ) /* Never make frag if expect extra pass. */
3629 frag_align (temp, (int)temp_fill);
3630 demand_empty_rest_of_line();
3631 } /* s_even() */
3632
3633 static void s_proc() {
3634 demand_empty_rest_of_line();
3635 } /* s_proc() */
3636
3637 /* s_space is defined in read.c .skip is simply an alias to it. */
3638
3639 /*
3640 * md_parse_option
3641 * Invocation line includes a switch not recognized by the base assembler.
3642 * See if it's a processor-specific option. These are:
3643 *
3644 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
3645 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
3646 * Select the architecture. Instructions or features not
3647 * supported by the selected architecture cause fatal
3648 * errors. More than one may be specified. The default is
3649 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
3650 * for -m68000, and -m68882 is a synonym for -m68881.
3651 *
3652 * MAYBE_FLOAT_TOO is defined below so that specifying a processor type
3653 * (e.g. m68020) also requests that float instructions be included. This
3654 * is the default setup, mostly to avoid hassling users. A better
3655 * rearrangement of this structure would be to add an option to DENY
3656 * floating point opcodes, for people who want to really know there's none
3657 * of that funny floaty stuff going on. FIXME-later.
3658 */
3659 #ifndef MAYBE_FLOAT_TOO
3660 #define MAYBE_FLOAT_TOO m68881
3661 #endif
3662
3663 int md_parse_option(argP,cntP,vecP)
3664 char **argP;
3665 int *cntP;
3666 char ***vecP;
3667 {
3668 switch(**argP) {
3669 case 'l': /* -l means keep external to 2 bit offset
3670 rather than 16 bit one */
3671 break;
3672
3673 case 'S': /* -S means that jbsr's always turn into jsr's. */
3674 break;
3675
3676 case 'A':
3677 (*argP)++;
3678 /* intentional fall-through */
3679 case 'm':
3680 (*argP)++;
3681
3682 if (**argP=='c') {
3683 (*argP)++;
3684 } /* allow an optional "c" */
3685
3686 if (!strcmp(*argP, "68000")
3687 || !strcmp(*argP, "68008")) {
3688 current_architecture |= m68000;
3689 } else if (!strcmp(*argP, "68010")) {
3690 #ifdef TE_SUN
3691 omagic= 1<<16|OMAGIC;
3692 #endif
3693 current_architecture |= m68010;
3694
3695 } else if (!strcmp(*argP, "68020")) {
3696 current_architecture |= m68020 | MAYBE_FLOAT_TOO;
3697
3698 } else if (!strcmp(*argP, "68030")) {
3699 current_architecture |= m68030 | MAYBE_FLOAT_TOO;
3700
3701 } else if (!strcmp(*argP, "68040")) {
3702 current_architecture |= m68040 | MAYBE_FLOAT_TOO;
3703
3704 #ifndef NO_68881
3705 } else if (!strcmp(*argP, "68881")) {
3706 current_architecture |= m68881;
3707
3708 } else if (!strcmp(*argP, "68882")) {
3709 current_architecture |= m68882;
3710
3711 #endif /* NO_68881 */
3712 #ifndef NO_68851
3713 } else if (!strcmp(*argP,"68851")) {
3714 current_architecture |= m68851;
3715
3716 #endif /* NO_68851 */
3717 } else {
3718 as_warn("Unknown architecture, \"%s\". option ignored", *argP);
3719 } /* switch on architecture */
3720
3721 while(**argP) (*argP)++;
3722
3723 break;
3724
3725 case 'p':
3726 if (!strcmp(*argP,"pic")) {
3727 (*argP) += 3;
3728 break; /* -pic, Position Independent Code */
3729 } else {
3730 return(0);
3731 } /* pic or not */
3732
3733 default:
3734 return 0;
3735 }
3736 return 1;
3737 }
3738
3739
3740 #ifdef TEST2
3741
3742 /* TEST2: Test md_assemble() */
3743 /* Warning, this routine probably doesn't work anymore */
3744
3745 main()
3746 {
3747 struct m68k_it the_ins;
3748 char buf[120];
3749 char *cp;
3750 int n;
3751
3752 m68k_ip_begin();
3753 for(;;) {
3754 if(!gets(buf) || !*buf)
3755 break;
3756 if(buf[0]=='|' || buf[1]=='.')
3757 continue;
3758 for(cp=buf;*cp;cp++)
3759 if(*cp=='\t')
3760 *cp=' ';
3761 if(is_label(buf))
3762 continue;
3763 memset(&the_ins, '\0', sizeof(the_ins));
3764 m68k_ip(&the_ins,buf);
3765 if(the_ins.error) {
3766 printf("Error %s in %s\n",the_ins.error,buf);
3767 } else {
3768 printf("Opcode(%d.%s): ",the_ins.numo,the_ins.args);
3769 for(n=0;n<the_ins.numo;n++)
3770 printf(" 0x%x",the_ins.opcode[n]&0xffff);
3771 printf(" ");
3772 print_the_insn(&the_ins.opcode[0],stdout);
3773 (void)putchar('\n');
3774 }
3775 for(n=0;n<strlen(the_ins.args)/2;n++) {
3776 if(the_ins.operands[n].error) {
3777 printf("op%d Error %s in %s\n",n,the_ins.operands[n].error,buf);
3778 continue;
3779 }
3780 printf("mode %d, reg %d, ",the_ins.operands[n].mode,the_ins.operands[n].reg);
3781 if(the_ins.operands[n].b_const)
3782 printf("Constant: '%.*s', ",1+the_ins.operands[n].e_const-the_ins.operands[n].b_const,the_ins.operands[n].b_const);
3783 printf("ireg %d, isiz %d, imul %d, ",the_ins.operands[n].ireg,the_ins.operands[n].isiz,the_ins.operands[n].imul);
3784 if(the_ins.operands[n].b_iadd)
3785 printf("Iadd: '%.*s',",1+the_ins.operands[n].e_iadd-the_ins.operands[n].b_iadd,the_ins.operands[n].b_iadd);
3786 (void)putchar('\n');
3787 }
3788 }
3789 m68k_ip_end();
3790 return 0;
3791 }
3792
3793 is_label(str)
3794 char *str;
3795 {
3796 while(*str==' ')
3797 str++;
3798 while(*str && *str!=' ')
3799 str++;
3800 if(str[-1]==':' || str[1]=='=')
3801 return 1;
3802 return 0;
3803 }
3804
3805 #endif
3806
3807 /* Possible states for relaxation:
3808
3809 0 0 branch offset byte (bra, etc)
3810 0 1 word
3811 0 2 long
3812
3813 1 0 indexed offsets byte a0@(32,d4:w:1) etc
3814 1 1 word
3815 1 2 long
3816
3817 2 0 two-offset index word-word a0@(32,d4)@(45) etc
3818 2 1 word-long
3819 2 2 long-word
3820 2 3 long-long
3821
3822 */
3823
3824
3825
3826 #ifdef DONTDEF
3827 abort()
3828 {
3829 printf("ABORT!\n");
3830 exit(12);
3831 }
3832
3833 print_frags()
3834 {
3835 fragS *fragP;
3836 extern fragS *text_frag_root;
3837
3838 for(fragP=text_frag_root;fragP;fragP=fragP->fr_next) {
3839 printf("addr %lu next 0x%x fix %ld var %ld symbol 0x%x offset %ld\n",
3840 fragP->fr_address,fragP->fr_next,fragP->fr_fix,fragP->fr_var,fragP->fr_symbol,fragP->fr_offset);
3841 printf("opcode 0x%x type %d subtype %d\n\n",fragP->fr_opcode,fragP->fr_type,fragP->fr_subtype);
3842 }
3843 fflush(stdout);
3844 return 0;
3845 }
3846 #endif
3847
3848 #ifdef DONTDEF
3849 /*VARARGS1*/
3850 panic(format,args)
3851 char *format;
3852 {
3853 fputs("Internal error:",stderr);
3854 _doprnt(format,&args,stderr);
3855 (void)putc('\n',stderr);
3856 as_where();
3857 abort();
3858 }
3859 #endif
3860
3861 /* We have no need to default values of symbols. */
3862
3863 /* ARGSUSED */
3864 symbolS *
3865 md_undefined_symbol (name)
3866 char *name;
3867 {
3868 return 0;
3869 }
3870
3871 /* Parse an operand that is machine-specific.
3872 We just return without modifying the expression if we have nothing
3873 to do. */
3874
3875 /* ARGSUSED */
3876 void
3877 md_operand (expressionP)
3878 expressionS *expressionP;
3879 {
3880 }
3881
3882 /* Round up a section size to the appropriate boundary. */
3883 long
3884 md_section_align (segment, size)
3885 segT segment;
3886 long size;
3887 {
3888 return size; /* Byte alignment is fine */
3889 }
3890
3891 /* Exactly what point is a PC-relative offset relative TO?
3892 On the 68k, they're relative to the address of the offset, plus
3893 its size. (??? Is this right? FIXME-SOON!) */
3894 long
3895 md_pcrel_from (fixP)
3896 fixS *fixP;
3897 {
3898 return(fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address);
3899 }
3900
3901 /*
3902 * Local Variables:
3903 * comment-column: 0
3904 * fill-column: 131
3905 * End:
3906 */
3907
3908 /* end of tc-m68k.c */
GDB Binutils - Deliverables
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