1 /* tc-m68k.c -- Assemble for the m68k family
2 Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 Free Software Foundation, Inc.
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
28 #include "opcode/m68k.h"
29 #include "m68k-parse.h"
35 /* This string holds the chars that always start a comment. If the
36 pre-processor is disabled, these aren't very useful. The macro
37 tc_comment_chars points to this. We use this, rather than the
38 usual comment_chars, so that the --bitwise-or option will work. */
39 #if defined (TE_SVR4) || defined (TE_DELTA)
40 const char *m68k_comment_chars
= "|#";
42 const char *m68k_comment_chars
= "|";
45 /* This array holds the chars that only start a comment at the beginning of
46 a line. If the line seems to have the form '# 123 filename'
47 .line and .file directives will appear in the pre-processed output */
48 /* Note that input_file.c hand checks for '#' at the beginning of the
49 first line of the input file. This is because the compiler outputs
50 #NO_APP at the beginning of its output. */
51 /* Also note that comments like this one will always work. */
52 const char line_comment_chars
[] = "#*";
54 const char line_separator_chars
[] = ";";
56 /* Chars that can be used to separate mant from exp in floating point nums */
57 CONST
char EXP_CHARS
[] = "eE";
59 /* Chars that mean this number is a floating point constant, as
60 in "0f12.456" or "0d1.2345e12". */
62 CONST
char FLT_CHARS
[] = "rRsSfFdDxXeEpP";
64 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
65 changed in read.c . Ideally it shouldn't have to know about it at all,
66 but nothing is ideal around here. */
68 const int md_reloc_size
= 8; /* Size of relocation record */
70 /* Are we trying to generate PIC code? If so, absolute references
71 ought to be made into linkage table references or pc-relative
72 references. Not implemented. For ELF there are other means
73 to denote pic relocations. */
76 static int flag_short_refs
; /* -l option */
77 static int flag_long_jumps
; /* -S option */
78 static int flag_keep_pcrel
; /* --pcrel option. */
80 #ifdef REGISTER_PREFIX_OPTIONAL
81 int flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
83 int flag_reg_prefix_optional
;
86 /* Whether --register-prefix-optional was used on the command line. */
87 static int reg_prefix_optional_seen
;
89 /* The floating point coprocessor to use by default. */
90 static enum m68k_register m68k_float_copnum
= COP1
;
92 /* If this is non-zero, then references to number(%pc) will be taken
93 to refer to number, rather than to %pc + number. */
94 static int m68k_abspcadd
;
96 /* If this is non-zero, then the quick forms of the move, add, and sub
97 instructions are used when possible. */
98 static int m68k_quick
= 1;
100 /* If this is non-zero, then if the size is not specified for a base
101 or outer displacement, the assembler assumes that the size should
103 static int m68k_rel32
= 1;
105 /* This is non-zero if m68k_rel32 was set from the command line. */
106 static int m68k_rel32_from_cmdline
;
108 /* The default width to use for an index register when using a base
110 static enum m68k_size m68k_index_width_default
= SIZE_LONG
;
112 /* We want to warn if any text labels are misaligned. In order to get
113 the right line number, we need to record the line number for each
118 struct label_line
*next
;
125 /* The list of labels. */
127 static struct label_line
*labels
;
129 /* The current label. */
131 static struct label_line
*current_label
;
133 /* Its an arbitrary name: This means I don't approve of it */
134 /* See flames below */
135 static struct obstack robyn
;
139 const char *m_operands
;
140 unsigned long m_opcode
;
144 struct m68k_incant
*m_next
;
147 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
148 #define gettwo(x) (((x)->m_opcode)&0xffff)
150 static const enum m68k_register m68000_control_regs
[] = { 0 };
151 static const enum m68k_register m68010_control_regs
[] = {
155 static const enum m68k_register m68020_control_regs
[] = {
156 SFC
, DFC
, USP
, VBR
, CACR
, CAAR
, MSP
, ISP
,
159 static const enum m68k_register m68040_control_regs
[] = {
160 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
,
161 USP
, VBR
, MSP
, ISP
, MMUSR
, URP
, SRP
,
164 static const enum m68k_register m68060_control_regs
[] = {
165 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, BUSCR
,
166 USP
, VBR
, URP
, SRP
, PCR
,
169 static const enum m68k_register mcf_control_regs
[] = {
170 CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, VBR
, ROMBAR
,
171 RAMBAR0
, RAMBAR1
, MBAR
,
174 #define cpu32_control_regs m68010_control_regs
176 static const enum m68k_register
*control_regs
;
178 /* internal form of a 68020 instruction */
182 const char *args
; /* list of opcode info */
185 int numo
; /* Number of shorts in opcode */
188 struct m68k_op operands
[6];
190 int nexp
; /* number of exprs in use */
191 struct m68k_exp exprs
[4];
193 int nfrag
; /* Number of frags we have to produce */
196 int fragoff
; /* Where in the current opcode the frag ends */
203 int nrel
; /* Num of reloc strucs in use */
210 /* In a pc relative address the difference between the address
211 of the offset and the address that the offset is relative
212 to. This depends on the addressing mode. Basically this
213 is the value to put in the offset field to address the
214 first byte of the offset, without regarding the special
215 significance of some values (in the branch instruction, for
219 /* Whether this expression needs special pic relocation, and if
221 enum pic_relocation pic_reloc
;
224 reloc
[5]; /* Five is enough??? */
227 #define cpu_of_arch(x) ((x) & (m68000up|mcf))
228 #define float_of_arch(x) ((x) & mfloat)
229 #define mmu_of_arch(x) ((x) & mmmu)
230 #define arch_coldfire_p(x) (((x) & mcf) != 0)
232 /* Macros for determining if cpu supports a specific addressing mode */
233 #define HAVE_LONG_BRANCH(x) ((x) & (m68020|m68030|m68040|m68060|cpu32|mcf5407))
235 static struct m68k_it the_ins
; /* the instruction being assembled */
237 #define op(ex) ((ex)->exp.X_op)
238 #define adds(ex) ((ex)->exp.X_add_symbol)
239 #define subs(ex) ((ex)->exp.X_op_symbol)
240 #define offs(ex) ((ex)->exp.X_add_number)
242 /* Macros for adding things to the m68k_it struct */
244 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
246 /* Static functions. */
248 static void insop
PARAMS ((int, const struct m68k_incant
*));
249 static void add_fix
PARAMS ((int, struct m68k_exp
*, int, int));
250 static void add_frag
PARAMS ((symbolS
*, offsetT
, int));
252 /* Like addword, but goes BEFORE general operands */
256 const struct m68k_incant
*opcode
;
259 for(z
=the_ins
.numo
;z
>opcode
->m_codenum
;--z
)
260 the_ins
.opcode
[z
]=the_ins
.opcode
[z
-1];
261 for(z
=0;z
<the_ins
.nrel
;z
++)
262 the_ins
.reloc
[z
].n
+=2;
263 for (z
= 0; z
< the_ins
.nfrag
; z
++)
264 the_ins
.fragb
[z
].fragoff
++;
265 the_ins
.opcode
[opcode
->m_codenum
]=w
;
269 /* The numo+1 kludge is so we can hit the low order byte of the prev word.
272 add_fix (width
, exp
, pc_rel
, pc_fix
)
274 struct m68k_exp
*exp
;
278 the_ins
.reloc
[the_ins
.nrel
].n
= ((width
== 'B' || width
== '3')
282 : (the_ins
.numo
*2)));
283 the_ins
.reloc
[the_ins
.nrel
].exp
= exp
->exp
;
284 the_ins
.reloc
[the_ins
.nrel
].wid
= width
;
285 the_ins
.reloc
[the_ins
.nrel
].pcrel_fix
= pc_fix
;
287 the_ins
.reloc
[the_ins
.nrel
].pic_reloc
= exp
->pic_reloc
;
289 the_ins
.reloc
[the_ins
.nrel
++].pcrel
= pc_rel
;
292 /* Cause an extra frag to be generated here, inserting up to 10 bytes
293 (that value is chosen in the frag_var call in md_assemble). TYPE
294 is the subtype of the frag to be generated; its primary type is
295 rs_machine_dependent.
297 The TYPE parameter is also used by md_convert_frag_1 and
298 md_estimate_size_before_relax. The appropriate type of fixup will
299 be emitted by md_convert_frag_1.
301 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
303 add_frag (add
, off
, type
)
308 the_ins
.fragb
[the_ins
.nfrag
].fragoff
=the_ins
.numo
;
309 the_ins
.fragb
[the_ins
.nfrag
].fadd
=add
;
310 the_ins
.fragb
[the_ins
.nfrag
].foff
=off
;
311 the_ins
.fragb
[the_ins
.nfrag
++].fragty
=type
;
315 (op (ex) != O_constant && op (ex) != O_big)
317 static char *crack_operand
PARAMS ((char *str
, struct m68k_op
*opP
));
318 static int get_num
PARAMS ((struct m68k_exp
*exp
, int ok
));
319 static void m68k_ip
PARAMS ((char *));
320 static void insert_reg
PARAMS ((const char *, int));
321 static void select_control_regs
PARAMS ((void));
322 static void init_regtable
PARAMS ((void));
323 static int reverse_16_bits
PARAMS ((int in
));
324 static int reverse_8_bits
PARAMS ((int in
));
325 static void install_gen_operand
PARAMS ((int mode
, int val
));
326 static void install_operand
PARAMS ((int mode
, int val
));
327 static void s_bss
PARAMS ((int));
328 static void s_data1
PARAMS ((int));
329 static void s_data2
PARAMS ((int));
330 static void s_even
PARAMS ((int));
331 static void s_proc
PARAMS ((int));
332 static void mri_chip
PARAMS ((void));
333 static void s_chip
PARAMS ((int));
334 static void s_fopt
PARAMS ((int));
335 static void s_opt
PARAMS ((int));
336 static void s_reg
PARAMS ((int));
337 static void s_restore
PARAMS ((int));
338 static void s_save
PARAMS ((int));
339 static void s_mri_if
PARAMS ((int));
340 static void s_mri_else
PARAMS ((int));
341 static void s_mri_endi
PARAMS ((int));
342 static void s_mri_break
PARAMS ((int));
343 static void s_mri_next
PARAMS ((int));
344 static void s_mri_for
PARAMS ((int));
345 static void s_mri_endf
PARAMS ((int));
346 static void s_mri_repeat
PARAMS ((int));
347 static void s_mri_until
PARAMS ((int));
348 static void s_mri_while
PARAMS ((int));
349 static void s_mri_endw
PARAMS ((int));
350 static void md_apply_fix_2
PARAMS ((fixS
*, offsetT
));
351 static void md_convert_frag_1
PARAMS ((fragS
*));
353 static int current_architecture
;
362 static const struct m68k_cpu archs
[] =
364 { m68000
, "68000", 0 },
365 { m68010
, "68010", 0 },
366 { m68020
, "68020", 0 },
367 { m68030
, "68030", 0 },
368 { m68040
, "68040", 0 },
369 { m68060
, "68060", 0 },
370 { cpu32
, "cpu32", 0 },
371 { m68881
, "68881", 0 },
372 { m68851
, "68851", 0 },
373 { mcf5200
, "5200", 0 },
374 { mcf5206e
, "5206e", 0 },
375 { mcf5307
, "5307", 0},
376 { mcf5407
, "5407", 0},
377 /* Aliases (effectively, so far as gas is concerned) for the above
379 { m68020
, "68k", 1 },
380 { m68000
, "68008", 1 },
381 { m68000
, "68302", 1 },
382 { m68000
, "68306", 1 },
383 { m68000
, "68307", 1 },
384 { m68000
, "68322", 1 },
385 { m68000
, "68356", 1 },
386 { m68000
, "68ec000", 1 },
387 { m68000
, "68hc000", 1 },
388 { m68000
, "68hc001", 1 },
389 { m68020
, "68ec020", 1 },
390 { m68030
, "68ec030", 1 },
391 { m68040
, "68ec040", 1 },
392 { m68060
, "68ec060", 1 },
393 { cpu32
, "68330", 1 },
394 { cpu32
, "68331", 1 },
395 { cpu32
, "68332", 1 },
396 { cpu32
, "68333", 1 },
397 { cpu32
, "68334", 1 },
398 { cpu32
, "68336", 1 },
399 { cpu32
, "68340", 1 },
400 { cpu32
, "68341", 1 },
401 { cpu32
, "68349", 1 },
402 { cpu32
, "68360", 1 },
403 { m68881
, "68882", 1 },
404 { mcf5200
, "5202", 1 },
405 { mcf5200
, "5204", 1 },
406 { mcf5200
, "5206", 1 },
409 static const int n_archs
= sizeof (archs
) / sizeof (archs
[0]);
411 /* This is the assembler relaxation table for m68k. m68k is a rich CISC
412 architecture and we have a lot of relaxation modes. */
414 /* Macros used in the relaxation code. */
415 #define TAB(x,y) (((x) << 2) + (y))
416 #define TABTYPE(x) ((x) >> 2)
418 /* Relaxation states. */
424 /* Here are all the relaxation modes we support. First we can relax ordinary
425 branches. On 68020 and higher and on CPU32 all branch instructions take
426 three forms, so on these CPUs all branches always remain as such. When we
427 have to expand to the LONG form on a 68000, though, we substitute an
428 absolute jump instead. This is a direct replacement for unconditional
429 branches and a branch over a jump for conditional branches. However, if the
430 user requires PIC and disables this with --pcrel, we can only relax between
431 BYTE and SHORT forms, punting if that isn't enough. This gives us four
432 different relaxation modes for branches: */
434 #define BRANCHBWL 1 /* branch byte, word, or long */
435 #define BRABSJUNC 2 /* absolute jump for LONG, unconditional */
436 #define BRABSJCOND 3 /* absolute jump for LONG, conditional */
437 #define BRANCHBW 4 /* branch byte or word */
439 /* We also relax coprocessor branches and DBcc's. All CPUs that support
440 coprocessor branches support them in word and long forms, so we have only
441 one relaxation mode for them. DBcc's are word only on all CPUs. We can
442 relax them to the LONG form with a branch-around sequence. This sequence
443 can use a long branch (if available) or an absolute jump (if acceptable).
444 This gives us two relaxation modes. If long branches are not available and
445 absolute jumps are not acceptable, we don't relax DBcc's. */
447 #define FBRANCH 5 /* coprocessor branch */
448 #define DBCCLBR 6 /* DBcc relaxable with a long branch */
449 #define DBCCABSJ 7 /* DBcc relaxable with an absolute jump */
451 /* That's all for instruction relaxation. However, we also relax PC-relative
452 operands. Specifically, we have three operand relaxation modes. On the
453 68000 PC-relative operands can only be 16-bit, but on 68020 and higher and
454 on CPU32 they may be 16-bit or 32-bit. For the latter we relax between the
455 two. Also PC+displacement+index operands in their simple form (with a non-
456 suppressed index without memory indirection) are supported on all CPUs, but
457 on the 68000 the displacement can be 8-bit only, whereas on 68020 and higher
458 and on CPU32 we relax it to SHORT and LONG forms as well using the extended
459 form of the PC+displacement+index operand. Finally, some absolute operands
460 can be relaxed down to 16-bit PC-relative. */
462 #define PCREL1632 8 /* 16-bit or 32-bit PC-relative */
463 #define PCINDEX 9 /* PC+displacement+index */
464 #define ABSTOPCREL 10 /* absolute relax down to 16-bit PC-relative */
466 /* Note that calls to frag_var need to specify the maximum expansion
467 needed; this is currently 10 bytes for DBCC. */
470 How far Forward this mode will reach:
471 How far Backward this mode will reach:
472 How many bytes this mode will add to the size of the frag
473 Which mode to go to if the offset won't fit in this one
475 relax_typeS md_relax_table
[] =
477 {1, 1, 0, 0}, /* First entries aren't used */
478 {1, 1, 0, 0}, /* For no good reason except */
479 {1, 1, 0, 0}, /* that the VAX doesn't either */
482 {(127), (-128), 0, TAB (BRANCHBWL
, SHORT
)},
483 {(32767), (-32768), 2, TAB (BRANCHBWL
, LONG
)},
487 {(127), (-128), 0, TAB (BRABSJUNC
, SHORT
)},
488 {(32767), (-32768), 2, TAB (BRABSJUNC
, LONG
)},
492 {(127), (-128), 0, TAB (BRABSJCOND
, SHORT
)},
493 {(32767), (-32768), 2, TAB (BRABSJCOND
, LONG
)},
497 {(127), (-128), 0, TAB (BRANCHBW
, SHORT
)},
502 {1, 1, 0, 0}, /* FBRANCH doesn't come BYTE */
503 {(32767), (-32768), 2, TAB (FBRANCH
, LONG
)},
507 {1, 1, 0, 0}, /* DBCC doesn't come BYTE */
508 {(32767), (-32768), 2, TAB (DBCCLBR
, LONG
)},
512 {1, 1, 0, 0}, /* DBCC doesn't come BYTE */
513 {(32767), (-32768), 2, TAB (DBCCABSJ
, LONG
)},
517 {1, 1, 0, 0}, /* PCREL1632 doesn't come BYTE */
518 {32767, -32768, 2, TAB (PCREL1632
, LONG
)},
522 {125, -130, 0, TAB (PCINDEX
, SHORT
)},
523 {32765, -32770, 2, TAB (PCINDEX
, LONG
)},
527 {1, 1, 0, 0}, /* ABSTOPCREL doesn't come BYTE */
528 {(32767), (-32768), 2, TAB (ABSTOPCREL
, LONG
)},
533 /* These are the machine dependent pseudo-ops. These are included so
534 the assembler can work on the output from the SUN C compiler, which
538 /* This table describes all the machine specific pseudo-ops the assembler
539 has to support. The fields are:
540 pseudo-op name without dot
541 function to call to execute this pseudo-op
542 Integer arg to pass to the function
544 const pseudo_typeS md_pseudo_table
[] =
546 {"data1", s_data1
, 0},
547 {"data2", s_data2
, 0},
550 {"skip", s_space
, 0},
552 #if defined (TE_SUN3) || defined (OBJ_ELF)
553 {"align", s_align_bytes
, 0},
556 {"swbeg", s_ignore
, 0},
558 {"extend", float_cons
, 'x'},
559 {"ldouble", float_cons
, 'x'},
561 /* The following pseudo-ops are supported for MRI compatibility. */
563 {"comline", s_space
, 1},
565 {"mask2", s_ignore
, 0},
568 {"restore", s_restore
, 0},
572 {"if.b", s_mri_if
, 'b'},
573 {"if.w", s_mri_if
, 'w'},
574 {"if.l", s_mri_if
, 'l'},
575 {"else", s_mri_else
, 0},
576 {"else.s", s_mri_else
, 's'},
577 {"else.l", s_mri_else
, 'l'},
578 {"endi", s_mri_endi
, 0},
579 {"break", s_mri_break
, 0},
580 {"break.s", s_mri_break
, 's'},
581 {"break.l", s_mri_break
, 'l'},
582 {"next", s_mri_next
, 0},
583 {"next.s", s_mri_next
, 's'},
584 {"next.l", s_mri_next
, 'l'},
585 {"for", s_mri_for
, 0},
586 {"for.b", s_mri_for
, 'b'},
587 {"for.w", s_mri_for
, 'w'},
588 {"for.l", s_mri_for
, 'l'},
589 {"endf", s_mri_endf
, 0},
590 {"repeat", s_mri_repeat
, 0},
591 {"until", s_mri_until
, 0},
592 {"until.b", s_mri_until
, 'b'},
593 {"until.w", s_mri_until
, 'w'},
594 {"until.l", s_mri_until
, 'l'},
595 {"while", s_mri_while
, 0},
596 {"while.b", s_mri_while
, 'b'},
597 {"while.w", s_mri_while
, 'w'},
598 {"while.l", s_mri_while
, 'l'},
599 {"endw", s_mri_endw
, 0},
604 /* The mote pseudo ops are put into the opcode table, since they
605 don't start with a . they look like opcodes to gas.
609 extern void obj_coff_section
PARAMS ((int));
612 CONST pseudo_typeS mote_pseudo_table
[] =
625 {"xdef", s_globl
, 0},
627 {"align", s_align_bytes
, 0},
629 {"align", s_align_ptwo
, 0},
632 {"sect", obj_coff_section
, 0},
633 {"section", obj_coff_section
, 0},
638 #define issbyte(x) ((x)>=-128 && (x)<=127)
639 #define isubyte(x) ((x)>=0 && (x)<=255)
640 #define issword(x) ((x)>=-32768 && (x)<=32767)
641 #define isuword(x) ((x)>=0 && (x)<=65535)
643 #define isbyte(x) ((x)>= -255 && (x)<=255)
644 #define isword(x) ((x)>=-65536 && (x)<=65535)
645 #define islong(x) (1)
647 extern char *input_line_pointer
;
649 static char mklower_table
[256];
650 #define mklower(c) (mklower_table[(unsigned char) (c)])
651 static char notend_table
[256];
652 static char alt_notend_table
[256];
654 (! (notend_table[(unsigned char) *s] \
656 && alt_notend_table[(unsigned char) s[1]])))
658 #if defined (M68KCOFF) && !defined (BFD_ASSEMBLER)
660 #ifdef NO_PCREL_RELOCS
663 make_pcrel_absolute(fixP
, add_number
)
667 register unsigned char *opcode
= fixP
->fx_frag
->fr_opcode
;
669 /* rewrite the PC relative instructions to absolute address ones.
670 * these are rumoured to be faster, and the apollo linker refuses
671 * to deal with the PC relative relocations.
673 if (opcode
[0] == 0x60 && opcode
[1] == 0xff) /* BRA -> JMP */
678 else if (opcode
[0] == 0x61 && opcode
[1] == 0xff) /* BSR -> JSR */
684 as_fatal (_("Unknown PC relative instruction"));
689 #endif /* NO_PCREL_RELOCS */
692 tc_coff_fix2rtype (fixP
)
695 if (fixP
->fx_tcbit
&& fixP
->fx_size
== 4)
696 return R_RELLONG_NEG
;
697 #ifdef NO_PCREL_RELOCS
698 know (fixP
->fx_pcrel
== 0);
699 return (fixP
->fx_size
== 1 ? R_RELBYTE
700 : fixP
->fx_size
== 2 ? R_DIR16
703 return (fixP
->fx_pcrel
?
704 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
705 fixP
->fx_size
== 2 ? R_PCRWORD
:
707 (fixP
->fx_size
== 1 ? R_RELBYTE
:
708 fixP
->fx_size
== 2 ? R_RELWORD
:
717 /* Compute the relocation code for a fixup of SIZE bytes, using pc
718 relative relocation if PCREL is non-zero. PIC says whether a special
719 pic relocation was requested. */
721 static bfd_reloc_code_real_type get_reloc_code
722 PARAMS ((int, int, enum pic_relocation
));
724 static bfd_reloc_code_real_type
725 get_reloc_code (size
, pcrel
, pic
)
728 enum pic_relocation pic
;
736 return BFD_RELOC_8_GOT_PCREL
;
738 return BFD_RELOC_16_GOT_PCREL
;
740 return BFD_RELOC_32_GOT_PCREL
;
748 return BFD_RELOC_8_GOTOFF
;
750 return BFD_RELOC_16_GOTOFF
;
752 return BFD_RELOC_32_GOTOFF
;
760 return BFD_RELOC_8_PLT_PCREL
;
762 return BFD_RELOC_16_PLT_PCREL
;
764 return BFD_RELOC_32_PLT_PCREL
;
772 return BFD_RELOC_8_PLTOFF
;
774 return BFD_RELOC_16_PLTOFF
;
776 return BFD_RELOC_32_PLTOFF
;
786 return BFD_RELOC_8_PCREL
;
788 return BFD_RELOC_16_PCREL
;
790 return BFD_RELOC_32_PCREL
;
810 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
812 as_bad (_("Can not do %d byte pc-relative pic relocation"), size
);
817 as_bad (_("Can not do %d byte relocation"), size
);
819 as_bad (_("Can not do %d byte pic relocation"), size
);
822 return BFD_RELOC_NONE
;
825 /* Here we decide which fixups can be adjusted to make them relative
826 to the beginning of the section instead of the symbol. Basically
827 we need to make sure that the dynamic relocations are done
828 correctly, so in some cases we force the original symbol to be
831 tc_m68k_fix_adjustable (fixP
)
834 /* Prevent all adjustments to global symbols. */
835 if (S_IS_EXTERNAL (fixP
->fx_addsy
)
836 || S_IS_WEAK (fixP
->fx_addsy
))
839 /* adjust_reloc_syms doesn't know about the GOT */
840 switch (fixP
->fx_r_type
)
842 case BFD_RELOC_8_GOT_PCREL
:
843 case BFD_RELOC_16_GOT_PCREL
:
844 case BFD_RELOC_32_GOT_PCREL
:
845 case BFD_RELOC_8_GOTOFF
:
846 case BFD_RELOC_16_GOTOFF
:
847 case BFD_RELOC_32_GOTOFF
:
848 case BFD_RELOC_8_PLT_PCREL
:
849 case BFD_RELOC_16_PLT_PCREL
:
850 case BFD_RELOC_32_PLT_PCREL
:
851 case BFD_RELOC_8_PLTOFF
:
852 case BFD_RELOC_16_PLTOFF
:
853 case BFD_RELOC_32_PLTOFF
:
856 case BFD_RELOC_VTABLE_INHERIT
:
857 case BFD_RELOC_VTABLE_ENTRY
:
867 #define get_reloc_code(SIZE,PCREL,OTHER) NO_RELOC
874 tc_gen_reloc (section
, fixp
)
879 bfd_reloc_code_real_type code
;
881 /* If the tcbit is set, then this was a fixup of a negative value
882 that was never resolved. We do not have a reloc to handle this,
883 so just return. We assume that other code will have detected this
884 situation and produced a helpful error message, so we just tell the
885 user that the reloc cannot be produced. */
889 as_bad (_("Unable to produce reloc against symbol '%s'"),
890 S_GET_NAME (fixp
->fx_addsy
));
894 if (fixp
->fx_r_type
!= BFD_RELOC_NONE
)
896 code
= fixp
->fx_r_type
;
898 /* Since DIFF_EXPR_OK is defined in tc-m68k.h, it is possible
899 that fixup_segment converted a non-PC relative reloc into a
900 PC relative reloc. In such a case, we need to convert the
907 code
= BFD_RELOC_8_PCREL
;
910 code
= BFD_RELOC_16_PCREL
;
913 code
= BFD_RELOC_32_PCREL
;
915 case BFD_RELOC_8_PCREL
:
916 case BFD_RELOC_16_PCREL
:
917 case BFD_RELOC_32_PCREL
:
918 case BFD_RELOC_8_GOT_PCREL
:
919 case BFD_RELOC_16_GOT_PCREL
:
920 case BFD_RELOC_32_GOT_PCREL
:
921 case BFD_RELOC_8_GOTOFF
:
922 case BFD_RELOC_16_GOTOFF
:
923 case BFD_RELOC_32_GOTOFF
:
924 case BFD_RELOC_8_PLT_PCREL
:
925 case BFD_RELOC_16_PLT_PCREL
:
926 case BFD_RELOC_32_PLT_PCREL
:
927 case BFD_RELOC_8_PLTOFF
:
928 case BFD_RELOC_16_PLTOFF
:
929 case BFD_RELOC_32_PLTOFF
:
932 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
933 _("Cannot make %s relocation PC relative"),
934 bfd_get_reloc_code_name (code
));
940 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
941 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
943 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
944 MAP (1, 0, BFD_RELOC_8
);
945 MAP (2, 0, BFD_RELOC_16
);
946 MAP (4, 0, BFD_RELOC_32
);
947 MAP (1, 1, BFD_RELOC_8_PCREL
);
948 MAP (2, 1, BFD_RELOC_16_PCREL
);
949 MAP (4, 1, BFD_RELOC_32_PCREL
);
957 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
958 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
959 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
960 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
963 reloc
->addend
= fixp
->fx_addnumber
;
968 reloc
->addend
= fixp
->fx_addnumber
;
970 reloc
->addend
= (section
->vma
971 + (fixp
->fx_pcrel_adjust
== 64
972 ? -1 : fixp
->fx_pcrel_adjust
)
974 + md_pcrel_from (fixp
));
977 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
978 assert (reloc
->howto
!= 0);
983 #endif /* BFD_ASSEMBLER */
985 /* Return zero if the reference to SYMBOL from within the same segment may
989 /* On an ELF system, we can't relax an externally visible symbol,
990 because it may be overridden by a shared library. However, if
991 TARGET_OS is "elf", then we presume that we are assembling for an
992 embedded system, in which case we don't have to worry about shared
993 libraries, and we can relax anything. */
995 #define relaxable_symbol(symbol) \
996 (strcmp (TARGET_OS, "elf") == 0 \
997 || (! S_IS_EXTERNAL (symbol) \
998 && ! S_IS_WEAK (symbol)))
1002 #define relaxable_symbol(symbol) 1
1006 /* Handle of the OPCODE hash table. NULL means any use before
1007 m68k_ip_begin() will crash. */
1008 static struct hash_control
*op_hash
;
1010 /* Assemble an m68k instruction. */
1017 register struct m68k_op
*opP
;
1018 register const struct m68k_incant
*opcode
;
1019 register const char *s
;
1020 register int tmpreg
= 0, baseo
= 0, outro
= 0, nextword
;
1021 char *pdot
, *pdotmove
;
1022 enum m68k_size siz1
, siz2
;
1026 LITTLENUM_TYPE words
[6];
1027 LITTLENUM_TYPE
*wordp
;
1028 unsigned long ok_arch
= 0;
1030 if (*instring
== ' ')
1031 instring
++; /* skip leading whitespace */
1033 /* Scan up to end of operation-code, which MUST end in end-of-string
1034 or exactly 1 space. */
1036 for (p
= instring
; *p
!= '\0'; p
++)
1046 the_ins
.error
= _("No operator");
1050 /* p now points to the end of the opcode name, probably whitespace.
1051 Make sure the name is null terminated by clobbering the
1052 whitespace, look it up in the hash table, then fix it back.
1053 Remove a dot, first, since the opcode tables have none. */
1056 for (pdotmove
= pdot
; pdotmove
< p
; pdotmove
++)
1057 *pdotmove
= pdotmove
[1];
1063 opcode
= (const struct m68k_incant
*) hash_find (op_hash
, instring
);
1068 for (pdotmove
= p
; pdotmove
> pdot
; pdotmove
--)
1069 *pdotmove
= pdotmove
[-1];
1076 the_ins
.error
= _("Unknown operator");
1080 /* found a legitimate opcode, start matching operands */
1084 if (opcode
->m_operands
== 0)
1086 char *old
= input_line_pointer
;
1088 input_line_pointer
= p
;
1089 /* Ahh - it's a motorola style psuedo op */
1090 mote_pseudo_table
[opcode
->m_opnum
].poc_handler
1091 (mote_pseudo_table
[opcode
->m_opnum
].poc_val
);
1092 input_line_pointer
= old
;
1098 if (flag_mri
&& opcode
->m_opnum
== 0)
1100 /* In MRI mode, random garbage is allowed after an instruction
1101 which accepts no operands. */
1102 the_ins
.args
= opcode
->m_operands
;
1103 the_ins
.numargs
= opcode
->m_opnum
;
1104 the_ins
.numo
= opcode
->m_codenum
;
1105 the_ins
.opcode
[0] = getone (opcode
);
1106 the_ins
.opcode
[1] = gettwo (opcode
);
1110 for (opP
= &the_ins
.operands
[0]; *p
; opP
++)
1112 p
= crack_operand (p
, opP
);
1116 the_ins
.error
= opP
->error
;
1121 opsfound
= opP
- &the_ins
.operands
[0];
1123 /* This ugly hack is to support the floating pt opcodes in their
1124 standard form. Essentially, we fake a first enty of type COP#1 */
1125 if (opcode
->m_operands
[0] == 'I')
1129 for (n
= opsfound
; n
> 0; --n
)
1130 the_ins
.operands
[n
] = the_ins
.operands
[n
- 1];
1132 memset ((char *) (&the_ins
.operands
[0]), '\0',
1133 sizeof (the_ins
.operands
[0]));
1134 the_ins
.operands
[0].mode
= CONTROL
;
1135 the_ins
.operands
[0].reg
= m68k_float_copnum
;
1139 /* We've got the operands. Find an opcode that'll accept them */
1142 /* If we didn't get the right number of ops, or we have no
1143 common model with this pattern then reject this pattern. */
1145 ok_arch
|= opcode
->m_arch
;
1146 if (opsfound
!= opcode
->m_opnum
1147 || ((opcode
->m_arch
& current_architecture
) == 0))
1151 for (s
= opcode
->m_operands
, opP
= &the_ins
.operands
[0];
1155 /* Warning: this switch is huge! */
1156 /* I've tried to organize the cases into this order:
1157 non-alpha first, then alpha by letter. Lower-case
1158 goes directly before uppercase counterpart. */
1159 /* Code with multiple case ...: gets sorted by the lowest
1160 case ... it belongs to. I hope this makes sense. */
1266 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1283 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1302 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1312 if (opP
->mode
!= IMMED
)
1314 else if (s
[1] == 'b'
1315 && ! isvar (&opP
->disp
)
1316 && (opP
->disp
.exp
.X_op
!= O_constant
1317 || ! isbyte (opP
->disp
.exp
.X_add_number
)))
1319 else if (s
[1] == 'B'
1320 && ! isvar (&opP
->disp
)
1321 && (opP
->disp
.exp
.X_op
!= O_constant
1322 || ! issbyte (opP
->disp
.exp
.X_add_number
)))
1324 else if (s
[1] == 'w'
1325 && ! isvar (&opP
->disp
)
1326 && (opP
->disp
.exp
.X_op
!= O_constant
1327 || ! isword (opP
->disp
.exp
.X_add_number
)))
1329 else if (s
[1] == 'W'
1330 && ! isvar (&opP
->disp
)
1331 && (opP
->disp
.exp
.X_op
!= O_constant
1332 || ! issword (opP
->disp
.exp
.X_add_number
)))
1338 if (opP
->mode
!= IMMED
)
1343 if (opP
->mode
== AREG
1344 || opP
->mode
== CONTROL
1345 || opP
->mode
== FPREG
1346 || opP
->mode
== IMMED
1347 || opP
->mode
== REGLST
1348 || (opP
->mode
!= ABSL
1350 || opP
->reg
== ZPC
)))
1355 if (opP
->mode
== CONTROL
1356 || opP
->mode
== FPREG
1357 || opP
->mode
== REGLST
1358 || opP
->mode
== IMMED
1359 || (opP
->mode
!= ABSL
1361 || opP
->reg
== ZPC
)))
1389 if (opP
->mode
== CONTROL
1390 || opP
->mode
== FPREG
1391 || opP
->mode
== REGLST
)
1396 if (opP
->mode
!= AINC
)
1401 if (opP
->mode
!= ADEC
)
1451 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1472 case '~': /* For now! (JF FOO is this right?) */
1494 if (opP
->mode
!= CONTROL
1495 || (opP
->reg
!= TT0
&& opP
->reg
!= TT1
))
1500 if (opP
->mode
!= AREG
)
1505 if (opP
->mode
!= AINDR
)
1510 if (opP
->mode
!= ABSL
1512 && strncmp (instring
, "jbsr", 4) == 0))
1517 if (opP
->mode
!= CONTROL
|| opP
->reg
!= CCR
)
1522 if (opP
->mode
!= DISP
1524 || opP
->reg
> ADDR7
)
1529 if (opP
->mode
!= DREG
)
1534 if (opP
->reg
!= ACC
)
1539 if (opP
->mode
!= FPREG
)
1544 if (opP
->reg
!= MACSR
)
1549 if (opP
->reg
!= MASK
)
1554 if (opP
->mode
!= CONTROL
1561 if (opP
->mode
!= CONTROL
1563 || opP
->reg
> last_movec_reg
)
1567 const enum m68k_register
*rp
;
1568 for (rp
= control_regs
; *rp
; rp
++)
1569 if (*rp
== opP
->reg
)
1577 if (opP
->mode
!= IMMED
)
1583 if (opP
->mode
== DREG
1584 || opP
->mode
== AREG
1585 || opP
->mode
== FPREG
)
1594 opP
->mask
= 1 << (opP
->reg
- DATA0
);
1597 opP
->mask
= 1 << (opP
->reg
- ADDR0
+ 8);
1600 opP
->mask
= 1 << (opP
->reg
- FP0
+ 16);
1608 else if (opP
->mode
== CONTROL
)
1617 opP
->mask
= 1 << 24;
1620 opP
->mask
= 1 << 25;
1623 opP
->mask
= 1 << 26;
1632 else if (opP
->mode
!= REGLST
)
1634 else if (s
[1] == '8' && (opP
->mask
& 0x0ffffff) != 0)
1636 else if (s
[1] == '3' && (opP
->mask
& 0x7000000) != 0)
1641 if (opP
->mode
!= IMMED
)
1643 else if (opP
->disp
.exp
.X_op
!= O_constant
1644 || ! issbyte (opP
->disp
.exp
.X_add_number
))
1646 else if (! m68k_quick
1647 && instring
[3] != 'q'
1648 && instring
[4] != 'q')
1653 if (opP
->mode
!= DREG
1654 && opP
->mode
!= IMMED
1655 && opP
->mode
!= ABSL
)
1660 if (opP
->mode
!= IMMED
)
1662 else if (opP
->disp
.exp
.X_op
!= O_constant
1663 || opP
->disp
.exp
.X_add_number
< 1
1664 || opP
->disp
.exp
.X_add_number
> 8)
1666 else if (! m68k_quick
1667 && (strncmp (instring
, "add", 3) == 0
1668 || strncmp (instring
, "sub", 3) == 0)
1669 && instring
[3] != 'q')
1674 if (opP
->mode
!= DREG
&& opP
->mode
!= AREG
)
1679 if (opP
->mode
!= AINDR
1680 && (opP
->mode
!= BASE
1682 && opP
->reg
!= ZADDR0
)
1683 || opP
->disp
.exp
.X_op
!= O_absent
1684 || ((opP
->index
.reg
< DATA0
1685 || opP
->index
.reg
> DATA7
)
1686 && (opP
->index
.reg
< ADDR0
1687 || opP
->index
.reg
> ADDR7
))
1688 || opP
->index
.size
!= SIZE_UNSPEC
1689 || opP
->index
.scale
!= 1))
1694 if (opP
->mode
!= CONTROL
1695 || ! (opP
->reg
== FPI
1697 || opP
->reg
== FPC
))
1702 if (opP
->mode
!= CONTROL
|| opP
->reg
!= SR
)
1707 if (opP
->mode
!= IMMED
)
1709 else if (opP
->disp
.exp
.X_op
!= O_constant
1710 || opP
->disp
.exp
.X_add_number
< 0
1711 || opP
->disp
.exp
.X_add_number
> 7)
1716 if (opP
->mode
!= CONTROL
|| opP
->reg
!= USP
)
1720 /* JF these are out of order. We could put them
1721 in order if we were willing to put up with
1722 bunches of #ifdef m68851s in the code.
1724 Don't forget that you need these operands
1725 to use 68030 MMU instructions. */
1727 /* Memory addressing mode used by pflushr */
1729 if (opP
->mode
== CONTROL
1730 || opP
->mode
== FPREG
1731 || opP
->mode
== DREG
1732 || opP
->mode
== AREG
1733 || opP
->mode
== REGLST
)
1735 /* We should accept immediate operands, but they
1736 supposedly have to be quad word, and we don't
1737 handle that. I would like to see what a Motorola
1738 assembler does before doing something here. */
1739 if (opP
->mode
== IMMED
)
1744 if (opP
->mode
!= CONTROL
1745 || (opP
->reg
!= SFC
&& opP
->reg
!= DFC
))
1750 if (opP
->mode
!= CONTROL
|| opP
->reg
!= TC
)
1755 if (opP
->mode
!= CONTROL
|| opP
->reg
!= AC
)
1760 if (opP
->mode
!= CONTROL
1763 && opP
->reg
!= SCC
))
1768 if (opP
->mode
!= CONTROL
1774 if (opP
->mode
!= CONTROL
1777 && opP
->reg
!= CRP
))
1782 if (opP
->mode
!= CONTROL
1783 || (!(opP
->reg
>= BAD
&& opP
->reg
<= BAD
+ 7)
1784 && !(opP
->reg
>= BAC
&& opP
->reg
<= BAC
+ 7)))
1789 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PSR
)
1794 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PCSR
)
1799 if (opP
->mode
!= CONTROL
1806 } /* not a cache specifier. */
1810 if (opP
->mode
!= ABSL
)
1815 if (opP
->reg
< DATA0L
|| opP
->reg
> ADDR7U
)
1817 /* FIXME: kludge instead of fixing parser:
1818 upper/lower registers are *not* CONTROL
1819 registers, but ordinary ones. */
1820 if ((opP
->reg
>= DATA0L
&& opP
->reg
<= DATA7L
)
1821 || (opP
->reg
>= DATA0U
&& opP
->reg
<= DATA7U
))
1829 } /* switch on type of operand */
1833 } /* for each operand */
1834 } /* if immediately wrong */
1841 opcode
= opcode
->m_next
;
1846 && !(ok_arch
& current_architecture
))
1851 _("invalid instruction for this architecture; needs "));
1852 cp
= buf
+ strlen (buf
);
1856 strcpy (cp
, _("fpu (68040, 68060 or 68881/68882)"));
1859 strcpy (cp
, _("mmu (68030 or 68851)"));
1862 strcpy (cp
, _("68020 or higher"));
1865 strcpy (cp
, _("68000 or higher"));
1868 strcpy (cp
, _("68010 or higher"));
1872 int got_one
= 0, idx
;
1874 idx
< (int) (sizeof (archs
) / sizeof (archs
[0]));
1877 if ((archs
[idx
].arch
& ok_arch
)
1878 && ! archs
[idx
].alias
)
1882 strcpy (cp
, " or ");
1886 strcpy (cp
, archs
[idx
].name
);
1892 cp
= xmalloc (strlen (buf
) + 1);
1897 the_ins
.error
= _("operands mismatch");
1899 } /* Fell off the end */
1904 /* now assemble it */
1906 the_ins
.args
= opcode
->m_operands
;
1907 the_ins
.numargs
= opcode
->m_opnum
;
1908 the_ins
.numo
= opcode
->m_codenum
;
1909 the_ins
.opcode
[0] = getone (opcode
);
1910 the_ins
.opcode
[1] = gettwo (opcode
);
1912 for (s
= the_ins
.args
, opP
= &the_ins
.operands
[0]; *s
; s
+= 2, opP
++)
1914 /* This switch is a doozy.
1915 Watch the first step; its a big one! */
1943 tmpreg
= 0x3c; /* 7.4 */
1944 if (strchr ("bwl", s
[1]))
1945 nextword
= get_num (&opP
->disp
, 80);
1947 nextword
= get_num (&opP
->disp
, 0);
1948 if (isvar (&opP
->disp
))
1949 add_fix (s
[1], &opP
->disp
, 0, 0);
1953 if (!isbyte (nextword
))
1954 opP
->error
= _("operand out of range");
1959 if (!isword (nextword
))
1960 opP
->error
= _("operand out of range");
1965 if (!issword (nextword
))
1966 opP
->error
= _("operand out of range");
1971 addword (nextword
>> 16);
1998 /* We gotta put out some float */
1999 if (op (&opP
->disp
) != O_big
)
2004 /* Can other cases happen here? */
2005 if (op (&opP
->disp
) != O_constant
)
2008 val
= (valueT
) offs (&opP
->disp
);
2012 generic_bignum
[gencnt
] = (LITTLENUM_TYPE
) val
;
2013 val
>>= LITTLENUM_NUMBER_OF_BITS
;
2017 offs (&opP
->disp
) = gencnt
;
2019 if (offs (&opP
->disp
) > 0)
2021 if (offs (&opP
->disp
) > baseo
)
2023 as_warn (_("Bignum too big for %c format; truncated"),
2025 offs (&opP
->disp
) = baseo
;
2027 baseo
-= offs (&opP
->disp
);
2030 for (wordp
= generic_bignum
+ offs (&opP
->disp
) - 1;
2031 offs (&opP
->disp
)--;
2036 gen_to_words (words
, baseo
, (long) outro
);
2037 for (wordp
= words
; baseo
--; wordp
++)
2041 tmpreg
= opP
->reg
- DATA
; /* 0.dreg */
2044 tmpreg
= 0x08 + opP
->reg
- ADDR
; /* 1.areg */
2047 tmpreg
= 0x10 + opP
->reg
- ADDR
; /* 2.areg */
2050 tmpreg
= 0x20 + opP
->reg
- ADDR
; /* 4.areg */
2053 tmpreg
= 0x18 + opP
->reg
- ADDR
; /* 3.areg */
2057 nextword
= get_num (&opP
->disp
, 80);
2060 && ! isvar (&opP
->disp
)
2063 opP
->disp
.exp
.X_op
= O_symbol
;
2064 #ifndef BFD_ASSEMBLER
2065 opP
->disp
.exp
.X_add_symbol
= &abs_symbol
;
2067 opP
->disp
.exp
.X_add_symbol
=
2068 section_symbol (absolute_section
);
2072 /* Force into index mode. Hope this works */
2074 /* We do the first bit for 32-bit displacements, and the
2075 second bit for 16 bit ones. It is possible that we
2076 should make the default be WORD instead of LONG, but
2077 I think that'd break GCC, so we put up with a little
2078 inefficiency for the sake of working output. */
2080 if (!issword (nextword
)
2081 || (isvar (&opP
->disp
)
2082 && ((opP
->disp
.size
== SIZE_UNSPEC
2083 && flag_short_refs
== 0
2084 && cpu_of_arch (current_architecture
) >= m68020
2085 && ! arch_coldfire_p (current_architecture
))
2086 || opP
->disp
.size
== SIZE_LONG
)))
2088 if (cpu_of_arch (current_architecture
) < m68020
2089 || arch_coldfire_p (current_architecture
))
2091 _("displacement too large for this architecture; needs 68020 or higher");
2093 tmpreg
= 0x3B; /* 7.3 */
2095 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
2096 if (isvar (&opP
->disp
))
2100 if (opP
->disp
.size
== SIZE_LONG
2102 /* If the displacement needs pic
2103 relocation it cannot be relaxed. */
2104 || opP
->disp
.pic_reloc
!= pic_none
2109 add_fix ('l', &opP
->disp
, 1, 2);
2113 add_frag (adds (&opP
->disp
),
2115 TAB (PCREL1632
, SZ_UNDEF
));
2122 add_fix ('l', &opP
->disp
, 0, 0);
2127 addword (nextword
>> 16);
2132 tmpreg
= 0x3A; /* 7.2 */
2134 tmpreg
= 0x28 + opP
->reg
- ADDR
; /* 5.areg */
2136 if (isvar (&opP
->disp
))
2140 add_fix ('w', &opP
->disp
, 1, 0);
2143 add_fix ('w', &opP
->disp
, 0, 0);
2153 baseo
= get_num (&opP
->disp
, 80);
2154 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
2155 outro
= get_num (&opP
->odisp
, 80);
2156 /* Figure out the `addressing mode'.
2157 Also turn on the BASE_DISABLE bit, if needed. */
2158 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
2160 tmpreg
= 0x3b; /* 7.3 */
2161 if (opP
->reg
== ZPC
)
2164 else if (opP
->reg
== 0)
2167 tmpreg
= 0x30; /* 6.garbage */
2169 else if (opP
->reg
>= ZADDR0
&& opP
->reg
<= ZADDR7
)
2172 tmpreg
= 0x30 + opP
->reg
- ZADDR0
;
2175 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
2177 siz1
= opP
->disp
.size
;
2178 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
2179 siz2
= opP
->odisp
.size
;
2183 /* Index register stuff */
2184 if (opP
->index
.reg
!= 0
2185 && opP
->index
.reg
>= DATA
2186 && opP
->index
.reg
<= ADDR7
)
2188 nextword
|= (opP
->index
.reg
- DATA
) << 12;
2190 if (opP
->index
.size
== SIZE_LONG
2191 || (opP
->index
.size
== SIZE_UNSPEC
2192 && m68k_index_width_default
== SIZE_LONG
))
2195 if ((opP
->index
.scale
!= 1
2196 && cpu_of_arch (current_architecture
) < m68020
)
2197 || (opP
->index
.scale
== 8
2198 && arch_coldfire_p (current_architecture
)))
2201 _("scale factor invalid on this architecture; needs cpu32 or 68020 or higher");
2204 if (arch_coldfire_p (current_architecture
)
2205 && opP
->index
.size
== SIZE_WORD
)
2206 opP
->error
= _("invalid index size for coldfire");
2208 switch (opP
->index
.scale
)
2225 GET US OUT OF HERE! */
2227 /* Must be INDEX, with an index register. Address
2228 register cannot be ZERO-PC, and either :b was
2229 forced, or we know it will fit. For a 68000 or
2230 68010, force this mode anyways, because the
2231 larger modes aren't supported. */
2232 if (opP
->mode
== BASE
2233 && ((opP
->reg
>= ADDR0
2234 && opP
->reg
<= ADDR7
)
2237 if (siz1
== SIZE_BYTE
2238 || cpu_of_arch (current_architecture
) < m68020
2239 || arch_coldfire_p (current_architecture
)
2240 || (siz1
== SIZE_UNSPEC
2241 && ! isvar (&opP
->disp
)
2242 && issbyte (baseo
)))
2244 nextword
+= baseo
& 0xff;
2246 if (isvar (&opP
->disp
))
2248 /* Do a byte relocation. If it doesn't
2249 fit (possible on m68000) let the
2250 fixup processing complain later. */
2252 add_fix ('B', &opP
->disp
, 1, 1);
2254 add_fix ('B', &opP
->disp
, 0, 0);
2256 else if (siz1
!= SIZE_BYTE
)
2258 if (siz1
!= SIZE_UNSPEC
)
2259 as_warn (_("Forcing byte displacement"));
2260 if (! issbyte (baseo
))
2261 opP
->error
= _("byte displacement out of range");
2266 else if (siz1
== SIZE_UNSPEC
2268 && isvar (&opP
->disp
)
2269 && subs (&opP
->disp
) == NULL
2271 /* If the displacement needs pic
2272 relocation it cannot be relaxed. */
2273 && opP
->disp
.pic_reloc
== pic_none
2277 /* The code in md_convert_frag_1 needs to be
2278 able to adjust nextword. Call frag_grow
2279 to ensure that we have enough space in
2280 the frag obstack to make all the bytes
2283 nextword
+= baseo
& 0xff;
2285 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2286 TAB (PCINDEX
, SZ_UNDEF
));
2294 nextword
|= 0x40; /* No index reg */
2295 if (opP
->index
.reg
>= ZDATA0
2296 && opP
->index
.reg
<= ZDATA7
)
2297 nextword
|= (opP
->index
.reg
- ZDATA0
) << 12;
2298 else if (opP
->index
.reg
>= ZADDR0
2299 || opP
->index
.reg
<= ZADDR7
)
2300 nextword
|= (opP
->index
.reg
- ZADDR0
+ 8) << 12;
2303 /* It isn't simple. */
2305 if (cpu_of_arch (current_architecture
) < m68020
2306 || arch_coldfire_p (current_architecture
))
2308 _("invalid operand mode for this architecture; needs 68020 or higher");
2311 /* If the guy specified a width, we assume that it is
2312 wide enough. Maybe it isn't. If so, we lose. */
2316 if (isvar (&opP
->disp
)
2318 : ! issword (baseo
))
2323 else if (! isvar (&opP
->disp
) && baseo
== 0)
2332 as_warn (_(":b not permitted; defaulting to :w"));
2342 /* Figure out innner displacement stuff */
2343 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
2345 if (cpu_of_arch (current_architecture
) & cpu32
)
2346 opP
->error
= _("invalid operand mode for this architecture; needs 68020 or higher");
2350 if (isvar (&opP
->odisp
)
2352 : ! issword (outro
))
2357 else if (! isvar (&opP
->odisp
) && outro
== 0)
2366 as_warn (_(":b not permitted; defaulting to :w"));
2375 if (opP
->mode
== POST
2376 && (nextword
& 0x40) == 0)
2381 if (siz1
!= SIZE_UNSPEC
&& isvar (&opP
->disp
))
2383 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
2384 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 1, 2);
2386 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 0, 0);
2388 if (siz1
== SIZE_LONG
)
2389 addword (baseo
>> 16);
2390 if (siz1
!= SIZE_UNSPEC
)
2393 if (siz2
!= SIZE_UNSPEC
&& isvar (&opP
->odisp
))
2394 add_fix (siz2
== SIZE_LONG
? 'l' : 'w', &opP
->odisp
, 0, 0);
2395 if (siz2
== SIZE_LONG
)
2396 addword (outro
>> 16);
2397 if (siz2
!= SIZE_UNSPEC
)
2403 nextword
= get_num (&opP
->disp
, 80);
2404 switch (opP
->disp
.size
)
2409 if (!isvar (&opP
->disp
) && issword (offs (&opP
->disp
)))
2411 tmpreg
= 0x38; /* 7.0 */
2415 if (isvar (&opP
->disp
)
2416 && !subs (&opP
->disp
)
2417 && adds (&opP
->disp
)
2419 /* If the displacement needs pic relocation it
2420 cannot be relaxed. */
2421 && opP
->disp
.pic_reloc
== pic_none
2424 && !strchr ("~%&$?", s
[0]))
2426 tmpreg
= 0x3A; /* 7.2 */
2427 add_frag (adds (&opP
->disp
),
2429 TAB (ABSTOPCREL
, SZ_UNDEF
));
2432 /* Fall through into long */
2434 if (isvar (&opP
->disp
))
2435 add_fix ('l', &opP
->disp
, 0, 0);
2437 tmpreg
= 0x39;/* 7.1 mode */
2438 addword (nextword
>> 16);
2443 as_bad (_("unsupported byte value; use a different suffix"));
2445 case SIZE_WORD
: /* Word */
2446 if (isvar (&opP
->disp
))
2447 add_fix ('w', &opP
->disp
, 0, 0);
2449 tmpreg
= 0x38;/* 7.0 mode */
2457 as_bad (_("unknown/incorrect operand"));
2460 install_gen_operand (s
[1], tmpreg
);
2466 { /* JF: I hate floating point! */
2481 tmpreg
= get_num (&opP
->disp
, tmpreg
);
2482 if (isvar (&opP
->disp
))
2483 add_fix (s
[1], &opP
->disp
, 0, 0);
2486 case 'b': /* Danger: These do no check for
2487 certain types of overflow.
2489 if (!isbyte (tmpreg
))
2490 opP
->error
= _("out of range");
2491 insop (tmpreg
, opcode
);
2492 if (isvar (&opP
->disp
))
2493 the_ins
.reloc
[the_ins
.nrel
- 1].n
=
2494 (opcode
->m_codenum
) * 2 + 1;
2497 if (!issbyte (tmpreg
))
2498 opP
->error
= _("out of range");
2499 the_ins
.opcode
[the_ins
.numo
- 1] |= tmpreg
& 0xff;
2500 if (isvar (&opP
->disp
))
2501 the_ins
.reloc
[the_ins
.nrel
- 1].n
= opcode
->m_codenum
* 2 - 1;
2504 if (!isword (tmpreg
))
2505 opP
->error
= _("out of range");
2506 insop (tmpreg
, opcode
);
2507 if (isvar (&opP
->disp
))
2508 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2511 if (!issword (tmpreg
))
2512 opP
->error
= _("out of range");
2513 insop (tmpreg
, opcode
);
2514 if (isvar (&opP
->disp
))
2515 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2518 /* Because of the way insop works, we put these two out
2520 insop (tmpreg
, opcode
);
2521 insop (tmpreg
>> 16, opcode
);
2522 if (isvar (&opP
->disp
))
2523 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2530 install_operand (s
[1], tmpreg
);
2541 install_operand (s
[1], opP
->reg
- ADDR
);
2545 tmpreg
= get_num (&opP
->disp
, 80);
2549 /* The pc_fix argument winds up in fx_pcrel_adjust,
2550 which is a char, and may therefore be unsigned. We
2551 want to pass -1, but we pass 64 instead, and convert
2552 back in md_pcrel_from. */
2553 add_fix ('B', &opP
->disp
, 1, 64);
2556 add_fix ('w', &opP
->disp
, 1, 0);
2561 if (! HAVE_LONG_BRANCH (current_architecture
))
2562 as_warn (_("Can't use long branches on 68000/68010/5200"));
2563 the_ins
.opcode
[0] |= 0xff;
2564 add_fix ('l', &opP
->disp
, 1, 0);
2569 if (subs (&opP
->disp
)) /* We can't relax it */
2573 /* If the displacement needs pic relocation it cannot be
2575 if (opP
->disp
.pic_reloc
!= pic_none
)
2578 /* This could either be a symbol, or an absolute
2579 address. If it's an absolute address, turn it into
2580 an absolute jump right here and keep it out of the
2582 if (adds (&opP
->disp
) == 0)
2584 if (the_ins
.opcode
[0] == 0x6000) /* jbra */
2585 the_ins
.opcode
[0] = 0x4EF1;
2586 else if (the_ins
.opcode
[0] == 0x6100) /* jbsr */
2587 the_ins
.opcode
[0] = 0x4EB1;
2590 the_ins
.opcode
[0] ^= 0x0100;
2591 the_ins
.opcode
[0] |= 0x0006;
2594 add_fix ('l', &opP
->disp
, 0, 0);
2600 /* Now we know it's going into the relaxer. Now figure
2601 out which mode. We try in this order of preference:
2602 long branch, absolute jump, byte/word branches only. */
2603 if (HAVE_LONG_BRANCH (current_architecture
))
2604 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2605 TAB (BRANCHBWL
, SZ_UNDEF
));
2606 else if (! flag_keep_pcrel
)
2608 if ((the_ins
.opcode
[0] == 0x6000)
2609 || (the_ins
.opcode
[0] == 0x6100))
2610 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2611 TAB (BRABSJUNC
, SZ_UNDEF
));
2613 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2614 TAB (BRABSJCOND
, SZ_UNDEF
));
2617 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2618 TAB (BRANCHBW
, SZ_UNDEF
));
2621 if (isvar (&opP
->disp
))
2623 /* Check for DBcc instructions. We can relax them,
2624 but only if we have long branches and/or absolute
2626 if (((the_ins
.opcode
[0] & 0xf0f8) == 0x50c8)
2627 && (HAVE_LONG_BRANCH (current_architecture
)
2628 || (! flag_keep_pcrel
)))
2630 if (HAVE_LONG_BRANCH (current_architecture
))
2631 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2632 TAB (DBCCLBR
, SZ_UNDEF
));
2634 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2635 TAB (DBCCABSJ
, SZ_UNDEF
));
2638 add_fix ('w', &opP
->disp
, 1, 0);
2642 case 'C': /* Fixed size LONG coproc branches */
2643 add_fix ('l', &opP
->disp
, 1, 0);
2647 case 'c': /* Var size Coprocesssor branches */
2648 if (subs (&opP
->disp
) || (adds (&opP
->disp
) == 0))
2650 the_ins
.opcode
[the_ins
.numo
- 1] |= 0x40;
2651 add_fix ('l', &opP
->disp
, 1, 0);
2656 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2657 TAB (FBRANCH
, SZ_UNDEF
));
2664 case 'C': /* Ignore it */
2667 case 'd': /* JF this is a kludge */
2668 install_operand ('s', opP
->reg
- ADDR
);
2669 tmpreg
= get_num (&opP
->disp
, 80);
2670 if (!issword (tmpreg
))
2672 as_warn (_("Expression out of range, using 0"));
2679 install_operand (s
[1], opP
->reg
- DATA
);
2682 case 'E': /* Ignore it */
2686 install_operand (s
[1], opP
->reg
- FP0
);
2689 case 'G': /* Ignore it */
2694 tmpreg
= opP
->reg
- COP0
;
2695 install_operand (s
[1], tmpreg
);
2698 case 'J': /* JF foo */
2771 install_operand (s
[1], tmpreg
);
2775 tmpreg
= get_num (&opP
->disp
, 55);
2776 install_operand (s
[1], tmpreg
& 0x7f);
2783 if (tmpreg
& 0x7FF0000)
2784 as_bad (_("Floating point register in register list"));
2785 insop (reverse_16_bits (tmpreg
), opcode
);
2789 if (tmpreg
& 0x700FFFF)
2790 as_bad (_("Wrong register in floating-point reglist"));
2791 install_operand (s
[1], reverse_8_bits (tmpreg
>> 16));
2799 if (tmpreg
& 0x7FF0000)
2800 as_bad (_("Floating point register in register list"));
2801 insop (tmpreg
, opcode
);
2803 else if (s
[1] == '8')
2805 if (tmpreg
& 0x0FFFFFF)
2806 as_bad (_("incorrect register in reglist"));
2807 install_operand (s
[1], tmpreg
>> 24);
2811 if (tmpreg
& 0x700FFFF)
2812 as_bad (_("wrong register in floating-point reglist"));
2814 install_operand (s
[1], tmpreg
>> 16);
2819 install_operand (s
[1], get_num (&opP
->disp
, 60));
2823 tmpreg
= ((opP
->mode
== DREG
)
2824 ? 0x20 + (int) (opP
->reg
- DATA
)
2825 : (get_num (&opP
->disp
, 40) & 0x1F));
2826 install_operand (s
[1], tmpreg
);
2830 tmpreg
= get_num (&opP
->disp
, 10);
2833 install_operand (s
[1], tmpreg
);
2837 /* This depends on the fact that ADDR registers are eight
2838 more than their corresponding DATA regs, so the result
2839 will have the ADDR_REG bit set */
2840 install_operand (s
[1], opP
->reg
- DATA
);
2844 if (opP
->mode
== AINDR
)
2845 install_operand (s
[1], opP
->reg
- DATA
);
2847 install_operand (s
[1], opP
->index
.reg
- DATA
);
2851 if (opP
->reg
== FPI
)
2853 else if (opP
->reg
== FPS
)
2855 else if (opP
->reg
== FPC
)
2859 install_operand (s
[1], tmpreg
);
2862 case 'S': /* Ignore it */
2866 install_operand (s
[1], get_num (&opP
->disp
, 30));
2869 case 'U': /* Ignore it */
2888 as_fatal (_("failed sanity check"));
2889 } /* switch on cache token */
2890 install_operand (s
[1], tmpreg
);
2893 /* JF: These are out of order, I fear. */
2906 install_operand (s
[1], tmpreg
);
2932 install_operand (s
[1], tmpreg
);
2936 if (opP
->reg
== VAL
)
2955 install_operand (s
[1], tmpreg
);
2969 tmpreg
= (4 << 10) | ((opP
->reg
- BAD
) << 2);
2980 tmpreg
= (5 << 10) | ((opP
->reg
- BAC
) << 2);
2986 install_operand (s
[1], tmpreg
);
2989 know (opP
->reg
== PSR
);
2992 know (opP
->reg
== PCSR
);
3007 install_operand (s
[1], tmpreg
);
3010 tmpreg
= get_num (&opP
->disp
, 20);
3011 install_operand (s
[1], tmpreg
);
3013 case '_': /* used only for move16 absolute 32-bit address */
3014 if (isvar (&opP
->disp
))
3015 add_fix ('l', &opP
->disp
, 0, 0);
3016 tmpreg
= get_num (&opP
->disp
, 80);
3017 addword (tmpreg
>> 16);
3018 addword (tmpreg
& 0xFFFF);
3021 install_operand (s
[1], opP
->reg
- DATA0L
);
3022 opP
->reg
-= (DATA0L
);
3023 opP
->reg
&= 0x0F; /* remove upper/lower bit */
3030 /* By the time whe get here (FINALLY) the_ins contains the complete
3031 instruction, ready to be emitted. . . */
3035 reverse_16_bits (in
)
3041 static int mask
[16] =
3043 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
3044 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000
3046 for (n
= 0; n
< 16; n
++)
3049 out
|= mask
[15 - n
];
3052 } /* reverse_16_bits() */
3061 static int mask
[8] =
3063 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
3066 for (n
= 0; n
< 8; n
++)
3072 } /* reverse_8_bits() */
3074 /* Cause an extra frag to be generated here, inserting up to 10 bytes
3075 (that value is chosen in the frag_var call in md_assemble). TYPE
3076 is the subtype of the frag to be generated; its primary type is
3077 rs_machine_dependent.
3079 The TYPE parameter is also used by md_convert_frag_1 and
3080 md_estimate_size_before_relax. The appropriate type of fixup will
3081 be emitted by md_convert_frag_1.
3083 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
3085 install_operand (mode
, val
)
3092 the_ins
.opcode
[0] |= val
& 0xFF; /* JF FF is for M kludge */
3095 the_ins
.opcode
[0] |= val
<< 9;
3098 the_ins
.opcode
[1] |= val
<< 12;
3101 the_ins
.opcode
[1] |= val
<< 6;
3104 the_ins
.opcode
[1] |= val
;
3107 the_ins
.opcode
[2] |= val
<< 12;
3110 the_ins
.opcode
[2] |= val
<< 6;
3113 /* DANGER! This is a hack to force cas2l and cas2w cmds to be
3114 three words long! */
3116 the_ins
.opcode
[2] |= val
;
3119 the_ins
.opcode
[1] |= val
<< 7;
3122 the_ins
.opcode
[1] |= val
<< 10;
3126 the_ins
.opcode
[1] |= val
<< 5;
3131 the_ins
.opcode
[1] |= (val
<< 10) | (val
<< 7);
3134 the_ins
.opcode
[1] |= (val
<< 12) | val
;
3137 the_ins
.opcode
[0] |= val
= 0xff;
3140 the_ins
.opcode
[0] |= val
<< 9;
3143 the_ins
.opcode
[1] |= val
;
3146 the_ins
.opcode
[1] |= val
;
3147 the_ins
.numo
++; /* What a hack */
3150 the_ins
.opcode
[1] |= val
<< 4;
3158 the_ins
.opcode
[0] |= (val
<< 6);
3161 the_ins
.opcode
[1] = (val
>> 16);
3162 the_ins
.opcode
[2] = val
& 0xffff;
3165 the_ins
.opcode
[0] |= ((val
& 0x8) << (6 - 3));
3166 the_ins
.opcode
[0] |= ((val
& 0x7) << 9);
3167 the_ins
.opcode
[1] |= ((val
& 0x10) << (7 - 4));
3170 the_ins
.opcode
[0] |= ((val
& 0x8) << (6 - 3));
3171 the_ins
.opcode
[0] |= ((val
& 0x7) << 9);
3174 the_ins
.opcode
[1] |= val
<< 12;
3175 the_ins
.opcode
[1] |= ((val
& 0x10) << (7 - 4));
3178 the_ins
.opcode
[0] |= (val
& 0xF);
3179 the_ins
.opcode
[1] |= ((val
& 0x10) << (6 - 4));
3182 the_ins
.opcode
[1] |= (val
& 0xF);
3183 the_ins
.opcode
[1] |= ((val
& 0x10) << (6 - 4));
3186 the_ins
.opcode
[1] |= ((val
!= 1) << 10);
3190 as_fatal (_("failed sanity check."));
3192 } /* install_operand() */
3195 install_gen_operand (mode
, val
)
3202 the_ins
.opcode
[0] |= val
;
3205 /* This is a kludge!!! */
3206 the_ins
.opcode
[0] |= (val
& 0x07) << 9 | (val
& 0x38) << 3;
3215 the_ins
.opcode
[0] |= val
;
3217 /* more stuff goes here */
3219 as_fatal (_("failed sanity check."));
3221 } /* install_gen_operand() */
3224 * verify that we have some number of paren pairs, do m68k_ip_op(), and
3225 * then deal with the bitfield hack.
3229 crack_operand (str
, opP
)
3231 register struct m68k_op
*opP
;
3233 register int parens
;
3235 register char *beg_str
;
3243 for (parens
= 0; *str
&& (parens
> 0 || inquote
|| notend (str
)); str
++)
3249 else if (*str
== ')')
3253 opP
->error
= _("Extra )");
3259 if (flag_mri
&& *str
== '\'')
3260 inquote
= ! inquote
;
3262 if (!*str
&& parens
)
3264 opP
->error
= _("Missing )");
3269 if (m68k_ip_op (beg_str
, opP
) != 0)
3276 c
= *++str
; /* JF bitfield hack */
3281 as_bad (_("Missing operand"));
3284 /* Detect MRI REG symbols and convert them to REGLSTs. */
3285 if (opP
->mode
== CONTROL
&& (int)opP
->reg
< 0)
3288 opP
->mask
= ~(int)opP
->reg
;
3295 /* This is the guts of the machine-dependent assembler. STR points to a
3296 machine dependent instruction. This function is supposed to emit
3297 the frags/bytes it assembles to.
3301 insert_reg (regname
, regnum
)
3302 const char *regname
;
3308 #ifdef REGISTER_PREFIX
3309 if (!flag_reg_prefix_optional
)
3311 buf
[0] = REGISTER_PREFIX
;
3312 strcpy (buf
+ 1, regname
);
3317 symbol_table_insert (symbol_new (regname
, reg_section
, regnum
,
3318 &zero_address_frag
));
3320 for (i
= 0; regname
[i
]; i
++)
3321 buf
[i
] = islower (regname
[i
]) ? toupper (regname
[i
]) : regname
[i
];
3324 symbol_table_insert (symbol_new (buf
, reg_section
, regnum
,
3325 &zero_address_frag
));
3334 static const struct init_entry init_table
[] =
3393 /* control registers */
3394 { "sfc", SFC
}, /* Source Function Code */
3396 { "dfc", DFC
}, /* Destination Function Code */
3398 { "cacr", CACR
}, /* Cache Control Register */
3399 { "caar", CAAR
}, /* Cache Address Register */
3401 { "usp", USP
}, /* User Stack Pointer */
3402 { "vbr", VBR
}, /* Vector Base Register */
3403 { "msp", MSP
}, /* Master Stack Pointer */
3404 { "isp", ISP
}, /* Interrupt Stack Pointer */
3406 { "itt0", ITT0
}, /* Instruction Transparent Translation Reg 0 */
3407 { "itt1", ITT1
}, /* Instruction Transparent Translation Reg 1 */
3408 { "dtt0", DTT0
}, /* Data Transparent Translation Register 0 */
3409 { "dtt1", DTT1
}, /* Data Transparent Translation Register 1 */
3411 /* 68ec040 versions of same */
3412 { "iacr0", ITT0
}, /* Instruction Access Control Register 0 */
3413 { "iacr1", ITT1
}, /* Instruction Access Control Register 0 */
3414 { "dacr0", DTT0
}, /* Data Access Control Register 0 */
3415 { "dacr1", DTT1
}, /* Data Access Control Register 0 */
3417 /* mcf5200 versions of same. The ColdFire programmer's reference
3418 manual indicated that the order is 2,3,0,1, but Ken Rose
3419 <rose@netcom.com> says that 0,1,2,3 is the correct order. */
3420 { "acr0", ITT0
}, /* Access Control Unit 0 */
3421 { "acr1", ITT1
}, /* Access Control Unit 1 */
3422 { "acr2", DTT0
}, /* Access Control Unit 2 */
3423 { "acr3", DTT1
}, /* Access Control Unit 3 */
3425 { "tc", TC
}, /* MMU Translation Control Register */
3428 { "mmusr", MMUSR
}, /* MMU Status Register */
3429 { "srp", SRP
}, /* User Root Pointer */
3430 { "urp", URP
}, /* Supervisor Root Pointer */
3435 { "rombar", ROMBAR
}, /* ROM Base Address Register */
3436 { "rambar0", RAMBAR0
}, /* ROM Base Address Register */
3437 { "rambar1", RAMBAR1
}, /* ROM Base Address Register */
3438 { "mbar", MBAR
}, /* Module Base Address Register */
3439 /* end of control registers */
3473 /* 68ec030 versions of same */
3476 /* 68ec030 access control unit, identical to 030 MMU status reg */
3479 /* Suppressed data and address registers. */
3497 /* Upper and lower data and address registers, used by macw and msacw. */
3541 for (i
= 0; init_table
[i
].name
; i
++)
3542 insert_reg (init_table
[i
].name
, init_table
[i
].number
);
3545 static int no_68851
, no_68881
;
3548 /* a.out machine type. Default to 68020. */
3549 int m68k_aout_machtype
= 2;
3561 int shorts_this_frag
;
3564 /* In MRI mode, the instruction and operands are separated by a
3565 space. Anything following the operands is a comment. The label
3566 has already been removed. */
3574 for (s
= str
; *s
!= '\0'; s
++)
3576 if ((*s
== ' ' || *s
== '\t') && ! inquote
)
3594 inquote
= ! inquote
;
3599 memset ((char *) (&the_ins
), '\0', sizeof (the_ins
));
3604 for (n
= 0; n
< the_ins
.numargs
; n
++)
3605 if (the_ins
.operands
[n
].error
)
3607 er
= the_ins
.operands
[n
].error
;
3613 as_bad (_("%s -- statement `%s' ignored"), er
, str
);
3617 /* If there is a current label, record that it marks an instruction. */
3618 if (current_label
!= NULL
)
3620 current_label
->text
= 1;
3621 current_label
= NULL
;
3624 if (the_ins
.nfrag
== 0)
3626 /* No frag hacking involved; just put it out */
3627 toP
= frag_more (2 * the_ins
.numo
);
3628 fromP
= &the_ins
.opcode
[0];
3629 for (m
= the_ins
.numo
; m
; --m
)
3631 md_number_to_chars (toP
, (long) (*fromP
), 2);
3635 /* put out symbol-dependent info */
3636 for (m
= 0; m
< the_ins
.nrel
; m
++)
3638 switch (the_ins
.reloc
[m
].wid
)
3657 as_fatal (_("Don't know how to figure width of %c in md_assemble()"),
3658 the_ins
.reloc
[m
].wid
);
3661 fixP
= fix_new_exp (frag_now
,
3662 ((toP
- frag_now
->fr_literal
)
3663 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
3665 &the_ins
.reloc
[m
].exp
,
3666 the_ins
.reloc
[m
].pcrel
,
3667 get_reloc_code (n
, the_ins
.reloc
[m
].pcrel
,
3668 the_ins
.reloc
[m
].pic_reloc
));
3669 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3670 if (the_ins
.reloc
[m
].wid
== 'B')
3671 fixP
->fx_signed
= 1;
3676 /* There's some frag hacking */
3677 for (n
= 0, fromP
= &the_ins
.opcode
[0]; n
< the_ins
.nfrag
; n
++)
3682 wid
= 2 * the_ins
.fragb
[n
].fragoff
;
3684 wid
= 2 * (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
3685 toP
= frag_more (wid
);
3687 shorts_this_frag
= 0;
3688 for (m
= wid
/ 2; m
; --m
)
3690 md_number_to_chars (toP
, (long) (*fromP
), 2);
3695 for (m
= 0; m
< the_ins
.nrel
; m
++)
3697 if ((the_ins
.reloc
[m
].n
) >= 2 * shorts_this_frag
)
3699 the_ins
.reloc
[m
].n
-= 2 * shorts_this_frag
;
3702 wid
= the_ins
.reloc
[m
].wid
;
3705 the_ins
.reloc
[m
].wid
= 0;
3706 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
3708 fixP
= fix_new_exp (frag_now
,
3709 ((toP
- frag_now
->fr_literal
)
3710 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
3712 &the_ins
.reloc
[m
].exp
,
3713 the_ins
.reloc
[m
].pcrel
,
3714 get_reloc_code (wid
, the_ins
.reloc
[m
].pcrel
,
3715 the_ins
.reloc
[m
].pic_reloc
));
3716 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3718 (void) frag_var (rs_machine_dependent
, 10, 0,
3719 (relax_substateT
) (the_ins
.fragb
[n
].fragty
),
3720 the_ins
.fragb
[n
].fadd
, the_ins
.fragb
[n
].foff
, to_beg_P
);
3722 n
= (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
3723 shorts_this_frag
= 0;
3726 toP
= frag_more (n
* sizeof (short));
3729 md_number_to_chars (toP
, (long) (*fromP
), 2);
3735 for (m
= 0; m
< the_ins
.nrel
; m
++)
3739 wid
= the_ins
.reloc
[m
].wid
;
3742 the_ins
.reloc
[m
].wid
= 0;
3743 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
3745 fixP
= fix_new_exp (frag_now
,
3746 ((the_ins
.reloc
[m
].n
+ toP
- frag_now
->fr_literal
)
3747 - shorts_this_frag
* 2),
3749 &the_ins
.reloc
[m
].exp
,
3750 the_ins
.reloc
[m
].pcrel
,
3751 get_reloc_code (wid
, the_ins
.reloc
[m
].pcrel
,
3752 the_ins
.reloc
[m
].pic_reloc
));
3753 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3761 * md_begin -- set up hash tables with 68000 instructions.
3762 * similar to what the vax assembler does. ---phr
3764 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
3765 a copy of it at runtime, adding in the information we want but isn't
3766 there. I think it'd be better to have an awk script hack the table
3767 at compile time. Or even just xstr the table and use it as-is. But
3768 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
3771 register const struct m68k_opcode
*ins
;
3772 register struct m68k_incant
*hack
, *slak
;
3773 register const char *retval
= 0; /* empty string, or error msg text */
3779 flag_reg_prefix_optional
= 1;
3781 if (! m68k_rel32_from_cmdline
)
3785 op_hash
= hash_new ();
3787 obstack_begin (&robyn
, 4000);
3788 for (i
= 0; i
< m68k_numopcodes
; i
++)
3790 hack
= slak
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3793 ins
= &m68k_opcodes
[i
];
3794 /* We *could* ignore insns that don't match our arch here
3795 but just leaving them out of the hash. */
3796 slak
->m_operands
= ins
->args
;
3797 slak
->m_opnum
= strlen (slak
->m_operands
) / 2;
3798 slak
->m_arch
= ins
->arch
;
3799 slak
->m_opcode
= ins
->opcode
;
3800 /* This is kludgey */
3801 slak
->m_codenum
= ((ins
->match
) & 0xffffL
) ? 2 : 1;
3802 if (i
+ 1 != m68k_numopcodes
3803 && !strcmp (ins
->name
, m68k_opcodes
[i
+ 1].name
))
3805 slak
->m_next
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3810 slak
= slak
->m_next
;
3814 retval
= hash_insert (op_hash
, ins
->name
, (char *) hack
);
3816 as_fatal (_("Internal Error: Can't hash %s: %s"), ins
->name
, retval
);
3819 for (i
= 0; i
< m68k_numaliases
; i
++)
3821 const char *name
= m68k_opcode_aliases
[i
].primary
;
3822 const char *alias
= m68k_opcode_aliases
[i
].alias
;
3823 PTR val
= hash_find (op_hash
, name
);
3825 as_fatal (_("Internal Error: Can't find %s in hash table"), name
);
3826 retval
= hash_insert (op_hash
, alias
, val
);
3828 as_fatal (_("Internal Error: Can't hash %s: %s"), alias
, retval
);
3831 /* In MRI mode, all unsized branches are variable sized. Normally,
3832 they are word sized. */
3835 static struct m68k_opcode_alias mri_aliases
[] =
3856 i
< (int) (sizeof mri_aliases
/ sizeof mri_aliases
[0]);
3859 const char *name
= mri_aliases
[i
].primary
;
3860 const char *alias
= mri_aliases
[i
].alias
;
3861 PTR val
= hash_find (op_hash
, name
);
3863 as_fatal (_("Internal Error: Can't find %s in hash table"), name
);
3864 retval
= hash_jam (op_hash
, alias
, val
);
3866 as_fatal (_("Internal Error: Can't hash %s: %s"), alias
, retval
);
3870 for (i
= 0; i
< (int) sizeof (mklower_table
); i
++)
3871 mklower_table
[i
] = (isupper (c
= (char) i
)) ? tolower (c
) : c
;
3873 for (i
= 0; i
< (int) sizeof (notend_table
); i
++)
3875 notend_table
[i
] = 0;
3876 alt_notend_table
[i
] = 0;
3878 notend_table
[','] = 1;
3879 notend_table
['{'] = 1;
3880 notend_table
['}'] = 1;
3881 alt_notend_table
['a'] = 1;
3882 alt_notend_table
['A'] = 1;
3883 alt_notend_table
['d'] = 1;
3884 alt_notend_table
['D'] = 1;
3885 alt_notend_table
['#'] = 1;
3886 alt_notend_table
['&'] = 1;
3887 alt_notend_table
['f'] = 1;
3888 alt_notend_table
['F'] = 1;
3889 #ifdef REGISTER_PREFIX
3890 alt_notend_table
[REGISTER_PREFIX
] = 1;
3893 /* We need to put '(' in alt_notend_table to handle
3894 cas2 %d0:%d2,%d3:%d4,(%a0):(%a1)
3896 alt_notend_table
['('] = 1;
3898 /* We need to put '@' in alt_notend_table to handle
3899 cas2 %d0:%d2,%d3:%d4,@(%d0):@(%d1)
3901 alt_notend_table
['@'] = 1;
3903 /* We need to put digits in alt_notend_table to handle
3904 bfextu %d0{24:1},%d0
3906 alt_notend_table
['0'] = 1;
3907 alt_notend_table
['1'] = 1;
3908 alt_notend_table
['2'] = 1;
3909 alt_notend_table
['3'] = 1;
3910 alt_notend_table
['4'] = 1;
3911 alt_notend_table
['5'] = 1;
3912 alt_notend_table
['6'] = 1;
3913 alt_notend_table
['7'] = 1;
3914 alt_notend_table
['8'] = 1;
3915 alt_notend_table
['9'] = 1;
3917 #ifndef MIT_SYNTAX_ONLY
3918 /* Insert pseudo ops, these have to go into the opcode table since
3919 gas expects pseudo ops to start with a dot */
3922 while (mote_pseudo_table
[n
].poc_name
)
3924 hack
= (struct m68k_incant
*)
3925 obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3926 hash_insert (op_hash
,
3927 mote_pseudo_table
[n
].poc_name
, (char *) hack
);
3928 hack
->m_operands
= 0;
3938 record_alignment (text_section
, 2);
3939 record_alignment (data_section
, 2);
3940 record_alignment (bss_section
, 2);
3945 select_control_regs ()
3947 /* Note which set of "movec" control registers is available. */
3948 switch (cpu_of_arch (current_architecture
))
3951 control_regs
= m68000_control_regs
;
3954 control_regs
= m68010_control_regs
;
3958 control_regs
= m68020_control_regs
;
3961 control_regs
= m68040_control_regs
;
3964 control_regs
= m68060_control_regs
;
3967 control_regs
= cpu32_control_regs
;
3973 control_regs
= mcf_control_regs
;
3981 m68k_init_after_args ()
3983 if (cpu_of_arch (current_architecture
) == 0)
3986 const char *default_cpu
= TARGET_CPU
;
3988 if (*default_cpu
== 'm')
3990 for (i
= 0; i
< n_archs
; i
++)
3991 if (strcasecmp (default_cpu
, archs
[i
].name
) == 0)
3995 as_bad (_("unrecognized default cpu `%s' ???"), TARGET_CPU
);
3996 current_architecture
|= m68020
;
3999 current_architecture
|= archs
[i
].arch
;
4001 /* Permit m68881 specification with all cpus; those that can't work
4002 with a coprocessor could be doing emulation. */
4003 if (current_architecture
& m68851
)
4005 if (current_architecture
& m68040
)
4007 as_warn (_("68040 and 68851 specified; mmu instructions may assemble incorrectly"));
4010 /* What other incompatibilities could we check for? */
4012 /* Toss in some default assumptions about coprocessors. */
4014 && (cpu_of_arch (current_architecture
)
4015 /* Can CPU32 have a 68881 coprocessor?? */
4016 & (m68020
| m68030
| cpu32
)))
4018 current_architecture
|= m68881
;
4021 && (cpu_of_arch (current_architecture
) & m68020up
) != 0
4022 && (cpu_of_arch (current_architecture
) & m68040up
) == 0)
4024 current_architecture
|= m68851
;
4026 if (no_68881
&& (current_architecture
& m68881
))
4027 as_bad (_("options for 68881 and no-68881 both given"));
4028 if (no_68851
&& (current_architecture
& m68851
))
4029 as_bad (_("options for 68851 and no-68851 both given"));
4032 /* Work out the magic number. This isn't very general. */
4033 if (current_architecture
& m68000
)
4034 m68k_aout_machtype
= 0;
4035 else if (current_architecture
& m68010
)
4036 m68k_aout_machtype
= 1;
4037 else if (current_architecture
& m68020
)
4038 m68k_aout_machtype
= 2;
4040 m68k_aout_machtype
= 2;
4043 /* Note which set of "movec" control registers is available. */
4044 select_control_regs ();
4046 if (cpu_of_arch (current_architecture
) < m68020
4047 || arch_coldfire_p (current_architecture
))
4048 md_relax_table
[TAB (PCINDEX
, BYTE
)].rlx_more
= 0;
4051 /* This is called when a label is defined. */
4054 m68k_frob_label (sym
)
4057 struct label_line
*n
;
4059 n
= (struct label_line
*) xmalloc (sizeof *n
);
4062 as_where (&n
->file
, &n
->line
);
4068 /* This is called when a value that is not an instruction is emitted. */
4071 m68k_flush_pending_output ()
4073 current_label
= NULL
;
4076 /* This is called at the end of the assembly, when the final value of
4077 the label is known. We warn if this is a text symbol aligned at an
4081 m68k_frob_symbol (sym
)
4084 if (S_GET_SEGMENT (sym
) == reg_section
4085 && (int) S_GET_VALUE (sym
) < 0)
4087 S_SET_SEGMENT (sym
, absolute_section
);
4088 S_SET_VALUE (sym
, ~(int)S_GET_VALUE (sym
));
4090 else if ((S_GET_VALUE (sym
) & 1) != 0)
4092 struct label_line
*l
;
4094 for (l
= labels
; l
!= NULL
; l
= l
->next
)
4096 if (l
->label
== sym
)
4099 as_warn_where (l
->file
, l
->line
,
4100 _("text label `%s' aligned to odd boundary"),
4108 /* This is called if we go in or out of MRI mode because of the .mri
4112 m68k_mri_mode_change (on
)
4117 if (! flag_reg_prefix_optional
)
4119 flag_reg_prefix_optional
= 1;
4120 #ifdef REGISTER_PREFIX
4125 if (! m68k_rel32_from_cmdline
)
4130 if (! reg_prefix_optional_seen
)
4132 #ifdef REGISTER_PREFIX_OPTIONAL
4133 flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
4135 flag_reg_prefix_optional
= 0;
4137 #ifdef REGISTER_PREFIX
4142 if (! m68k_rel32_from_cmdline
)
4147 /* Equal to MAX_PRECISION in atof-ieee.c */
4148 #define MAX_LITTLENUMS 6
4150 /* Turn a string in input_line_pointer into a floating point constant
4151 of type TYPE, and store the appropriate bytes in *LITP. The number
4152 of LITTLENUMS emitted is stored in *SIZEP. An error message is
4153 returned, or NULL on OK. */
4156 md_atof (type
, litP
, sizeP
)
4162 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4163 LITTLENUM_TYPE
*wordP
;
4194 return _("Bad call to MD_ATOF()");
4196 t
= atof_ieee (input_line_pointer
, type
, words
);
4198 input_line_pointer
= t
;
4200 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4201 for (wordP
= words
; prec
--;)
4203 md_number_to_chars (litP
, (long) (*wordP
++), sizeof (LITTLENUM_TYPE
));
4204 litP
+= sizeof (LITTLENUM_TYPE
);
4210 md_number_to_chars (buf
, val
, n
)
4215 number_to_chars_bigendian (buf
, val
, n
);
4219 md_apply_fix_2 (fixP
, val
)
4223 addressT upper_limit
;
4224 offsetT lower_limit
;
4226 /* This is unnecessary but it convinces the native rs6000 compiler
4227 to generate the code we want. */
4228 char *buf
= fixP
->fx_frag
->fr_literal
;
4229 buf
+= fixP
->fx_where
;
4230 /* end ibm compiler workaround */
4232 if (val
& 0x80000000)
4233 val
|= ~(addressT
)0x7fffffff;
4240 memset (buf
, 0, fixP
->fx_size
);
4241 fixP
->fx_addnumber
= val
; /* Remember value for emit_reloc */
4243 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
4244 && !S_IS_DEFINED (fixP
->fx_addsy
)
4245 && !S_IS_WEAK (fixP
->fx_addsy
))
4246 S_SET_WEAK (fixP
->fx_addsy
);
4251 #ifdef BFD_ASSEMBLER
4252 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
4253 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4257 switch (fixP
->fx_size
)
4259 /* The cast to offsetT below are necessary to make code correct for
4260 machines where ints are smaller than offsetT */
4264 lower_limit
= - (offsetT
) 0x80;
4267 *buf
++ = (val
>> 8);
4269 upper_limit
= 0x7fff;
4270 lower_limit
= - (offsetT
) 0x8000;
4273 *buf
++ = (val
>> 24);
4274 *buf
++ = (val
>> 16);
4275 *buf
++ = (val
>> 8);
4277 upper_limit
= 0x7fffffff;
4278 lower_limit
= - (offsetT
) 0x7fffffff - 1; /* avoid constant overflow */
4281 BAD_CASE (fixP
->fx_size
);
4284 /* Fix up a negative reloc. */
4285 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_subsy
!= NULL
)
4287 fixP
->fx_addsy
= fixP
->fx_subsy
;
4288 fixP
->fx_subsy
= NULL
;
4292 /* For non-pc-relative values, it's conceivable we might get something
4293 like "0xff" for a byte field. So extend the upper part of the range
4294 to accept such numbers. We arbitrarily disallow "-0xff" or "0xff+0xff",
4295 so that we can do any range checking at all. */
4296 if (! fixP
->fx_pcrel
&& ! fixP
->fx_signed
)
4297 upper_limit
= upper_limit
* 2 + 1;
4299 if ((addressT
) val
> upper_limit
4300 && (val
> 0 || val
< lower_limit
))
4301 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("value out of range"));
4303 /* A one byte PC-relative reloc means a short branch. We can't use
4304 a short branch with a value of 0 or -1, because those indicate
4305 different opcodes (branches with longer offsets). fixup_segment
4306 in write.c may have clobbered fx_pcrel, so we need to examine the
4309 #ifdef BFD_ASSEMBLER
4310 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
4313 && fixP
->fx_size
== 1
4314 && (fixP
->fx_addsy
== NULL
4315 || S_IS_DEFINED (fixP
->fx_addsy
))
4316 && (val
== 0 || val
== -1))
4317 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("invalid byte branch offset"));
4320 #ifdef BFD_ASSEMBLER
4322 md_apply_fix (fixP
, valp
)
4326 md_apply_fix_2 (fixP
, (addressT
) *valp
);
4330 void md_apply_fix (fixP
, val
)
4334 md_apply_fix_2 (fixP
, (addressT
) val
);
4338 /* *fragP has been relaxed to its final size, and now needs to have
4339 the bytes inside it modified to conform to the new size There is UGLY
4343 md_convert_frag_1 (fragP
)
4344 register fragS
*fragP
;
4349 /* Address in object code of the displacement. */
4350 register int object_address
= fragP
->fr_fix
+ fragP
->fr_address
;
4352 /* Address in gas core of the place to store the displacement. */
4353 /* This convinces the native rs6000 compiler to generate the code we
4355 register char *buffer_address
= fragP
->fr_literal
;
4356 buffer_address
+= fragP
->fr_fix
;
4357 /* end ibm compiler workaround */
4359 /* The displacement of the address, from current location. */
4360 disp
= fragP
->fr_symbol
? S_GET_VALUE (fragP
->fr_symbol
) : 0;
4361 disp
= (disp
+ fragP
->fr_offset
) - object_address
;
4363 #ifdef BFD_ASSEMBLER
4364 disp
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
4367 switch (fragP
->fr_subtype
)
4369 case TAB (BRANCHBWL
, BYTE
):
4370 case TAB (BRABSJUNC
, BYTE
):
4371 case TAB (BRABSJCOND
, BYTE
):
4372 case TAB (BRANCHBW
, BYTE
):
4373 know (issbyte (disp
));
4375 as_bad (_("short branch with zero offset: use :w"));
4376 fixP
= fix_new (fragP
, fragP
->fr_fix
- 1, 1, fragP
->fr_symbol
,
4377 fragP
->fr_offset
, 1, RELAX_RELOC_PC8
);
4378 fixP
->fx_pcrel_adjust
= -1;
4380 case TAB (BRANCHBWL
, SHORT
):
4381 case TAB (BRABSJUNC
, SHORT
):
4382 case TAB (BRABSJCOND
, SHORT
):
4383 case TAB (BRANCHBW
, SHORT
):
4384 fragP
->fr_opcode
[1] = 0x00;
4385 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4386 1, RELAX_RELOC_PC16
);
4389 case TAB (BRANCHBWL
, LONG
):
4390 fragP
->fr_opcode
[1] = (char) 0xFF;
4391 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4392 1, RELAX_RELOC_PC32
);
4395 case TAB (BRABSJUNC
, LONG
):
4396 if (fragP
->fr_opcode
[0] == 0x61) /* jbsr */
4398 fragP
->fr_opcode
[0] = 0x4E;
4399 fragP
->fr_opcode
[1] = (char) 0xB9; /* JSR with ABSL LONG operand */
4400 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4401 0, RELAX_RELOC_ABS32
);
4404 else if (fragP
->fr_opcode
[0] == 0x60) /* jbra */
4406 fragP
->fr_opcode
[0] = 0x4E;
4407 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG operand */
4408 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4409 0, RELAX_RELOC_ABS32
);
4414 /* This cannot happen, because jbsr and jbra are the only two
4415 unconditional branches. */
4419 case TAB (BRABSJCOND
, LONG
):
4420 /* Only Bcc 68000 instructions can come here. */
4421 /* Change bcc into b!cc/jmp absl long. */
4423 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
4424 fragP
->fr_opcode
[1] = 0x6;/* branch offset = 6 */
4426 /* JF: these used to be fr_opcode[2,3], but they may be in a
4427 different frag, in which case refering to them is a no-no.
4428 Only fr_opcode[0,1] are guaranteed to work. */
4429 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
4430 *buffer_address
++ = (char) 0xf9;
4431 fragP
->fr_fix
+= 2; /* account for jmp instruction */
4432 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
4433 fragP
->fr_offset
, 0, RELAX_RELOC_ABS32
);
4436 case TAB (FBRANCH
, SHORT
):
4437 know ((fragP
->fr_opcode
[1] & 0x40) == 0);
4438 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4439 1, RELAX_RELOC_PC16
);
4442 case TAB (FBRANCH
, LONG
):
4443 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
4444 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4445 1, RELAX_RELOC_PC32
);
4448 case TAB (DBCCLBR
, SHORT
):
4449 case TAB (DBCCABSJ
, SHORT
):
4450 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4451 1, RELAX_RELOC_PC16
);
4454 case TAB (DBCCLBR
, LONG
):
4455 /* only DBcc instructions can come here */
4456 /* Change dbcc into dbcc/bral. */
4458 /* JF: these used to be fr_opcode[2-7], but that's wrong */
4459 *buffer_address
++ = 0x00; /* branch offset = 4 */
4460 *buffer_address
++ = 0x04;
4461 *buffer_address
++ = 0x60; /* put in bra pc+6 */
4462 *buffer_address
++ = 0x06;
4463 *buffer_address
++ = 0x60; /* Put in bral (0x60ff). */
4464 *buffer_address
++ = (char) 0xff;
4466 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
4467 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
, 1,
4471 case TAB (DBCCABSJ
, LONG
):
4472 /* only DBcc instructions can come here */
4473 /* Change dbcc into dbcc/jmp. */
4475 /* JF: these used to be fr_opcode[2-7], but that's wrong */
4476 *buffer_address
++ = 0x00; /* branch offset = 4 */
4477 *buffer_address
++ = 0x04;
4478 *buffer_address
++ = 0x60; /* put in bra pc+6 */
4479 *buffer_address
++ = 0x06;
4480 *buffer_address
++ = 0x4e; /* Put in jmp long (0x4ef9). */
4481 *buffer_address
++ = (char) 0xf9;
4483 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
4484 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
, 0,
4488 case TAB (PCREL1632
, SHORT
):
4489 fragP
->fr_opcode
[1] &= ~0x3F;
4490 fragP
->fr_opcode
[1] |= 0x3A; /* 072 - mode 7.2 */
4491 fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
4492 fragP
->fr_offset
, 1, RELAX_RELOC_PC16
);
4495 case TAB (PCREL1632
, LONG
):
4496 /* Already set to mode 7.3; this indicates: PC indirect with
4497 suppressed index, 32-bit displacement. */
4498 *buffer_address
++ = 0x01;
4499 *buffer_address
++ = 0x70;
4501 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
4502 fragP
->fr_offset
, 1, RELAX_RELOC_PC32
);
4503 fixP
->fx_pcrel_adjust
= 2;
4506 case TAB (PCINDEX
, BYTE
):
4507 assert (fragP
->fr_fix
>= 2);
4508 buffer_address
[-2] &= ~1;
4509 fixP
= fix_new (fragP
, fragP
->fr_fix
- 1, 1, fragP
->fr_symbol
,
4510 fragP
->fr_offset
, 1, RELAX_RELOC_PC8
);
4511 fixP
->fx_pcrel_adjust
= 1;
4513 case TAB (PCINDEX
, SHORT
):
4514 assert (fragP
->fr_fix
>= 2);
4515 buffer_address
[-2] |= 0x1;
4516 buffer_address
[-1] = 0x20;
4517 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
4518 fragP
->fr_offset
, 1, RELAX_RELOC_PC16
);
4519 fixP
->fx_pcrel_adjust
= 2;
4522 case TAB (PCINDEX
, LONG
):
4523 assert (fragP
->fr_fix
>= 2);
4524 buffer_address
[-2] |= 0x1;
4525 buffer_address
[-1] = 0x30;
4526 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
4527 fragP
->fr_offset
, 1, RELAX_RELOC_PC32
);
4528 fixP
->fx_pcrel_adjust
= 2;
4531 case TAB (ABSTOPCREL
, SHORT
):
4532 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4533 1, RELAX_RELOC_PC16
);
4536 case TAB (ABSTOPCREL
, LONG
):
4537 /* The thing to do here is force it to ABSOLUTE LONG, since
4538 ABSTOPCREL is really trying to shorten an ABSOLUTE address anyway */
4539 if ((fragP
->fr_opcode
[1] & 0x3F) != 0x3A)
4541 fragP
->fr_opcode
[1] &= ~0x3F;
4542 fragP
->fr_opcode
[1] |= 0x39; /* Mode 7.1 */
4543 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4544 0, RELAX_RELOC_ABS32
);
4550 #ifndef BFD_ASSEMBLER
4553 md_convert_frag (headers
, sec
, fragP
)
4554 object_headers
*headers ATTRIBUTE_UNUSED
;
4555 segT sec ATTRIBUTE_UNUSED
;
4558 md_convert_frag_1 (fragP
);
4564 md_convert_frag (abfd
, sec
, fragP
)
4565 bfd
*abfd ATTRIBUTE_UNUSED
;
4566 segT sec ATTRIBUTE_UNUSED
;
4569 md_convert_frag_1 (fragP
);
4573 /* Force truly undefined symbols to their maximum size, and generally set up
4574 the frag list to be relaxed
4577 md_estimate_size_before_relax (fragP
, segment
)
4578 register fragS
*fragP
;
4583 old_fix
= fragP
->fr_fix
;
4585 /* Handle SZ_UNDEF first, it can be changed to BYTE or SHORT. */
4586 switch (fragP
->fr_subtype
)
4588 case TAB (BRANCHBWL
, SZ_UNDEF
):
4589 case TAB (BRABSJUNC
, SZ_UNDEF
):
4590 case TAB (BRABSJCOND
, SZ_UNDEF
):
4592 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4593 && relaxable_symbol (fragP
->fr_symbol
))
4595 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
4597 else if (flag_short_refs
)
4599 /* Symbol is undefined and we want short ref. */
4600 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4604 /* Symbol is still undefined. Make it LONG. */
4605 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), LONG
);
4610 case TAB (BRANCHBW
, SZ_UNDEF
):
4612 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4613 && relaxable_symbol (fragP
->fr_symbol
))
4615 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
4619 /* Symbol is undefined and we don't have long branches. */
4620 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4625 case TAB (FBRANCH
, SZ_UNDEF
):
4626 case TAB (DBCCLBR
, SZ_UNDEF
):
4627 case TAB (DBCCABSJ
, SZ_UNDEF
):
4628 case TAB (PCREL1632
, SZ_UNDEF
):
4630 if ((S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4631 && relaxable_symbol (fragP
->fr_symbol
))
4634 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4638 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), LONG
);
4643 case TAB (PCINDEX
, SZ_UNDEF
):
4644 if ((S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4645 && relaxable_symbol (fragP
->fr_symbol
)))
4647 fragP
->fr_subtype
= TAB (PCINDEX
, BYTE
);
4651 fragP
->fr_subtype
= TAB (PCINDEX
, LONG
);
4655 case TAB (ABSTOPCREL
, SZ_UNDEF
):
4657 if ((S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4658 && relaxable_symbol (fragP
->fr_symbol
)))
4660 fragP
->fr_subtype
= TAB (ABSTOPCREL
, SHORT
);
4664 fragP
->fr_subtype
= TAB (ABSTOPCREL
, LONG
);
4673 /* Now that SZ_UNDEF are taken care of, check others. */
4674 switch (fragP
->fr_subtype
)
4676 case TAB (BRANCHBWL
, BYTE
):
4677 case TAB (BRABSJUNC
, BYTE
):
4678 case TAB (BRABSJCOND
, BYTE
):
4679 case TAB (BRANCHBW
, BYTE
):
4680 /* We can't do a short jump to the next instruction, so in that
4681 case we force word mode. At this point S_GET_VALUE should
4682 return the offset of the symbol within its frag. If the
4683 symbol is at the start of a frag, and it is the next frag
4684 with any data in it (usually this is just the next frag, but
4685 assembler listings may introduce empty frags), we must use
4687 if (fragP
->fr_symbol
&& S_GET_VALUE (fragP
->fr_symbol
) == 0)
4692 stop
= symbol_get_frag (fragP
->fr_symbol
);
4693 for (l
= fragP
->fr_next
; l
!= stop
; l
= l
->fr_next
)
4694 if (l
->fr_fix
+ l
->fr_var
!= 0)
4698 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4705 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
4706 return fragP
->fr_var
+ fragP
->fr_fix
- old_fix
;
4709 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
4710 /* the bit-field entries in the relocation_info struct plays hell
4711 with the byte-order problems of cross-assembly. So as a hack,
4712 I added this mach. dependent ri twiddler. Ugly, but it gets
4714 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
4715 are symbolnum, most sig. byte first. Last byte is broken up with
4716 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
4717 nibble as nuthin. (on Sun 3 at least) */
4718 /* Translate the internal relocation information into target-specific
4722 md_ri_to_chars (the_bytes
, ri
)
4724 struct reloc_info_generic
*ri
;
4727 md_number_to_chars (the_bytes
, ri
->r_address
, 4);
4728 /* now the fun stuff */
4729 the_bytes
[4] = (ri
->r_symbolnum
>> 16) & 0x0ff;
4730 the_bytes
[5] = (ri
->r_symbolnum
>> 8) & 0x0ff;
4731 the_bytes
[6] = ri
->r_symbolnum
& 0x0ff;
4732 the_bytes
[7] = (((ri
->r_pcrel
<< 7) & 0x80) | ((ri
->r_length
<< 5) & 0x60) |
4733 ((ri
->r_extern
<< 4) & 0x10));
4736 #endif /* comment */
4738 #ifndef BFD_ASSEMBLER
4740 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4743 relax_addressT segment_address_in_file
;
4746 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4747 * Out: GNU LD relocation length code: 0, 1, or 2.
4750 static CONST
unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4753 know (fixP
->fx_addsy
!= NULL
);
4755 md_number_to_chars (where
,
4756 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
4759 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4760 ? S_GET_TYPE (fixP
->fx_addsy
)
4761 : fixP
->fx_addsy
->sy_number
);
4763 where
[4] = (r_symbolnum
>> 16) & 0x0ff;
4764 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4765 where
[6] = r_symbolnum
& 0x0ff;
4766 where
[7] = (((fixP
->fx_pcrel
<< 7) & 0x80) | ((nbytes_r_length
[fixP
->fx_size
] << 5) & 0x60) |
4767 (((!S_IS_DEFINED (fixP
->fx_addsy
)) << 4) & 0x10));
4771 #endif /* OBJ_AOUT or OBJ_BOUT */
4773 #ifndef WORKING_DOT_WORD
4774 CONST
int md_short_jump_size
= 4;
4775 CONST
int md_long_jump_size
= 6;
4778 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
4780 addressT from_addr
, to_addr
;
4781 fragS
*frag ATTRIBUTE_UNUSED
;
4782 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
4786 offset
= to_addr
- (from_addr
+ 2);
4788 md_number_to_chars (ptr
, (valueT
) 0x6000, 2);
4789 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 2);
4793 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
4795 addressT from_addr
, to_addr
;
4801 if (!HAVE_LONG_BRANCH(current_architecture
))
4803 offset
= to_addr
- S_GET_VALUE (to_symbol
);
4804 md_number_to_chars (ptr
, (valueT
) 0x4EF9, 2);
4805 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
4806 fix_new (frag
, (ptr
+ 2) - frag
->fr_literal
, 4, to_symbol
, (offsetT
) 0,
4811 offset
= to_addr
- (from_addr
+ 2);
4812 md_number_to_chars (ptr
, (valueT
) 0x60ff, 2);
4813 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
4819 /* Different values of OK tell what its OK to return. Things that
4820 aren't OK are an error (what a shock, no?)
4823 10: Absolute 1:8 only
4824 20: Absolute 0:7 only
4825 30: absolute 0:15 only
4826 40: Absolute 0:31 only
4827 50: absolute 0:127 only
4828 55: absolute -64:63 only
4829 60: absolute -128:127 only
4830 70: absolute 0:4095 only
4837 struct m68k_exp
*exp
;
4840 if (exp
->exp
.X_op
== O_absent
)
4842 /* Do the same thing the VAX asm does */
4843 op (exp
) = O_constant
;
4849 as_warn (_("expression out of range: defaulting to 1"));
4853 else if (exp
->exp
.X_op
== O_constant
)
4858 if (offs (exp
) < 1 || offs (exp
) > 8)
4860 as_warn (_("expression out of range: defaulting to 1"));
4865 if (offs (exp
) < 0 || offs (exp
) > 7)
4869 if (offs (exp
) < 0 || offs (exp
) > 15)
4873 if (offs (exp
) < 0 || offs (exp
) > 32)
4877 if (offs (exp
) < 0 || offs (exp
) > 127)
4881 if (offs (exp
) < -64 || offs (exp
) > 63)
4885 if (offs (exp
) < -128 || offs (exp
) > 127)
4889 if (offs (exp
) < 0 || offs (exp
) > 4095)
4892 as_warn (_("expression out of range: defaulting to 0"));
4900 else if (exp
->exp
.X_op
== O_big
)
4902 if (offs (exp
) <= 0 /* flonum */
4903 && (ok
== 80 /* no bignums */
4904 || (ok
> 10 /* small-int ranges including 0 ok */
4905 /* If we have a flonum zero, a zero integer should
4906 do as well (e.g., in moveq). */
4907 && generic_floating_point_number
.exponent
== 0
4908 && generic_floating_point_number
.low
[0] == 0)))
4910 /* HACK! Turn it into a long */
4911 LITTLENUM_TYPE words
[6];
4913 gen_to_words (words
, 2, 8L); /* These numbers are magic! */
4914 op (exp
) = O_constant
;
4917 offs (exp
) = words
[1] | (words
[0] << 16);
4921 op (exp
) = O_constant
;
4924 offs (exp
) = (ok
== 10) ? 1 : 0;
4925 as_warn (_("Can't deal with expression; defaulting to %ld"),
4931 if (ok
>= 10 && ok
<= 70)
4933 op (exp
) = O_constant
;
4936 offs (exp
) = (ok
== 10) ? 1 : 0;
4937 as_warn (_("Can't deal with expression; defaulting to %ld"),
4942 if (exp
->size
!= SIZE_UNSPEC
)
4950 if (!isbyte (offs (exp
)))
4951 as_warn (_("expression doesn't fit in BYTE"));
4954 if (!isword (offs (exp
)))
4955 as_warn (_("expression doesn't fit in WORD"));
4963 /* These are the back-ends for the various machine dependent pseudo-ops. */
4967 int ignore ATTRIBUTE_UNUSED
;
4969 subseg_set (data_section
, 1);
4970 demand_empty_rest_of_line ();
4975 int ignore ATTRIBUTE_UNUSED
;
4977 subseg_set (data_section
, 2);
4978 demand_empty_rest_of_line ();
4983 int ignore ATTRIBUTE_UNUSED
;
4985 /* We don't support putting frags in the BSS segment, we fake it
4986 by marking in_bss, then looking at s_skip for clues. */
4988 subseg_set (bss_section
, 0);
4989 demand_empty_rest_of_line ();
4994 int ignore ATTRIBUTE_UNUSED
;
4997 register long temp_fill
;
4999 temp
= 1; /* JF should be 2? */
5000 temp_fill
= get_absolute_expression ();
5001 if (!need_pass_2
) /* Never make frag if expect extra pass. */
5002 frag_align (temp
, (int) temp_fill
, 0);
5003 demand_empty_rest_of_line ();
5004 record_alignment (now_seg
, temp
);
5009 int ignore ATTRIBUTE_UNUSED
;
5011 demand_empty_rest_of_line ();
5014 /* Pseudo-ops handled for MRI compatibility. */
5016 /* This function returns non-zero if the argument is a conditional
5017 pseudo-op. This is called when checking whether a pending
5018 alignment is needed. */
5021 m68k_conditional_pseudoop (pop
)
5024 return (pop
->poc_handler
== s_mri_if
5025 || pop
->poc_handler
== s_mri_else
);
5028 /* Handle an MRI style chip specification. */
5037 s
= input_line_pointer
;
5038 /* We can't use get_symbol_end since the processor names are not proper
5040 while (is_part_of_name (c
= *input_line_pointer
++))
5042 *--input_line_pointer
= 0;
5043 for (i
= 0; i
< n_archs
; i
++)
5044 if (strcasecmp (s
, archs
[i
].name
) == 0)
5048 as_bad (_("%s: unrecognized processor name"), s
);
5049 *input_line_pointer
= c
;
5050 ignore_rest_of_line ();
5053 *input_line_pointer
= c
;
5055 if (*input_line_pointer
== '/')
5056 current_architecture
= 0;
5058 current_architecture
&= m68881
| m68851
;
5059 current_architecture
|= archs
[i
].arch
;
5061 while (*input_line_pointer
== '/')
5063 ++input_line_pointer
;
5064 s
= input_line_pointer
;
5065 /* We can't use get_symbol_end since the processor names are not
5067 while (is_part_of_name (c
= *input_line_pointer
++))
5069 *--input_line_pointer
= 0;
5070 if (strcmp (s
, "68881") == 0)
5071 current_architecture
|= m68881
;
5072 else if (strcmp (s
, "68851") == 0)
5073 current_architecture
|= m68851
;
5074 *input_line_pointer
= c
;
5077 /* Update info about available control registers. */
5078 select_control_regs ();
5081 /* The MRI CHIP pseudo-op. */
5085 int ignore ATTRIBUTE_UNUSED
;
5091 stop
= mri_comment_field (&stopc
);
5094 mri_comment_end (stop
, stopc
);
5095 demand_empty_rest_of_line ();
5098 /* The MRI FOPT pseudo-op. */
5102 int ignore ATTRIBUTE_UNUSED
;
5106 if (strncasecmp (input_line_pointer
, "ID=", 3) == 0)
5110 input_line_pointer
+= 3;
5111 temp
= get_absolute_expression ();
5112 if (temp
< 0 || temp
> 7)
5113 as_bad (_("bad coprocessor id"));
5115 m68k_float_copnum
= COP0
+ temp
;
5119 as_bad (_("unrecognized fopt option"));
5120 ignore_rest_of_line ();
5124 demand_empty_rest_of_line ();
5127 /* The structure used to handle the MRI OPT pseudo-op. */
5131 /* The name of the option. */
5134 /* If this is not NULL, just call this function. The first argument
5135 is the ARG field of this structure, the second argument is
5136 whether the option was negated. */
5137 void (*pfn
) PARAMS ((int arg
, int on
));
5139 /* If this is not NULL, and the PFN field is NULL, set the variable
5140 this points to. Set it to the ARG field if the option was not
5141 negated, and the NOTARG field otherwise. */
5144 /* The value to pass to PFN or to assign to *PVAR. */
5147 /* The value to assign to *PVAR if the option is negated. If PFN is
5148 NULL, and PVAR is not NULL, and ARG and NOTARG are the same, then
5149 the option may not be negated. */
5153 /* The table used to handle the MRI OPT pseudo-op. */
5155 static void skip_to_comma
PARAMS ((int, int));
5156 static void opt_nest
PARAMS ((int, int));
5157 static void opt_chip
PARAMS ((int, int));
5158 static void opt_list
PARAMS ((int, int));
5159 static void opt_list_symbols
PARAMS ((int, int));
5161 static const struct opt_action opt_table
[] =
5163 { "abspcadd", 0, &m68k_abspcadd
, 1, 0 },
5165 /* We do relaxing, so there is little use for these options. */
5166 { "b", 0, 0, 0, 0 },
5167 { "brs", 0, 0, 0, 0 },
5168 { "brb", 0, 0, 0, 0 },
5169 { "brl", 0, 0, 0, 0 },
5170 { "brw", 0, 0, 0, 0 },
5172 { "c", 0, 0, 0, 0 },
5173 { "cex", 0, 0, 0, 0 },
5174 { "case", 0, &symbols_case_sensitive
, 1, 0 },
5175 { "cl", 0, 0, 0, 0 },
5176 { "cre", 0, 0, 0, 0 },
5177 { "d", 0, &flag_keep_locals
, 1, 0 },
5178 { "e", 0, 0, 0, 0 },
5179 { "f", 0, &flag_short_refs
, 1, 0 },
5180 { "frs", 0, &flag_short_refs
, 1, 0 },
5181 { "frl", 0, &flag_short_refs
, 0, 1 },
5182 { "g", 0, 0, 0, 0 },
5183 { "i", 0, 0, 0, 0 },
5184 { "m", 0, 0, 0, 0 },
5185 { "mex", 0, 0, 0, 0 },
5186 { "mc", 0, 0, 0, 0 },
5187 { "md", 0, 0, 0, 0 },
5188 { "nest", opt_nest
, 0, 0, 0 },
5189 { "next", skip_to_comma
, 0, 0, 0 },
5190 { "o", 0, 0, 0, 0 },
5191 { "old", 0, 0, 0, 0 },
5192 { "op", skip_to_comma
, 0, 0, 0 },
5193 { "pco", 0, 0, 0, 0 },
5194 { "p", opt_chip
, 0, 0, 0 },
5195 { "pcr", 0, 0, 0, 0 },
5196 { "pcs", 0, 0, 0, 0 },
5197 { "r", 0, 0, 0, 0 },
5198 { "quick", 0, &m68k_quick
, 1, 0 },
5199 { "rel32", 0, &m68k_rel32
, 1, 0 },
5200 { "s", opt_list
, 0, 0, 0 },
5201 { "t", opt_list_symbols
, 0, 0, 0 },
5202 { "w", 0, &flag_no_warnings
, 0, 1 },
5206 #define OPTCOUNT ((int) (sizeof opt_table / sizeof opt_table[0]))
5208 /* The MRI OPT pseudo-op. */
5212 int ignore ATTRIBUTE_UNUSED
;
5220 const struct opt_action
*o
;
5225 if (*input_line_pointer
== '-')
5227 ++input_line_pointer
;
5230 else if (strncasecmp (input_line_pointer
, "NO", 2) == 0)
5232 input_line_pointer
+= 2;
5236 s
= input_line_pointer
;
5237 c
= get_symbol_end ();
5239 for (i
= 0, o
= opt_table
; i
< OPTCOUNT
; i
++, o
++)
5241 if (strcasecmp (s
, o
->name
) == 0)
5245 /* Restore input_line_pointer now in case the option
5247 *input_line_pointer
= c
;
5248 (*o
->pfn
) (o
->arg
, t
);
5250 else if (o
->pvar
!= NULL
)
5252 if (! t
&& o
->arg
== o
->notarg
)
5253 as_bad (_("option `%s' may not be negated"), s
);
5254 *input_line_pointer
= c
;
5255 *o
->pvar
= t
? o
->arg
: o
->notarg
;
5258 *input_line_pointer
= c
;
5264 as_bad (_("option `%s' not recognized"), s
);
5265 *input_line_pointer
= c
;
5268 while (*input_line_pointer
++ == ',');
5270 /* Move back to terminating character. */
5271 --input_line_pointer
;
5272 demand_empty_rest_of_line ();
5275 /* Skip ahead to a comma. This is used for OPT options which we do
5276 not suppor tand which take arguments. */
5279 skip_to_comma (arg
, on
)
5280 int arg ATTRIBUTE_UNUSED
;
5281 int on ATTRIBUTE_UNUSED
;
5283 while (*input_line_pointer
!= ','
5284 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
5285 ++input_line_pointer
;
5288 /* Handle the OPT NEST=depth option. */
5292 int arg ATTRIBUTE_UNUSED
;
5293 int on ATTRIBUTE_UNUSED
;
5295 if (*input_line_pointer
!= '=')
5297 as_bad (_("bad format of OPT NEST=depth"));
5301 ++input_line_pointer
;
5302 max_macro_nest
= get_absolute_expression ();
5305 /* Handle the OPT P=chip option. */
5309 int arg ATTRIBUTE_UNUSED
;
5310 int on ATTRIBUTE_UNUSED
;
5312 if (*input_line_pointer
!= '=')
5314 /* This is just OPT P, which we do not support. */
5318 ++input_line_pointer
;
5322 /* Handle the OPT S option. */
5326 int arg ATTRIBUTE_UNUSED
;
5332 /* Handle the OPT T option. */
5335 opt_list_symbols (arg
, on
)
5336 int arg ATTRIBUTE_UNUSED
;
5340 listing
|= LISTING_SYMBOLS
;
5342 listing
&=~ LISTING_SYMBOLS
;
5345 /* Handle the MRI REG pseudo-op. */
5349 int ignore ATTRIBUTE_UNUSED
;
5358 if (line_label
== NULL
)
5360 as_bad (_("missing label"));
5361 ignore_rest_of_line ();
5366 stop
= mri_comment_field (&stopc
);
5370 s
= input_line_pointer
;
5371 while (isalnum ((unsigned char) *input_line_pointer
)
5372 #ifdef REGISTER_PREFIX
5373 || *input_line_pointer
== REGISTER_PREFIX
5375 || *input_line_pointer
== '/'
5376 || *input_line_pointer
== '-')
5377 ++input_line_pointer
;
5378 c
= *input_line_pointer
;
5379 *input_line_pointer
= '\0';
5381 if (m68k_ip_op (s
, &rop
) != 0)
5383 if (rop
.error
== NULL
)
5384 as_bad (_("bad register list"));
5386 as_bad (_("bad register list: %s"), rop
.error
);
5387 *input_line_pointer
= c
;
5388 ignore_rest_of_line ();
5392 *input_line_pointer
= c
;
5394 if (rop
.mode
== REGLST
)
5396 else if (rop
.mode
== DREG
)
5397 mask
= 1 << (rop
.reg
- DATA0
);
5398 else if (rop
.mode
== AREG
)
5399 mask
= 1 << (rop
.reg
- ADDR0
+ 8);
5400 else if (rop
.mode
== FPREG
)
5401 mask
= 1 << (rop
.reg
- FP0
+ 16);
5402 else if (rop
.mode
== CONTROL
5405 else if (rop
.mode
== CONTROL
5408 else if (rop
.mode
== CONTROL
5413 as_bad (_("bad register list"));
5414 ignore_rest_of_line ();
5418 S_SET_SEGMENT (line_label
, reg_section
);
5419 S_SET_VALUE (line_label
, ~mask
);
5420 symbol_set_frag (line_label
, &zero_address_frag
);
5423 mri_comment_end (stop
, stopc
);
5425 demand_empty_rest_of_line ();
5428 /* This structure is used for the MRI SAVE and RESTORE pseudo-ops. */
5432 struct save_opts
*next
;
5434 int symbols_case_sensitive
;
5442 /* FIXME: We don't save OPT S. */
5445 /* This variable holds the stack of saved options. */
5447 static struct save_opts
*save_stack
;
5449 /* The MRI SAVE pseudo-op. */
5453 int ignore ATTRIBUTE_UNUSED
;
5455 struct save_opts
*s
;
5457 s
= (struct save_opts
*) xmalloc (sizeof (struct save_opts
));
5458 s
->abspcadd
= m68k_abspcadd
;
5459 s
->symbols_case_sensitive
= symbols_case_sensitive
;
5460 s
->keep_locals
= flag_keep_locals
;
5461 s
->short_refs
= flag_short_refs
;
5462 s
->architecture
= current_architecture
;
5463 s
->quick
= m68k_quick
;
5464 s
->rel32
= m68k_rel32
;
5465 s
->listing
= listing
;
5466 s
->no_warnings
= flag_no_warnings
;
5468 s
->next
= save_stack
;
5471 demand_empty_rest_of_line ();
5474 /* The MRI RESTORE pseudo-op. */
5478 int ignore ATTRIBUTE_UNUSED
;
5480 struct save_opts
*s
;
5482 if (save_stack
== NULL
)
5484 as_bad (_("restore without save"));
5485 ignore_rest_of_line ();
5490 save_stack
= s
->next
;
5492 m68k_abspcadd
= s
->abspcadd
;
5493 symbols_case_sensitive
= s
->symbols_case_sensitive
;
5494 flag_keep_locals
= s
->keep_locals
;
5495 flag_short_refs
= s
->short_refs
;
5496 current_architecture
= s
->architecture
;
5497 m68k_quick
= s
->quick
;
5498 m68k_rel32
= s
->rel32
;
5499 listing
= s
->listing
;
5500 flag_no_warnings
= s
->no_warnings
;
5504 demand_empty_rest_of_line ();
5507 /* Types of MRI structured control directives. */
5509 enum mri_control_type
5517 /* This structure is used to stack the MRI structured control
5520 struct mri_control_info
5522 /* The directive within which this one is enclosed. */
5523 struct mri_control_info
*outer
;
5525 /* The type of directive. */
5526 enum mri_control_type type
;
5528 /* Whether an ELSE has been in an IF. */
5531 /* The add or sub statement at the end of a FOR. */
5534 /* The label of the top of a FOR or REPEAT loop. */
5537 /* The label to jump to for the next iteration, or the else
5538 expression of a conditional. */
5541 /* The label to jump to to break out of the loop, or the label past
5542 the end of a conditional. */
5546 /* The stack of MRI structured control directives. */
5548 static struct mri_control_info
*mri_control_stack
;
5550 /* The current MRI structured control directive index number, used to
5551 generate label names. */
5553 static int mri_control_index
;
5555 /* Some function prototypes. */
5557 static void mri_assemble
PARAMS ((char *));
5558 static char *mri_control_label
PARAMS ((void));
5559 static struct mri_control_info
*push_mri_control
5560 PARAMS ((enum mri_control_type
));
5561 static void pop_mri_control
PARAMS ((void));
5562 static int parse_mri_condition
PARAMS ((int *));
5563 static int parse_mri_control_operand
5564 PARAMS ((int *, char **, char **, char **, char **));
5565 static int swap_mri_condition
PARAMS ((int));
5566 static int reverse_mri_condition
PARAMS ((int));
5567 static void build_mri_control_operand
5568 PARAMS ((int, int, char *, char *, char *, char *, const char *,
5569 const char *, int));
5570 static void parse_mri_control_expression
5571 PARAMS ((char *, int, const char *, const char *, int));
5573 /* Assemble an instruction for an MRI structured control directive. */
5581 /* md_assemble expects the opcode to be in lower case. */
5582 for (s
= str
; *s
!= ' ' && *s
!= '\0'; s
++)
5584 if (isupper ((unsigned char) *s
))
5585 *s
= tolower ((unsigned char) *s
);
5591 /* Generate a new MRI label structured control directive label name. */
5594 mri_control_label ()
5598 n
= (char *) xmalloc (20);
5599 sprintf (n
, "%smc%d", FAKE_LABEL_NAME
, mri_control_index
);
5600 ++mri_control_index
;
5604 /* Create a new MRI structured control directive. */
5606 static struct mri_control_info
*
5607 push_mri_control (type
)
5608 enum mri_control_type type
;
5610 struct mri_control_info
*n
;
5612 n
= (struct mri_control_info
*) xmalloc (sizeof (struct mri_control_info
));
5616 if (type
== mri_if
|| type
== mri_while
)
5619 n
->top
= mri_control_label ();
5620 n
->next
= mri_control_label ();
5621 n
->bottom
= mri_control_label ();
5623 n
->outer
= mri_control_stack
;
5624 mri_control_stack
= n
;
5629 /* Pop off the stack of MRI structured control directives. */
5634 struct mri_control_info
*n
;
5636 n
= mri_control_stack
;
5637 mri_control_stack
= n
->outer
;
5645 /* Recognize a condition code in an MRI structured control expression. */
5648 parse_mri_condition (pcc
)
5653 know (*input_line_pointer
== '<');
5655 ++input_line_pointer
;
5656 c1
= *input_line_pointer
++;
5657 c2
= *input_line_pointer
++;
5659 if (*input_line_pointer
!= '>')
5661 as_bad (_("syntax error in structured control directive"));
5665 ++input_line_pointer
;
5673 *pcc
= (c1
<< 8) | c2
;
5678 /* Parse a single operand in an MRI structured control expression. */
5681 parse_mri_control_operand (pcc
, leftstart
, leftstop
, rightstart
, rightstop
)
5698 if (*input_line_pointer
== '<')
5700 /* It's just a condition code. */
5701 return parse_mri_condition (pcc
);
5704 /* Look ahead for the condition code. */
5705 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
5707 if (*s
== '<' && s
[1] != '\0' && s
[2] != '\0' && s
[3] == '>')
5712 as_bad (_("missing condition code in structured control directive"));
5716 *leftstart
= input_line_pointer
;
5718 if (*leftstop
> *leftstart
5719 && ((*leftstop
)[-1] == ' ' || (*leftstop
)[-1] == '\t'))
5722 input_line_pointer
= s
;
5723 if (! parse_mri_condition (pcc
))
5726 /* Look ahead for AND or OR or end of line. */
5727 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
5729 if ((strncasecmp (s
, "AND", 3) == 0
5730 && (s
[3] == '.' || ! is_part_of_name (s
[3])))
5731 || (strncasecmp (s
, "OR", 2) == 0
5732 && (s
[2] == '.' || ! is_part_of_name (s
[2]))))
5736 *rightstart
= input_line_pointer
;
5738 if (*rightstop
> *rightstart
5739 && ((*rightstop
)[-1] == ' ' || (*rightstop
)[-1] == '\t'))
5742 input_line_pointer
= s
;
5747 #define MCC(b1, b2) (((b1) << 8) | (b2))
5749 /* Swap the sense of a condition. This changes the condition so that
5750 it generates the same result when the operands are swapped. */
5753 swap_mri_condition (cc
)
5758 case MCC ('h', 'i'): return MCC ('c', 's');
5759 case MCC ('l', 's'): return MCC ('c', 'c');
5760 case MCC ('c', 'c'): return MCC ('l', 's');
5761 case MCC ('c', 's'): return MCC ('h', 'i');
5762 case MCC ('p', 'l'): return MCC ('m', 'i');
5763 case MCC ('m', 'i'): return MCC ('p', 'l');
5764 case MCC ('g', 'e'): return MCC ('l', 'e');
5765 case MCC ('l', 't'): return MCC ('g', 't');
5766 case MCC ('g', 't'): return MCC ('l', 't');
5767 case MCC ('l', 'e'): return MCC ('g', 'e');
5772 /* Reverse the sense of a condition. */
5775 reverse_mri_condition (cc
)
5780 case MCC ('h', 'i'): return MCC ('l', 's');
5781 case MCC ('l', 's'): return MCC ('h', 'i');
5782 case MCC ('c', 'c'): return MCC ('c', 's');
5783 case MCC ('c', 's'): return MCC ('c', 'c');
5784 case MCC ('n', 'e'): return MCC ('e', 'q');
5785 case MCC ('e', 'q'): return MCC ('n', 'e');
5786 case MCC ('v', 'c'): return MCC ('v', 's');
5787 case MCC ('v', 's'): return MCC ('v', 'c');
5788 case MCC ('p', 'l'): return MCC ('m', 'i');
5789 case MCC ('m', 'i'): return MCC ('p', 'l');
5790 case MCC ('g', 'e'): return MCC ('l', 't');
5791 case MCC ('l', 't'): return MCC ('g', 'e');
5792 case MCC ('g', 't'): return MCC ('l', 'e');
5793 case MCC ('l', 'e'): return MCC ('g', 't');
5798 /* Build an MRI structured control expression. This generates test
5799 and branch instructions. It goes to TRUELAB if the condition is
5800 true, and to FALSELAB if the condition is false. Exactly one of
5801 TRUELAB and FALSELAB will be NULL, meaning to fall through. QUAL
5802 is the size qualifier for the expression. EXTENT is the size to
5803 use for the branch. */
5806 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5807 rightstop
, truelab
, falselab
, extent
)
5814 const char *truelab
;
5815 const char *falselab
;
5821 if (leftstart
!= NULL
)
5823 struct m68k_op leftop
, rightop
;
5826 /* Swap the compare operands, if necessary, to produce a legal
5827 m68k compare instruction. Comparing a register operand with
5828 a non-register operand requires the register to be on the
5829 right (cmp, cmpa). Comparing an immediate value with
5830 anything requires the immediate value to be on the left
5835 (void) m68k_ip_op (leftstart
, &leftop
);
5840 (void) m68k_ip_op (rightstart
, &rightop
);
5843 if (rightop
.mode
== IMMED
5844 || ((leftop
.mode
== DREG
|| leftop
.mode
== AREG
)
5845 && (rightop
.mode
!= DREG
&& rightop
.mode
!= AREG
)))
5849 cc
= swap_mri_condition (cc
);
5851 leftstart
= rightstart
;
5854 leftstop
= rightstop
;
5859 if (truelab
== NULL
)
5861 cc
= reverse_mri_condition (cc
);
5865 if (leftstart
!= NULL
)
5867 buf
= (char *) xmalloc (20
5868 + (leftstop
- leftstart
)
5869 + (rightstop
- rightstart
));
5877 memcpy (s
, leftstart
, leftstop
- leftstart
);
5878 s
+= leftstop
- leftstart
;
5880 memcpy (s
, rightstart
, rightstop
- rightstart
);
5881 s
+= rightstop
- rightstart
;
5887 buf
= (char *) xmalloc (20 + strlen (truelab
));
5895 strcpy (s
, truelab
);
5900 /* Parse an MRI structured control expression. This generates test
5901 and branch instructions. STOP is where the expression ends. It
5902 goes to TRUELAB if the condition is true, and to FALSELAB if the
5903 condition is false. Exactly one of TRUELAB and FALSELAB will be
5904 NULL, meaning to fall through. QUAL is the size qualifier for the
5905 expression. EXTENT is the size to use for the branch. */
5908 parse_mri_control_expression (stop
, qual
, truelab
, falselab
, extent
)
5911 const char *truelab
;
5912 const char *falselab
;
5925 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5926 &rightstart
, &rightstop
))
5932 if (strncasecmp (input_line_pointer
, "AND", 3) == 0)
5936 if (falselab
!= NULL
)
5939 flab
= mri_control_label ();
5941 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5942 rightstop
, (const char *) NULL
, flab
, extent
);
5944 input_line_pointer
+= 3;
5945 if (*input_line_pointer
!= '.'
5946 || input_line_pointer
[1] == '\0')
5950 qual
= input_line_pointer
[1];
5951 input_line_pointer
+= 2;
5954 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5955 &rightstart
, &rightstop
))
5961 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5962 rightstop
, truelab
, falselab
, extent
);
5964 if (falselab
== NULL
)
5967 else if (strncasecmp (input_line_pointer
, "OR", 2) == 0)
5971 if (truelab
!= NULL
)
5974 tlab
= mri_control_label ();
5976 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5977 rightstop
, tlab
, (const char *) NULL
, extent
);
5979 input_line_pointer
+= 2;
5980 if (*input_line_pointer
!= '.'
5981 || input_line_pointer
[1] == '\0')
5985 qual
= input_line_pointer
[1];
5986 input_line_pointer
+= 2;
5989 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5990 &rightstart
, &rightstop
))
5996 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5997 rightstop
, truelab
, falselab
, extent
);
5999 if (truelab
== NULL
)
6004 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
6005 rightstop
, truelab
, falselab
, extent
);
6009 if (input_line_pointer
!= stop
)
6010 as_bad (_("syntax error in structured control directive"));
6013 /* Handle the MRI IF pseudo-op. This may be a structured control
6014 directive, or it may be a regular assembler conditional, depending
6023 struct mri_control_info
*n
;
6025 /* A structured control directive must end with THEN with an
6026 optional qualifier. */
6027 s
= input_line_pointer
;
6028 while (! is_end_of_line
[(unsigned char) *s
]
6029 && (! flag_mri
|| *s
!= '*'))
6032 while (s
> input_line_pointer
&& (*s
== ' ' || *s
== '\t'))
6035 if (s
- input_line_pointer
> 1
6039 if (s
- input_line_pointer
< 3
6040 || strncasecmp (s
- 3, "THEN", 4) != 0)
6044 as_bad (_("missing then"));
6045 ignore_rest_of_line ();
6049 /* It's a conditional. */
6054 /* Since this might be a conditional if, this pseudo-op will be
6055 called even if we are supported to be ignoring input. Double
6056 check now. Clobber *input_line_pointer so that ignore_input
6057 thinks that this is not a special pseudo-op. */
6058 c
= *input_line_pointer
;
6059 *input_line_pointer
= 0;
6060 if (ignore_input ())
6062 *input_line_pointer
= c
;
6063 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6064 ++input_line_pointer
;
6065 demand_empty_rest_of_line ();
6068 *input_line_pointer
= c
;
6070 n
= push_mri_control (mri_if
);
6072 parse_mri_control_expression (s
- 3, qual
, (const char *) NULL
,
6073 n
->next
, s
[1] == '.' ? s
[2] : '\0');
6076 input_line_pointer
= s
+ 3;
6078 input_line_pointer
= s
+ 1;
6082 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6083 ++input_line_pointer
;
6086 demand_empty_rest_of_line ();
6089 /* Handle the MRI else pseudo-op. If we are currently doing an MRI
6090 structured IF, associate the ELSE with the IF. Otherwise, assume
6091 it is a conditional else. */
6102 && (mri_control_stack
== NULL
6103 || mri_control_stack
->type
!= mri_if
6104 || mri_control_stack
->else_seen
))
6110 c
= *input_line_pointer
;
6111 *input_line_pointer
= 0;
6112 if (ignore_input ())
6114 *input_line_pointer
= c
;
6115 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6116 ++input_line_pointer
;
6117 demand_empty_rest_of_line ();
6120 *input_line_pointer
= c
;
6122 if (mri_control_stack
== NULL
6123 || mri_control_stack
->type
!= mri_if
6124 || mri_control_stack
->else_seen
)
6126 as_bad (_("else without matching if"));
6127 ignore_rest_of_line ();
6131 mri_control_stack
->else_seen
= 1;
6133 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->bottom
));
6136 sprintf (buf
, "bra%s %s", q
, mri_control_stack
->bottom
);
6140 colon (mri_control_stack
->next
);
6144 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6145 ++input_line_pointer
;
6148 demand_empty_rest_of_line ();
6151 /* Handle the MRI ENDI pseudo-op. */
6155 int ignore ATTRIBUTE_UNUSED
;
6157 if (mri_control_stack
== NULL
6158 || mri_control_stack
->type
!= mri_if
)
6160 as_bad (_("endi without matching if"));
6161 ignore_rest_of_line ();
6165 /* ignore_input will not return true for ENDI, so we don't need to
6166 worry about checking it again here. */
6168 if (! mri_control_stack
->else_seen
)
6169 colon (mri_control_stack
->next
);
6170 colon (mri_control_stack
->bottom
);
6176 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6177 ++input_line_pointer
;
6180 demand_empty_rest_of_line ();
6183 /* Handle the MRI BREAK pseudo-op. */
6186 s_mri_break (extent
)
6189 struct mri_control_info
*n
;
6193 n
= mri_control_stack
;
6195 && n
->type
!= mri_for
6196 && n
->type
!= mri_repeat
6197 && n
->type
!= mri_while
)
6201 as_bad (_("break outside of structured loop"));
6202 ignore_rest_of_line ();
6206 buf
= (char *) xmalloc (20 + strlen (n
->bottom
));
6209 sprintf (buf
, "bra%s %s", ex
, n
->bottom
);
6215 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6216 ++input_line_pointer
;
6219 demand_empty_rest_of_line ();
6222 /* Handle the MRI NEXT pseudo-op. */
6228 struct mri_control_info
*n
;
6232 n
= mri_control_stack
;
6234 && n
->type
!= mri_for
6235 && n
->type
!= mri_repeat
6236 && n
->type
!= mri_while
)
6240 as_bad (_("next outside of structured loop"));
6241 ignore_rest_of_line ();
6245 buf
= (char *) xmalloc (20 + strlen (n
->next
));
6248 sprintf (buf
, "bra%s %s", ex
, n
->next
);
6254 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6255 ++input_line_pointer
;
6258 demand_empty_rest_of_line ();
6261 /* Handle the MRI FOR pseudo-op. */
6267 const char *varstart
, *varstop
;
6268 const char *initstart
, *initstop
;
6269 const char *endstart
, *endstop
;
6270 const char *bystart
, *bystop
;
6274 struct mri_control_info
*n
;
6280 FOR.q var = init { TO | DOWNTO } end [ BY by ] DO.e
6284 varstart
= input_line_pointer
;
6286 /* Look for the '='. */
6287 while (! is_end_of_line
[(unsigned char) *input_line_pointer
]
6288 && *input_line_pointer
!= '=')
6289 ++input_line_pointer
;
6290 if (*input_line_pointer
!= '=')
6292 as_bad (_("missing ="));
6293 ignore_rest_of_line ();
6297 varstop
= input_line_pointer
;
6298 if (varstop
> varstart
6299 && (varstop
[-1] == ' ' || varstop
[-1] == '\t'))
6302 ++input_line_pointer
;
6304 initstart
= input_line_pointer
;
6306 /* Look for TO or DOWNTO. */
6309 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6311 if (strncasecmp (input_line_pointer
, "TO", 2) == 0
6312 && ! is_part_of_name (input_line_pointer
[2]))
6314 initstop
= input_line_pointer
;
6315 input_line_pointer
+= 2;
6318 if (strncasecmp (input_line_pointer
, "DOWNTO", 6) == 0
6319 && ! is_part_of_name (input_line_pointer
[6]))
6321 initstop
= input_line_pointer
;
6323 input_line_pointer
+= 6;
6326 ++input_line_pointer
;
6328 if (initstop
== NULL
)
6330 as_bad (_("missing to or downto"));
6331 ignore_rest_of_line ();
6334 if (initstop
> initstart
6335 && (initstop
[-1] == ' ' || initstop
[-1] == '\t'))
6339 endstart
= input_line_pointer
;
6341 /* Look for BY or DO. */
6344 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6346 if (strncasecmp (input_line_pointer
, "BY", 2) == 0
6347 && ! is_part_of_name (input_line_pointer
[2]))
6349 endstop
= input_line_pointer
;
6351 input_line_pointer
+= 2;
6354 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
6355 && (input_line_pointer
[2] == '.'
6356 || ! is_part_of_name (input_line_pointer
[2])))
6358 endstop
= input_line_pointer
;
6359 input_line_pointer
+= 2;
6362 ++input_line_pointer
;
6364 if (endstop
== NULL
)
6366 as_bad (_("missing do"));
6367 ignore_rest_of_line ();
6370 if (endstop
> endstart
6371 && (endstop
[-1] == ' ' || endstop
[-1] == '\t'))
6377 bystop
= bystart
+ 2;
6382 bystart
= input_line_pointer
;
6386 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6388 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
6389 && (input_line_pointer
[2] == '.'
6390 || ! is_part_of_name (input_line_pointer
[2])))
6392 bystop
= input_line_pointer
;
6393 input_line_pointer
+= 2;
6396 ++input_line_pointer
;
6400 as_bad (_("missing do"));
6401 ignore_rest_of_line ();
6404 if (bystop
> bystart
6405 && (bystop
[-1] == ' ' || bystop
[-1] == '\t'))
6409 if (*input_line_pointer
!= '.')
6413 extent
= input_line_pointer
[1];
6414 input_line_pointer
+= 2;
6417 /* We have fully parsed the FOR operands. Now build the loop. */
6419 n
= push_mri_control (mri_for
);
6421 buf
= (char *) xmalloc (50 + (input_line_pointer
- varstart
));
6432 memcpy (s
, initstart
, initstop
- initstart
);
6433 s
+= initstop
- initstart
;
6435 memcpy (s
, varstart
, varstop
- varstart
);
6436 s
+= varstop
- varstart
;
6450 memcpy (s
, endstart
, endstop
- endstart
);
6451 s
+= endstop
- endstart
;
6453 memcpy (s
, varstart
, varstop
- varstart
);
6454 s
+= varstop
- varstart
;
6462 sprintf (buf
, "blt%s %s", ex
, n
->bottom
);
6464 sprintf (buf
, "bgt%s %s", ex
, n
->bottom
);
6467 /* Put together the add or sub instruction used by ENDF. */
6477 memcpy (s
, bystart
, bystop
- bystart
);
6478 s
+= bystop
- bystart
;
6480 memcpy (s
, varstart
, varstop
- varstart
);
6481 s
+= varstop
- varstart
;
6487 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6488 ++input_line_pointer
;
6491 demand_empty_rest_of_line ();
6494 /* Handle the MRI ENDF pseudo-op. */
6498 int ignore ATTRIBUTE_UNUSED
;
6500 if (mri_control_stack
== NULL
6501 || mri_control_stack
->type
!= mri_for
)
6503 as_bad (_("endf without for"));
6504 ignore_rest_of_line ();
6508 colon (mri_control_stack
->next
);
6510 mri_assemble (mri_control_stack
->incr
);
6512 sprintf (mri_control_stack
->incr
, "bra %s", mri_control_stack
->top
);
6513 mri_assemble (mri_control_stack
->incr
);
6515 free (mri_control_stack
->incr
);
6517 colon (mri_control_stack
->bottom
);
6523 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6524 ++input_line_pointer
;
6527 demand_empty_rest_of_line ();
6530 /* Handle the MRI REPEAT pseudo-op. */
6533 s_mri_repeat (ignore
)
6534 int ignore ATTRIBUTE_UNUSED
;
6536 struct mri_control_info
*n
;
6538 n
= push_mri_control (mri_repeat
);
6542 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6543 ++input_line_pointer
;
6545 demand_empty_rest_of_line ();
6548 /* Handle the MRI UNTIL pseudo-op. */
6556 if (mri_control_stack
== NULL
6557 || mri_control_stack
->type
!= mri_repeat
)
6559 as_bad (_("until without repeat"));
6560 ignore_rest_of_line ();
6564 colon (mri_control_stack
->next
);
6566 for (s
= input_line_pointer
; ! is_end_of_line
[(unsigned char) *s
]; s
++)
6569 parse_mri_control_expression (s
, qual
, (const char *) NULL
,
6570 mri_control_stack
->top
, '\0');
6572 colon (mri_control_stack
->bottom
);
6574 input_line_pointer
= s
;
6580 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6581 ++input_line_pointer
;
6584 demand_empty_rest_of_line ();
6587 /* Handle the MRI WHILE pseudo-op. */
6595 struct mri_control_info
*n
;
6597 s
= input_line_pointer
;
6598 while (! is_end_of_line
[(unsigned char) *s
]
6599 && (! flag_mri
|| *s
!= '*'))
6602 while (*s
== ' ' || *s
== '\t')
6604 if (s
- input_line_pointer
> 1
6607 if (s
- input_line_pointer
< 2
6608 || strncasecmp (s
- 1, "DO", 2) != 0)
6610 as_bad (_("missing do"));
6611 ignore_rest_of_line ();
6615 n
= push_mri_control (mri_while
);
6619 parse_mri_control_expression (s
- 1, qual
, (const char *) NULL
, n
->bottom
,
6620 s
[1] == '.' ? s
[2] : '\0');
6622 input_line_pointer
= s
+ 1;
6623 if (*input_line_pointer
== '.')
6624 input_line_pointer
+= 2;
6628 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6629 ++input_line_pointer
;
6632 demand_empty_rest_of_line ();
6635 /* Handle the MRI ENDW pseudo-op. */
6639 int ignore ATTRIBUTE_UNUSED
;
6643 if (mri_control_stack
== NULL
6644 || mri_control_stack
->type
!= mri_while
)
6646 as_bad (_("endw without while"));
6647 ignore_rest_of_line ();
6651 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->next
));
6652 sprintf (buf
, "bra %s", mri_control_stack
->next
);
6656 colon (mri_control_stack
->bottom
);
6662 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6663 ++input_line_pointer
;
6666 demand_empty_rest_of_line ();
6671 * Invocation line includes a switch not recognized by the base assembler.
6672 * See if it's a processor-specific option. These are:
6674 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
6675 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
6676 * Select the architecture. Instructions or features not
6677 * supported by the selected architecture cause fatal
6678 * errors. More than one may be specified. The default is
6679 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
6680 * for -m68000, and -m68882 is a synonym for -m68881.
6681 * -[A]m[c]no-68851, -[A]m[c]no-68881
6682 * Don't accept 688?1 instructions. (The "c" is kind of silly,
6683 * so don't use or document it, but that's the way the parsing
6686 * -pic Indicates PIC.
6687 * -k Indicates PIC. (Sun 3 only.)
6688 * --pcrel Never turn PC-relative branches into absolute jumps.
6691 * Permit `|' to be used in expressions.
6696 CONST
char *md_shortopts
= "lSA:m:kQ:V";
6698 CONST
char *md_shortopts
= "lSA:m:k";
6701 struct option md_longopts
[] = {
6702 #define OPTION_PIC (OPTION_MD_BASE)
6703 {"pic", no_argument
, NULL
, OPTION_PIC
},
6704 #define OPTION_REGISTER_PREFIX_OPTIONAL (OPTION_MD_BASE + 1)
6705 {"register-prefix-optional", no_argument
, NULL
,
6706 OPTION_REGISTER_PREFIX_OPTIONAL
},
6707 #define OPTION_BITWISE_OR (OPTION_MD_BASE + 2)
6708 {"bitwise-or", no_argument
, NULL
, OPTION_BITWISE_OR
},
6709 #define OPTION_BASE_SIZE_DEFAULT_16 (OPTION_MD_BASE + 3)
6710 {"base-size-default-16", no_argument
, NULL
, OPTION_BASE_SIZE_DEFAULT_16
},
6711 #define OPTION_BASE_SIZE_DEFAULT_32 (OPTION_MD_BASE + 4)
6712 {"base-size-default-32", no_argument
, NULL
, OPTION_BASE_SIZE_DEFAULT_32
},
6713 #define OPTION_DISP_SIZE_DEFAULT_16 (OPTION_MD_BASE + 5)
6714 {"disp-size-default-16", no_argument
, NULL
, OPTION_DISP_SIZE_DEFAULT_16
},
6715 #define OPTION_DISP_SIZE_DEFAULT_32 (OPTION_MD_BASE + 6)
6716 {"disp-size-default-32", no_argument
, NULL
, OPTION_DISP_SIZE_DEFAULT_32
},
6717 #define OPTION_PCREL (OPTION_MD_BASE + 7)
6718 {"pcrel", no_argument
, NULL
, OPTION_PCREL
},
6719 {NULL
, no_argument
, NULL
, 0}
6721 size_t md_longopts_size
= sizeof (md_longopts
);
6724 md_parse_option (c
, arg
)
6730 case 'l': /* -l means keep external to 2 bit offset
6731 rather than 16 bit one */
6732 flag_short_refs
= 1;
6735 case 'S': /* -S means that jbsr's always turn into
6737 flag_long_jumps
= 1;
6740 case OPTION_PCREL
: /* --pcrel means never turn PC-relative
6741 branches into absolute jumps. */
6742 flag_keep_pcrel
= 1;
6748 /* intentional fall-through */
6751 if (arg
[0] == 'n' && arg
[1] == 'o' && arg
[2] == '-')
6755 const char *oarg
= arg
;
6761 if (arg
[0] == 'c' && arg
[1] == '6')
6764 for (i
= 0; i
< n_archs
; i
++)
6765 if (!strcmp (arg
, archs
[i
].name
))
6770 as_bad (_("unrecognized option `%s'"), oarg
);
6773 arch
= archs
[i
].arch
;
6776 else if (arch
== m68851
)
6785 if (arg
[0] == 'c' && arg
[1] == '6')
6788 for (i
= 0; i
< n_archs
; i
++)
6789 if (!strcmp (arg
, archs
[i
].name
))
6791 unsigned long arch
= archs
[i
].arch
;
6792 if (cpu_of_arch (arch
))
6793 /* It's a cpu spec. */
6795 current_architecture
&= ~m68000up
;
6796 current_architecture
|= arch
;
6798 else if (arch
== m68881
)
6800 current_architecture
|= m68881
;
6803 else if (arch
== m68851
)
6805 current_architecture
|= m68851
;
6815 as_bad (_("unrecognized architecture specification `%s'"), arg
);
6824 break; /* -pic, Position Independent Code */
6826 case OPTION_REGISTER_PREFIX_OPTIONAL
:
6827 flag_reg_prefix_optional
= 1;
6828 reg_prefix_optional_seen
= 1;
6831 /* -V: SVR4 argument to print version ID. */
6833 print_version_id ();
6836 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
6837 should be emitted or not. FIXME: Not implemented. */
6841 case OPTION_BITWISE_OR
:
6846 n
= (char *) xmalloc (strlen (m68k_comment_chars
) + 1);
6848 for (s
= m68k_comment_chars
; *s
!= '\0'; s
++)
6852 m68k_comment_chars
= n
;
6856 case OPTION_BASE_SIZE_DEFAULT_16
:
6857 m68k_index_width_default
= SIZE_WORD
;
6860 case OPTION_BASE_SIZE_DEFAULT_32
:
6861 m68k_index_width_default
= SIZE_LONG
;
6864 case OPTION_DISP_SIZE_DEFAULT_16
:
6866 m68k_rel32_from_cmdline
= 1;
6869 case OPTION_DISP_SIZE_DEFAULT_32
:
6871 m68k_rel32_from_cmdline
= 1;
6882 md_show_usage (stream
)
6885 fprintf (stream
, _("\
6887 -l use 1 word for refs to undefined symbols [default 2]\n\
6888 -m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060\n\
6889 | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360\n\
6890 | -mcpu32 | -m5200\n\
6891 specify variant of 680X0 architecture [default 68020]\n\
6892 -m68881 | -m68882 | -mno-68881 | -mno-68882\n\
6893 target has/lacks floating-point coprocessor\n\
6894 [default yes for 68020, 68030, and cpu32]\n"));
6895 fprintf (stream
, _("\
6896 -m68851 | -mno-68851\n\
6897 target has/lacks memory-management unit coprocessor\n\
6898 [default yes for 68020 and up]\n\
6899 -pic, -k generate position independent code\n\
6900 -S turn jbsr into jsr\n\
6901 --pcrel never turn PC-relative branches into absolute jumps\n\
6902 --register-prefix-optional\n\
6903 recognize register names without prefix character\n\
6904 --bitwise-or do not treat `|' as a comment character\n"));
6905 fprintf (stream
, _("\
6906 --base-size-default-16 base reg without size is 16 bits\n\
6907 --base-size-default-32 base reg without size is 32 bits (default)\n\
6908 --disp-size-default-16 displacement with unknown size is 16 bits\n\
6909 --disp-size-default-32 displacement with unknown size is 32 bits (default)\n"));
6914 /* TEST2: Test md_assemble() */
6915 /* Warning, this routine probably doesn't work anymore */
6919 struct m68k_it the_ins
;
6927 if (!gets (buf
) || !*buf
)
6929 if (buf
[0] == '|' || buf
[1] == '.')
6931 for (cp
= buf
; *cp
; cp
++)
6936 memset (&the_ins
, '\0', sizeof (the_ins
));
6937 m68k_ip (&the_ins
, buf
);
6940 printf (_("Error %s in %s\n"), the_ins
.error
, buf
);
6944 printf (_("Opcode(%d.%s): "), the_ins
.numo
, the_ins
.args
);
6945 for (n
= 0; n
< the_ins
.numo
; n
++)
6946 printf (" 0x%x", the_ins
.opcode
[n
] & 0xffff);
6948 print_the_insn (&the_ins
.opcode
[0], stdout
);
6949 (void) putchar ('\n');
6951 for (n
= 0; n
< strlen (the_ins
.args
) / 2; n
++)
6953 if (the_ins
.operands
[n
].error
)
6955 printf ("op%d Error %s in %s\n", n
, the_ins
.operands
[n
].error
, buf
);
6958 printf ("mode %d, reg %d, ", the_ins
.operands
[n
].mode
, the_ins
.operands
[n
].reg
);
6959 if (the_ins
.operands
[n
].b_const
)
6960 printf ("Constant: '%.*s', ", 1 + the_ins
.operands
[n
].e_const
- the_ins
.operands
[n
].b_const
, the_ins
.operands
[n
].b_const
);
6961 printf ("ireg %d, isiz %d, imul %d, ", the_ins
.operands
[n
].ireg
, the_ins
.operands
[n
].isiz
, the_ins
.operands
[n
].imul
);
6962 if (the_ins
.operands
[n
].b_iadd
)
6963 printf ("Iadd: '%.*s',", 1 + the_ins
.operands
[n
].e_iadd
- the_ins
.operands
[n
].b_iadd
, the_ins
.operands
[n
].b_iadd
);
6964 (void) putchar ('\n');
6976 while (*str
&& *str
!= ' ')
6978 if (str
[-1] == ':' || str
[1] == '=')
6985 /* Possible states for relaxation:
6987 0 0 branch offset byte (bra, etc)
6991 1 0 indexed offsets byte a0@(32,d4:w:1) etc
6995 2 0 two-offset index word-word a0@(32,d4)@(45) etc
7002 /* We have no need to default values of symbols. */
7005 md_undefined_symbol (name
)
7006 char *name ATTRIBUTE_UNUSED
;
7011 /* Round up a section size to the appropriate boundary. */
7013 md_section_align (segment
, size
)
7014 segT segment ATTRIBUTE_UNUSED
;
7018 #ifdef BFD_ASSEMBLER
7019 /* For a.out, force the section size to be aligned. If we don't do
7020 this, BFD will align it for us, but it will not write out the
7021 final bytes of the section. This may be a bug in BFD, but it is
7022 easier to fix it here since that is how the other a.out targets
7026 align
= bfd_get_section_alignment (stdoutput
, segment
);
7027 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
7034 /* Exactly what point is a PC-relative offset relative TO?
7035 On the 68k, it is relative to the address of the first extension
7036 word. The difference between the addresses of the offset and the
7037 first extension word is stored in fx_pcrel_adjust. */
7039 md_pcrel_from (fixP
)
7044 /* Because fx_pcrel_adjust is a char, and may be unsigned, we store
7046 adjust
= fixP
->fx_pcrel_adjust
;
7049 return fixP
->fx_where
+ fixP
->fx_frag
->fr_address
- adjust
;
7052 #ifndef BFD_ASSEMBLER
7056 tc_coff_symbol_emit_hook (ignore
)
7057 symbolS
*ignore ATTRIBUTE_UNUSED
;
7062 tc_coff_sizemachdep (frag
)
7065 switch (frag
->fr_subtype
& 0x3)
7082 void m68k_elf_final_processing()
7084 /* Set file-specific flags if this is a cpu32 processor */
7085 if (cpu_of_arch (current_architecture
) & cpu32
)
7086 elf_elfheader (stdoutput
)->e_flags
|= EF_CPU32
;