1 /* m68k.c All the m68020 specific stuff in one convenient, huge,
2 slow to compile, easy to find file.
3 Copyright (C) 1987, 1991 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
27 /* note that this file includes real declarations and thus can only be included by one source file per executable. */
28 #include "m68k-opcode.h"
30 /* This variable contains the value to write out at the beginning of
31 the a.out file. The 2<<16 means that this is a 68020 file instead
32 of an old-style 68000 file */
34 long omagic
= 2<<16|OMAGIC
; /* Magic byte for header file */
39 /* This array holds the chars that always start a comment. If the
40 pre-processor is disabled, these aren't very useful */
41 const char comment_chars
[] = "|";
43 /* This array holds the chars that only start a comment at the beginning of
44 a line. If the line seems to have the form '# 123 filename'
45 .line and .file directives will appear in the pre-processed output */
46 /* Note that input_file.c hand checks for '#' at the beginning of the
47 first line of the input file. This is because the compiler outputs
48 #NO_APP at the beginning of its output. */
49 /* Also note that comments like this one will always work. */
50 const char line_comment_chars
[] = "#";
52 /* Chars that can be used to separate mant from exp in floating point nums */
53 const char EXP_CHARS
[] = "eE";
55 /* Chars that mean this number is a floating point constant */
59 const char FLT_CHARS
[] = "rRsSfFdDxXeEpP";
61 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
62 changed in read.c . Ideally it shouldn't have to know about it at all,
63 but nothing is ideal around here.
66 int md_reloc_size
= 8; /* Size of relocation record */
68 /* Its an arbitrary name: This means I don't approve of it */
69 /* See flames below */
70 static struct obstack robyn
;
72 #define TAB(x,y) (((x)<<2)+(y))
73 #define TABTYPE(xy) ((xy) >> 2)
86 /* Operands we can parse: (And associated modes)
92 reg: address or data register
93 areg: address register
94 apc: address register, PC, ZPC or empty string
97 sz: w or l if omitted, l assumed
98 scale: 1 2 4 or 8 if omitted, 1 assumed
100 7.4 IMMED #num --> NUM
101 0.? DREG dreg --> dreg
102 1.? AREG areg --> areg
103 2.? AINDR areg@ --> *(areg)
104 3.? AINC areg@+ --> *(areg++)
105 4.? ADEC areg@- --> *(--areg)
106 5.? AOFF apc@(numw) --> *(apc+numw) -- empty string and ZPC not allowed here
107 6.? AINDX apc@(num,reg:sz:scale) --> *(apc+num+reg*scale)
108 6.? AINDX apc@(reg:sz:scale) --> same, with num=0
109 6.? APODX apc@(num)@(num2,reg:sz:scale) --> *(*(apc+num)+num2+reg*scale)
110 6.? APODX apc@(num)@(reg:sz:scale) --> same, with num2=0
111 6.? AMIND apc@(num)@(num2) --> *(*(apc+num)+num2) (previous mode without an index reg)
112 6.? APRDX apc@(num,reg:sz:scale)@(num2) --> *(*(apc+num+reg*scale)+num2)
113 6.? APRDX apc@(reg:sz:scale)@(num2) --> same, with num=0
114 7.0 ABSL num:sz --> *(num)
115 num --> *(num) (sz L assumed)
116 *** MSCR otherreg --> Magic
118 5.? AOFF apc@(num) --> *(apc+num) -- empty string and ZPC not allowed here still
128 a1@(5,d2:w:1) @(45,d6:l:4)
133 #name@(numw) -->turn into PC rel mode
134 apc@(num8,reg:sz:scale) --> *(apc+num8+reg*scale)
160 short e_siz
; /* 0== default 1==short/byte 2==word 3==long */
163 /* Internal form of an operand. */
165 char *error
; /* Couldn't parse it */
166 enum operand_type mode
; /* What mode this instruction is in. */
167 unsigned long reg
; /* Base register */
168 struct m68k_exp
*con1
;
169 int ireg
; /* Index register */
170 int isiz
; /* 0==unspec 1==byte(?) 2==short 3==long */
171 int imul
; /* Multipy ireg by this (1,2,4,or 8) */
172 struct m68k_exp
*con2
;
175 /* internal form of a 68020 instruction */
178 char *args
; /* list of opcode info */
181 int numo
; /* Number of shorts in opcode */
184 struct m68k_op operands
[6];
186 int nexp
; /* number of exprs in use */
187 struct m68k_exp exprs
[4];
189 int nfrag
; /* Number of frags we have to produce */
191 int fragoff
; /* Where in the current opcode[] the frag ends */
197 int nrel
; /* Num of reloc strucs in use */
205 } reloc
[5]; /* Five is enough??? */
208 struct m68_it the_ins
; /* the instruction being assembled */
211 /* Macros for adding things to the m68_it struct */
213 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
215 /* Like addword, but goes BEFORE general operands */
216 #define insop(w) {int z;\
217 for(z=the_ins.numo;z>opcode->m_codenum;--z)\
218 the_ins.opcode[z]=the_ins.opcode[z-1];\
219 for(z=0;z<the_ins.nrel;z++)\
220 the_ins.reloc[z].n+=2;\
221 the_ins.opcode[opcode->m_codenum]=w;\
226 #define add_exp(beg,end) (\
227 the_ins.exprs[the_ins.nexp].e_beg=beg,\
228 the_ins.exprs[the_ins.nexp].e_end=end,\
229 &the_ins.exprs[the_ins.nexp++]\
233 /* The numo+1 kludge is so we can hit the low order byte of the prev word. Blecch*/
234 #define add_fix(width,exp,pc_rel) {\
235 the_ins.reloc[the_ins.nrel].n= ((width)=='B') ? (the_ins.numo*2-1) : \
236 (((width)=='b') ? ((the_ins.numo-1)*2) : (the_ins.numo*2));\
237 the_ins.reloc[the_ins.nrel].add=adds((exp));\
238 the_ins.reloc[the_ins.nrel].sub=subs((exp));\
239 the_ins.reloc[the_ins.nrel].off=offs((exp));\
240 the_ins.reloc[the_ins.nrel].wid=width;\
241 the_ins.reloc[the_ins.nrel++].pcrel=pc_rel;\
244 #define add_frag(add,off,type) {\
245 the_ins.fragb[the_ins.nfrag].fragoff=the_ins.numo;\
246 the_ins.fragb[the_ins.nfrag].fadd=add;\
247 the_ins.fragb[the_ins.nfrag].foff=off;\
248 the_ins.fragb[the_ins.nfrag++].fragty=type;\
251 #define isvar(exp) ((exp) && (adds(exp) || subs(exp)))
253 #define seg(exp) ((exp)->e_exp.X_seg)
254 #define adds(exp) ((exp)->e_exp.X_add_symbol)
255 #define subs(exp) ((exp)->e_exp.X_subtract_symbol)
256 #define offs(exp) ((exp)->e_exp.X_add_number)
261 unsigned long m_opcode
;
264 struct m68_incant
*m_next
;
267 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
268 #define gettwo(x) (((x)->m_opcode)&0xffff)
273 static char *crack_operand(char *str
, struct m68k_op
*opP
);
274 static int get_num(struct m68k_exp
*exp
, int ok
);
275 static int get_regs(int i
, char *str
, struct m68k_op
*opP
);
276 static int reverse_16_bits(int in
);
277 static int reverse_8_bits(int in
);
278 static int try_index(char **s
, struct m68k_op
*opP
);
279 static void install_gen_operand(int mode
, int val
);
280 static void install_operand(int mode
, int val
);
281 static void s_bss(void);
282 static void s_data1(void);
283 static void s_data2(void);
284 static void s_even(void);
285 static void s_proc(void);
289 static char *crack_operand();
290 static int get_num();
291 static int get_regs();
292 static int reverse_16_bits();
293 static int reverse_8_bits();
294 static int try_index();
295 static void install_gen_operand();
296 static void install_operand();
298 static void s_data1();
299 static void s_data2();
300 static void s_even();
301 static void s_proc();
303 #endif /* __STDC__ */
305 /* BCC68000 is for patching in an extra jmp instruction for long offsets
306 on the 68000. The 68000 doesn't support long branches with branchs */
308 /* This table desribes how you change sizes for the various types of variable
309 size expressions. This version only supports two kinds. */
311 /* Note that calls to frag_var need to specify the maximum expansion needed */
312 /* This is currently 10 bytes for DBCC */
315 How far Forward this mode will reach:
316 How far Backward this mode will reach:
317 How many bytes this mode will add to the size of the frag
318 Which mode to go to if the offset won't fit in this one
322 { 1, 1, 0, 0 }, /* First entries aren't used */
323 { 1, 1, 0, 0 }, /* For no good reason except */
324 { 1, 1, 0, 0 }, /* that the VAX doesn't either */
327 { (127), (-128), 0, TAB(BRANCH
,SHORT
)},
328 { (32767), (-32768), 2, TAB(BRANCH
,LONG
) },
332 { 1, 1, 0, 0 }, /* FBRANCH doesn't come BYTE */
333 { (32767), (-32768), 2, TAB(FBRANCH
,LONG
)},
337 { 1, 1, 0, 0 }, /* PCREL doesn't come BYTE */
338 { (32767), (-32768), 2, TAB(PCREL
,LONG
)},
342 { (127), (-128), 0, TAB(BCC68000
,SHORT
)},
343 { (32767), (-32768), 2, TAB(BCC68000
,LONG
) },
344 { 0, 0, 6, 0 }, /* jmp long space */
347 { 1, 1, 0, 0 }, /* DBCC doesn't come BYTE */
348 { (32767), (-32768), 2, TAB(DBCC
,LONG
) },
349 { 0, 0, 10, 0 }, /* bra/jmp long space */
352 { 1, 1, 0, 0 }, /* PCLEA doesn't come BYTE */
353 { 32767, -32768, 2, TAB(PCLEA
,LONG
) },
359 /* These are the machine dependent pseudo-ops. These are included so
360 the assembler can work on the output from the SUN C compiler, which
364 /* This table describes all the machine specific pseudo-ops the assembler
365 has to support. The fields are:
366 pseudo-op name without dot
367 function to call to execute this pseudo-op
368 Integer arg to pass to the function
370 const pseudo_typeS md_pseudo_table
[] = {
371 { "data1", s_data1
, 0 },
372 { "data2", s_data2
, 0 },
374 { "even", s_even
, 0 },
375 { "skip", s_space
, 0 },
376 { "proc", s_proc
, 0 },
381 /* #define isbyte(x) ((x)>=-128 && (x)<=127) */
382 /* #define isword(x) ((x)>=-32768 && (x)<=32767) */
384 #define issbyte(x) ((x)>=-128 && (x)<=127)
385 #define isubyte(x) ((x)>=0 && (x)<=255)
386 #define issword(x) ((x)>=-32768 && (x)<=32767)
387 #define isuword(x) ((x)>=0 && (x)<=65535)
389 #define isbyte(x) ((x)>=-128 && (x)<=255)
390 #define isword(x) ((x)>=-32768 && (x)<=65535)
391 #define islong(x) (1)
393 extern char *input_line_pointer
;
398 /* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7==data reg,
399 8-15==addr reg for operands that take both types */
400 #define DATA 1 /* 1- 8 == data registers 0-7 */
401 #define ADDR (DATA+8) /* 9-16 == address regs 0-7 */
402 #define FPREG (ADDR+8) /* 17-24 Eight FP registers */
403 #define COPNUM (FPREG+8) /* 25-32 Co-processor #1-#8 */
405 #define PC (COPNUM+8) /* 33 Program counter */
406 #define ZPC (PC+1) /* 34 Hack for Program space, but 0 addressing */
407 #define SR (ZPC+1) /* 35 Status Reg */
408 #define CCR (SR+1) /* 36 Condition code Reg */
410 /* These have to be in order for the movec instruction to work. */
411 #define USP (CCR+1) /* 37 User Stack Pointer */
412 #define ISP (USP+1) /* 38 Interrupt stack pointer */
413 #define SFC (ISP+1) /* 39 */
414 #define DFC (SFC+1) /* 40 */
415 #define CACR (DFC+1) /* 41 */
416 #define VBR (CACR+1) /* 42 */
417 #define CAAR (VBR+1) /* 43 */
418 #define MSP (CAAR+1) /* 44 */
420 #define FPI (MSP+1) /* 45 */
421 #define FPS (FPI+1) /* 46 */
422 #define FPC (FPS+1) /* 47 */
424 * these defines should be in m68k.c but
425 * i put them here to keep all the m68851 stuff
427 * JF--Make sure these #s don't clash with the ones in m68k.c
430 #define TC (FPC+1) /* 48 */
431 #define DRP (TC+1) /* 49 */
432 #define SRP (DRP+1) /* 50 */
433 #define CRP (SRP+1) /* 51 */
434 #define CAL (CRP+1) /* 52 */
435 #define VAL (CAL+1) /* 53 */
436 #define SCC (VAL+1) /* 54 */
437 #define AC (SCC+1) /* 55 */
438 #define BAD (AC+1) /* 56,57,58,59, 60,61,62,63 */
439 #define BAC (BAD+8) /* 64,65,66,67, 68,69,70,71 */
440 #define PSR (BAC+8) /* 72 */
441 #define PCSR (PSR+1) /* 73 */
444 /* Note that COPNUM==processor #1 -- COPNUM+7==#8, which stores as 000 */
449 /* JF these tables here are for speed at the expense of size */
450 /* You can replace them with the #if 0 versions if you really
451 need space and don't mind it running a bit slower */
453 static char mklower_table
[256];
454 #define mklower(c) (mklower_table[(unsigned char)(c)])
455 static char notend_table
[256];
456 static char alt_notend_table
[256];
457 #define notend(s) ( !(notend_table[(unsigned char)(*s)] || (*s==':' &&\
458 alt_notend_table[(unsigned char)(s[1])])))
461 #define mklower(c) (isupper(c) ? tolower(c) : c)
465 /* JF modified this to handle cases where the first part of a symbol name
466 looks like a register */
479 c1
=mklower(ccp
[0][0]);
480 #ifdef REGISTER_PREFIX
481 if(c1
!=REGISTER_PREFIX
)
483 c1
=mklower(ccp
[0][1]);
484 c2
=mklower(ccp
[0][2]);
485 c3
=mklower(ccp
[0][3]);
486 c4
=mklower(ccp
[0][4]);
488 c2
=mklower(ccp
[0][1]);
489 c3
=mklower(ccp
[0][2]);
490 c4
=mklower(ccp
[0][3]);
494 if(c2
>='0' && c2
<='7') {
499 else if (c2
== 'c') {
509 if (c4
>= '0' && c4
<= '7') {
511 ret
= BAD
+ c4
- '0';
515 if (c4
>= '0' && c4
<= '7') {
517 ret
= BAC
+ c4
- '0';
525 if (c2
== 'a' && c3
== 'l') {
530 /* This supports both CCR and CC as the ccr reg. */
531 if(c2
=='c' && c3
=='r') {
537 } else if(c2
=='a' && (c3
=='a' || c3
=='c') && c4
=='r') {
539 ret
= c3
=='a' ? CAAR
: CACR
;
542 else if (c2
== 'r' && c3
== 'p') {
549 if(c2
>='0' && c2
<='7') {
552 } else if(c2
=='f' && c3
=='c') {
557 else if (c2
== 'r' && c3
== 'p') {
565 if(c3
>='0' && c3
<='7') {
574 n
= (c4
== 'r' ? 4 : 3);
577 n
= (c4
== 'r' ? 4 : 3);
583 if(c2
=='s' && c3
=='p') {
589 if(c2
=='s' && c3
=='p') {
597 if(c3
== 's' && c4
=='r') {
608 else if (c2
== 's' && c3
== 'r') {
616 if (c2
== 'c' && c3
== 'c') {
619 } else if (c2
== 'r' && c3
== 'p') {
630 } else if(c2
=='f' && c3
=='c') {
644 if(c2
=='s' && c3
=='p') {
651 if (c2
== 'a' && c3
== 'l') {
656 if(c2
=='b' && c3
=='r') {
662 if(c2
=='p' && c3
=='c') {
671 #ifdef REGISTER_PREFIX
674 if(isalnum(ccp
[0][n
]) || ccp
[0][n
]=='_')
683 #define SKIP_WHITE() { str++; if(*str==' ') str++;}
688 register struct m68k_op
*opP
;
696 /* Find the end of the string */
699 opP
->error
="Missing operand";
702 for(strend
=str
;*strend
;strend
++)
706 /* Guess what: A constant. Shar and enjoy */
709 opP
->con1
=add_exp(str
,strend
);
713 i
=m68k_reg_parse(&str
);
714 if((i
==FAIL
|| *str
!='\0') && *str
!='@') {
717 if(i
!=FAIL
&& (*str
=='/' || *str
=='-')) {
719 return get_regs(i
,str
,opP
);
721 if ((stmp
=strchr(str
,'@')) != '\0') {
722 opP
->con1
=add_exp(str
,stmp
-1);
728 if(*stmp
++!='(' || *strend
--!=')') {
729 opP
->error
="Malformed operand";
732 i
=try_index(&stmp
,opP
);
733 opP
->con2
=add_exp(stmp
,strend
);
734 if(i
==FAIL
) opP
->mode
=AMIND
;
735 else opP
->mode
=APODX
;
739 opP
->con1
=add_exp(str
,strend
);
744 if(i
>=DATA
+0 && i
<=DATA
+7)
746 else if(i
>=ADDR
+0 && i
<=ADDR
+7)
752 if((i
<ADDR
+0 || i
>ADDR
+7) && i
!=PC
&& i
!=ZPC
&& i
!=FAIL
) { /* Can't indirect off non address regs */
753 opP
->error
="Invalid indirect register";
773 opP
->error
="Junk after indirect";
776 /* Some kind of indexing involved. Lets find out how bad it is */
777 i
=try_index(&str
,opP
);
778 /* Didn't start with an index reg, maybe its offset or offset,reg */
786 opP
->error
="Missing )";
788 case ',': i
=0; break;
789 case '(': i
++; break;
790 case ')': --i
; break;
793 /* if(str[-3]==':') {
810 opP->error="Specified size isn't :w or :l";
813 opP->con1=add_exp(beg_str,str-4);
814 opP->con1->e_siz=siz;
816 opP
->con1
=add_exp(beg_str
,str
-2);
817 /* Should be offset,reg */
819 i
=try_index(&str
,opP
);
821 opP
->error
="Malformed index reg";
826 /* We've now got offset) offset,reg) or reg) */
829 /* Th-the-thats all folks */
830 if(opP
->reg
==FAIL
) opP
->mode
=AINDX
; /* Other form of indirect */
831 else if(opP
->ireg
==FAIL
) opP
->mode
=AOFF
;
832 else opP
->mode
=AINDX
;
835 /* Next thing had better be another @ */
836 if(*str
!='@' || str
[1]!='(') {
837 opP
->error
="junk after indirect";
841 if(opP
->ireg
!=FAIL
) {
843 i
=try_index(&str
,opP
);
845 opP
->error
="Two index registers! not allowed!";
849 i
=try_index(&str
,opP
);
857 opP
->error
="Missing )";
859 case ',': i
=0; break;
860 case '(': i
++; break;
861 case ')': --i
; break;
864 opP
->con2
=add_exp(beg_str
,str
-2);
866 if(opP
->ireg
!=FAIL
) {
867 opP
->error
="Can't have two index regs";
870 i
=try_index(&str
,opP
);
872 opP
->error
="malformed index reg";
876 } else if(opP
->ireg
!=FAIL
)
883 opP
->error
="Junk after indirect";
889 static int try_index(s
,opP
)
895 #define SKIP_W() { ss++; if(*ss==' ') ss++;}
899 i
=m68k_reg_parse(&ss
);
900 if(!(i
>=DATA
+0 && i
<=ADDR
+7)) { /* if i is not DATA or ADDR reg */
914 opP
->error
="Missing : in index register";
929 opP
->error
="Index register size spec not :w or :l";
944 opP
->error
="index multiplier not 1, 2, 4 or 8";
951 opP
->error
="Missing )";
960 #ifdef TEST1 /* TEST1 tests m68k_ip_op(), which parses operands */
964 struct m68k_op thark
;
969 bzero(&thark
,sizeof(thark
));
970 if(!m68k_ip_op(buf
,&thark
)) printf("FAIL:");
972 printf("op1 error %s in %s\n",thark
.error
,buf
);
973 printf("mode %d, reg %d, ",thark
.mode
,thark
.reg
);
975 printf("Constant: '%.*s',",1+thark
.e_const
-thark
.b_const
,thark
.b_const
);
976 printf("ireg %d, isiz %d, imul %d ",thark
.ireg
,thark
.isiz
,thark
.imul
);
978 printf("Iadd: '%.*s'",1+thark
.e_iadd
-thark
.b_iadd
,thark
.b_iadd
);
987 static struct hash_control
* op_hash
= NULL
; /* handle of the OPCODE hash table
988 NULL means any use before m68_ip_begin()
995 * This converts a string into a 68k instruction.
996 * The string must be a bare single instruction in sun format
997 * with RMS-style 68020 indirects
1000 * It provides some error messages: at most one fatal error message (which
1001 * stops the scan) and at most one warning message for each operand.
1002 * The 68k instruction is returned in exploded form, since we have no
1003 * knowledge of how you parse (or evaluate) your expressions.
1004 * We do however strip off and decode addressing modes and operation
1007 * This function's value is a string. If it is not "" then an internal
1008 * logic error was found: read this code to assign meaning to the string.
1009 * No argument string should generate such an error string:
1010 * it means a bug in our code, not in the user's text.
1012 * You MUST have called m68_ip_begin() once and m86_ip_end() never before using
1016 /* JF this function no longer returns a useful value. Sorry */
1022 register struct m68k_op
*opP
;
1023 register struct m68_incant
*opcode
;
1025 register int tmpreg
= 0,
1034 char *crack_operand();
1035 LITTLENUM_TYPE words
[6];
1036 LITTLENUM_TYPE
*wordp
;
1038 if (*instring
== ' ')
1039 instring
++; /* skip leading whitespace */
1041 /* Scan up to end of operation-code, which MUST end in end-of-string
1042 or exactly 1 space. */
1043 for (p
= instring
; *p
!= '\0'; p
++)
1048 if (p
== instring
) {
1049 the_ins
.error
= "No operator";
1050 the_ins
.opcode
[0] = NULL
;
1051 /* the_ins.numo=1; */
1055 /* p now points to the end of the opcode name, probably whitespace.
1056 make sure the name is null terminated by clobbering the whitespace,
1057 look it up in the hash table, then fix it back. */
1060 opcode
= (struct m68_incant
*)hash_find (op_hash
, instring
);
1063 if (opcode
== NULL
) {
1064 the_ins
.error
= "Unknown operator";
1065 the_ins
.opcode
[0] = NULL
;
1066 /* the_ins.numo=1; */
1070 /* found a legitimate opcode, start matching operands */
1071 while (*p
== ' ') ++p
;
1073 for(opP
= &the_ins
.operands
[0]; *p
; opP
++) {
1075 p
= crack_operand(p
, opP
);
1078 the_ins
.error
=opP
->error
;
1083 opsfound
=opP
- &the_ins
.operands
[0];
1084 /* This ugly hack is to support the floating pt opcodes in their standard form */
1085 /* Essentially, we fake a first enty of type COP#1 */
1086 if(opcode
->m_operands
[0]=='I') {
1089 for(n
=opsfound
;n
>0;--n
)
1090 the_ins
.operands
[n
]=the_ins
.operands
[n
-1];
1092 /* bcopy((char *)(&the_ins.operands[0]),(char *)(&the_ins.operands[1]),opsfound*sizeof(the_ins.operands[0])); */
1093 bzero((char *)(&the_ins
.operands
[0]),sizeof(the_ins
.operands
[0]));
1094 the_ins
.operands
[0].mode
=MSCR
;
1095 the_ins
.operands
[0].reg
=COPNUM
; /* COP #1 */
1098 /* We've got the operands. Find an opcode that'll
1101 if(opsfound
!=opcode
->m_opnum
)
1103 else for(s
=opcode
->m_operands
,opP
= &the_ins
.operands
[0];*s
&& !losing
;s
+=2,opP
++) {
1104 /* Warning: this switch is huge! */
1105 /* I've tried to organize the cases into this order:
1106 non-alpha first, then alpha by letter. lower-case goes directly
1107 before uppercase counterpart. */
1108 /* Code with multiple case ...: gets sorted by the lowest case ...
1109 it belongs to. I hope this makes sense. */
1112 if(opP
->mode
==MSCR
|| opP
->mode
==IMMED
||
1113 opP
->mode
==DREG
|| opP
->mode
==AREG
|| opP
->mode
==AINC
|| opP
->mode
==ADEC
|| opP
->mode
==REGLST
)
1118 if(opP
->mode
!=IMMED
)
1123 t
=get_num(opP
->con1
,80);
1124 if(s
[1]=='b' && !isbyte(t
))
1126 else if(s
[1]=='w' && !isword(t
))
1133 if(opP
->mode
!=IMMED
)
1138 if(opP
->mode
==MSCR
|| opP
->mode
==AREG
||
1139 opP
->mode
==IMMED
|| opP
->reg
==PC
|| opP
->reg
==ZPC
|| opP
->mode
==REGLST
)
1144 if(opP
->mode
==MSCR
|| opP
->reg
==PC
||
1145 opP
->reg
==ZPC
|| opP
->mode
==REGLST
)
1151 if(opP
->mode
==MSCR
|| opP
->mode
==DREG
||
1152 opP
->mode
==AREG
|| opP
->mode
==IMMED
|| opP
->reg
==PC
|| opP
->reg
==ZPC
||
1153 opP
->mode
==AINC
|| opP
->mode
==ADEC
|| opP
->mode
==REGLST
)
1158 if(opP
->mode
==MSCR
|| opP
->mode
==REGLST
)
1173 if(opP
->mode
==MSCR
|| opP
->mode
==AREG
||
1174 opP
->mode
==AINC
|| opP
->mode
==ADEC
|| opP
->mode
==IMMED
|| opP
->mode
==REGLST
)
1179 if(opP
->mode
==MSCR
|| opP
->mode
==AREG
|| opP
->mode
==REGLST
)
1184 if(opP
->mode
==MSCR
|| opP
->mode
==AREG
||
1185 opP
->mode
==AINC
|| opP
->mode
==ADEC
|| opP
->mode
==IMMED
|| opP
->reg
==PC
||
1186 opP
->reg
==ZPC
|| opP
->mode
==REGLST
)
1191 if(opP
->mode
==MSCR
|| opP
->mode
==AREG
||
1192 opP
->mode
==IMMED
|| opP
->mode
==REGLST
)
1196 case '~': /* For now! (JF FOO is this right?) */
1197 if(opP
->mode
==MSCR
|| opP
->mode
==DREG
||
1198 opP
->mode
==AREG
|| opP
->mode
==IMMED
|| opP
->reg
==PC
|| opP
->reg
==ZPC
|| opP
->mode
==REGLST
)
1208 if(opP
->mode
!=ABSL
|| (flagseen
['S'] && instring
[0] == 'j'
1209 && instring
[1] == 'b'
1210 && instring
[2] == 's'
1211 && instring
[3] == 'r'))
1216 if(opP
->mode
!=MSCR
|| opP
->reg
!=CCR
)
1220 case 'd': /* FOO This mode is a KLUDGE!! */
1221 if(opP
->mode
!=AOFF
&& (opP
->mode
!=ABSL
||
1222 opP
->con1
->e_beg
[0]!='(' || opP
->con1
->e_end
[0]!=')'))
1232 if(opP
->mode
!=MSCR
|| opP
->reg
<(FPREG
+0) || opP
->reg
>(FPREG
+7))
1237 if(opP
->mode
!=MSCR
|| opP
->reg
<COPNUM
||
1243 if(opP
->mode
!=MSCR
|| opP
->reg
<USP
|| opP
->reg
>MSP
)
1248 if(opP
->mode
!=IMMED
)
1254 if(opP
->mode
==DREG
|| opP
->mode
==AREG
|| opP
->mode
==FPREG
) {
1259 opP
->reg
=1<<(opP
->reg
-DATA
);
1261 } else if(opP
->mode
!=REGLST
) {
1263 } else if(s
[1]=='8' && opP
->reg
&0x0FFffFF)
1265 else if(s
[1]=='3' && opP
->reg
&0x7000000)
1270 if(opP
->mode
!=IMMED
)
1275 t
=get_num(opP
->con1
,80);
1276 if(!issbyte(t
) || isvar(opP
->con1
))
1282 if(opP
->mode
!=DREG
&& opP
->mode
!=IMMED
)
1287 if(opP
->mode
!=IMMED
)
1292 t
=get_num(opP
->con1
,80);
1293 if(t
<1 || t
>8 || isvar(opP
->con1
))
1299 if(opP
->mode
!=DREG
&& opP
->mode
!=AREG
)
1304 if(opP
->mode
!=MSCR
|| !(opP
->reg
==FPI
|| opP
->reg
==FPS
|| opP
->reg
==FPC
))
1309 if(opP
->mode
!=MSCR
|| opP
->reg
!=SR
)
1314 if(opP
->mode
!=MSCR
|| opP
->reg
!=USP
)
1318 /* JF these are out of order. We could put them
1319 in order if we were willing to put up with
1320 bunches of #ifdef m68851s in the code */
1322 /* Memory addressing mode used by pflushr */
1324 if(opP
->mode
==MSCR
|| opP
->mode
==DREG
||
1325 opP
->mode
==AREG
|| opP
->mode
==REGLST
)
1330 if (opP
->mode
!= MSCR
|| (opP
->reg
!= SFC
&& opP
->reg
!= DFC
))
1335 if (opP
->mode
!= MSCR
|| (opP
->reg
!= TC
&& opP
->reg
!= CAL
&&
1336 opP
->reg
!= VAL
&& opP
->reg
!= SCC
&& opP
->reg
!= AC
))
1341 if (opP
->reg
!= VAL
)
1346 if (opP
->mode
!= MSCR
|| (opP
->reg
!= DRP
&& opP
->reg
!= SRP
&&
1352 if (opP
->mode
!= MSCR
||
1353 (!(opP
->reg
>= BAD
&& opP
->reg
<= BAD
+7) &&
1354 !(opP
->reg
>= BAC
&& opP
->reg
<= BAC
+7)))
1359 if (opP
->reg
!= PSR
)
1364 if (opP
->reg
!= PCSR
)
1369 as_fatal("Internal error: Operand mode %c unknown in line %s of file \"%s\"",
1370 *s
, __LINE__
, __FILE__
);
1375 opcode
=opcode
->m_next
;
1376 if(!opcode
) { /* Fell off the end */
1377 the_ins
.error
="instruction/operands mismatch";
1382 the_ins
.args
=opcode
->m_operands
;
1383 the_ins
.numargs
=opcode
->m_opnum
;
1384 the_ins
.numo
=opcode
->m_codenum
;
1385 the_ins
.opcode
[0]=getone(opcode
);
1386 the_ins
.opcode
[1]=gettwo(opcode
);
1388 for(s
=the_ins
.args
,opP
= &the_ins
.operands
[0];*s
;s
+=2,opP
++) {
1389 /* This switch is a doozy.
1390 What the first step; its a big one! */
1408 tmpreg
=0x3c; /* 7.4 */
1409 if (strchr("bwl",s
[1])) nextword
=get_num(opP
->con1
,80);
1410 else nextword
=nextword
=get_num(opP
->con1
,0);
1411 if(isvar(opP
->con1
))
1412 add_fix(s
[1],opP
->con1
,0);
1415 if(!isbyte(nextword
))
1416 opP
->error
="operand out of range";
1421 if(!isword(nextword
))
1422 opP
->error
="operand out of range";
1427 addword(nextword
>>16);
1449 as_fatal("Internal error: Can't decode %c%c in line %s of file \"%s\"",
1450 *s
, s
[1], __LINE__
, __FILE__
);
1455 /* We gotta put out some float */
1456 if(seg(opP
->con1
)!=SEG_BIG
) {
1457 int_to_gen(nextword
);
1458 gen_to_words(words
,baseo
,(long int)outro
);
1459 for(wordp
=words
;baseo
--;wordp
++)
1463 if(offs(opP
->con1
)>0) {
1464 as_warn("Bignum assumed to be binary bit-pattern");
1465 if(offs(opP
->con1
)>baseo
) {
1466 as_warn("Bignum too big for %c format; truncated",s
[1]);
1467 offs(opP
->con1
)=baseo
;
1469 baseo
-=offs(opP
->con1
);
1470 for(wordp
=generic_bignum
+offs(opP
->con1
)-1;offs(opP
->con1
)--;--wordp
)
1476 gen_to_words(words
,baseo
,(long)outro
);
1477 for (wordp
=words
;baseo
--;wordp
++)
1481 tmpreg
=opP
->reg
-DATA
; /* 0.dreg */
1484 tmpreg
=0x08+opP
->reg
-ADDR
; /* 1.areg */
1487 tmpreg
=0x10+opP
->reg
-ADDR
; /* 2.areg */
1490 tmpreg
=0x20+opP
->reg
-ADDR
; /* 4.areg */
1493 tmpreg
=0x18+opP
->reg
-ADDR
; /* 3.areg */
1497 nextword
=get_num(opP
->con1
,80);
1498 /* Force into index mode. Hope this works */
1500 /* We do the first bit for 32-bit displacements,
1501 and the second bit for 16 bit ones. It is
1502 possible that we should make the default be
1503 WORD instead of LONG, but I think that'd
1504 break GCC, so we put up with a little
1505 inefficiency for the sake of working output.
1508 if( !issword(nextword
)
1509 || ( isvar(opP
->con1
)
1510 && ( ( opP
->con1
->e_siz
==0
1511 && flagseen
['l']==0)
1512 || opP
->con1
->e_siz
==3))) {
1515 tmpreg
=0x3B; /* 7.3 */
1517 tmpreg
=0x30+opP
->reg
-ADDR
; /* 6.areg */
1518 if(isvar(opP
->con1
)) {
1520 add_frag(adds(opP
->con1
),
1522 TAB(PCLEA
,SZ_UNDEF
));
1526 add_fix('l',opP
->con1
,1);
1530 addword(nextword
>>16);
1533 tmpreg
=0x3A; /* 7.2 */
1535 tmpreg
=0x28+opP
->reg
-ADDR
; /* 5.areg */
1537 if(isvar(opP
->con1
)) {
1539 add_fix('w',opP
->con1
,1);
1541 add_fix('w',opP
->con1
,0);
1551 baseo
=get_num(opP
->con1
,80);
1552 outro
=get_num(opP
->con2
,80);
1553 /* Figure out the 'addressing mode' */
1554 /* Also turn on the BASE_DISABLE bit, if needed */
1555 if(opP
->reg
==PC
|| opP
->reg
==ZPC
) {
1556 tmpreg
=0x3b; /* 7.3 */
1559 } else if(opP
->reg
==FAIL
) {
1561 tmpreg
=0x30; /* 6.garbage */
1562 } else tmpreg
=0x30+opP
->reg
-ADDR
; /* 6.areg */
1564 siz1
= (opP
->con1
) ? opP
->con1
->e_siz
: 0;
1565 siz2
= (opP
->con2
) ? opP
->con2
->e_siz
: 0;
1567 /* Index register stuff */
1568 if(opP
->ireg
>=DATA
+0 && opP
->ireg
<=ADDR
+7) {
1569 nextword
|=(opP
->ireg
-DATA
)<<12;
1571 if(opP
->isiz
==0 || opP
->isiz
==3)
1575 case 2: nextword
|=0x200; break;
1576 case 4: nextword
|=0x400; break;
1577 case 8: nextword
|=0x600; break;
1581 GET US OUT OF HERE! */
1583 /* Must be INDEX, with an index
1584 register. Address register
1585 cannot be ZERO-PC, and either
1586 :b was forced, or we know
1588 if( opP
->mode
==AINDX
1593 && !isvar(opP
->con1
)))) {
1594 nextword
+=baseo
&0xff;
1596 if(isvar(opP
->con1
))
1597 add_fix('B',opP
->con1
,0);
1601 nextword
|=0x40; /* No index reg */
1603 /* It aint simple */
1605 /* If the guy specified a width, we assume that
1606 it is wide enough. Maybe it isn't. Ifso, we lose
1610 if(isvar(opP
->con1
) || !issword(baseo
)) {
1621 as_warn("Byte dispacement won't work. Defaulting to :w");
1630 /* Figure out innner displacement stuff */
1631 if(opP
->mode
!=AINDX
) {
1634 if(isvar(opP
->con2
) || !issword(outro
)) {
1645 as_warn("Byte dispacement won't work. Defaulting to :w");
1653 if(opP
->mode
==APODX
) nextword
|=0x04;
1654 else if(opP
->mode
==AMIND
) nextword
|=0x40;
1658 if(isvar(opP
->con1
)) {
1659 if(opP
->reg
==PC
|| opP
->reg
==ZPC
) {
1660 add_fix(siz1
==3 ? 'l' : 'w',opP
->con1
,1);
1661 opP
->con1
->e_exp
.X_add_number
+=6;
1663 add_fix(siz1
==3 ? 'l' : 'w',opP
->con1
,0);
1670 if(isvar(opP
->con2
)) {
1671 if(opP
->reg
==PC
|| opP
->reg
==ZPC
) {
1672 add_fix(siz2
==3 ? 'l' : 'w',opP
->con2
,1);
1673 opP
->con1
->e_exp
.X_add_number
+=6;
1675 add_fix(siz2
==3 ? 'l' : 'w',opP
->con2
,0);
1685 nextword
=get_num(opP
->con1
,80);
1686 switch(opP
->con1
->e_siz
) {
1688 as_warn("Unknown size for absolute reference");
1690 if(!isvar(opP
->con1
) && issword(offs(opP
->con1
))) {
1691 tmpreg
=0x38; /* 7.0 */
1695 /* Don't generate pc relative code
1696 on 68010 and 68000 */
1699 && seg(opP
->con1
) == SEG_TEXT
1700 && now_seg
== SEG_TEXT
1701 && flagseen
['m'] == 0
1703 && !strchr("~%&$?", s
[0])) {
1704 tmpreg
=0x3A; /* 7.2 */
1705 add_frag(adds(opP
->con1
),
1707 TAB(PCREL
,SZ_UNDEF
));
1710 case 3: /* Fall through into long */
1711 if(isvar(opP
->con1
))
1712 add_fix('l',opP
->con1
,0);
1714 tmpreg
=0x39; /* 7.1 mode */
1715 addword(nextword
>>16);
1720 if(isvar(opP
->con1
))
1721 add_fix('w',opP
->con1
,0);
1723 tmpreg
=0x38; /* 7.0 mode */
1730 as_bad("unknown/incorrect operand");
1733 install_gen_operand(s
[1],tmpreg
);
1738 switch(s
[1]) { /* JF: I hate floating point! */
1753 tmpreg
=get_num(opP
->con1
,tmpreg
);
1754 if(isvar(opP
->con1
))
1755 add_fix(s
[1],opP
->con1
,0);
1757 case 'b': /* Danger: These do no check for
1758 certain types of overflow.
1761 opP
->error
="out of range";
1763 if(isvar(opP
->con1
))
1764 the_ins
.reloc
[the_ins
.nrel
-1].n
=(opcode
->m_codenum
)*2;
1768 opP
->error
="out of range";
1770 if(isvar(opP
->con1
))
1771 the_ins
.reloc
[the_ins
.nrel
-1].n
=(opcode
->m_codenum
)*2;
1774 insop(tmpreg
); /* Because of the way insop works, we put these two out backwards */
1776 if(isvar(opP
->con1
))
1777 the_ins
.reloc
[the_ins
.nrel
-1].n
=(opcode
->m_codenum
)*2;
1783 install_operand(s
[1],tmpreg
);
1786 as_fatal("Internal error: Unknown mode #%c in line %s of file \"%s\"", s
[1], __LINE__
, __FILE__
);
1793 install_operand(s
[1],opP
->reg
-ADDR
);
1797 tmpreg
=get_num(opP
->con1
,80);
1800 /* Needs no offsetting */
1801 add_fix('B',opP
->con1
,1);
1804 /* Offset the displacement to be relative to byte disp location */
1805 opP
->con1
->e_exp
.X_add_number
+=2;
1806 add_fix('w',opP
->con1
,1);
1811 if(flagseen
['m']) /* 68000 or 010 */
1812 as_warn("Can't use long branches on 68000/68010");
1813 the_ins
.opcode
[the_ins
.numo
-1]|=0xff;
1814 /* Offset the displacement to be relative to byte disp location */
1815 opP
->con1
->e_exp
.X_add_number
+=4;
1816 add_fix('l',opP
->con1
,1);
1821 if(subs(opP
->con1
)) /* We can't relax it */
1824 /* This could either be a symbol, or an
1825 absolute address. No matter, the
1826 frag hacking will finger it out.
1827 Not quite: it can't switch from
1828 BRANCH to BCC68000 for the case
1829 where opnd is absolute (it needs
1830 to use the 68000 hack since no
1831 conditional abs jumps). */
1832 if ((flagseen
['m'] || (0==adds(opP
->con1
)))
1833 && (the_ins
.opcode
[0] >= 0x6200)
1834 && (the_ins
.opcode
[0] <= 0x6f00)) {
1835 add_frag(adds(opP
->con1
),offs(opP
->con1
),TAB(BCC68000
,SZ_UNDEF
));
1837 add_frag(adds(opP
->con1
),offs(opP
->con1
),TAB(BRANCH
,SZ_UNDEF
));
1841 if(isvar(opP
->con1
)) {
1842 /* check for DBcc instruction */
1843 if ((the_ins
.opcode
[0] & 0xf0f8) ==0x50c8) {
1844 /* size varies if patch */
1845 /* needed for long form */
1846 add_frag(adds(opP
->con1
),offs(opP
->con1
),TAB(DBCC
,SZ_UNDEF
));
1851 opP
->con1
->e_exp
.X_add_number
+=2;
1852 add_fix('w',opP
->con1
,1);
1856 case 'C': /* Fixed size LONG coproc branches */
1857 the_ins
.opcode
[the_ins
.numo
-1]|=0x40;
1858 /* Offset the displacement to be relative to byte disp location */
1859 /* Coproc branches don't have a byte disp option, but they are
1860 compatible with the ordinary branches, which do... */
1861 opP
->con1
->e_exp
.X_add_number
+=4;
1862 add_fix('l',opP
->con1
,1);
1866 case 'c': /* Var size Coprocesssor branches */
1867 if(subs(opP
->con1
)) {
1868 add_fix('l',opP
->con1
,1);
1869 add_frag((symbolS
*)0,(long)0,TAB(FBRANCH
,LONG
));
1870 } else if(adds(opP
->con1
)) {
1871 add_frag(adds(opP
->con1
),offs(opP
->con1
),TAB(FBRANCH
,SZ_UNDEF
));
1873 /* add_frag((symbolS *)0,offs(opP->con1),TAB(FBRANCH,SHORT)); */
1874 the_ins
.opcode
[the_ins
.numo
-1]|=0x40;
1875 add_fix('l',opP
->con1
,1);
1881 as_fatal("Internal error: operand type B%c unknown in line %s of file \"%s\"",
1882 s
[1], __LINE__
, __FILE__
);
1886 case 'C': /* Ignore it */
1889 case 'd': /* JF this is a kludge */
1890 if(opP
->mode
==AOFF
) {
1891 install_operand('s',opP
->reg
-ADDR
);
1895 tmpP
=opP
->con1
->e_end
-2;
1897 opP
->con1
->e_end
-=4; /* point to the , */
1898 baseo
=m68k_reg_parse(&tmpP
);
1899 if(baseo
<ADDR
+0 || baseo
>ADDR
+7) {
1900 as_bad("Unknown address reg, using A0");
1903 install_operand('s',baseo
);
1905 tmpreg
=get_num(opP
->con1
,80);
1906 if(!issword(tmpreg
)) {
1907 as_warn("Expression out of range, using 0");
1914 install_operand(s
[1],opP
->reg
-DATA
);
1918 install_operand(s
[1],opP
->reg
-FPREG
);
1922 tmpreg
=1+opP
->reg
-COPNUM
;
1925 install_operand(s
[1],tmpreg
);
1928 case 'J': /* JF foo */
1957 install_operand(s
[1],tmpreg
);
1961 tmpreg
=get_num(opP
->con1
,55);
1962 install_operand(s
[1],tmpreg
&0x7f);
1968 if(tmpreg
&0x7FF0000)
1969 as_bad("Floating point register in register list");
1970 insop(reverse_16_bits(tmpreg
));
1972 if(tmpreg
&0x700FFFF)
1973 as_bad("Wrong register in floating-point reglist");
1974 install_operand(s
[1],reverse_8_bits(tmpreg
>>16));
1981 if(tmpreg
&0x7FF0000)
1982 as_bad("Floating point register in register list");
1984 } else if(s
[1]=='8') {
1985 if(tmpreg
&0x0FFFFFF)
1986 as_bad("incorrect register in reglist");
1987 install_operand(s
[1],tmpreg
>>24);
1989 if(tmpreg
&0x700FFFF)
1990 as_bad("wrong register in floating-point reglist");
1992 install_operand(s
[1],tmpreg
>>16);
1997 install_operand(s
[1],get_num(opP
->con1
,60));
2001 tmpreg
= (opP
->mode
==DREG
)
2002 ? 0x20+opP
->reg
-DATA
2003 : (get_num(opP
->con1
,40)&0x1F);
2004 install_operand(s
[1],tmpreg
);
2008 tmpreg
=get_num(opP
->con1
,10);
2011 install_operand(s
[1],tmpreg
);
2015 /* This depends on the fact that ADDR registers are
2016 eight more than their corresponding DATA regs, so
2017 the result will have the ADDR_REG bit set */
2018 install_operand(s
[1],opP
->reg
-DATA
);
2022 if(opP
->reg
==FPI
) tmpreg
=0x1;
2023 else if(opP
->reg
==FPS
) tmpreg
=0x2;
2024 else if(opP
->reg
==FPC
) tmpreg
=0x4;
2026 install_operand(s
[1],tmpreg
);
2029 case 'S': /* Ignore it */
2033 install_operand(s
[1],get_num(opP
->con1
,30));
2036 case 'U': /* Ignore it */
2040 /* JF: These are out of order, I fear. */
2052 install_operand(s
[1],tmpreg
);
2075 install_operand(s
[1],tmpreg
);
2079 if (opP
->reg
== VAL
)
2098 install_operand(s
[1],tmpreg
);
2103 case BAD
: case BAD
+1: case BAD
+2: case BAD
+3:
2104 case BAD
+4: case BAD
+5: case BAD
+6: case BAD
+7:
2105 tmpreg
= (4 << 10) | ((opP
->reg
- BAD
) << 2);
2108 case BAC
: case BAC
+1: case BAC
+2: case BAC
+3:
2109 case BAC
+4: case BAC
+5: case BAC
+6: case BAC
+7:
2110 tmpreg
= (5 << 10) | ((opP
->reg
- BAC
) << 2);
2116 install_operand(s
[1], tmpreg
);
2119 if (opP
->reg
== PSR
)
2124 if (opP
->reg
== PCSR
)
2129 as_fatal("Internal error: Operand type %c unknown in line %s of file \"%s\"", s
[0], __LINE__
, __FILE__
);
2132 /* By the time whe get here (FINALLY) the_ins contains the complete
2133 instruction, ready to be emitted. . . */
2136 static int get_regs(i
,str
,opP
)
2138 struct m68k_op
*opP
;
2141 /* 26, 25, 24, 23-16, 15-8, 0-7 */
2142 /* Low order 24 bits encoded fpc,fps,fpi,fp7-fp0,a7-a0,d7-d0 */
2143 unsigned long cur_regs
= 0;
2147 #define ADD_REG(x) { if(x==FPI) cur_regs|=(1<<24);\
2148 else if(x==FPS) cur_regs|=(1<<25);\
2149 else if(x==FPC) cur_regs|=(1<<26);\
2150 else cur_regs|=(1<<(x-1)); }
2157 } else if(*str
=='-') {
2159 reg2
=m68k_reg_parse(&str
);
2160 if(reg2
<DATA
|| reg2
>=FPREG
+8 || reg1
==FPI
|| reg1
==FPS
|| reg1
==FPC
) {
2161 opP
->error
="unknown register in register list";
2170 } else if(*str
=='\0') {
2174 opP
->error
="unknow character in register list";
2177 /* DJA -- Bug Fix. Did't handle d1-d2/a1 until the following instruction was added */
2180 reg1
=m68k_reg_parse(&str
);
2181 if((reg1
<DATA
|| reg1
>=FPREG
+8) && !(reg1
==FPI
|| reg1
==FPS
|| reg1
==FPC
)) {
2182 opP
->error
="unknown register in register list";
2190 static int reverse_16_bits(in
)
2196 static int mask
[16] = {
2197 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2198 0x0100,0x0200,0x0400,0x0800,0x1000,0x2000,0x4000,0x8000
2205 } /* reverse_16_bits() */
2207 static int reverse_8_bits(in
)
2213 static int mask
[8] = {
2214 0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
2222 } /* reverse_8_bits() */
2224 static void install_operand(mode
,val
)
2230 the_ins
.opcode
[0]|=val
& 0xFF; /* JF FF is for M kludge */
2233 the_ins
.opcode
[0]|=val
<<9;
2236 the_ins
.opcode
[1]|=val
<<12;
2239 the_ins
.opcode
[1]|=val
<<6;
2242 the_ins
.opcode
[1]|=val
;
2245 the_ins
.opcode
[2]|=val
<<12;
2248 the_ins
.opcode
[2]|=val
<<6;
2251 /* DANGER! This is a hack to force cas2l and cas2w cmds
2252 to be three words long! */
2254 the_ins
.opcode
[2]|=val
;
2257 the_ins
.opcode
[1]|=val
<<7;
2260 the_ins
.opcode
[1]|=val
<<10;
2264 the_ins
.opcode
[1]|=val
<<5;
2269 the_ins
.opcode
[1]|=(val
<<10)|(val
<<7);
2272 the_ins
.opcode
[1]|=(val
<<12)|val
;
2275 the_ins
.opcode
[0]|=val
=0xff;
2278 the_ins
.opcode
[0]|=val
<<9;
2281 the_ins
.opcode
[1]|=val
;
2284 the_ins
.opcode
[1]|=val
;
2285 the_ins
.numo
++; /* What a hack */
2288 the_ins
.opcode
[1]|=val
<<4;
2298 } /* install_operand() */
2300 static void install_gen_operand(mode
,val
)
2306 the_ins
.opcode
[0]|=val
;
2309 /* This is a kludge!!! */
2310 the_ins
.opcode
[0]|=(val
&0x07)<<9|(val
&0x38)<<3;
2319 the_ins
.opcode
[0]|=val
;
2321 /* more stuff goes here */
2325 } /* install_gen_operand() */
2327 static char *crack_operand(str
,opP
)
2329 register struct m68k_op
*opP
;
2331 register int parens
;
2333 register char *beg_str
;
2339 for(parens
=0;*str
&& (parens
>0 || notend(str
));str
++) {
2340 if(*str
=='(') parens
++;
2341 else if(*str
==')') {
2342 if(!parens
) { /* ERROR */
2343 opP
->error
="Extra )";
2349 if(!*str
&& parens
) { /* ERROR */
2350 opP
->error
="Missing )";
2355 if(m68k_ip_op(beg_str
,opP
)==FAIL
) {
2361 c
= *++str
; /* JF bitfield hack */
2365 as_bad("Missing operand");
2370 /* See the comment up above where the #define notend(... is */
2375 if(*s
==',') return 0;
2376 if(*s
=='{' || *s
=='}')
2378 if(*s
!=':') return 1;
2379 /* This kludge here is for the division cmd, which is a kludge */
2380 if(index("aAdD#",s
[1])) return 0;
2385 /* This is the guts of the machine-dependent assembler. STR points to a
2386 machine dependent instruction. This funciton is supposed to emit
2387 the frags/bytes it assembles to.
2398 int shorts_this_frag
;
2400 bzero((char *)(&the_ins
),sizeof(the_ins
)); /* JF for paranoia sake */
2404 for(n
=the_ins
.numargs
;n
;--n
)
2405 if(the_ins
.operands
[n
].error
) {
2406 er
=the_ins
.operands
[n
].error
;
2411 as_bad("\"%s\" -- Statement '%s' ignored",er
,str
);
2415 if(the_ins
.nfrag
==0) { /* No frag hacking involved; just put it out */
2416 toP
=frag_more(2*the_ins
.numo
);
2417 fromP
= &the_ins
.opcode
[0];
2418 for(m
=the_ins
.numo
;m
;--m
) {
2419 md_number_to_chars(toP
,(long)(*fromP
),2);
2423 /* put out symbol-dependent info */
2424 for(m
=0;m
<the_ins
.nrel
;m
++) {
2425 switch(the_ins
.reloc
[m
].wid
) {
2442 as_fatal("Don't know how to figure width of %c in md_assemble()",the_ins
.reloc
[m
].wid
);
2446 (toP
-frag_now
->fr_literal
)-the_ins
.numo
*2+the_ins
.reloc
[m
].n
,
2448 the_ins
.reloc
[m
].add
,
2449 the_ins
.reloc
[m
].sub
,
2450 the_ins
.reloc
[m
].off
,
2451 the_ins
.reloc
[m
].pcrel
,
2457 /* There's some frag hacking */
2458 for(n
=0,fromP
= &the_ins
.opcode
[0];n
<the_ins
.nfrag
;n
++) {
2461 if(n
==0) wid
=2*the_ins
.fragb
[n
].fragoff
;
2462 else wid
=2*(the_ins
.numo
-the_ins
.fragb
[n
-1].fragoff
);
2466 for(m
=wid
/2;m
;--m
) {
2467 md_number_to_chars(toP
,(long)(*fromP
),2);
2472 for(m
=0;m
<the_ins
.nrel
;m
++) {
2473 if((the_ins
.reloc
[m
].n
)>= 2*shorts_this_frag
/* 2*the_ins.fragb[n].fragoff */) {
2474 the_ins
.reloc
[m
].n
-= 2*shorts_this_frag
/* 2*the_ins.fragb[n].fragoff */;
2477 wid
=the_ins
.reloc
[m
].wid
;
2480 the_ins
.reloc
[m
].wid
=0;
2481 wid
= (wid
=='b') ? 1 : (wid
=='w') ? 2 : (wid
=='l') ? 4 : 4000;
2484 (toP
-frag_now
->fr_literal
)-the_ins
.numo
*2+the_ins
.reloc
[m
].n
,
2486 the_ins
.reloc
[m
].add
,
2487 the_ins
.reloc
[m
].sub
,
2488 the_ins
.reloc
[m
].off
,
2489 the_ins
.reloc
[m
].pcrel
,
2492 know(the_ins
.fragb
[n
].fadd
);
2493 (void)frag_var(rs_machine_dependent
,10,0,(relax_substateT
)(the_ins
.fragb
[n
].fragty
),
2494 the_ins
.fragb
[n
].fadd
,the_ins
.fragb
[n
].foff
,to_beg_P
);
2496 n
=(the_ins
.numo
-the_ins
.fragb
[n
-1].fragoff
);
2499 toP
=frag_more(n
*sizeof(short));
2501 md_number_to_chars(toP
,(long)(*fromP
),2);
2507 for(m
=0;m
<the_ins
.nrel
;m
++) {
2510 wid
=the_ins
.reloc
[m
].wid
;
2513 the_ins
.reloc
[m
].wid
=0;
2514 wid
= (wid
=='b') ? 1 : (wid
=='w') ? 2 : (wid
=='l') ? 4 : 4000;
2517 (the_ins
.reloc
[m
].n
+ toP
-frag_now
->fr_literal
)-/* the_ins.numo */ shorts_this_frag
*2,
2519 the_ins
.reloc
[m
].add
,
2520 the_ins
.reloc
[m
].sub
,
2521 the_ins
.reloc
[m
].off
,
2522 the_ins
.reloc
[m
].pcrel
,
2527 /* This function is called once, at assembler startup time. This should
2528 set up all the tables, etc that the MD part of the assembler needs
2534 * md_begin -- set up hash tables with 68000 instructions.
2535 * similar to what the vax assembler does. ---phr
2537 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
2538 a copy of it at runtime, adding in the information we want but isn't
2539 there. I think it'd be better to have an awk script hack the table
2540 at compile time. Or even just xstr the table and use it as-is. But
2541 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
2544 register const struct m68k_opcode
*ins
;
2545 register struct m68_incant
*hack
,
2547 register char *retval
= 0; /* empty string, or error msg text */
2548 register unsigned int i
;
2551 if ((op_hash
= hash_new()) == NULL
)
2552 as_fatal("Virtual memory exhausted");
2554 obstack_begin(&robyn
,4000);
2555 for (ins
= m68k_opcodes
; ins
< endop
; ins
++) {
2556 hack
=slak
=(struct m68_incant
*)obstack_alloc(&robyn
,sizeof(struct m68_incant
));
2558 slak
->m_operands
=ins
->args
;
2559 slak
->m_opnum
=strlen(slak
->m_operands
)/2;
2560 slak
->m_opcode
=ins
->opcode
;
2561 /* This is kludgey */
2562 slak
->m_codenum
=((ins
->match
)&0xffffL
) ? 2 : 1;
2563 if((ins
+1)!=endop
&& !strcmp(ins
->name
,(ins
+1)->name
)) {
2564 slak
->m_next
=(struct m68_incant
*)
2565 obstack_alloc(&robyn
,sizeof(struct m68_incant
));
2572 retval
= hash_insert (op_hash
, ins
->name
,(char *)hack
);
2573 /* Didn't his mommy tell him about null pointers? */
2574 if(retval
&& *retval
)
2575 as_fatal("Internal Error: Can't hash %s: %s",ins
->name
,retval
);
2578 for (i
= 0; i
< sizeof(mklower_table
) ; i
++)
2579 mklower_table
[i
] = (isupper(c
= (char) i
)) ? tolower(c
) : c
;
2581 for (i
= 0 ; i
< sizeof(notend_table
) ; i
++) {
2582 notend_table
[i
] = 0;
2583 alt_notend_table
[i
] = 0;
2585 notend_table
[','] = 1;
2586 notend_table
['{'] = 1;
2587 notend_table
['}'] = 1;
2588 alt_notend_table
['a'] = 1;
2589 alt_notend_table
['A'] = 1;
2590 alt_notend_table
['d'] = 1;
2591 alt_notend_table
['D'] = 1;
2592 alt_notend_table
['#'] = 1;
2593 alt_notend_table
['f'] = 1;
2594 alt_notend_table
['F'] = 1;
2595 #ifdef REGISTER_PREFIX
2596 alt_notend_table
[REGISTER_PREFIX
] = 1;
2601 #define notend(s) ((*s == ',' || *s == '}' || *s == '{' \
2602 || (*s == ':' && strchr("aAdD#", s[1]))) \
2606 /* This funciton is called once, before the assembler exits. It is
2607 supposed to do any final cleanup for this part of the assembler.
2614 /* Equal to MAX_PRECISION in atof-ieee.c */
2615 #define MAX_LITTLENUMS 6
2617 /* Turn a string in input_line_pointer into a floating point constant of type
2618 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
2619 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
2622 md_atof(type
,litP
,sizeP
)
2628 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2629 LITTLENUM_TYPE
*wordP
;
2660 return "Bad call to MD_ATOF()";
2662 t
=atof_ieee(input_line_pointer
,type
,words
);
2664 input_line_pointer
=t
;
2666 *sizeP
=prec
* sizeof(LITTLENUM_TYPE
);
2667 for(wordP
=words
;prec
--;) {
2668 md_number_to_chars(litP
,(long)(*wordP
++),sizeof(LITTLENUM_TYPE
));
2669 litP
+=sizeof(LITTLENUM_TYPE
);
2671 return ""; /* Someone should teach Dean about null pointers */
2674 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
2675 for use in the a.out file, and stores them in the array pointed to by buf.
2676 This knows about the endian-ness of the target machine and does
2677 THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
2678 2 (short) and 4 (long) Floating numbers are put out as a series of
2679 LITTLENUMS (shorts, here at least)
2682 md_number_to_chars(buf
,val
,n
)
2707 md_apply_fix(fixP
, val
)
2711 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2713 switch(fixP
->fx_size
) {
2728 BAD_CASE (fixP
->fx_size
);
2733 /* *fragP has been relaxed to its final size, and now needs to have
2734 the bytes inside it modified to conform to the new size There is UGLY
2738 md_convert_frag(headers
, fragP
)
2739 object_headers
*headers
;
2740 register fragS
*fragP
;
2745 /* Address in object code of the displacement. */
2746 register int object_address
= fragP
-> fr_fix
+ fragP
-> fr_address
;
2748 #ifdef IBM_COMPILER_SUX
2749 /* This is wrong but it convinces the native rs6000 compiler to
2750 generate the code we want. */
2751 register char *buffer_address
= fragP
-> fr_literal
;
2752 buffer_address
+= fragP
-> fr_fix
;
2753 #else /* IBM_COMPILER_SUX */
2754 /* Address in gas core of the place to store the displacement. */
2755 register char *buffer_address
= fragP
->fr_fix
+ fragP
->fr_literal
;
2756 #endif /* IBM_COMPILER_SUX */
2758 /* No longer true: know(fragP->fr_symbol); */
2760 /* The displacement of the address, from current location. */
2761 disp
= fragP
->fr_symbol
? S_GET_VALUE(fragP
->fr_symbol
) : 0;
2762 disp
= (disp
+ fragP
->fr_offset
) - object_address
;
2764 switch(fragP
->fr_subtype
) {
2765 case TAB(BCC68000
,BYTE
):
2766 case TAB(BRANCH
,BYTE
):
2767 know(issbyte(disp
));
2769 as_bad("short branch with zero offset: use :w");
2770 fragP
->fr_opcode
[1]=disp
;
2773 case TAB(DBCC
,SHORT
):
2774 know(issword(disp
));
2777 case TAB(BCC68000
,SHORT
):
2778 case TAB(BRANCH
,SHORT
):
2779 know(issword(disp
));
2780 fragP
->fr_opcode
[1]=0x00;
2783 case TAB(BRANCH
,LONG
):
2784 if (flagseen
['m']) {
2785 if (fragP
->fr_opcode
[0]==0x61) {
2786 fragP
->fr_opcode
[0]= 0x4E;
2787 fragP
->fr_opcode
[1]= 0xB9; /* JBSR with ABSL LONG offset */
2788 subseg_change(SEG_TEXT
, 0);
2801 } else if (fragP
->fr_opcode
[0]==0x60) {
2802 fragP
->fr_opcode
[0]= 0x4E;
2803 fragP
->fr_opcode
[1]= 0xF9; /* JMP with ABSL LONG offset */
2804 subseg_change(SEG_TEXT
, 0);
2805 fix_new(fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, 0, fragP
->fr_offset
,0,
2810 as_bad("Long branch offset not supported.");
2813 fragP
->fr_opcode
[1]=0xff;
2817 case TAB(BCC68000
,LONG
):
2818 /* only Bcc 68000 instructions can come here */
2819 /* change bcc into b!cc/jmp absl long */
2820 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
2821 fragP
->fr_opcode
[1] = 0x6; /* branch offset = 6 */
2823 /* JF: these used to be fr_opcode[2,3], but they may be in a
2824 different frag, in which case refering to them is a no-no.
2825 Only fr_opcode[0,1] are guaranteed to work. */
2826 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
2827 *buffer_address
++ = 0xf9;
2828 fragP
->fr_fix
+= 2; /* account for jmp instruction */
2829 subseg_change(SEG_TEXT
,0);
2830 fix_new(fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, 0,
2836 case TAB(DBCC
,LONG
):
2837 /* only DBcc 68000 instructions can come here */
2838 /* change dbcc into dbcc/jmp absl long */
2839 /* JF: these used to be fr_opcode[2-7], but that's wrong */
2840 *buffer_address
++ = 0x00; /* branch offset = 4 */
2841 *buffer_address
++ = 0x04;
2842 *buffer_address
++ = 0x60; /* put in bra pc+6 */
2843 *buffer_address
++ = 0x06;
2844 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
2845 *buffer_address
++ = 0xf9;
2847 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
2848 subseg_change(SEG_TEXT
,0);
2849 fix_new(fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, 0,
2855 case TAB(FBRANCH
,SHORT
):
2856 know((fragP
->fr_opcode
[1]&0x40)==0);
2859 case TAB(FBRANCH
,LONG
):
2860 fragP
->fr_opcode
[1]|=0x40; /* Turn on LONG bit */
2863 case TAB(PCREL
,SHORT
):
2866 case TAB(PCREL
,LONG
):
2867 /* The thing to do here is force it to ABSOLUTE LONG, since
2868 PCREL is really trying to shorten an ABSOLUTE address anyway */
2869 /* JF FOO This code has not been tested */
2870 subseg_change(SEG_TEXT
,0);
2871 fix_new(fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, 0, fragP
->fr_offset
, 0, NO_RELOC
);
2872 if((fragP
->fr_opcode
[1] & 0x3F) != 0x3A)
2873 as_bad("Internal error (long PC-relative operand) for insn 0x%04lx at 0x%lx",
2874 fragP
->fr_opcode
[0],fragP
->fr_address
);
2875 fragP
->fr_opcode
[1]&= ~0x3F;
2876 fragP
->fr_opcode
[1]|=0x39; /* Mode 7.1 */
2878 /* md_number_to_chars(buffer_address,
2879 (long)(fragP->fr_symbol->sy_value + fragP->fr_offset),
2883 case TAB(PCLEA
,SHORT
):
2884 subseg_change(SEG_TEXT
,0);
2885 fix_new(fragP
,(int)(fragP
->fr_fix
),2,fragP
->fr_symbol
,(symbolS
*)0,fragP
->fr_offset
,1,
2887 fragP
->fr_opcode
[1] &= ~0x3F;
2888 fragP
->fr_opcode
[1] |= 0x3A;
2891 case TAB(PCLEA
,LONG
):
2892 subseg_change(SEG_TEXT
,0);
2893 fix_new(fragP
,(int)(fragP
->fr_fix
)+2,4,fragP
->fr_symbol
,(symbolS
*)0,fragP
->fr_offset
+2,1,
2895 *buffer_address
++ = 0x01;
2896 *buffer_address
++ = 0x70;
2898 /* buffer_address+=2; */
2902 } /* switch on subtype */
2905 md_number_to_chars(buffer_address
, (long) disp
, (int) ext
);
2906 fragP
->fr_fix
+= ext
;
2907 /* H_SET_TEXT_SIZE(headers, H_GET_TEXT_SIZE(headers) + ext); */
2908 } /* if extending */
2911 } /* md_convert_frag() */
2913 /* Force truly undefined symbols to their maximum size, and generally set up
2914 the frag list to be relaxed
2916 int md_estimate_size_before_relax(fragP
, segment
)
2917 register fragS
*fragP
;
2921 register char *buffer_address
= fragP
->fr_fix
+ fragP
->fr_literal
;
2923 old_fix
= fragP
->fr_fix
;
2925 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
2926 switch(fragP
->fr_subtype
) {
2928 case TAB(BCC68000
,SZ_UNDEF
): {
2929 if((fragP
->fr_symbol
!= NULL
)
2930 && S_GET_SEGMENT(fragP
->fr_symbol
) == segment
) {
2931 fragP
->fr_subtype
=TAB(BCC68000
,BYTE
);
2934 /* only Bcc 68000 instructions can come here */
2935 /* change bcc into b!cc/jmp absl long */
2936 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
2938 fragP
->fr_opcode
[1] = 0x04; /* branch offset = 6 */
2939 /* JF: these were fr_opcode[2,3] */
2940 buffer_address
[0] = 0x4e; /* put in jmp long (0x4ef9) */
2941 buffer_address
[1] = 0xf8;
2942 fragP
->fr_fix
+= 2; /* account for jmp instruction */
2943 subseg_change(SEG_TEXT
,0);
2944 fix_new(fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, 0,
2945 fragP
->fr_offset
, 0, NO_RELOC
);
2948 fragP
->fr_opcode
[1] = 0x06; /* branch offset = 6 */
2949 /* JF: these were fr_opcode[2,3] */
2950 buffer_address
[2] = 0x4e; /* put in jmp long (0x4ef9) */
2951 buffer_address
[3] = 0xf9;
2952 fragP
->fr_fix
+= 2; /* account for jmp instruction */
2953 subseg_change(SEG_TEXT
,0);
2954 fix_new(fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, 0,
2955 fragP
->fr_offset
, 0, NO_RELOC
);
2960 } /* case TAB(BCC68000,SZ_UNDEF) */
2962 case TAB(DBCC
,SZ_UNDEF
): {
2963 if (fragP
->fr_symbol
!= NULL
&& S_GET_SEGMENT(fragP
->fr_symbol
) == segment
) {
2964 fragP
->fr_subtype
=TAB(DBCC
,SHORT
);
2968 /* only DBcc 68000 instructions can come here */
2969 /* change dbcc into dbcc/jmp absl long */
2970 /* JF: these used to be fr_opcode[2-4], which is wrong. */
2971 buffer_address
[0] = 0x00; /* branch offset = 4 */
2972 buffer_address
[1] = 0x04;
2973 buffer_address
[2] = 0x60; /* put in bra pc + ... */
2976 /* JF: these were fr_opcode[5-7] */
2977 buffer_address
[3] = 0x04; /* plus 4 */
2978 buffer_address
[4] = 0x4e;/* Put in Jump Word */
2979 buffer_address
[5] = 0xf8;
2980 fragP
->fr_fix
+= 6; /* account for bra/jmp instruction */
2981 subseg_change(SEG_TEXT
,0);
2982 fix_new(fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, 0,
2983 fragP
->fr_offset
, 0, NO_RELOC
);
2986 /* JF: these were fr_opcode[5-7] */
2987 buffer_address
[3] = 0x06; /* Plus 6 */
2988 buffer_address
[4] = 0x4e; /* put in jmp long (0x4ef9) */
2989 buffer_address
[5] = 0xf9;
2990 fragP
->fr_fix
+= 6; /* account for bra/jmp instruction */
2991 subseg_change(SEG_TEXT
,0);
2992 fix_new(fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, 0,
2993 fragP
->fr_offset
, 0, NO_RELOC
);
2999 } /* case TAB(DBCC,SZ_UNDEF) */
3001 case TAB(BRANCH
,SZ_UNDEF
): {
3002 if((fragP
->fr_symbol
!= NULL
) /* Not absolute */
3003 && S_GET_SEGMENT(fragP
->fr_symbol
) == segment
) {
3004 fragP
->fr_subtype
=TAB(TABTYPE(fragP
->fr_subtype
),BYTE
);
3006 } else if((fragP
->fr_symbol
== 0) || flagseen
['m']) {
3007 /* On 68000, or for absolute value, switch to abs long */
3008 /* FIXME, we should check abs val, pick short or long */
3009 if(fragP
->fr_opcode
[0]==0x61) {
3010 fragP
->fr_opcode
[0]= 0x4E;
3011 fragP
->fr_opcode
[1]= 0xB9; /* JBSR with ABSL LONG offset */
3012 subseg_change(SEG_TEXT
, 0);
3013 fix_new(fragP
, fragP
->fr_fix
, 4,
3014 fragP
->fr_symbol
, 0, fragP
->fr_offset
, 0, NO_RELOC
);
3017 } else if(fragP
->fr_opcode
[0]==0x60) {
3018 fragP
->fr_opcode
[0]= 0x4E;
3019 fragP
->fr_opcode
[1]= 0xF9; /* JMP with ABSL LONG offset */
3020 subseg_change(SEG_TEXT
, 0);
3021 fix_new(fragP
, fragP
->fr_fix
, 4,
3022 fragP
->fr_symbol
, 0, fragP
->fr_offset
, 0, NO_RELOC
);
3026 as_warn("Long branch offset to extern symbol not supported.");
3028 } else { /* Symbol is still undefined. Make it simple */
3029 fix_new(fragP
, (int)(fragP
->fr_fix
), 4, fragP
->fr_symbol
,
3030 (symbolS
*)0, fragP
->fr_offset
+4, 1, NO_RELOC
);
3032 fragP
->fr_opcode
[1]=0xff;
3038 } /* case TAB(BRANCH,SZ_UNDEF) */
3040 case TAB(PCLEA
,SZ_UNDEF
): {
3041 if ((S_GET_SEGMENT(fragP
->fr_symbol
))==segment
|| flagseen
['l']) {
3042 fragP
->fr_subtype
=TAB(PCLEA
,SHORT
);
3045 fragP
->fr_subtype
=TAB(PCLEA
,LONG
);
3049 } /* TAB(PCLEA,SZ_UNDEF) */
3051 case TAB(PCREL
,SZ_UNDEF
): {
3052 if(S_GET_SEGMENT(fragP
->fr_symbol
) == segment
|| flagseen
['l']) {
3053 fragP
->fr_subtype
= TAB(PCREL
,SHORT
);
3056 fragP
->fr_subtype
= TAB(PCREL
,LONG
);
3060 } /* TAB(PCREL,SZ_UNDEF) */
3065 } /* switch on subtype looking for SZ_UNDEF's. */
3067 /* now that SZ_UNDEF are taken care of, check others */
3068 switch(fragP
->fr_subtype
) {
3069 case TAB(BCC68000
,BYTE
):
3070 case TAB(BRANCH
,BYTE
):
3071 /* We can't do a short jump to the next instruction,
3072 so we force word mode. */
3073 if (fragP
->fr_symbol
&& S_GET_VALUE(fragP
->fr_symbol
)==0 &&
3074 fragP
->fr_symbol
->sy_frag
==fragP
->fr_next
) {
3075 fragP
->fr_subtype
=TAB(TABTYPE(fragP
->fr_subtype
),SHORT
);
3082 return fragP
->fr_var
+ fragP
->fr_fix
- old_fix
;
3085 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3086 /* the bit-field entries in the relocation_info struct plays hell
3087 with the byte-order problems of cross-assembly. So as a hack,
3088 I added this mach. dependent ri twiddler. Ugly, but it gets
3090 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
3091 are symbolnum, most sig. byte first. Last byte is broken up with
3092 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3093 nibble as nuthin. (on Sun 3 at least) */
3094 /* Translate the internal relocation information into target-specific
3098 md_ri_to_chars(the_bytes
, ri
)
3100 struct reloc_info_generic
*ri
;
3103 md_number_to_chars(the_bytes
, ri
->r_address
, 4);
3104 /* now the fun stuff */
3105 the_bytes
[4] = (ri
->r_symbolnum
>> 16) & 0x0ff;
3106 the_bytes
[5] = (ri
->r_symbolnum
>> 8) & 0x0ff;
3107 the_bytes
[6] = ri
->r_symbolnum
& 0x0ff;
3108 the_bytes
[7] = (((ri
->r_pcrel
<< 7) & 0x80) | ((ri
->r_length
<< 5) & 0x60) |
3109 ((ri
->r_extern
<< 4) & 0x10));
3111 #endif /* comment */
3113 void tc_aout_fix_to_chars(where
, fixP
, segment_address_in_file
)
3116 relax_addressT segment_address_in_file
;
3119 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3120 * Out: GNU LD relocation length code: 0, 1, or 2.
3123 static unsigned char nbytes_r_length
[] = { 42, 0, 1, 42, 2 };
3129 md_number_to_chars(where
,
3130 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
3133 /* now the fun stuff */
3134 if (S_GET_TYPE(fixP
->fx_addsy
) == N_UNDF
) {
3136 r_symbolnum
= fixP
->fx_addsy
->sy_number
;
3139 r_symbolnum
= S_GET_TYPE(fixP
->fx_addsy
);
3142 where
[4] = (r_symbolnum
>> 16) & 0x0ff;
3143 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3144 where
[6] = r_symbolnum
& 0x0ff;
3145 where
[7] = (((fixP
->fx_pcrel
<< 7) & 0x80) | ((nbytes_r_length
[fixP
->fx_size
] << 5) & 0x60) |
3146 ((r_extern
<< 4) & 0x10));
3149 } /* tc_aout_fix_to_chars() */
3151 #endif /* OBJ_AOUT or OBJ_BOUT */
3153 #ifndef WORKING_DOT_WORD
3154 const int md_short_jump_size
= 4;
3155 const int md_long_jump_size
= 6;
3158 md_create_short_jump(ptr
,from_addr
,to_addr
,frag
,to_symbol
)
3167 offset
= to_addr
- (from_addr
+2);
3169 md_number_to_chars(ptr
,(long)0x6000,2);
3170 md_number_to_chars(ptr
+2,(long)offset
,2);
3174 md_create_long_jump(ptr
,from_addr
,to_addr
,frag
,to_symbol
)
3183 if (flagseen
['m']) {
3184 offset
=to_addr
-S_GET_VALUE(to_symbol
);
3185 md_number_to_chars(ptr
,(long)0x4EF9,2);
3186 md_number_to_chars(ptr
+2,(long)offset
,4);
3187 fix_new(frag
,(ptr
+2)-frag
->fr_literal
,4,to_symbol
,(symbolS
*)0,(long)0,0,
3190 offset
=to_addr
- (from_addr
+2);
3191 md_number_to_chars(ptr
,(long)0x60ff,2);
3192 md_number_to_chars(ptr
+2,(long)offset
,4);
3197 /* Different values of OK tell what its OK to return. Things that aren't OK are an error (what a shock, no?)
3200 10: Absolute 1:8 only
3201 20: Absolute 0:7 only
3202 30: absolute 0:15 only
3203 40: Absolute 0:31 only
3204 50: absolute 0:127 only
3205 55: absolute -64:63 only
3206 60: absolute -128:127 only
3207 70: absolute 0:4095 only
3212 static int get_num(exp
,ok
)
3213 struct m68k_exp
*exp
;
3221 if(*exp
->e_beg
=='0') {
3222 if(exp
->e_beg
[1]=='x')
3223 sscanf(exp
->e_beg
+2,"%x",&l
);
3225 sscanf(exp
->e_beg
+1,"%O",&l
);
3228 return atol(exp
->e_beg
);
3234 /* Can't do anything */
3237 if(!exp
->e_beg
|| !exp
->e_end
) {
3238 seg(exp
)=SEG_ABSOLUTE
;
3241 offs(exp
)= (ok
==10) ? 1 : 0;
3242 as_warn("Null expression defaults to %ld",offs(exp
));
3247 if(/* ok!=80 && */exp
->e_end
[-1]==':' && (exp
->e_end
-exp
->e_beg
)>=2) {
3248 switch(exp
->e_end
[0]) {
3264 as_bad("Unknown size for expression \"%c\"",exp
->e_end
[0]);
3268 c_save
=exp
->e_end
[1];
3270 save_in
=input_line_pointer
;
3271 input_line_pointer
=exp
->e_beg
;
3272 switch(expression(&(exp
->e_exp
))) {
3274 seg(exp
)=SEG_ABSOLUTE
;
3277 offs(exp
)= (ok
==10) ? 1 : 0;
3278 as_warn("Unknown expression: '%s' defaulting to %d",exp
->e_beg
,offs(exp
));
3282 /* Do the same thing the VAX asm does */
3283 seg(exp
)=SEG_ABSOLUTE
;
3288 as_warn("expression out of range: defaulting to 1");
3295 if(offs(exp
)<1 || offs(exp
)>8) {
3296 as_warn("expression out of range: defaulting to 1");
3301 if(offs(exp
)<0 || offs(exp
)>7)
3305 if(offs(exp
)<0 || offs(exp
)>15)
3309 if(offs(exp
)<0 || offs(exp
)>32)
3313 if(offs(exp
)<0 || offs(exp
)>127)
3317 if(offs(exp
)<-64 || offs(exp
)>63)
3321 if(offs(exp
)<-128 || offs(exp
)>127)
3325 if(offs(exp
)<0 || offs(exp
)>4095) {
3327 as_warn("expression out of range: defaulting to 0");
3339 case SEG_DIFFERENCE
:
3340 if(ok
>=10 && ok
<=70) {
3341 seg(exp
)=SEG_ABSOLUTE
;
3344 offs(exp
)= (ok
==10) ? 1 : 0;
3345 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp
->e_beg
,offs(exp
));
3349 if(ok
==80 && offs(exp
)<0) { /* HACK! Turn it into a long */
3350 LITTLENUM_TYPE words
[6];
3352 gen_to_words(words
,2,8L);/* These numbers are magic! */
3353 seg(exp
)=SEG_ABSOLUTE
;
3356 offs(exp
)=words
[1]|(words
[0]<<16);
3358 seg(exp
)=SEG_ABSOLUTE
;
3361 offs(exp
)= (ok
==10) ? 1 : 0;
3362 as_warn("Can't deal with expression \"%s\": defaulting to %ld",exp
->e_beg
,offs(exp
));
3368 if(input_line_pointer
!=exp
->e_end
+1)
3369 as_bad("Ignoring junk after expression");
3370 exp
->e_end
[1]=c_save
;
3371 input_line_pointer
=save_in
;
3373 switch(exp
->e_siz
) {
3375 if(!isbyte(offs(exp
)))
3376 as_warn("expression doesn't fit in BYTE");
3379 if(!isword(offs(exp
)))
3380 as_warn("expression doesn't fit in WORD");
3388 /* These are the back-ends for the various machine dependent pseudo-ops. */
3389 void demand_empty_rest_of_line(); /* Hate those extra verbose names */
3391 static void s_data1() {
3392 subseg_new(SEG_DATA
,1);
3393 demand_empty_rest_of_line();
3396 static void s_data2() {
3397 subseg_new(SEG_DATA
,2);
3398 demand_empty_rest_of_line();
3401 static void s_bss() {
3402 /* We don't support putting frags in the BSS segment, but we
3403 can put them into initialized data for now... */
3404 subseg_new(SEG_DATA
,255); /* FIXME-SOON */
3405 demand_empty_rest_of_line();
3408 static void s_even() {
3410 register long temp_fill
;
3412 temp
= 1; /* JF should be 2? */
3413 temp_fill
= get_absolute_expression ();
3414 if ( ! need_pass_2
) /* Never make frag if expect extra pass. */
3415 frag_align (temp
, (int)temp_fill
);
3416 demand_empty_rest_of_line();
3419 static void s_proc() {
3420 demand_empty_rest_of_line();
3423 /* s_space is defined in read.c .skip is simply an alias to it. */
3426 md_parse_option(argP
,cntP
,vecP
)
3432 case 'l': /* -l means keep external to 2 bit offset
3433 rather than 16 bit one */
3436 case 'S': /* -S means that jbsr's always turn into jsr's. */
3440 /* Gas almost ignores this option! */
3444 if(!strcmp(*argP
,"68000"))
3446 else if(!strcmp(*argP
,"68010")) {
3448 omagic
= 1<<16|OMAGIC
;
3451 } else if(!strcmp(*argP
,"68020"))
3454 as_warn("Unknown -m option ignored");
3460 if (!strcmp(*argP
,"pic")) {
3462 break; /* -pic, Position Independent Code */
3475 /* TEST2: Test md_assemble() */
3476 /* Warning, this routine probably doesn't work anymore */
3480 struct m68_it the_ins
;
3487 if(!gets(buf
) || !*buf
)
3489 if(buf
[0]=='|' || buf
[1]=='.')
3491 for(cp
=buf
;*cp
;cp
++)
3496 bzero(&the_ins
,sizeof(the_ins
));
3497 m68_ip(&the_ins
,buf
);
3499 printf("Error %s in %s\n",the_ins
.error
,buf
);
3501 printf("Opcode(%d.%s): ",the_ins
.numo
,the_ins
.args
);
3502 for(n
=0;n
<the_ins
.numo
;n
++)
3503 printf(" 0x%x",the_ins
.opcode
[n
]&0xffff);
3505 print_the_insn(&the_ins
.opcode
[0],stdout
);
3506 (void)putchar('\n');
3508 for(n
=0;n
<strlen(the_ins
.args
)/2;n
++) {
3509 if(the_ins
.operands
[n
].error
) {
3510 printf("op%d Error %s in %s\n",n
,the_ins
.operands
[n
].error
,buf
);
3513 printf("mode %d, reg %d, ",the_ins
.operands
[n
].mode
,the_ins
.operands
[n
].reg
);
3514 if(the_ins
.operands
[n
].b_const
)
3515 printf("Constant: '%.*s', ",1+the_ins
.operands
[n
].e_const
-the_ins
.operands
[n
].b_const
,the_ins
.operands
[n
].b_const
);
3516 printf("ireg %d, isiz %d, imul %d, ",the_ins
.operands
[n
].ireg
,the_ins
.operands
[n
].isiz
,the_ins
.operands
[n
].imul
);
3517 if(the_ins
.operands
[n
].b_iadd
)
3518 printf("Iadd: '%.*s',",1+the_ins
.operands
[n
].e_iadd
-the_ins
.operands
[n
].b_iadd
,the_ins
.operands
[n
].b_iadd
);
3519 (void)putchar('\n');
3531 while(*str
&& *str
!=' ')
3533 if(str
[-1]==':' || str
[1]=='=')
3540 /* Possible states for relaxation:
3542 0 0 branch offset byte (bra, etc)
3546 1 0 indexed offsets byte a0@(32,d4:w:1) etc
3550 2 0 two-offset index word-word a0@(32,d4)@(45) etc
3586 extern fragS
*text_frag_root
;
3588 for(fragP
=text_frag_root
;fragP
;fragP
=fragP
->fr_next
) {
3589 printf("addr %lu next 0x%x fix %ld var %ld symbol 0x%x offset %ld\n",
3590 fragP
->fr_address
,fragP
->fr_next
,fragP
->fr_fix
,fragP
->fr_var
,fragP
->fr_symbol
,fragP
->fr_offset
);
3591 printf("opcode 0x%x type %d subtype %d\n\n",fragP
->fr_opcode
,fragP
->fr_type
,fragP
->fr_subtype
);
3603 fputs("Internal error:",stderr
);
3604 _doprnt(format
,&args
,stderr
);
3605 (void)putc('\n',stderr
);
3611 /* We have no need to default values of symbols. */
3615 md_undefined_symbol (name
)
3621 /* Parse an operand that is machine-specific.
3622 We just return without modifying the expression if we have nothing
3627 md_operand (expressionP
)
3628 expressionS
*expressionP
;
3632 /* Round up a section size to the appropriate boundary. */
3634 md_section_align (segment
, size
)
3638 return size
; /* Byte alignment is fine */
3641 /* Exactly what point is a PC-relative offset relative TO?
3642 On the 68k, they're relative to the address of the offset, plus
3643 its size. (??? Is this right? FIXME-SOON!) */
3645 md_pcrel_from (fixP
)
3648 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3651 /* Opcode table for m68000/m68020 and m68881.
3652 Copyright (C) 1989, Free Software Foundation.
3654 This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
3656 Both GDB and GAS are free software; you can redistribute and/or modify
3657 it under the terms of the GNU General Public License as published by
3658 the Free Software Foundation; either version 2, or (at your option)
3661 GDB and GAS are distributed in the hope that it will be useful,
3662 but WITHOUT ANY WARRANTY; without even the implied warranty of
3663 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3664 GNU General Public License for more details.
3666 You should have received a copy of the GNU General Public License
3667 along with GDB or GAS; see the file COPYING. If not, write to
3668 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
3670 /* We store four bytes of opcode for all opcodes because that
3671 is the most any of them need. The actual length of an instruction
3672 is always at least 2 bytes, and is as much longer as necessary to
3673 hold the operands it has.
3675 The match component is a mask saying which bits must match
3676 particular opcode in order for an instruction to be an instance
3679 The args component is a string containing two characters
3680 for each operand of the instruction. The first specifies
3681 the kind of operand; the second, the place it is stored. */
3683 /* Kinds of operands:
3684 D data register only. Stored as 3 bits.
3685 A address register only. Stored as 3 bits.
3686 R either kind of register. Stored as 4 bits.
3687 F floating point coprocessor register only. Stored as 3 bits.
3688 O an offset (or width): immediate data 0-31 or data register.
3689 Stored as 6 bits in special format for BF... insns.
3690 + autoincrement only. Stored as 3 bits (number of the address register).
3691 - autodecrement only. Stored as 3 bits (number of the address register).
3692 Q quick immediate data. Stored as 3 bits.
3693 This matches an immediate operand only when value is in range 1 .. 8.
3694 M moveq immediate data. Stored as 8 bits.
3695 This matches an immediate operand only when value is in range -128..127
3696 T trap vector immediate data. Stored as 4 bits.
3698 k K-factor for fmove.p instruction. Stored as a 7-bit constant or
3699 a three bit register offset, depending on the field type.
3701 # immediate data. Stored in special places (b, w or l)
3702 which say how many bits to store.
3703 ^ immediate data for floating point instructions. Special places
3704 are offset by 2 bytes from '#'...
3705 B pc-relative address, converted to an offset
3706 that is treated as immediate data.
3707 d displacement and register. Stores the register as 3 bits
3708 and stores the displacement in the entire second word.
3710 C the CCR. No need to store it; this is just for filtering validity.
3711 S the SR. No need to store, just as with CCR.
3712 U the USP. No need to store, just as with CCR.
3714 I Coprocessor ID. Not printed if 1. The Coprocessor ID is always
3715 extracted from the 'd' field of word one, which means that an extended
3716 coprocessor opcode can be skipped using the 'i' place, if needed.
3718 s System Control register for the floating point coprocessor.
3719 S List of system control registers for floating point coprocessor.
3721 J Misc register for movec instruction, stored in 'j' format.
3723 000 SFC Source Function Code reg
3724 001 DFC Data Function Code reg
3725 002 CACR Cache Control Register
3726 800 USP User Stack Pointer
3727 801 VBR Vector Base reg
3728 802 CAAR Cache Address Register
3729 803 MSP Master Stack Pointer
3730 804 ISP Interrupt Stack Pointer
3732 L Register list of the type d0-d7/a0-a7 etc.
3733 (New! Improved! Can also hold fp0-fp7, as well!)
3734 The assembler tries to see if the registers match the insn by
3735 looking at where the insn wants them stored.
3737 l Register list like L, but with all the bits reversed.
3738 Used for going the other way. . .
3740 They are all stored as 6 bits using an address mode and a register number;
3741 they differ in which addressing modes they match.
3743 * all (modes 0-6,7.*)
3744 ~ alterable memory (modes 2-6,7.0,7.1)(not 0,1,7.~)
3745 % alterable (modes 0-6,7.0,7.1)(not 7.~)
3746 ; data (modes 0,2-6,7.*)(not 1)
3747 @ data, but not immediate (modes 0,2-6,7.? ? ?)(not 1,7.?) This may really be ;, the 68020 book says it is
3748 ! control (modes 2,5,6,7.*-)(not 0,1,3,4,7.4)
3749 & alterable control (modes 2,5,6,7.0,7.1)(not 0,1,7.? ? ?)
3750 $ alterable data (modes 0,2-6,7.0,7.1)(not 1,7.~)
3751 ? alterable control, or data register (modes 0,2,5,6,7.0,7.1)(not 1,3,4,7.~)
3752 / control, or data register (modes 0,2,5,6,7.0,7.1,7.2,7.3)(not 1,3,4,7.4)
3755 /* JF: for the 68851 */
3757 I didn't use much imagination in choosing the
3758 following codes, so many of them aren't very
3763 000 TC Translation Control reg
3764 100 CAL Current Access Level
3765 101 VAL Validate Access Level
3766 110 SCC Stack Change Control
3767 111 AC Access Control
3769 W wide pmmu registers
3771 001 DRP Dma Root Pointer
3772 010 SRP Supervisor Root Pointer
3773 011 CRP Cpu Root Pointer
3775 f function code register
3782 100 BAD Breakpoint Acknowledge Data
3783 101 BAC Breakpoint Acknowledge Control
3788 | memory (modes 2-6, 7.*)
3792 /* Places to put an operand, for non-general operands:
3793 s source, low bits of first word.
3794 d dest, shifted 9 in first word
3795 1 second word, shifted 12
3796 2 second word, shifted 6
3797 3 second word, shifted 0
3798 4 third word, shifted 12
3799 5 third word, shifted 6
3800 6 third word, shifted 0
3801 7 second word, shifted 7
3802 8 second word, shifted 10
3803 D store in both place 1 and place 3; for divul and divsl.
3804 b second word, low byte
3805 w second word (entire)
3806 l second and third word (entire)
3807 g branch offset for bra and similar instructions.
3808 The place to store depends on the magnitude of offset.
3809 t store in both place 7 and place 8; for floating point operations
3810 c branch offset for cpBcc operations.
3811 The place to store is word two if bit six of word one is zero,
3812 and words two and three if bit six of word one is one.
3813 i Increment by two, to skip over coprocessor extended operands. Only
3814 works with the 'I' format.
3815 k Dynamic K-factor field. Bits 6-4 of word 2, used as a register number.
3816 Also used for dynamic fmovem instruction.
3817 C floating point coprocessor constant - 7 bits. Also used for static
3819 j Movec register #, stored in 12 low bits of second word.
3821 Places to put operand, for general operands:
3822 d destination, shifted 6 bits in first word
3823 b source, at low bit of first word, and immediate uses one byte
3824 w source, at low bit of first word, and immediate uses two bytes
3825 l source, at low bit of first word, and immediate uses four bytes
3826 s source, at low bit of first word.
3827 Used sometimes in contexts where immediate is not allowed anyway.
3828 f single precision float, low bit of 1st word, immediate uses 4 bytes
3829 F double precision float, low bit of 1st word, immediate uses 8 bytes
3830 x extended precision float, low bit of 1st word, immediate uses 12 bytes
3831 p packed float, low bit of 1st word, immediate uses 12 bytes
3834 #define one(x) ((x) << 16)
3835 #define two(x, y) (((x) << 16) + y)
3844 /* end of tc-m68k.c */