1 /* tc-m68k.c -- Assemble for the m68k family
2 Copyright (C) 1987, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 #include "opcode/m68k.h"
28 #include "m68k-parse.h"
30 /* This array holds the chars that always start a comment. If the
31 pre-processor is disabled, these aren't very useful */
32 #if defined (OBJ_ELF) || defined (TE_DELTA)
33 const char comment_chars
[] = "|#";
35 const char comment_chars
[] = "|";
38 /* This array holds the chars that only start a comment at the beginning of
39 a line. If the line seems to have the form '# 123 filename'
40 .line and .file directives will appear in the pre-processed output */
41 /* Note that input_file.c hand checks for '#' at the beginning of the
42 first line of the input file. This is because the compiler outputs
43 #NO_APP at the beginning of its output. */
44 /* Also note that comments like this one will always work. */
45 const char line_comment_chars
[] = "#";
47 const char line_separator_chars
[] = "";
49 /* Chars that can be used to separate mant from exp in floating point nums */
50 CONST
char EXP_CHARS
[] = "eE";
52 /* Chars that mean this number is a floating point constant, as
53 in "0f12.456" or "0d1.2345e12". */
55 CONST
char FLT_CHARS
[] = "rRsSfFdDxXeEpP";
57 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
58 changed in read.c . Ideally it shouldn't have to know about it at all,
59 but nothing is ideal around here. */
61 const int md_reloc_size
= 8; /* Size of relocation record */
63 /* Are we trying to generate PIC code? If so, absolute references
64 ought to be made into linkage table references or pc-relative
68 static int flag_short_refs
; /* -l option */
69 static int flag_long_jumps
; /* -S option */
71 #ifdef REGISTER_PREFIX_OPTIONAL
72 int flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
74 int flag_reg_prefix_optional
;
77 /* The floating point coprocessor to use by default. */
78 static enum m68k_register m68k_float_copnum
= COP1
;
80 /* If this is non-zero, then references to number(%pc) will be taken
81 to refer to number, rather than to %pc + number. */
82 static int m68k_abspcadd
;
84 /* If this is non-zero, then the quick forms of the move, add, and sub
85 instructions are used when possible. */
86 static int m68k_quick
= 1;
88 /* If this is non-zero, then if the size is not specified for a base
89 or outer displacement, the assembler assumes that the size should
91 static int m68k_rel32
= 1;
93 /* Its an arbitrary name: This means I don't approve of it */
94 /* See flames below */
95 static struct obstack robyn
;
97 #define TAB(x,y) (((x)<<2)+(y))
98 #define TABTYPE(xy) ((xy) >> 2)
104 /* Case `g' except when BCC68000 is applicable. */
106 /* Coprocessor branches. */
108 /* Mode 7.2 -- program counter indirect with (16-bit) displacement,
109 supported on all cpus. Widens to 32-bit absolute. */
111 /* For inserting an extra jmp instruction with long offset on 68000,
112 for expanding conditional branches. (Not bsr or bra.) Since the
113 68000 doesn't support 32-bit displacements for conditional
114 branches, we fake it by reversing the condition and branching
115 around a jmp with an absolute long operand. */
117 /* For the DBcc "instructions". If the displacement requires 32 bits,
118 the branch-around-a-jump game is played here too. */
120 /* Not currently used? */
122 /* Mode AINDX (apc-relative) using PC, with variable target, might fit
128 const char *m_operands
;
129 unsigned long m_opcode
;
133 struct m68k_incant
*m_next
;
136 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
137 #define gettwo(x) (((x)->m_opcode)&0xffff)
139 static const enum m68k_register m68000_control_regs
[] = { 0 };
140 static const enum m68k_register m68010_control_regs
[] = {
144 static const enum m68k_register m68020_control_regs
[] = {
145 SFC
, DFC
, USP
, VBR
, CACR
, CAAR
, MSP
, ISP
,
148 static const enum m68k_register m68040_control_regs
[] = {
149 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
,
150 USP
, VBR
, MSP
, ISP
, MMUSR
, URP
, SRP
,
153 static const enum m68k_register m68060_control_regs
[] = {
154 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, BUSCR
,
155 USP
, VBR
, URP
, SRP
, PCR
,
158 #define cpu32_control_regs m68010_control_regs
160 static const enum m68k_register
*control_regs
;
162 /* internal form of a 68020 instruction */
166 const char *args
; /* list of opcode info */
169 int numo
; /* Number of shorts in opcode */
172 struct m68k_op operands
[6];
174 int nexp
; /* number of exprs in use */
175 struct m68k_exp exprs
[4];
177 int nfrag
; /* Number of frags we have to produce */
180 int fragoff
; /* Where in the current opcode the frag ends */
187 int nrel
; /* Num of reloc strucs in use */
194 /* In a pc relative address the difference between the address
195 of the offset and the address that the offset is relative
196 to. This depends on the addressing mode. Basically this
197 is the value to put in the offset field to address the
198 first byte of the offset, without regarding the special
199 significance of some values (in the branch instruction, for
203 reloc
[5]; /* Five is enough??? */
206 #define cpu_of_arch(x) ((x) & m68000up)
207 #define float_of_arch(x) ((x) & mfloat)
208 #define mmu_of_arch(x) ((x) & mmmu)
210 static struct m68k_it the_ins
; /* the instruction being assembled */
212 #define op(ex) ((ex)->exp.X_op)
213 #define adds(ex) ((ex)->exp.X_add_symbol)
214 #define subs(ex) ((ex)->exp.X_op_symbol)
215 #define offs(ex) ((ex)->exp.X_add_number)
217 /* Macros for adding things to the m68k_it struct */
219 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
221 /* Like addword, but goes BEFORE general operands */
225 struct m68k_incant
*opcode
;
228 for(z
=the_ins
.numo
;z
>opcode
->m_codenum
;--z
)
229 the_ins
.opcode
[z
]=the_ins
.opcode
[z
-1];
230 for(z
=0;z
<the_ins
.nrel
;z
++)
231 the_ins
.reloc
[z
].n
+=2;
232 for (z
= 0; z
< the_ins
.nfrag
; z
++)
233 the_ins
.fragb
[z
].fragoff
++;
234 the_ins
.opcode
[opcode
->m_codenum
]=w
;
238 /* The numo+1 kludge is so we can hit the low order byte of the prev word.
241 add_fix (width
, exp
, pc_rel
, pc_fix
)
243 struct m68k_exp
*exp
;
247 the_ins
.reloc
[the_ins
.nrel
].n
= (((width
)=='B')
251 : (the_ins
.numo
*2)));
252 the_ins
.reloc
[the_ins
.nrel
].exp
= exp
->exp
;
253 the_ins
.reloc
[the_ins
.nrel
].wid
= width
;
254 the_ins
.reloc
[the_ins
.nrel
].pcrel_fix
= pc_fix
;
255 the_ins
.reloc
[the_ins
.nrel
++].pcrel
= pc_rel
;
258 /* Cause an extra frag to be generated here, inserting up to 10 bytes
259 (that value is chosen in the frag_var call in md_assemble). TYPE
260 is the subtype of the frag to be generated; its primary type is
261 rs_machine_dependent.
263 The TYPE parameter is also used by md_convert_frag_1 and
264 md_estimate_size_before_relax. The appropriate type of fixup will
265 be emitted by md_convert_frag_1.
267 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
269 add_frag(add
,off
,type
)
274 the_ins
.fragb
[the_ins
.nfrag
].fragoff
=the_ins
.numo
;
275 the_ins
.fragb
[the_ins
.nfrag
].fadd
=add
;
276 the_ins
.fragb
[the_ins
.nfrag
].foff
=off
;
277 the_ins
.fragb
[the_ins
.nfrag
++].fragty
=type
;
281 (op (ex) != O_constant && op (ex) != O_big)
283 static char *crack_operand
PARAMS ((char *str
, struct m68k_op
*opP
));
284 static int get_num
PARAMS ((struct m68k_exp
*exp
, int ok
));
285 static int reverse_16_bits
PARAMS ((int in
));
286 static int reverse_8_bits
PARAMS ((int in
));
287 static void install_gen_operand
PARAMS ((int mode
, int val
));
288 static void install_operand
PARAMS ((int mode
, int val
));
289 static void s_bss
PARAMS ((int));
290 static void s_data1
PARAMS ((int));
291 static void s_data2
PARAMS ((int));
292 static void s_even
PARAMS ((int));
293 static void s_proc
PARAMS ((int));
294 static void mri_chip
PARAMS ((void));
295 static void s_chip
PARAMS ((int));
296 static void s_fopt
PARAMS ((int));
297 static void s_opt
PARAMS ((int));
298 static void s_reg
PARAMS ((int));
299 static void s_restore
PARAMS ((int));
300 static void s_save
PARAMS ((int));
301 static void s_mri_if
PARAMS ((int));
302 static void s_mri_else
PARAMS ((int));
303 static void s_mri_endi
PARAMS ((int));
304 static void s_mri_break
PARAMS ((int));
305 static void s_mri_next
PARAMS ((int));
306 static void s_mri_for
PARAMS ((int));
307 static void s_mri_endf
PARAMS ((int));
308 static void s_mri_repeat
PARAMS ((int));
309 static void s_mri_until
PARAMS ((int));
310 static void s_mri_while
PARAMS ((int));
311 static void s_mri_endw
PARAMS ((int));
313 static int current_architecture
;
320 static const struct m68k_cpu archs
[] = {
330 /* Aliases (effectively, so far as gas is concerned) for the above
335 { m68000
, "68ec000" },
336 { m68000
, "68hc000" },
337 { m68000
, "68hc001" },
338 { m68020
, "68ec020" },
339 { m68030
, "68ec030" },
340 { m68040
, "68ec040" },
350 static const int n_archs
= sizeof (archs
) / sizeof (archs
[0]);
352 /* BCC68000 is for patching in an extra jmp instruction for long offsets
353 on the 68000. The 68000 doesn't support long branches with branchs */
355 /* This table desribes how you change sizes for the various types of variable
356 size expressions. This version only supports two kinds. */
358 /* Note that calls to frag_var need to specify the maximum expansion
359 needed; this is currently 10 bytes for DBCC. */
362 How far Forward this mode will reach:
363 How far Backward this mode will reach:
364 How many bytes this mode will add to the size of the frag
365 Which mode to go to if the offset won't fit in this one
367 relax_typeS md_relax_table
[] =
369 {1, 1, 0, 0}, /* First entries aren't used */
370 {1, 1, 0, 0}, /* For no good reason except */
371 {1, 1, 0, 0}, /* that the VAX doesn't either */
374 {(127), (-128), 0, TAB (ABRANCH
, SHORT
)},
375 {(32767), (-32768), 2, TAB (ABRANCH
, LONG
)},
379 {1, 1, 0, 0}, /* FBRANCH doesn't come BYTE */
380 {(32767), (-32768), 2, TAB (FBRANCH
, LONG
)},
384 {1, 1, 0, 0}, /* PCREL doesn't come BYTE */
385 {(32767), (-32768), 2, TAB (PCREL
, LONG
)},
389 {(127), (-128), 0, TAB (BCC68000
, SHORT
)},
390 {(32767), (-32768), 2, TAB (BCC68000
, LONG
)},
391 {0, 0, 6, 0}, /* jmp long space */
394 {1, 1, 0, 0}, /* DBCC doesn't come BYTE */
395 {(32767), (-32768), 2, TAB (DBCC
, LONG
)},
396 {0, 0, 10, 0}, /* bra/jmp long space */
399 {1, 1, 0, 0}, /* PCLEA doesn't come BYTE */
400 {32767, -32768, 2, TAB (PCLEA
, LONG
)},
404 /* For, e.g., jmp pcrel indexed. */
405 {125, -130, 0, TAB (PCINDEX
, SHORT
)},
406 {32765, -32770, 2, TAB (PCINDEX
, LONG
)},
411 /* These are the machine dependent pseudo-ops. These are included so
412 the assembler can work on the output from the SUN C compiler, which
416 /* This table describes all the machine specific pseudo-ops the assembler
417 has to support. The fields are:
418 pseudo-op name without dot
419 function to call to execute this pseudo-op
420 Integer arg to pass to the function
422 const pseudo_typeS md_pseudo_table
[] =
424 {"data1", s_data1
, 0},
425 {"data2", s_data2
, 0},
428 {"skip", s_space
, 0},
431 {"align", s_align_bytes
, 0},
434 {"swbeg", s_ignore
, 0},
437 /* The following pseudo-ops are supported for MRI compatibility. */
439 {"comline", s_space
, 1},
441 {"mask2", s_ignore
, 0},
444 {"restore", s_restore
, 0},
448 {"if.b", s_mri_if
, 'b'},
449 {"if.w", s_mri_if
, 'w'},
450 {"if.l", s_mri_if
, 'l'},
451 {"else", s_mri_else
, 0},
452 {"else.s", s_mri_else
, 's'},
453 {"else.l", s_mri_else
, 'l'},
454 {"endi", s_mri_endi
, 0},
455 {"break", s_mri_break
, 0},
456 {"break.s", s_mri_break
, 's'},
457 {"break.l", s_mri_break
, 'l'},
458 {"next", s_mri_next
, 0},
459 {"next.s", s_mri_next
, 's'},
460 {"next.l", s_mri_next
, 'l'},
461 {"for", s_mri_for
, 0},
462 {"for.b", s_mri_for
, 'b'},
463 {"for.w", s_mri_for
, 'w'},
464 {"for.l", s_mri_for
, 'l'},
465 {"endf", s_mri_endf
, 0},
466 {"repeat", s_mri_repeat
, 0},
467 {"until", s_mri_until
, 0},
468 {"until.b", s_mri_until
, 'b'},
469 {"until.w", s_mri_until
, 'w'},
470 {"until.l", s_mri_until
, 'l'},
471 {"while", s_mri_while
, 0},
472 {"while.b", s_mri_while
, 'b'},
473 {"while.w", s_mri_while
, 'w'},
474 {"while.l", s_mri_while
, 'l'},
475 {"endw", s_mri_endw
, 0},
481 /* The mote pseudo ops are put into the opcode table, since they
482 don't start with a . they look like opcodes to gas.
484 extern void obj_coff_section ();
486 CONST pseudo_typeS mote_pseudo_table
[] =
499 {"xdef", s_globl
, 0},
500 {"align", s_align_ptwo
, 0},
502 {"sect", obj_coff_section
, 0},
503 {"section", obj_coff_section
, 0},
508 #define issbyte(x) ((x)>=-128 && (x)<=127)
509 #define isubyte(x) ((x)>=0 && (x)<=255)
510 #define issword(x) ((x)>=-32768 && (x)<=32767)
511 #define isuword(x) ((x)>=0 && (x)<=65535)
513 #define isbyte(x) ((x)>= -255 && (x)<=255)
514 #define isword(x) ((x)>=-32768 && (x)<=65535)
515 #define islong(x) (1)
517 extern char *input_line_pointer
;
519 static char mklower_table
[256];
520 #define mklower(c) (mklower_table[(unsigned char)(c)])
521 static char notend_table
[256];
522 static char alt_notend_table
[256];
524 (! (notend_table[(unsigned char) *s] \
526 && alt_notend_table[(unsigned char) s[1]])))
528 #if defined (M68KCOFF) && !defined (BFD_ASSEMBLER)
530 #ifdef NO_PCREL_RELOCS
533 make_pcrel_absolute(fixP
, add_number
)
537 register unsigned char *opcode
= fixP
->fx_frag
->fr_opcode
;
539 /* rewrite the PC relative instructions to absolute address ones.
540 * these are rumoured to be faster, and the apollo linker refuses
541 * to deal with the PC relative relocations.
543 if (opcode
[0] == 0x60 && opcode
[1] == 0xff) /* BRA -> JMP */
548 else if (opcode
[0] == 0x61 && opcode
[1] == 0xff) /* BSR -> JSR */
554 as_fatal ("Unknown PC relative instruction");
559 #endif /* NO_PCREL_RELOCS */
562 tc_coff_fix2rtype (fixP
)
565 if (fixP
->fx_tcbit
&& fixP
->fx_size
== 4)
566 return R_RELLONG_NEG
;
567 #ifdef NO_PCREL_RELOCS
568 know (fixP
->fx_pcrel
== 0);
569 return (fixP
->fx_size
== 1 ? R_RELBYTE
570 : fixP
->fx_size
== 2 ? R_DIR16
573 return (fixP
->fx_pcrel
?
574 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
575 fixP
->fx_size
== 2 ? R_PCRWORD
:
577 (fixP
->fx_size
== 1 ? R_RELBYTE
:
578 fixP
->fx_size
== 2 ? R_RELWORD
:
588 tc_gen_reloc (section
, fixp
)
593 bfd_reloc_code_real_type code
;
598 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
599 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
601 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
602 MAP (1, 0, BFD_RELOC_8
);
603 MAP (2, 0, BFD_RELOC_16
);
604 MAP (4, 0, BFD_RELOC_32
);
605 MAP (1, 1, BFD_RELOC_8_PCREL
);
606 MAP (2, 1, BFD_RELOC_16_PCREL
);
607 MAP (4, 1, BFD_RELOC_32_PCREL
);
612 reloc
= (arelent
*) bfd_alloc_by_size_t (stdoutput
, sizeof (arelent
));
614 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
615 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
617 reloc
->addend
= fixp
->fx_addnumber
;
621 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
622 assert (reloc
->howto
!= 0);
627 #endif /* BFD_ASSEMBLER */
629 /* Handle of the OPCODE hash table. NULL means any use before
630 m68k_ip_begin() will crash. */
631 static struct hash_control
*op_hash
;
633 /* Assemble an m68k instruction. */
640 register struct m68k_op
*opP
;
641 register struct m68k_incant
*opcode
;
642 register const char *s
;
643 register int tmpreg
= 0, baseo
= 0, outro
= 0, nextword
;
644 char *pdot
, *pdotmove
;
645 enum m68k_size siz1
, siz2
;
649 char *crack_operand ();
650 LITTLENUM_TYPE words
[6];
651 LITTLENUM_TYPE
*wordp
;
652 unsigned long ok_arch
= 0;
654 if (*instring
== ' ')
655 instring
++; /* skip leading whitespace */
657 /* Scan up to end of operation-code, which MUST end in end-of-string
658 or exactly 1 space. */
660 for (p
= instring
; *p
!= '\0'; p
++)
670 the_ins
.error
= "No operator";
674 /* p now points to the end of the opcode name, probably whitespace.
675 Make sure the name is null terminated by clobbering the
676 whitespace, look it up in the hash table, then fix it back.
677 Remove a dot, first, since the opcode tables have none. */
680 for (pdotmove
= pdot
; pdotmove
< p
; pdotmove
++)
681 *pdotmove
= pdotmove
[1];
687 opcode
= (struct m68k_incant
*) hash_find (op_hash
, instring
);
692 for (pdotmove
= p
; pdotmove
> pdot
; pdotmove
--)
693 *pdotmove
= pdotmove
[-1];
700 the_ins
.error
= "Unknown operator";
704 /* found a legitimate opcode, start matching operands */
708 if (opcode
->m_operands
== 0)
710 char *old
= input_line_pointer
;
712 input_line_pointer
= p
;
713 /* Ahh - it's a motorola style psuedo op */
714 mote_pseudo_table
[opcode
->m_opnum
].poc_handler
715 (mote_pseudo_table
[opcode
->m_opnum
].poc_val
);
716 input_line_pointer
= old
;
722 if (flag_mri
&& opcode
->m_opnum
== 0)
724 /* In MRI mode, random garbage is allowed after an instruction
725 which accepts no operands. */
726 the_ins
.args
= opcode
->m_operands
;
727 the_ins
.numargs
= opcode
->m_opnum
;
728 the_ins
.numo
= opcode
->m_codenum
;
729 the_ins
.opcode
[0] = getone (opcode
);
730 the_ins
.opcode
[1] = gettwo (opcode
);
734 for (opP
= &the_ins
.operands
[0]; *p
; opP
++)
736 p
= crack_operand (p
, opP
);
740 the_ins
.error
= opP
->error
;
745 opsfound
= opP
- &the_ins
.operands
[0];
747 /* This ugly hack is to support the floating pt opcodes in their
748 standard form. Essentially, we fake a first enty of type COP#1 */
749 if (opcode
->m_operands
[0] == 'I')
753 for (n
= opsfound
; n
> 0; --n
)
754 the_ins
.operands
[n
] = the_ins
.operands
[n
- 1];
756 memset ((char *) (&the_ins
.operands
[0]), '\0',
757 sizeof (the_ins
.operands
[0]));
758 the_ins
.operands
[0].mode
= CONTROL
;
759 the_ins
.operands
[0].reg
= m68k_float_copnum
;
763 /* We've got the operands. Find an opcode that'll accept them */
766 /* If we didn't get the right number of ops, or we have no
767 common model with this pattern then reject this pattern. */
769 if (opsfound
!= opcode
->m_opnum
770 || ((opcode
->m_arch
& current_architecture
) == 0))
773 ok_arch
|= opcode
->m_arch
;
777 for (s
= opcode
->m_operands
, opP
= &the_ins
.operands
[0];
781 /* Warning: this switch is huge! */
782 /* I've tried to organize the cases into this order:
783 non-alpha first, then alpha by letter. Lower-case
784 goes directly before uppercase counterpart. */
785 /* Code with multiple case ...: gets sorted by the lowest
786 case ... it belongs to. I hope this makes sense. */
826 if (opP
->mode
!= IMMED
)
829 && ! isvar (&opP
->disp
)
830 && (opP
->disp
.exp
.X_op
!= O_constant
831 || ! isbyte (opP
->disp
.exp
.X_add_number
)))
834 && ! isvar (&opP
->disp
)
835 && (opP
->disp
.exp
.X_op
!= O_constant
836 || ! isword (opP
->disp
.exp
.X_add_number
)))
842 if (opP
->mode
!= IMMED
)
847 if (opP
->mode
== AREG
848 || opP
->mode
== CONTROL
849 || opP
->mode
== FPREG
850 || opP
->mode
== IMMED
851 || opP
->mode
== REGLST
852 || (opP
->mode
!= ABSL
854 || opP
->reg
== ZPC
)))
859 if (opP
->mode
== CONTROL
860 || opP
->mode
== FPREG
861 || opP
->mode
== REGLST
862 || (opP
->mode
!= ABSL
863 && opP
->mode
!= IMMED
865 || opP
->reg
== ZPC
)))
893 if (opP
->mode
== CONTROL
894 || opP
->mode
== FPREG
895 || opP
->mode
== REGLST
)
900 if (opP
->mode
!= AINC
)
905 if (opP
->mode
!= ADEC
)
955 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
976 case '~': /* For now! (JF FOO is this right?) */
998 if (opP
->mode
!= CONTROL
999 || (opP
->reg
!= TT0
&& opP
->reg
!= TT1
))
1004 if (opP
->mode
!= AREG
)
1009 if (opP
->mode
!= AINDR
)
1014 if (opP
->mode
!= ABSL
1016 && strncmp (instring
, "jbsr", 4) == 0))
1021 if (opP
->mode
!= CONTROL
|| opP
->reg
!= CCR
)
1026 if (opP
->mode
!= DISP
1028 || opP
->reg
> ADDR7
)
1033 if (opP
->mode
!= DREG
)
1038 if (opP
->mode
!= FPREG
)
1043 if (opP
->mode
!= CONTROL
1050 if (opP
->mode
!= CONTROL
1052 || opP
->reg
> last_movec_reg
)
1056 const enum m68k_register
*rp
;
1057 for (rp
= control_regs
; *rp
; rp
++)
1058 if (*rp
== opP
->reg
)
1066 if (opP
->mode
!= IMMED
)
1072 if (opP
->mode
== DREG
1073 || opP
->mode
== AREG
1074 || opP
->mode
== FPREG
)
1083 opP
->mask
= 1 << (opP
->reg
- DATA0
);
1086 opP
->mask
= 1 << (opP
->reg
- ADDR0
+ 8);
1089 opP
->mask
= 1 << (opP
->reg
- FP0
+ 16);
1097 else if (opP
->mode
== CONTROL
)
1106 opP
->mask
= 1 << 24;
1109 opP
->mask
= 1 << 25;
1112 opP
->mask
= 1 << 26;
1121 else if (opP
->mode
== ABSL
1122 && opP
->disp
.size
== SIZE_UNSPEC
1123 && opP
->disp
.exp
.X_op
== O_constant
)
1125 /* This is what the MRI REG pseudo-op generates. */
1127 opP
->mask
= opP
->disp
.exp
.X_add_number
;
1129 else if (opP
->mode
!= REGLST
)
1131 else if (s
[1] == '8' && (opP
->mask
& 0x0ffffff) != 0)
1133 else if (s
[1] == '3' && (opP
->mask
& 0x7000000) != 0)
1138 if (opP
->mode
!= IMMED
)
1140 else if (opP
->disp
.exp
.X_op
!= O_constant
1141 || ! issbyte (opP
->disp
.exp
.X_add_number
))
1143 else if (! m68k_quick
1144 && instring
[3] != 'q'
1145 && instring
[4] != 'q')
1150 if (opP
->mode
!= DREG
&& opP
->mode
!= IMMED
)
1155 if (opP
->mode
!= IMMED
)
1157 else if (opP
->disp
.exp
.X_op
!= O_constant
1158 || opP
->disp
.exp
.X_add_number
< 1
1159 || opP
->disp
.exp
.X_add_number
> 8)
1161 else if (! m68k_quick
1162 && (strncmp (instring
, "add", 3) == 0
1163 || strncmp (instring
, "sub", 3) == 0)
1164 && instring
[3] != 'q')
1169 if (opP
->mode
!= DREG
&& opP
->mode
!= AREG
)
1174 if (opP
->mode
!= AINDR
1175 && (opP
->mode
!= BASE
1177 && opP
->reg
!= ZADDR0
)
1178 || opP
->disp
.exp
.X_op
!= O_absent
1179 || ((opP
->index
.reg
< DATA0
1180 || opP
->index
.reg
> DATA7
)
1181 && (opP
->index
.reg
< ADDR0
1182 || opP
->index
.reg
> ADDR7
))
1183 || opP
->index
.size
!= SIZE_UNSPEC
1184 || opP
->index
.scale
!= 1))
1189 if (opP
->mode
!= CONTROL
1190 || ! (opP
->reg
== FPI
1192 || opP
->reg
== FPC
))
1197 if (opP
->mode
!= CONTROL
|| opP
->reg
!= SR
)
1202 if (opP
->mode
!= IMMED
)
1204 else if (opP
->disp
.exp
.X_op
!= O_constant
1205 || opP
->disp
.exp
.X_add_number
< 0
1206 || opP
->disp
.exp
.X_add_number
> 7)
1211 if (opP
->mode
!= CONTROL
|| opP
->reg
!= USP
)
1215 /* JF these are out of order. We could put them
1216 in order if we were willing to put up with
1217 bunches of #ifdef m68851s in the code.
1219 Don't forget that you need these operands
1220 to use 68030 MMU instructions. */
1222 /* Memory addressing mode used by pflushr */
1224 if (opP
->mode
== CONTROL
1225 || opP
->mode
== FPREG
1226 || opP
->mode
== DREG
1227 || opP
->mode
== AREG
1228 || opP
->mode
== REGLST
)
1233 if (opP
->mode
!= CONTROL
1234 || (opP
->reg
!= SFC
&& opP
->reg
!= DFC
))
1239 if (opP
->mode
!= CONTROL
1249 if (opP
->mode
!= CONTROL
1255 if (opP
->mode
!= CONTROL
1258 && opP
->reg
!= CRP
))
1263 if (opP
->mode
!= CONTROL
1264 || (!(opP
->reg
>= BAD
&& opP
->reg
<= BAD
+ 7)
1265 && !(opP
->reg
>= BAC
&& opP
->reg
<= BAC
+ 7)))
1270 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PSR
)
1275 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PCSR
)
1280 if (opP
->mode
!= CONTROL
1287 } /* not a cache specifier. */
1291 if (opP
->mode
!= ABSL
)
1297 } /* switch on type of operand */
1301 } /* for each operand */
1302 } /* if immediately wrong */
1309 opcode
= opcode
->m_next
;
1314 && !(ok_arch
& current_architecture
))
1319 "invalid instruction for this architecture; needs ");
1320 cp
= buf
+ strlen (buf
);
1324 strcpy (cp
, "fpu (68040, 68060 or 68881/68882)");
1327 strcpy (cp
, "mmu (68030 or 68851)");
1330 strcpy (cp
, "68020 or higher");
1333 strcpy (cp
, "68000 or higher");
1336 strcpy (cp
, "68010 or higher");
1340 int got_one
= 0, idx
;
1341 for (idx
= 0; idx
< sizeof (archs
) / sizeof (archs
[0]);
1344 if (archs
[idx
].arch
& ok_arch
)
1348 strcpy (cp
, " or ");
1352 strcpy (cp
, archs
[idx
].name
);
1364 the_ins
.error
= "operands mismatch";
1366 } /* Fell off the end */
1371 /* now assemble it */
1373 the_ins
.args
= opcode
->m_operands
;
1374 the_ins
.numargs
= opcode
->m_opnum
;
1375 the_ins
.numo
= opcode
->m_codenum
;
1376 the_ins
.opcode
[0] = getone (opcode
);
1377 the_ins
.opcode
[1] = gettwo (opcode
);
1379 for (s
= the_ins
.args
, opP
= &the_ins
.operands
[0]; *s
; s
+= 2, opP
++)
1381 /* This switch is a doozy.
1382 Watch the first step; its a big one! */
1403 tmpreg
= 0x3c; /* 7.4 */
1404 if (strchr ("bwl", s
[1]))
1405 nextword
= get_num (&opP
->disp
, 80);
1407 nextword
= get_num (&opP
->disp
, 0);
1408 if (isvar (&opP
->disp
))
1409 add_fix (s
[1], &opP
->disp
, 0, 0);
1413 if (!isbyte (nextword
))
1414 opP
->error
= "operand out of range";
1419 if (!isword (nextword
))
1420 opP
->error
= "operand out of range";
1425 addword (nextword
>> 16);
1452 /* We gotta put out some float */
1453 if (op (&opP
->disp
) != O_big
)
1458 /* Can other cases happen here? */
1459 if (op (&opP
->disp
) != O_constant
)
1462 val
= (valueT
) offs (&opP
->disp
);
1466 generic_bignum
[gencnt
] = (LITTLENUM_TYPE
) val
;
1467 val
>>= LITTLENUM_NUMBER_OF_BITS
;
1471 offs (&opP
->disp
) = gencnt
;
1473 if (offs (&opP
->disp
) > 0)
1475 if (offs (&opP
->disp
) > baseo
)
1477 as_warn ("Bignum too big for %c format; truncated",
1479 offs (&opP
->disp
) = baseo
;
1481 baseo
-= offs (&opP
->disp
);
1484 for (wordp
= generic_bignum
+ offs (&opP
->disp
) - 1;
1485 offs (&opP
->disp
)--;
1490 gen_to_words (words
, baseo
, (long) outro
);
1491 for (wordp
= words
; baseo
--; wordp
++)
1495 tmpreg
= opP
->reg
- DATA
; /* 0.dreg */
1498 tmpreg
= 0x08 + opP
->reg
- ADDR
; /* 1.areg */
1501 tmpreg
= 0x10 + opP
->reg
- ADDR
; /* 2.areg */
1504 tmpreg
= 0x20 + opP
->reg
- ADDR
; /* 4.areg */
1507 tmpreg
= 0x18 + opP
->reg
- ADDR
; /* 3.areg */
1511 nextword
= get_num (&opP
->disp
, 80);
1514 && ! isvar (&opP
->disp
)
1517 opP
->disp
.exp
.X_op
= O_symbol
;
1518 #ifndef BFD_ASSEMBLER
1519 opP
->disp
.exp
.X_add_symbol
= &abs_symbol
;
1521 opP
->disp
.exp
.X_add_symbol
=
1522 section_symbol (absolute_section
);
1526 /* Force into index mode. Hope this works */
1528 /* We do the first bit for 32-bit displacements, and the
1529 second bit for 16 bit ones. It is possible that we
1530 should make the default be WORD instead of LONG, but
1531 I think that'd break GCC, so we put up with a little
1532 inefficiency for the sake of working output. */
1534 if (!issword (nextword
)
1535 || (isvar (&opP
->disp
)
1536 && ((opP
->disp
.size
== SIZE_UNSPEC
1537 && flag_short_refs
== 0
1538 && cpu_of_arch (current_architecture
) >= m68020
)
1539 || opP
->disp
.size
== SIZE_LONG
)))
1542 tmpreg
= 0x3B; /* 7.3 */
1544 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
1545 if (isvar (&opP
->disp
))
1551 add_fix ('l', &opP
->disp
, 1, 2);
1552 addword (0), addword (0);
1554 add_frag (adds (&opP
->disp
),
1556 TAB (PCLEA
, SZ_UNDEF
));
1563 add_fix ('l', &opP
->disp
, 0, 0);
1568 addword (nextword
>> 16);
1573 tmpreg
= 0x3A; /* 7.2 */
1575 tmpreg
= 0x28 + opP
->reg
- ADDR
; /* 5.areg */
1577 if (isvar (&opP
->disp
))
1581 add_fix ('w', &opP
->disp
, 1, 0);
1584 add_fix ('w', &opP
->disp
, 0, 0);
1594 baseo
= get_num (&opP
->disp
, 80);
1595 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1596 outro
= get_num (&opP
->odisp
, 80);
1597 /* Figure out the `addressing mode'.
1598 Also turn on the BASE_DISABLE bit, if needed. */
1599 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1601 tmpreg
= 0x3b; /* 7.3 */
1602 if (opP
->reg
== ZPC
)
1605 else if (opP
->reg
== 0)
1608 tmpreg
= 0x30; /* 6.garbage */
1610 else if (opP
->reg
>= ZADDR0
&& opP
->reg
<= ZADDR7
)
1613 tmpreg
= 0x30 + opP
->reg
- ZADDR0
;
1616 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
1618 siz1
= opP
->disp
.size
;
1619 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1620 siz2
= opP
->odisp
.size
;
1624 /* Index register stuff */
1625 if (opP
->index
.reg
!= 0
1626 && opP
->index
.reg
>= DATA
1627 && opP
->index
.reg
<= ADDR7
)
1629 nextword
|= (opP
->index
.reg
- DATA
) << 12;
1631 if (opP
->index
.size
== SIZE_UNSPEC
1632 || opP
->index
.size
== SIZE_LONG
)
1635 if (cpu_of_arch (current_architecture
) < m68020
)
1637 if (opP
->index
.scale
!= 1)
1640 "scale factor invalid on this architecture; needs 68020 or higher";
1644 switch (opP
->index
.scale
)
1661 GET US OUT OF HERE! */
1663 /* Must be INDEX, with an index register. Address
1664 register cannot be ZERO-PC, and either :b was
1665 forced, or we know it will fit. For a 68000 or
1666 68010, force this mode anyways, because the
1667 larger modes aren't supported. */
1668 if (opP
->mode
== BASE
1669 && ((opP
->reg
>= ADDR0
1670 && opP
->reg
<= ADDR7
)
1673 if (siz1
== SIZE_BYTE
1674 || cpu_of_arch (current_architecture
) < m68020
1675 || (siz1
== SIZE_UNSPEC
1676 && ! isvar (&opP
->disp
)
1677 && issbyte (baseo
)))
1679 nextword
+= baseo
& 0xff;
1681 if (isvar (&opP
->disp
))
1683 /* Do a byte relocation. If it doesn't
1684 fit (possible on m68000) let the
1685 fixup processing complain later. */
1687 add_fix ('B', &opP
->disp
, 1, 1);
1689 add_fix ('B', &opP
->disp
, 0, 0);
1691 else if (siz1
!= SIZE_BYTE
)
1693 if (siz1
!= SIZE_UNSPEC
)
1694 as_warn ("Forcing byte displacement");
1695 if (! issbyte (baseo
))
1696 opP
->error
= "byte displacement out of range";
1701 else if (siz1
== SIZE_UNSPEC
1703 && isvar (&opP
->disp
)
1704 && subs (&opP
->disp
) == NULL
)
1706 nextword
+= baseo
& 0xff;
1708 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1709 TAB (PCINDEX
, SZ_UNDEF
));
1717 nextword
|= 0x40; /* No index reg */
1718 if (opP
->index
.reg
>= ZDATA0
1719 && opP
->index
.reg
<= ZDATA7
)
1720 nextword
|= (opP
->index
.reg
- ZDATA0
) << 12;
1721 else if (opP
->index
.reg
>= ZADDR0
1722 || opP
->index
.reg
<= ZADDR7
)
1723 nextword
|= (opP
->index
.reg
- ZADDR0
+ 8) << 12;
1726 /* It isn't simple. */
1728 if (cpu_of_arch (current_architecture
) < m68020
)
1730 "invalid operand mode for this architecture; needs 68020 or higher";
1733 /* If the guy specified a width, we assume that it is
1734 wide enough. Maybe it isn't. If so, we lose. */
1738 if (isvar (&opP
->disp
)
1740 : ! issword (baseo
))
1745 else if (! isvar (&opP
->disp
) && baseo
== 0)
1754 as_warn (":b not permitted; defaulting to :w");
1764 /* Figure out innner displacement stuff */
1765 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
1770 if (isvar (&opP
->odisp
)
1772 : ! issword (outro
))
1777 else if (! isvar (&opP
->odisp
) && outro
== 0)
1786 as_warn (":b not permitted; defaulting to :w");
1795 if (opP
->mode
== POST
1796 && (nextword
& 0x40) == 0)
1801 if (siz1
!= SIZE_UNSPEC
&& isvar (&opP
->disp
))
1803 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1804 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 1, 2);
1806 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 0, 0);
1808 if (siz1
== SIZE_LONG
)
1809 addword (baseo
>> 16);
1810 if (siz1
!= SIZE_UNSPEC
)
1813 if (siz2
!= SIZE_UNSPEC
&& isvar (&opP
->odisp
))
1814 add_fix (siz2
== SIZE_LONG
? 'l' : 'w', &opP
->odisp
, 0, 0);
1815 if (siz2
== SIZE_LONG
)
1816 addword (outro
>> 16);
1817 if (siz2
!= SIZE_UNSPEC
)
1823 nextword
= get_num (&opP
->disp
, 80);
1824 switch (opP
->disp
.size
)
1829 if (!isvar (&opP
->disp
) && issword (offs (&opP
->disp
)))
1831 tmpreg
= 0x38; /* 7.0 */
1835 /* Don't generate pc relative code on 68010 and
1837 if (isvar (&opP
->disp
)
1838 && !subs (&opP
->disp
)
1839 && adds (&opP
->disp
)
1840 && S_GET_SEGMENT (adds (&opP
->disp
)) == now_seg
1841 && cpu_of_arch (current_architecture
) >= m68020
1843 && !strchr ("~%&$?", s
[0]))
1845 tmpreg
= 0x3A; /* 7.2 */
1846 add_frag (adds (&opP
->disp
),
1848 TAB (PCREL
, SZ_UNDEF
));
1851 /* Fall through into long */
1853 if (isvar (&opP
->disp
))
1854 add_fix ('l', &opP
->disp
, 0, 0);
1856 tmpreg
= 0x39;/* 7.1 mode */
1857 addword (nextword
>> 16);
1861 case SIZE_WORD
: /* Word */
1862 if (isvar (&opP
->disp
))
1863 add_fix ('w', &opP
->disp
, 0, 0);
1865 tmpreg
= 0x38;/* 7.0 mode */
1873 as_bad ("unknown/incorrect operand");
1876 install_gen_operand (s
[1], tmpreg
);
1882 { /* JF: I hate floating point! */
1897 tmpreg
= get_num (&opP
->disp
, tmpreg
);
1898 if (isvar (&opP
->disp
))
1899 add_fix (s
[1], &opP
->disp
, 0, 0);
1902 case 'b': /* Danger: These do no check for
1903 certain types of overflow.
1905 if (!isbyte (tmpreg
))
1906 opP
->error
= "out of range";
1907 insop (tmpreg
, opcode
);
1908 if (isvar (&opP
->disp
))
1909 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
1912 if (!isword (tmpreg
))
1913 opP
->error
= "out of range";
1914 insop (tmpreg
, opcode
);
1915 if (isvar (&opP
->disp
))
1916 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
1919 /* Because of the way insop works, we put these two out
1921 insop (tmpreg
, opcode
);
1922 insop (tmpreg
>> 16, opcode
);
1923 if (isvar (&opP
->disp
))
1924 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
1930 install_operand (s
[1], tmpreg
);
1941 install_operand (s
[1], opP
->reg
- ADDR
);
1945 tmpreg
= get_num (&opP
->disp
, 80);
1949 /* The pc_fix argument winds up in fx_pcrel_adjust,
1950 which is a char, and may therefore be unsigned. We
1951 want to pass -1, but we pass 64 instead, and convert
1952 back in md_pcrel_from. */
1953 add_fix ('B', &opP
->disp
, 1, 64);
1956 add_fix ('w', &opP
->disp
, 1, 0);
1961 if (cpu_of_arch (current_architecture
) < m68020
)
1962 as_warn ("Can't use long branches on 68000/68010");
1963 the_ins
.opcode
[the_ins
.numo
- 1] |= 0xff;
1964 add_fix ('l', &opP
->disp
, 1, 0);
1969 if (subs (&opP
->disp
)) /* We can't relax it */
1972 /* This could either be a symbol, or an absolute
1973 address. No matter, the frag hacking will finger it
1974 out. Not quite: it can't switch from BRANCH to
1975 BCC68000 for the case where opnd is absolute (it
1976 needs to use the 68000 hack since no conditional abs
1978 if (((cpu_of_arch (current_architecture
) < m68020
)
1979 || (0 == adds (&opP
->disp
)))
1980 && (the_ins
.opcode
[0] >= 0x6200)
1981 && (the_ins
.opcode
[0] <= 0x6f00))
1982 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1983 TAB (BCC68000
, SZ_UNDEF
));
1985 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1986 TAB (ABRANCH
, SZ_UNDEF
));
1989 if (isvar (&opP
->disp
))
1992 /* check for DBcc instruction */
1993 if ((the_ins
.opcode
[0] & 0xf0f8) == 0x50c8)
1995 /* size varies if patch */
1996 /* needed for long form */
1997 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
1998 TAB (DBCC
, SZ_UNDEF
));
2002 add_fix ('w', &opP
->disp
, 1, 0);
2006 case 'C': /* Fixed size LONG coproc branches */
2007 add_fix ('l', &opP
->disp
, 1, 0);
2011 case 'c': /* Var size Coprocesssor branches */
2012 if (subs (&opP
->disp
))
2014 add_fix ('l', &opP
->disp
, 1, 0);
2015 add_frag ((symbolS
*) 0, (long) 0, TAB (FBRANCH
, LONG
));
2017 else if (adds (&opP
->disp
))
2018 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2019 TAB (FBRANCH
, SZ_UNDEF
));
2022 /* add_frag((symbolS *) 0, offs(&opP->disp),
2023 TAB(FBRANCH,SHORT)); */
2024 the_ins
.opcode
[the_ins
.numo
- 1] |= 0x40;
2025 add_fix ('l', &opP
->disp
, 1, 0);
2035 case 'C': /* Ignore it */
2038 case 'd': /* JF this is a kludge */
2039 install_operand ('s', opP
->reg
- ADDR
);
2040 tmpreg
= get_num (&opP
->disp
, 80);
2041 if (!issword (tmpreg
))
2043 as_warn ("Expression out of range, using 0");
2050 install_operand (s
[1], opP
->reg
- DATA
);
2054 install_operand (s
[1], opP
->reg
- FP0
);
2058 tmpreg
= opP
->reg
- COP0
;
2059 install_operand (s
[1], tmpreg
);
2062 case 'J': /* JF foo */
2123 install_operand (s
[1], tmpreg
);
2127 tmpreg
= get_num (&opP
->disp
, 55);
2128 install_operand (s
[1], tmpreg
& 0x7f);
2135 if (tmpreg
& 0x7FF0000)
2136 as_bad ("Floating point register in register list");
2137 insop (reverse_16_bits (tmpreg
), opcode
);
2141 if (tmpreg
& 0x700FFFF)
2142 as_bad ("Wrong register in floating-point reglist");
2143 install_operand (s
[1], reverse_8_bits (tmpreg
>> 16));
2151 if (tmpreg
& 0x7FF0000)
2152 as_bad ("Floating point register in register list");
2153 insop (tmpreg
, opcode
);
2155 else if (s
[1] == '8')
2157 if (tmpreg
& 0x0FFFFFF)
2158 as_bad ("incorrect register in reglist");
2159 install_operand (s
[1], tmpreg
>> 24);
2163 if (tmpreg
& 0x700FFFF)
2164 as_bad ("wrong register in floating-point reglist");
2166 install_operand (s
[1], tmpreg
>> 16);
2171 install_operand (s
[1], get_num (&opP
->disp
, 60));
2175 tmpreg
= ((opP
->mode
== DREG
)
2176 ? 0x20 + opP
->reg
- DATA
2177 : (get_num (&opP
->disp
, 40) & 0x1F));
2178 install_operand (s
[1], tmpreg
);
2182 tmpreg
= get_num (&opP
->disp
, 10);
2185 install_operand (s
[1], tmpreg
);
2189 /* This depends on the fact that ADDR registers are eight
2190 more than their corresponding DATA regs, so the result
2191 will have the ADDR_REG bit set */
2192 install_operand (s
[1], opP
->reg
- DATA
);
2196 if (opP
->mode
== AINDR
)
2197 install_operand (s
[1], opP
->reg
- DATA
);
2199 install_operand (s
[1], opP
->index
.reg
- DATA
);
2203 if (opP
->reg
== FPI
)
2205 else if (opP
->reg
== FPS
)
2207 else if (opP
->reg
== FPC
)
2211 install_operand (s
[1], tmpreg
);
2214 case 'S': /* Ignore it */
2218 install_operand (s
[1], get_num (&opP
->disp
, 30));
2221 case 'U': /* Ignore it */
2240 as_fatal ("failed sanity check");
2241 } /* switch on cache token */
2242 install_operand (s
[1], tmpreg
);
2245 /* JF: These are out of order, I fear. */
2258 install_operand (s
[1], tmpreg
);
2282 install_operand (s
[1], tmpreg
);
2286 if (opP
->reg
== VAL
)
2305 install_operand (s
[1], tmpreg
);
2319 tmpreg
= (4 << 10) | ((opP
->reg
- BAD
) << 2);
2330 tmpreg
= (5 << 10) | ((opP
->reg
- BAC
) << 2);
2336 install_operand (s
[1], tmpreg
);
2339 know (opP
->reg
== PSR
);
2342 know (opP
->reg
== PCSR
);
2357 install_operand (s
[1], tmpreg
);
2360 tmpreg
= get_num (&opP
->disp
, 20);
2361 install_operand (s
[1], tmpreg
);
2363 case '_': /* used only for move16 absolute 32-bit address */
2364 tmpreg
= get_num (&opP
->disp
, 80);
2365 addword (tmpreg
>> 16);
2366 addword (tmpreg
& 0xFFFF);
2373 /* By the time whe get here (FINALLY) the_ins contains the complete
2374 instruction, ready to be emitted. . . */
2378 reverse_16_bits (in
)
2384 static int mask
[16] =
2386 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
2387 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000
2389 for (n
= 0; n
< 16; n
++)
2392 out
|= mask
[15 - n
];
2395 } /* reverse_16_bits() */
2404 static int mask
[8] =
2406 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
2409 for (n
= 0; n
< 8; n
++)
2415 } /* reverse_8_bits() */
2417 /* Cause an extra frag to be generated here, inserting up to 10 bytes
2418 (that value is chosen in the frag_var call in md_assemble). TYPE
2419 is the subtype of the frag to be generated; its primary type is
2420 rs_machine_dependent.
2422 The TYPE parameter is also used by md_convert_frag_1 and
2423 md_estimate_size_before_relax. The appropriate type of fixup will
2424 be emitted by md_convert_frag_1.
2426 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
2428 install_operand (mode
, val
)
2435 the_ins
.opcode
[0] |= val
& 0xFF; /* JF FF is for M kludge */
2438 the_ins
.opcode
[0] |= val
<< 9;
2441 the_ins
.opcode
[1] |= val
<< 12;
2444 the_ins
.opcode
[1] |= val
<< 6;
2447 the_ins
.opcode
[1] |= val
;
2450 the_ins
.opcode
[2] |= val
<< 12;
2453 the_ins
.opcode
[2] |= val
<< 6;
2456 /* DANGER! This is a hack to force cas2l and cas2w cmds to be
2457 three words long! */
2459 the_ins
.opcode
[2] |= val
;
2462 the_ins
.opcode
[1] |= val
<< 7;
2465 the_ins
.opcode
[1] |= val
<< 10;
2469 the_ins
.opcode
[1] |= val
<< 5;
2474 the_ins
.opcode
[1] |= (val
<< 10) | (val
<< 7);
2477 the_ins
.opcode
[1] |= (val
<< 12) | val
;
2480 the_ins
.opcode
[0] |= val
= 0xff;
2483 the_ins
.opcode
[0] |= val
<< 9;
2486 the_ins
.opcode
[1] |= val
;
2489 the_ins
.opcode
[1] |= val
;
2490 the_ins
.numo
++; /* What a hack */
2493 the_ins
.opcode
[1] |= val
<< 4;
2500 the_ins
.opcode
[0] |= (val
<< 6);
2503 the_ins
.opcode
[1] = (val
>> 16);
2504 the_ins
.opcode
[2] = val
& 0xffff;
2508 as_fatal ("failed sanity check.");
2510 } /* install_operand() */
2513 install_gen_operand (mode
, val
)
2520 the_ins
.opcode
[0] |= val
;
2523 /* This is a kludge!!! */
2524 the_ins
.opcode
[0] |= (val
& 0x07) << 9 | (val
& 0x38) << 3;
2533 the_ins
.opcode
[0] |= val
;
2535 /* more stuff goes here */
2537 as_fatal ("failed sanity check.");
2539 } /* install_gen_operand() */
2542 * verify that we have some number of paren pairs, do m68k_ip_op(), and
2543 * then deal with the bitfield hack.
2547 crack_operand (str
, opP
)
2549 register struct m68k_op
*opP
;
2551 register int parens
;
2553 register char *beg_str
;
2561 for (parens
= 0; *str
&& (parens
> 0 || inquote
|| notend (str
)); str
++)
2567 else if (*str
== ')')
2571 opP
->error
= "Extra )";
2577 if (flag_mri
&& *str
== '\'')
2578 inquote
= ! inquote
;
2580 if (!*str
&& parens
)
2582 opP
->error
= "Missing )";
2587 if (m68k_ip_op (beg_str
, opP
) != 0)
2594 c
= *++str
; /* JF bitfield hack */
2599 as_bad ("Missing operand");
2604 /* This is the guts of the machine-dependent assembler. STR points to a
2605 machine dependent instruction. This function is supposed to emit
2606 the frags/bytes it assembles to.
2610 insert_reg (regname
, regnum
)
2617 #ifdef REGISTER_PREFIX
2618 if (!flag_reg_prefix_optional
)
2620 buf
[0] = REGISTER_PREFIX
;
2621 strcpy (buf
+ 1, regname
);
2626 symbol_table_insert (symbol_new (regname
, reg_section
, regnum
,
2627 &zero_address_frag
));
2629 for (i
= 0; regname
[i
]; i
++)
2630 buf
[i
] = islower (regname
[i
]) ? toupper (regname
[i
]) : regname
[i
];
2633 symbol_table_insert (symbol_new (buf
, reg_section
, regnum
,
2634 &zero_address_frag
));
2643 static const struct init_entry init_table
[] =
2753 /* 68ec030 versions of same */
2756 /* 68ec030 access control unit, identical to 030 MMU status reg */
2759 /* Suppressed data and address registers. */
2784 for (i
= 0; init_table
[i
].name
; i
++)
2785 insert_reg (init_table
[i
].name
, init_table
[i
].number
);
2788 static int no_68851
, no_68881
;
2791 /* a.out machine type. Default to 68020. */
2792 int m68k_aout_machtype
= 2;
2804 int shorts_this_frag
;
2807 /* In MRI mode, the instruction and operands are separated by a
2808 space. Anything following the operands is a comment. The label
2809 has already been removed. */
2817 for (s
= str
; *s
!= '\0'; s
++)
2819 if ((*s
== ' ' || *s
== '\t') && ! inquote
)
2837 inquote
= ! inquote
;
2842 memset ((char *) (&the_ins
), '\0', sizeof (the_ins
));
2847 for (n
= 0; n
< the_ins
.numargs
; n
++)
2848 if (the_ins
.operands
[n
].error
)
2850 er
= the_ins
.operands
[n
].error
;
2856 as_bad ("%s -- statement `%s' ignored", er
, str
);
2860 if (the_ins
.nfrag
== 0)
2862 /* No frag hacking involved; just put it out */
2863 toP
= frag_more (2 * the_ins
.numo
);
2864 fromP
= &the_ins
.opcode
[0];
2865 for (m
= the_ins
.numo
; m
; --m
)
2867 md_number_to_chars (toP
, (long) (*fromP
), 2);
2871 /* put out symbol-dependent info */
2872 for (m
= 0; m
< the_ins
.nrel
; m
++)
2874 switch (the_ins
.reloc
[m
].wid
)
2892 as_fatal ("Don't know how to figure width of %c in md_assemble()",
2893 the_ins
.reloc
[m
].wid
);
2896 fixP
= fix_new_exp (frag_now
,
2897 ((toP
- frag_now
->fr_literal
)
2898 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
2900 &the_ins
.reloc
[m
].exp
,
2901 the_ins
.reloc
[m
].pcrel
,
2903 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
2908 /* There's some frag hacking */
2909 for (n
= 0, fromP
= &the_ins
.opcode
[0]; n
< the_ins
.nfrag
; n
++)
2914 wid
= 2 * the_ins
.fragb
[n
].fragoff
;
2916 wid
= 2 * (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
2917 toP
= frag_more (wid
);
2919 shorts_this_frag
= 0;
2920 for (m
= wid
/ 2; m
; --m
)
2922 md_number_to_chars (toP
, (long) (*fromP
), 2);
2927 for (m
= 0; m
< the_ins
.nrel
; m
++)
2929 if ((the_ins
.reloc
[m
].n
) >= 2 * shorts_this_frag
)
2931 the_ins
.reloc
[m
].n
-= 2 * shorts_this_frag
;
2934 wid
= the_ins
.reloc
[m
].wid
;
2937 the_ins
.reloc
[m
].wid
= 0;
2938 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
2940 fixP
= fix_new_exp (frag_now
,
2941 ((toP
- frag_now
->fr_literal
)
2942 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
2944 &the_ins
.reloc
[m
].exp
,
2945 the_ins
.reloc
[m
].pcrel
,
2947 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
2949 (void) frag_var (rs_machine_dependent
, 10, 0,
2950 (relax_substateT
) (the_ins
.fragb
[n
].fragty
),
2951 the_ins
.fragb
[n
].fadd
, the_ins
.fragb
[n
].foff
, to_beg_P
);
2953 n
= (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
2954 shorts_this_frag
= 0;
2957 toP
= frag_more (n
* sizeof (short));
2960 md_number_to_chars (toP
, (long) (*fromP
), 2);
2966 for (m
= 0; m
< the_ins
.nrel
; m
++)
2970 wid
= the_ins
.reloc
[m
].wid
;
2973 the_ins
.reloc
[m
].wid
= 0;
2974 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
2976 fixP
= fix_new_exp (frag_now
,
2977 ((the_ins
.reloc
[m
].n
+ toP
- frag_now
->fr_literal
)
2978 - shorts_this_frag
* 2),
2980 &the_ins
.reloc
[m
].exp
,
2981 the_ins
.reloc
[m
].pcrel
,
2983 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
2991 * md_begin -- set up hash tables with 68000 instructions.
2992 * similar to what the vax assembler does. ---phr
2994 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
2995 a copy of it at runtime, adding in the information we want but isn't
2996 there. I think it'd be better to have an awk script hack the table
2997 at compile time. Or even just xstr the table and use it as-is. But
2998 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
3001 register const struct m68k_opcode
*ins
;
3002 register struct m68k_incant
*hack
, *slak
;
3003 register const char *retval
= 0; /* empty string, or error msg text */
3004 register unsigned int i
;
3009 flag_reg_prefix_optional
= 1;
3014 op_hash
= hash_new ();
3016 obstack_begin (&robyn
, 4000);
3017 for (i
= 0; i
< m68k_numopcodes
; i
++)
3019 hack
= slak
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3022 ins
= &m68k_opcodes
[i
];
3023 /* We *could* ignore insns that don't match our arch here
3024 but just leaving them out of the hash. */
3025 slak
->m_operands
= ins
->args
;
3026 slak
->m_opnum
= strlen (slak
->m_operands
) / 2;
3027 slak
->m_arch
= ins
->arch
;
3028 slak
->m_opcode
= ins
->opcode
;
3029 /* This is kludgey */
3030 slak
->m_codenum
= ((ins
->match
) & 0xffffL
) ? 2 : 1;
3031 if (i
+ 1 != m68k_numopcodes
3032 && !strcmp (ins
->name
, m68k_opcodes
[i
+ 1].name
))
3034 slak
->m_next
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3039 slak
= slak
->m_next
;
3043 retval
= hash_insert (op_hash
, ins
->name
, (char *) hack
);
3045 as_fatal ("Internal Error: Can't hash %s: %s", ins
->name
, retval
);
3048 for (i
= 0; i
< m68k_numaliases
; i
++)
3050 const char *name
= m68k_opcode_aliases
[i
].primary
;
3051 const char *alias
= m68k_opcode_aliases
[i
].alias
;
3052 PTR val
= hash_find (op_hash
, name
);
3054 as_fatal ("Internal Error: Can't find %s in hash table", name
);
3055 retval
= hash_insert (op_hash
, alias
, val
);
3057 as_fatal ("Internal Error: Can't hash %s: %s", alias
, retval
);
3060 /* In MRI mode, all unsized branches are variable sized. Normally,
3061 they are word sized. */
3064 static struct m68k_opcode_alias mri_aliases
[] =
3084 for (i
= 0; i
< sizeof mri_aliases
/ sizeof mri_aliases
[0]; i
++)
3086 const char *name
= mri_aliases
[i
].primary
;
3087 const char *alias
= mri_aliases
[i
].alias
;
3088 PTR val
= hash_find (op_hash
, name
);
3090 as_fatal ("Internal Error: Can't find %s in hash table", name
);
3091 retval
= hash_jam (op_hash
, alias
, val
);
3093 as_fatal ("Internal Error: Can't hash %s: %s", alias
, retval
);
3097 for (i
= 0; i
< sizeof (mklower_table
); i
++)
3098 mklower_table
[i
] = (isupper (c
= (char) i
)) ? tolower (c
) : c
;
3100 for (i
= 0; i
< sizeof (notend_table
); i
++)
3102 notend_table
[i
] = 0;
3103 alt_notend_table
[i
] = 0;
3105 notend_table
[','] = 1;
3106 notend_table
['{'] = 1;
3107 notend_table
['}'] = 1;
3108 alt_notend_table
['a'] = 1;
3109 alt_notend_table
['A'] = 1;
3110 alt_notend_table
['d'] = 1;
3111 alt_notend_table
['D'] = 1;
3112 alt_notend_table
['#'] = 1;
3113 alt_notend_table
['&'] = 1;
3114 alt_notend_table
['f'] = 1;
3115 alt_notend_table
['F'] = 1;
3116 #ifdef REGISTER_PREFIX
3117 alt_notend_table
[REGISTER_PREFIX
] = 1;
3120 /* We need to put '(' in alt_notend_table to handle
3121 cas2 %d0:%d2,%d3:%d4,(%a0):(%a1)
3123 alt_notend_table
['('] = 1;
3125 /* We need to put '@' in alt_notend_table to handle
3126 cas2 %d0:%d2,%d3:%d4,@(%d0):@(%d1)
3128 alt_notend_table
['@'] = 1;
3130 #ifndef MIT_SYNTAX_ONLY
3131 /* Insert pseudo ops, these have to go into the opcode table since
3132 gas expects pseudo ops to start with a dot */
3135 while (mote_pseudo_table
[n
].poc_name
)
3137 hack
= (struct m68k_incant
*)
3138 obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3139 hash_insert (op_hash
,
3140 mote_pseudo_table
[n
].poc_name
, (char *) hack
);
3141 hack
->m_operands
= 0;
3152 m68k_init_after_args ()
3154 if (cpu_of_arch (current_architecture
) == 0)
3157 const char *default_cpu
= TARGET_CPU
;
3159 if (*default_cpu
== 'm')
3161 for (i
= 0; i
< n_archs
; i
++)
3162 if (strcasecmp (default_cpu
, archs
[i
].name
) == 0)
3166 as_bad ("unrecognized default cpu `%s' ???", TARGET_CPU
);
3167 current_architecture
|= m68020
;
3170 current_architecture
|= archs
[i
].arch
;
3172 /* Permit m68881 specification with all cpus; those that can't work
3173 with a coprocessor could be doing emulation. */
3174 if (current_architecture
& m68851
)
3176 if (current_architecture
& m68040
)
3178 as_warn ("68040 and 68851 specified; mmu instructions may assemble incorrectly");
3181 /* What other incompatibilities could we check for? */
3183 /* Toss in some default assumptions about coprocessors. */
3185 && (cpu_of_arch (current_architecture
)
3186 /* Can CPU32 have a 68881 coprocessor?? */
3187 & (m68020
| m68030
| cpu32
)))
3189 current_architecture
|= m68881
;
3192 && (cpu_of_arch (current_architecture
) & m68020up
) != 0
3193 && (cpu_of_arch (current_architecture
) & m68040up
) == 0)
3195 current_architecture
|= m68851
;
3197 if (no_68881
&& (current_architecture
& m68881
))
3198 as_bad ("options for 68881 and no-68881 both given");
3199 if (no_68851
&& (current_architecture
& m68851
))
3200 as_bad ("options for 68851 and no-68851 both given");
3203 /* Work out the magic number. This isn't very general. */
3204 if (current_architecture
& m68000
)
3205 m68k_aout_machtype
= 0;
3206 else if (current_architecture
& m68010
)
3207 m68k_aout_machtype
= 1;
3208 else if (current_architecture
& m68020
)
3209 m68k_aout_machtype
= 2;
3211 m68k_aout_machtype
= 2;
3214 /* Note which set of "movec" control registers is available. */
3215 switch (cpu_of_arch (current_architecture
))
3218 control_regs
= m68000_control_regs
;
3221 control_regs
= m68010_control_regs
;
3225 control_regs
= m68020_control_regs
;
3228 control_regs
= m68040_control_regs
;
3231 control_regs
= m68060_control_regs
;
3234 control_regs
= cpu32_control_regs
;
3240 if (cpu_of_arch (current_architecture
) < m68020
)
3241 md_relax_table
[TAB (PCINDEX
, BYTE
)].rlx_more
= 0;
3244 /* Equal to MAX_PRECISION in atof-ieee.c */
3245 #define MAX_LITTLENUMS 6
3247 /* Turn a string in input_line_pointer into a floating point constant
3248 of type type, and store the appropriate bytes in *litP. The number
3249 of LITTLENUMS emitted is stored in *sizeP . An error message is
3250 returned, or NULL on OK. */
3253 md_atof (type
, litP
, sizeP
)
3259 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
3260 LITTLENUM_TYPE
*wordP
;
3292 return "Bad call to MD_ATOF()";
3294 t
= atof_ieee (input_line_pointer
, type
, words
);
3296 input_line_pointer
= t
;
3298 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
3299 for (wordP
= words
; prec
--;)
3301 md_number_to_chars (litP
, (long) (*wordP
++), sizeof (LITTLENUM_TYPE
));
3302 litP
+= sizeof (LITTLENUM_TYPE
);
3308 md_number_to_chars (buf
, val
, n
)
3313 number_to_chars_bigendian (buf
, val
, n
);
3317 md_apply_fix_2 (fixP
, val
)
3321 addressT upper_limit
;
3322 offsetT lower_limit
;
3324 /* This is unnecessary but it convinces the native rs6000 compiler
3325 to generate the code we want. */
3326 char *buf
= fixP
->fx_frag
->fr_literal
;
3327 buf
+= fixP
->fx_where
;
3328 /* end ibm compiler workaround */
3330 if (val
& 0x80000000)
3331 val
|= ~(addressT
)0x7fffffff;
3335 switch (fixP
->fx_size
)
3337 /* The cast to offsetT below are necessary to make code correct for
3338 machines where ints are smaller than offsetT */
3342 lower_limit
= - (offsetT
) 0x80;
3345 *buf
++ = (val
>> 8);
3347 upper_limit
= 0x7fff;
3348 lower_limit
= - (offsetT
) 0x8000;
3351 *buf
++ = (val
>> 24);
3352 *buf
++ = (val
>> 16);
3353 *buf
++ = (val
>> 8);
3355 upper_limit
= 0x7fffffff;
3356 lower_limit
= - (offsetT
) 0x7fffffff - 1; /* avoid constant overflow */
3359 BAD_CASE (fixP
->fx_size
);
3362 /* Fix up a negative reloc. */
3363 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_subsy
!= NULL
)
3365 fixP
->fx_addsy
= fixP
->fx_subsy
;
3366 fixP
->fx_subsy
= NULL
;
3370 /* For non-pc-relative values, it's conceivable we might get something
3371 like "0xff" for a byte field. So extend the upper part of the range
3372 to accept such numbers. We arbitrarily disallow "-0xff" or "0xff+0xff",
3373 so that we can do any range checking at all. */
3374 if (!fixP
->fx_pcrel
)
3375 upper_limit
= upper_limit
* 2 + 1;
3377 if ((addressT
) val
> upper_limit
3378 && (val
> 0 || val
< lower_limit
))
3379 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, "value out of range");
3381 /* A one byte PC-relative reloc means a short branch. We can't use
3382 a short branch with a value of 0 or -1, because those indicate
3383 different opcodes (branches with longer offsets). */
3385 && fixP
->fx_size
== 1
3386 && (fixP
->fx_addsy
== NULL
3387 || S_IS_DEFINED (fixP
->fx_addsy
))
3388 && (val
== 0 || val
== -1))
3389 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, "invalid byte branch offset");
3392 #ifdef BFD_ASSEMBLER
3394 md_apply_fix (fixP
, valp
)
3398 md_apply_fix_2 (fixP
, (addressT
) *valp
);
3402 void md_apply_fix (fixP
, val
)
3406 md_apply_fix_2 (fixP
, (addressT
) val
);
3410 /* *fragP has been relaxed to its final size, and now needs to have
3411 the bytes inside it modified to conform to the new size There is UGLY
3415 md_convert_frag_1 (fragP
)
3416 register fragS
*fragP
;
3422 /* Address in object code of the displacement. */
3423 register int object_address
= fragP
->fr_fix
+ fragP
->fr_address
;
3425 /* Address in gas core of the place to store the displacement. */
3426 /* This convinces the native rs6000 compiler to generate the code we
3428 register char *buffer_address
= fragP
->fr_literal
;
3429 buffer_address
+= fragP
->fr_fix
;
3430 /* end ibm compiler workaround */
3432 /* The displacement of the address, from current location. */
3433 disp
= fragP
->fr_symbol
? S_GET_VALUE (fragP
->fr_symbol
) : 0;
3434 disp
= (disp
+ fragP
->fr_offset
) - object_address
;
3436 #ifdef BFD_ASSEMBLER
3437 disp
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
3440 switch (fragP
->fr_subtype
)
3442 case TAB (BCC68000
, BYTE
):
3443 case TAB (ABRANCH
, BYTE
):
3444 know (issbyte (disp
));
3446 as_bad ("short branch with zero offset: use :w");
3447 fragP
->fr_opcode
[1] = disp
;
3450 case TAB (DBCC
, SHORT
):
3451 know (issword (disp
));
3454 case TAB (BCC68000
, SHORT
):
3455 case TAB (ABRANCH
, SHORT
):
3456 know (issword (disp
));
3457 fragP
->fr_opcode
[1] = 0x00;
3460 case TAB (ABRANCH
, LONG
):
3461 if (cpu_of_arch (current_architecture
) < m68020
)
3463 if (fragP
->fr_opcode
[0] == 0x61)
3466 fragP
->fr_opcode
[0] = 0x4E;
3467 fragP
->fr_opcode
[1] = (char) 0xB9; /* JBSR with ABSL LONG offset */
3481 else if (fragP
->fr_opcode
[0] == 0x60)
3483 fragP
->fr_opcode
[0] = 0x4E;
3484 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG offset */
3485 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3486 fragP
->fr_offset
, 0, NO_RELOC
);
3492 as_bad ("Long branch offset not supported.");
3497 fragP
->fr_opcode
[1] = (char) 0xff;
3501 case TAB (BCC68000
, LONG
):
3502 /* only Bcc 68000 instructions can come here */
3503 /* change bcc into b!cc/jmp absl long */
3504 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
3505 fragP
->fr_opcode
[1] = 0x6;/* branch offset = 6 */
3507 /* JF: these used to be fr_opcode[2,3], but they may be in a
3508 different frag, in which case refering to them is a no-no.
3509 Only fr_opcode[0,1] are guaranteed to work. */
3510 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
3511 *buffer_address
++ = (char) 0xf9;
3512 fragP
->fr_fix
+= 2; /* account for jmp instruction */
3513 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3514 fragP
->fr_offset
, 0, NO_RELOC
);
3518 case TAB (DBCC
, LONG
):
3519 /* only DBcc 68000 instructions can come here */
3520 /* change dbcc into dbcc/jmp absl long */
3521 /* JF: these used to be fr_opcode[2-7], but that's wrong */
3522 *buffer_address
++ = 0x00; /* branch offset = 4 */
3523 *buffer_address
++ = 0x04;
3524 *buffer_address
++ = 0x60; /* put in bra pc+6 */
3525 *buffer_address
++ = 0x06;
3526 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
3527 *buffer_address
++ = (char) 0xf9;
3529 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
3530 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3531 fragP
->fr_offset
, 0, NO_RELOC
);
3535 case TAB (FBRANCH
, SHORT
):
3536 know ((fragP
->fr_opcode
[1] & 0x40) == 0);
3539 case TAB (FBRANCH
, LONG
):
3540 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
3543 case TAB (PCREL
, SHORT
):
3546 case TAB (PCREL
, LONG
):
3547 /* The thing to do here is force it to ABSOLUTE LONG, since
3548 PCREL is really trying to shorten an ABSOLUTE address anyway */
3549 /* JF FOO This code has not been tested */
3550 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
3552 if ((fragP
->fr_opcode
[1] & 0x3F) != 0x3A)
3553 as_bad ("Internal error (long PC-relative operand) for insn 0x%04x at 0x%lx",
3554 (unsigned) fragP
->fr_opcode
[0],
3555 (unsigned long) fragP
->fr_address
);
3556 fragP
->fr_opcode
[1] &= ~0x3F;
3557 fragP
->fr_opcode
[1] |= 0x39; /* Mode 7.1 */
3561 case TAB (PCLEA
, SHORT
):
3562 fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
3563 fragP
->fr_offset
, 1, NO_RELOC
);
3564 fragP
->fr_opcode
[1] &= ~0x3F;
3565 fragP
->fr_opcode
[1] |= 0x3A; /* 072 - mode 7.2 */
3568 case TAB (PCLEA
, LONG
):
3569 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
) + 2, 4, fragP
->fr_symbol
,
3570 fragP
->fr_offset
, 1, NO_RELOC
);
3571 fixP
->fx_pcrel_adjust
= 2;
3572 /* Already set to mode 7.3; this indicates: PC indirect with
3573 suppressed index, 32-bit displacement. */
3574 *buffer_address
++ = 0x01;
3575 *buffer_address
++ = 0x70;
3580 case TAB (PCINDEX
, BYTE
):
3582 if (!issbyte (disp
))
3584 as_bad ("displacement doesn't fit in one byte");
3587 assert (fragP
->fr_fix
>= 2);
3588 buffer_address
[-2] &= ~1;
3589 buffer_address
[-1] = disp
;
3592 case TAB (PCINDEX
, SHORT
):
3594 assert (issword (disp
));
3595 assert (fragP
->fr_fix
>= 2);
3596 buffer_address
[-2] |= 0x1;
3597 buffer_address
[-1] = 0x20;
3598 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
3599 fragP
->fr_offset
, (fragP
->fr_opcode
[1] & 077) == 073,
3601 fixP
->fx_pcrel_adjust
= 2;
3604 case TAB (PCINDEX
, LONG
):
3606 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
3607 fragP
->fr_offset
, (fragP
->fr_opcode
[1] & 077) == 073,
3609 fixP
->fx_pcrel_adjust
= 2;
3610 assert (fragP
->fr_fix
>= 2);
3611 buffer_address
[-2] |= 0x1;
3612 buffer_address
[-1] = 0x30;
3619 md_number_to_chars (buffer_address
, (long) disp
, (int) ext
);
3620 fragP
->fr_fix
+= ext
;
3624 #ifndef BFD_ASSEMBLER
3627 md_convert_frag (headers
, sec
, fragP
)
3628 object_headers
*headers
;
3632 md_convert_frag_1 (fragP
);
3638 md_convert_frag (abfd
, sec
, fragP
)
3643 md_convert_frag_1 (fragP
);
3647 /* Force truly undefined symbols to their maximum size, and generally set up
3648 the frag list to be relaxed
3651 md_estimate_size_before_relax (fragP
, segment
)
3652 register fragS
*fragP
;
3656 register char *buffer_address
= fragP
->fr_fix
+ fragP
->fr_literal
;
3658 old_fix
= fragP
->fr_fix
;
3660 /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
3661 switch (fragP
->fr_subtype
)
3664 case TAB (ABRANCH
, SZ_UNDEF
):
3666 if ((fragP
->fr_symbol
!= NULL
) /* Not absolute */
3667 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
3669 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
3672 else if ((fragP
->fr_symbol
== 0) || (cpu_of_arch (current_architecture
) < m68020
))
3674 /* On 68000, or for absolute value, switch to abs long */
3675 /* FIXME, we should check abs val, pick short or long */
3676 if (fragP
->fr_opcode
[0] == 0x61)
3678 fragP
->fr_opcode
[0] = 0x4E;
3679 fragP
->fr_opcode
[1] = (char) 0xB9; /* JBSR with ABSL LONG offset */
3680 fix_new (fragP
, fragP
->fr_fix
, 4,
3681 fragP
->fr_symbol
, fragP
->fr_offset
, 0, NO_RELOC
);
3685 else if (fragP
->fr_opcode
[0] == 0x60)
3687 fragP
->fr_opcode
[0] = 0x4E;
3688 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG offset */
3689 fix_new (fragP
, fragP
->fr_fix
, 4,
3690 fragP
->fr_symbol
, fragP
->fr_offset
, 0, NO_RELOC
);
3696 as_warn ("Long branch offset to extern symbol not supported.");
3700 { /* Symbol is still undefined. Make it simple */
3701 fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
3702 fragP
->fr_offset
, 1, NO_RELOC
);
3704 fragP
->fr_opcode
[1] = (char) 0xff;
3710 } /* case TAB(ABRANCH,SZ_UNDEF) */
3712 case TAB (FBRANCH
, SZ_UNDEF
):
3714 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
|| flag_short_refs
)
3716 fragP
->fr_subtype
= TAB (FBRANCH
, SHORT
);
3721 fix_new (fragP
, (int) fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3722 fragP
->fr_offset
, 1, NO_RELOC
);
3724 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
3728 } /* TAB(FBRANCH,SZ_UNDEF) */
3730 case TAB (PCREL
, SZ_UNDEF
):
3732 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
3734 || cpu_of_arch (current_architecture
) < m68020
)
3736 fragP
->fr_subtype
= TAB (PCREL
, SHORT
);
3741 fragP
->fr_subtype
= TAB (PCREL
, LONG
);
3745 } /* TAB(PCREL,SZ_UNDEF) */
3747 case TAB (BCC68000
, SZ_UNDEF
):
3749 if ((fragP
->fr_symbol
!= NULL
)
3750 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
3752 fragP
->fr_subtype
= TAB (BCC68000
, BYTE
);
3755 /* only Bcc 68000 instructions can come here */
3756 /* change bcc into b!cc/jmp absl long */
3757 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
3758 if (flag_short_refs
)
3760 fragP
->fr_opcode
[1] = 0x04; /* branch offset = 6 */
3761 /* JF: these were fr_opcode[2,3] */
3762 buffer_address
[0] = 0x4e; /* put in jmp long (0x4ef9) */
3763 buffer_address
[1] = (char) 0xf8;
3764 fragP
->fr_fix
+= 2; /* account for jmp instruction */
3765 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
,
3766 fragP
->fr_offset
, 0, NO_RELOC
);
3771 fragP
->fr_opcode
[1] = 0x06; /* branch offset = 6 */
3772 /* JF: these were fr_opcode[2,3] */
3773 buffer_address
[0] = 0x4e; /* put in jmp long (0x4ef9) */
3774 buffer_address
[1] = (char) 0xf9;
3775 fragP
->fr_fix
+= 2; /* account for jmp instruction */
3776 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3777 fragP
->fr_offset
, 0, NO_RELOC
);
3782 } /* case TAB(BCC68000,SZ_UNDEF) */
3784 case TAB (DBCC
, SZ_UNDEF
):
3786 if (fragP
->fr_symbol
!= NULL
&& S_GET_SEGMENT (fragP
->fr_symbol
) == segment
)
3788 fragP
->fr_subtype
= TAB (DBCC
, SHORT
);
3792 /* only DBcc 68000 instructions can come here */
3793 /* change dbcc into dbcc/jmp absl long */
3794 /* JF: these used to be fr_opcode[2-4], which is wrong. */
3795 buffer_address
[0] = 0x00; /* branch offset = 4 */
3796 buffer_address
[1] = 0x04;
3797 buffer_address
[2] = 0x60; /* put in bra pc + ... */
3799 if (flag_short_refs
)
3801 /* JF: these were fr_opcode[5-7] */
3802 buffer_address
[3] = 0x04; /* plus 4 */
3803 buffer_address
[4] = 0x4e; /* Put in Jump Word */
3804 buffer_address
[5] = (char) 0xf8;
3805 fragP
->fr_fix
+= 6; /* account for bra/jmp instruction */
3806 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
,
3807 fragP
->fr_offset
, 0, NO_RELOC
);
3812 /* JF: these were fr_opcode[5-7] */
3813 buffer_address
[3] = 0x06; /* Plus 6 */
3814 buffer_address
[4] = 0x4e; /* put in jmp long (0x4ef9) */
3815 buffer_address
[5] = (char) 0xf9;
3816 fragP
->fr_fix
+= 6; /* account for bra/jmp instruction */
3817 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
3818 fragP
->fr_offset
, 0, NO_RELOC
);
3824 } /* case TAB(DBCC,SZ_UNDEF) */
3826 case TAB (PCLEA
, SZ_UNDEF
):
3828 if ((S_GET_SEGMENT (fragP
->fr_symbol
)) == segment
3830 || cpu_of_arch (current_architecture
) < m68020
)
3832 fragP
->fr_subtype
= TAB (PCLEA
, SHORT
);
3837 fragP
->fr_subtype
= TAB (PCLEA
, LONG
);
3841 } /* TAB(PCLEA,SZ_UNDEF) */
3843 case TAB (PCINDEX
, SZ_UNDEF
):
3844 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
3845 || cpu_of_arch (current_architecture
) < m68020
)
3847 fragP
->fr_subtype
= TAB (PCINDEX
, BYTE
);
3851 fragP
->fr_subtype
= TAB (PCINDEX
, LONG
);
3860 /* now that SZ_UNDEF are taken care of, check others */
3861 switch (fragP
->fr_subtype
)
3863 case TAB (BCC68000
, BYTE
):
3864 case TAB (ABRANCH
, BYTE
):
3865 /* We can't do a short jump to the next instruction,
3866 so we force word mode. */
3867 if (fragP
->fr_symbol
&& S_GET_VALUE (fragP
->fr_symbol
) == 0 &&
3868 fragP
->fr_symbol
->sy_frag
== fragP
->fr_next
)
3870 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
3877 return fragP
->fr_var
+ fragP
->fr_fix
- old_fix
;
3880 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
3881 /* the bit-field entries in the relocation_info struct plays hell
3882 with the byte-order problems of cross-assembly. So as a hack,
3883 I added this mach. dependent ri twiddler. Ugly, but it gets
3885 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
3886 are symbolnum, most sig. byte first. Last byte is broken up with
3887 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
3888 nibble as nuthin. (on Sun 3 at least) */
3889 /* Translate the internal relocation information into target-specific
3893 md_ri_to_chars (the_bytes
, ri
)
3895 struct reloc_info_generic
*ri
;
3898 md_number_to_chars (the_bytes
, ri
->r_address
, 4);
3899 /* now the fun stuff */
3900 the_bytes
[4] = (ri
->r_symbolnum
>> 16) & 0x0ff;
3901 the_bytes
[5] = (ri
->r_symbolnum
>> 8) & 0x0ff;
3902 the_bytes
[6] = ri
->r_symbolnum
& 0x0ff;
3903 the_bytes
[7] = (((ri
->r_pcrel
<< 7) & 0x80) | ((ri
->r_length
<< 5) & 0x60) |
3904 ((ri
->r_extern
<< 4) & 0x10));
3907 #endif /* comment */
3909 #ifndef BFD_ASSEMBLER
3911 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3914 relax_addressT segment_address_in_file
;
3917 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3918 * Out: GNU LD relocation length code: 0, 1, or 2.
3921 static CONST
unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3924 know (fixP
->fx_addsy
!= NULL
);
3926 md_number_to_chars (where
,
3927 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
3930 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3931 ? S_GET_TYPE (fixP
->fx_addsy
)
3932 : fixP
->fx_addsy
->sy_number
);
3934 where
[4] = (r_symbolnum
>> 16) & 0x0ff;
3935 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3936 where
[6] = r_symbolnum
& 0x0ff;
3937 where
[7] = (((fixP
->fx_pcrel
<< 7) & 0x80) | ((nbytes_r_length
[fixP
->fx_size
] << 5) & 0x60) |
3938 (((!S_IS_DEFINED (fixP
->fx_addsy
)) << 4) & 0x10));
3942 #endif /* OBJ_AOUT or OBJ_BOUT */
3944 #ifndef WORKING_DOT_WORD
3945 CONST
int md_short_jump_size
= 4;
3946 CONST
int md_long_jump_size
= 6;
3949 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3951 addressT from_addr
, to_addr
;
3957 offset
= to_addr
- (from_addr
+ 2);
3959 md_number_to_chars (ptr
, (valueT
) 0x6000, 2);
3960 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 2);
3964 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3966 addressT from_addr
, to_addr
;
3972 if (cpu_of_arch (current_architecture
) < m68020
)
3974 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3975 md_number_to_chars (ptr
, (valueT
) 0x4EF9, 2);
3976 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
3977 fix_new (frag
, (ptr
+ 2) - frag
->fr_literal
, 4, to_symbol
, (offsetT
) 0,
3982 offset
= to_addr
- (from_addr
+ 2);
3983 md_number_to_chars (ptr
, (valueT
) 0x60ff, 2);
3984 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
3990 /* Different values of OK tell what its OK to return. Things that
3991 aren't OK are an error (what a shock, no?)
3994 10: Absolute 1:8 only
3995 20: Absolute 0:7 only
3996 30: absolute 0:15 only
3997 40: Absolute 0:31 only
3998 50: absolute 0:127 only
3999 55: absolute -64:63 only
4000 60: absolute -128:127 only
4001 70: absolute 0:4095 only
4008 struct m68k_exp
*exp
;
4011 if (exp
->exp
.X_op
== O_absent
)
4013 /* Do the same thing the VAX asm does */
4014 op (exp
) = O_constant
;
4020 as_warn ("expression out of range: defaulting to 1");
4024 else if (exp
->exp
.X_op
== O_constant
)
4029 if (offs (exp
) < 1 || offs (exp
) > 8)
4031 as_warn ("expression out of range: defaulting to 1");
4036 if (offs (exp
) < 0 || offs (exp
) > 7)
4040 if (offs (exp
) < 0 || offs (exp
) > 15)
4044 if (offs (exp
) < 0 || offs (exp
) > 32)
4048 if (offs (exp
) < 0 || offs (exp
) > 127)
4052 if (offs (exp
) < -64 || offs (exp
) > 63)
4056 if (offs (exp
) < -128 || offs (exp
) > 127)
4060 if (offs (exp
) < 0 || offs (exp
) > 4095)
4063 as_warn ("expression out of range: defaulting to 0");
4071 else if (exp
->exp
.X_op
== O_big
)
4073 if (offs (exp
) <= 0 /* flonum */
4074 && (ok
== 80 /* no bignums */
4075 || (ok
> 10 /* small-int ranges including 0 ok */
4076 /* If we have a flonum zero, a zero integer should
4077 do as well (e.g., in moveq). */
4078 && generic_floating_point_number
.exponent
== 0
4079 && generic_floating_point_number
.low
[0] == 0)))
4081 /* HACK! Turn it into a long */
4082 LITTLENUM_TYPE words
[6];
4084 gen_to_words (words
, 2, 8L); /* These numbers are magic! */
4085 op (exp
) = O_constant
;
4088 offs (exp
) = words
[1] | (words
[0] << 16);
4092 op (exp
) = O_constant
;
4095 offs (exp
) = (ok
== 10) ? 1 : 0;
4096 as_warn ("Can't deal with expression; defaulting to %ld",
4102 if (ok
>= 10 && ok
<= 70)
4104 op (exp
) = O_constant
;
4107 offs (exp
) = (ok
== 10) ? 1 : 0;
4108 as_warn ("Can't deal with expression; defaulting to %ld",
4113 if (exp
->size
!= SIZE_UNSPEC
)
4121 if (!isbyte (offs (exp
)))
4122 as_warn ("expression doesn't fit in BYTE");
4125 if (!isword (offs (exp
)))
4126 as_warn ("expression doesn't fit in WORD");
4134 /* These are the back-ends for the various machine dependent pseudo-ops. */
4135 void demand_empty_rest_of_line (); /* Hate those extra verbose names */
4141 subseg_set (data_section
, 1);
4142 demand_empty_rest_of_line ();
4149 subseg_set (data_section
, 2);
4150 demand_empty_rest_of_line ();
4157 /* We don't support putting frags in the BSS segment, we fake it
4158 by marking in_bss, then looking at s_skip for clues. */
4160 subseg_set (bss_section
, 0);
4161 demand_empty_rest_of_line ();
4169 register long temp_fill
;
4171 temp
= 1; /* JF should be 2? */
4172 temp_fill
= get_absolute_expression ();
4173 if (!need_pass_2
) /* Never make frag if expect extra pass. */
4174 frag_align (temp
, (int) temp_fill
);
4175 demand_empty_rest_of_line ();
4182 demand_empty_rest_of_line ();
4185 /* Pseudo-ops handled for MRI compatibility. */
4187 /* Handle an MRI style chip specification. */
4196 s
= input_line_pointer
;
4197 c
= get_symbol_end ();
4198 for (i
= 0; i
< n_archs
; i
++)
4199 if (strcasecmp (s
, archs
[i
].name
) == 0)
4203 as_bad ("%s: unrecognized processor name", s
);
4204 *input_line_pointer
= c
;
4205 ignore_rest_of_line ();
4208 *input_line_pointer
= c
;
4210 if (*input_line_pointer
== '/')
4211 current_architecture
= 0;
4213 current_architecture
&= m68881
| m68851
;
4214 current_architecture
|= archs
[i
].arch
;
4216 while (*input_line_pointer
== '/')
4218 ++input_line_pointer
;
4219 s
= input_line_pointer
;
4220 c
= get_symbol_end ();
4221 if (strcmp (s
, "68881") == 0)
4222 current_architecture
|= m68881
;
4223 else if (strcmp (s
, "68851") == 0)
4224 current_architecture
|= m68851
;
4225 *input_line_pointer
= c
;
4229 /* The MRI CHIP pseudo-op. */
4236 demand_empty_rest_of_line ();
4239 /* The MRI FOPT pseudo-op. */
4247 if (strncasecmp (input_line_pointer
, "ID=", 3) == 0)
4251 input_line_pointer
+= 3;
4252 temp
= get_absolute_expression ();
4253 if (temp
< 0 || temp
> 7)
4254 as_bad ("bad coprocessor id");
4256 m68k_float_copnum
= COP0
+ temp
;
4260 as_bad ("unrecognized fopt option");
4261 ignore_rest_of_line ();
4265 demand_empty_rest_of_line ();
4268 /* The structure used to handle the MRI OPT pseudo-op. */
4272 /* The name of the option. */
4275 /* If this is not NULL, just call this function. The first argument
4276 is the ARG field of this structure, the second argument is
4277 whether the option was negated. */
4278 void (*pfn
) PARAMS ((int arg
, int on
));
4280 /* If this is not NULL, and the PFN field is NULL, set the variable
4281 this points to. Set it to the ARG field if the option was not
4282 negated, and the NOTARG field otherwise. */
4285 /* The value to pass to PFN or to assign to *PVAR. */
4288 /* The value to assign to *PVAR if the option is negated. If PFN is
4289 NULL, and PVAR is not NULL, and ARG and NOTARG are the same, then
4290 the option may not be negated. */
4294 /* The table used to handle the MRI OPT pseudo-op. */
4296 static void skip_to_comma
PARAMS ((int, int));
4297 static void opt_nest
PARAMS ((int, int));
4298 static void opt_chip
PARAMS ((int, int));
4299 static void opt_list
PARAMS ((int, int));
4300 static void opt_list_symbols
PARAMS ((int, int));
4302 static const struct opt_action opt_table
[] =
4304 { "abspcadd", 0, &m68k_abspcadd
, 1, 0 },
4306 /* We do relaxing, so there is little use for these options. */
4307 { "b", 0, 0, 0, 0 },
4308 { "brs", 0, 0, 0, 0 },
4309 { "brb", 0, 0, 0, 0 },
4310 { "brl", 0, 0, 0, 0 },
4311 { "brw", 0, 0, 0, 0 },
4313 { "c", 0, 0, 0, 0 },
4314 { "cex", 0, 0, 0, 0 },
4315 { "case", 0, &symbols_case_sensitive
, 1, 0 },
4316 { "cl", 0, 0, 0, 0 },
4317 { "cre", 0, 0, 0, 0 },
4318 { "d", 0, &flag_keep_locals
, 1, 0 },
4319 { "e", 0, 0, 0, 0 },
4320 { "f", 0, &flag_short_refs
, 1, 0 },
4321 { "frs", 0, &flag_short_refs
, 1, 0 },
4322 { "frl", 0, &flag_short_refs
, 0, 1 },
4323 { "g", 0, 0, 0, 0 },
4324 { "i", 0, 0, 0, 0 },
4325 { "m", 0, 0, 0, 0 },
4326 { "mex", 0, 0, 0, 0 },
4327 { "mc", 0, 0, 0, 0 },
4328 { "md", 0, 0, 0, 0 },
4329 { "nest", opt_nest
, 0, 0, 0 },
4330 { "next", skip_to_comma
, 0, 0, 0 },
4331 { "o", 0, 0, 0, 0 },
4332 { "old", 0, 0, 0, 0 },
4333 { "op", skip_to_comma
, 0, 0, 0 },
4334 { "pco", 0, 0, 0, 0 },
4335 { "p", opt_chip
, 0, 0, 0 },
4336 { "pcr", 0, 0, 0, 0 },
4337 { "pcs", 0, 0, 0, 0 },
4338 { "r", 0, 0, 0, 0 },
4339 { "quick", 0, &m68k_quick
, 1, 0 },
4340 { "rel32", 0, &m68k_rel32
, 1, 0 },
4341 { "s", opt_list
, 0, 0, 0 },
4342 { "t", opt_list_symbols
, 0, 0, 0 },
4343 { "w", 0, &flag_no_warnings
, 0, 1 },
4347 #define OPTCOUNT (sizeof opt_table / sizeof opt_table[0])
4349 /* The MRI OPT pseudo-op. */
4361 const struct opt_action
*o
;
4366 if (*input_line_pointer
== '-')
4368 ++input_line_pointer
;
4371 else if (strncasecmp (input_line_pointer
, "NO", 2) == 0)
4373 input_line_pointer
+= 2;
4377 s
= input_line_pointer
;
4378 c
= get_symbol_end ();
4380 for (i
= 0, o
= opt_table
; i
< OPTCOUNT
; i
++, o
++)
4382 if (strcasecmp (s
, o
->name
) == 0)
4386 /* Restore input_line_pointer now in case the option
4388 *input_line_pointer
= c
;
4389 (*o
->pfn
) (o
->arg
, t
);
4391 else if (o
->pvar
!= NULL
)
4393 if (! t
&& o
->arg
== o
->notarg
)
4394 as_bad ("option `%s' may not be negated", s
);
4395 *input_line_pointer
= c
;
4396 *o
->pvar
= t
? o
->arg
: o
->notarg
;
4399 *input_line_pointer
= c
;
4405 as_bad ("option `%s' not recognized", s
);
4406 *input_line_pointer
= c
;
4409 while (*input_line_pointer
++ == ',');
4411 /* Move back to terminating character. */
4412 --input_line_pointer
;
4413 demand_empty_rest_of_line ();
4416 /* Skip ahead to a comma. This is used for OPT options which we do
4417 not suppor tand which take arguments. */
4420 skip_to_comma (arg
, on
)
4424 while (*input_line_pointer
!= ','
4425 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
4426 ++input_line_pointer
;
4429 /* Handle the OPT NEST=depth option. */
4436 if (*input_line_pointer
!= '=')
4438 as_bad ("bad format of OPT NEST=depth");
4442 ++input_line_pointer
;
4443 max_macro_nest
= get_absolute_expression ();
4446 /* Handle the OPT P=chip option. */
4453 if (*input_line_pointer
!= '=')
4455 /* This is just OPT P, which we do not support. */
4459 ++input_line_pointer
;
4463 /* Handle the OPT S option. */
4473 /* Handle the OPT T option. */
4476 opt_list_symbols (arg
, on
)
4481 listing
|= LISTING_SYMBOLS
;
4483 listing
&=~ LISTING_SYMBOLS
;
4486 /* Handle the MRI REG pseudo-op. */
4497 if (line_label
== NULL
)
4499 as_bad ("missing label");
4500 ignore_rest_of_line ();
4506 s
= input_line_pointer
;
4507 while (isalnum ((unsigned char) *input_line_pointer
)
4508 #ifdef REGISTER_PREFIX
4509 || *input_line_pointer
== REGISTER_PREFIX
4511 || *input_line_pointer
== '/'
4512 || *input_line_pointer
== '-')
4513 ++input_line_pointer
;
4514 c
= *input_line_pointer
;
4515 *input_line_pointer
= '\0';
4517 if (m68k_ip_op (s
, &rop
) != 0)
4519 if (rop
.error
== NULL
)
4520 as_bad ("bad register list");
4522 as_bad ("bad register list: %s", rop
.error
);
4523 *input_line_pointer
= c
;
4524 ignore_rest_of_line ();
4528 *input_line_pointer
= c
;
4530 if (rop
.mode
== REGLST
)
4532 else if (rop
.mode
== DREG
)
4533 mask
= 1 << (rop
.reg
- DATA0
);
4534 else if (rop
.mode
== AREG
)
4535 mask
= 1 << (rop
.reg
- ADDR0
+ 8);
4536 else if (rop
.mode
== FPREG
)
4537 mask
= 1 << (rop
.reg
- FP0
+ 16);
4538 else if (rop
.mode
== CONTROL
4541 else if (rop
.mode
== CONTROL
4544 else if (rop
.mode
== CONTROL
4549 as_bad ("bad register list");
4550 ignore_rest_of_line ();
4554 S_SET_SEGMENT (line_label
, absolute_section
);
4555 S_SET_VALUE (line_label
, mask
);
4556 line_label
->sy_frag
= &zero_address_frag
;
4560 /* Ignore the comment field. */
4561 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
4562 ++input_line_pointer
;
4565 demand_empty_rest_of_line ();
4568 /* This structure is used for the MRI SAVE and RESTORE pseudo-ops. */
4572 struct save_opts
*next
;
4574 int symbols_case_sensitive
;
4582 /* FIXME: We don't save OPT S. */
4585 /* This variable holds the stack of saved options. */
4587 static struct save_opts
*save_stack
;
4589 /* The MRI SAVE pseudo-op. */
4595 struct save_opts
*s
;
4597 s
= (struct save_opts
*) xmalloc (sizeof (struct save_opts
));
4598 s
->abspcadd
= m68k_abspcadd
;
4599 s
->symbols_case_sensitive
= symbols_case_sensitive
;
4600 s
->keep_locals
= flag_keep_locals
;
4601 s
->short_refs
= flag_short_refs
;
4602 s
->architecture
= current_architecture
;
4603 s
->quick
= m68k_quick
;
4604 s
->rel32
= m68k_rel32
;
4605 s
->listing
= listing
;
4606 s
->no_warnings
= flag_no_warnings
;
4608 s
->next
= save_stack
;
4611 demand_empty_rest_of_line ();
4614 /* The MRI RESTORE pseudo-op. */
4620 struct save_opts
*s
;
4622 if (save_stack
== NULL
)
4624 as_bad ("restore without save");
4625 ignore_rest_of_line ();
4630 save_stack
= s
->next
;
4632 m68k_abspcadd
= s
->abspcadd
;
4633 symbols_case_sensitive
= s
->symbols_case_sensitive
;
4634 flag_keep_locals
= s
->keep_locals
;
4635 flag_short_refs
= s
->short_refs
;
4636 current_architecture
= s
->architecture
;
4637 m68k_quick
= s
->quick
;
4638 m68k_rel32
= s
->rel32
;
4639 listing
= s
->listing
;
4640 flag_no_warnings
= s
->no_warnings
;
4644 demand_empty_rest_of_line ();
4647 /* Types of MRI structured control directives. */
4649 enum mri_control_type
4657 /* This structure is used to stack the MRI structured control
4660 struct mri_control_info
4662 /* The directive within which this one is enclosed. */
4663 struct mri_control_info
*outer
;
4665 /* The type of directive. */
4666 enum mri_control_type type
;
4668 /* Whether an ELSE has been in an IF. */
4671 /* The add or sub statement at the end of a FOR. */
4674 /* The label of the top of a FOR or REPEAT loop. */
4677 /* The label to jump to for the next iteration, or the else
4678 expression of a conditional. */
4681 /* The label to jump to to break out of the loop, or the label past
4682 the end of a conditional. */
4686 /* The stack of MRI structured control directives. */
4688 static struct mri_control_info
*mri_control_stack
;
4690 /* The current MRI structured control directive index number, used to
4691 generate label names. */
4693 static int mri_control_index
;
4695 /* Some function prototypes. */
4697 static char *mri_control_label
PARAMS ((void));
4698 static struct mri_control_info
*push_mri_control
4699 PARAMS ((enum mri_control_type
));
4700 static void pop_mri_control
PARAMS ((void));
4701 static int parse_mri_condition
PARAMS ((int *));
4702 static int parse_mri_control_operand
4703 PARAMS ((int *, const char **, const char **, const char **, const char **));
4704 static int swap_mri_condition
PARAMS ((int));
4705 static int reverse_mri_condition
PARAMS ((int));
4706 static void build_mri_control_operand
4707 PARAMS ((int, int, const char *, const char *, const char *, const char *,
4708 const char *, const char *, int));
4709 static void parse_mri_control_expression
4710 PARAMS ((char *, int, const char *, const char *, int));
4712 /* Generate a new MRI label structured control directive label name. */
4715 mri_control_label ()
4719 n
= (char *) xmalloc (20);
4720 sprintf (n
, "%smc%d", FAKE_LABEL_NAME
, mri_control_index
);
4721 ++mri_control_index
;
4725 /* Create a new MRI structured control directive. */
4727 static struct mri_control_info
*
4728 push_mri_control (type
)
4729 enum mri_control_type type
;
4731 struct mri_control_info
*n
;
4733 n
= (struct mri_control_info
*) xmalloc (sizeof (struct mri_control_info
));
4737 if (type
== mri_if
|| type
== mri_while
)
4740 n
->top
= mri_control_label ();
4741 n
->next
= mri_control_label ();
4742 n
->bottom
= mri_control_label ();
4744 n
->outer
= mri_control_stack
;
4745 mri_control_stack
= n
;
4750 /* Pop off the stack of MRI structured control directives. */
4755 struct mri_control_info
*n
;
4757 n
= mri_control_stack
;
4758 mri_control_stack
= n
->outer
;
4766 /* Recognize a condition code in an MRI structured control expression. */
4769 parse_mri_condition (pcc
)
4774 know (*input_line_pointer
== '<');
4776 ++input_line_pointer
;
4777 c1
= *input_line_pointer
++;
4778 c2
= *input_line_pointer
++;
4780 if (*input_line_pointer
!= '>')
4782 as_bad ("syntax error in structured control directive");
4786 ++input_line_pointer
;
4794 *pcc
= (c1
<< 8) | c2
;
4799 /* Parse a single operand in an MRI structured control expression. */
4802 parse_mri_control_operand (pcc
, leftstart
, leftstop
, rightstart
, rightstop
)
4804 const char **leftstart
;
4805 const char **leftstop
;
4806 const char **rightstart
;
4807 const char **rightstop
;
4819 if (*input_line_pointer
== '<')
4821 /* It's just a condition code. */
4822 return parse_mri_condition (pcc
);
4825 /* Look ahead for the condition code. */
4826 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
4828 if (*s
== '<' && s
[1] != '\0' && s
[2] != '\0' && s
[3] == '>')
4833 as_bad ("missing condition code in structured control directive");
4837 *leftstart
= input_line_pointer
;
4839 if (*leftstop
> *leftstart
4840 && ((*leftstop
)[-1] == ' ' || (*leftstop
)[-1] == '\t'))
4843 input_line_pointer
= s
;
4844 if (! parse_mri_condition (pcc
))
4847 /* Look ahead for AND or OR or end of line. */
4848 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
4850 if ((strncasecmp (s
, "AND", 3) == 0
4851 && (s
[3] == '.' || ! is_part_of_name (s
[3])))
4852 || (strncasecmp (s
, "OR", 2) == 0
4853 && (s
[2] == '.' || ! is_part_of_name (s
[2]))))
4857 *rightstart
= input_line_pointer
;
4859 if (*rightstop
> *rightstart
4860 && ((*rightstop
)[-1] == ' ' || (*rightstop
)[-1] == '\t'))
4863 input_line_pointer
= s
;
4868 #define MCC(b1, b2) (((b1) << 8) | (b2))
4870 /* Swap the sense of a condition. This changes the condition so that
4871 it generates the same result when the operands are swapped. */
4874 swap_mri_condition (cc
)
4879 case MCC ('h', 'i'): return MCC ('c', 's');
4880 case MCC ('l', 's'): return MCC ('c', 'c');
4881 case MCC ('c', 'c'): return MCC ('l', 's');
4882 case MCC ('c', 's'): return MCC ('h', 'i');
4883 case MCC ('p', 'l'): return MCC ('m', 'i');
4884 case MCC ('m', 'i'): return MCC ('p', 'l');
4885 case MCC ('g', 'e'): return MCC ('l', 'e');
4886 case MCC ('l', 't'): return MCC ('g', 't');
4887 case MCC ('g', 't'): return MCC ('l', 't');
4888 case MCC ('l', 'e'): return MCC ('g', 'e');
4893 /* Reverse the sense of a condition. */
4896 reverse_mri_condition (cc
)
4901 case MCC ('h', 'i'): return MCC ('l', 's');
4902 case MCC ('l', 's'): return MCC ('h', 'i');
4903 case MCC ('c', 'c'): return MCC ('c', 's');
4904 case MCC ('c', 's'): return MCC ('c', 'c');
4905 case MCC ('n', 'e'): return MCC ('e', 'q');
4906 case MCC ('e', 'q'): return MCC ('n', 'e');
4907 case MCC ('v', 'c'): return MCC ('v', 's');
4908 case MCC ('v', 's'): return MCC ('v', 'c');
4909 case MCC ('p', 'l'): return MCC ('m', 'i');
4910 case MCC ('m', 'i'): return MCC ('p', 'l');
4911 case MCC ('g', 'e'): return MCC ('l', 't');
4912 case MCC ('l', 't'): return MCC ('g', 'e');
4913 case MCC ('g', 't'): return MCC ('l', 'e');
4914 case MCC ('l', 'e'): return MCC ('g', 't');
4919 /* Build an MRI structured control expression. This generates test
4920 and branch instructions. It goes to TRUELAB if the condition is
4921 true, and to FALSELAB if the condition is false. Exactly one of
4922 TRUELAB and FALSELAB will be NULL, meaning to fall through. QUAL
4923 is the size qualifier for the expression. EXTENT is the size to
4924 use for the branch. */
4927 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
4928 rightstop
, truelab
, falselab
, extent
)
4931 const char *leftstart
;
4932 const char *leftstop
;
4933 const char *rightstart
;
4934 const char *rightstop
;
4935 const char *truelab
;
4936 const char *falselab
;
4942 /* The 68k can't do a general comparision with an immediate operand
4943 on the right hand side. */
4944 if (rightstart
!= NULL
&& *rightstart
== '#')
4948 cc
= swap_mri_condition (cc
);
4950 leftstart
= rightstart
;
4953 leftstop
= rightstop
;
4957 if (truelab
== NULL
)
4959 cc
= reverse_mri_condition (cc
);
4963 if (leftstart
!= NULL
)
4965 buf
= (char *) xmalloc (20
4966 + (leftstop
- leftstart
)
4967 + (rightstop
- rightstart
));
4975 memcpy (s
, leftstart
, leftstop
- leftstart
);
4976 s
+= leftstop
- leftstart
;
4978 memcpy (s
, rightstart
, rightstop
- rightstart
);
4979 s
+= rightstop
- rightstart
;
4985 buf
= (char *) xmalloc (20 + strlen (truelab
));
4993 strcpy (s
, truelab
);
4998 /* Parse an MRI structured control expression. This generates test
4999 and branch instructions. STOP is where the expression ends. It
5000 goes to TRUELAB if the condition is true, and to FALSELAB if the
5001 condition is false. Exactly one of TRUELAB and FALSELAB will be
5002 NULL, meaning to fall through. QUAL is the size qualifier for the
5003 expression. EXTENT is the size to use for the branch. */
5006 parse_mri_control_expression (stop
, qual
, truelab
, falselab
, extent
)
5009 const char *truelab
;
5010 const char *falselab
;
5015 const char *leftstart
;
5016 const char *leftstop
;
5017 const char *rightstart
;
5018 const char *rightstop
;
5023 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5024 &rightstart
, &rightstop
))
5030 if (strncasecmp (input_line_pointer
, "AND", 3) == 0)
5034 if (falselab
!= NULL
)
5037 flab
= mri_control_label ();
5039 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5040 rightstop
, (const char *) NULL
, flab
, extent
);
5042 input_line_pointer
+= 3;
5043 if (*input_line_pointer
!= '.'
5044 || input_line_pointer
[1] == '\0')
5048 qual
= input_line_pointer
[1];
5049 input_line_pointer
+= 2;
5052 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5053 &rightstart
, &rightstop
))
5059 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5060 rightstop
, truelab
, falselab
, extent
);
5062 if (falselab
== NULL
)
5065 else if (strncasecmp (input_line_pointer
, "OR", 2) == 0)
5069 if (truelab
!= NULL
)
5072 tlab
= mri_control_label ();
5074 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5075 rightstop
, tlab
, (const char *) NULL
, extent
);
5077 input_line_pointer
+= 2;
5078 if (*input_line_pointer
!= '.'
5079 || input_line_pointer
[1] == '\0')
5083 qual
= input_line_pointer
[1];
5084 input_line_pointer
+= 2;
5087 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5088 &rightstart
, &rightstop
))
5094 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5095 rightstop
, truelab
, falselab
, extent
);
5097 if (truelab
== NULL
)
5102 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5103 rightstop
, truelab
, falselab
, extent
);
5107 if (input_line_pointer
!= stop
)
5108 as_bad ("syntax error in structured control directive");
5111 /* Handle the MRI IF pseudo-op. This may be a structured control
5112 directive, or it may be a regular assembler conditional, depending
5121 struct mri_control_info
*n
;
5123 /* A structured control directive must end with THEN with an
5124 optional qualifier. */
5125 s
= input_line_pointer
;
5126 while (! is_end_of_line
[(unsigned char) *s
])
5129 while (s
> input_line_pointer
&& (*s
== ' ' || *s
== '\t'))
5132 if (s
- input_line_pointer
> 1
5136 if (s
- input_line_pointer
< 3
5137 || strncasecmp (s
- 3, "THEN", 4) != 0)
5141 as_bad ("missing then");
5142 ignore_rest_of_line ();
5146 /* It's a conditional. */
5151 /* Since this might be a conditional if, this pseudo-op will be
5152 called even if we are supported to be ignoring input. Double
5153 check now. Clobber *input_line_pointer so that ignore_input
5154 thinks that this is not a special pseudo-op. */
5155 c
= *input_line_pointer
;
5156 *input_line_pointer
= 0;
5157 if (ignore_input ())
5159 *input_line_pointer
= c
;
5160 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5161 ++input_line_pointer
;
5162 demand_empty_rest_of_line ();
5165 *input_line_pointer
= c
;
5167 n
= push_mri_control (mri_if
);
5169 parse_mri_control_expression (s
- 3, qual
, (const char *) NULL
,
5170 n
->next
, s
[1] == '.' ? s
[2] : '\0');
5173 input_line_pointer
= s
+ 3;
5175 input_line_pointer
= s
+ 1;
5177 demand_empty_rest_of_line ();
5180 /* Handle the MRI else pseudo-op. If we are currently doing an MRI
5181 structured IF, associate the ELSE with the IF. Otherwise, assume
5182 it is a conditional else. */
5193 && (mri_control_stack
== NULL
5194 || mri_control_stack
->type
!= mri_if
5195 || mri_control_stack
->else_seen
))
5201 c
= *input_line_pointer
;
5202 *input_line_pointer
= 0;
5203 if (ignore_input ())
5205 *input_line_pointer
= c
;
5206 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5207 ++input_line_pointer
;
5208 demand_empty_rest_of_line ();
5211 *input_line_pointer
= c
;
5213 if (mri_control_stack
== NULL
5214 || mri_control_stack
->type
!= mri_if
5215 || mri_control_stack
->else_seen
)
5217 as_bad ("else without matching if");
5218 ignore_rest_of_line ();
5222 mri_control_stack
->else_seen
= 1;
5224 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->bottom
));
5227 sprintf (buf
, "bra%s %s", q
, mri_control_stack
->bottom
);
5231 colon (mri_control_stack
->next
);
5233 demand_empty_rest_of_line ();
5236 /* Handle the MRI ENDI pseudo-op. */
5242 if (mri_control_stack
== NULL
5243 || mri_control_stack
->type
!= mri_if
)
5245 as_bad ("endi without matching if");
5246 ignore_rest_of_line ();
5250 /* ignore_input will not return true for ENDI, so we don't need to
5251 worry about checking it again here. */
5253 if (! mri_control_stack
->else_seen
)
5254 colon (mri_control_stack
->next
);
5255 colon (mri_control_stack
->bottom
);
5259 demand_empty_rest_of_line ();
5262 /* Handle the MRI BREAK pseudo-op. */
5265 s_mri_break (extent
)
5268 struct mri_control_info
*n
;
5272 n
= mri_control_stack
;
5274 && n
->type
!= mri_for
5275 && n
->type
!= mri_repeat
5276 && n
->type
!= mri_while
)
5280 as_bad ("break outside of structured loop");
5281 ignore_rest_of_line ();
5285 buf
= (char *) xmalloc (20 + strlen (n
->bottom
));
5288 sprintf (buf
, "bra%s %s", ex
, n
->bottom
);
5292 demand_empty_rest_of_line ();
5295 /* Handle the MRI NEXT pseudo-op. */
5301 struct mri_control_info
*n
;
5305 n
= mri_control_stack
;
5307 && n
->type
!= mri_for
5308 && n
->type
!= mri_repeat
5309 && n
->type
!= mri_while
)
5313 as_bad ("next outside of structured loop");
5314 ignore_rest_of_line ();
5318 buf
= (char *) xmalloc (20 + strlen (n
->next
));
5321 sprintf (buf
, "bra%s %s", ex
, n
->next
);
5325 demand_empty_rest_of_line ();
5328 /* Handle the MRI FOR pseudo-op. */
5334 const char *varstart
, *varstop
;
5335 const char *initstart
, *initstop
;
5336 const char *endstart
, *endstop
;
5337 const char *bystart
, *bystop
;
5341 struct mri_control_info
*n
;
5347 FOR.q var = init { TO | DOWNTO } end [ BY by ] DO.e
5351 varstart
= input_line_pointer
;
5353 /* Look for the '='. */
5354 while (! is_end_of_line
[(unsigned char) *input_line_pointer
]
5355 && *input_line_pointer
!= '=')
5356 ++input_line_pointer
;
5357 if (*input_line_pointer
!= '=')
5359 as_bad ("missing =");
5360 ignore_rest_of_line ();
5364 varstop
= input_line_pointer
;
5365 if (varstop
> varstart
5366 && (varstop
[-1] == ' ' || varstop
[-1] == '\t'))
5369 ++input_line_pointer
;
5371 initstart
= input_line_pointer
;
5373 /* Look for TO or DOWNTO. */
5376 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5378 if (strncasecmp (input_line_pointer
, "TO", 2) == 0
5379 && ! is_part_of_name (input_line_pointer
[2]))
5381 initstop
= input_line_pointer
;
5382 input_line_pointer
+= 2;
5385 if (strncasecmp (input_line_pointer
, "DOWNTO", 6) == 0
5386 && ! is_part_of_name (input_line_pointer
[6]))
5388 initstop
= input_line_pointer
;
5390 input_line_pointer
+= 6;
5393 ++input_line_pointer
;
5395 if (initstop
== NULL
)
5397 as_bad ("missing to or downto");
5398 ignore_rest_of_line ();
5401 if (initstop
> initstart
5402 && (initstop
[-1] == ' ' || initstop
[-1] == '\t'))
5406 endstart
= input_line_pointer
;
5408 /* Look for BY or DO. */
5411 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5413 if (strncasecmp (input_line_pointer
, "BY", 2) == 0
5414 && ! is_part_of_name (input_line_pointer
[2]))
5416 endstop
= input_line_pointer
;
5418 input_line_pointer
+= 2;
5421 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
5422 && (input_line_pointer
[2] == '.'
5423 || ! is_part_of_name (input_line_pointer
[2])))
5425 endstop
= input_line_pointer
;
5426 input_line_pointer
+= 2;
5429 ++input_line_pointer
;
5431 if (endstop
== NULL
)
5433 as_bad ("missing do");
5434 ignore_rest_of_line ();
5437 if (endstop
> endstart
5438 && (endstop
[-1] == ' ' || endstop
[-1] == '\t'))
5444 bystop
= bystart
+ 2;
5449 bystart
= input_line_pointer
;
5453 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5455 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
5456 && (input_line_pointer
[2] == '.'
5457 || ! is_part_of_name (input_line_pointer
[2])))
5459 bystop
= input_line_pointer
;
5460 input_line_pointer
+= 2;
5463 ++input_line_pointer
;
5467 as_bad ("missing do");
5468 ignore_rest_of_line ();
5471 if (bystop
> bystart
5472 && (bystop
[-1] == ' ' || bystop
[-1] == '\t'))
5476 if (*input_line_pointer
!= '.')
5480 extent
= input_line_pointer
[1];
5481 input_line_pointer
+= 2;
5484 /* We have fully parsed the FOR operands. Now build the loop. */
5486 n
= push_mri_control (mri_for
);
5488 buf
= (char *) xmalloc (50 + (input_line_pointer
- varstart
));
5499 memcpy (s
, initstart
, initstop
- initstart
);
5500 s
+= initstop
- initstart
;
5502 memcpy (s
, varstart
, varstop
- varstart
);
5503 s
+= varstop
- varstart
;
5517 memcpy (s
, endstart
, endstop
- endstart
);
5518 s
+= endstop
- endstart
;
5520 memcpy (s
, varstart
, varstop
- varstart
);
5521 s
+= varstop
- varstart
;
5529 sprintf (buf
, "blt%s %s", ex
, n
->bottom
);
5531 sprintf (buf
, "bgt%s %s", ex
, n
->bottom
);
5534 /* Put together the add or sub instruction used by ENDF. */
5544 memcpy (s
, bystart
, bystop
- bystart
);
5545 s
+= bystop
- bystart
;
5547 memcpy (s
, varstart
, varstop
- varstart
);
5548 s
+= varstop
- varstart
;
5552 demand_empty_rest_of_line ();
5555 /* Handle the MRI ENDF pseudo-op. */
5561 if (mri_control_stack
== NULL
5562 || mri_control_stack
->type
!= mri_for
)
5564 as_bad ("endf without for");
5565 ignore_rest_of_line ();
5569 colon (mri_control_stack
->next
);
5571 md_assemble (mri_control_stack
->incr
);
5573 sprintf (mri_control_stack
->incr
, "bra %s", mri_control_stack
->top
);
5574 md_assemble (mri_control_stack
->incr
);
5576 free (mri_control_stack
->incr
);
5578 colon (mri_control_stack
->bottom
);
5582 demand_empty_rest_of_line ();
5585 /* Handle the MRI REPEAT pseudo-op. */
5588 s_mri_repeat (ignore
)
5591 struct mri_control_info
*n
;
5593 n
= push_mri_control (mri_repeat
);
5595 demand_empty_rest_of_line ();
5598 /* Handle the MRI UNTIL pseudo-op. */
5606 if (mri_control_stack
== NULL
5607 || mri_control_stack
->type
!= mri_repeat
)
5609 as_bad ("until without repeat");
5610 ignore_rest_of_line ();
5614 colon (mri_control_stack
->next
);
5616 for (s
= input_line_pointer
; ! is_end_of_line
[(unsigned char) *s
]; s
++)
5619 parse_mri_control_expression (s
, qual
, (const char *) NULL
,
5620 mri_control_stack
->top
, '\0');
5622 colon (mri_control_stack
->bottom
);
5624 input_line_pointer
= s
;
5626 demand_empty_rest_of_line ();
5629 /* Handle the MRI WHILE pseudo-op. */
5637 struct mri_control_info
*n
;
5639 s
= input_line_pointer
;
5640 while (! is_end_of_line
[(unsigned char) *s
])
5643 while (*s
== ' ' || *s
== '\t')
5645 if (s
- input_line_pointer
> 1
5648 if (s
- input_line_pointer
< 2
5649 || strncasecmp (s
- 1, "DO", 2) != 0)
5651 as_bad ("missing do");
5652 ignore_rest_of_line ();
5656 n
= push_mri_control (mri_while
);
5660 parse_mri_control_expression (s
- 1, qual
, (const char *) NULL
, n
->bottom
,
5661 s
[1] == '.' ? s
[2] : '\0');
5663 input_line_pointer
= s
+ 1;
5664 if (*input_line_pointer
== '.')
5665 input_line_pointer
+= 2;
5667 demand_empty_rest_of_line ();
5670 /* Handle the MRI ENDW pseudo-op. */
5678 if (mri_control_stack
== NULL
5679 || mri_control_stack
->type
!= mri_while
)
5681 as_bad ("endw without while");
5682 ignore_rest_of_line ();
5686 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->next
));
5687 sprintf (buf
, "bra %s", mri_control_stack
->next
);
5691 colon (mri_control_stack
->bottom
);
5695 demand_empty_rest_of_line ();
5700 * Invocation line includes a switch not recognized by the base assembler.
5701 * See if it's a processor-specific option. These are:
5703 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
5704 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
5705 * Select the architecture. Instructions or features not
5706 * supported by the selected architecture cause fatal
5707 * errors. More than one may be specified. The default is
5708 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
5709 * for -m68000, and -m68882 is a synonym for -m68881.
5710 * -[A]m[c]no-68851, -[A]m[c]no-68881
5711 * Don't accept 688?1 instructions. (The "c" is kind of silly,
5712 * so don't use or document it, but that's the way the parsing
5715 * -pic Indicates PIC.
5716 * -k Indicates PIC. (Sun 3 only.)
5721 CONST
char *md_shortopts
= "lSA:m:kQ:V";
5723 CONST
char *md_shortopts
= "lSA:m:k";
5726 struct option md_longopts
[] = {
5727 #define OPTION_PIC (OPTION_MD_BASE)
5728 {"pic", no_argument
, NULL
, OPTION_PIC
},
5729 #define OPTION_REGISTER_PREFIX_OPTIONAL (OPTION_MD_BASE + 1)
5730 {"register-prefix-optional", no_argument
, NULL
,
5731 OPTION_REGISTER_PREFIX_OPTIONAL
},
5732 {NULL
, no_argument
, NULL
, 0}
5734 size_t md_longopts_size
= sizeof(md_longopts
);
5737 md_parse_option (c
, arg
)
5743 case 'l': /* -l means keep external to 2 bit offset
5744 rather than 16 bit one */
5745 flag_short_refs
= 1;
5748 case 'S': /* -S means that jbsr's always turn into
5750 flag_long_jumps
= 1;
5756 /* intentional fall-through */
5759 if (arg
[0] == 'n' && arg
[1] == 'o' && arg
[2] == '-')
5763 const char *oarg
= arg
;
5769 if (arg
[0] == 'c' && arg
[1] == '6')
5772 for (i
= 0; i
< n_archs
; i
++)
5773 if (!strcmp (arg
, archs
[i
].name
))
5778 as_bad ("unrecognized option `%s'", oarg
);
5781 arch
= archs
[i
].arch
;
5784 else if (arch
== m68851
)
5793 if (arg
[0] == 'c' && arg
[1] == '6')
5796 for (i
= 0; i
< n_archs
; i
++)
5797 if (!strcmp (arg
, archs
[i
].name
))
5799 unsigned long arch
= archs
[i
].arch
;
5800 if (cpu_of_arch (arch
))
5801 /* It's a cpu spec. */
5803 current_architecture
&= ~m68000up
;
5804 current_architecture
|= arch
;
5806 else if (arch
== m68881
)
5808 current_architecture
|= m68881
;
5811 else if (arch
== m68851
)
5813 current_architecture
|= m68851
;
5823 as_bad ("unrecognized architecture specification `%s'", arg
);
5832 break; /* -pic, Position Independent Code */
5834 case OPTION_REGISTER_PREFIX_OPTIONAL
:
5835 flag_reg_prefix_optional
= 1;
5850 md_show_usage (stream
)
5855 -l use 1 word for refs to undefined symbols [default 2]\n\
5856 -m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060\n\
5857 | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360\n\
5859 specify variant of 680X0 architecture [default 68020]\n\
5860 -m68881 | -m68882 | -mno-68881 | -mno-68882\n\
5861 target has/lacks floating-point coprocessor\n\
5862 [default yes for 68020, 68030, and cpu32]\n");
5864 -m68851 | -mno-68851\n\
5865 target has/lacks memory-management unit coprocessor\n\
5866 [default yes for 68020 and up]\n\
5867 -pic, -k generate position independent code\n\
5868 -S turn jbsr into jsr\n\
5869 --register-prefix-optional\n\
5870 recognize register names without prefix character\n");
5875 /* TEST2: Test md_assemble() */
5876 /* Warning, this routine probably doesn't work anymore */
5880 struct m68k_it the_ins
;
5888 if (!gets (buf
) || !*buf
)
5890 if (buf
[0] == '|' || buf
[1] == '.')
5892 for (cp
= buf
; *cp
; cp
++)
5897 memset (&the_ins
, '\0', sizeof (the_ins
));
5898 m68k_ip (&the_ins
, buf
);
5901 printf ("Error %s in %s\n", the_ins
.error
, buf
);
5905 printf ("Opcode(%d.%s): ", the_ins
.numo
, the_ins
.args
);
5906 for (n
= 0; n
< the_ins
.numo
; n
++)
5907 printf (" 0x%x", the_ins
.opcode
[n
] & 0xffff);
5909 print_the_insn (&the_ins
.opcode
[0], stdout
);
5910 (void) putchar ('\n');
5912 for (n
= 0; n
< strlen (the_ins
.args
) / 2; n
++)
5914 if (the_ins
.operands
[n
].error
)
5916 printf ("op%d Error %s in %s\n", n
, the_ins
.operands
[n
].error
, buf
);
5919 printf ("mode %d, reg %d, ", the_ins
.operands
[n
].mode
, the_ins
.operands
[n
].reg
);
5920 if (the_ins
.operands
[n
].b_const
)
5921 printf ("Constant: '%.*s', ", 1 + the_ins
.operands
[n
].e_const
- the_ins
.operands
[n
].b_const
, the_ins
.operands
[n
].b_const
);
5922 printf ("ireg %d, isiz %d, imul %d, ", the_ins
.operands
[n
].ireg
, the_ins
.operands
[n
].isiz
, the_ins
.operands
[n
].imul
);
5923 if (the_ins
.operands
[n
].b_iadd
)
5924 printf ("Iadd: '%.*s',", 1 + the_ins
.operands
[n
].e_iadd
- the_ins
.operands
[n
].b_iadd
, the_ins
.operands
[n
].b_iadd
);
5925 (void) putchar ('\n');
5937 while (*str
&& *str
!= ' ')
5939 if (str
[-1] == ':' || str
[1] == '=')
5946 /* Possible states for relaxation:
5948 0 0 branch offset byte (bra, etc)
5952 1 0 indexed offsets byte a0@(32,d4:w:1) etc
5956 2 0 two-offset index word-word a0@(32,d4)@(45) etc
5963 /* We have no need to default values of symbols. */
5967 md_undefined_symbol (name
)
5973 /* Round up a section size to the appropriate boundary. */
5975 md_section_align (segment
, size
)
5979 return size
; /* Byte alignment is fine */
5982 /* Exactly what point is a PC-relative offset relative TO?
5983 On the 68k, it is relative to the address of the first extension
5984 word. The difference between the addresses of the offset and the
5985 first extension word is stored in fx_pcrel_adjust. */
5987 md_pcrel_from (fixP
)
5992 /* Because fx_pcrel_adjust is a char, and may be unsigned, we store
5994 adjust
= fixP
->fx_pcrel_adjust
;
5997 return fixP
->fx_where
+ fixP
->fx_frag
->fr_address
- adjust
;
6000 #ifndef BFD_ASSEMBLER
6003 tc_coff_symbol_emit_hook (ignore
)
6009 tc_coff_sizemachdep (frag
)
6012 switch (frag
->fr_subtype
& 0x3)
6027 /* end of tc-m68k.c */