1 /* tc-m68k.c -- Assemble for the m68k family
2 Copyright (C) 1987, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 #include "opcode/m68k.h"
28 #include "m68k-parse.h"
34 /* This string holds the chars that always start a comment. If the
35 pre-processor is disabled, these aren't very useful. The macro
36 tc_comment_chars points to this. We use this, rather than the
37 usual comment_chars, so that the --bitwise-or option will work. */
38 #if defined (TE_SVR4) || defined (TE_DELTA)
39 const char *m68k_comment_chars
= "|#";
41 const char *m68k_comment_chars
= "|";
44 /* This array holds the chars that only start a comment at the beginning of
45 a line. If the line seems to have the form '# 123 filename'
46 .line and .file directives will appear in the pre-processed output */
47 /* Note that input_file.c hand checks for '#' at the beginning of the
48 first line of the input file. This is because the compiler outputs
49 #NO_APP at the beginning of its output. */
50 /* Also note that comments like this one will always work. */
51 const char line_comment_chars
[] = "#*";
53 const char line_separator_chars
[] = ";";
55 /* Chars that can be used to separate mant from exp in floating point nums */
56 CONST
char EXP_CHARS
[] = "eE";
58 /* Chars that mean this number is a floating point constant, as
59 in "0f12.456" or "0d1.2345e12". */
61 CONST
char FLT_CHARS
[] = "rRsSfFdDxXeEpP";
63 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
64 changed in read.c . Ideally it shouldn't have to know about it at all,
65 but nothing is ideal around here. */
67 const int md_reloc_size
= 8; /* Size of relocation record */
69 /* Are we trying to generate PIC code? If so, absolute references
70 ought to be made into linkage table references or pc-relative
71 references. Not implemented. For ELF there are other means
72 to denote pic relocations. */
75 static int flag_short_refs
; /* -l option */
76 static int flag_long_jumps
; /* -S option */
77 static int flag_keep_pcrel
; /* --pcrel option. */
79 #ifdef REGISTER_PREFIX_OPTIONAL
80 int flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
82 int flag_reg_prefix_optional
;
85 /* Whether --register-prefix-optional was used on the command line. */
86 static int reg_prefix_optional_seen
;
88 /* The floating point coprocessor to use by default. */
89 static enum m68k_register m68k_float_copnum
= COP1
;
91 /* If this is non-zero, then references to number(%pc) will be taken
92 to refer to number, rather than to %pc + number. */
93 static int m68k_abspcadd
;
95 /* If this is non-zero, then the quick forms of the move, add, and sub
96 instructions are used when possible. */
97 static int m68k_quick
= 1;
99 /* If this is non-zero, then if the size is not specified for a base
100 or outer displacement, the assembler assumes that the size should
102 static int m68k_rel32
= 1;
104 /* This is non-zero if m68k_rel32 was set from the command line. */
105 static int m68k_rel32_from_cmdline
;
107 /* The default width to use for an index register when using a base
109 static enum m68k_size m68k_index_width_default
= SIZE_LONG
;
111 /* We want to warn if any text labels are misaligned. In order to get
112 the right line number, we need to record the line number for each
117 struct label_line
*next
;
124 /* The list of labels. */
126 static struct label_line
*labels
;
128 /* The current label. */
130 static struct label_line
*current_label
;
132 /* Its an arbitrary name: This means I don't approve of it */
133 /* See flames below */
134 static struct obstack robyn
;
138 const char *m_operands
;
139 unsigned long m_opcode
;
143 struct m68k_incant
*m_next
;
146 #define getone(x) ((((x)->m_opcode)>>16)&0xffff)
147 #define gettwo(x) (((x)->m_opcode)&0xffff)
149 static const enum m68k_register m68000_control_regs
[] = { 0 };
150 static const enum m68k_register m68010_control_regs
[] = {
154 static const enum m68k_register m68020_control_regs
[] = {
155 SFC
, DFC
, USP
, VBR
, CACR
, CAAR
, MSP
, ISP
,
158 static const enum m68k_register m68040_control_regs
[] = {
159 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
,
160 USP
, VBR
, MSP
, ISP
, MMUSR
, URP
, SRP
,
163 static const enum m68k_register m68060_control_regs
[] = {
164 SFC
, DFC
, CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, BUSCR
,
165 USP
, VBR
, URP
, SRP
, PCR
,
168 static const enum m68k_register mcf_control_regs
[] = {
169 CACR
, TC
, ITT0
, ITT1
, DTT0
, DTT1
, VBR
, ROMBAR
,
170 RAMBAR0
, RAMBAR1
, MBAR
,
173 #define cpu32_control_regs m68010_control_regs
175 static const enum m68k_register
*control_regs
;
177 /* internal form of a 68020 instruction */
181 const char *args
; /* list of opcode info */
184 int numo
; /* Number of shorts in opcode */
187 struct m68k_op operands
[6];
189 int nexp
; /* number of exprs in use */
190 struct m68k_exp exprs
[4];
192 int nfrag
; /* Number of frags we have to produce */
195 int fragoff
; /* Where in the current opcode the frag ends */
202 int nrel
; /* Num of reloc strucs in use */
209 /* In a pc relative address the difference between the address
210 of the offset and the address that the offset is relative
211 to. This depends on the addressing mode. Basically this
212 is the value to put in the offset field to address the
213 first byte of the offset, without regarding the special
214 significance of some values (in the branch instruction, for
218 /* Whether this expression needs special pic relocation, and if
220 enum pic_relocation pic_reloc
;
223 reloc
[5]; /* Five is enough??? */
226 #define cpu_of_arch(x) ((x) & (m68000up|mcf))
227 #define float_of_arch(x) ((x) & mfloat)
228 #define mmu_of_arch(x) ((x) & mmmu)
229 #define arch_coldfire_p(x) (((x) & mcf) != 0)
231 /* Macros for determining if cpu supports a specific addressing mode */
232 #define HAVE_LONG_BRANCH(x) ((x) & (m68020|m68030|m68040|m68060|cpu32))
234 static struct m68k_it the_ins
; /* the instruction being assembled */
236 #define op(ex) ((ex)->exp.X_op)
237 #define adds(ex) ((ex)->exp.X_add_symbol)
238 #define subs(ex) ((ex)->exp.X_op_symbol)
239 #define offs(ex) ((ex)->exp.X_add_number)
241 /* Macros for adding things to the m68k_it struct */
243 #define addword(w) the_ins.opcode[the_ins.numo++]=(w)
245 /* Static functions. */
247 static void insop
PARAMS ((int, const struct m68k_incant
*));
248 static void add_fix
PARAMS ((int, struct m68k_exp
*, int, int));
249 static void add_frag
PARAMS ((symbolS
*, offsetT
, int));
251 /* Like addword, but goes BEFORE general operands */
255 const struct m68k_incant
*opcode
;
258 for(z
=the_ins
.numo
;z
>opcode
->m_codenum
;--z
)
259 the_ins
.opcode
[z
]=the_ins
.opcode
[z
-1];
260 for(z
=0;z
<the_ins
.nrel
;z
++)
261 the_ins
.reloc
[z
].n
+=2;
262 for (z
= 0; z
< the_ins
.nfrag
; z
++)
263 the_ins
.fragb
[z
].fragoff
++;
264 the_ins
.opcode
[opcode
->m_codenum
]=w
;
268 /* The numo+1 kludge is so we can hit the low order byte of the prev word.
271 add_fix (width
, exp
, pc_rel
, pc_fix
)
273 struct m68k_exp
*exp
;
277 the_ins
.reloc
[the_ins
.nrel
].n
= ((width
== 'B' || width
== '3')
281 : (the_ins
.numo
*2)));
282 the_ins
.reloc
[the_ins
.nrel
].exp
= exp
->exp
;
283 the_ins
.reloc
[the_ins
.nrel
].wid
= width
;
284 the_ins
.reloc
[the_ins
.nrel
].pcrel_fix
= pc_fix
;
286 the_ins
.reloc
[the_ins
.nrel
].pic_reloc
= exp
->pic_reloc
;
288 the_ins
.reloc
[the_ins
.nrel
++].pcrel
= pc_rel
;
291 /* Cause an extra frag to be generated here, inserting up to 10 bytes
292 (that value is chosen in the frag_var call in md_assemble). TYPE
293 is the subtype of the frag to be generated; its primary type is
294 rs_machine_dependent.
296 The TYPE parameter is also used by md_convert_frag_1 and
297 md_estimate_size_before_relax. The appropriate type of fixup will
298 be emitted by md_convert_frag_1.
300 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
302 add_frag (add
, off
, type
)
307 the_ins
.fragb
[the_ins
.nfrag
].fragoff
=the_ins
.numo
;
308 the_ins
.fragb
[the_ins
.nfrag
].fadd
=add
;
309 the_ins
.fragb
[the_ins
.nfrag
].foff
=off
;
310 the_ins
.fragb
[the_ins
.nfrag
++].fragty
=type
;
314 (op (ex) != O_constant && op (ex) != O_big)
316 static char *crack_operand
PARAMS ((char *str
, struct m68k_op
*opP
));
317 static int get_num
PARAMS ((struct m68k_exp
*exp
, int ok
));
318 static void m68k_ip
PARAMS ((char *));
319 static void insert_reg
PARAMS ((const char *, int));
320 static void select_control_regs
PARAMS ((void));
321 static void init_regtable
PARAMS ((void));
322 static int reverse_16_bits
PARAMS ((int in
));
323 static int reverse_8_bits
PARAMS ((int in
));
324 static void install_gen_operand
PARAMS ((int mode
, int val
));
325 static void install_operand
PARAMS ((int mode
, int val
));
326 static void s_bss
PARAMS ((int));
327 static void s_data1
PARAMS ((int));
328 static void s_data2
PARAMS ((int));
329 static void s_even
PARAMS ((int));
330 static void s_proc
PARAMS ((int));
331 static void mri_chip
PARAMS ((void));
332 static void s_chip
PARAMS ((int));
333 static void s_fopt
PARAMS ((int));
334 static void s_opt
PARAMS ((int));
335 static void s_reg
PARAMS ((int));
336 static void s_restore
PARAMS ((int));
337 static void s_save
PARAMS ((int));
338 static void s_mri_if
PARAMS ((int));
339 static void s_mri_else
PARAMS ((int));
340 static void s_mri_endi
PARAMS ((int));
341 static void s_mri_break
PARAMS ((int));
342 static void s_mri_next
PARAMS ((int));
343 static void s_mri_for
PARAMS ((int));
344 static void s_mri_endf
PARAMS ((int));
345 static void s_mri_repeat
PARAMS ((int));
346 static void s_mri_until
PARAMS ((int));
347 static void s_mri_while
PARAMS ((int));
348 static void s_mri_endw
PARAMS ((int));
349 static void md_apply_fix_2
PARAMS ((fixS
*, offsetT
));
350 static void md_convert_frag_1
PARAMS ((fragS
*));
352 static int current_architecture
;
360 static const struct m68k_cpu archs
[] = {
361 { m68000
, "68000", 0 },
362 { m68010
, "68010", 0 },
363 { m68020
, "68020", 0 },
364 { m68030
, "68030", 0 },
365 { m68040
, "68040", 0 },
366 { m68060
, "68060", 0 },
367 { cpu32
, "cpu32", 0 },
368 { m68881
, "68881", 0 },
369 { m68851
, "68851", 0 },
370 { mcf5200
, "5200", 0 },
371 { mcf5206e
, "5206e", 0 },
372 { mcf5307
, "5307", 0},
373 /* Aliases (effectively, so far as gas is concerned) for the above
375 { m68020
, "68k", 1 },
376 { m68000
, "68008", 1 },
377 { m68000
, "68302", 1 },
378 { m68000
, "68306", 1 },
379 { m68000
, "68307", 1 },
380 { m68000
, "68322", 1 },
381 { m68000
, "68356", 1 },
382 { m68000
, "68ec000", 1 },
383 { m68000
, "68hc000", 1 },
384 { m68000
, "68hc001", 1 },
385 { m68020
, "68ec020", 1 },
386 { m68030
, "68ec030", 1 },
387 { m68040
, "68ec040", 1 },
388 { m68060
, "68ec060", 1 },
389 { cpu32
, "68330", 1 },
390 { cpu32
, "68331", 1 },
391 { cpu32
, "68332", 1 },
392 { cpu32
, "68333", 1 },
393 { cpu32
, "68334", 1 },
394 { cpu32
, "68336", 1 },
395 { cpu32
, "68340", 1 },
396 { cpu32
, "68341", 1 },
397 { cpu32
, "68349", 1 },
398 { cpu32
, "68360", 1 },
399 { m68881
, "68882", 1 },
400 { mcf5200
, "5202", 1 },
401 { mcf5200
, "5204", 1 },
402 { mcf5200
, "5206", 1 },
405 static const int n_archs
= sizeof (archs
) / sizeof (archs
[0]);
407 /* This is the assembler relaxation table for m68k. m68k is a rich CISC
408 architecture and we have a lot of relaxation modes. */
410 /* Macros used in the relaxation code. */
411 #define TAB(x,y) (((x) << 2) + (y))
412 #define TABTYPE(x) ((x) >> 2)
414 /* Relaxation states. */
420 /* Here are all the relaxation modes we support. First we can relax ordinary
421 branches. On 68020 and higher and on CPU32 all branch instructions take
422 three forms, so on these CPUs all branches always remain as such. When we
423 have to expand to the LONG form on a 68000, though, we substitute an
424 absolute jump instead. This is a direct replacement for unconditional
425 branches and a branch over a jump for conditional branches. However, if the
426 user requires PIC and disables this with --pcrel, we can only relax between
427 BYTE and SHORT forms, punting if that isn't enough. This gives us four
428 different relaxation modes for branches: */
430 #define BRANCHBWL 1 /* branch byte, word, or long */
431 #define BRABSJUNC 2 /* absolute jump for LONG, unconditional */
432 #define BRABSJCOND 3 /* absolute jump for LONG, conditional */
433 #define BRANCHBW 4 /* branch byte or word */
435 /* We also relax coprocessor branches and DBcc's. All CPUs that support
436 coprocessor branches support them in word and long forms, so we have only
437 one relaxation mode for them. DBcc's are word only on all CPUs. We can
438 relax them to the LONG form with a branch-around sequence. This sequence
439 can use a long branch (if available) or an absolute jump (if acceptable).
440 This gives us two relaxation modes. If long branches are not available and
441 absolute jumps are not acceptable, we don't relax DBcc's. */
443 #define FBRANCH 5 /* coprocessor branch */
444 #define DBCCLBR 6 /* DBcc relaxable with a long branch */
445 #define DBCCABSJ 7 /* DBcc relaxable with an absolute jump */
447 /* That's all for instruction relaxation. However, we also relax PC-relative
448 operands. Specifically, we have three operand relaxation modes. On the
449 68000 PC-relative operands can only be 16-bit, but on 68020 and higher and
450 on CPU32 they may be 16-bit or 32-bit. For the latter we relax between the
451 two. Also PC+displacement+index operands in their simple form (with a non-
452 suppressed index without memory indirection) are supported on all CPUs, but
453 on the 68000 the displacement can be 8-bit only, whereas on 68020 and higher
454 and on CPU32 we relax it to SHORT and LONG forms as well using the extended
455 form of the PC+displacement+index operand. Finally, some absolute operands
456 can be relaxed down to 16-bit PC-relative. */
458 #define PCREL1632 8 /* 16-bit or 32-bit PC-relative */
459 #define PCINDEX 9 /* PC+displacement+index */
460 #define ABSTOPCREL 10 /* absolute relax down to 16-bit PC-relative */
462 /* Note that calls to frag_var need to specify the maximum expansion
463 needed; this is currently 10 bytes for DBCC. */
466 How far Forward this mode will reach:
467 How far Backward this mode will reach:
468 How many bytes this mode will add to the size of the frag
469 Which mode to go to if the offset won't fit in this one
471 relax_typeS md_relax_table
[] =
473 {1, 1, 0, 0}, /* First entries aren't used */
474 {1, 1, 0, 0}, /* For no good reason except */
475 {1, 1, 0, 0}, /* that the VAX doesn't either */
478 {(127), (-128), 0, TAB (BRANCHBWL
, SHORT
)},
479 {(32767), (-32768), 2, TAB (BRANCHBWL
, LONG
)},
483 {(127), (-128), 0, TAB (BRABSJUNC
, SHORT
)},
484 {(32767), (-32768), 2, TAB (BRABSJUNC
, LONG
)},
488 {(127), (-128), 0, TAB (BRABSJCOND
, SHORT
)},
489 {(32767), (-32768), 2, TAB (BRABSJCOND
, LONG
)},
493 {(127), (-128), 0, TAB (BRANCHBW
, SHORT
)},
498 {1, 1, 0, 0}, /* FBRANCH doesn't come BYTE */
499 {(32767), (-32768), 2, TAB (FBRANCH
, LONG
)},
503 {1, 1, 0, 0}, /* DBCC doesn't come BYTE */
504 {(32767), (-32768), 2, TAB (DBCCLBR
, LONG
)},
508 {1, 1, 0, 0}, /* DBCC doesn't come BYTE */
509 {(32767), (-32768), 2, TAB (DBCCABSJ
, LONG
)},
513 {1, 1, 0, 0}, /* PCREL1632 doesn't come BYTE */
514 {32767, -32768, 2, TAB (PCREL1632
, LONG
)},
518 {125, -130, 0, TAB (PCINDEX
, SHORT
)},
519 {32765, -32770, 2, TAB (PCINDEX
, LONG
)},
523 {1, 1, 0, 0}, /* ABSTOPCREL doesn't come BYTE */
524 {(32767), (-32768), 2, TAB (ABSTOPCREL
, LONG
)},
529 /* These are the machine dependent pseudo-ops. These are included so
530 the assembler can work on the output from the SUN C compiler, which
534 /* This table describes all the machine specific pseudo-ops the assembler
535 has to support. The fields are:
536 pseudo-op name without dot
537 function to call to execute this pseudo-op
538 Integer arg to pass to the function
540 const pseudo_typeS md_pseudo_table
[] =
542 {"data1", s_data1
, 0},
543 {"data2", s_data2
, 0},
546 {"skip", s_space
, 0},
548 #if defined (TE_SUN3) || defined (OBJ_ELF)
549 {"align", s_align_bytes
, 0},
552 {"swbeg", s_ignore
, 0},
554 {"extend", float_cons
, 'x'},
555 {"ldouble", float_cons
, 'x'},
557 /* The following pseudo-ops are supported for MRI compatibility. */
559 {"comline", s_space
, 1},
561 {"mask2", s_ignore
, 0},
564 {"restore", s_restore
, 0},
568 {"if.b", s_mri_if
, 'b'},
569 {"if.w", s_mri_if
, 'w'},
570 {"if.l", s_mri_if
, 'l'},
571 {"else", s_mri_else
, 0},
572 {"else.s", s_mri_else
, 's'},
573 {"else.l", s_mri_else
, 'l'},
574 {"endi", s_mri_endi
, 0},
575 {"break", s_mri_break
, 0},
576 {"break.s", s_mri_break
, 's'},
577 {"break.l", s_mri_break
, 'l'},
578 {"next", s_mri_next
, 0},
579 {"next.s", s_mri_next
, 's'},
580 {"next.l", s_mri_next
, 'l'},
581 {"for", s_mri_for
, 0},
582 {"for.b", s_mri_for
, 'b'},
583 {"for.w", s_mri_for
, 'w'},
584 {"for.l", s_mri_for
, 'l'},
585 {"endf", s_mri_endf
, 0},
586 {"repeat", s_mri_repeat
, 0},
587 {"until", s_mri_until
, 0},
588 {"until.b", s_mri_until
, 'b'},
589 {"until.w", s_mri_until
, 'w'},
590 {"until.l", s_mri_until
, 'l'},
591 {"while", s_mri_while
, 0},
592 {"while.b", s_mri_while
, 'b'},
593 {"while.w", s_mri_while
, 'w'},
594 {"while.l", s_mri_while
, 'l'},
595 {"endw", s_mri_endw
, 0},
600 /* The mote pseudo ops are put into the opcode table, since they
601 don't start with a . they look like opcodes to gas.
605 extern void obj_coff_section
PARAMS ((int));
608 CONST pseudo_typeS mote_pseudo_table
[] =
621 {"xdef", s_globl
, 0},
623 {"align", s_align_bytes
, 0},
625 {"align", s_align_ptwo
, 0},
628 {"sect", obj_coff_section
, 0},
629 {"section", obj_coff_section
, 0},
634 #define issbyte(x) ((x)>=-128 && (x)<=127)
635 #define isubyte(x) ((x)>=0 && (x)<=255)
636 #define issword(x) ((x)>=-32768 && (x)<=32767)
637 #define isuword(x) ((x)>=0 && (x)<=65535)
639 #define isbyte(x) ((x)>= -255 && (x)<=255)
640 #define isword(x) ((x)>=-65536 && (x)<=65535)
641 #define islong(x) (1)
643 extern char *input_line_pointer
;
645 static char mklower_table
[256];
646 #define mklower(c) (mklower_table[(unsigned char) (c)])
647 static char notend_table
[256];
648 static char alt_notend_table
[256];
650 (! (notend_table[(unsigned char) *s] \
652 && alt_notend_table[(unsigned char) s[1]])))
654 #if defined (M68KCOFF) && !defined (BFD_ASSEMBLER)
656 #ifdef NO_PCREL_RELOCS
659 make_pcrel_absolute(fixP
, add_number
)
663 register unsigned char *opcode
= fixP
->fx_frag
->fr_opcode
;
665 /* rewrite the PC relative instructions to absolute address ones.
666 * these are rumoured to be faster, and the apollo linker refuses
667 * to deal with the PC relative relocations.
669 if (opcode
[0] == 0x60 && opcode
[1] == 0xff) /* BRA -> JMP */
674 else if (opcode
[0] == 0x61 && opcode
[1] == 0xff) /* BSR -> JSR */
680 as_fatal (_("Unknown PC relative instruction"));
685 #endif /* NO_PCREL_RELOCS */
688 tc_coff_fix2rtype (fixP
)
691 if (fixP
->fx_tcbit
&& fixP
->fx_size
== 4)
692 return R_RELLONG_NEG
;
693 #ifdef NO_PCREL_RELOCS
694 know (fixP
->fx_pcrel
== 0);
695 return (fixP
->fx_size
== 1 ? R_RELBYTE
696 : fixP
->fx_size
== 2 ? R_DIR16
699 return (fixP
->fx_pcrel
?
700 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
701 fixP
->fx_size
== 2 ? R_PCRWORD
:
703 (fixP
->fx_size
== 1 ? R_RELBYTE
:
704 fixP
->fx_size
== 2 ? R_RELWORD
:
713 /* Compute the relocation code for a fixup of SIZE bytes, using pc
714 relative relocation if PCREL is non-zero. PIC says whether a special
715 pic relocation was requested. */
717 static bfd_reloc_code_real_type get_reloc_code
718 PARAMS ((int, int, enum pic_relocation
));
720 static bfd_reloc_code_real_type
721 get_reloc_code (size
, pcrel
, pic
)
724 enum pic_relocation pic
;
732 return BFD_RELOC_8_GOT_PCREL
;
734 return BFD_RELOC_16_GOT_PCREL
;
736 return BFD_RELOC_32_GOT_PCREL
;
744 return BFD_RELOC_8_GOTOFF
;
746 return BFD_RELOC_16_GOTOFF
;
748 return BFD_RELOC_32_GOTOFF
;
756 return BFD_RELOC_8_PLT_PCREL
;
758 return BFD_RELOC_16_PLT_PCREL
;
760 return BFD_RELOC_32_PLT_PCREL
;
768 return BFD_RELOC_8_PLTOFF
;
770 return BFD_RELOC_16_PLTOFF
;
772 return BFD_RELOC_32_PLTOFF
;
782 return BFD_RELOC_8_PCREL
;
784 return BFD_RELOC_16_PCREL
;
786 return BFD_RELOC_32_PCREL
;
806 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
808 as_bad (_("Can not do %d byte pc-relative pic relocation"), size
);
813 as_bad (_("Can not do %d byte relocation"), size
);
815 as_bad (_("Can not do %d byte pic relocation"), size
);
818 return BFD_RELOC_NONE
;
821 /* Here we decide which fixups can be adjusted to make them relative
822 to the beginning of the section instead of the symbol. Basically
823 we need to make sure that the dynamic relocations are done
824 correctly, so in some cases we force the original symbol to be
827 tc_m68k_fix_adjustable (fixP
)
830 /* Prevent all adjustments to global symbols. */
831 if (S_IS_EXTERNAL (fixP
->fx_addsy
)
832 || S_IS_WEAK (fixP
->fx_addsy
))
835 /* adjust_reloc_syms doesn't know about the GOT */
836 switch (fixP
->fx_r_type
)
838 case BFD_RELOC_8_GOT_PCREL
:
839 case BFD_RELOC_16_GOT_PCREL
:
840 case BFD_RELOC_32_GOT_PCREL
:
841 case BFD_RELOC_8_GOTOFF
:
842 case BFD_RELOC_16_GOTOFF
:
843 case BFD_RELOC_32_GOTOFF
:
844 case BFD_RELOC_8_PLT_PCREL
:
845 case BFD_RELOC_16_PLT_PCREL
:
846 case BFD_RELOC_32_PLT_PCREL
:
847 case BFD_RELOC_8_PLTOFF
:
848 case BFD_RELOC_16_PLTOFF
:
849 case BFD_RELOC_32_PLTOFF
:
852 case BFD_RELOC_VTABLE_INHERIT
:
853 case BFD_RELOC_VTABLE_ENTRY
:
863 #define get_reloc_code(SIZE,PCREL,OTHER) NO_RELOC
870 tc_gen_reloc (section
, fixp
)
875 bfd_reloc_code_real_type code
;
877 /* If the tcbit is set, then this was a fixup of a negative value
878 that was never resolved. We do not have a reloc to handle this,
879 so just return. We assume that other code will have detected this
880 situation and produced a helpful error message, so we just tell the
881 user that the reloc cannot be produced. */
885 as_bad (_("Unable to produce reloc against symbol '%s'"),
886 S_GET_NAME (fixp
->fx_addsy
));
890 if (fixp
->fx_r_type
!= BFD_RELOC_NONE
)
892 code
= fixp
->fx_r_type
;
894 /* Since DIFF_EXPR_OK is defined in tc-m68k.h, it is possible
895 that fixup_segment converted a non-PC relative reloc into a
896 PC relative reloc. In such a case, we need to convert the
903 code
= BFD_RELOC_8_PCREL
;
906 code
= BFD_RELOC_16_PCREL
;
909 code
= BFD_RELOC_32_PCREL
;
911 case BFD_RELOC_8_PCREL
:
912 case BFD_RELOC_16_PCREL
:
913 case BFD_RELOC_32_PCREL
:
914 case BFD_RELOC_8_GOT_PCREL
:
915 case BFD_RELOC_16_GOT_PCREL
:
916 case BFD_RELOC_32_GOT_PCREL
:
917 case BFD_RELOC_8_GOTOFF
:
918 case BFD_RELOC_16_GOTOFF
:
919 case BFD_RELOC_32_GOTOFF
:
920 case BFD_RELOC_8_PLT_PCREL
:
921 case BFD_RELOC_16_PLT_PCREL
:
922 case BFD_RELOC_32_PLT_PCREL
:
923 case BFD_RELOC_8_PLTOFF
:
924 case BFD_RELOC_16_PLTOFF
:
925 case BFD_RELOC_32_PLTOFF
:
928 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
929 _("Cannot make %s relocation PC relative"),
930 bfd_get_reloc_code_name (code
));
936 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
937 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
939 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
940 MAP (1, 0, BFD_RELOC_8
);
941 MAP (2, 0, BFD_RELOC_16
);
942 MAP (4, 0, BFD_RELOC_32
);
943 MAP (1, 1, BFD_RELOC_8_PCREL
);
944 MAP (2, 1, BFD_RELOC_16_PCREL
);
945 MAP (4, 1, BFD_RELOC_32_PCREL
);
953 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
954 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
955 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
956 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
959 reloc
->addend
= fixp
->fx_addnumber
;
964 reloc
->addend
= fixp
->fx_addnumber
;
966 reloc
->addend
= (section
->vma
967 + (fixp
->fx_pcrel_adjust
== 64
968 ? -1 : fixp
->fx_pcrel_adjust
)
970 + md_pcrel_from (fixp
));
973 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
974 assert (reloc
->howto
!= 0);
979 #endif /* BFD_ASSEMBLER */
981 /* Return zero if the reference to SYMBOL from within the same segment may
985 /* On an ELF system, we can't relax an externally visible symbol,
986 because it may be overridden by a shared library. However, if
987 TARGET_OS is "elf", then we presume that we are assembling for an
988 embedded system, in which case we don't have to worry about shared
989 libraries, and we can relax anything. */
991 #define relaxable_symbol(symbol) \
992 (strcmp (TARGET_OS, "elf") == 0 \
993 || (! S_IS_EXTERNAL (symbol) \
994 && ! S_IS_WEAK (symbol)))
998 #define relaxable_symbol(symbol) 1
1002 /* Handle of the OPCODE hash table. NULL means any use before
1003 m68k_ip_begin() will crash. */
1004 static struct hash_control
*op_hash
;
1006 /* Assemble an m68k instruction. */
1013 register struct m68k_op
*opP
;
1014 register const struct m68k_incant
*opcode
;
1015 register const char *s
;
1016 register int tmpreg
= 0, baseo
= 0, outro
= 0, nextword
;
1017 char *pdot
, *pdotmove
;
1018 enum m68k_size siz1
, siz2
;
1022 LITTLENUM_TYPE words
[6];
1023 LITTLENUM_TYPE
*wordp
;
1024 unsigned long ok_arch
= 0;
1026 if (*instring
== ' ')
1027 instring
++; /* skip leading whitespace */
1029 /* Scan up to end of operation-code, which MUST end in end-of-string
1030 or exactly 1 space. */
1032 for (p
= instring
; *p
!= '\0'; p
++)
1042 the_ins
.error
= _("No operator");
1046 /* p now points to the end of the opcode name, probably whitespace.
1047 Make sure the name is null terminated by clobbering the
1048 whitespace, look it up in the hash table, then fix it back.
1049 Remove a dot, first, since the opcode tables have none. */
1052 for (pdotmove
= pdot
; pdotmove
< p
; pdotmove
++)
1053 *pdotmove
= pdotmove
[1];
1059 opcode
= (const struct m68k_incant
*) hash_find (op_hash
, instring
);
1064 for (pdotmove
= p
; pdotmove
> pdot
; pdotmove
--)
1065 *pdotmove
= pdotmove
[-1];
1072 the_ins
.error
= _("Unknown operator");
1076 /* found a legitimate opcode, start matching operands */
1080 if (opcode
->m_operands
== 0)
1082 char *old
= input_line_pointer
;
1084 input_line_pointer
= p
;
1085 /* Ahh - it's a motorola style psuedo op */
1086 mote_pseudo_table
[opcode
->m_opnum
].poc_handler
1087 (mote_pseudo_table
[opcode
->m_opnum
].poc_val
);
1088 input_line_pointer
= old
;
1094 if (flag_mri
&& opcode
->m_opnum
== 0)
1096 /* In MRI mode, random garbage is allowed after an instruction
1097 which accepts no operands. */
1098 the_ins
.args
= opcode
->m_operands
;
1099 the_ins
.numargs
= opcode
->m_opnum
;
1100 the_ins
.numo
= opcode
->m_codenum
;
1101 the_ins
.opcode
[0] = getone (opcode
);
1102 the_ins
.opcode
[1] = gettwo (opcode
);
1106 for (opP
= &the_ins
.operands
[0]; *p
; opP
++)
1108 p
= crack_operand (p
, opP
);
1112 the_ins
.error
= opP
->error
;
1117 opsfound
= opP
- &the_ins
.operands
[0];
1119 /* This ugly hack is to support the floating pt opcodes in their
1120 standard form. Essentially, we fake a first enty of type COP#1 */
1121 if (opcode
->m_operands
[0] == 'I')
1125 for (n
= opsfound
; n
> 0; --n
)
1126 the_ins
.operands
[n
] = the_ins
.operands
[n
- 1];
1128 memset ((char *) (&the_ins
.operands
[0]), '\0',
1129 sizeof (the_ins
.operands
[0]));
1130 the_ins
.operands
[0].mode
= CONTROL
;
1131 the_ins
.operands
[0].reg
= m68k_float_copnum
;
1135 /* We've got the operands. Find an opcode that'll accept them */
1138 /* If we didn't get the right number of ops, or we have no
1139 common model with this pattern then reject this pattern. */
1141 ok_arch
|= opcode
->m_arch
;
1142 if (opsfound
!= opcode
->m_opnum
1143 || ((opcode
->m_arch
& current_architecture
) == 0))
1147 for (s
= opcode
->m_operands
, opP
= &the_ins
.operands
[0];
1151 /* Warning: this switch is huge! */
1152 /* I've tried to organize the cases into this order:
1153 non-alpha first, then alpha by letter. Lower-case
1154 goes directly before uppercase counterpart. */
1155 /* Code with multiple case ...: gets sorted by the lowest
1156 case ... it belongs to. I hope this makes sense. */
1262 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1279 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1298 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1308 if (opP
->mode
!= IMMED
)
1310 else if (s
[1] == 'b'
1311 && ! isvar (&opP
->disp
)
1312 && (opP
->disp
.exp
.X_op
!= O_constant
1313 || ! isbyte (opP
->disp
.exp
.X_add_number
)))
1315 else if (s
[1] == 'B'
1316 && ! isvar (&opP
->disp
)
1317 && (opP
->disp
.exp
.X_op
!= O_constant
1318 || ! issbyte (opP
->disp
.exp
.X_add_number
)))
1320 else if (s
[1] == 'w'
1321 && ! isvar (&opP
->disp
)
1322 && (opP
->disp
.exp
.X_op
!= O_constant
1323 || ! isword (opP
->disp
.exp
.X_add_number
)))
1325 else if (s
[1] == 'W'
1326 && ! isvar (&opP
->disp
)
1327 && (opP
->disp
.exp
.X_op
!= O_constant
1328 || ! issword (opP
->disp
.exp
.X_add_number
)))
1334 if (opP
->mode
!= IMMED
)
1339 if (opP
->mode
== AREG
1340 || opP
->mode
== CONTROL
1341 || opP
->mode
== FPREG
1342 || opP
->mode
== IMMED
1343 || opP
->mode
== REGLST
1344 || (opP
->mode
!= ABSL
1346 || opP
->reg
== ZPC
)))
1351 if (opP
->mode
== CONTROL
1352 || opP
->mode
== FPREG
1353 || opP
->mode
== REGLST
1354 || opP
->mode
== IMMED
1355 || (opP
->mode
!= ABSL
1357 || opP
->reg
== ZPC
)))
1385 if (opP
->mode
== CONTROL
1386 || opP
->mode
== FPREG
1387 || opP
->mode
== REGLST
)
1392 if (opP
->mode
!= AINC
)
1397 if (opP
->mode
!= ADEC
)
1447 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
1468 case '~': /* For now! (JF FOO is this right?) */
1490 if (opP
->mode
!= CONTROL
1491 || (opP
->reg
!= TT0
&& opP
->reg
!= TT1
))
1496 if (opP
->mode
!= AREG
)
1501 if (opP
->mode
!= AINDR
)
1506 if (opP
->mode
!= ABSL
1508 && strncmp (instring
, "jbsr", 4) == 0))
1513 if (opP
->mode
!= CONTROL
|| opP
->reg
!= CCR
)
1518 if (opP
->mode
!= DISP
1520 || opP
->reg
> ADDR7
)
1525 if (opP
->mode
!= DREG
)
1530 if (opP
->reg
!= ACC
)
1535 if (opP
->mode
!= FPREG
)
1540 if (opP
->reg
!= MACSR
)
1545 if (opP
->reg
!= MASK
)
1550 if (opP
->mode
!= CONTROL
1557 if (opP
->mode
!= CONTROL
1559 || opP
->reg
> last_movec_reg
)
1563 const enum m68k_register
*rp
;
1564 for (rp
= control_regs
; *rp
; rp
++)
1565 if (*rp
== opP
->reg
)
1573 if (opP
->mode
!= IMMED
)
1579 if (opP
->mode
== DREG
1580 || opP
->mode
== AREG
1581 || opP
->mode
== FPREG
)
1590 opP
->mask
= 1 << (opP
->reg
- DATA0
);
1593 opP
->mask
= 1 << (opP
->reg
- ADDR0
+ 8);
1596 opP
->mask
= 1 << (opP
->reg
- FP0
+ 16);
1604 else if (opP
->mode
== CONTROL
)
1613 opP
->mask
= 1 << 24;
1616 opP
->mask
= 1 << 25;
1619 opP
->mask
= 1 << 26;
1628 else if (opP
->mode
!= REGLST
)
1630 else if (s
[1] == '8' && (opP
->mask
& 0x0ffffff) != 0)
1632 else if (s
[1] == '3' && (opP
->mask
& 0x7000000) != 0)
1637 if (opP
->mode
!= IMMED
)
1639 else if (opP
->disp
.exp
.X_op
!= O_constant
1640 || ! issbyte (opP
->disp
.exp
.X_add_number
))
1642 else if (! m68k_quick
1643 && instring
[3] != 'q'
1644 && instring
[4] != 'q')
1649 if (opP
->mode
!= DREG
1650 && opP
->mode
!= IMMED
1651 && opP
->mode
!= ABSL
)
1656 if (opP
->mode
!= IMMED
)
1658 else if (opP
->disp
.exp
.X_op
!= O_constant
1659 || opP
->disp
.exp
.X_add_number
< 1
1660 || opP
->disp
.exp
.X_add_number
> 8)
1662 else if (! m68k_quick
1663 && (strncmp (instring
, "add", 3) == 0
1664 || strncmp (instring
, "sub", 3) == 0)
1665 && instring
[3] != 'q')
1670 if (opP
->mode
!= DREG
&& opP
->mode
!= AREG
)
1675 if (opP
->mode
!= AINDR
1676 && (opP
->mode
!= BASE
1678 && opP
->reg
!= ZADDR0
)
1679 || opP
->disp
.exp
.X_op
!= O_absent
1680 || ((opP
->index
.reg
< DATA0
1681 || opP
->index
.reg
> DATA7
)
1682 && (opP
->index
.reg
< ADDR0
1683 || opP
->index
.reg
> ADDR7
))
1684 || opP
->index
.size
!= SIZE_UNSPEC
1685 || opP
->index
.scale
!= 1))
1690 if (opP
->mode
!= CONTROL
1691 || ! (opP
->reg
== FPI
1693 || opP
->reg
== FPC
))
1698 if (opP
->mode
!= CONTROL
|| opP
->reg
!= SR
)
1703 if (opP
->mode
!= IMMED
)
1705 else if (opP
->disp
.exp
.X_op
!= O_constant
1706 || opP
->disp
.exp
.X_add_number
< 0
1707 || opP
->disp
.exp
.X_add_number
> 7)
1712 if (opP
->mode
!= CONTROL
|| opP
->reg
!= USP
)
1716 /* JF these are out of order. We could put them
1717 in order if we were willing to put up with
1718 bunches of #ifdef m68851s in the code.
1720 Don't forget that you need these operands
1721 to use 68030 MMU instructions. */
1723 /* Memory addressing mode used by pflushr */
1725 if (opP
->mode
== CONTROL
1726 || opP
->mode
== FPREG
1727 || opP
->mode
== DREG
1728 || opP
->mode
== AREG
1729 || opP
->mode
== REGLST
)
1731 /* We should accept immediate operands, but they
1732 supposedly have to be quad word, and we don't
1733 handle that. I would like to see what a Motorola
1734 assembler does before doing something here. */
1735 if (opP
->mode
== IMMED
)
1740 if (opP
->mode
!= CONTROL
1741 || (opP
->reg
!= SFC
&& opP
->reg
!= DFC
))
1746 if (opP
->mode
!= CONTROL
|| opP
->reg
!= TC
)
1751 if (opP
->mode
!= CONTROL
|| opP
->reg
!= AC
)
1756 if (opP
->mode
!= CONTROL
1759 && opP
->reg
!= SCC
))
1764 if (opP
->mode
!= CONTROL
1770 if (opP
->mode
!= CONTROL
1773 && opP
->reg
!= CRP
))
1778 if (opP
->mode
!= CONTROL
1779 || (!(opP
->reg
>= BAD
&& opP
->reg
<= BAD
+ 7)
1780 && !(opP
->reg
>= BAC
&& opP
->reg
<= BAC
+ 7)))
1785 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PSR
)
1790 if (opP
->mode
!= CONTROL
|| opP
->reg
!= PCSR
)
1795 if (opP
->mode
!= CONTROL
1802 } /* not a cache specifier. */
1806 if (opP
->mode
!= ABSL
)
1811 if (opP
->reg
< DATA0L
|| opP
->reg
> ADDR7U
)
1813 /* FIXME: kludge instead of fixing parser:
1814 upper/lower registers are *not* CONTROL
1815 registers, but ordinary ones. */
1816 if ((opP
->reg
>= DATA0L
&& opP
->reg
<= DATA7L
)
1817 || (opP
->reg
>= DATA0U
&& opP
->reg
<= DATA7U
))
1825 } /* switch on type of operand */
1829 } /* for each operand */
1830 } /* if immediately wrong */
1837 opcode
= opcode
->m_next
;
1842 && !(ok_arch
& current_architecture
))
1847 _("invalid instruction for this architecture; needs "));
1848 cp
= buf
+ strlen (buf
);
1852 strcpy (cp
, _("fpu (68040, 68060 or 68881/68882)"));
1855 strcpy (cp
, _("mmu (68030 or 68851)"));
1858 strcpy (cp
, _("68020 or higher"));
1861 strcpy (cp
, _("68000 or higher"));
1864 strcpy (cp
, _("68010 or higher"));
1868 int got_one
= 0, idx
;
1870 idx
< (int) (sizeof (archs
) / sizeof (archs
[0]));
1873 if ((archs
[idx
].arch
& ok_arch
)
1874 && ! archs
[idx
].alias
)
1878 strcpy (cp
, " or ");
1882 strcpy (cp
, archs
[idx
].name
);
1888 cp
= xmalloc (strlen (buf
) + 1);
1893 the_ins
.error
= _("operands mismatch");
1895 } /* Fell off the end */
1900 /* now assemble it */
1902 the_ins
.args
= opcode
->m_operands
;
1903 the_ins
.numargs
= opcode
->m_opnum
;
1904 the_ins
.numo
= opcode
->m_codenum
;
1905 the_ins
.opcode
[0] = getone (opcode
);
1906 the_ins
.opcode
[1] = gettwo (opcode
);
1908 for (s
= the_ins
.args
, opP
= &the_ins
.operands
[0]; *s
; s
+= 2, opP
++)
1910 /* This switch is a doozy.
1911 Watch the first step; its a big one! */
1939 tmpreg
= 0x3c; /* 7.4 */
1940 if (strchr ("bwl", s
[1]))
1941 nextword
= get_num (&opP
->disp
, 80);
1943 nextword
= get_num (&opP
->disp
, 0);
1944 if (isvar (&opP
->disp
))
1945 add_fix (s
[1], &opP
->disp
, 0, 0);
1949 if (!isbyte (nextword
))
1950 opP
->error
= _("operand out of range");
1955 if (!isword (nextword
))
1956 opP
->error
= _("operand out of range");
1961 if (!issword (nextword
))
1962 opP
->error
= _("operand out of range");
1967 addword (nextword
>> 16);
1994 /* We gotta put out some float */
1995 if (op (&opP
->disp
) != O_big
)
2000 /* Can other cases happen here? */
2001 if (op (&opP
->disp
) != O_constant
)
2004 val
= (valueT
) offs (&opP
->disp
);
2008 generic_bignum
[gencnt
] = (LITTLENUM_TYPE
) val
;
2009 val
>>= LITTLENUM_NUMBER_OF_BITS
;
2013 offs (&opP
->disp
) = gencnt
;
2015 if (offs (&opP
->disp
) > 0)
2017 if (offs (&opP
->disp
) > baseo
)
2019 as_warn (_("Bignum too big for %c format; truncated"),
2021 offs (&opP
->disp
) = baseo
;
2023 baseo
-= offs (&opP
->disp
);
2026 for (wordp
= generic_bignum
+ offs (&opP
->disp
) - 1;
2027 offs (&opP
->disp
)--;
2032 gen_to_words (words
, baseo
, (long) outro
);
2033 for (wordp
= words
; baseo
--; wordp
++)
2037 tmpreg
= opP
->reg
- DATA
; /* 0.dreg */
2040 tmpreg
= 0x08 + opP
->reg
- ADDR
; /* 1.areg */
2043 tmpreg
= 0x10 + opP
->reg
- ADDR
; /* 2.areg */
2046 tmpreg
= 0x20 + opP
->reg
- ADDR
; /* 4.areg */
2049 tmpreg
= 0x18 + opP
->reg
- ADDR
; /* 3.areg */
2053 nextword
= get_num (&opP
->disp
, 80);
2056 && ! isvar (&opP
->disp
)
2059 opP
->disp
.exp
.X_op
= O_symbol
;
2060 #ifndef BFD_ASSEMBLER
2061 opP
->disp
.exp
.X_add_symbol
= &abs_symbol
;
2063 opP
->disp
.exp
.X_add_symbol
=
2064 section_symbol (absolute_section
);
2068 /* Force into index mode. Hope this works */
2070 /* We do the first bit for 32-bit displacements, and the
2071 second bit for 16 bit ones. It is possible that we
2072 should make the default be WORD instead of LONG, but
2073 I think that'd break GCC, so we put up with a little
2074 inefficiency for the sake of working output. */
2076 if (!issword (nextword
)
2077 || (isvar (&opP
->disp
)
2078 && ((opP
->disp
.size
== SIZE_UNSPEC
2079 && flag_short_refs
== 0
2080 && cpu_of_arch (current_architecture
) >= m68020
2081 && ! arch_coldfire_p (current_architecture
))
2082 || opP
->disp
.size
== SIZE_LONG
)))
2084 if (cpu_of_arch (current_architecture
) < m68020
2085 || arch_coldfire_p (current_architecture
))
2087 _("displacement too large for this architecture; needs 68020 or higher");
2089 tmpreg
= 0x3B; /* 7.3 */
2091 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
2092 if (isvar (&opP
->disp
))
2096 if (opP
->disp
.size
== SIZE_LONG
2098 /* If the displacement needs pic
2099 relocation it cannot be relaxed. */
2100 || opP
->disp
.pic_reloc
!= pic_none
2105 add_fix ('l', &opP
->disp
, 1, 2);
2109 add_frag (adds (&opP
->disp
),
2111 TAB (PCREL1632
, SZ_UNDEF
));
2118 add_fix ('l', &opP
->disp
, 0, 0);
2123 addword (nextword
>> 16);
2128 tmpreg
= 0x3A; /* 7.2 */
2130 tmpreg
= 0x28 + opP
->reg
- ADDR
; /* 5.areg */
2132 if (isvar (&opP
->disp
))
2136 add_fix ('w', &opP
->disp
, 1, 0);
2139 add_fix ('w', &opP
->disp
, 0, 0);
2149 baseo
= get_num (&opP
->disp
, 80);
2150 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
2151 outro
= get_num (&opP
->odisp
, 80);
2152 /* Figure out the `addressing mode'.
2153 Also turn on the BASE_DISABLE bit, if needed. */
2154 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
2156 tmpreg
= 0x3b; /* 7.3 */
2157 if (opP
->reg
== ZPC
)
2160 else if (opP
->reg
== 0)
2163 tmpreg
= 0x30; /* 6.garbage */
2165 else if (opP
->reg
>= ZADDR0
&& opP
->reg
<= ZADDR7
)
2168 tmpreg
= 0x30 + opP
->reg
- ZADDR0
;
2171 tmpreg
= 0x30 + opP
->reg
- ADDR
; /* 6.areg */
2173 siz1
= opP
->disp
.size
;
2174 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
2175 siz2
= opP
->odisp
.size
;
2179 /* Index register stuff */
2180 if (opP
->index
.reg
!= 0
2181 && opP
->index
.reg
>= DATA
2182 && opP
->index
.reg
<= ADDR7
)
2184 nextword
|= (opP
->index
.reg
- DATA
) << 12;
2186 if (opP
->index
.size
== SIZE_LONG
2187 || (opP
->index
.size
== SIZE_UNSPEC
2188 && m68k_index_width_default
== SIZE_LONG
))
2191 if ((opP
->index
.scale
!= 1
2192 && cpu_of_arch (current_architecture
) < m68020
)
2193 || (opP
->index
.scale
== 8
2194 && arch_coldfire_p (current_architecture
)))
2197 _("scale factor invalid on this architecture; needs cpu32 or 68020 or higher");
2200 if (arch_coldfire_p (current_architecture
)
2201 && opP
->index
.size
== SIZE_WORD
)
2202 opP
->error
= _("invalid index size for coldfire");
2204 switch (opP
->index
.scale
)
2221 GET US OUT OF HERE! */
2223 /* Must be INDEX, with an index register. Address
2224 register cannot be ZERO-PC, and either :b was
2225 forced, or we know it will fit. For a 68000 or
2226 68010, force this mode anyways, because the
2227 larger modes aren't supported. */
2228 if (opP
->mode
== BASE
2229 && ((opP
->reg
>= ADDR0
2230 && opP
->reg
<= ADDR7
)
2233 if (siz1
== SIZE_BYTE
2234 || cpu_of_arch (current_architecture
) < m68020
2235 || arch_coldfire_p (current_architecture
)
2236 || (siz1
== SIZE_UNSPEC
2237 && ! isvar (&opP
->disp
)
2238 && issbyte (baseo
)))
2240 nextword
+= baseo
& 0xff;
2242 if (isvar (&opP
->disp
))
2244 /* Do a byte relocation. If it doesn't
2245 fit (possible on m68000) let the
2246 fixup processing complain later. */
2248 add_fix ('B', &opP
->disp
, 1, 1);
2250 add_fix ('B', &opP
->disp
, 0, 0);
2252 else if (siz1
!= SIZE_BYTE
)
2254 if (siz1
!= SIZE_UNSPEC
)
2255 as_warn (_("Forcing byte displacement"));
2256 if (! issbyte (baseo
))
2257 opP
->error
= _("byte displacement out of range");
2262 else if (siz1
== SIZE_UNSPEC
2264 && isvar (&opP
->disp
)
2265 && subs (&opP
->disp
) == NULL
2267 /* If the displacement needs pic
2268 relocation it cannot be relaxed. */
2269 && opP
->disp
.pic_reloc
== pic_none
2273 /* The code in md_convert_frag_1 needs to be
2274 able to adjust nextword. Call frag_grow
2275 to ensure that we have enough space in
2276 the frag obstack to make all the bytes
2279 nextword
+= baseo
& 0xff;
2281 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2282 TAB (PCINDEX
, SZ_UNDEF
));
2290 nextword
|= 0x40; /* No index reg */
2291 if (opP
->index
.reg
>= ZDATA0
2292 && opP
->index
.reg
<= ZDATA7
)
2293 nextword
|= (opP
->index
.reg
- ZDATA0
) << 12;
2294 else if (opP
->index
.reg
>= ZADDR0
2295 || opP
->index
.reg
<= ZADDR7
)
2296 nextword
|= (opP
->index
.reg
- ZADDR0
+ 8) << 12;
2299 /* It isn't simple. */
2301 if (cpu_of_arch (current_architecture
) < m68020
2302 || arch_coldfire_p (current_architecture
))
2304 _("invalid operand mode for this architecture; needs 68020 or higher");
2307 /* If the guy specified a width, we assume that it is
2308 wide enough. Maybe it isn't. If so, we lose. */
2312 if (isvar (&opP
->disp
)
2314 : ! issword (baseo
))
2319 else if (! isvar (&opP
->disp
) && baseo
== 0)
2328 as_warn (_(":b not permitted; defaulting to :w"));
2338 /* Figure out innner displacement stuff */
2339 if (opP
->mode
== POST
|| opP
->mode
== PRE
)
2341 if (cpu_of_arch (current_architecture
) & cpu32
)
2342 opP
->error
= _("invalid operand mode for this architecture; needs 68020 or higher");
2346 if (isvar (&opP
->odisp
)
2348 : ! issword (outro
))
2353 else if (! isvar (&opP
->odisp
) && outro
== 0)
2362 as_warn (_(":b not permitted; defaulting to :w"));
2371 if (opP
->mode
== POST
2372 && (nextword
& 0x40) == 0)
2377 if (siz1
!= SIZE_UNSPEC
&& isvar (&opP
->disp
))
2379 if (opP
->reg
== PC
|| opP
->reg
== ZPC
)
2380 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 1, 2);
2382 add_fix (siz1
== SIZE_LONG
? 'l' : 'w', &opP
->disp
, 0, 0);
2384 if (siz1
== SIZE_LONG
)
2385 addword (baseo
>> 16);
2386 if (siz1
!= SIZE_UNSPEC
)
2389 if (siz2
!= SIZE_UNSPEC
&& isvar (&opP
->odisp
))
2390 add_fix (siz2
== SIZE_LONG
? 'l' : 'w', &opP
->odisp
, 0, 0);
2391 if (siz2
== SIZE_LONG
)
2392 addword (outro
>> 16);
2393 if (siz2
!= SIZE_UNSPEC
)
2399 nextword
= get_num (&opP
->disp
, 80);
2400 switch (opP
->disp
.size
)
2405 if (!isvar (&opP
->disp
) && issword (offs (&opP
->disp
)))
2407 tmpreg
= 0x38; /* 7.0 */
2411 if (isvar (&opP
->disp
)
2412 && !subs (&opP
->disp
)
2413 && adds (&opP
->disp
)
2415 /* If the displacement needs pic relocation it
2416 cannot be relaxed. */
2417 && opP
->disp
.pic_reloc
== pic_none
2420 && !strchr ("~%&$?", s
[0]))
2422 tmpreg
= 0x3A; /* 7.2 */
2423 add_frag (adds (&opP
->disp
),
2425 TAB (ABSTOPCREL
, SZ_UNDEF
));
2428 /* Fall through into long */
2430 if (isvar (&opP
->disp
))
2431 add_fix ('l', &opP
->disp
, 0, 0);
2433 tmpreg
= 0x39;/* 7.1 mode */
2434 addword (nextword
>> 16);
2439 as_bad (_("unsupported byte value; use a different suffix"));
2441 case SIZE_WORD
: /* Word */
2442 if (isvar (&opP
->disp
))
2443 add_fix ('w', &opP
->disp
, 0, 0);
2445 tmpreg
= 0x38;/* 7.0 mode */
2453 as_bad (_("unknown/incorrect operand"));
2456 install_gen_operand (s
[1], tmpreg
);
2462 { /* JF: I hate floating point! */
2477 tmpreg
= get_num (&opP
->disp
, tmpreg
);
2478 if (isvar (&opP
->disp
))
2479 add_fix (s
[1], &opP
->disp
, 0, 0);
2482 case 'b': /* Danger: These do no check for
2483 certain types of overflow.
2485 if (!isbyte (tmpreg
))
2486 opP
->error
= _("out of range");
2487 insop (tmpreg
, opcode
);
2488 if (isvar (&opP
->disp
))
2489 the_ins
.reloc
[the_ins
.nrel
- 1].n
=
2490 (opcode
->m_codenum
) * 2 + 1;
2493 if (!issbyte (tmpreg
))
2494 opP
->error
= _("out of range");
2495 the_ins
.opcode
[the_ins
.numo
- 1] |= tmpreg
& 0xff;
2496 if (isvar (&opP
->disp
))
2497 the_ins
.reloc
[the_ins
.nrel
- 1].n
= opcode
->m_codenum
* 2 - 1;
2500 if (!isword (tmpreg
))
2501 opP
->error
= _("out of range");
2502 insop (tmpreg
, opcode
);
2503 if (isvar (&opP
->disp
))
2504 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2507 if (!issword (tmpreg
))
2508 opP
->error
= _("out of range");
2509 insop (tmpreg
, opcode
);
2510 if (isvar (&opP
->disp
))
2511 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2514 /* Because of the way insop works, we put these two out
2516 insop (tmpreg
, opcode
);
2517 insop (tmpreg
>> 16, opcode
);
2518 if (isvar (&opP
->disp
))
2519 the_ins
.reloc
[the_ins
.nrel
- 1].n
= (opcode
->m_codenum
) * 2;
2526 install_operand (s
[1], tmpreg
);
2537 install_operand (s
[1], opP
->reg
- ADDR
);
2541 tmpreg
= get_num (&opP
->disp
, 80);
2545 /* The pc_fix argument winds up in fx_pcrel_adjust,
2546 which is a char, and may therefore be unsigned. We
2547 want to pass -1, but we pass 64 instead, and convert
2548 back in md_pcrel_from. */
2549 add_fix ('B', &opP
->disp
, 1, 64);
2552 add_fix ('w', &opP
->disp
, 1, 0);
2557 if (! HAVE_LONG_BRANCH (current_architecture
))
2558 as_warn (_("Can't use long branches on 68000/68010/5200"));
2559 the_ins
.opcode
[0] |= 0xff;
2560 add_fix ('l', &opP
->disp
, 1, 0);
2565 if (subs (&opP
->disp
)) /* We can't relax it */
2569 /* If the displacement needs pic relocation it cannot be
2571 if (opP
->disp
.pic_reloc
!= pic_none
)
2574 /* This could either be a symbol, or an absolute
2575 address. If it's an absolute address, turn it into
2576 an absolute jump right here and keep it out of the
2578 if (adds (&opP
->disp
) == 0)
2580 if (the_ins
.opcode
[0] == 0x6000) /* jbra */
2581 the_ins
.opcode
[0] = 0x4EF1;
2582 else if (the_ins
.opcode
[0] == 0x6100) /* jbsr */
2583 the_ins
.opcode
[0] = 0x4EB1;
2586 the_ins
.opcode
[0] ^= 0x0100;
2587 the_ins
.opcode
[0] |= 0x0006;
2590 add_fix ('l', &opP
->disp
, 0, 0);
2596 /* Now we know it's going into the relaxer. Now figure
2597 out which mode. We try in this order of preference:
2598 long branch, absolute jump, byte/word branches only. */
2599 if (HAVE_LONG_BRANCH (current_architecture
))
2600 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2601 TAB (BRANCHBWL
, SZ_UNDEF
));
2602 else if (! flag_keep_pcrel
)
2604 if ((the_ins
.opcode
[0] == 0x6000)
2605 || (the_ins
.opcode
[0] == 0x6100))
2606 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2607 TAB (BRABSJUNC
, SZ_UNDEF
));
2609 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2610 TAB (BRABSJCOND
, SZ_UNDEF
));
2613 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2614 TAB (BRANCHBW
, SZ_UNDEF
));
2617 if (isvar (&opP
->disp
))
2619 /* Check for DBcc instructions. We can relax them,
2620 but only if we have long branches and/or absolute
2622 if (((the_ins
.opcode
[0] & 0xf0f8) == 0x50c8)
2623 && (HAVE_LONG_BRANCH (current_architecture
)
2624 || (! flag_keep_pcrel
)))
2626 if (HAVE_LONG_BRANCH (current_architecture
))
2627 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2628 TAB (DBCCLBR
, SZ_UNDEF
));
2630 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2631 TAB (DBCCABSJ
, SZ_UNDEF
));
2634 add_fix ('w', &opP
->disp
, 1, 0);
2638 case 'C': /* Fixed size LONG coproc branches */
2639 add_fix ('l', &opP
->disp
, 1, 0);
2643 case 'c': /* Var size Coprocesssor branches */
2644 if (subs (&opP
->disp
) || (adds (&opP
->disp
) == 0))
2646 the_ins
.opcode
[the_ins
.numo
- 1] |= 0x40;
2647 add_fix ('l', &opP
->disp
, 1, 0);
2652 add_frag (adds (&opP
->disp
), offs (&opP
->disp
),
2653 TAB (FBRANCH
, SZ_UNDEF
));
2660 case 'C': /* Ignore it */
2663 case 'd': /* JF this is a kludge */
2664 install_operand ('s', opP
->reg
- ADDR
);
2665 tmpreg
= get_num (&opP
->disp
, 80);
2666 if (!issword (tmpreg
))
2668 as_warn (_("Expression out of range, using 0"));
2675 install_operand (s
[1], opP
->reg
- DATA
);
2678 case 'E': /* Ignore it */
2682 install_operand (s
[1], opP
->reg
- FP0
);
2685 case 'G': /* Ignore it */
2690 tmpreg
= opP
->reg
- COP0
;
2691 install_operand (s
[1], tmpreg
);
2694 case 'J': /* JF foo */
2767 install_operand (s
[1], tmpreg
);
2771 tmpreg
= get_num (&opP
->disp
, 55);
2772 install_operand (s
[1], tmpreg
& 0x7f);
2779 if (tmpreg
& 0x7FF0000)
2780 as_bad (_("Floating point register in register list"));
2781 insop (reverse_16_bits (tmpreg
), opcode
);
2785 if (tmpreg
& 0x700FFFF)
2786 as_bad (_("Wrong register in floating-point reglist"));
2787 install_operand (s
[1], reverse_8_bits (tmpreg
>> 16));
2795 if (tmpreg
& 0x7FF0000)
2796 as_bad (_("Floating point register in register list"));
2797 insop (tmpreg
, opcode
);
2799 else if (s
[1] == '8')
2801 if (tmpreg
& 0x0FFFFFF)
2802 as_bad (_("incorrect register in reglist"));
2803 install_operand (s
[1], tmpreg
>> 24);
2807 if (tmpreg
& 0x700FFFF)
2808 as_bad (_("wrong register in floating-point reglist"));
2810 install_operand (s
[1], tmpreg
>> 16);
2815 install_operand (s
[1], get_num (&opP
->disp
, 60));
2819 tmpreg
= ((opP
->mode
== DREG
)
2820 ? 0x20 + (int) (opP
->reg
- DATA
)
2821 : (get_num (&opP
->disp
, 40) & 0x1F));
2822 install_operand (s
[1], tmpreg
);
2826 tmpreg
= get_num (&opP
->disp
, 10);
2829 install_operand (s
[1], tmpreg
);
2833 /* This depends on the fact that ADDR registers are eight
2834 more than their corresponding DATA regs, so the result
2835 will have the ADDR_REG bit set */
2836 install_operand (s
[1], opP
->reg
- DATA
);
2840 if (opP
->mode
== AINDR
)
2841 install_operand (s
[1], opP
->reg
- DATA
);
2843 install_operand (s
[1], opP
->index
.reg
- DATA
);
2847 if (opP
->reg
== FPI
)
2849 else if (opP
->reg
== FPS
)
2851 else if (opP
->reg
== FPC
)
2855 install_operand (s
[1], tmpreg
);
2858 case 'S': /* Ignore it */
2862 install_operand (s
[1], get_num (&opP
->disp
, 30));
2865 case 'U': /* Ignore it */
2884 as_fatal (_("failed sanity check"));
2885 } /* switch on cache token */
2886 install_operand (s
[1], tmpreg
);
2889 /* JF: These are out of order, I fear. */
2902 install_operand (s
[1], tmpreg
);
2928 install_operand (s
[1], tmpreg
);
2932 if (opP
->reg
== VAL
)
2951 install_operand (s
[1], tmpreg
);
2965 tmpreg
= (4 << 10) | ((opP
->reg
- BAD
) << 2);
2976 tmpreg
= (5 << 10) | ((opP
->reg
- BAC
) << 2);
2982 install_operand (s
[1], tmpreg
);
2985 know (opP
->reg
== PSR
);
2988 know (opP
->reg
== PCSR
);
3003 install_operand (s
[1], tmpreg
);
3006 tmpreg
= get_num (&opP
->disp
, 20);
3007 install_operand (s
[1], tmpreg
);
3009 case '_': /* used only for move16 absolute 32-bit address */
3010 if (isvar (&opP
->disp
))
3011 add_fix ('l', &opP
->disp
, 0, 0);
3012 tmpreg
= get_num (&opP
->disp
, 80);
3013 addword (tmpreg
>> 16);
3014 addword (tmpreg
& 0xFFFF);
3017 install_operand (s
[1], opP
->reg
- DATA0L
);
3018 opP
->reg
-= (DATA0L
);
3019 opP
->reg
&= 0x0F; /* remove upper/lower bit */
3026 /* By the time whe get here (FINALLY) the_ins contains the complete
3027 instruction, ready to be emitted. . . */
3031 reverse_16_bits (in
)
3037 static int mask
[16] =
3039 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
3040 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000
3042 for (n
= 0; n
< 16; n
++)
3045 out
|= mask
[15 - n
];
3048 } /* reverse_16_bits() */
3057 static int mask
[8] =
3059 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080,
3062 for (n
= 0; n
< 8; n
++)
3068 } /* reverse_8_bits() */
3070 /* Cause an extra frag to be generated here, inserting up to 10 bytes
3071 (that value is chosen in the frag_var call in md_assemble). TYPE
3072 is the subtype of the frag to be generated; its primary type is
3073 rs_machine_dependent.
3075 The TYPE parameter is also used by md_convert_frag_1 and
3076 md_estimate_size_before_relax. The appropriate type of fixup will
3077 be emitted by md_convert_frag_1.
3079 ADD becomes the FR_SYMBOL field of the frag, and OFF the FR_OFFSET. */
3081 install_operand (mode
, val
)
3088 the_ins
.opcode
[0] |= val
& 0xFF; /* JF FF is for M kludge */
3091 the_ins
.opcode
[0] |= val
<< 9;
3094 the_ins
.opcode
[1] |= val
<< 12;
3097 the_ins
.opcode
[1] |= val
<< 6;
3100 the_ins
.opcode
[1] |= val
;
3103 the_ins
.opcode
[2] |= val
<< 12;
3106 the_ins
.opcode
[2] |= val
<< 6;
3109 /* DANGER! This is a hack to force cas2l and cas2w cmds to be
3110 three words long! */
3112 the_ins
.opcode
[2] |= val
;
3115 the_ins
.opcode
[1] |= val
<< 7;
3118 the_ins
.opcode
[1] |= val
<< 10;
3122 the_ins
.opcode
[1] |= val
<< 5;
3127 the_ins
.opcode
[1] |= (val
<< 10) | (val
<< 7);
3130 the_ins
.opcode
[1] |= (val
<< 12) | val
;
3133 the_ins
.opcode
[0] |= val
= 0xff;
3136 the_ins
.opcode
[0] |= val
<< 9;
3139 the_ins
.opcode
[1] |= val
;
3142 the_ins
.opcode
[1] |= val
;
3143 the_ins
.numo
++; /* What a hack */
3146 the_ins
.opcode
[1] |= val
<< 4;
3154 the_ins
.opcode
[0] |= (val
<< 6);
3157 the_ins
.opcode
[1] = (val
>> 16);
3158 the_ins
.opcode
[2] = val
& 0xffff;
3161 the_ins
.opcode
[0] |= ((val
& 0x8) << (6 - 3));
3162 the_ins
.opcode
[0] |= ((val
& 0x7) << 9);
3163 the_ins
.opcode
[1] |= ((val
& 0x10) << (7 - 4));
3166 the_ins
.opcode
[0] |= ((val
& 0x8) << (6 - 3));
3167 the_ins
.opcode
[0] |= ((val
& 0x7) << 9);
3170 the_ins
.opcode
[1] |= val
<< 12;
3171 the_ins
.opcode
[1] |= ((val
& 0x10) << (7 - 4));
3174 the_ins
.opcode
[0] |= (val
& 0xF);
3175 the_ins
.opcode
[1] |= ((val
& 0x10) << (6 - 4));
3178 the_ins
.opcode
[1] |= (val
& 0xF);
3179 the_ins
.opcode
[1] |= ((val
& 0x10) << (6 - 4));
3182 the_ins
.opcode
[1] |= ((val
!= 1) << 10);
3186 as_fatal (_("failed sanity check."));
3188 } /* install_operand() */
3191 install_gen_operand (mode
, val
)
3198 the_ins
.opcode
[0] |= val
;
3201 /* This is a kludge!!! */
3202 the_ins
.opcode
[0] |= (val
& 0x07) << 9 | (val
& 0x38) << 3;
3211 the_ins
.opcode
[0] |= val
;
3213 /* more stuff goes here */
3215 as_fatal (_("failed sanity check."));
3217 } /* install_gen_operand() */
3220 * verify that we have some number of paren pairs, do m68k_ip_op(), and
3221 * then deal with the bitfield hack.
3225 crack_operand (str
, opP
)
3227 register struct m68k_op
*opP
;
3229 register int parens
;
3231 register char *beg_str
;
3239 for (parens
= 0; *str
&& (parens
> 0 || inquote
|| notend (str
)); str
++)
3245 else if (*str
== ')')
3249 opP
->error
= _("Extra )");
3255 if (flag_mri
&& *str
== '\'')
3256 inquote
= ! inquote
;
3258 if (!*str
&& parens
)
3260 opP
->error
= _("Missing )");
3265 if (m68k_ip_op (beg_str
, opP
) != 0)
3272 c
= *++str
; /* JF bitfield hack */
3277 as_bad (_("Missing operand"));
3280 /* Detect MRI REG symbols and convert them to REGLSTs. */
3281 if (opP
->mode
== CONTROL
&& (int)opP
->reg
< 0)
3284 opP
->mask
= ~(int)opP
->reg
;
3291 /* This is the guts of the machine-dependent assembler. STR points to a
3292 machine dependent instruction. This function is supposed to emit
3293 the frags/bytes it assembles to.
3297 insert_reg (regname
, regnum
)
3298 const char *regname
;
3304 #ifdef REGISTER_PREFIX
3305 if (!flag_reg_prefix_optional
)
3307 buf
[0] = REGISTER_PREFIX
;
3308 strcpy (buf
+ 1, regname
);
3313 symbol_table_insert (symbol_new (regname
, reg_section
, regnum
,
3314 &zero_address_frag
));
3316 for (i
= 0; regname
[i
]; i
++)
3317 buf
[i
] = islower (regname
[i
]) ? toupper (regname
[i
]) : regname
[i
];
3320 symbol_table_insert (symbol_new (buf
, reg_section
, regnum
,
3321 &zero_address_frag
));
3330 static const struct init_entry init_table
[] =
3389 /* control registers */
3390 { "sfc", SFC
}, /* Source Function Code */
3392 { "dfc", DFC
}, /* Destination Function Code */
3394 { "cacr", CACR
}, /* Cache Control Register */
3395 { "caar", CAAR
}, /* Cache Address Register */
3397 { "usp", USP
}, /* User Stack Pointer */
3398 { "vbr", VBR
}, /* Vector Base Register */
3399 { "msp", MSP
}, /* Master Stack Pointer */
3400 { "isp", ISP
}, /* Interrupt Stack Pointer */
3402 { "itt0", ITT0
}, /* Instruction Transparent Translation Reg 0 */
3403 { "itt1", ITT1
}, /* Instruction Transparent Translation Reg 1 */
3404 { "dtt0", DTT0
}, /* Data Transparent Translation Register 0 */
3405 { "dtt1", DTT1
}, /* Data Transparent Translation Register 1 */
3407 /* 68ec040 versions of same */
3408 { "iacr0", ITT0
}, /* Instruction Access Control Register 0 */
3409 { "iacr1", ITT1
}, /* Instruction Access Control Register 0 */
3410 { "dacr0", DTT0
}, /* Data Access Control Register 0 */
3411 { "dacr1", DTT1
}, /* Data Access Control Register 0 */
3413 /* mcf5200 versions of same. The ColdFire programmer's reference
3414 manual indicated that the order is 2,3,0,1, but Ken Rose
3415 <rose@netcom.com> says that 0,1,2,3 is the correct order. */
3416 { "acr0", ITT0
}, /* Access Control Unit 0 */
3417 { "acr1", ITT1
}, /* Access Control Unit 1 */
3418 { "acr2", DTT0
}, /* Access Control Unit 2 */
3419 { "acr3", DTT1
}, /* Access Control Unit 3 */
3421 { "tc", TC
}, /* MMU Translation Control Register */
3424 { "mmusr", MMUSR
}, /* MMU Status Register */
3425 { "srp", SRP
}, /* User Root Pointer */
3426 { "urp", URP
}, /* Supervisor Root Pointer */
3431 { "rombar", ROMBAR
}, /* ROM Base Address Register */
3432 { "rambar0", RAMBAR0
}, /* ROM Base Address Register */
3433 { "rambar1", RAMBAR1
}, /* ROM Base Address Register */
3434 { "mbar", MBAR
}, /* Module Base Address Register */
3435 /* end of control registers */
3469 /* 68ec030 versions of same */
3472 /* 68ec030 access control unit, identical to 030 MMU status reg */
3475 /* Suppressed data and address registers. */
3493 /* Upper and lower data and address registers, used by macw and msacw. */
3537 for (i
= 0; init_table
[i
].name
; i
++)
3538 insert_reg (init_table
[i
].name
, init_table
[i
].number
);
3541 static int no_68851
, no_68881
;
3544 /* a.out machine type. Default to 68020. */
3545 int m68k_aout_machtype
= 2;
3557 int shorts_this_frag
;
3560 /* In MRI mode, the instruction and operands are separated by a
3561 space. Anything following the operands is a comment. The label
3562 has already been removed. */
3570 for (s
= str
; *s
!= '\0'; s
++)
3572 if ((*s
== ' ' || *s
== '\t') && ! inquote
)
3590 inquote
= ! inquote
;
3595 memset ((char *) (&the_ins
), '\0', sizeof (the_ins
));
3600 for (n
= 0; n
< the_ins
.numargs
; n
++)
3601 if (the_ins
.operands
[n
].error
)
3603 er
= the_ins
.operands
[n
].error
;
3609 as_bad (_("%s -- statement `%s' ignored"), er
, str
);
3613 /* If there is a current label, record that it marks an instruction. */
3614 if (current_label
!= NULL
)
3616 current_label
->text
= 1;
3617 current_label
= NULL
;
3620 if (the_ins
.nfrag
== 0)
3622 /* No frag hacking involved; just put it out */
3623 toP
= frag_more (2 * the_ins
.numo
);
3624 fromP
= &the_ins
.opcode
[0];
3625 for (m
= the_ins
.numo
; m
; --m
)
3627 md_number_to_chars (toP
, (long) (*fromP
), 2);
3631 /* put out symbol-dependent info */
3632 for (m
= 0; m
< the_ins
.nrel
; m
++)
3634 switch (the_ins
.reloc
[m
].wid
)
3653 as_fatal (_("Don't know how to figure width of %c in md_assemble()"),
3654 the_ins
.reloc
[m
].wid
);
3657 fixP
= fix_new_exp (frag_now
,
3658 ((toP
- frag_now
->fr_literal
)
3659 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
3661 &the_ins
.reloc
[m
].exp
,
3662 the_ins
.reloc
[m
].pcrel
,
3663 get_reloc_code (n
, the_ins
.reloc
[m
].pcrel
,
3664 the_ins
.reloc
[m
].pic_reloc
));
3665 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3666 if (the_ins
.reloc
[m
].wid
== 'B')
3667 fixP
->fx_signed
= 1;
3672 /* There's some frag hacking */
3673 for (n
= 0, fromP
= &the_ins
.opcode
[0]; n
< the_ins
.nfrag
; n
++)
3678 wid
= 2 * the_ins
.fragb
[n
].fragoff
;
3680 wid
= 2 * (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
3681 toP
= frag_more (wid
);
3683 shorts_this_frag
= 0;
3684 for (m
= wid
/ 2; m
; --m
)
3686 md_number_to_chars (toP
, (long) (*fromP
), 2);
3691 for (m
= 0; m
< the_ins
.nrel
; m
++)
3693 if ((the_ins
.reloc
[m
].n
) >= 2 * shorts_this_frag
)
3695 the_ins
.reloc
[m
].n
-= 2 * shorts_this_frag
;
3698 wid
= the_ins
.reloc
[m
].wid
;
3701 the_ins
.reloc
[m
].wid
= 0;
3702 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
3704 fixP
= fix_new_exp (frag_now
,
3705 ((toP
- frag_now
->fr_literal
)
3706 - the_ins
.numo
* 2 + the_ins
.reloc
[m
].n
),
3708 &the_ins
.reloc
[m
].exp
,
3709 the_ins
.reloc
[m
].pcrel
,
3710 get_reloc_code (wid
, the_ins
.reloc
[m
].pcrel
,
3711 the_ins
.reloc
[m
].pic_reloc
));
3712 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3714 (void) frag_var (rs_machine_dependent
, 10, 0,
3715 (relax_substateT
) (the_ins
.fragb
[n
].fragty
),
3716 the_ins
.fragb
[n
].fadd
, the_ins
.fragb
[n
].foff
, to_beg_P
);
3718 n
= (the_ins
.numo
- the_ins
.fragb
[n
- 1].fragoff
);
3719 shorts_this_frag
= 0;
3722 toP
= frag_more (n
* sizeof (short));
3725 md_number_to_chars (toP
, (long) (*fromP
), 2);
3731 for (m
= 0; m
< the_ins
.nrel
; m
++)
3735 wid
= the_ins
.reloc
[m
].wid
;
3738 the_ins
.reloc
[m
].wid
= 0;
3739 wid
= (wid
== 'b') ? 1 : (wid
== 'w') ? 2 : (wid
== 'l') ? 4 : 4000;
3741 fixP
= fix_new_exp (frag_now
,
3742 ((the_ins
.reloc
[m
].n
+ toP
- frag_now
->fr_literal
)
3743 - shorts_this_frag
* 2),
3745 &the_ins
.reloc
[m
].exp
,
3746 the_ins
.reloc
[m
].pcrel
,
3747 get_reloc_code (wid
, the_ins
.reloc
[m
].pcrel
,
3748 the_ins
.reloc
[m
].pic_reloc
));
3749 fixP
->fx_pcrel_adjust
= the_ins
.reloc
[m
].pcrel_fix
;
3757 * md_begin -- set up hash tables with 68000 instructions.
3758 * similar to what the vax assembler does. ---phr
3760 /* RMS claims the thing to do is take the m68k-opcode.h table, and make
3761 a copy of it at runtime, adding in the information we want but isn't
3762 there. I think it'd be better to have an awk script hack the table
3763 at compile time. Or even just xstr the table and use it as-is. But
3764 my lord ghod hath spoken, so we do it this way. Excuse the ugly var
3767 register const struct m68k_opcode
*ins
;
3768 register struct m68k_incant
*hack
, *slak
;
3769 register const char *retval
= 0; /* empty string, or error msg text */
3775 flag_reg_prefix_optional
= 1;
3777 if (! m68k_rel32_from_cmdline
)
3781 op_hash
= hash_new ();
3783 obstack_begin (&robyn
, 4000);
3784 for (i
= 0; i
< m68k_numopcodes
; i
++)
3786 hack
= slak
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3789 ins
= &m68k_opcodes
[i
];
3790 /* We *could* ignore insns that don't match our arch here
3791 but just leaving them out of the hash. */
3792 slak
->m_operands
= ins
->args
;
3793 slak
->m_opnum
= strlen (slak
->m_operands
) / 2;
3794 slak
->m_arch
= ins
->arch
;
3795 slak
->m_opcode
= ins
->opcode
;
3796 /* This is kludgey */
3797 slak
->m_codenum
= ((ins
->match
) & 0xffffL
) ? 2 : 1;
3798 if (i
+ 1 != m68k_numopcodes
3799 && !strcmp (ins
->name
, m68k_opcodes
[i
+ 1].name
))
3801 slak
->m_next
= (struct m68k_incant
*) obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3806 slak
= slak
->m_next
;
3810 retval
= hash_insert (op_hash
, ins
->name
, (char *) hack
);
3812 as_fatal (_("Internal Error: Can't hash %s: %s"), ins
->name
, retval
);
3815 for (i
= 0; i
< m68k_numaliases
; i
++)
3817 const char *name
= m68k_opcode_aliases
[i
].primary
;
3818 const char *alias
= m68k_opcode_aliases
[i
].alias
;
3819 PTR val
= hash_find (op_hash
, name
);
3821 as_fatal (_("Internal Error: Can't find %s in hash table"), name
);
3822 retval
= hash_insert (op_hash
, alias
, val
);
3824 as_fatal (_("Internal Error: Can't hash %s: %s"), alias
, retval
);
3827 /* In MRI mode, all unsized branches are variable sized. Normally,
3828 they are word sized. */
3831 static struct m68k_opcode_alias mri_aliases
[] =
3852 i
< (int) (sizeof mri_aliases
/ sizeof mri_aliases
[0]);
3855 const char *name
= mri_aliases
[i
].primary
;
3856 const char *alias
= mri_aliases
[i
].alias
;
3857 PTR val
= hash_find (op_hash
, name
);
3859 as_fatal (_("Internal Error: Can't find %s in hash table"), name
);
3860 retval
= hash_jam (op_hash
, alias
, val
);
3862 as_fatal (_("Internal Error: Can't hash %s: %s"), alias
, retval
);
3866 for (i
= 0; i
< (int) sizeof (mklower_table
); i
++)
3867 mklower_table
[i
] = (isupper (c
= (char) i
)) ? tolower (c
) : c
;
3869 for (i
= 0; i
< (int) sizeof (notend_table
); i
++)
3871 notend_table
[i
] = 0;
3872 alt_notend_table
[i
] = 0;
3874 notend_table
[','] = 1;
3875 notend_table
['{'] = 1;
3876 notend_table
['}'] = 1;
3877 alt_notend_table
['a'] = 1;
3878 alt_notend_table
['A'] = 1;
3879 alt_notend_table
['d'] = 1;
3880 alt_notend_table
['D'] = 1;
3881 alt_notend_table
['#'] = 1;
3882 alt_notend_table
['&'] = 1;
3883 alt_notend_table
['f'] = 1;
3884 alt_notend_table
['F'] = 1;
3885 #ifdef REGISTER_PREFIX
3886 alt_notend_table
[REGISTER_PREFIX
] = 1;
3889 /* We need to put '(' in alt_notend_table to handle
3890 cas2 %d0:%d2,%d3:%d4,(%a0):(%a1)
3892 alt_notend_table
['('] = 1;
3894 /* We need to put '@' in alt_notend_table to handle
3895 cas2 %d0:%d2,%d3:%d4,@(%d0):@(%d1)
3897 alt_notend_table
['@'] = 1;
3899 /* We need to put digits in alt_notend_table to handle
3900 bfextu %d0{24:1},%d0
3902 alt_notend_table
['0'] = 1;
3903 alt_notend_table
['1'] = 1;
3904 alt_notend_table
['2'] = 1;
3905 alt_notend_table
['3'] = 1;
3906 alt_notend_table
['4'] = 1;
3907 alt_notend_table
['5'] = 1;
3908 alt_notend_table
['6'] = 1;
3909 alt_notend_table
['7'] = 1;
3910 alt_notend_table
['8'] = 1;
3911 alt_notend_table
['9'] = 1;
3913 #ifndef MIT_SYNTAX_ONLY
3914 /* Insert pseudo ops, these have to go into the opcode table since
3915 gas expects pseudo ops to start with a dot */
3918 while (mote_pseudo_table
[n
].poc_name
)
3920 hack
= (struct m68k_incant
*)
3921 obstack_alloc (&robyn
, sizeof (struct m68k_incant
));
3922 hash_insert (op_hash
,
3923 mote_pseudo_table
[n
].poc_name
, (char *) hack
);
3924 hack
->m_operands
= 0;
3934 record_alignment (text_section
, 2);
3935 record_alignment (data_section
, 2);
3936 record_alignment (bss_section
, 2);
3941 select_control_regs ()
3943 /* Note which set of "movec" control registers is available. */
3944 switch (cpu_of_arch (current_architecture
))
3947 control_regs
= m68000_control_regs
;
3950 control_regs
= m68010_control_regs
;
3954 control_regs
= m68020_control_regs
;
3957 control_regs
= m68040_control_regs
;
3960 control_regs
= m68060_control_regs
;
3963 control_regs
= cpu32_control_regs
;
3968 control_regs
= mcf_control_regs
;
3976 m68k_init_after_args ()
3978 if (cpu_of_arch (current_architecture
) == 0)
3981 const char *default_cpu
= TARGET_CPU
;
3983 if (*default_cpu
== 'm')
3985 for (i
= 0; i
< n_archs
; i
++)
3986 if (strcasecmp (default_cpu
, archs
[i
].name
) == 0)
3990 as_bad (_("unrecognized default cpu `%s' ???"), TARGET_CPU
);
3991 current_architecture
|= m68020
;
3994 current_architecture
|= archs
[i
].arch
;
3996 /* Permit m68881 specification with all cpus; those that can't work
3997 with a coprocessor could be doing emulation. */
3998 if (current_architecture
& m68851
)
4000 if (current_architecture
& m68040
)
4002 as_warn (_("68040 and 68851 specified; mmu instructions may assemble incorrectly"));
4005 /* What other incompatibilities could we check for? */
4007 /* Toss in some default assumptions about coprocessors. */
4009 && (cpu_of_arch (current_architecture
)
4010 /* Can CPU32 have a 68881 coprocessor?? */
4011 & (m68020
| m68030
| cpu32
)))
4013 current_architecture
|= m68881
;
4016 && (cpu_of_arch (current_architecture
) & m68020up
) != 0
4017 && (cpu_of_arch (current_architecture
) & m68040up
) == 0)
4019 current_architecture
|= m68851
;
4021 if (no_68881
&& (current_architecture
& m68881
))
4022 as_bad (_("options for 68881 and no-68881 both given"));
4023 if (no_68851
&& (current_architecture
& m68851
))
4024 as_bad (_("options for 68851 and no-68851 both given"));
4027 /* Work out the magic number. This isn't very general. */
4028 if (current_architecture
& m68000
)
4029 m68k_aout_machtype
= 0;
4030 else if (current_architecture
& m68010
)
4031 m68k_aout_machtype
= 1;
4032 else if (current_architecture
& m68020
)
4033 m68k_aout_machtype
= 2;
4035 m68k_aout_machtype
= 2;
4038 /* Note which set of "movec" control registers is available. */
4039 select_control_regs ();
4041 if (cpu_of_arch (current_architecture
) < m68020
4042 || arch_coldfire_p (current_architecture
))
4043 md_relax_table
[TAB (PCINDEX
, BYTE
)].rlx_more
= 0;
4046 /* This is called when a label is defined. */
4049 m68k_frob_label (sym
)
4052 struct label_line
*n
;
4054 n
= (struct label_line
*) xmalloc (sizeof *n
);
4057 as_where (&n
->file
, &n
->line
);
4063 /* This is called when a value that is not an instruction is emitted. */
4066 m68k_flush_pending_output ()
4068 current_label
= NULL
;
4071 /* This is called at the end of the assembly, when the final value of
4072 the label is known. We warn if this is a text symbol aligned at an
4076 m68k_frob_symbol (sym
)
4079 if (S_GET_SEGMENT (sym
) == reg_section
4080 && (int) S_GET_VALUE (sym
) < 0)
4082 S_SET_SEGMENT (sym
, absolute_section
);
4083 S_SET_VALUE (sym
, ~(int)S_GET_VALUE (sym
));
4085 else if ((S_GET_VALUE (sym
) & 1) != 0)
4087 struct label_line
*l
;
4089 for (l
= labels
; l
!= NULL
; l
= l
->next
)
4091 if (l
->label
== sym
)
4094 as_warn_where (l
->file
, l
->line
,
4095 _("text label `%s' aligned to odd boundary"),
4103 /* This is called if we go in or out of MRI mode because of the .mri
4107 m68k_mri_mode_change (on
)
4112 if (! flag_reg_prefix_optional
)
4114 flag_reg_prefix_optional
= 1;
4115 #ifdef REGISTER_PREFIX
4120 if (! m68k_rel32_from_cmdline
)
4125 if (! reg_prefix_optional_seen
)
4127 #ifdef REGISTER_PREFIX_OPTIONAL
4128 flag_reg_prefix_optional
= REGISTER_PREFIX_OPTIONAL
;
4130 flag_reg_prefix_optional
= 0;
4132 #ifdef REGISTER_PREFIX
4137 if (! m68k_rel32_from_cmdline
)
4142 /* Equal to MAX_PRECISION in atof-ieee.c */
4143 #define MAX_LITTLENUMS 6
4145 /* Turn a string in input_line_pointer into a floating point constant
4146 of type TYPE, and store the appropriate bytes in *LITP. The number
4147 of LITTLENUMS emitted is stored in *SIZEP. An error message is
4148 returned, or NULL on OK. */
4151 md_atof (type
, litP
, sizeP
)
4157 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4158 LITTLENUM_TYPE
*wordP
;
4189 return _("Bad call to MD_ATOF()");
4191 t
= atof_ieee (input_line_pointer
, type
, words
);
4193 input_line_pointer
= t
;
4195 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4196 for (wordP
= words
; prec
--;)
4198 md_number_to_chars (litP
, (long) (*wordP
++), sizeof (LITTLENUM_TYPE
));
4199 litP
+= sizeof (LITTLENUM_TYPE
);
4205 md_number_to_chars (buf
, val
, n
)
4210 number_to_chars_bigendian (buf
, val
, n
);
4214 md_apply_fix_2 (fixP
, val
)
4218 addressT upper_limit
;
4219 offsetT lower_limit
;
4221 /* This is unnecessary but it convinces the native rs6000 compiler
4222 to generate the code we want. */
4223 char *buf
= fixP
->fx_frag
->fr_literal
;
4224 buf
+= fixP
->fx_where
;
4225 /* end ibm compiler workaround */
4227 if (val
& 0x80000000)
4228 val
|= ~(addressT
)0x7fffffff;
4235 memset (buf
, 0, fixP
->fx_size
);
4236 fixP
->fx_addnumber
= val
; /* Remember value for emit_reloc */
4238 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
4239 && !S_IS_DEFINED (fixP
->fx_addsy
)
4240 && !S_IS_WEAK (fixP
->fx_addsy
))
4241 S_SET_WEAK (fixP
->fx_addsy
);
4246 #ifdef BFD_ASSEMBLER
4247 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
4248 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4252 switch (fixP
->fx_size
)
4254 /* The cast to offsetT below are necessary to make code correct for
4255 machines where ints are smaller than offsetT */
4259 lower_limit
= - (offsetT
) 0x80;
4262 *buf
++ = (val
>> 8);
4264 upper_limit
= 0x7fff;
4265 lower_limit
= - (offsetT
) 0x8000;
4268 *buf
++ = (val
>> 24);
4269 *buf
++ = (val
>> 16);
4270 *buf
++ = (val
>> 8);
4272 upper_limit
= 0x7fffffff;
4273 lower_limit
= - (offsetT
) 0x7fffffff - 1; /* avoid constant overflow */
4276 BAD_CASE (fixP
->fx_size
);
4279 /* Fix up a negative reloc. */
4280 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_subsy
!= NULL
)
4282 fixP
->fx_addsy
= fixP
->fx_subsy
;
4283 fixP
->fx_subsy
= NULL
;
4287 /* For non-pc-relative values, it's conceivable we might get something
4288 like "0xff" for a byte field. So extend the upper part of the range
4289 to accept such numbers. We arbitrarily disallow "-0xff" or "0xff+0xff",
4290 so that we can do any range checking at all. */
4291 if (! fixP
->fx_pcrel
&& ! fixP
->fx_signed
)
4292 upper_limit
= upper_limit
* 2 + 1;
4294 if ((addressT
) val
> upper_limit
4295 && (val
> 0 || val
< lower_limit
))
4296 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("value out of range"));
4298 /* A one byte PC-relative reloc means a short branch. We can't use
4299 a short branch with a value of 0 or -1, because those indicate
4300 different opcodes (branches with longer offsets). fixup_segment
4301 in write.c may have clobbered fx_pcrel, so we need to examine the
4304 #ifdef BFD_ASSEMBLER
4305 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
4308 && fixP
->fx_size
== 1
4309 && (fixP
->fx_addsy
== NULL
4310 || S_IS_DEFINED (fixP
->fx_addsy
))
4311 && (val
== 0 || val
== -1))
4312 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("invalid byte branch offset"));
4315 #ifdef BFD_ASSEMBLER
4317 md_apply_fix (fixP
, valp
)
4321 md_apply_fix_2 (fixP
, (addressT
) *valp
);
4325 void md_apply_fix (fixP
, val
)
4329 md_apply_fix_2 (fixP
, (addressT
) val
);
4333 /* *fragP has been relaxed to its final size, and now needs to have
4334 the bytes inside it modified to conform to the new size There is UGLY
4338 md_convert_frag_1 (fragP
)
4339 register fragS
*fragP
;
4344 /* Address in object code of the displacement. */
4345 register int object_address
= fragP
->fr_fix
+ fragP
->fr_address
;
4347 /* Address in gas core of the place to store the displacement. */
4348 /* This convinces the native rs6000 compiler to generate the code we
4350 register char *buffer_address
= fragP
->fr_literal
;
4351 buffer_address
+= fragP
->fr_fix
;
4352 /* end ibm compiler workaround */
4354 /* The displacement of the address, from current location. */
4355 disp
= fragP
->fr_symbol
? S_GET_VALUE (fragP
->fr_symbol
) : 0;
4356 disp
= (disp
+ fragP
->fr_offset
) - object_address
;
4358 #ifdef BFD_ASSEMBLER
4359 disp
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
4362 switch (fragP
->fr_subtype
)
4364 case TAB (BRANCHBWL
, BYTE
):
4365 case TAB (BRABSJUNC
, BYTE
):
4366 case TAB (BRABSJCOND
, BYTE
):
4367 case TAB (BRANCHBW
, BYTE
):
4368 know (issbyte (disp
));
4370 as_bad (_("short branch with zero offset: use :w"));
4371 fixP
= fix_new (fragP
, fragP
->fr_fix
- 1, 1, fragP
->fr_symbol
,
4372 fragP
->fr_offset
, 1, RELAX_RELOC_PC8
);
4373 fixP
->fx_pcrel_adjust
= -1;
4375 case TAB (BRANCHBWL
, SHORT
):
4376 case TAB (BRABSJUNC
, SHORT
):
4377 case TAB (BRABSJCOND
, SHORT
):
4378 case TAB (BRANCHBW
, SHORT
):
4379 fragP
->fr_opcode
[1] = 0x00;
4380 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4381 1, RELAX_RELOC_PC16
);
4384 case TAB (BRANCHBWL
, LONG
):
4385 fragP
->fr_opcode
[1] = (char) 0xFF;
4386 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4387 1, RELAX_RELOC_PC32
);
4390 case TAB (BRABSJUNC
, LONG
):
4391 if (fragP
->fr_opcode
[0] == 0x61) /* jbsr */
4393 fragP
->fr_opcode
[0] = 0x4E;
4394 fragP
->fr_opcode
[1] = (char) 0xB9; /* JSR with ABSL LONG operand */
4395 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4396 0, RELAX_RELOC_ABS32
);
4399 else if (fragP
->fr_opcode
[0] == 0x60) /* jbra */
4401 fragP
->fr_opcode
[0] = 0x4E;
4402 fragP
->fr_opcode
[1] = (char) 0xF9; /* JMP with ABSL LONG operand */
4403 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4404 0, RELAX_RELOC_ABS32
);
4409 /* This cannot happen, because jbsr and jbra are the only two
4410 unconditional branches. */
4414 case TAB (BRABSJCOND
, LONG
):
4415 /* Only Bcc 68000 instructions can come here. */
4416 /* Change bcc into b!cc/jmp absl long. */
4418 fragP
->fr_opcode
[0] ^= 0x01; /* invert bcc */
4419 fragP
->fr_opcode
[1] = 0x6;/* branch offset = 6 */
4421 /* JF: these used to be fr_opcode[2,3], but they may be in a
4422 different frag, in which case refering to them is a no-no.
4423 Only fr_opcode[0,1] are guaranteed to work. */
4424 *buffer_address
++ = 0x4e; /* put in jmp long (0x4ef9) */
4425 *buffer_address
++ = (char) 0xf9;
4426 fragP
->fr_fix
+= 2; /* account for jmp instruction */
4427 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
,
4428 fragP
->fr_offset
, 0, RELAX_RELOC_ABS32
);
4431 case TAB (FBRANCH
, SHORT
):
4432 know ((fragP
->fr_opcode
[1] & 0x40) == 0);
4433 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4434 1, RELAX_RELOC_PC16
);
4437 case TAB (FBRANCH
, LONG
):
4438 fragP
->fr_opcode
[1] |= 0x40; /* Turn on LONG bit */
4439 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4440 1, RELAX_RELOC_PC32
);
4443 case TAB (DBCCLBR
, SHORT
):
4444 case TAB (DBCCABSJ
, SHORT
):
4445 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4446 1, RELAX_RELOC_PC16
);
4449 case TAB (DBCCLBR
, LONG
):
4450 /* only DBcc instructions can come here */
4451 /* Change dbcc into dbcc/bral. */
4453 /* JF: these used to be fr_opcode[2-7], but that's wrong */
4454 *buffer_address
++ = 0x00; /* branch offset = 4 */
4455 *buffer_address
++ = 0x04;
4456 *buffer_address
++ = 0x60; /* put in bra pc+6 */
4457 *buffer_address
++ = 0x06;
4458 *buffer_address
++ = 0x60; /* Put in bral (0x60ff). */
4459 *buffer_address
++ = (char) 0xff;
4461 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
4462 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
, 1,
4466 case TAB (DBCCABSJ
, LONG
):
4467 /* only DBcc instructions can come here */
4468 /* Change dbcc into dbcc/jmp. */
4470 /* JF: these used to be fr_opcode[2-7], but that's wrong */
4471 *buffer_address
++ = 0x00; /* branch offset = 4 */
4472 *buffer_address
++ = 0x04;
4473 *buffer_address
++ = 0x60; /* put in bra pc+6 */
4474 *buffer_address
++ = 0x06;
4475 *buffer_address
++ = 0x4e; /* Put in jmp long (0x4ef9). */
4476 *buffer_address
++ = (char) 0xf9;
4478 fragP
->fr_fix
+= 6; /* account for bra/jmp instructions */
4479 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
, 0,
4483 case TAB (PCREL1632
, SHORT
):
4484 fragP
->fr_opcode
[1] &= ~0x3F;
4485 fragP
->fr_opcode
[1] |= 0x3A; /* 072 - mode 7.2 */
4486 fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
4487 fragP
->fr_offset
, 1, RELAX_RELOC_PC16
);
4490 case TAB (PCREL1632
, LONG
):
4491 /* Already set to mode 7.3; this indicates: PC indirect with
4492 suppressed index, 32-bit displacement. */
4493 *buffer_address
++ = 0x01;
4494 *buffer_address
++ = 0x70;
4496 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
4497 fragP
->fr_offset
, 1, RELAX_RELOC_PC32
);
4498 fixP
->fx_pcrel_adjust
= 2;
4501 case TAB (PCINDEX
, BYTE
):
4502 assert (fragP
->fr_fix
>= 2);
4503 buffer_address
[-2] &= ~1;
4504 fixP
= fix_new (fragP
, fragP
->fr_fix
- 1, 1, fragP
->fr_symbol
,
4505 fragP
->fr_offset
, 1, RELAX_RELOC_PC8
);
4506 fixP
->fx_pcrel_adjust
= 1;
4508 case TAB (PCINDEX
, SHORT
):
4509 assert (fragP
->fr_fix
>= 2);
4510 buffer_address
[-2] |= 0x1;
4511 buffer_address
[-1] = 0x20;
4512 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 2, fragP
->fr_symbol
,
4513 fragP
->fr_offset
, 1, RELAX_RELOC_PC16
);
4514 fixP
->fx_pcrel_adjust
= 2;
4517 case TAB (PCINDEX
, LONG
):
4518 assert (fragP
->fr_fix
>= 2);
4519 buffer_address
[-2] |= 0x1;
4520 buffer_address
[-1] = 0x30;
4521 fixP
= fix_new (fragP
, (int) (fragP
->fr_fix
), 4, fragP
->fr_symbol
,
4522 fragP
->fr_offset
, 1, RELAX_RELOC_PC32
);
4523 fixP
->fx_pcrel_adjust
= 2;
4526 case TAB (ABSTOPCREL
, SHORT
):
4527 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
4528 1, RELAX_RELOC_PC16
);
4531 case TAB (ABSTOPCREL
, LONG
):
4532 /* The thing to do here is force it to ABSOLUTE LONG, since
4533 ABSTOPCREL is really trying to shorten an ABSOLUTE address anyway */
4534 if ((fragP
->fr_opcode
[1] & 0x3F) != 0x3A)
4536 fragP
->fr_opcode
[1] &= ~0x3F;
4537 fragP
->fr_opcode
[1] |= 0x39; /* Mode 7.1 */
4538 fix_new (fragP
, fragP
->fr_fix
, 4, fragP
->fr_symbol
, fragP
->fr_offset
,
4539 0, RELAX_RELOC_ABS32
);
4545 #ifndef BFD_ASSEMBLER
4548 md_convert_frag (headers
, sec
, fragP
)
4549 object_headers
*headers ATTRIBUTE_UNUSED
;
4550 segT sec ATTRIBUTE_UNUSED
;
4553 md_convert_frag_1 (fragP
);
4559 md_convert_frag (abfd
, sec
, fragP
)
4560 bfd
*abfd ATTRIBUTE_UNUSED
;
4561 segT sec ATTRIBUTE_UNUSED
;
4564 md_convert_frag_1 (fragP
);
4568 /* Force truly undefined symbols to their maximum size, and generally set up
4569 the frag list to be relaxed
4572 md_estimate_size_before_relax (fragP
, segment
)
4573 register fragS
*fragP
;
4578 old_fix
= fragP
->fr_fix
;
4580 /* Handle SZ_UNDEF first, it can be changed to BYTE or SHORT. */
4581 switch (fragP
->fr_subtype
)
4583 case TAB (BRANCHBWL
, SZ_UNDEF
):
4584 case TAB (BRABSJUNC
, SZ_UNDEF
):
4586 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4587 && relaxable_symbol (fragP
->fr_symbol
))
4589 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
4591 else if (flag_short_refs
)
4593 /* Symbol is undefined and we want short ref. */
4594 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4599 /* Symbol is still undefined. Make it LONG. */
4600 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), LONG
);
4606 case TAB (BRABSJCOND
, SZ_UNDEF
):
4608 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4609 && relaxable_symbol (fragP
->fr_symbol
))
4611 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
4613 else if (flag_short_refs
)
4615 /* Symbol is undefined and we want short ref. */
4616 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4621 /* Symbol is still undefined. Make it LONG. */
4622 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), LONG
);
4628 case TAB (BRANCHBW
, SZ_UNDEF
):
4630 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4631 && relaxable_symbol (fragP
->fr_symbol
))
4633 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), BYTE
);
4637 /* Symbol is undefined and we don't have long branches. */
4638 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4644 case TAB (FBRANCH
, SZ_UNDEF
):
4646 if ((S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4647 && relaxable_symbol (fragP
->fr_symbol
))
4650 fragP
->fr_subtype
= TAB (FBRANCH
, SHORT
);
4655 fragP
->fr_subtype
= TAB (FBRANCH
, LONG
);
4661 case TAB (DBCCLBR
, SZ_UNDEF
):
4662 case TAB (DBCCABSJ
, SZ_UNDEF
):
4664 if ((S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4665 && relaxable_symbol (fragP
->fr_symbol
))
4668 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4673 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), LONG
);
4674 fragP
->fr_var
+= 10;
4679 case TAB (PCREL1632
, SZ_UNDEF
):
4681 if (((S_GET_SEGMENT (fragP
->fr_symbol
)) == segment
4682 && relaxable_symbol (fragP
->fr_symbol
))
4685 fragP
->fr_subtype
= TAB (PCREL1632
, SHORT
);
4690 fragP
->fr_subtype
= TAB (PCREL1632
, LONG
);
4696 case TAB (PCINDEX
, SZ_UNDEF
):
4697 if ((S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4698 && relaxable_symbol (fragP
->fr_symbol
)))
4700 fragP
->fr_subtype
= TAB (PCINDEX
, BYTE
);
4704 fragP
->fr_subtype
= TAB (PCINDEX
, LONG
);
4709 case TAB (ABSTOPCREL
, SZ_UNDEF
):
4711 if ((S_GET_SEGMENT (fragP
->fr_symbol
) == segment
4712 && relaxable_symbol (fragP
->fr_symbol
)))
4714 fragP
->fr_subtype
= TAB (ABSTOPCREL
, SHORT
);
4719 fragP
->fr_subtype
= TAB (ABSTOPCREL
, LONG
);
4729 /* Now that SZ_UNDEF are taken care of, check others. */
4730 switch (fragP
->fr_subtype
)
4732 case TAB (BRANCHBWL
, BYTE
):
4733 case TAB (BRABSJUNC
, BYTE
):
4734 case TAB (BRABSJCOND
, BYTE
):
4735 case TAB (BRANCHBW
, BYTE
):
4736 /* We can't do a short jump to the next instruction, so in that
4737 case we force word mode. At this point S_GET_VALUE should
4738 return the offset of the symbol within its frag. If the
4739 symbol is at the start of a frag, and it is the next frag
4740 with any data in it (usually this is just the next frag, but
4741 assembler listings may introduce empty frags), we must use
4743 if (fragP
->fr_symbol
&& S_GET_VALUE (fragP
->fr_symbol
) == 0)
4748 stop
= symbol_get_frag (fragP
->fr_symbol
);
4749 for (l
= fragP
->fr_next
; l
!= stop
; l
= l
->fr_next
)
4750 if (l
->fr_fix
+ l
->fr_var
!= 0)
4754 fragP
->fr_subtype
= TAB (TABTYPE (fragP
->fr_subtype
), SHORT
);
4762 return fragP
->fr_var
+ fragP
->fr_fix
- old_fix
;
4765 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
4766 /* the bit-field entries in the relocation_info struct plays hell
4767 with the byte-order problems of cross-assembly. So as a hack,
4768 I added this mach. dependent ri twiddler. Ugly, but it gets
4770 /* on m68k: first 4 bytes are normal unsigned long, next three bytes
4771 are symbolnum, most sig. byte first. Last byte is broken up with
4772 bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
4773 nibble as nuthin. (on Sun 3 at least) */
4774 /* Translate the internal relocation information into target-specific
4778 md_ri_to_chars (the_bytes
, ri
)
4780 struct reloc_info_generic
*ri
;
4783 md_number_to_chars (the_bytes
, ri
->r_address
, 4);
4784 /* now the fun stuff */
4785 the_bytes
[4] = (ri
->r_symbolnum
>> 16) & 0x0ff;
4786 the_bytes
[5] = (ri
->r_symbolnum
>> 8) & 0x0ff;
4787 the_bytes
[6] = ri
->r_symbolnum
& 0x0ff;
4788 the_bytes
[7] = (((ri
->r_pcrel
<< 7) & 0x80) | ((ri
->r_length
<< 5) & 0x60) |
4789 ((ri
->r_extern
<< 4) & 0x10));
4792 #endif /* comment */
4794 #ifndef BFD_ASSEMBLER
4796 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4799 relax_addressT segment_address_in_file
;
4802 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4803 * Out: GNU LD relocation length code: 0, 1, or 2.
4806 static CONST
unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4809 know (fixP
->fx_addsy
!= NULL
);
4811 md_number_to_chars (where
,
4812 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
4815 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4816 ? S_GET_TYPE (fixP
->fx_addsy
)
4817 : fixP
->fx_addsy
->sy_number
);
4819 where
[4] = (r_symbolnum
>> 16) & 0x0ff;
4820 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4821 where
[6] = r_symbolnum
& 0x0ff;
4822 where
[7] = (((fixP
->fx_pcrel
<< 7) & 0x80) | ((nbytes_r_length
[fixP
->fx_size
] << 5) & 0x60) |
4823 (((!S_IS_DEFINED (fixP
->fx_addsy
)) << 4) & 0x10));
4827 #endif /* OBJ_AOUT or OBJ_BOUT */
4829 #ifndef WORKING_DOT_WORD
4830 CONST
int md_short_jump_size
= 4;
4831 CONST
int md_long_jump_size
= 6;
4834 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
4836 addressT from_addr
, to_addr
;
4837 fragS
*frag ATTRIBUTE_UNUSED
;
4838 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
4842 offset
= to_addr
- (from_addr
+ 2);
4844 md_number_to_chars (ptr
, (valueT
) 0x6000, 2);
4845 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 2);
4849 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
4851 addressT from_addr
, to_addr
;
4857 if (!HAVE_LONG_BRANCH(current_architecture
))
4859 offset
= to_addr
- S_GET_VALUE (to_symbol
);
4860 md_number_to_chars (ptr
, (valueT
) 0x4EF9, 2);
4861 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
4862 fix_new (frag
, (ptr
+ 2) - frag
->fr_literal
, 4, to_symbol
, (offsetT
) 0,
4867 offset
= to_addr
- (from_addr
+ 2);
4868 md_number_to_chars (ptr
, (valueT
) 0x60ff, 2);
4869 md_number_to_chars (ptr
+ 2, (valueT
) offset
, 4);
4875 /* Different values of OK tell what its OK to return. Things that
4876 aren't OK are an error (what a shock, no?)
4879 10: Absolute 1:8 only
4880 20: Absolute 0:7 only
4881 30: absolute 0:15 only
4882 40: Absolute 0:31 only
4883 50: absolute 0:127 only
4884 55: absolute -64:63 only
4885 60: absolute -128:127 only
4886 70: absolute 0:4095 only
4893 struct m68k_exp
*exp
;
4896 if (exp
->exp
.X_op
== O_absent
)
4898 /* Do the same thing the VAX asm does */
4899 op (exp
) = O_constant
;
4905 as_warn (_("expression out of range: defaulting to 1"));
4909 else if (exp
->exp
.X_op
== O_constant
)
4914 if (offs (exp
) < 1 || offs (exp
) > 8)
4916 as_warn (_("expression out of range: defaulting to 1"));
4921 if (offs (exp
) < 0 || offs (exp
) > 7)
4925 if (offs (exp
) < 0 || offs (exp
) > 15)
4929 if (offs (exp
) < 0 || offs (exp
) > 32)
4933 if (offs (exp
) < 0 || offs (exp
) > 127)
4937 if (offs (exp
) < -64 || offs (exp
) > 63)
4941 if (offs (exp
) < -128 || offs (exp
) > 127)
4945 if (offs (exp
) < 0 || offs (exp
) > 4095)
4948 as_warn (_("expression out of range: defaulting to 0"));
4956 else if (exp
->exp
.X_op
== O_big
)
4958 if (offs (exp
) <= 0 /* flonum */
4959 && (ok
== 80 /* no bignums */
4960 || (ok
> 10 /* small-int ranges including 0 ok */
4961 /* If we have a flonum zero, a zero integer should
4962 do as well (e.g., in moveq). */
4963 && generic_floating_point_number
.exponent
== 0
4964 && generic_floating_point_number
.low
[0] == 0)))
4966 /* HACK! Turn it into a long */
4967 LITTLENUM_TYPE words
[6];
4969 gen_to_words (words
, 2, 8L); /* These numbers are magic! */
4970 op (exp
) = O_constant
;
4973 offs (exp
) = words
[1] | (words
[0] << 16);
4977 op (exp
) = O_constant
;
4980 offs (exp
) = (ok
== 10) ? 1 : 0;
4981 as_warn (_("Can't deal with expression; defaulting to %ld"),
4987 if (ok
>= 10 && ok
<= 70)
4989 op (exp
) = O_constant
;
4992 offs (exp
) = (ok
== 10) ? 1 : 0;
4993 as_warn (_("Can't deal with expression; defaulting to %ld"),
4998 if (exp
->size
!= SIZE_UNSPEC
)
5006 if (!isbyte (offs (exp
)))
5007 as_warn (_("expression doesn't fit in BYTE"));
5010 if (!isword (offs (exp
)))
5011 as_warn (_("expression doesn't fit in WORD"));
5019 /* These are the back-ends for the various machine dependent pseudo-ops. */
5023 int ignore ATTRIBUTE_UNUSED
;
5025 subseg_set (data_section
, 1);
5026 demand_empty_rest_of_line ();
5031 int ignore ATTRIBUTE_UNUSED
;
5033 subseg_set (data_section
, 2);
5034 demand_empty_rest_of_line ();
5039 int ignore ATTRIBUTE_UNUSED
;
5041 /* We don't support putting frags in the BSS segment, we fake it
5042 by marking in_bss, then looking at s_skip for clues. */
5044 subseg_set (bss_section
, 0);
5045 demand_empty_rest_of_line ();
5050 int ignore ATTRIBUTE_UNUSED
;
5053 register long temp_fill
;
5055 temp
= 1; /* JF should be 2? */
5056 temp_fill
= get_absolute_expression ();
5057 if (!need_pass_2
) /* Never make frag if expect extra pass. */
5058 frag_align (temp
, (int) temp_fill
, 0);
5059 demand_empty_rest_of_line ();
5060 record_alignment (now_seg
, temp
);
5065 int ignore ATTRIBUTE_UNUSED
;
5067 demand_empty_rest_of_line ();
5070 /* Pseudo-ops handled for MRI compatibility. */
5072 /* This function returns non-zero if the argument is a conditional
5073 pseudo-op. This is called when checking whether a pending
5074 alignment is needed. */
5077 m68k_conditional_pseudoop (pop
)
5080 return (pop
->poc_handler
== s_mri_if
5081 || pop
->poc_handler
== s_mri_else
);
5084 /* Handle an MRI style chip specification. */
5093 s
= input_line_pointer
;
5094 /* We can't use get_symbol_end since the processor names are not proper
5096 while (is_part_of_name (c
= *input_line_pointer
++))
5098 *--input_line_pointer
= 0;
5099 for (i
= 0; i
< n_archs
; i
++)
5100 if (strcasecmp (s
, archs
[i
].name
) == 0)
5104 as_bad (_("%s: unrecognized processor name"), s
);
5105 *input_line_pointer
= c
;
5106 ignore_rest_of_line ();
5109 *input_line_pointer
= c
;
5111 if (*input_line_pointer
== '/')
5112 current_architecture
= 0;
5114 current_architecture
&= m68881
| m68851
;
5115 current_architecture
|= archs
[i
].arch
;
5117 while (*input_line_pointer
== '/')
5119 ++input_line_pointer
;
5120 s
= input_line_pointer
;
5121 /* We can't use get_symbol_end since the processor names are not
5123 while (is_part_of_name (c
= *input_line_pointer
++))
5125 *--input_line_pointer
= 0;
5126 if (strcmp (s
, "68881") == 0)
5127 current_architecture
|= m68881
;
5128 else if (strcmp (s
, "68851") == 0)
5129 current_architecture
|= m68851
;
5130 *input_line_pointer
= c
;
5133 /* Update info about available control registers. */
5134 select_control_regs ();
5137 /* The MRI CHIP pseudo-op. */
5141 int ignore ATTRIBUTE_UNUSED
;
5147 stop
= mri_comment_field (&stopc
);
5150 mri_comment_end (stop
, stopc
);
5151 demand_empty_rest_of_line ();
5154 /* The MRI FOPT pseudo-op. */
5158 int ignore ATTRIBUTE_UNUSED
;
5162 if (strncasecmp (input_line_pointer
, "ID=", 3) == 0)
5166 input_line_pointer
+= 3;
5167 temp
= get_absolute_expression ();
5168 if (temp
< 0 || temp
> 7)
5169 as_bad (_("bad coprocessor id"));
5171 m68k_float_copnum
= COP0
+ temp
;
5175 as_bad (_("unrecognized fopt option"));
5176 ignore_rest_of_line ();
5180 demand_empty_rest_of_line ();
5183 /* The structure used to handle the MRI OPT pseudo-op. */
5187 /* The name of the option. */
5190 /* If this is not NULL, just call this function. The first argument
5191 is the ARG field of this structure, the second argument is
5192 whether the option was negated. */
5193 void (*pfn
) PARAMS ((int arg
, int on
));
5195 /* If this is not NULL, and the PFN field is NULL, set the variable
5196 this points to. Set it to the ARG field if the option was not
5197 negated, and the NOTARG field otherwise. */
5200 /* The value to pass to PFN or to assign to *PVAR. */
5203 /* The value to assign to *PVAR if the option is negated. If PFN is
5204 NULL, and PVAR is not NULL, and ARG and NOTARG are the same, then
5205 the option may not be negated. */
5209 /* The table used to handle the MRI OPT pseudo-op. */
5211 static void skip_to_comma
PARAMS ((int, int));
5212 static void opt_nest
PARAMS ((int, int));
5213 static void opt_chip
PARAMS ((int, int));
5214 static void opt_list
PARAMS ((int, int));
5215 static void opt_list_symbols
PARAMS ((int, int));
5217 static const struct opt_action opt_table
[] =
5219 { "abspcadd", 0, &m68k_abspcadd
, 1, 0 },
5221 /* We do relaxing, so there is little use for these options. */
5222 { "b", 0, 0, 0, 0 },
5223 { "brs", 0, 0, 0, 0 },
5224 { "brb", 0, 0, 0, 0 },
5225 { "brl", 0, 0, 0, 0 },
5226 { "brw", 0, 0, 0, 0 },
5228 { "c", 0, 0, 0, 0 },
5229 { "cex", 0, 0, 0, 0 },
5230 { "case", 0, &symbols_case_sensitive
, 1, 0 },
5231 { "cl", 0, 0, 0, 0 },
5232 { "cre", 0, 0, 0, 0 },
5233 { "d", 0, &flag_keep_locals
, 1, 0 },
5234 { "e", 0, 0, 0, 0 },
5235 { "f", 0, &flag_short_refs
, 1, 0 },
5236 { "frs", 0, &flag_short_refs
, 1, 0 },
5237 { "frl", 0, &flag_short_refs
, 0, 1 },
5238 { "g", 0, 0, 0, 0 },
5239 { "i", 0, 0, 0, 0 },
5240 { "m", 0, 0, 0, 0 },
5241 { "mex", 0, 0, 0, 0 },
5242 { "mc", 0, 0, 0, 0 },
5243 { "md", 0, 0, 0, 0 },
5244 { "nest", opt_nest
, 0, 0, 0 },
5245 { "next", skip_to_comma
, 0, 0, 0 },
5246 { "o", 0, 0, 0, 0 },
5247 { "old", 0, 0, 0, 0 },
5248 { "op", skip_to_comma
, 0, 0, 0 },
5249 { "pco", 0, 0, 0, 0 },
5250 { "p", opt_chip
, 0, 0, 0 },
5251 { "pcr", 0, 0, 0, 0 },
5252 { "pcs", 0, 0, 0, 0 },
5253 { "r", 0, 0, 0, 0 },
5254 { "quick", 0, &m68k_quick
, 1, 0 },
5255 { "rel32", 0, &m68k_rel32
, 1, 0 },
5256 { "s", opt_list
, 0, 0, 0 },
5257 { "t", opt_list_symbols
, 0, 0, 0 },
5258 { "w", 0, &flag_no_warnings
, 0, 1 },
5262 #define OPTCOUNT ((int) (sizeof opt_table / sizeof opt_table[0]))
5264 /* The MRI OPT pseudo-op. */
5268 int ignore ATTRIBUTE_UNUSED
;
5276 const struct opt_action
*o
;
5281 if (*input_line_pointer
== '-')
5283 ++input_line_pointer
;
5286 else if (strncasecmp (input_line_pointer
, "NO", 2) == 0)
5288 input_line_pointer
+= 2;
5292 s
= input_line_pointer
;
5293 c
= get_symbol_end ();
5295 for (i
= 0, o
= opt_table
; i
< OPTCOUNT
; i
++, o
++)
5297 if (strcasecmp (s
, o
->name
) == 0)
5301 /* Restore input_line_pointer now in case the option
5303 *input_line_pointer
= c
;
5304 (*o
->pfn
) (o
->arg
, t
);
5306 else if (o
->pvar
!= NULL
)
5308 if (! t
&& o
->arg
== o
->notarg
)
5309 as_bad (_("option `%s' may not be negated"), s
);
5310 *input_line_pointer
= c
;
5311 *o
->pvar
= t
? o
->arg
: o
->notarg
;
5314 *input_line_pointer
= c
;
5320 as_bad (_("option `%s' not recognized"), s
);
5321 *input_line_pointer
= c
;
5324 while (*input_line_pointer
++ == ',');
5326 /* Move back to terminating character. */
5327 --input_line_pointer
;
5328 demand_empty_rest_of_line ();
5331 /* Skip ahead to a comma. This is used for OPT options which we do
5332 not suppor tand which take arguments. */
5335 skip_to_comma (arg
, on
)
5336 int arg ATTRIBUTE_UNUSED
;
5337 int on ATTRIBUTE_UNUSED
;
5339 while (*input_line_pointer
!= ','
5340 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
5341 ++input_line_pointer
;
5344 /* Handle the OPT NEST=depth option. */
5348 int arg ATTRIBUTE_UNUSED
;
5349 int on ATTRIBUTE_UNUSED
;
5351 if (*input_line_pointer
!= '=')
5353 as_bad (_("bad format of OPT NEST=depth"));
5357 ++input_line_pointer
;
5358 max_macro_nest
= get_absolute_expression ();
5361 /* Handle the OPT P=chip option. */
5365 int arg ATTRIBUTE_UNUSED
;
5366 int on ATTRIBUTE_UNUSED
;
5368 if (*input_line_pointer
!= '=')
5370 /* This is just OPT P, which we do not support. */
5374 ++input_line_pointer
;
5378 /* Handle the OPT S option. */
5382 int arg ATTRIBUTE_UNUSED
;
5388 /* Handle the OPT T option. */
5391 opt_list_symbols (arg
, on
)
5392 int arg ATTRIBUTE_UNUSED
;
5396 listing
|= LISTING_SYMBOLS
;
5398 listing
&=~ LISTING_SYMBOLS
;
5401 /* Handle the MRI REG pseudo-op. */
5405 int ignore ATTRIBUTE_UNUSED
;
5414 if (line_label
== NULL
)
5416 as_bad (_("missing label"));
5417 ignore_rest_of_line ();
5422 stop
= mri_comment_field (&stopc
);
5426 s
= input_line_pointer
;
5427 while (isalnum ((unsigned char) *input_line_pointer
)
5428 #ifdef REGISTER_PREFIX
5429 || *input_line_pointer
== REGISTER_PREFIX
5431 || *input_line_pointer
== '/'
5432 || *input_line_pointer
== '-')
5433 ++input_line_pointer
;
5434 c
= *input_line_pointer
;
5435 *input_line_pointer
= '\0';
5437 if (m68k_ip_op (s
, &rop
) != 0)
5439 if (rop
.error
== NULL
)
5440 as_bad (_("bad register list"));
5442 as_bad (_("bad register list: %s"), rop
.error
);
5443 *input_line_pointer
= c
;
5444 ignore_rest_of_line ();
5448 *input_line_pointer
= c
;
5450 if (rop
.mode
== REGLST
)
5452 else if (rop
.mode
== DREG
)
5453 mask
= 1 << (rop
.reg
- DATA0
);
5454 else if (rop
.mode
== AREG
)
5455 mask
= 1 << (rop
.reg
- ADDR0
+ 8);
5456 else if (rop
.mode
== FPREG
)
5457 mask
= 1 << (rop
.reg
- FP0
+ 16);
5458 else if (rop
.mode
== CONTROL
5461 else if (rop
.mode
== CONTROL
5464 else if (rop
.mode
== CONTROL
5469 as_bad (_("bad register list"));
5470 ignore_rest_of_line ();
5474 S_SET_SEGMENT (line_label
, reg_section
);
5475 S_SET_VALUE (line_label
, ~mask
);
5476 symbol_set_frag (line_label
, &zero_address_frag
);
5479 mri_comment_end (stop
, stopc
);
5481 demand_empty_rest_of_line ();
5484 /* This structure is used for the MRI SAVE and RESTORE pseudo-ops. */
5488 struct save_opts
*next
;
5490 int symbols_case_sensitive
;
5498 /* FIXME: We don't save OPT S. */
5501 /* This variable holds the stack of saved options. */
5503 static struct save_opts
*save_stack
;
5505 /* The MRI SAVE pseudo-op. */
5509 int ignore ATTRIBUTE_UNUSED
;
5511 struct save_opts
*s
;
5513 s
= (struct save_opts
*) xmalloc (sizeof (struct save_opts
));
5514 s
->abspcadd
= m68k_abspcadd
;
5515 s
->symbols_case_sensitive
= symbols_case_sensitive
;
5516 s
->keep_locals
= flag_keep_locals
;
5517 s
->short_refs
= flag_short_refs
;
5518 s
->architecture
= current_architecture
;
5519 s
->quick
= m68k_quick
;
5520 s
->rel32
= m68k_rel32
;
5521 s
->listing
= listing
;
5522 s
->no_warnings
= flag_no_warnings
;
5524 s
->next
= save_stack
;
5527 demand_empty_rest_of_line ();
5530 /* The MRI RESTORE pseudo-op. */
5534 int ignore ATTRIBUTE_UNUSED
;
5536 struct save_opts
*s
;
5538 if (save_stack
== NULL
)
5540 as_bad (_("restore without save"));
5541 ignore_rest_of_line ();
5546 save_stack
= s
->next
;
5548 m68k_abspcadd
= s
->abspcadd
;
5549 symbols_case_sensitive
= s
->symbols_case_sensitive
;
5550 flag_keep_locals
= s
->keep_locals
;
5551 flag_short_refs
= s
->short_refs
;
5552 current_architecture
= s
->architecture
;
5553 m68k_quick
= s
->quick
;
5554 m68k_rel32
= s
->rel32
;
5555 listing
= s
->listing
;
5556 flag_no_warnings
= s
->no_warnings
;
5560 demand_empty_rest_of_line ();
5563 /* Types of MRI structured control directives. */
5565 enum mri_control_type
5573 /* This structure is used to stack the MRI structured control
5576 struct mri_control_info
5578 /* The directive within which this one is enclosed. */
5579 struct mri_control_info
*outer
;
5581 /* The type of directive. */
5582 enum mri_control_type type
;
5584 /* Whether an ELSE has been in an IF. */
5587 /* The add or sub statement at the end of a FOR. */
5590 /* The label of the top of a FOR or REPEAT loop. */
5593 /* The label to jump to for the next iteration, or the else
5594 expression of a conditional. */
5597 /* The label to jump to to break out of the loop, or the label past
5598 the end of a conditional. */
5602 /* The stack of MRI structured control directives. */
5604 static struct mri_control_info
*mri_control_stack
;
5606 /* The current MRI structured control directive index number, used to
5607 generate label names. */
5609 static int mri_control_index
;
5611 /* Some function prototypes. */
5613 static void mri_assemble
PARAMS ((char *));
5614 static char *mri_control_label
PARAMS ((void));
5615 static struct mri_control_info
*push_mri_control
5616 PARAMS ((enum mri_control_type
));
5617 static void pop_mri_control
PARAMS ((void));
5618 static int parse_mri_condition
PARAMS ((int *));
5619 static int parse_mri_control_operand
5620 PARAMS ((int *, char **, char **, char **, char **));
5621 static int swap_mri_condition
PARAMS ((int));
5622 static int reverse_mri_condition
PARAMS ((int));
5623 static void build_mri_control_operand
5624 PARAMS ((int, int, char *, char *, char *, char *, const char *,
5625 const char *, int));
5626 static void parse_mri_control_expression
5627 PARAMS ((char *, int, const char *, const char *, int));
5629 /* Assemble an instruction for an MRI structured control directive. */
5637 /* md_assemble expects the opcode to be in lower case. */
5638 for (s
= str
; *s
!= ' ' && *s
!= '\0'; s
++)
5640 if (isupper ((unsigned char) *s
))
5641 *s
= tolower ((unsigned char) *s
);
5647 /* Generate a new MRI label structured control directive label name. */
5650 mri_control_label ()
5654 n
= (char *) xmalloc (20);
5655 sprintf (n
, "%smc%d", FAKE_LABEL_NAME
, mri_control_index
);
5656 ++mri_control_index
;
5660 /* Create a new MRI structured control directive. */
5662 static struct mri_control_info
*
5663 push_mri_control (type
)
5664 enum mri_control_type type
;
5666 struct mri_control_info
*n
;
5668 n
= (struct mri_control_info
*) xmalloc (sizeof (struct mri_control_info
));
5672 if (type
== mri_if
|| type
== mri_while
)
5675 n
->top
= mri_control_label ();
5676 n
->next
= mri_control_label ();
5677 n
->bottom
= mri_control_label ();
5679 n
->outer
= mri_control_stack
;
5680 mri_control_stack
= n
;
5685 /* Pop off the stack of MRI structured control directives. */
5690 struct mri_control_info
*n
;
5692 n
= mri_control_stack
;
5693 mri_control_stack
= n
->outer
;
5701 /* Recognize a condition code in an MRI structured control expression. */
5704 parse_mri_condition (pcc
)
5709 know (*input_line_pointer
== '<');
5711 ++input_line_pointer
;
5712 c1
= *input_line_pointer
++;
5713 c2
= *input_line_pointer
++;
5715 if (*input_line_pointer
!= '>')
5717 as_bad (_("syntax error in structured control directive"));
5721 ++input_line_pointer
;
5729 *pcc
= (c1
<< 8) | c2
;
5734 /* Parse a single operand in an MRI structured control expression. */
5737 parse_mri_control_operand (pcc
, leftstart
, leftstop
, rightstart
, rightstop
)
5754 if (*input_line_pointer
== '<')
5756 /* It's just a condition code. */
5757 return parse_mri_condition (pcc
);
5760 /* Look ahead for the condition code. */
5761 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
5763 if (*s
== '<' && s
[1] != '\0' && s
[2] != '\0' && s
[3] == '>')
5768 as_bad (_("missing condition code in structured control directive"));
5772 *leftstart
= input_line_pointer
;
5774 if (*leftstop
> *leftstart
5775 && ((*leftstop
)[-1] == ' ' || (*leftstop
)[-1] == '\t'))
5778 input_line_pointer
= s
;
5779 if (! parse_mri_condition (pcc
))
5782 /* Look ahead for AND or OR or end of line. */
5783 for (s
= input_line_pointer
; *s
!= '\0'; ++s
)
5785 if ((strncasecmp (s
, "AND", 3) == 0
5786 && (s
[3] == '.' || ! is_part_of_name (s
[3])))
5787 || (strncasecmp (s
, "OR", 2) == 0
5788 && (s
[2] == '.' || ! is_part_of_name (s
[2]))))
5792 *rightstart
= input_line_pointer
;
5794 if (*rightstop
> *rightstart
5795 && ((*rightstop
)[-1] == ' ' || (*rightstop
)[-1] == '\t'))
5798 input_line_pointer
= s
;
5803 #define MCC(b1, b2) (((b1) << 8) | (b2))
5805 /* Swap the sense of a condition. This changes the condition so that
5806 it generates the same result when the operands are swapped. */
5809 swap_mri_condition (cc
)
5814 case MCC ('h', 'i'): return MCC ('c', 's');
5815 case MCC ('l', 's'): return MCC ('c', 'c');
5816 case MCC ('c', 'c'): return MCC ('l', 's');
5817 case MCC ('c', 's'): return MCC ('h', 'i');
5818 case MCC ('p', 'l'): return MCC ('m', 'i');
5819 case MCC ('m', 'i'): return MCC ('p', 'l');
5820 case MCC ('g', 'e'): return MCC ('l', 'e');
5821 case MCC ('l', 't'): return MCC ('g', 't');
5822 case MCC ('g', 't'): return MCC ('l', 't');
5823 case MCC ('l', 'e'): return MCC ('g', 'e');
5828 /* Reverse the sense of a condition. */
5831 reverse_mri_condition (cc
)
5836 case MCC ('h', 'i'): return MCC ('l', 's');
5837 case MCC ('l', 's'): return MCC ('h', 'i');
5838 case MCC ('c', 'c'): return MCC ('c', 's');
5839 case MCC ('c', 's'): return MCC ('c', 'c');
5840 case MCC ('n', 'e'): return MCC ('e', 'q');
5841 case MCC ('e', 'q'): return MCC ('n', 'e');
5842 case MCC ('v', 'c'): return MCC ('v', 's');
5843 case MCC ('v', 's'): return MCC ('v', 'c');
5844 case MCC ('p', 'l'): return MCC ('m', 'i');
5845 case MCC ('m', 'i'): return MCC ('p', 'l');
5846 case MCC ('g', 'e'): return MCC ('l', 't');
5847 case MCC ('l', 't'): return MCC ('g', 'e');
5848 case MCC ('g', 't'): return MCC ('l', 'e');
5849 case MCC ('l', 'e'): return MCC ('g', 't');
5854 /* Build an MRI structured control expression. This generates test
5855 and branch instructions. It goes to TRUELAB if the condition is
5856 true, and to FALSELAB if the condition is false. Exactly one of
5857 TRUELAB and FALSELAB will be NULL, meaning to fall through. QUAL
5858 is the size qualifier for the expression. EXTENT is the size to
5859 use for the branch. */
5862 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5863 rightstop
, truelab
, falselab
, extent
)
5870 const char *truelab
;
5871 const char *falselab
;
5877 if (leftstart
!= NULL
)
5879 struct m68k_op leftop
, rightop
;
5882 /* Swap the compare operands, if necessary, to produce a legal
5883 m68k compare instruction. Comparing a register operand with
5884 a non-register operand requires the register to be on the
5885 right (cmp, cmpa). Comparing an immediate value with
5886 anything requires the immediate value to be on the left
5891 (void) m68k_ip_op (leftstart
, &leftop
);
5896 (void) m68k_ip_op (rightstart
, &rightop
);
5899 if (rightop
.mode
== IMMED
5900 || ((leftop
.mode
== DREG
|| leftop
.mode
== AREG
)
5901 && (rightop
.mode
!= DREG
&& rightop
.mode
!= AREG
)))
5905 cc
= swap_mri_condition (cc
);
5907 leftstart
= rightstart
;
5910 leftstop
= rightstop
;
5915 if (truelab
== NULL
)
5917 cc
= reverse_mri_condition (cc
);
5921 if (leftstart
!= NULL
)
5923 buf
= (char *) xmalloc (20
5924 + (leftstop
- leftstart
)
5925 + (rightstop
- rightstart
));
5933 memcpy (s
, leftstart
, leftstop
- leftstart
);
5934 s
+= leftstop
- leftstart
;
5936 memcpy (s
, rightstart
, rightstop
- rightstart
);
5937 s
+= rightstop
- rightstart
;
5943 buf
= (char *) xmalloc (20 + strlen (truelab
));
5951 strcpy (s
, truelab
);
5956 /* Parse an MRI structured control expression. This generates test
5957 and branch instructions. STOP is where the expression ends. It
5958 goes to TRUELAB if the condition is true, and to FALSELAB if the
5959 condition is false. Exactly one of TRUELAB and FALSELAB will be
5960 NULL, meaning to fall through. QUAL is the size qualifier for the
5961 expression. EXTENT is the size to use for the branch. */
5964 parse_mri_control_expression (stop
, qual
, truelab
, falselab
, extent
)
5967 const char *truelab
;
5968 const char *falselab
;
5981 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
5982 &rightstart
, &rightstop
))
5988 if (strncasecmp (input_line_pointer
, "AND", 3) == 0)
5992 if (falselab
!= NULL
)
5995 flab
= mri_control_label ();
5997 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
5998 rightstop
, (const char *) NULL
, flab
, extent
);
6000 input_line_pointer
+= 3;
6001 if (*input_line_pointer
!= '.'
6002 || input_line_pointer
[1] == '\0')
6006 qual
= input_line_pointer
[1];
6007 input_line_pointer
+= 2;
6010 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
6011 &rightstart
, &rightstop
))
6017 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
6018 rightstop
, truelab
, falselab
, extent
);
6020 if (falselab
== NULL
)
6023 else if (strncasecmp (input_line_pointer
, "OR", 2) == 0)
6027 if (truelab
!= NULL
)
6030 tlab
= mri_control_label ();
6032 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
6033 rightstop
, tlab
, (const char *) NULL
, extent
);
6035 input_line_pointer
+= 2;
6036 if (*input_line_pointer
!= '.'
6037 || input_line_pointer
[1] == '\0')
6041 qual
= input_line_pointer
[1];
6042 input_line_pointer
+= 2;
6045 if (! parse_mri_control_operand (&cc
, &leftstart
, &leftstop
,
6046 &rightstart
, &rightstop
))
6052 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
6053 rightstop
, truelab
, falselab
, extent
);
6055 if (truelab
== NULL
)
6060 build_mri_control_operand (qual
, cc
, leftstart
, leftstop
, rightstart
,
6061 rightstop
, truelab
, falselab
, extent
);
6065 if (input_line_pointer
!= stop
)
6066 as_bad (_("syntax error in structured control directive"));
6069 /* Handle the MRI IF pseudo-op. This may be a structured control
6070 directive, or it may be a regular assembler conditional, depending
6079 struct mri_control_info
*n
;
6081 /* A structured control directive must end with THEN with an
6082 optional qualifier. */
6083 s
= input_line_pointer
;
6084 while (! is_end_of_line
[(unsigned char) *s
]
6085 && (! flag_mri
|| *s
!= '*'))
6088 while (s
> input_line_pointer
&& (*s
== ' ' || *s
== '\t'))
6091 if (s
- input_line_pointer
> 1
6095 if (s
- input_line_pointer
< 3
6096 || strncasecmp (s
- 3, "THEN", 4) != 0)
6100 as_bad (_("missing then"));
6101 ignore_rest_of_line ();
6105 /* It's a conditional. */
6110 /* Since this might be a conditional if, this pseudo-op will be
6111 called even if we are supported to be ignoring input. Double
6112 check now. Clobber *input_line_pointer so that ignore_input
6113 thinks that this is not a special pseudo-op. */
6114 c
= *input_line_pointer
;
6115 *input_line_pointer
= 0;
6116 if (ignore_input ())
6118 *input_line_pointer
= c
;
6119 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6120 ++input_line_pointer
;
6121 demand_empty_rest_of_line ();
6124 *input_line_pointer
= c
;
6126 n
= push_mri_control (mri_if
);
6128 parse_mri_control_expression (s
- 3, qual
, (const char *) NULL
,
6129 n
->next
, s
[1] == '.' ? s
[2] : '\0');
6132 input_line_pointer
= s
+ 3;
6134 input_line_pointer
= s
+ 1;
6138 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6139 ++input_line_pointer
;
6142 demand_empty_rest_of_line ();
6145 /* Handle the MRI else pseudo-op. If we are currently doing an MRI
6146 structured IF, associate the ELSE with the IF. Otherwise, assume
6147 it is a conditional else. */
6158 && (mri_control_stack
== NULL
6159 || mri_control_stack
->type
!= mri_if
6160 || mri_control_stack
->else_seen
))
6166 c
= *input_line_pointer
;
6167 *input_line_pointer
= 0;
6168 if (ignore_input ())
6170 *input_line_pointer
= c
;
6171 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6172 ++input_line_pointer
;
6173 demand_empty_rest_of_line ();
6176 *input_line_pointer
= c
;
6178 if (mri_control_stack
== NULL
6179 || mri_control_stack
->type
!= mri_if
6180 || mri_control_stack
->else_seen
)
6182 as_bad (_("else without matching if"));
6183 ignore_rest_of_line ();
6187 mri_control_stack
->else_seen
= 1;
6189 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->bottom
));
6192 sprintf (buf
, "bra%s %s", q
, mri_control_stack
->bottom
);
6196 colon (mri_control_stack
->next
);
6200 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6201 ++input_line_pointer
;
6204 demand_empty_rest_of_line ();
6207 /* Handle the MRI ENDI pseudo-op. */
6211 int ignore ATTRIBUTE_UNUSED
;
6213 if (mri_control_stack
== NULL
6214 || mri_control_stack
->type
!= mri_if
)
6216 as_bad (_("endi without matching if"));
6217 ignore_rest_of_line ();
6221 /* ignore_input will not return true for ENDI, so we don't need to
6222 worry about checking it again here. */
6224 if (! mri_control_stack
->else_seen
)
6225 colon (mri_control_stack
->next
);
6226 colon (mri_control_stack
->bottom
);
6232 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6233 ++input_line_pointer
;
6236 demand_empty_rest_of_line ();
6239 /* Handle the MRI BREAK pseudo-op. */
6242 s_mri_break (extent
)
6245 struct mri_control_info
*n
;
6249 n
= mri_control_stack
;
6251 && n
->type
!= mri_for
6252 && n
->type
!= mri_repeat
6253 && n
->type
!= mri_while
)
6257 as_bad (_("break outside of structured loop"));
6258 ignore_rest_of_line ();
6262 buf
= (char *) xmalloc (20 + strlen (n
->bottom
));
6265 sprintf (buf
, "bra%s %s", ex
, n
->bottom
);
6271 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6272 ++input_line_pointer
;
6275 demand_empty_rest_of_line ();
6278 /* Handle the MRI NEXT pseudo-op. */
6284 struct mri_control_info
*n
;
6288 n
= mri_control_stack
;
6290 && n
->type
!= mri_for
6291 && n
->type
!= mri_repeat
6292 && n
->type
!= mri_while
)
6296 as_bad (_("next outside of structured loop"));
6297 ignore_rest_of_line ();
6301 buf
= (char *) xmalloc (20 + strlen (n
->next
));
6304 sprintf (buf
, "bra%s %s", ex
, n
->next
);
6310 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6311 ++input_line_pointer
;
6314 demand_empty_rest_of_line ();
6317 /* Handle the MRI FOR pseudo-op. */
6323 const char *varstart
, *varstop
;
6324 const char *initstart
, *initstop
;
6325 const char *endstart
, *endstop
;
6326 const char *bystart
, *bystop
;
6330 struct mri_control_info
*n
;
6336 FOR.q var = init { TO | DOWNTO } end [ BY by ] DO.e
6340 varstart
= input_line_pointer
;
6342 /* Look for the '='. */
6343 while (! is_end_of_line
[(unsigned char) *input_line_pointer
]
6344 && *input_line_pointer
!= '=')
6345 ++input_line_pointer
;
6346 if (*input_line_pointer
!= '=')
6348 as_bad (_("missing ="));
6349 ignore_rest_of_line ();
6353 varstop
= input_line_pointer
;
6354 if (varstop
> varstart
6355 && (varstop
[-1] == ' ' || varstop
[-1] == '\t'))
6358 ++input_line_pointer
;
6360 initstart
= input_line_pointer
;
6362 /* Look for TO or DOWNTO. */
6365 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6367 if (strncasecmp (input_line_pointer
, "TO", 2) == 0
6368 && ! is_part_of_name (input_line_pointer
[2]))
6370 initstop
= input_line_pointer
;
6371 input_line_pointer
+= 2;
6374 if (strncasecmp (input_line_pointer
, "DOWNTO", 6) == 0
6375 && ! is_part_of_name (input_line_pointer
[6]))
6377 initstop
= input_line_pointer
;
6379 input_line_pointer
+= 6;
6382 ++input_line_pointer
;
6384 if (initstop
== NULL
)
6386 as_bad (_("missing to or downto"));
6387 ignore_rest_of_line ();
6390 if (initstop
> initstart
6391 && (initstop
[-1] == ' ' || initstop
[-1] == '\t'))
6395 endstart
= input_line_pointer
;
6397 /* Look for BY or DO. */
6400 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6402 if (strncasecmp (input_line_pointer
, "BY", 2) == 0
6403 && ! is_part_of_name (input_line_pointer
[2]))
6405 endstop
= input_line_pointer
;
6407 input_line_pointer
+= 2;
6410 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
6411 && (input_line_pointer
[2] == '.'
6412 || ! is_part_of_name (input_line_pointer
[2])))
6414 endstop
= input_line_pointer
;
6415 input_line_pointer
+= 2;
6418 ++input_line_pointer
;
6420 if (endstop
== NULL
)
6422 as_bad (_("missing do"));
6423 ignore_rest_of_line ();
6426 if (endstop
> endstart
6427 && (endstop
[-1] == ' ' || endstop
[-1] == '\t'))
6433 bystop
= bystart
+ 2;
6438 bystart
= input_line_pointer
;
6442 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6444 if (strncasecmp (input_line_pointer
, "DO", 2) == 0
6445 && (input_line_pointer
[2] == '.'
6446 || ! is_part_of_name (input_line_pointer
[2])))
6448 bystop
= input_line_pointer
;
6449 input_line_pointer
+= 2;
6452 ++input_line_pointer
;
6456 as_bad (_("missing do"));
6457 ignore_rest_of_line ();
6460 if (bystop
> bystart
6461 && (bystop
[-1] == ' ' || bystop
[-1] == '\t'))
6465 if (*input_line_pointer
!= '.')
6469 extent
= input_line_pointer
[1];
6470 input_line_pointer
+= 2;
6473 /* We have fully parsed the FOR operands. Now build the loop. */
6475 n
= push_mri_control (mri_for
);
6477 buf
= (char *) xmalloc (50 + (input_line_pointer
- varstart
));
6488 memcpy (s
, initstart
, initstop
- initstart
);
6489 s
+= initstop
- initstart
;
6491 memcpy (s
, varstart
, varstop
- varstart
);
6492 s
+= varstop
- varstart
;
6506 memcpy (s
, endstart
, endstop
- endstart
);
6507 s
+= endstop
- endstart
;
6509 memcpy (s
, varstart
, varstop
- varstart
);
6510 s
+= varstop
- varstart
;
6518 sprintf (buf
, "blt%s %s", ex
, n
->bottom
);
6520 sprintf (buf
, "bgt%s %s", ex
, n
->bottom
);
6523 /* Put together the add or sub instruction used by ENDF. */
6533 memcpy (s
, bystart
, bystop
- bystart
);
6534 s
+= bystop
- bystart
;
6536 memcpy (s
, varstart
, varstop
- varstart
);
6537 s
+= varstop
- varstart
;
6543 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6544 ++input_line_pointer
;
6547 demand_empty_rest_of_line ();
6550 /* Handle the MRI ENDF pseudo-op. */
6554 int ignore ATTRIBUTE_UNUSED
;
6556 if (mri_control_stack
== NULL
6557 || mri_control_stack
->type
!= mri_for
)
6559 as_bad (_("endf without for"));
6560 ignore_rest_of_line ();
6564 colon (mri_control_stack
->next
);
6566 mri_assemble (mri_control_stack
->incr
);
6568 sprintf (mri_control_stack
->incr
, "bra %s", mri_control_stack
->top
);
6569 mri_assemble (mri_control_stack
->incr
);
6571 free (mri_control_stack
->incr
);
6573 colon (mri_control_stack
->bottom
);
6579 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6580 ++input_line_pointer
;
6583 demand_empty_rest_of_line ();
6586 /* Handle the MRI REPEAT pseudo-op. */
6589 s_mri_repeat (ignore
)
6590 int ignore ATTRIBUTE_UNUSED
;
6592 struct mri_control_info
*n
;
6594 n
= push_mri_control (mri_repeat
);
6598 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6599 ++input_line_pointer
;
6601 demand_empty_rest_of_line ();
6604 /* Handle the MRI UNTIL pseudo-op. */
6612 if (mri_control_stack
== NULL
6613 || mri_control_stack
->type
!= mri_repeat
)
6615 as_bad (_("until without repeat"));
6616 ignore_rest_of_line ();
6620 colon (mri_control_stack
->next
);
6622 for (s
= input_line_pointer
; ! is_end_of_line
[(unsigned char) *s
]; s
++)
6625 parse_mri_control_expression (s
, qual
, (const char *) NULL
,
6626 mri_control_stack
->top
, '\0');
6628 colon (mri_control_stack
->bottom
);
6630 input_line_pointer
= s
;
6636 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6637 ++input_line_pointer
;
6640 demand_empty_rest_of_line ();
6643 /* Handle the MRI WHILE pseudo-op. */
6651 struct mri_control_info
*n
;
6653 s
= input_line_pointer
;
6654 while (! is_end_of_line
[(unsigned char) *s
]
6655 && (! flag_mri
|| *s
!= '*'))
6658 while (*s
== ' ' || *s
== '\t')
6660 if (s
- input_line_pointer
> 1
6663 if (s
- input_line_pointer
< 2
6664 || strncasecmp (s
- 1, "DO", 2) != 0)
6666 as_bad (_("missing do"));
6667 ignore_rest_of_line ();
6671 n
= push_mri_control (mri_while
);
6675 parse_mri_control_expression (s
- 1, qual
, (const char *) NULL
, n
->bottom
,
6676 s
[1] == '.' ? s
[2] : '\0');
6678 input_line_pointer
= s
+ 1;
6679 if (*input_line_pointer
== '.')
6680 input_line_pointer
+= 2;
6684 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6685 ++input_line_pointer
;
6688 demand_empty_rest_of_line ();
6691 /* Handle the MRI ENDW pseudo-op. */
6695 int ignore ATTRIBUTE_UNUSED
;
6699 if (mri_control_stack
== NULL
6700 || mri_control_stack
->type
!= mri_while
)
6702 as_bad (_("endw without while"));
6703 ignore_rest_of_line ();
6707 buf
= (char *) xmalloc (20 + strlen (mri_control_stack
->next
));
6708 sprintf (buf
, "bra %s", mri_control_stack
->next
);
6712 colon (mri_control_stack
->bottom
);
6718 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
6719 ++input_line_pointer
;
6722 demand_empty_rest_of_line ();
6727 * Invocation line includes a switch not recognized by the base assembler.
6728 * See if it's a processor-specific option. These are:
6730 * -[A]m[c]68000, -[A]m[c]68008, -[A]m[c]68010, -[A]m[c]68020, -[A]m[c]68030, -[A]m[c]68040
6731 * -[A]m[c]68881, -[A]m[c]68882, -[A]m[c]68851
6732 * Select the architecture. Instructions or features not
6733 * supported by the selected architecture cause fatal
6734 * errors. More than one may be specified. The default is
6735 * -m68020 -m68851 -m68881. Note that -m68008 is a synonym
6736 * for -m68000, and -m68882 is a synonym for -m68881.
6737 * -[A]m[c]no-68851, -[A]m[c]no-68881
6738 * Don't accept 688?1 instructions. (The "c" is kind of silly,
6739 * so don't use or document it, but that's the way the parsing
6742 * -pic Indicates PIC.
6743 * -k Indicates PIC. (Sun 3 only.)
6744 * --pcrel Never turn PC-relative branches into absolute jumps.
6747 * Permit `|' to be used in expressions.
6752 CONST
char *md_shortopts
= "lSA:m:kQ:V";
6754 CONST
char *md_shortopts
= "lSA:m:k";
6757 struct option md_longopts
[] = {
6758 #define OPTION_PIC (OPTION_MD_BASE)
6759 {"pic", no_argument
, NULL
, OPTION_PIC
},
6760 #define OPTION_REGISTER_PREFIX_OPTIONAL (OPTION_MD_BASE + 1)
6761 {"register-prefix-optional", no_argument
, NULL
,
6762 OPTION_REGISTER_PREFIX_OPTIONAL
},
6763 #define OPTION_BITWISE_OR (OPTION_MD_BASE + 2)
6764 {"bitwise-or", no_argument
, NULL
, OPTION_BITWISE_OR
},
6765 #define OPTION_BASE_SIZE_DEFAULT_16 (OPTION_MD_BASE + 3)
6766 {"base-size-default-16", no_argument
, NULL
, OPTION_BASE_SIZE_DEFAULT_16
},
6767 #define OPTION_BASE_SIZE_DEFAULT_32 (OPTION_MD_BASE + 4)
6768 {"base-size-default-32", no_argument
, NULL
, OPTION_BASE_SIZE_DEFAULT_32
},
6769 #define OPTION_DISP_SIZE_DEFAULT_16 (OPTION_MD_BASE + 5)
6770 {"disp-size-default-16", no_argument
, NULL
, OPTION_DISP_SIZE_DEFAULT_16
},
6771 #define OPTION_DISP_SIZE_DEFAULT_32 (OPTION_MD_BASE + 6)
6772 {"disp-size-default-32", no_argument
, NULL
, OPTION_DISP_SIZE_DEFAULT_32
},
6773 #define OPTION_PCREL (OPTION_MD_BASE + 7)
6774 {"pcrel", no_argument
, NULL
, OPTION_PCREL
},
6775 {NULL
, no_argument
, NULL
, 0}
6777 size_t md_longopts_size
= sizeof (md_longopts
);
6780 md_parse_option (c
, arg
)
6786 case 'l': /* -l means keep external to 2 bit offset
6787 rather than 16 bit one */
6788 flag_short_refs
= 1;
6791 case 'S': /* -S means that jbsr's always turn into
6793 flag_long_jumps
= 1;
6796 case OPTION_PCREL
: /* --pcrel means never turn PC-relative
6797 branches into absolute jumps. */
6798 flag_keep_pcrel
= 1;
6804 /* intentional fall-through */
6807 if (arg
[0] == 'n' && arg
[1] == 'o' && arg
[2] == '-')
6811 const char *oarg
= arg
;
6817 if (arg
[0] == 'c' && arg
[1] == '6')
6820 for (i
= 0; i
< n_archs
; i
++)
6821 if (!strcmp (arg
, archs
[i
].name
))
6826 as_bad (_("unrecognized option `%s'"), oarg
);
6829 arch
= archs
[i
].arch
;
6832 else if (arch
== m68851
)
6841 if (arg
[0] == 'c' && arg
[1] == '6')
6844 for (i
= 0; i
< n_archs
; i
++)
6845 if (!strcmp (arg
, archs
[i
].name
))
6847 unsigned long arch
= archs
[i
].arch
;
6848 if (cpu_of_arch (arch
))
6849 /* It's a cpu spec. */
6851 current_architecture
&= ~m68000up
;
6852 current_architecture
|= arch
;
6854 else if (arch
== m68881
)
6856 current_architecture
|= m68881
;
6859 else if (arch
== m68851
)
6861 current_architecture
|= m68851
;
6871 as_bad (_("unrecognized architecture specification `%s'"), arg
);
6880 break; /* -pic, Position Independent Code */
6882 case OPTION_REGISTER_PREFIX_OPTIONAL
:
6883 flag_reg_prefix_optional
= 1;
6884 reg_prefix_optional_seen
= 1;
6887 /* -V: SVR4 argument to print version ID. */
6889 print_version_id ();
6892 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
6893 should be emitted or not. FIXME: Not implemented. */
6897 case OPTION_BITWISE_OR
:
6902 n
= (char *) xmalloc (strlen (m68k_comment_chars
) + 1);
6904 for (s
= m68k_comment_chars
; *s
!= '\0'; s
++)
6908 m68k_comment_chars
= n
;
6912 case OPTION_BASE_SIZE_DEFAULT_16
:
6913 m68k_index_width_default
= SIZE_WORD
;
6916 case OPTION_BASE_SIZE_DEFAULT_32
:
6917 m68k_index_width_default
= SIZE_LONG
;
6920 case OPTION_DISP_SIZE_DEFAULT_16
:
6922 m68k_rel32_from_cmdline
= 1;
6925 case OPTION_DISP_SIZE_DEFAULT_32
:
6927 m68k_rel32_from_cmdline
= 1;
6938 md_show_usage (stream
)
6941 fprintf (stream
, _("\
6943 -l use 1 word for refs to undefined symbols [default 2]\n\
6944 -m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060\n\
6945 | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360\n\
6946 | -mcpu32 | -m5200\n\
6947 specify variant of 680X0 architecture [default 68020]\n\
6948 -m68881 | -m68882 | -mno-68881 | -mno-68882\n\
6949 target has/lacks floating-point coprocessor\n\
6950 [default yes for 68020, 68030, and cpu32]\n"));
6951 fprintf (stream
, _("\
6952 -m68851 | -mno-68851\n\
6953 target has/lacks memory-management unit coprocessor\n\
6954 [default yes for 68020 and up]\n\
6955 -pic, -k generate position independent code\n\
6956 -S turn jbsr into jsr\n\
6957 --pcrel never turn PC-relative branches into absolute jumps\n\
6958 --register-prefix-optional\n\
6959 recognize register names without prefix character\n\
6960 --bitwise-or do not treat `|' as a comment character\n"));
6961 fprintf (stream
, _("\
6962 --base-size-default-16 base reg without size is 16 bits\n\
6963 --base-size-default-32 base reg without size is 32 bits (default)\n\
6964 --disp-size-default-16 displacement with unknown size is 16 bits\n\
6965 --disp-size-default-32 displacement with unknown size is 32 bits (default)\n"));
6970 /* TEST2: Test md_assemble() */
6971 /* Warning, this routine probably doesn't work anymore */
6975 struct m68k_it the_ins
;
6983 if (!gets (buf
) || !*buf
)
6985 if (buf
[0] == '|' || buf
[1] == '.')
6987 for (cp
= buf
; *cp
; cp
++)
6992 memset (&the_ins
, '\0', sizeof (the_ins
));
6993 m68k_ip (&the_ins
, buf
);
6996 printf (_("Error %s in %s\n"), the_ins
.error
, buf
);
7000 printf (_("Opcode(%d.%s): "), the_ins
.numo
, the_ins
.args
);
7001 for (n
= 0; n
< the_ins
.numo
; n
++)
7002 printf (" 0x%x", the_ins
.opcode
[n
] & 0xffff);
7004 print_the_insn (&the_ins
.opcode
[0], stdout
);
7005 (void) putchar ('\n');
7007 for (n
= 0; n
< strlen (the_ins
.args
) / 2; n
++)
7009 if (the_ins
.operands
[n
].error
)
7011 printf ("op%d Error %s in %s\n", n
, the_ins
.operands
[n
].error
, buf
);
7014 printf ("mode %d, reg %d, ", the_ins
.operands
[n
].mode
, the_ins
.operands
[n
].reg
);
7015 if (the_ins
.operands
[n
].b_const
)
7016 printf ("Constant: '%.*s', ", 1 + the_ins
.operands
[n
].e_const
- the_ins
.operands
[n
].b_const
, the_ins
.operands
[n
].b_const
);
7017 printf ("ireg %d, isiz %d, imul %d, ", the_ins
.operands
[n
].ireg
, the_ins
.operands
[n
].isiz
, the_ins
.operands
[n
].imul
);
7018 if (the_ins
.operands
[n
].b_iadd
)
7019 printf ("Iadd: '%.*s',", 1 + the_ins
.operands
[n
].e_iadd
- the_ins
.operands
[n
].b_iadd
, the_ins
.operands
[n
].b_iadd
);
7020 (void) putchar ('\n');
7032 while (*str
&& *str
!= ' ')
7034 if (str
[-1] == ':' || str
[1] == '=')
7041 /* Possible states for relaxation:
7043 0 0 branch offset byte (bra, etc)
7047 1 0 indexed offsets byte a0@(32,d4:w:1) etc
7051 2 0 two-offset index word-word a0@(32,d4)@(45) etc
7058 /* We have no need to default values of symbols. */
7061 md_undefined_symbol (name
)
7062 char *name ATTRIBUTE_UNUSED
;
7067 /* Round up a section size to the appropriate boundary. */
7069 md_section_align (segment
, size
)
7070 segT segment ATTRIBUTE_UNUSED
;
7074 #ifdef BFD_ASSEMBLER
7075 /* For a.out, force the section size to be aligned. If we don't do
7076 this, BFD will align it for us, but it will not write out the
7077 final bytes of the section. This may be a bug in BFD, but it is
7078 easier to fix it here since that is how the other a.out targets
7082 align
= bfd_get_section_alignment (stdoutput
, segment
);
7083 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
7090 /* Exactly what point is a PC-relative offset relative TO?
7091 On the 68k, it is relative to the address of the first extension
7092 word. The difference between the addresses of the offset and the
7093 first extension word is stored in fx_pcrel_adjust. */
7095 md_pcrel_from (fixP
)
7100 /* Because fx_pcrel_adjust is a char, and may be unsigned, we store
7102 adjust
= fixP
->fx_pcrel_adjust
;
7105 return fixP
->fx_where
+ fixP
->fx_frag
->fr_address
- adjust
;
7108 #ifndef BFD_ASSEMBLER
7112 tc_coff_symbol_emit_hook (ignore
)
7113 symbolS
*ignore ATTRIBUTE_UNUSED
;
7118 tc_coff_sizemachdep (frag
)
7121 switch (frag
->fr_subtype
& 0x3)
7138 void m68k_elf_final_processing()
7140 /* Set file-specific flags if this is a cpu32 processor */
7141 if (cpu_of_arch (current_architecture
) & cpu32
)
7142 elf_elfheader (stdoutput
)->e_flags
|= EF_CPU32
;