1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "safe-ctype.h"
26 #include "opcode/mn10300.h"
27 #include "dwarf2dbg.h"
29 /* Structure to hold information about predefined registers. */
36 /* Generic assembler global variables which must be defined by all
39 /* Characters which always start a comment. */
40 const char comment_chars
[] = "#";
42 /* Characters which start a comment at the beginning of a line. */
43 const char line_comment_chars
[] = ";#";
45 /* Characters which may be used to separate multiple commands on a
47 const char line_separator_chars
[] = ";";
49 /* Characters which are used to indicate an exponent in a floating
51 const char EXP_CHARS
[] = "eE";
53 /* Characters which mean that a number is a floating point constant,
55 const char FLT_CHARS
[] = "dD";
57 const relax_typeS md_relax_table
[] = {
60 {0x7fff, -0x8000, 5, 2},
61 {0x7fffffff, -0x80000000, 7, 0},
63 /* bCC relaxing (uncommon cases) */
65 {0x7fff, -0x8000, 6, 5},
66 {0x7fffffff, -0x80000000, 8, 0},
69 {0x7fff, -0x8000, 5, 7},
70 {0x7fffffff, -0x80000000, 7, 0},
73 {0x7fff, -0x8000, 4, 9},
74 {0x7fffffff, -0x80000000, 6, 0},
78 {0x7fff, -0x8000, 3, 12},
79 {0x7fffffff, -0x80000000, 5, 0},
83 /* Local functions. */
84 static void mn10300_insert_operand
PARAMS ((unsigned long *, unsigned long *,
85 const struct mn10300_operand
*,
86 offsetT
, char *, unsigned,
88 static unsigned long check_operand
PARAMS ((unsigned long,
89 const struct mn10300_operand
*,
91 static int reg_name_search
PARAMS ((const struct reg_name
*, int, const char *));
92 static bfd_boolean data_register_name
PARAMS ((expressionS
*expressionP
));
93 static bfd_boolean address_register_name
PARAMS ((expressionS
*expressionP
));
94 static bfd_boolean other_register_name
PARAMS ((expressionS
*expressionP
));
95 static bfd_boolean r_register_name
PARAMS ((expressionS
*expressionP
));
96 static bfd_boolean xr_register_name
PARAMS ((expressionS
*expressionP
));
97 static void set_arch_mach
PARAMS ((int));
99 /* Set linkrelax here to avoid fixups in most sections. */
102 static int current_machine
;
105 #define MAX_INSN_FIXUPS (5)
110 bfd_reloc_code_real_type reloc
;
112 struct mn10300_fixup fixups
[MAX_INSN_FIXUPS
];
115 /* We must store the value of each register operand so that we can
116 verify that certain registers do not match. */
117 int mn10300_reg_operands
[MN10300_MAX_OPERANDS
];
119 const char *md_shortopts
= "";
120 struct option md_longopts
[] = {
121 {NULL
, no_argument
, NULL
, 0}
123 size_t md_longopts_size
= sizeof (md_longopts
);
125 /* The target specific pseudo-ops which we support. */
126 const pseudo_typeS md_pseudo_table
[] =
128 { "file", (void (*) PARAMS ((int))) dwarf2_directive_file
, 0 },
129 { "loc", dwarf2_directive_loc
, 0 },
130 { "am30", set_arch_mach
, AM30
},
131 { "am33", set_arch_mach
, AM33
},
132 { "mn10300", set_arch_mach
, MN103
},
136 #define HAVE_AM33 (current_machine == AM33)
137 #define HAVE_AM30 (current_machine == AM30)
139 /* Opcode hash table. */
140 static struct hash_control
*mn10300_hash
;
142 /* This table is sorted. Suitable for searching by a binary search. */
143 static const struct reg_name data_registers
[] =
150 #define DATA_REG_NAME_CNT \
151 (sizeof (data_registers) / sizeof (struct reg_name))
153 static const struct reg_name address_registers
[] =
161 #define ADDRESS_REG_NAME_CNT \
162 (sizeof (address_registers) / sizeof (struct reg_name))
164 static const struct reg_name r_registers
[] =
208 #define R_REG_NAME_CNT \
209 (sizeof (r_registers) / sizeof (struct reg_name))
211 static const struct reg_name xr_registers
[] =
236 #define XR_REG_NAME_CNT \
237 (sizeof (xr_registers) / sizeof (struct reg_name))
239 /* We abuse the `value' field, that would be otherwise unused, to
240 encode the architecture on which (access to) the register was
241 introduced. FIXME: we should probably warn when we encounter a
242 register name when assembling for an architecture that doesn't
243 support it, before parsing it as a symbol name. */
244 static const struct reg_name other_registers
[] =
253 #define OTHER_REG_NAME_CNT \
254 (sizeof (other_registers) / sizeof (struct reg_name))
256 /* reg_name_search does a binary search of the given register table
257 to see if "name" is a valid regiter name. Returns the register
258 number from the array on success, or -1 on failure. */
261 reg_name_search (regs
, regcount
, name
)
262 const struct reg_name
*regs
;
266 int middle
, low
, high
;
274 middle
= (low
+ high
) / 2;
275 cmp
= strcasecmp (name
, regs
[middle
].name
);
281 return regs
[middle
].value
;
287 /* Summary of register_name().
289 * in: Input_line_pointer points to 1st char of operand.
291 * out: An expressionS.
292 * The operand may have been a register: in this case, X_op == O_register,
293 * X_add_number is set to the register number, and truth is returned.
294 * Input_line_pointer->(next non-blank) char after operand, or is in
295 * its original state.
299 r_register_name (expressionP
)
300 expressionS
*expressionP
;
307 /* Find the spelling of the operand. */
308 start
= name
= input_line_pointer
;
310 c
= get_symbol_end ();
311 reg_number
= reg_name_search (r_registers
, R_REG_NAME_CNT
, name
);
313 /* Put back the delimiting char. */
314 *input_line_pointer
= c
;
316 /* Look to see if it's in the register table. */
319 expressionP
->X_op
= O_register
;
320 expressionP
->X_add_number
= reg_number
;
322 /* Make the rest nice. */
323 expressionP
->X_add_symbol
= NULL
;
324 expressionP
->X_op_symbol
= NULL
;
329 /* Reset the line as if we had not done anything. */
330 input_line_pointer
= start
;
334 /* Summary of register_name().
336 * in: Input_line_pointer points to 1st char of operand.
338 * out: An expressionS.
339 * The operand may have been a register: in this case, X_op == O_register,
340 * X_add_number is set to the register number, and truth is returned.
341 * Input_line_pointer->(next non-blank) char after operand, or is in
342 * its original state.
346 xr_register_name (expressionP
)
347 expressionS
*expressionP
;
354 /* Find the spelling of the operand. */
355 start
= name
= input_line_pointer
;
357 c
= get_symbol_end ();
358 reg_number
= reg_name_search (xr_registers
, XR_REG_NAME_CNT
, name
);
360 /* Put back the delimiting char. */
361 *input_line_pointer
= c
;
363 /* Look to see if it's in the register table. */
366 expressionP
->X_op
= O_register
;
367 expressionP
->X_add_number
= reg_number
;
369 /* Make the rest nice. */
370 expressionP
->X_add_symbol
= NULL
;
371 expressionP
->X_op_symbol
= NULL
;
376 /* Reset the line as if we had not done anything. */
377 input_line_pointer
= start
;
381 /* Summary of register_name().
383 * in: Input_line_pointer points to 1st char of operand.
385 * out: An expressionS.
386 * The operand may have been a register: in this case, X_op == O_register,
387 * X_add_number is set to the register number, and truth is returned.
388 * Input_line_pointer->(next non-blank) char after operand, or is in
389 * its original state.
393 data_register_name (expressionP
)
394 expressionS
*expressionP
;
401 /* Find the spelling of the operand. */
402 start
= name
= input_line_pointer
;
404 c
= get_symbol_end ();
405 reg_number
= reg_name_search (data_registers
, DATA_REG_NAME_CNT
, name
);
407 /* Put back the delimiting char. */
408 *input_line_pointer
= c
;
410 /* Look to see if it's in the register table. */
413 expressionP
->X_op
= O_register
;
414 expressionP
->X_add_number
= reg_number
;
416 /* Make the rest nice. */
417 expressionP
->X_add_symbol
= NULL
;
418 expressionP
->X_op_symbol
= NULL
;
423 /* Reset the line as if we had not done anything. */
424 input_line_pointer
= start
;
428 /* Summary of register_name().
430 * in: Input_line_pointer points to 1st char of operand.
432 * out: An expressionS.
433 * The operand may have been a register: in this case, X_op == O_register,
434 * X_add_number is set to the register number, and truth is returned.
435 * Input_line_pointer->(next non-blank) char after operand, or is in
436 * its original state.
440 address_register_name (expressionP
)
441 expressionS
*expressionP
;
448 /* Find the spelling of the operand. */
449 start
= name
= input_line_pointer
;
451 c
= get_symbol_end ();
452 reg_number
= reg_name_search (address_registers
, ADDRESS_REG_NAME_CNT
, name
);
454 /* Put back the delimiting char. */
455 *input_line_pointer
= c
;
457 /* Look to see if it's in the register table. */
460 expressionP
->X_op
= O_register
;
461 expressionP
->X_add_number
= reg_number
;
463 /* Make the rest nice. */
464 expressionP
->X_add_symbol
= NULL
;
465 expressionP
->X_op_symbol
= NULL
;
470 /* Reset the line as if we had not done anything. */
471 input_line_pointer
= start
;
475 /* Summary of register_name().
477 * in: Input_line_pointer points to 1st char of operand.
479 * out: An expressionS.
480 * The operand may have been a register: in this case, X_op == O_register,
481 * X_add_number is set to the register number, and truth is returned.
482 * Input_line_pointer->(next non-blank) char after operand, or is in
483 * its original state.
487 other_register_name (expressionP
)
488 expressionS
*expressionP
;
495 /* Find the spelling of the operand. */
496 start
= name
= input_line_pointer
;
498 c
= get_symbol_end ();
499 reg_number
= reg_name_search (other_registers
, OTHER_REG_NAME_CNT
, name
);
501 /* Put back the delimiting char. */
502 *input_line_pointer
= c
;
504 /* Look to see if it's in the register table. */
506 || (reg_number
== AM33
&& HAVE_AM33
))
508 expressionP
->X_op
= O_register
;
509 expressionP
->X_add_number
= 0;
511 /* Make the rest nice. */
512 expressionP
->X_add_symbol
= NULL
;
513 expressionP
->X_op_symbol
= NULL
;
518 /* Reset the line as if we had not done anything. */
519 input_line_pointer
= start
;
524 md_show_usage (stream
)
527 fprintf (stream
, _("MN10300 options:\n\
532 md_parse_option (c
, arg
)
533 int c ATTRIBUTE_UNUSED
;
534 char *arg ATTRIBUTE_UNUSED
;
540 md_undefined_symbol (name
)
541 char *name ATTRIBUTE_UNUSED
;
547 md_atof (type
, litp
, sizep
)
553 LITTLENUM_TYPE words
[4];
569 return "bad call to md_atof";
572 t
= atof_ieee (input_line_pointer
, type
, words
);
574 input_line_pointer
= t
;
578 for (i
= prec
- 1; i
>= 0; i
--)
580 md_number_to_chars (litp
, (valueT
) words
[i
], 2);
588 md_convert_frag (abfd
, sec
, fragP
)
589 bfd
*abfd ATTRIBUTE_UNUSED
;
593 static unsigned long label_count
= 0;
596 subseg_change (sec
, 0);
597 if (fragP
->fr_subtype
== 0)
599 fix_new (fragP
, fragP
->fr_fix
+ 1, 1, fragP
->fr_symbol
,
600 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
604 else if (fragP
->fr_subtype
== 1)
606 /* Reverse the condition of the first branch. */
607 int offset
= fragP
->fr_fix
;
608 int opcode
= fragP
->fr_literal
[offset
] & 0xff;
645 fragP
->fr_literal
[offset
] = opcode
;
647 /* Create a fixup for the reversed conditional branch. */
648 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
649 fix_new (fragP
, fragP
->fr_fix
+ 1, 1,
650 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
651 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
653 /* Now create the unconditional branch + fixup to the
655 fragP
->fr_literal
[offset
+ 2] = 0xcc;
656 fix_new (fragP
, fragP
->fr_fix
+ 3, 2, fragP
->fr_symbol
,
657 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
661 else if (fragP
->fr_subtype
== 2)
663 /* Reverse the condition of the first branch. */
664 int offset
= fragP
->fr_fix
;
665 int opcode
= fragP
->fr_literal
[offset
] & 0xff;
702 fragP
->fr_literal
[offset
] = opcode
;
704 /* Create a fixup for the reversed conditional branch. */
705 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
706 fix_new (fragP
, fragP
->fr_fix
+ 1, 1,
707 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
708 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
710 /* Now create the unconditional branch + fixup to the
712 fragP
->fr_literal
[offset
+ 2] = 0xdc;
713 fix_new (fragP
, fragP
->fr_fix
+ 3, 4, fragP
->fr_symbol
,
714 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
718 else if (fragP
->fr_subtype
== 3)
720 fix_new (fragP
, fragP
->fr_fix
+ 2, 1, fragP
->fr_symbol
,
721 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
725 else if (fragP
->fr_subtype
== 4)
727 /* Reverse the condition of the first branch. */
728 int offset
= fragP
->fr_fix
;
729 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
748 fragP
->fr_literal
[offset
+ 1] = opcode
;
750 /* Create a fixup for the reversed conditional branch. */
751 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
752 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
753 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
754 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
756 /* Now create the unconditional branch + fixup to the
758 fragP
->fr_literal
[offset
+ 3] = 0xcc;
759 fix_new (fragP
, fragP
->fr_fix
+ 4, 2, fragP
->fr_symbol
,
760 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
764 else if (fragP
->fr_subtype
== 5)
766 /* Reverse the condition of the first branch. */
767 int offset
= fragP
->fr_fix
;
768 int opcode
= fragP
->fr_literal
[offset
+ 1] & 0xff;
784 fragP
->fr_literal
[offset
+ 1] = opcode
;
786 /* Create a fixup for the reversed conditional branch. */
787 sprintf (buf
, ".%s_%ld", FAKE_LABEL_NAME
, label_count
++);
788 fix_new (fragP
, fragP
->fr_fix
+ 2, 1,
789 symbol_new (buf
, sec
, 0, fragP
->fr_next
),
790 fragP
->fr_offset
+ 2, 1, BFD_RELOC_8_PCREL
);
792 /* Now create the unconditional branch + fixup to the
794 fragP
->fr_literal
[offset
+ 3] = 0xdc;
795 fix_new (fragP
, fragP
->fr_fix
+ 4, 4, fragP
->fr_symbol
,
796 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
800 else if (fragP
->fr_subtype
== 6)
802 int offset
= fragP
->fr_fix
;
803 fragP
->fr_literal
[offset
] = 0xcd;
804 fix_new (fragP
, fragP
->fr_fix
+ 1, 2, fragP
->fr_symbol
,
805 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
809 else if (fragP
->fr_subtype
== 7)
811 int offset
= fragP
->fr_fix
;
812 fragP
->fr_literal
[offset
] = 0xdd;
813 fragP
->fr_literal
[offset
+ 5] = fragP
->fr_literal
[offset
+ 3];
814 fragP
->fr_literal
[offset
+ 6] = fragP
->fr_literal
[offset
+ 4];
816 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
817 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
821 else if (fragP
->fr_subtype
== 8)
823 int offset
= fragP
->fr_fix
;
824 fragP
->fr_literal
[offset
] = 0xfa;
825 fragP
->fr_literal
[offset
+ 1] = 0xff;
826 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
827 fragP
->fr_offset
+ 2, 1, BFD_RELOC_16_PCREL
);
831 else if (fragP
->fr_subtype
== 9)
833 int offset
= fragP
->fr_fix
;
834 fragP
->fr_literal
[offset
] = 0xfc;
835 fragP
->fr_literal
[offset
+ 1] = 0xff;
837 fix_new (fragP
, fragP
->fr_fix
+ 2, 4, fragP
->fr_symbol
,
838 fragP
->fr_offset
+ 2, 1, BFD_RELOC_32_PCREL
);
842 else if (fragP
->fr_subtype
== 10)
844 fragP
->fr_literal
[fragP
->fr_fix
] = 0xca;
845 fix_new (fragP
, fragP
->fr_fix
+ 1, 1, fragP
->fr_symbol
,
846 fragP
->fr_offset
+ 1, 1, BFD_RELOC_8_PCREL
);
850 else if (fragP
->fr_subtype
== 11)
852 int offset
= fragP
->fr_fix
;
853 fragP
->fr_literal
[offset
] = 0xcc;
855 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
856 fragP
->fr_offset
+ 1, 1, BFD_RELOC_16_PCREL
);
860 else if (fragP
->fr_subtype
== 12)
862 int offset
= fragP
->fr_fix
;
863 fragP
->fr_literal
[offset
] = 0xdc;
865 fix_new (fragP
, fragP
->fr_fix
+ 1, 4, fragP
->fr_symbol
,
866 fragP
->fr_offset
+ 1, 1, BFD_RELOC_32_PCREL
);
875 md_section_align (seg
, addr
)
879 int align
= bfd_get_section_alignment (stdoutput
, seg
);
880 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
886 char *prev_name
= "";
887 register const struct mn10300_opcode
*op
;
889 mn10300_hash
= hash_new ();
891 /* Insert unique names into hash table. The MN10300 instruction set
892 has many identical opcode names that have different opcodes based
893 on the operands. This hash table then provides a quick index to
894 the first opcode with a particular name in the opcode table. */
896 op
= mn10300_opcodes
;
899 if (strcmp (prev_name
, op
->name
))
901 prev_name
= (char *) op
->name
;
902 hash_insert (mn10300_hash
, op
->name
, (char *) op
);
907 /* Set the default machine type. */
908 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, MN103
))
909 as_warn (_("could not set architecture and machine"));
911 current_machine
= MN103
;
919 struct mn10300_opcode
*opcode
;
920 struct mn10300_opcode
*next_opcode
;
921 const unsigned char *opindex_ptr
;
922 int next_opindex
, relaxable
;
923 unsigned long insn
, extension
, size
= 0;
928 /* Get the opcode. */
929 for (s
= str
; *s
!= '\0' && !ISSPACE (*s
); s
++)
934 /* Find the first opcode with the proper name. */
935 opcode
= (struct mn10300_opcode
*) hash_find (mn10300_hash
, str
);
938 as_bad (_("Unrecognized opcode: `%s'"), str
);
943 while (ISSPACE (*str
))
946 input_line_pointer
= str
;
955 errmsg
= _("Invalid opcode/operands");
957 /* Reset the array of register operands. */
958 memset (mn10300_reg_operands
, -1, sizeof (mn10300_reg_operands
));
964 insn
= opcode
->opcode
;
967 /* If the instruction is not available on the current machine
968 then it can not possibly match. */
970 && !(opcode
->machine
== AM33
&& HAVE_AM33
)
971 && !(opcode
->machine
== AM30
&& HAVE_AM30
))
974 for (op_idx
= 1, opindex_ptr
= opcode
->operands
;
976 opindex_ptr
++, op_idx
++)
978 const struct mn10300_operand
*operand
;
981 if (next_opindex
== 0)
983 operand
= &mn10300_operands
[*opindex_ptr
];
987 operand
= &mn10300_operands
[next_opindex
];
991 while (*str
== ' ' || *str
== ',')
994 if (operand
->flags
& MN10300_OPERAND_RELAX
)
997 /* Gather the operand. */
998 hold
= input_line_pointer
;
999 input_line_pointer
= str
;
1001 if (operand
->flags
& MN10300_OPERAND_PAREN
)
1003 if (*input_line_pointer
!= ')' && *input_line_pointer
!= '(')
1005 input_line_pointer
= hold
;
1009 input_line_pointer
++;
1012 /* See if we can match the operands. */
1013 else if (operand
->flags
& MN10300_OPERAND_DREG
)
1015 if (!data_register_name (&ex
))
1017 input_line_pointer
= hold
;
1022 else if (operand
->flags
& MN10300_OPERAND_AREG
)
1024 if (!address_register_name (&ex
))
1026 input_line_pointer
= hold
;
1031 else if (operand
->flags
& MN10300_OPERAND_SP
)
1033 char *start
= input_line_pointer
;
1034 char c
= get_symbol_end ();
1036 if (strcasecmp (start
, "sp") != 0)
1038 *input_line_pointer
= c
;
1039 input_line_pointer
= hold
;
1043 *input_line_pointer
= c
;
1046 else if (operand
->flags
& MN10300_OPERAND_RREG
)
1048 if (!r_register_name (&ex
))
1050 input_line_pointer
= hold
;
1055 else if (operand
->flags
& MN10300_OPERAND_XRREG
)
1057 if (!xr_register_name (&ex
))
1059 input_line_pointer
= hold
;
1064 else if (operand
->flags
& MN10300_OPERAND_USP
)
1066 char *start
= input_line_pointer
;
1067 char c
= get_symbol_end ();
1069 if (strcasecmp (start
, "usp") != 0)
1071 *input_line_pointer
= c
;
1072 input_line_pointer
= hold
;
1076 *input_line_pointer
= c
;
1079 else if (operand
->flags
& MN10300_OPERAND_SSP
)
1081 char *start
= input_line_pointer
;
1082 char c
= get_symbol_end ();
1084 if (strcasecmp (start
, "ssp") != 0)
1086 *input_line_pointer
= c
;
1087 input_line_pointer
= hold
;
1091 *input_line_pointer
= c
;
1094 else if (operand
->flags
& MN10300_OPERAND_MSP
)
1096 char *start
= input_line_pointer
;
1097 char c
= get_symbol_end ();
1099 if (strcasecmp (start
, "msp") != 0)
1101 *input_line_pointer
= c
;
1102 input_line_pointer
= hold
;
1106 *input_line_pointer
= c
;
1109 else if (operand
->flags
& MN10300_OPERAND_PC
)
1111 char *start
= input_line_pointer
;
1112 char c
= get_symbol_end ();
1114 if (strcasecmp (start
, "pc") != 0)
1116 *input_line_pointer
= c
;
1117 input_line_pointer
= hold
;
1121 *input_line_pointer
= c
;
1124 else if (operand
->flags
& MN10300_OPERAND_EPSW
)
1126 char *start
= input_line_pointer
;
1127 char c
= get_symbol_end ();
1129 if (strcasecmp (start
, "epsw") != 0)
1131 *input_line_pointer
= c
;
1132 input_line_pointer
= hold
;
1136 *input_line_pointer
= c
;
1139 else if (operand
->flags
& MN10300_OPERAND_PLUS
)
1141 if (*input_line_pointer
!= '+')
1143 input_line_pointer
= hold
;
1147 input_line_pointer
++;
1150 else if (operand
->flags
& MN10300_OPERAND_PSW
)
1152 char *start
= input_line_pointer
;
1153 char c
= get_symbol_end ();
1155 if (strcasecmp (start
, "psw") != 0)
1157 *input_line_pointer
= c
;
1158 input_line_pointer
= hold
;
1162 *input_line_pointer
= c
;
1165 else if (operand
->flags
& MN10300_OPERAND_MDR
)
1167 char *start
= input_line_pointer
;
1168 char c
= get_symbol_end ();
1170 if (strcasecmp (start
, "mdr") != 0)
1172 *input_line_pointer
= c
;
1173 input_line_pointer
= hold
;
1177 *input_line_pointer
= c
;
1180 else if (operand
->flags
& MN10300_OPERAND_REG_LIST
)
1182 unsigned int value
= 0;
1183 if (*input_line_pointer
!= '[')
1185 input_line_pointer
= hold
;
1191 input_line_pointer
++;
1193 /* We used to reject a null register list here; however,
1194 we accept it now so the compiler can emit "call"
1195 instructions for all calls to named functions.
1197 The linker can then fill in the appropriate bits for the
1198 register list and stack size or change the instruction
1199 into a "calls" if using "call" is not profitable. */
1200 while (*input_line_pointer
!= ']')
1205 if (*input_line_pointer
== ',')
1206 input_line_pointer
++;
1208 start
= input_line_pointer
;
1209 c
= get_symbol_end ();
1211 if (strcasecmp (start
, "d2") == 0)
1214 *input_line_pointer
= c
;
1216 else if (strcasecmp (start
, "d3") == 0)
1219 *input_line_pointer
= c
;
1221 else if (strcasecmp (start
, "a2") == 0)
1224 *input_line_pointer
= c
;
1226 else if (strcasecmp (start
, "a3") == 0)
1229 *input_line_pointer
= c
;
1231 else if (strcasecmp (start
, "other") == 0)
1234 *input_line_pointer
= c
;
1237 && strcasecmp (start
, "exreg0") == 0)
1240 *input_line_pointer
= c
;
1243 && strcasecmp (start
, "exreg1") == 0)
1246 *input_line_pointer
= c
;
1249 && strcasecmp (start
, "exother") == 0)
1252 *input_line_pointer
= c
;
1255 && strcasecmp (start
, "all") == 0)
1258 *input_line_pointer
= c
;
1262 input_line_pointer
= hold
;
1267 input_line_pointer
++;
1268 mn10300_insert_operand (&insn
, &extension
, operand
,
1269 value
, (char *) NULL
, 0, 0);
1273 else if (data_register_name (&ex
))
1275 input_line_pointer
= hold
;
1279 else if (address_register_name (&ex
))
1281 input_line_pointer
= hold
;
1285 else if (other_register_name (&ex
))
1287 input_line_pointer
= hold
;
1291 else if (HAVE_AM33
&& r_register_name (&ex
))
1293 input_line_pointer
= hold
;
1297 else if (HAVE_AM33
&& xr_register_name (&ex
))
1299 input_line_pointer
= hold
;
1303 else if (*str
== ')' || *str
== '(')
1305 input_line_pointer
= hold
;
1317 errmsg
= _("illegal operand");
1320 errmsg
= _("missing operand");
1326 mask
= MN10300_OPERAND_DREG
| MN10300_OPERAND_AREG
;
1328 mask
|= MN10300_OPERAND_RREG
| MN10300_OPERAND_XRREG
;
1329 if ((operand
->flags
& mask
) == 0)
1331 input_line_pointer
= hold
;
1336 if (opcode
->format
== FMT_D1
|| opcode
->format
== FMT_S1
)
1338 else if (opcode
->format
== FMT_D2
1339 || opcode
->format
== FMT_D4
1340 || opcode
->format
== FMT_S2
1341 || opcode
->format
== FMT_S4
1342 || opcode
->format
== FMT_S6
1343 || opcode
->format
== FMT_D5
)
1345 else if (opcode
->format
== FMT_D7
)
1347 else if (opcode
->format
== FMT_D8
|| opcode
->format
== FMT_D9
)
1352 mn10300_insert_operand (&insn
, &extension
, operand
,
1353 ex
.X_add_number
, (char *) NULL
,
1356 /* And note the register number in the register array. */
1357 mn10300_reg_operands
[op_idx
- 1] = ex
.X_add_number
;
1362 /* If this operand can be promoted, and it doesn't
1363 fit into the allocated bitfield for this insn,
1364 then promote it (ie this opcode does not match). */
1366 & (MN10300_OPERAND_PROMOTE
| MN10300_OPERAND_RELAX
)
1367 && !check_operand (insn
, operand
, ex
.X_add_number
))
1369 input_line_pointer
= hold
;
1374 mn10300_insert_operand (&insn
, &extension
, operand
,
1375 ex
.X_add_number
, (char *) NULL
,
1380 /* If this operand can be promoted, then this opcode didn't
1381 match since we can't know if it needed promotion! */
1382 if (operand
->flags
& MN10300_OPERAND_PROMOTE
)
1384 input_line_pointer
= hold
;
1389 /* We need to generate a fixup for this expression. */
1390 if (fc
>= MAX_INSN_FIXUPS
)
1391 as_fatal (_("too many fixups"));
1392 fixups
[fc
].exp
= ex
;
1393 fixups
[fc
].opindex
= *opindex_ptr
;
1394 fixups
[fc
].reloc
= BFD_RELOC_UNUSED
;
1400 str
= input_line_pointer
;
1401 input_line_pointer
= hold
;
1403 while (*str
== ' ' || *str
== ',')
1408 /* Make sure we used all the operands! */
1412 /* If this instruction has registers that must not match, verify
1413 that they do indeed not match. */
1414 if (opcode
->no_match_operands
)
1418 /* Look at each operand to see if it's marked. */
1419 for (i
= 0; i
< MN10300_MAX_OPERANDS
; i
++)
1421 if ((1 << i
) & opcode
->no_match_operands
)
1425 /* operand I is marked. Check that it does not match any
1426 operands > I which are marked. */
1427 for (j
= i
+ 1; j
< MN10300_MAX_OPERANDS
; j
++)
1429 if (((1 << j
) & opcode
->no_match_operands
)
1430 && mn10300_reg_operands
[i
] == mn10300_reg_operands
[j
])
1432 errmsg
= _("Invalid register specification.");
1444 next_opcode
= opcode
+ 1;
1445 if (!strcmp (next_opcode
->name
, opcode
->name
))
1447 opcode
= next_opcode
;
1451 as_bad ("%s", errmsg
);
1457 while (ISSPACE (*str
))
1461 as_bad (_("junk at end of line: `%s'"), str
);
1463 input_line_pointer
= str
;
1465 /* Determine the size of the instruction. */
1466 if (opcode
->format
== FMT_S0
)
1469 if (opcode
->format
== FMT_S1
|| opcode
->format
== FMT_D0
)
1472 if (opcode
->format
== FMT_S2
|| opcode
->format
== FMT_D1
)
1475 if (opcode
->format
== FMT_D6
)
1478 if (opcode
->format
== FMT_D7
|| opcode
->format
== FMT_D10
)
1481 if (opcode
->format
== FMT_D8
)
1484 if (opcode
->format
== FMT_D9
)
1487 if (opcode
->format
== FMT_S4
)
1490 if (opcode
->format
== FMT_S6
|| opcode
->format
== FMT_D5
)
1493 if (opcode
->format
== FMT_D2
)
1496 if (opcode
->format
== FMT_D4
)
1499 if (relaxable
&& fc
> 0)
1503 /* We want to anchor the line info to the previous frag (if
1504 there isn't one, create it), so that, when the insn is
1505 resized, we still get the right address for the beginning of
1508 dwarf2_emit_insn (0);
1513 /* Handle bra specially. Basically treat it like jmp so
1514 that we automatically handle 8, 16 and 32 bit offsets
1515 correctly as well as jumps to an undefined address.
1517 It is also important to not treat it like other bCC
1518 instructions since the long forms of bra is different
1519 from other bCC instructions. */
1520 if (opcode
->opcode
== 0xca00)
1532 else if (size
== 3 && opcode
->opcode
== 0xcc0000)
1534 /* bCC (uncommon cases) */
1538 f
= frag_var (rs_machine_dependent
, 8, 8 - size
, type
,
1539 fixups
[0].exp
.X_add_symbol
,
1540 fixups
[0].exp
.X_add_number
,
1541 (char *)fixups
[0].opindex
);
1543 /* This is pretty hokey. We basically just care about the
1544 opcode, so we have to write out the first word big endian.
1546 The exception is "call", which has two operands that we
1549 The first operand (the register list) happens to be in the
1550 first instruction word, and will be in the right place if
1551 we output the first word in big endian mode.
1553 The second operand (stack size) is in the extension word,
1554 and we want it to appear as the first character in the extension
1555 word (as it appears in memory). Luckily, writing the extension
1556 word in big endian format will do what we want. */
1557 number_to_chars_bigendian (f
, insn
, size
> 4 ? 4 : size
);
1560 number_to_chars_bigendian (f
+ 4, extension
, 4);
1561 number_to_chars_bigendian (f
+ 8, 0, size
- 8);
1564 number_to_chars_bigendian (f
+ 4, extension
, size
- 4);
1568 /* Allocate space for the instruction. */
1569 f
= frag_more (size
);
1571 /* Fill in bytes for the instruction. Note that opcode fields
1572 are written big-endian, 16 & 32bit immediates are written
1573 little endian. Egad. */
1574 if (opcode
->format
== FMT_S0
1575 || opcode
->format
== FMT_S1
1576 || opcode
->format
== FMT_D0
1577 || opcode
->format
== FMT_D6
1578 || opcode
->format
== FMT_D7
1579 || opcode
->format
== FMT_D10
1580 || opcode
->format
== FMT_D1
)
1582 number_to_chars_bigendian (f
, insn
, size
);
1584 else if (opcode
->format
== FMT_S2
1585 && opcode
->opcode
!= 0xdf0000
1586 && opcode
->opcode
!= 0xde0000)
1588 /* A format S2 instruction that is _not_ "ret" and "retf". */
1589 number_to_chars_bigendian (f
, (insn
>> 16) & 0xff, 1);
1590 number_to_chars_littleendian (f
+ 1, insn
& 0xffff, 2);
1592 else if (opcode
->format
== FMT_S2
)
1594 /* This must be a ret or retf, which is written entirely in
1595 big-endian format. */
1596 number_to_chars_bigendian (f
, insn
, 3);
1598 else if (opcode
->format
== FMT_S4
1599 && opcode
->opcode
!= 0xdc000000)
1601 /* This must be a format S4 "call" instruction. What a pain. */
1602 unsigned long temp
= (insn
>> 8) & 0xffff;
1603 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1604 number_to_chars_littleendian (f
+ 1, temp
, 2);
1605 number_to_chars_bigendian (f
+ 3, insn
& 0xff, 1);
1606 number_to_chars_bigendian (f
+ 4, extension
& 0xff, 1);
1608 else if (opcode
->format
== FMT_S4
)
1610 /* This must be a format S4 "jmp" instruction. */
1611 unsigned long temp
= ((insn
& 0xffffff) << 8) | (extension
& 0xff);
1612 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1613 number_to_chars_littleendian (f
+ 1, temp
, 4);
1615 else if (opcode
->format
== FMT_S6
)
1617 unsigned long temp
= ((insn
& 0xffffff) << 8)
1618 | ((extension
>> 16) & 0xff);
1619 number_to_chars_bigendian (f
, (insn
>> 24) & 0xff, 1);
1620 number_to_chars_littleendian (f
+ 1, temp
, 4);
1621 number_to_chars_bigendian (f
+ 5, (extension
>> 8) & 0xff, 1);
1622 number_to_chars_bigendian (f
+ 6, extension
& 0xff, 1);
1624 else if (opcode
->format
== FMT_D2
1625 && opcode
->opcode
!= 0xfaf80000
1626 && opcode
->opcode
!= 0xfaf00000
1627 && opcode
->opcode
!= 0xfaf40000)
1629 /* A format D2 instruction where the 16bit immediate is
1630 really a single 16bit value, not two 8bit values. */
1631 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
1632 number_to_chars_littleendian (f
+ 2, insn
& 0xffff, 2);
1634 else if (opcode
->format
== FMT_D2
)
1636 /* A format D2 instruction where the 16bit immediate
1637 is really two 8bit immediates. */
1638 number_to_chars_bigendian (f
, insn
, 4);
1640 else if (opcode
->format
== FMT_D4
)
1642 unsigned long temp
= ((insn
& 0xffff) << 16) | (extension
& 0xffff);
1644 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
1645 number_to_chars_littleendian (f
+ 2, temp
, 4);
1647 else if (opcode
->format
== FMT_D5
)
1649 unsigned long temp
= (((insn
& 0xffff) << 16)
1650 | ((extension
>> 8) & 0xffff));
1652 number_to_chars_bigendian (f
, (insn
>> 16) & 0xffff, 2);
1653 number_to_chars_littleendian (f
+ 2, temp
, 4);
1654 number_to_chars_bigendian (f
+ 6, extension
& 0xff, 1);
1656 else if (opcode
->format
== FMT_D8
)
1658 unsigned long temp
= ((insn
& 0xff) << 16) | (extension
& 0xffff);
1660 number_to_chars_bigendian (f
, (insn
>> 8) & 0xffffff, 3);
1661 number_to_chars_bigendian (f
+ 3, (temp
& 0xff), 1);
1662 number_to_chars_littleendian (f
+ 4, temp
>> 8, 2);
1664 else if (opcode
->format
== FMT_D9
)
1666 unsigned long temp
= ((insn
& 0xff) << 24) | (extension
& 0xffffff);
1668 number_to_chars_bigendian (f
, (insn
>> 8) & 0xffffff, 3);
1669 number_to_chars_littleendian (f
+ 3, temp
, 4);
1672 /* Create any fixups. */
1673 for (i
= 0; i
< fc
; i
++)
1675 const struct mn10300_operand
*operand
;
1677 operand
= &mn10300_operands
[fixups
[i
].opindex
];
1678 if (fixups
[i
].reloc
!= BFD_RELOC_UNUSED
)
1680 reloc_howto_type
*reloc_howto
;
1685 reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
1691 size
= bfd_get_reloc_size (reloc_howto
);
1693 if (size
< 1 || size
> 4)
1697 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
1698 size
, &fixups
[i
].exp
,
1699 reloc_howto
->pc_relative
,
1704 int reloc
, pcrel
, reloc_size
, offset
;
1707 reloc
= BFD_RELOC_NONE
;
1708 /* How big is the reloc? Remember SPLIT relocs are
1709 implicitly 32bits. */
1710 if ((operand
->flags
& MN10300_OPERAND_SPLIT
) != 0)
1712 else if ((operand
->flags
& MN10300_OPERAND_24BIT
) != 0)
1715 reloc_size
= operand
->bits
;
1717 /* Is the reloc pc-relative? */
1718 pcrel
= (operand
->flags
& MN10300_OPERAND_PCREL
) != 0;
1720 offset
= size
- (reloc_size
+ operand
->shift
) / 8;
1722 /* Choose a proper BFD relocation type. */
1725 if (reloc_size
== 32)
1726 reloc
= BFD_RELOC_32_PCREL
;
1727 else if (reloc_size
== 16)
1728 reloc
= BFD_RELOC_16_PCREL
;
1729 else if (reloc_size
== 8)
1730 reloc
= BFD_RELOC_8_PCREL
;
1736 if (reloc_size
== 32)
1737 reloc
= BFD_RELOC_32
;
1738 else if (reloc_size
== 16)
1739 reloc
= BFD_RELOC_16
;
1740 else if (reloc_size
== 8)
1741 reloc
= BFD_RELOC_8
;
1746 /* Convert the size of the reloc into what fix_new_exp wants. */
1747 reloc_size
= reloc_size
/ 8;
1748 if (reloc_size
== 8)
1750 else if (reloc_size
== 16)
1752 else if (reloc_size
== 32)
1755 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
+ offset
,
1756 reloc_size
, &fixups
[i
].exp
, pcrel
,
1757 ((bfd_reloc_code_real_type
) reloc
));
1760 fixP
->fx_offset
+= offset
;
1764 dwarf2_emit_insn (size
);
1768 /* If while processing a fixup, a reloc really needs to be created
1769 then it is done here. */
1772 tc_gen_reloc (seg
, fixp
)
1773 asection
*seg ATTRIBUTE_UNUSED
;
1777 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1779 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1780 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
1782 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1783 _("reloc %d not supported by object file format"),
1784 (int) fixp
->fx_r_type
);
1787 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1789 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
1791 reloc
->sym_ptr_ptr
= NULL
;
1793 /* If we got a difference between two symbols, and the
1794 subtracted symbol is in the current section, use a
1795 PC-relative relocation. If both symbols are in the same
1796 section, the difference would have already been simplified
1798 if (S_GET_SEGMENT (fixp
->fx_subsy
) == seg
)
1800 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
1801 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1802 reloc
->addend
= (reloc
->address
- S_GET_VALUE (fixp
->fx_subsy
)
1805 switch (fixp
->fx_r_type
)
1808 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
,
1813 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
,
1814 BFD_RELOC_16_PCREL
);
1818 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
,
1819 BFD_RELOC_24_PCREL
);
1823 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
,
1824 BFD_RELOC_32_PCREL
);
1828 /* Try to compute the absolute value below. */
1833 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
1834 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
1836 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1837 "Difference of symbols in different sections is not supported");
1841 char *fixpos
= fixp
->fx_where
+ fixp
->fx_frag
->fr_literal
;
1843 reloc
->addend
= (S_GET_VALUE (fixp
->fx_addsy
)
1844 - S_GET_VALUE (fixp
->fx_subsy
) + fixp
->fx_offset
);
1846 switch (fixp
->fx_r_type
)
1849 md_number_to_chars (fixpos
, reloc
->addend
, 1);
1853 md_number_to_chars (fixpos
, reloc
->addend
, 2);
1857 md_number_to_chars (fixpos
, reloc
->addend
, 3);
1861 md_number_to_chars (fixpos
, reloc
->addend
, 4);
1865 reloc
->sym_ptr_ptr
= (asymbol
**) &bfd_abs_symbol
;
1870 if (reloc
->sym_ptr_ptr
)
1871 free (reloc
->sym_ptr_ptr
);
1877 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
1878 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1879 reloc
->addend
= fixp
->fx_offset
;
1885 md_estimate_size_before_relax (fragp
, seg
)
1889 if (fragp
->fr_subtype
== 6
1890 && (!S_IS_DEFINED (fragp
->fr_symbol
)
1891 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
)))
1892 fragp
->fr_subtype
= 7;
1893 else if (fragp
->fr_subtype
== 8
1894 && (!S_IS_DEFINED (fragp
->fr_symbol
)
1895 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
)))
1896 fragp
->fr_subtype
= 9;
1897 else if (fragp
->fr_subtype
== 10
1898 && (!S_IS_DEFINED (fragp
->fr_symbol
)
1899 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
)))
1900 fragp
->fr_subtype
= 12;
1902 if (fragp
->fr_subtype
>= sizeof (md_relax_table
) / sizeof (md_relax_table
[0]))
1905 return md_relax_table
[fragp
->fr_subtype
].rlx_length
;
1909 md_pcrel_from (fixp
)
1912 if (fixp
->fx_addsy
!= (symbolS
*) NULL
&& !S_IS_DEFINED (fixp
->fx_addsy
))
1914 /* The symbol is undefined. Let the linker figure it out. */
1917 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1921 md_apply_fix3 (fixP
, valP
, seg
)
1926 char * fixpos
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
1928 int value
= (int) * valP
;
1930 assert (fixP
->fx_r_type
< BFD_RELOC_UNUSED
);
1932 /* This should never happen. */
1933 if (seg
->flags
& SEC_ALLOC
)
1936 /* The value we are passed in *valuep includes the symbol values.
1937 Since we are using BFD_ASSEMBLER, if we are doing this relocation
1938 the code in write.c is going to call bfd_install_relocation, which
1939 is also going to use the symbol value. That means that if the
1940 reloc is fully resolved we want to use *valuep since
1941 bfd_install_relocation is not being used.
1943 However, if the reloc is not fully resolved we do not want to use
1944 *valuep, and must use fx_offset instead. However, if the reloc
1945 is PC relative, we do want to use *valuep since it includes the
1946 result of md_pcrel_from. */
1947 if (fixP
->fx_addsy
!= (symbolS
*) NULL
&& ! fixP
->fx_pcrel
)
1948 value
= fixP
->fx_offset
;
1950 /* If the fix is relative to a symbol which is not defined, or not
1951 in the same segment as the fix, we cannot resolve it here. */
1952 if (fixP
->fx_addsy
!= NULL
1953 && (! S_IS_DEFINED (fixP
->fx_addsy
)
1954 || (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)))
1960 switch (fixP
->fx_r_type
)
1963 case BFD_RELOC_8_PCREL
:
1968 case BFD_RELOC_16_PCREL
:
1973 case BFD_RELOC_32_PCREL
:
1977 case BFD_RELOC_VTABLE_INHERIT
:
1978 case BFD_RELOC_VTABLE_ENTRY
:
1982 case BFD_RELOC_NONE
:
1984 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1985 _("Bad relocation fixup type (%d)"), fixP
->fx_r_type
);
1988 md_number_to_chars (fixpos
, value
, size
);
1990 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
1991 if (fixP
->fx_addsy
== NULL
)
1995 /* Return zero if the fixup in fixp should be left alone and not
1999 mn10300_fix_adjustable (fixp
)
2002 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2003 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2006 /* Do not adjust relocations involving symbols in code sections,
2007 because it breaks linker relaxations. This could be fixed in the
2008 linker, but this fix is simpler, and it pretty much only affects
2009 object size a little bit. */
2010 if (S_GET_SEGMENT (fixp
->fx_addsy
)->flags
& SEC_CODE
)
2016 /* Insert an operand value into an instruction. */
2019 mn10300_insert_operand (insnp
, extensionp
, operand
, val
, file
, line
, shift
)
2020 unsigned long *insnp
;
2021 unsigned long *extensionp
;
2022 const struct mn10300_operand
*operand
;
2028 /* No need to check 32bit operands for a bit. Note that
2029 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2030 if (operand
->bits
!= 32
2031 && (operand
->flags
& MN10300_OPERAND_SPLIT
) == 0)
2037 bits
= operand
->bits
;
2038 if (operand
->flags
& MN10300_OPERAND_24BIT
)
2041 if ((operand
->flags
& MN10300_OPERAND_SIGNED
) != 0)
2043 max
= (1 << (bits
- 1)) - 1;
2044 min
= - (1 << (bits
- 1));
2048 max
= (1 << bits
) - 1;
2054 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
2057 _("operand out of range (%s not between %ld and %ld)");
2060 sprint_value (buf
, test
);
2061 if (file
== (char *) NULL
)
2062 as_warn (err
, buf
, min
, max
);
2064 as_warn_where (file
, line
, err
, buf
, min
, max
);
2068 if ((operand
->flags
& MN10300_OPERAND_SPLIT
) != 0)
2070 *insnp
|= (val
>> (32 - operand
->bits
)) & ((1 << operand
->bits
) - 1);
2071 *extensionp
|= ((val
& ((1 << (32 - operand
->bits
)) - 1))
2074 else if ((operand
->flags
& MN10300_OPERAND_24BIT
) != 0)
2076 *insnp
|= (val
>> (24 - operand
->bits
)) & ((1 << operand
->bits
) - 1);
2077 *extensionp
|= ((val
& ((1 << (24 - operand
->bits
)) - 1))
2080 else if ((operand
->flags
& MN10300_OPERAND_EXTENDED
) == 0)
2082 *insnp
|= (((long) val
& ((1 << operand
->bits
) - 1))
2083 << (operand
->shift
+ shift
));
2085 if ((operand
->flags
& MN10300_OPERAND_REPEATED
) != 0)
2086 *insnp
|= (((long) val
& ((1 << operand
->bits
) - 1))
2087 << (operand
->shift
+ shift
+ operand
->bits
));
2091 *extensionp
|= (((long) val
& ((1 << operand
->bits
) - 1))
2092 << (operand
->shift
+ shift
));
2094 if ((operand
->flags
& MN10300_OPERAND_REPEATED
) != 0)
2095 *extensionp
|= (((long) val
& ((1 << operand
->bits
) - 1))
2096 << (operand
->shift
+ shift
+ operand
->bits
));
2100 static unsigned long
2101 check_operand (insn
, operand
, val
)
2102 unsigned long insn ATTRIBUTE_UNUSED
;
2103 const struct mn10300_operand
*operand
;
2106 /* No need to check 32bit operands for a bit. Note that
2107 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2108 if (operand
->bits
!= 32
2109 && (operand
->flags
& MN10300_OPERAND_SPLIT
) == 0)
2115 bits
= operand
->bits
;
2116 if (operand
->flags
& MN10300_OPERAND_24BIT
)
2119 if ((operand
->flags
& MN10300_OPERAND_SIGNED
) != 0)
2121 max
= (1 << (bits
- 1)) - 1;
2122 min
= - (1 << (bits
- 1));
2126 max
= (1 << bits
) - 1;
2132 if (test
< (offsetT
) min
|| test
> (offsetT
) max
)
2141 set_arch_mach (mach
)
2144 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_mn10300
, mach
))
2145 as_warn (_("could not set architecture and machine"));
2147 current_machine
= mach
;