* config/tc-mips.c (mips_validate_fix): New function.
[deliverable/binutils-gdb.git] / gas / config / tc-msp430.c
1 /* tc-msp430.c -- Assembler code for the Texas Instruments MSP430
2
3 Copyright (C) 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Dmitry Diky <diwil@mail.ru>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include <stdio.h>
24 #include <string.h>
25 #include <stdlib.h>
26 #include <limits.h>
27
28 #define PUSH_1X_WORKAROUND
29 #include "as.h"
30 #include "subsegs.h"
31 #include "opcode/msp430.h"
32 #include "safe-ctype.h"
33
34 const char comment_chars[] = ";";
35 const char line_comment_chars[] = "#";
36 const char line_separator_chars[] = "";
37 const char EXP_CHARS[] = "eE";
38 const char FLT_CHARS[] = "dD";
39
40 /* Handle long expressions. */
41 extern LITTLENUM_TYPE generic_bignum[];
42
43 static struct hash_control *msp430_hash;
44
45 static unsigned int msp430_operands
46 PARAMS ((struct msp430_opcode_s *, char *));
47 static int msp430_srcoperand
48 PARAMS ((struct msp430_operand_s *, char *, int, int *));
49 static int msp430_dstoperand
50 PARAMS ((struct msp430_operand_s *, char *, int));
51 static char *parse_exp
52 PARAMS ((char *, expressionS *));
53 static inline char *skip_space
54 PARAMS ((char *));
55 static int check_reg
56 PARAMS ((char *));
57 static void msp430_set_arch
58 PARAMS ((int));
59 static void show_mcu_list
60 PARAMS ((FILE *));
61 static void del_spaces
62 PARAMS ((char *));
63
64 #define MAX_OP_LEN 64
65
66 struct mcu_type_s
67 {
68 char *name;
69 int isa;
70 int mach;
71 };
72
73 #define MSP430_ISA_11 11
74 #define MSP430_ISA_12 12
75 #define MSP430_ISA_13 13
76 #define MSP430_ISA_14 14
77 #define MSP430_ISA_41 41
78 #define MSP430_ISA_31 31
79 #define MSP430_ISA_32 32
80 #define MSP430_ISA_33 33
81 #define MSP430_ISA_110 110
82 #define MSP430_ISA_43 43
83 #define MSP430_ISA_44 44
84 #define MSP430_ISA_15 15
85 #define MSP430_ISA_16 16
86
87 #define CHECK_RELOC_MSP430 ((imm_op || byte_op)?BFD_RELOC_MSP430_16_BYTE:BFD_RELOC_MSP430_16)
88 #define CHECK_RELOC_MSP430_PCREL ((imm_op || byte_op)?BFD_RELOC_MSP430_16_PCREL_BYTE:BFD_RELOC_MSP430_16_PCREL)
89
90 static struct mcu_type_s mcu_types[] =
91 {
92 {"msp1", MSP430_ISA_11, bfd_mach_msp11},
93 {"msp2", MSP430_ISA_14, bfd_mach_msp14},
94 {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
95 {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
96 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
97 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
98 {"msp430x1222",MSP430_ISA_12, bfd_mach_msp12},
99 {"msp430x1122",MSP430_ISA_11, bfd_mach_msp110},
100 {"msp430x1132",MSP430_ISA_11, bfd_mach_msp110},
101 {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
102 {"msp430x1232",MSP430_ISA_12, bfd_mach_msp12},
103 {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
104 {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
105 {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
106 {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
107 {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
108 {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
109 {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
110 {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
111 {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
112 {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
113 {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
114 {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
115 {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
116 {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
117 {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
118 {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
119 {"msp430x1101",MSP430_ISA_110, bfd_mach_msp110},
120 {"msp430x1111",MSP430_ISA_110, bfd_mach_msp110},
121 {"msp430x1121",MSP430_ISA_110, bfd_mach_msp110},
122 {"msp430x1331",MSP430_ISA_13, bfd_mach_msp13},
123 {"msp430x1351",MSP430_ISA_13, bfd_mach_msp13},
124 {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
125 {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
126 {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
127 {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
128 {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
129 {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
130 {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
131 {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
132 {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
133 {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
134 {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
135 {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
136
137 {NULL, 0, 0}
138 };
139
140
141 static struct mcu_type_s default_mcu =
142 { "msp430x11", MSP430_ISA_11, bfd_mach_msp11 };
143
144 static struct mcu_type_s *msp430_mcu = &default_mcu;
145
146 const pseudo_typeS md_pseudo_table[] =
147 {
148 {"arch", msp430_set_arch, 0},
149 {NULL, NULL, 0}
150 };
151
152 #define OPTION_MMCU 'm'
153
154 const char *md_shortopts = "m:";
155
156 struct option md_longopts[] =
157 {
158 {"mmcu", required_argument, NULL, OPTION_MMCU},
159 {NULL, no_argument, NULL, 0}
160 };
161
162 size_t md_longopts_size = sizeof (md_longopts);
163
164 static void
165 show_mcu_list (stream)
166 FILE *stream;
167 {
168 int i;
169
170 fprintf (stream, _("Known MCU names:\n"));
171
172 for (i = 0; mcu_types[i].name; i++)
173 fprintf (stream, _("\t %s\n"), mcu_types[i].name);
174
175 fprintf (stream, "\n");
176 }
177
178 void
179 md_show_usage (stream)
180 FILE *stream;
181 {
182 fprintf (stream,
183 _("MSP430 options:\n"
184 " -mmcu=[msp430-name] select microcontroller type\n"
185 " msp430x110 msp430x112\n"
186 " msp430x1101 msp430x1111\n"
187 " msp430x1121 msp430x1122 msp430x1132\n"
188 " msp430x122 msp430x123\n"
189 " msp430x1331 msp430x1351\n"
190 " msp430x147 msp430x148 msp430x149\n"
191 " msp430x155 msp430x156 msp430x157\n"
192 " msp430x167 msp430x168 msp430x169\n"
193 " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
194 " msp430x323 msp430x325\n"
195 " msp430x336 msp430x337\n"
196 " msp430x412 msp430x413\n"
197 " msp430x435 msp430x436 msp430x437\n"
198 " msp430x447 msp430x448 msp430x449\n"));
199
200 show_mcu_list (stream);
201 }
202
203 static char *
204 extract_word (char *from, char *to, int limit)
205 {
206 char *op_start;
207 char *op_end;
208 int size = 0;
209
210 /* Drop leading whitespace. */
211 from = skip_space (from);
212 *to = 0;
213
214 /* Find the op code end. */
215 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
216 {
217 to[size++] = *op_end++;
218 if (size + 1 >= limit)
219 break;
220 }
221
222 to[size] = 0;
223 return op_end;
224 }
225
226 static void
227 msp430_set_arch (dummy)
228 int dummy ATTRIBUTE_UNUSED;
229 {
230 char *str = (char *) alloca (32); /* 32 for good measure. */
231
232 input_line_pointer = extract_word (input_line_pointer, str, 32);
233
234 md_parse_option (OPTION_MMCU, str);
235 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
236 }
237
238 int
239 md_parse_option (c, arg)
240 int c;
241 char *arg;
242 {
243 int i;
244
245 switch (c)
246 {
247 case OPTION_MMCU:
248 for (i = 0; mcu_types[i].name; ++i)
249 if (strcmp (mcu_types[i].name, arg) == 0)
250 break;
251
252 if (!mcu_types[i].name)
253 {
254 show_mcu_list (stderr);
255 as_fatal (_("unknown MCU: %s\n"), arg);
256 }
257
258 if (msp430_mcu == &default_mcu || msp430_mcu->mach == mcu_types[i].mach)
259 msp430_mcu = &mcu_types[i];
260 else
261 as_fatal (_("redefinition of mcu type %s' to %s'"),
262 msp430_mcu->name, mcu_types[i].name);
263 return 1;
264 }
265
266 return 0;
267 }
268
269 symbolS *
270 md_undefined_symbol (name)
271 char *name ATTRIBUTE_UNUSED;
272 {
273 return 0;
274 }
275
276 static inline char *
277 skip_space (s)
278 char *s;
279 {
280 while (ISSPACE (*s))
281 ++s;
282 return s;
283 }
284
285 /* Delete spaces from s: X ( r 1 2) => X(r12). */
286
287 static void
288 del_spaces (s)
289 char *s;
290 {
291 while (*s)
292 {
293 if (ISSPACE (*s))
294 {
295 char *m = s + 1;
296
297 while (ISSPACE (*m) && *m)
298 m++;
299 memmove (s, m, strlen (m) + 1);
300 }
301 else
302 s++;
303 }
304 }
305
306 /* Extract one word from FROM and copy it to TO. Delimeters are ",;\n" */
307
308 static char *
309 extract_operand (char *from, char *to, int limit)
310 {
311 int size = 0;
312
313 /* Drop leading whitespace. */
314 from = skip_space (from);
315
316 while (size < limit && *from)
317 {
318 *(to + size) = *from;
319 if (*from == ',' || *from == ';' || *from == '\n')
320 break;
321 from++;
322 size++;
323 }
324
325 *(to + size) = 0;
326 del_spaces (to);
327
328 from++;
329
330 return from;
331 }
332
333 static char *
334 extract_cmd (char *from, char *to, int limit)
335 {
336 int size = 0;
337
338 while (*from && ! ISSPACE (*from) && *from != '.' && limit > size)
339 {
340 *(to + size) = *from;
341 from++;
342 size++;
343 }
344
345 *(to + size) = 0;
346
347 return from;
348 }
349
350 /* Turn a string in input_line_pointer into a floating point constant
351 of type TYPE, and store the appropriate bytes in *LITP. The number
352 of LITTLENUMS emitted is stored in *SIZEP. An error message is
353 returned, or NULL on OK. */
354
355 char *
356 md_atof (type, litP, sizeP)
357 int type;
358 char *litP;
359 int *sizeP;
360 {
361 int prec;
362 LITTLENUM_TYPE words[4];
363 LITTLENUM_TYPE *wordP;
364 char *t;
365
366 switch (type)
367 {
368 case 'f':
369 prec = 2;
370 break;
371 case 'd':
372 prec = 4;
373 break;
374 default:
375 *sizeP = 0;
376 return _("bad call to md_atof");
377 }
378
379 t = atof_ieee (input_line_pointer, type, words);
380 if (t)
381 input_line_pointer = t;
382
383 *sizeP = prec * sizeof (LITTLENUM_TYPE);
384
385 /* This loop outputs the LITTLENUMs in REVERSE order. */
386 for (wordP = words + prec - 1; prec--;)
387 {
388 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
389 litP += sizeof (LITTLENUM_TYPE);
390 }
391
392 return NULL;
393 }
394
395 void
396 md_convert_frag (abfd, sec, fragP)
397 bfd *abfd ATTRIBUTE_UNUSED;
398 asection *sec ATTRIBUTE_UNUSED;
399 fragS *fragP ATTRIBUTE_UNUSED;
400 {
401 abort ();
402 }
403
404 void
405 md_begin ()
406 {
407 struct msp430_opcode_s *opcode;
408 msp430_hash = hash_new ();
409
410 for (opcode = msp430_opcodes; opcode->name; opcode++)
411 hash_insert (msp430_hash, opcode->name, (char *) opcode);
412
413 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
414 }
415
416 void
417 md_assemble (str)
418 char *str;
419 {
420 struct msp430_opcode_s *opcode;
421 char cmd[32];
422 unsigned int i = 0;
423
424 str = skip_space (str); /* Skip leading spaces. */
425 str = extract_cmd (str, cmd, sizeof (cmd));
426
427 while (cmd[i] && i < sizeof (cmd))
428 {
429 char a = TOLOWER (cmd[i]);
430 cmd[i] = a;
431 i++;
432 }
433
434 if (!cmd[0])
435 {
436 as_bad (_("can't find opcode "));
437 return;
438 }
439
440 opcode = (struct msp430_opcode_s *) hash_find (msp430_hash, cmd);
441
442 if (opcode == NULL)
443 {
444 as_bad (_("unknown opcode `%s'"), cmd);
445 return;
446 }
447
448 {
449 char *__t = input_line_pointer;
450 msp430_operands (opcode, str);
451 input_line_pointer = __t;
452 }
453 }
454
455 /* Parse instruction operands.
456 Return binary opcode. */
457
458 static unsigned int
459 msp430_operands (opcode, line)
460 struct msp430_opcode_s *opcode;
461 char *line;
462 {
463 int bin = opcode->bin_opcode; /* opcode mask. */
464 int __is;
465 char l1[MAX_OP_LEN], l2[MAX_OP_LEN];
466 char *frag;
467 int where;
468 struct msp430_operand_s op1, op2;
469 int res = 0;
470 static short ZEROS = 0;
471 int byte_op, imm_op;
472
473 /* opcode is the one from opcodes table
474 line contains something like
475 [.w] @r2+, 5(R1)
476 or
477 .b @r2+, 5(R1). */
478
479 /* Check if byte or word operation. */
480 if (*line == '.' && TOLOWER (*(line + 1)) == 'b')
481 {
482 bin |= BYTE_OPERATION;
483 byte_op = 1;
484 }
485 else
486 byte_op = 0;
487
488 /* skip .[bwBW]. */
489 while (! ISSPACE (*line) && *line)
490 line++;
491
492 if (opcode->insn_opnumb && (!*line || *line == '\n'))
493 {
494 as_bad (_("instruction %s requires %d operand(s)"),
495 opcode->name, opcode->insn_opnumb);
496 return 0;
497 }
498
499 memset (l1, 0, sizeof (l1));
500 memset (l2, 0, sizeof (l2));
501 memset (&op1, 0, sizeof (op1));
502 memset (&op2, 0, sizeof (op2));
503
504 imm_op = 0;
505
506 switch (opcode->fmt)
507 {
508 case 0: /* Emulated. */
509 switch (opcode->insn_opnumb)
510 {
511 case 0:
512 /* Set/clear bits instructions. */
513 __is = 2;
514 frag = frag_more (__is);
515 bfd_putl16 ((bfd_vma) bin, frag);
516 break;
517 case 1:
518 /* Something which works with destination operand. */
519 line = extract_operand (line, l1, sizeof (l1));
520 res = msp430_dstoperand (&op1, l1, opcode->bin_opcode);
521 if (res)
522 break;
523
524 bin |= (op1.reg | (op1.am << 7));
525 __is = 1 + op1.ol;
526 frag = frag_more (2 * __is);
527 where = frag - frag_now->fr_literal;
528 bfd_putl16 ((bfd_vma) bin, frag);
529
530 if (op1.mode == OP_EXP)
531 {
532 where += 2;
533 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
534
535 if (op1.reg)
536 fix_new_exp (frag_now, where, 2,
537 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
538 else
539 fix_new_exp (frag_now, where, 2,
540 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
541 }
542 break;
543
544 case 2:
545 {
546 char l2[16];
547
548 /* Shift instruction. */
549 line = extract_operand (line, l1, sizeof (l1));
550 strncpy (l2, l1, 16);
551 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
552 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
553
554 if (res)
555 break; /* An error occured. All warnings were done before. */
556
557 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
558
559 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
560 frag = frag_more (2 * __is);
561 where = frag - frag_now->fr_literal;
562 bfd_putl16 ((bfd_vma) bin, frag);
563
564 if (op1.mode == OP_EXP)
565 {
566 where += 2; /* Advance 'where' as we do not know _where_. */
567 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
568
569 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
570 fix_new_exp (frag_now, where, 2,
571 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
572 else
573 fix_new_exp (frag_now, where, 2,
574 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
575 }
576
577 if (op2.mode == OP_EXP)
578 {
579 imm_op = 0;
580 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
581
582 if (op2.reg) /* Not PC relative. */
583 fix_new_exp (frag_now, where + 2, 2,
584 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
585 else
586 fix_new_exp (frag_now, where + 2, 2,
587 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
588 }
589 break;
590 }
591 case 3:
592 /* Branch instruction => mov dst, r0. */
593 line = extract_operand (line, l1, sizeof (l1));
594
595 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
596 if (res)
597 break;
598
599 byte_op = 0;
600 imm_op = 0;
601
602 bin |= ((op1.reg << 8) | (op1.am << 4));
603 __is = 1 + op1.ol;
604 frag = frag_more (2 * __is);
605 where = frag - frag_now->fr_literal;
606 bfd_putl16 ((bfd_vma) bin, frag);
607
608 if (op1.mode == OP_EXP)
609 {
610 where += 2;
611 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
612
613 if (op1.reg || (op1.reg == 0 && op1.am == 3))
614 fix_new_exp (frag_now, where, 2,
615 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
616 else
617 fix_new_exp (frag_now, where, 2,
618 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
619 }
620 break;
621 }
622 break;
623
624 case 1: /* Format 1, double operand. */
625 line = extract_operand (line, l1, sizeof (l1));
626 line = extract_operand (line, l2, sizeof (l2));
627 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
628 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
629
630 if (res)
631 break; /* Error occured. All warnings were done before. */
632
633 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
634
635 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
636 frag = frag_more (2 * __is);
637 where = frag - frag_now->fr_literal;
638 bfd_putl16 ((bfd_vma) bin, frag);
639
640 if (op1.mode == OP_EXP)
641 {
642 where += 2; /* Advance where as we do not know _where_. */
643 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
644
645 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
646 fix_new_exp (frag_now, where, 2,
647 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
648 else
649 fix_new_exp (frag_now, where, 2,
650 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
651 }
652
653 if (op2.mode == OP_EXP)
654 {
655 imm_op = 0;
656 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
657
658 if (op2.reg) /* Not PC relative. */
659 fix_new_exp (frag_now, where + 2, 2,
660 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
661 else
662 fix_new_exp (frag_now, where + 2, 2,
663 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
664 }
665 break;
666
667 case 2: /* Single-operand mostly instr. */
668 if (opcode->insn_opnumb == 0)
669 {
670 /* reti instruction. */
671 frag = frag_more (2);
672 bfd_putl16 ((bfd_vma) bin, frag);
673 break;
674 }
675
676 line = extract_operand (line, l1, sizeof (l1));
677 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
678 if (res)
679 break; /* Error in operand. */
680
681 bin |= op1.reg | (op1.am << 4);
682 __is = 1 + op1.ol;
683 frag = frag_more (2 * __is);
684 where = frag - frag_now->fr_literal;
685 bfd_putl16 ((bfd_vma) bin, frag);
686
687 if (op1.mode == OP_EXP)
688 {
689 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
690
691 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
692 fix_new_exp (frag_now, where + 2, 2,
693 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
694 else
695 fix_new_exp (frag_now, where + 2, 2,
696 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
697 }
698 break;
699
700 case 3: /* Conditional jumps instructions. */
701 line = extract_operand (line, l1, sizeof (l1));
702 /* l1 is a label. */
703 if (l1[0])
704 {
705 char *m = l1;
706 expressionS exp;
707
708 if (*m == '$')
709 m++;
710
711 parse_exp (m, &exp);
712 frag = frag_more (2); /* Instr size is 1 word. */
713
714 /* In order to handle something like:
715
716 and #0x8000, r5
717 tst r5
718 jz 4 ; skip next 4 bytes
719 inv r5
720 inc r5
721 nop ; will jump here if r5 positive or zero
722
723 jCOND -n ;assumes jump n bytes backward:
724
725 mov r5,r6
726 jmp -2
727
728 is equial to:
729 lab:
730 mov r5,r6
731 jmp lab
732
733 jCOND $n ; jump from PC in either direction. */
734
735 if (exp.X_op == O_constant)
736 {
737 int x = exp.X_add_number;
738
739 if (x & 1)
740 {
741 as_warn (_("Even number required. Rounded to %d"), x + 1);
742 x++;
743 }
744
745 if ((*l1 == '$' && x > 0) || x < 0)
746 x -= 2;
747
748 x >>= 1;
749
750 if (x > 512 || x < -511)
751 {
752 as_bad (_("Wrong displacement %d"), x << 1);
753 break;
754 }
755
756 bin |= x & 0x3ff;
757 bfd_putl16 ((bfd_vma) bin, frag);
758 }
759 else if (exp.X_op == O_symbol && *l1 != '$')
760 {
761 where = frag - frag_now->fr_literal;
762 fix_new_exp (frag_now, where, 2,
763 &exp, TRUE, BFD_RELOC_MSP430_10_PCREL);
764
765 bfd_putl16 ((bfd_vma) bin, frag);
766 }
767 else if (*l1 == '$')
768 {
769 as_bad (_("instruction requires label sans '$'"));
770 break;
771 }
772 else
773 {
774 as_bad (_
775 ("instruction requires label or value in range -511:512"));
776 break;
777 }
778 }
779 else
780 {
781 as_bad (_("instruction requires label"));
782 break;
783 }
784 break;
785
786 default:
787 as_bad (_("Ilegal instruction or not implmented opcode."));
788 }
789
790 input_line_pointer = line;
791 return 0;
792 }
793
794 static int
795 msp430_dstoperand (op, l, bin)
796 struct msp430_operand_s *op;
797 char *l;
798 int bin;
799 {
800 int dummy;
801 int ret = msp430_srcoperand (op, l, bin, &dummy);
802 if (ret)
803 return ret;
804
805 if (op->am == 2)
806 {
807 char *__tl = "0";
808
809 op->mode = OP_EXP;
810 op->am = 1;
811 op->ol = 1;
812 parse_exp (__tl, &(op->exp));
813 if (op->exp.X_op != O_constant || op->exp.X_add_number != 0)
814 {
815 as_bad (_("Internal bug. Try to use 0(r%d) instead of @r%d"),
816 op->reg, op->reg);
817 return 1;
818 }
819 return 0;
820 }
821
822 if (op->am > 1)
823 {
824 as_bad (_
825 ("this addressing mode is not applicable for destination operand"));
826 return 1;
827 }
828 return 0;
829 }
830
831
832 static int
833 check_reg (t)
834 char *t;
835 {
836 /* If this is a reg numb, str 't' must be a number from 0 - 15. */
837
838 if (strlen (t) > 2 && *(t + 2) != '+')
839 return 1;
840
841 while (*t)
842 {
843 if ((*t < '0' || *t > '9') && *t != '+')
844 break;
845 t++;
846 }
847
848 if (*t)
849 return 1;
850
851 return 0;
852 }
853
854
855 static int
856 msp430_srcoperand (op, l, bin, imm_op)
857 struct msp430_operand_s *op;
858 char *l;
859 int bin;
860 int *imm_op;
861 {
862 char *__tl = l;
863
864 /* Check if an immediate #VALUE. The hash sign should be only at the beginning! */
865 if (*l == '#')
866 {
867 char *h = l;
868 int vshift = -1;
869 int rval = 0;
870
871 /* Check if there is:
872 llo(x) - least significant 16 bits, x &= 0xffff
873 lhi(x) - x = (x >> 16) & 0xffff,
874 hlo(x) - x = (x >> 32) & 0xffff,
875 hhi(x) - x = (x >> 48) & 0xffff
876 The value _MUST_ be constant expression: #hlo(1231231231). */
877
878 *imm_op = 1;
879
880 if (strncasecmp (h, "#llo(", 5) == 0)
881 {
882 vshift = 0;
883 rval = 3;
884 }
885 else if (strncasecmp (h, "#lhi(", 5) == 0)
886 {
887 vshift = 1;
888 rval = 3;
889 }
890 else if (strncasecmp (h, "#hlo(", 5) == 0)
891 {
892 vshift = 2;
893 rval = 3;
894 }
895 else if (strncasecmp (h, "#hhi(", 5) == 0)
896 {
897 vshift = 3;
898 rval = 3;
899 }
900 else if (strncasecmp (h, "#lo(", 4) == 0)
901 {
902 vshift = 0;
903 rval = 2;
904 }
905 else if (strncasecmp (h, "#hi(", 4) == 0)
906 {
907 vshift = 1;
908 rval = 2;
909 }
910
911 op->reg = 0; /* Reg PC. */
912 op->am = 3;
913 op->ol = 1; /* Immediate will follow an instruction. */
914 __tl = h + 1 + rval;
915 op->mode = OP_EXP;
916 parse_exp (__tl, &(op->exp));
917 if (op->exp.X_op == O_constant)
918 {
919 int x = op->exp.X_add_number;
920
921 if (vshift == 0)
922 {
923 x = x & 0xffff;
924 op->exp.X_add_number = x;
925 }
926 else if (vshift == 1)
927 {
928 x = (x >> 16) & 0xffff;
929 op->exp.X_add_number = x;
930 }
931 else if (vshift > 1)
932 {
933 if (x < 0)
934 op->exp.X_add_number = -1;
935 else
936 op->exp.X_add_number = 0; /* Nothing left. */
937 x = op->exp.X_add_number;
938 }
939
940 if (op->exp.X_add_number > 65535 || op->exp.X_add_number < -32768)
941 {
942 as_bad (_("value %ld out of range. Use #lo() or #hi()"), x);
943 return 1;
944 }
945
946 /* Now check constants. */
947 /* Substitude register mode with a constant generator if applicable. */
948
949 x = (short) x; /* Extend sign. */
950
951 if (x == 0)
952 {
953 op->reg = 3;
954 op->am = 0;
955 op->ol = 0;
956 op->mode = OP_REG;
957 }
958 else if (x == 1)
959 {
960 op->reg = 3;
961 op->am = 1;
962 op->ol = 0;
963 op->mode = OP_REG;
964 }
965 else if (x == 2)
966 {
967 op->reg = 3;
968 op->am = 2;
969 op->ol = 0;
970 op->mode = OP_REG;
971 }
972 else if (x == -1)
973 {
974 op->reg = 3;
975 op->am = 3;
976 op->ol = 0;
977 op->mode = OP_REG;
978 }
979 else if (x == 4)
980 {
981 #ifdef PUSH_1X_WORKAROUND
982 if (bin == 0x1200
983 && (msp430_mcu->isa == MSP430_ISA_11
984 || msp430_mcu->isa == MSP430_ISA_12
985 || msp430_mcu->isa == MSP430_ISA_13
986 || msp430_mcu->isa == MSP430_ISA_14))
987 {
988 /* Remove warning as confusing.
989 as_warn(_("Hardware push bug workaround")); */
990 }
991 else
992 #endif
993 {
994 op->reg = 2;
995 op->am = 2;
996 op->ol = 0;
997 op->mode = OP_REG;
998 }
999 }
1000 else if (x == 8)
1001 {
1002 #ifdef PUSH_1X_WORKAROUND
1003 if (bin == 0x1200
1004 && (msp430_mcu->isa == MSP430_ISA_11
1005 || msp430_mcu->isa == MSP430_ISA_12
1006 || msp430_mcu->isa == MSP430_ISA_13
1007 || msp430_mcu->isa == MSP430_ISA_14))
1008 {
1009 /* Remove warning as confusing.
1010 as_warn(_("Hardware push bug workaround")); */
1011 }
1012 else
1013 #endif
1014 {
1015 op->reg = 2;
1016 op->am = 3;
1017 op->ol = 0;
1018 op->mode = OP_REG;
1019 }
1020 }
1021 }
1022 else if (op->exp.X_op == O_symbol)
1023 {
1024 op->mode = OP_EXP;
1025 }
1026 else if (op->exp.X_op == O_big)
1027 {
1028 short x;
1029 if (vshift != -1)
1030 {
1031 op->exp.X_op = O_constant;
1032 op->exp.X_add_number = 0xffff & generic_bignum[vshift];
1033 x = op->exp.X_add_number;
1034 }
1035 else
1036 {
1037 as_bad (_
1038 ("unknown expression in operand %s. use #llo() #lhi() #hlo() #hhi() "),
1039 l);
1040 return 1;
1041 }
1042
1043 if (x == 0)
1044 {
1045 op->reg = 3;
1046 op->am = 0;
1047 op->ol = 0;
1048 op->mode = OP_REG;
1049 }
1050 else if (x == 1)
1051 {
1052 op->reg = 3;
1053 op->am = 1;
1054 op->ol = 0;
1055 op->mode = OP_REG;
1056 }
1057 else if (x == 2)
1058 {
1059 op->reg = 3;
1060 op->am = 2;
1061 op->ol = 0;
1062 op->mode = OP_REG;
1063 }
1064 else if (x == -1)
1065 {
1066 op->reg = 3;
1067 op->am = 3;
1068 op->ol = 0;
1069 op->mode = OP_REG;
1070 }
1071 else if (x == 4)
1072 {
1073 op->reg = 2;
1074 op->am = 2;
1075 op->ol = 0;
1076 op->mode = OP_REG;
1077 }
1078 else if (x == 8)
1079 {
1080 op->reg = 2;
1081 op->am = 3;
1082 op->ol = 0;
1083 op->mode = OP_REG;
1084 }
1085 }
1086 else
1087 {
1088 as_bad (_("unknown operand %s"), l);
1089 }
1090 return 0;
1091 }
1092
1093 /* Check if absolute &VALUE (assume that we can construct something like ((a&b)<<7 + 25). */
1094 if (*l == '&')
1095 {
1096 char *h = l;
1097
1098 op->reg = 2; /* reg 2 in absolute addr mode. */
1099 op->am = 1; /* mode As == 01 bin. */
1100 op->ol = 1; /* Immediate value followed by instruction. */
1101 __tl = h + 1;
1102 parse_exp (__tl, &(op->exp));
1103 op->mode = OP_EXP;
1104 if (op->exp.X_op == O_constant)
1105 {
1106 int x = op->exp.X_add_number;
1107 if (x > 65535 || x < -32768)
1108 {
1109 as_bad (_("value out of range: %d"), x);
1110 return 1;
1111 }
1112 }
1113 else if (op->exp.X_op == O_symbol)
1114 {
1115 }
1116 else
1117 {
1118 as_bad (_("unknown expression in operand %s"), l);
1119 return 1;
1120 }
1121 return 0;
1122 }
1123
1124 /* Check if inderect register mode @Rn / postincrement @Rn+. */
1125 if (*l == '@')
1126 {
1127 char *t = l;
1128 char *m = strchr (l, '+');
1129
1130 if (t != l)
1131 {
1132 as_bad (_("unknown addressing mode %s"), l);
1133 return 1;
1134 }
1135
1136 t++;
1137 if (*t != 'r' && *t != 'R')
1138 {
1139 as_bad (_("unknown addressing mode %s"), l);
1140 return 1;
1141 }
1142
1143 t++; /* Points to the reg value. */
1144
1145 if (check_reg (t))
1146 {
1147 as_bad (_("Bad register name r%s"), t);
1148 return 1;
1149 }
1150
1151 op->mode = OP_REG;
1152 op->am = m ? 3 : 2;
1153 op->ol = 0;
1154 if (m)
1155 *m = 0; /* strip '+' */
1156 op->reg = atoi (t);
1157 if (op->reg < 0 || op->reg > 15)
1158 {
1159 as_bad (_("MSP430 does not have %d registers"), op->reg);
1160 return 1;
1161 }
1162
1163 return 0;
1164 }
1165
1166 /* Check if register indexed X(Rn). */
1167 do
1168 {
1169 char *h = strrchr (l, '(');
1170 char *m = strrchr (l, ')');
1171 char *t;
1172
1173 *imm_op = 1;
1174
1175 if (!h)
1176 break;
1177 if (!m)
1178 {
1179 as_bad (_("')' required"));
1180 return 1;
1181 }
1182
1183 t = h;
1184 op->am = 1;
1185 op->ol = 1;
1186 /* Extract a register. */
1187 t++; /* Advance pointer. */
1188
1189 if (*t != 'r' && *t != 'R')
1190 {
1191 as_bad (_
1192 ("unknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?"),
1193 l);
1194 return 1;
1195 }
1196 t++;
1197
1198 op->reg = *t - '0';
1199 if (op->reg > 9 || op->reg < 0)
1200 {
1201 as_bad (_("unknown operator (r%s substituded as a register name"),
1202 t);
1203 return 1;
1204 }
1205 t++;
1206 if (*t != ')')
1207 {
1208 op->reg = op->reg * 10;
1209 op->reg += *t - '0';
1210
1211 if (op->reg > 15)
1212 {
1213 as_bad (_("unknown operator %s"), l);
1214 return 1;
1215 }
1216 if (op->reg == 2)
1217 {
1218 as_bad (_("r2 should not be used in indexed addressing mode"));
1219 return 1;
1220 }
1221
1222 if (*(t + 1) != ')')
1223 {
1224 as_bad (_("unknown operator %s"), l);
1225 return 1;
1226 }
1227 }
1228
1229 /* Extract constant. */
1230 __tl = l;
1231 *h = 0;
1232 op->mode = OP_EXP;
1233 parse_exp (__tl, &(op->exp));
1234 if (op->exp.X_op == O_constant)
1235 {
1236 int x = op->exp.X_add_number;
1237
1238 if (x > 65535 || x < -32768)
1239 {
1240 as_bad (_("value out of range: %d"), x);
1241 return 1;
1242 }
1243
1244 if (x == 0)
1245 {
1246 op->mode = OP_REG;
1247 op->am = 2;
1248 op->ol = 0;
1249 return 0;
1250 }
1251 }
1252 else if (op->exp.X_op == O_symbol)
1253 {
1254 }
1255 else
1256 {
1257 as_bad (_("unknown expression in operand %s"), l);
1258 return 1;
1259 }
1260
1261 return 0;
1262 }
1263 while (0);
1264
1265 /* Register mode 'mov r1,r2'. */
1266 do
1267 {
1268 char *t = l;
1269
1270 /* Operand should be a register. */
1271 if (*t == 'r' || *t == 'R')
1272 {
1273 int x = atoi (t + 1);
1274
1275 if (check_reg (t + 1))
1276 break;
1277
1278 if (x < 0 || x > 15)
1279 break; /* Symbolic mode. */
1280
1281 op->mode = OP_REG;
1282 op->am = 0;
1283 op->ol = 0;
1284 op->reg = x;
1285 return 0;
1286 }
1287 }
1288 while (0);
1289
1290 /* Symbolic mode 'mov a, b' == 'mov x(pc), y(pc)'. */
1291 do
1292 {
1293 char *t = l;
1294
1295 __tl = l;
1296
1297 while (*t)
1298 {
1299 /* alpha/number underline dot for labels. */
1300 if (! ISALNUM (*t) && *t != '_' && *t != '.')
1301 {
1302 as_bad (_("unknown operand %s"), l);
1303 return 1;
1304 }
1305 t++;
1306 }
1307
1308 op->mode = OP_EXP;
1309 op->reg = 0; /* PC relative... be careful. */
1310 op->am = 1;
1311 op->ol = 1;
1312 __tl = l;
1313 parse_exp (__tl, &(op->exp));
1314 return 0;
1315 }
1316 while (0);
1317
1318 /* Unreachable. */
1319 as_bad (_("unknown addressing mode for operand %s"), l);
1320 return 1;
1321 }
1322
1323
1324 /* GAS will call this function for each section at the end of the assembly,
1325 to permit the CPU backend to adjust the alignment of a section. */
1326
1327 valueT
1328 md_section_align (seg, addr)
1329 asection *seg;
1330 valueT addr;
1331 {
1332 int align = bfd_get_section_alignment (stdoutput, seg);
1333
1334 return ((addr + (1 << align) - 1) & (-1 << align));
1335 }
1336
1337 /* If you define this macro, it should return the offset between the
1338 address of a PC relative fixup and the position from which the PC
1339 relative adjustment should be made. On many processors, the base
1340 of a PC relative instruction is the next instruction, so this
1341 macro would return the length of an instruction. */
1342
1343 long
1344 md_pcrel_from_section (fixp, sec)
1345 fixS *fixp;
1346 segT sec;
1347 {
1348 if (fixp->fx_addsy != (symbolS *) NULL
1349 && (!S_IS_DEFINED (fixp->fx_addsy)
1350 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1351 return 0;
1352
1353 return fixp->fx_frag->fr_address + fixp->fx_where;
1354 }
1355
1356 /* GAS will call this for each fixup. It should store the correct
1357 value in the object file. */
1358
1359 void
1360 md_apply_fix3 (fixp, valuep, seg)
1361 fixS *fixp;
1362 valueT *valuep;
1363 segT seg;
1364 {
1365 unsigned char *where;
1366 unsigned long insn;
1367 long value;
1368
1369 if (fixp->fx_addsy == (symbolS *) NULL)
1370 {
1371 value = *valuep;
1372 fixp->fx_done = 1;
1373 }
1374 else if (fixp->fx_pcrel)
1375 {
1376 segT s = S_GET_SEGMENT (fixp->fx_addsy);
1377
1378 if (fixp->fx_addsy && (s == seg || s == absolute_section))
1379 {
1380 value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
1381 fixp->fx_done = 1;
1382 }
1383 else
1384 value = *valuep;
1385 }
1386 else
1387 {
1388 value = fixp->fx_offset;
1389
1390 if (fixp->fx_subsy != (symbolS *) NULL)
1391 {
1392 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1393 {
1394 value -= S_GET_VALUE (fixp->fx_subsy);
1395 fixp->fx_done = 1;
1396 }
1397 else
1398 {
1399 /* We don't actually support subtracting a symbol. */
1400 as_bad_where (fixp->fx_file, fixp->fx_line,
1401 _("expression too complex"));
1402 }
1403 }
1404 }
1405
1406 switch (fixp->fx_r_type)
1407 {
1408 default:
1409 fixp->fx_no_overflow = 1;
1410 break;
1411 case BFD_RELOC_MSP430_10_PCREL:
1412 break;
1413 }
1414
1415 if (fixp->fx_done)
1416 {
1417 /* Fetch the instruction, insert the fully resolved operand
1418 value, and stuff the instruction back again. */
1419
1420 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1421
1422 insn = bfd_getl16 (where);
1423
1424 switch (fixp->fx_r_type)
1425 {
1426 case BFD_RELOC_MSP430_10_PCREL:
1427 if (value & 1)
1428 as_bad_where (fixp->fx_file, fixp->fx_line,
1429 _("odd address operand: %ld"), value);
1430
1431 /* Jumps are in words. */
1432 value >>= 1;
1433 --value; /* Correct PC. */
1434
1435 if (value < -512 || value > 511)
1436 as_bad_where (fixp->fx_file, fixp->fx_line,
1437 _("operand out of range: %ld"), value);
1438
1439 value &= 0x3ff; /* get rid of extended sign */
1440 bfd_putl16 ((bfd_vma) (value | insn), where);
1441 break;
1442
1443 case BFD_RELOC_MSP430_16_PCREL:
1444 if (value & 1)
1445 as_bad_where (fixp->fx_file, fixp->fx_line,
1446 _("odd address operand: %ld"), value);
1447
1448 /* Nothing to be corrected here. */
1449 if (value < -32768 || value > 65536)
1450 as_bad_where (fixp->fx_file, fixp->fx_line,
1451 _("operand out of range: %ld"), value);
1452
1453 value &= 0xffff; /* Get rid of extended sign. */
1454 bfd_putl16 ((bfd_vma) value, where);
1455 break;
1456
1457 case BFD_RELOC_MSP430_16_PCREL_BYTE:
1458 /* Nothing to be corrected here. */
1459 if (value < -32768 || value > 65536)
1460 as_bad_where (fixp->fx_file, fixp->fx_line,
1461 _("operand out of range: %ld"), value);
1462
1463 value &= 0xffff; /* Get rid of extended sign. */
1464 bfd_putl16 ((bfd_vma) value, where);
1465 break;
1466
1467 case BFD_RELOC_32:
1468 bfd_putl16 ((bfd_vma) value, where);
1469 break;
1470
1471 case BFD_RELOC_MSP430_16:
1472 case BFD_RELOC_16:
1473 case BFD_RELOC_MSP430_16_BYTE:
1474 value &= 0xffff;
1475 bfd_putl16 ((bfd_vma) value, where);
1476 break;
1477
1478 default:
1479 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1480 fixp->fx_line, fixp->fx_r_type);
1481 break;
1482 }
1483 }
1484 else
1485 {
1486 fixp->fx_addnumber = value;
1487 }
1488 return;
1489 }
1490
1491 /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1492 will pass the resulting reloc to `bfd_install_relocation'. This
1493 currently works poorly, as `bfd_install_relocation' often does the
1494 wrong thing, and instances of `tc_gen_reloc' have been written to
1495 work around the problems, which in turns makes it difficult to fix
1496 `bfd_install_relocation'. */
1497
1498 /* If while processing a fixup, a reloc really needs to be created
1499 then it is done here. */
1500
1501 arelent *
1502 tc_gen_reloc (seg, fixp)
1503 asection *seg ATTRIBUTE_UNUSED;
1504 fixS *fixp;
1505 {
1506 arelent *reloc;
1507
1508 reloc = (arelent *) xmalloc (sizeof (arelent));
1509
1510 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1511 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1512
1513 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1514 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1515 if (reloc->howto == (reloc_howto_type *) NULL)
1516 {
1517 as_bad_where (fixp->fx_file, fixp->fx_line,
1518 _("reloc %d not supported by object file format"),
1519 (int) fixp->fx_r_type);
1520 return NULL;
1521 }
1522
1523 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1524 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1525 reloc->address = fixp->fx_offset;
1526
1527 reloc->addend = fixp->fx_offset;
1528
1529 return reloc;
1530 }
1531
1532 /* Parse ordinary expression. */
1533
1534 static char *
1535 parse_exp (s, op)
1536 char *s;
1537 expressionS *op;
1538 {
1539 input_line_pointer = s;
1540 expression (op);
1541 if (op->X_op == O_absent)
1542 as_bad (_("missing operand"));
1543 return input_line_pointer;
1544 }
1545
1546
1547 int
1548 md_estimate_size_before_relax (fragp, seg)
1549 fragS *fragp ATTRIBUTE_UNUSED;
1550 asection *seg ATTRIBUTE_UNUSED;
1551 {
1552 abort ();
1553 return 0;
1554 }
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