Add MSP430 variants
[deliverable/binutils-gdb.git] / gas / config / tc-msp430.c
1 /* tc-msp430.c -- Assembler code for the Texas Instruments MSP430
2
3 Copyright (C) 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Dmitry Diky <diwil@mail.ru>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include <stdio.h>
24 #include <string.h>
25 #include <stdlib.h>
26 #include <limits.h>
27
28 #define PUSH_1X_WORKAROUND
29 #include "as.h"
30 #include "subsegs.h"
31 #include "opcode/msp430.h"
32 #include "safe-ctype.h"
33
34 const char comment_chars[] = ";";
35 const char line_comment_chars[] = "#";
36 const char line_separator_chars[] = "";
37 const char EXP_CHARS[] = "eE";
38 const char FLT_CHARS[] = "dD";
39
40 /* Handle long expressions. */
41 extern LITTLENUM_TYPE generic_bignum[];
42
43 static struct hash_control *msp430_hash;
44
45 static unsigned int msp430_operands
46 PARAMS ((struct msp430_opcode_s *, char *));
47 static int msp430_srcoperand
48 PARAMS ((struct msp430_operand_s *, char *, int, int *));
49 static int msp430_dstoperand
50 PARAMS ((struct msp430_operand_s *, char *, int));
51 static char *parse_exp
52 PARAMS ((char *, expressionS *));
53 static inline char *skip_space
54 PARAMS ((char *));
55 static int check_reg
56 PARAMS ((char *));
57 static void msp430_set_arch
58 PARAMS ((int));
59 static void show_mcu_list
60 PARAMS ((FILE *));
61 static void del_spaces
62 PARAMS ((char *));
63
64 #define MAX_OP_LEN 64
65
66 struct mcu_type_s
67 {
68 char *name;
69 int isa;
70 int mach;
71 };
72
73 #define MSP430_ISA_11 11
74 #define MSP430_ISA_110 110
75 #define MSP430_ISA_12 12
76 #define MSP430_ISA_13 13
77 #define MSP430_ISA_14 14
78 #define MSP430_ISA_15 15
79 #define MSP430_ISA_16 16
80 #define MSP430_ISA_31 31
81 #define MSP430_ISA_32 32
82 #define MSP430_ISA_33 33
83 #define MSP430_ISA_41 41
84 #define MSP430_ISA_42 42
85 #define MSP430_ISA_43 43
86 #define MSP430_ISA_44 44
87
88 #define CHECK_RELOC_MSP430 ((imm_op || byte_op)?BFD_RELOC_MSP430_16_BYTE:BFD_RELOC_MSP430_16)
89 #define CHECK_RELOC_MSP430_PCREL ((imm_op || byte_op)?BFD_RELOC_MSP430_16_PCREL_BYTE:BFD_RELOC_MSP430_16_PCREL)
90
91 static struct mcu_type_s mcu_types[] =
92 {
93 {"msp1", MSP430_ISA_11, bfd_mach_msp11},
94 {"msp2", MSP430_ISA_14, bfd_mach_msp14},
95 {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
96 {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
97 {"msp430x1101",MSP430_ISA_110, bfd_mach_msp110},
98 {"msp430x1111",MSP430_ISA_110, bfd_mach_msp110},
99 {"msp430x1121",MSP430_ISA_110, bfd_mach_msp110},
100 {"msp430x1122",MSP430_ISA_11, bfd_mach_msp110},
101 {"msp430x1132",MSP430_ISA_11, bfd_mach_msp110},
102
103 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
104 {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
105 {"msp430x1222",MSP430_ISA_12, bfd_mach_msp12},
106 {"msp430x1232",MSP430_ISA_12, bfd_mach_msp12},
107
108 {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
109 {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
110 {"msp430x1331",MSP430_ISA_13, bfd_mach_msp13},
111 {"msp430x1351",MSP430_ISA_13, bfd_mach_msp13},
112 {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
113 {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
114 {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
115
116 {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
117 {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
118 {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
119 {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
120 {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
121 {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
122
123 {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
124 {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
125 {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
126 {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
127 {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
128 {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
129 {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
130 {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
131 {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
132
133 {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
134 {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
135
136 {"msp430xE423", MSP430_ISA_42, bfd_mach_msp42},
137 {"msp430xE425", MSP430_ISA_42, bfd_mach_msp42},
138 {"msp430xE427", MSP430_ISA_42, bfd_mach_msp42},
139 {"msp430xW423", MSP430_ISA_42, bfd_mach_msp42},
140 {"msp430xW425", MSP430_ISA_42, bfd_mach_msp42},
141 {"msp430xW427", MSP430_ISA_42, bfd_mach_msp42},
142
143 {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
144 {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
145 {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
146 {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
147 {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
148 {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
149
150 {NULL, 0, 0}
151 };
152
153
154 static struct mcu_type_s default_mcu =
155 { "msp430x11", MSP430_ISA_11, bfd_mach_msp11 };
156
157 static struct mcu_type_s *msp430_mcu = &default_mcu;
158
159 const pseudo_typeS md_pseudo_table[] =
160 {
161 {"arch", msp430_set_arch, 0},
162 {NULL, NULL, 0}
163 };
164
165 #define OPTION_MMCU 'm'
166
167 const char *md_shortopts = "m:";
168
169 struct option md_longopts[] =
170 {
171 {"mmcu", required_argument, NULL, OPTION_MMCU},
172 {NULL, no_argument, NULL, 0}
173 };
174
175 size_t md_longopts_size = sizeof (md_longopts);
176
177 static void
178 show_mcu_list (stream)
179 FILE *stream;
180 {
181 int i;
182
183 fprintf (stream, _("Known MCU names:\n"));
184
185 for (i = 0; mcu_types[i].name; i++)
186 fprintf (stream, _("\t %s\n"), mcu_types[i].name);
187
188 fprintf (stream, "\n");
189 }
190
191 void
192 md_show_usage (stream)
193 FILE *stream;
194 {
195 fprintf (stream,
196 _("MSP430 options:\n"
197 " -mmcu=[msp430-name] select microcontroller type\n"
198 " msp430x110 msp430x112\n"
199 " msp430x1101 msp430x1111\n"
200 " msp430x1121 msp430x1122 msp430x1132\n"
201 " msp430x122 msp430x123\n"
202 " msp430x1222 msp430x1232\n"
203 " msp430x133 msp430x135\n"
204 " msp430x1331 msp430x1351\n"
205 " msp430x147 msp430x148 msp430x149\n"
206 " msp430x155 msp430x156 msp430x157\n"
207 " msp430x167 msp430x168 msp430x169\n"
208 " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
209 " msp430x323 msp430x325\n"
210 " msp430x336 msp430x337\n"
211 " msp430x412 msp430x413\n"
212 " msp430xE423 msp430xE425 msp430E427\n"
213 " msp430xW423 msp430xW425 msp430W427\n"
214 " msp430x435 msp430x436 msp430x437\n"
215 " msp430x447 msp430x448 msp430x449\n"));
216
217 show_mcu_list (stream);
218 }
219
220 static char *
221 extract_word (char *from, char *to, int limit)
222 {
223 char *op_start;
224 char *op_end;
225 int size = 0;
226
227 /* Drop leading whitespace. */
228 from = skip_space (from);
229 *to = 0;
230
231 /* Find the op code end. */
232 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
233 {
234 to[size++] = *op_end++;
235 if (size + 1 >= limit)
236 break;
237 }
238
239 to[size] = 0;
240 return op_end;
241 }
242
243 static void
244 msp430_set_arch (dummy)
245 int dummy ATTRIBUTE_UNUSED;
246 {
247 char *str = (char *) alloca (32); /* 32 for good measure. */
248
249 input_line_pointer = extract_word (input_line_pointer, str, 32);
250
251 md_parse_option (OPTION_MMCU, str);
252 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
253 }
254
255 int
256 md_parse_option (c, arg)
257 int c;
258 char *arg;
259 {
260 int i;
261
262 switch (c)
263 {
264 case OPTION_MMCU:
265 for (i = 0; mcu_types[i].name; ++i)
266 if (strcmp (mcu_types[i].name, arg) == 0)
267 break;
268
269 if (!mcu_types[i].name)
270 {
271 show_mcu_list (stderr);
272 as_fatal (_("unknown MCU: %s\n"), arg);
273 }
274
275 if (msp430_mcu == &default_mcu || msp430_mcu->mach == mcu_types[i].mach)
276 msp430_mcu = &mcu_types[i];
277 else
278 as_fatal (_("redefinition of mcu type %s' to %s'"),
279 msp430_mcu->name, mcu_types[i].name);
280 return 1;
281 }
282
283 return 0;
284 }
285
286 symbolS *
287 md_undefined_symbol (name)
288 char *name ATTRIBUTE_UNUSED;
289 {
290 return 0;
291 }
292
293 static inline char *
294 skip_space (s)
295 char *s;
296 {
297 while (ISSPACE (*s))
298 ++s;
299 return s;
300 }
301
302 /* Delete spaces from s: X ( r 1 2) => X(r12). */
303
304 static void
305 del_spaces (s)
306 char *s;
307 {
308 while (*s)
309 {
310 if (ISSPACE (*s))
311 {
312 char *m = s + 1;
313
314 while (ISSPACE (*m) && *m)
315 m++;
316 memmove (s, m, strlen (m) + 1);
317 }
318 else
319 s++;
320 }
321 }
322
323 /* Extract one word from FROM and copy it to TO. Delimeters are ",;\n" */
324
325 static char *
326 extract_operand (char *from, char *to, int limit)
327 {
328 int size = 0;
329
330 /* Drop leading whitespace. */
331 from = skip_space (from);
332
333 while (size < limit && *from)
334 {
335 *(to + size) = *from;
336 if (*from == ',' || *from == ';' || *from == '\n')
337 break;
338 from++;
339 size++;
340 }
341
342 *(to + size) = 0;
343 del_spaces (to);
344
345 from++;
346
347 return from;
348 }
349
350 static char *
351 extract_cmd (char *from, char *to, int limit)
352 {
353 int size = 0;
354
355 while (*from && ! ISSPACE (*from) && *from != '.' && limit > size)
356 {
357 *(to + size) = *from;
358 from++;
359 size++;
360 }
361
362 *(to + size) = 0;
363
364 return from;
365 }
366
367 /* Turn a string in input_line_pointer into a floating point constant
368 of type TYPE, and store the appropriate bytes in *LITP. The number
369 of LITTLENUMS emitted is stored in *SIZEP. An error message is
370 returned, or NULL on OK. */
371
372 char *
373 md_atof (type, litP, sizeP)
374 int type;
375 char *litP;
376 int *sizeP;
377 {
378 int prec;
379 LITTLENUM_TYPE words[4];
380 LITTLENUM_TYPE *wordP;
381 char *t;
382
383 switch (type)
384 {
385 case 'f':
386 prec = 2;
387 break;
388 case 'd':
389 prec = 4;
390 break;
391 default:
392 *sizeP = 0;
393 return _("bad call to md_atof");
394 }
395
396 t = atof_ieee (input_line_pointer, type, words);
397 if (t)
398 input_line_pointer = t;
399
400 *sizeP = prec * sizeof (LITTLENUM_TYPE);
401
402 /* This loop outputs the LITTLENUMs in REVERSE order. */
403 for (wordP = words + prec - 1; prec--;)
404 {
405 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
406 litP += sizeof (LITTLENUM_TYPE);
407 }
408
409 return NULL;
410 }
411
412 void
413 md_convert_frag (abfd, sec, fragP)
414 bfd *abfd ATTRIBUTE_UNUSED;
415 asection *sec ATTRIBUTE_UNUSED;
416 fragS *fragP ATTRIBUTE_UNUSED;
417 {
418 abort ();
419 }
420
421 void
422 md_begin ()
423 {
424 struct msp430_opcode_s *opcode;
425 msp430_hash = hash_new ();
426
427 for (opcode = msp430_opcodes; opcode->name; opcode++)
428 hash_insert (msp430_hash, opcode->name, (char *) opcode);
429
430 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
431 }
432
433 void
434 md_assemble (str)
435 char *str;
436 {
437 struct msp430_opcode_s *opcode;
438 char cmd[32];
439 unsigned int i = 0;
440
441 str = skip_space (str); /* Skip leading spaces. */
442 str = extract_cmd (str, cmd, sizeof (cmd));
443
444 while (cmd[i] && i < sizeof (cmd))
445 {
446 char a = TOLOWER (cmd[i]);
447 cmd[i] = a;
448 i++;
449 }
450
451 if (!cmd[0])
452 {
453 as_bad (_("can't find opcode "));
454 return;
455 }
456
457 opcode = (struct msp430_opcode_s *) hash_find (msp430_hash, cmd);
458
459 if (opcode == NULL)
460 {
461 as_bad (_("unknown opcode `%s'"), cmd);
462 return;
463 }
464
465 {
466 char *__t = input_line_pointer;
467 msp430_operands (opcode, str);
468 input_line_pointer = __t;
469 }
470 }
471
472 /* Parse instruction operands.
473 Return binary opcode. */
474
475 static unsigned int
476 msp430_operands (opcode, line)
477 struct msp430_opcode_s *opcode;
478 char *line;
479 {
480 int bin = opcode->bin_opcode; /* opcode mask. */
481 int __is;
482 char l1[MAX_OP_LEN], l2[MAX_OP_LEN];
483 char *frag;
484 int where;
485 struct msp430_operand_s op1, op2;
486 int res = 0;
487 static short ZEROS = 0;
488 int byte_op, imm_op;
489
490 /* opcode is the one from opcodes table
491 line contains something like
492 [.w] @r2+, 5(R1)
493 or
494 .b @r2+, 5(R1). */
495
496 /* Check if byte or word operation. */
497 if (*line == '.' && TOLOWER (*(line + 1)) == 'b')
498 {
499 bin |= BYTE_OPERATION;
500 byte_op = 1;
501 }
502 else
503 byte_op = 0;
504
505 /* skip .[bwBW]. */
506 while (! ISSPACE (*line) && *line)
507 line++;
508
509 if (opcode->insn_opnumb && (!*line || *line == '\n'))
510 {
511 as_bad (_("instruction %s requires %d operand(s)"),
512 opcode->name, opcode->insn_opnumb);
513 return 0;
514 }
515
516 memset (l1, 0, sizeof (l1));
517 memset (l2, 0, sizeof (l2));
518 memset (&op1, 0, sizeof (op1));
519 memset (&op2, 0, sizeof (op2));
520
521 imm_op = 0;
522
523 switch (opcode->fmt)
524 {
525 case 0: /* Emulated. */
526 switch (opcode->insn_opnumb)
527 {
528 case 0:
529 /* Set/clear bits instructions. */
530 __is = 2;
531 frag = frag_more (__is);
532 bfd_putl16 ((bfd_vma) bin, frag);
533 break;
534 case 1:
535 /* Something which works with destination operand. */
536 line = extract_operand (line, l1, sizeof (l1));
537 res = msp430_dstoperand (&op1, l1, opcode->bin_opcode);
538 if (res)
539 break;
540
541 bin |= (op1.reg | (op1.am << 7));
542 __is = 1 + op1.ol;
543 frag = frag_more (2 * __is);
544 where = frag - frag_now->fr_literal;
545 bfd_putl16 ((bfd_vma) bin, frag);
546
547 if (op1.mode == OP_EXP)
548 {
549 where += 2;
550 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
551
552 if (op1.reg)
553 fix_new_exp (frag_now, where, 2,
554 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
555 else
556 fix_new_exp (frag_now, where, 2,
557 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
558 }
559 break;
560
561 case 2:
562 {
563 char l2[16];
564
565 /* Shift instruction. */
566 line = extract_operand (line, l1, sizeof (l1));
567 strncpy (l2, l1, 16);
568 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
569 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
570
571 if (res)
572 break; /* An error occured. All warnings were done before. */
573
574 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
575
576 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
577 frag = frag_more (2 * __is);
578 where = frag - frag_now->fr_literal;
579 bfd_putl16 ((bfd_vma) bin, frag);
580
581 if (op1.mode == OP_EXP)
582 {
583 where += 2; /* Advance 'where' as we do not know _where_. */
584 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
585
586 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
587 fix_new_exp (frag_now, where, 2,
588 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
589 else
590 fix_new_exp (frag_now, where, 2,
591 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
592 }
593
594 if (op2.mode == OP_EXP)
595 {
596 imm_op = 0;
597 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
598
599 if (op2.reg) /* Not PC relative. */
600 fix_new_exp (frag_now, where + 2, 2,
601 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
602 else
603 fix_new_exp (frag_now, where + 2, 2,
604 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
605 }
606 break;
607 }
608 case 3:
609 /* Branch instruction => mov dst, r0. */
610 line = extract_operand (line, l1, sizeof (l1));
611
612 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
613 if (res)
614 break;
615
616 byte_op = 0;
617 imm_op = 0;
618
619 bin |= ((op1.reg << 8) | (op1.am << 4));
620 __is = 1 + op1.ol;
621 frag = frag_more (2 * __is);
622 where = frag - frag_now->fr_literal;
623 bfd_putl16 ((bfd_vma) bin, frag);
624
625 if (op1.mode == OP_EXP)
626 {
627 where += 2;
628 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
629
630 if (op1.reg || (op1.reg == 0 && op1.am == 3))
631 fix_new_exp (frag_now, where, 2,
632 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
633 else
634 fix_new_exp (frag_now, where, 2,
635 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
636 }
637 break;
638 }
639 break;
640
641 case 1: /* Format 1, double operand. */
642 line = extract_operand (line, l1, sizeof (l1));
643 line = extract_operand (line, l2, sizeof (l2));
644 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
645 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
646
647 if (res)
648 break; /* Error occured. All warnings were done before. */
649
650 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
651
652 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
653 frag = frag_more (2 * __is);
654 where = frag - frag_now->fr_literal;
655 bfd_putl16 ((bfd_vma) bin, frag);
656
657 if (op1.mode == OP_EXP)
658 {
659 where += 2; /* Advance where as we do not know _where_. */
660 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
661
662 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
663 fix_new_exp (frag_now, where, 2,
664 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
665 else
666 fix_new_exp (frag_now, where, 2,
667 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
668 }
669
670 if (op2.mode == OP_EXP)
671 {
672 imm_op = 0;
673 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
674
675 if (op2.reg) /* Not PC relative. */
676 fix_new_exp (frag_now, where + 2, 2,
677 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
678 else
679 fix_new_exp (frag_now, where + 2, 2,
680 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
681 }
682 break;
683
684 case 2: /* Single-operand mostly instr. */
685 if (opcode->insn_opnumb == 0)
686 {
687 /* reti instruction. */
688 frag = frag_more (2);
689 bfd_putl16 ((bfd_vma) bin, frag);
690 break;
691 }
692
693 line = extract_operand (line, l1, sizeof (l1));
694 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
695 if (res)
696 break; /* Error in operand. */
697
698 bin |= op1.reg | (op1.am << 4);
699 __is = 1 + op1.ol;
700 frag = frag_more (2 * __is);
701 where = frag - frag_now->fr_literal;
702 bfd_putl16 ((bfd_vma) bin, frag);
703
704 if (op1.mode == OP_EXP)
705 {
706 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
707
708 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
709 fix_new_exp (frag_now, where + 2, 2,
710 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
711 else
712 fix_new_exp (frag_now, where + 2, 2,
713 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
714 }
715 break;
716
717 case 3: /* Conditional jumps instructions. */
718 line = extract_operand (line, l1, sizeof (l1));
719 /* l1 is a label. */
720 if (l1[0])
721 {
722 char *m = l1;
723 expressionS exp;
724
725 if (*m == '$')
726 m++;
727
728 parse_exp (m, &exp);
729 frag = frag_more (2); /* Instr size is 1 word. */
730
731 /* In order to handle something like:
732
733 and #0x8000, r5
734 tst r5
735 jz 4 ; skip next 4 bytes
736 inv r5
737 inc r5
738 nop ; will jump here if r5 positive or zero
739
740 jCOND -n ;assumes jump n bytes backward:
741
742 mov r5,r6
743 jmp -2
744
745 is equial to:
746 lab:
747 mov r5,r6
748 jmp lab
749
750 jCOND $n ; jump from PC in either direction. */
751
752 if (exp.X_op == O_constant)
753 {
754 int x = exp.X_add_number;
755
756 if (x & 1)
757 {
758 as_warn (_("Even number required. Rounded to %d"), x + 1);
759 x++;
760 }
761
762 if ((*l1 == '$' && x > 0) || x < 0)
763 x -= 2;
764
765 x >>= 1;
766
767 if (x > 512 || x < -511)
768 {
769 as_bad (_("Wrong displacement %d"), x << 1);
770 break;
771 }
772
773 bin |= x & 0x3ff;
774 bfd_putl16 ((bfd_vma) bin, frag);
775 }
776 else if (exp.X_op == O_symbol && *l1 != '$')
777 {
778 where = frag - frag_now->fr_literal;
779 fix_new_exp (frag_now, where, 2,
780 &exp, TRUE, BFD_RELOC_MSP430_10_PCREL);
781
782 bfd_putl16 ((bfd_vma) bin, frag);
783 }
784 else if (*l1 == '$')
785 {
786 as_bad (_("instruction requires label sans '$'"));
787 break;
788 }
789 else
790 {
791 as_bad (_
792 ("instruction requires label or value in range -511:512"));
793 break;
794 }
795 }
796 else
797 {
798 as_bad (_("instruction requires label"));
799 break;
800 }
801 break;
802
803 default:
804 as_bad (_("Ilegal instruction or not implmented opcode."));
805 }
806
807 input_line_pointer = line;
808 return 0;
809 }
810
811 static int
812 msp430_dstoperand (op, l, bin)
813 struct msp430_operand_s *op;
814 char *l;
815 int bin;
816 {
817 int dummy;
818 int ret = msp430_srcoperand (op, l, bin, &dummy);
819 if (ret)
820 return ret;
821
822 if (op->am == 2)
823 {
824 char *__tl = "0";
825
826 op->mode = OP_EXP;
827 op->am = 1;
828 op->ol = 1;
829 parse_exp (__tl, &(op->exp));
830 if (op->exp.X_op != O_constant || op->exp.X_add_number != 0)
831 {
832 as_bad (_("Internal bug. Try to use 0(r%d) instead of @r%d"),
833 op->reg, op->reg);
834 return 1;
835 }
836 return 0;
837 }
838
839 if (op->am > 1)
840 {
841 as_bad (_
842 ("this addressing mode is not applicable for destination operand"));
843 return 1;
844 }
845 return 0;
846 }
847
848
849 static int
850 check_reg (t)
851 char *t;
852 {
853 /* If this is a reg numb, str 't' must be a number from 0 - 15. */
854
855 if (strlen (t) > 2 && *(t + 2) != '+')
856 return 1;
857
858 while (*t)
859 {
860 if ((*t < '0' || *t > '9') && *t != '+')
861 break;
862 t++;
863 }
864
865 if (*t)
866 return 1;
867
868 return 0;
869 }
870
871
872 static int
873 msp430_srcoperand (op, l, bin, imm_op)
874 struct msp430_operand_s *op;
875 char *l;
876 int bin;
877 int *imm_op;
878 {
879 char *__tl = l;
880
881 /* Check if an immediate #VALUE. The hash sign should be only at the beginning! */
882 if (*l == '#')
883 {
884 char *h = l;
885 int vshift = -1;
886 int rval = 0;
887
888 /* Check if there is:
889 llo(x) - least significant 16 bits, x &= 0xffff
890 lhi(x) - x = (x >> 16) & 0xffff,
891 hlo(x) - x = (x >> 32) & 0xffff,
892 hhi(x) - x = (x >> 48) & 0xffff
893 The value _MUST_ be constant expression: #hlo(1231231231). */
894
895 *imm_op = 1;
896
897 if (strncasecmp (h, "#llo(", 5) == 0)
898 {
899 vshift = 0;
900 rval = 3;
901 }
902 else if (strncasecmp (h, "#lhi(", 5) == 0)
903 {
904 vshift = 1;
905 rval = 3;
906 }
907 else if (strncasecmp (h, "#hlo(", 5) == 0)
908 {
909 vshift = 2;
910 rval = 3;
911 }
912 else if (strncasecmp (h, "#hhi(", 5) == 0)
913 {
914 vshift = 3;
915 rval = 3;
916 }
917 else if (strncasecmp (h, "#lo(", 4) == 0)
918 {
919 vshift = 0;
920 rval = 2;
921 }
922 else if (strncasecmp (h, "#hi(", 4) == 0)
923 {
924 vshift = 1;
925 rval = 2;
926 }
927
928 op->reg = 0; /* Reg PC. */
929 op->am = 3;
930 op->ol = 1; /* Immediate will follow an instruction. */
931 __tl = h + 1 + rval;
932 op->mode = OP_EXP;
933 parse_exp (__tl, &(op->exp));
934 if (op->exp.X_op == O_constant)
935 {
936 int x = op->exp.X_add_number;
937
938 if (vshift == 0)
939 {
940 x = x & 0xffff;
941 op->exp.X_add_number = x;
942 }
943 else if (vshift == 1)
944 {
945 x = (x >> 16) & 0xffff;
946 op->exp.X_add_number = x;
947 }
948 else if (vshift > 1)
949 {
950 if (x < 0)
951 op->exp.X_add_number = -1;
952 else
953 op->exp.X_add_number = 0; /* Nothing left. */
954 x = op->exp.X_add_number;
955 }
956
957 if (op->exp.X_add_number > 65535 || op->exp.X_add_number < -32768)
958 {
959 as_bad (_("value %ld out of range. Use #lo() or #hi()"), x);
960 return 1;
961 }
962
963 /* Now check constants. */
964 /* Substitude register mode with a constant generator if applicable. */
965
966 x = (short) x; /* Extend sign. */
967
968 if (x == 0)
969 {
970 op->reg = 3;
971 op->am = 0;
972 op->ol = 0;
973 op->mode = OP_REG;
974 }
975 else if (x == 1)
976 {
977 op->reg = 3;
978 op->am = 1;
979 op->ol = 0;
980 op->mode = OP_REG;
981 }
982 else if (x == 2)
983 {
984 op->reg = 3;
985 op->am = 2;
986 op->ol = 0;
987 op->mode = OP_REG;
988 }
989 else if (x == -1)
990 {
991 op->reg = 3;
992 op->am = 3;
993 op->ol = 0;
994 op->mode = OP_REG;
995 }
996 else if (x == 4)
997 {
998 #ifdef PUSH_1X_WORKAROUND
999 if (bin == 0x1200)
1000 {
1001 /* Remove warning as confusing.
1002 as_warn(_("Hardware push bug workaround")); */
1003 }
1004 else
1005 #endif
1006 {
1007 op->reg = 2;
1008 op->am = 2;
1009 op->ol = 0;
1010 op->mode = OP_REG;
1011 }
1012 }
1013 else if (x == 8)
1014 {
1015 #ifdef PUSH_1X_WORKAROUND
1016 if (bin == 0x1200)
1017 {
1018 /* Remove warning as confusing.
1019 as_warn(_("Hardware push bug workaround")); */
1020 }
1021 else
1022 #endif
1023 {
1024 op->reg = 2;
1025 op->am = 3;
1026 op->ol = 0;
1027 op->mode = OP_REG;
1028 }
1029 }
1030 }
1031 else if (op->exp.X_op == O_symbol)
1032 {
1033 op->mode = OP_EXP;
1034 }
1035 else if (op->exp.X_op == O_big)
1036 {
1037 short x;
1038 if (vshift != -1)
1039 {
1040 op->exp.X_op = O_constant;
1041 op->exp.X_add_number = 0xffff & generic_bignum[vshift];
1042 x = op->exp.X_add_number;
1043 }
1044 else
1045 {
1046 as_bad (_
1047 ("unknown expression in operand %s. use #llo() #lhi() #hlo() #hhi() "),
1048 l);
1049 return 1;
1050 }
1051
1052 if (x == 0)
1053 {
1054 op->reg = 3;
1055 op->am = 0;
1056 op->ol = 0;
1057 op->mode = OP_REG;
1058 }
1059 else if (x == 1)
1060 {
1061 op->reg = 3;
1062 op->am = 1;
1063 op->ol = 0;
1064 op->mode = OP_REG;
1065 }
1066 else if (x == 2)
1067 {
1068 op->reg = 3;
1069 op->am = 2;
1070 op->ol = 0;
1071 op->mode = OP_REG;
1072 }
1073 else if (x == -1)
1074 {
1075 op->reg = 3;
1076 op->am = 3;
1077 op->ol = 0;
1078 op->mode = OP_REG;
1079 }
1080 else if (x == 4)
1081 {
1082 op->reg = 2;
1083 op->am = 2;
1084 op->ol = 0;
1085 op->mode = OP_REG;
1086 }
1087 else if (x == 8)
1088 {
1089 op->reg = 2;
1090 op->am = 3;
1091 op->ol = 0;
1092 op->mode = OP_REG;
1093 }
1094 }
1095 else
1096 {
1097 as_bad (_("unknown operand %s"), l);
1098 }
1099 return 0;
1100 }
1101
1102 /* Check if absolute &VALUE (assume that we can construct something like ((a&b)<<7 + 25). */
1103 if (*l == '&')
1104 {
1105 char *h = l;
1106
1107 op->reg = 2; /* reg 2 in absolute addr mode. */
1108 op->am = 1; /* mode As == 01 bin. */
1109 op->ol = 1; /* Immediate value followed by instruction. */
1110 __tl = h + 1;
1111 parse_exp (__tl, &(op->exp));
1112 op->mode = OP_EXP;
1113 if (op->exp.X_op == O_constant)
1114 {
1115 int x = op->exp.X_add_number;
1116 if (x > 65535 || x < -32768)
1117 {
1118 as_bad (_("value out of range: %d"), x);
1119 return 1;
1120 }
1121 }
1122 else if (op->exp.X_op == O_symbol)
1123 {
1124 }
1125 else
1126 {
1127 as_bad (_("unknown expression in operand %s"), l);
1128 return 1;
1129 }
1130 return 0;
1131 }
1132
1133 /* Check if inderect register mode @Rn / postincrement @Rn+. */
1134 if (*l == '@')
1135 {
1136 char *t = l;
1137 char *m = strchr (l, '+');
1138
1139 if (t != l)
1140 {
1141 as_bad (_("unknown addressing mode %s"), l);
1142 return 1;
1143 }
1144
1145 t++;
1146 if (*t != 'r' && *t != 'R')
1147 {
1148 as_bad (_("unknown addressing mode %s"), l);
1149 return 1;
1150 }
1151
1152 t++; /* Points to the reg value. */
1153
1154 if (check_reg (t))
1155 {
1156 as_bad (_("Bad register name r%s"), t);
1157 return 1;
1158 }
1159
1160 op->mode = OP_REG;
1161 op->am = m ? 3 : 2;
1162 op->ol = 0;
1163 if (m)
1164 *m = 0; /* strip '+' */
1165 op->reg = atoi (t);
1166 if (op->reg < 0 || op->reg > 15)
1167 {
1168 as_bad (_("MSP430 does not have %d registers"), op->reg);
1169 return 1;
1170 }
1171
1172 return 0;
1173 }
1174
1175 /* Check if register indexed X(Rn). */
1176 do
1177 {
1178 char *h = strrchr (l, '(');
1179 char *m = strrchr (l, ')');
1180 char *t;
1181
1182 *imm_op = 1;
1183
1184 if (!h)
1185 break;
1186 if (!m)
1187 {
1188 as_bad (_("')' required"));
1189 return 1;
1190 }
1191
1192 t = h;
1193 op->am = 1;
1194 op->ol = 1;
1195 /* Extract a register. */
1196 t++; /* Advance pointer. */
1197
1198 if (*t != 'r' && *t != 'R')
1199 {
1200 as_bad (_
1201 ("unknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?"),
1202 l);
1203 return 1;
1204 }
1205 t++;
1206
1207 op->reg = *t - '0';
1208 if (op->reg > 9 || op->reg < 0)
1209 {
1210 as_bad (_("unknown operator (r%s substituded as a register name"),
1211 t);
1212 return 1;
1213 }
1214 t++;
1215 if (*t != ')')
1216 {
1217 op->reg = op->reg * 10;
1218 op->reg += *t - '0';
1219
1220 if (op->reg > 15)
1221 {
1222 as_bad (_("unknown operator %s"), l);
1223 return 1;
1224 }
1225 if (op->reg == 2)
1226 {
1227 as_bad (_("r2 should not be used in indexed addressing mode"));
1228 return 1;
1229 }
1230
1231 if (*(t + 1) != ')')
1232 {
1233 as_bad (_("unknown operator %s"), l);
1234 return 1;
1235 }
1236 }
1237
1238 /* Extract constant. */
1239 __tl = l;
1240 *h = 0;
1241 op->mode = OP_EXP;
1242 parse_exp (__tl, &(op->exp));
1243 if (op->exp.X_op == O_constant)
1244 {
1245 int x = op->exp.X_add_number;
1246
1247 if (x > 65535 || x < -32768)
1248 {
1249 as_bad (_("value out of range: %d"), x);
1250 return 1;
1251 }
1252
1253 if (x == 0)
1254 {
1255 op->mode = OP_REG;
1256 op->am = 2;
1257 op->ol = 0;
1258 return 0;
1259 }
1260 }
1261 else if (op->exp.X_op == O_symbol)
1262 {
1263 }
1264 else
1265 {
1266 as_bad (_("unknown expression in operand %s"), l);
1267 return 1;
1268 }
1269
1270 return 0;
1271 }
1272 while (0);
1273
1274 /* Register mode 'mov r1,r2'. */
1275 do
1276 {
1277 char *t = l;
1278
1279 /* Operand should be a register. */
1280 if (*t == 'r' || *t == 'R')
1281 {
1282 int x = atoi (t + 1);
1283
1284 if (check_reg (t + 1))
1285 break;
1286
1287 if (x < 0 || x > 15)
1288 break; /* Symbolic mode. */
1289
1290 op->mode = OP_REG;
1291 op->am = 0;
1292 op->ol = 0;
1293 op->reg = x;
1294 return 0;
1295 }
1296 }
1297 while (0);
1298
1299 /* Symbolic mode 'mov a, b' == 'mov x(pc), y(pc)'. */
1300 do
1301 {
1302 char *t = l;
1303
1304 __tl = l;
1305
1306 while (*t)
1307 {
1308 /* alpha/number underline dot for labels. */
1309 if (! ISALNUM (*t) && *t != '_' && *t != '.')
1310 {
1311 as_bad (_("unknown operand %s"), l);
1312 return 1;
1313 }
1314 t++;
1315 }
1316
1317 op->mode = OP_EXP;
1318 op->reg = 0; /* PC relative... be careful. */
1319 op->am = 1;
1320 op->ol = 1;
1321 __tl = l;
1322 parse_exp (__tl, &(op->exp));
1323 return 0;
1324 }
1325 while (0);
1326
1327 /* Unreachable. */
1328 as_bad (_("unknown addressing mode for operand %s"), l);
1329 return 1;
1330 }
1331
1332
1333 /* GAS will call this function for each section at the end of the assembly,
1334 to permit the CPU backend to adjust the alignment of a section. */
1335
1336 valueT
1337 md_section_align (seg, addr)
1338 asection *seg;
1339 valueT addr;
1340 {
1341 int align = bfd_get_section_alignment (stdoutput, seg);
1342
1343 return ((addr + (1 << align) - 1) & (-1 << align));
1344 }
1345
1346 /* If you define this macro, it should return the offset between the
1347 address of a PC relative fixup and the position from which the PC
1348 relative adjustment should be made. On many processors, the base
1349 of a PC relative instruction is the next instruction, so this
1350 macro would return the length of an instruction. */
1351
1352 long
1353 md_pcrel_from_section (fixp, sec)
1354 fixS *fixp;
1355 segT sec;
1356 {
1357 if (fixp->fx_addsy != (symbolS *) NULL
1358 && (!S_IS_DEFINED (fixp->fx_addsy)
1359 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1360 return 0;
1361
1362 return fixp->fx_frag->fr_address + fixp->fx_where;
1363 }
1364
1365 /* GAS will call this for each fixup. It should store the correct
1366 value in the object file. */
1367
1368 void
1369 md_apply_fix3 (fixp, valuep, seg)
1370 fixS *fixp;
1371 valueT *valuep;
1372 segT seg;
1373 {
1374 unsigned char *where;
1375 unsigned long insn;
1376 long value;
1377
1378 if (fixp->fx_addsy == (symbolS *) NULL)
1379 {
1380 value = *valuep;
1381 fixp->fx_done = 1;
1382 }
1383 else if (fixp->fx_pcrel)
1384 {
1385 segT s = S_GET_SEGMENT (fixp->fx_addsy);
1386
1387 if (fixp->fx_addsy && (s == seg || s == absolute_section))
1388 {
1389 value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
1390 fixp->fx_done = 1;
1391 }
1392 else
1393 value = *valuep;
1394 }
1395 else
1396 {
1397 value = fixp->fx_offset;
1398
1399 if (fixp->fx_subsy != (symbolS *) NULL)
1400 {
1401 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1402 {
1403 value -= S_GET_VALUE (fixp->fx_subsy);
1404 fixp->fx_done = 1;
1405 }
1406 else
1407 {
1408 /* We don't actually support subtracting a symbol. */
1409 as_bad_where (fixp->fx_file, fixp->fx_line,
1410 _("expression too complex"));
1411 }
1412 }
1413 }
1414
1415 switch (fixp->fx_r_type)
1416 {
1417 default:
1418 fixp->fx_no_overflow = 1;
1419 break;
1420 case BFD_RELOC_MSP430_10_PCREL:
1421 break;
1422 }
1423
1424 if (fixp->fx_done)
1425 {
1426 /* Fetch the instruction, insert the fully resolved operand
1427 value, and stuff the instruction back again. */
1428
1429 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1430
1431 insn = bfd_getl16 (where);
1432
1433 switch (fixp->fx_r_type)
1434 {
1435 case BFD_RELOC_MSP430_10_PCREL:
1436 if (value & 1)
1437 as_bad_where (fixp->fx_file, fixp->fx_line,
1438 _("odd address operand: %ld"), value);
1439
1440 /* Jumps are in words. */
1441 value >>= 1;
1442 --value; /* Correct PC. */
1443
1444 if (value < -512 || value > 511)
1445 as_bad_where (fixp->fx_file, fixp->fx_line,
1446 _("operand out of range: %ld"), value);
1447
1448 value &= 0x3ff; /* get rid of extended sign */
1449 bfd_putl16 ((bfd_vma) (value | insn), where);
1450 break;
1451
1452 case BFD_RELOC_MSP430_16_PCREL:
1453 if (value & 1)
1454 as_bad_where (fixp->fx_file, fixp->fx_line,
1455 _("odd address operand: %ld"), value);
1456
1457 /* Nothing to be corrected here. */
1458 if (value < -32768 || value > 65536)
1459 as_bad_where (fixp->fx_file, fixp->fx_line,
1460 _("operand out of range: %ld"), value);
1461
1462 value &= 0xffff; /* Get rid of extended sign. */
1463 bfd_putl16 ((bfd_vma) value, where);
1464 break;
1465
1466 case BFD_RELOC_MSP430_16_PCREL_BYTE:
1467 /* Nothing to be corrected here. */
1468 if (value < -32768 || value > 65536)
1469 as_bad_where (fixp->fx_file, fixp->fx_line,
1470 _("operand out of range: %ld"), value);
1471
1472 value &= 0xffff; /* Get rid of extended sign. */
1473 bfd_putl16 ((bfd_vma) value, where);
1474 break;
1475
1476 case BFD_RELOC_32:
1477 bfd_putl16 ((bfd_vma) value, where);
1478 break;
1479
1480 case BFD_RELOC_MSP430_16:
1481 case BFD_RELOC_16:
1482 case BFD_RELOC_MSP430_16_BYTE:
1483 value &= 0xffff;
1484 bfd_putl16 ((bfd_vma) value, where);
1485 break;
1486
1487 default:
1488 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1489 fixp->fx_line, fixp->fx_r_type);
1490 break;
1491 }
1492 }
1493 else
1494 {
1495 fixp->fx_addnumber = value;
1496 }
1497 return;
1498 }
1499
1500 /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1501 will pass the resulting reloc to `bfd_install_relocation'. This
1502 currently works poorly, as `bfd_install_relocation' often does the
1503 wrong thing, and instances of `tc_gen_reloc' have been written to
1504 work around the problems, which in turns makes it difficult to fix
1505 `bfd_install_relocation'. */
1506
1507 /* If while processing a fixup, a reloc really needs to be created
1508 then it is done here. */
1509
1510 arelent *
1511 tc_gen_reloc (seg, fixp)
1512 asection *seg ATTRIBUTE_UNUSED;
1513 fixS *fixp;
1514 {
1515 arelent *reloc;
1516
1517 reloc = (arelent *) xmalloc (sizeof (arelent));
1518
1519 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1520 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1521
1522 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1523 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1524 if (reloc->howto == (reloc_howto_type *) NULL)
1525 {
1526 as_bad_where (fixp->fx_file, fixp->fx_line,
1527 _("reloc %d not supported by object file format"),
1528 (int) fixp->fx_r_type);
1529 return NULL;
1530 }
1531
1532 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1533 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1534 reloc->address = fixp->fx_offset;
1535
1536 reloc->addend = fixp->fx_offset;
1537
1538 return reloc;
1539 }
1540
1541 /* Parse ordinary expression. */
1542
1543 static char *
1544 parse_exp (s, op)
1545 char *s;
1546 expressionS *op;
1547 {
1548 input_line_pointer = s;
1549 expression (op);
1550 if (op->X_op == O_absent)
1551 as_bad (_("missing operand"));
1552 return input_line_pointer;
1553 }
1554
1555
1556 int
1557 md_estimate_size_before_relax (fragp, seg)
1558 fragS *fragp ATTRIBUTE_UNUSED;
1559 asection *seg ATTRIBUTE_UNUSED;
1560 {
1561 abort ();
1562 return 0;
1563 }
This page took 0.08135 seconds and 5 git commands to generate.